From nobody Fri Aug 21 21:27:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787231087888272.9562348966231; Thu, 20 Aug 2026 06:04:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wx2RZ-00009C-Lm; Thu, 20 Aug 2026 09:04:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wx2RQ-0008Vu-Sw for qemu-devel@nongnu.org; Thu, 20 Aug 2026 09:04:21 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wx2RP-0006li-5Z for qemu-devel@nongnu.org; Thu, 20 Aug 2026 09:04:20 -0400 Received: by mail-pj1-x102a.google.com with SMTP id 98e67ed59e1d1-381b831d535so3301626a91.0 for ; Thu, 20 Aug 2026 06:04:18 -0700 (PDT) Received: from donnager-debian.. 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Signed-off-by: Joel Stanley --- tests/tcg/riscv64/Makefile.target | 13 +++ tests/tcg/riscv64/test-rvv-ldst.S | 131 ++++++++++++++++++++++++++++++ 2 files changed, 144 insertions(+) create mode 100644 tests/tcg/riscv64/test-rvv-ldst.S diff --git a/tests/tcg/riscv64/Makefile.target b/tests/tcg/riscv64/Makefile= .target index 4da5b9a3b322..68a5ec525598 100644 --- a/tests/tcg/riscv64/Makefile.target +++ b/tests/tcg/riscv64/Makefile.target @@ -13,6 +13,19 @@ run-test-noc: QEMU_OPTS +=3D -cpu rv64,c=3Dfalse TESTS +=3D test-aes run-test-aes: QEMU_OPTS +=3D -cpu rv64,zk=3Don =20 +# Vector load test +TESTS +=3D test-rvv-ldst +test-rvv-ldst: CFLAGS +=3D -march=3Drv64gcv +test-rvv-ldst: LDFLAGS =3D -nostdlib -static +run-test-rvv-ldst: QEMU_OPTS +=3D -cpu max + +# Re-run the vector tests at each supported VLEN +TEST_RVV_VLENS =3D 128 256 512 1024 +EXTRA_RUNS +=3D $(patsubst %,run-test-rvv-ldst-vlen%,$(TEST_RVV_VLENS)) +run-test-rvv-ldst-vlen%: test-rvv-ldst + $(call run-test, $@, env QEMU=3D$(QEMU) $(QEMU) $(QEMU_OPTS) -cpu max$(CO= MMA)vlen=3D$* $<, \ + test-rvv-ldst with vlen=3D$*) + # Test for fcvtmod TESTS +=3D test-fcvtmod test-fcvtmod: CFLAGS +=3D -march=3Drv64imafdc diff --git a/tests/tcg/riscv64/test-rvv-ldst.S b/tests/tcg/riscv64/test-rvv= -ldst.S new file mode 100644 index 000000000000..939b3f038b14 --- /dev/null +++ b/tests/tcg/riscv64/test-rvv-ldst.S @@ -0,0 +1,131 @@ +/* + * RISC-V vector load/store page crossing test + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + + .section .rodata + // Page aligned so the within-page cases never cross a boundary + .set MAX_PAGE_SIZE, 65536 + .balign MAX_PAGE_SIZE +src_data: + .byte 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17 + .byte 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F + .set NUM_BYTES, . - src_data + + .balign MAX_PAGE_SIZE +pageA_start: + // Fill the page, stopping 8 bytes short of the boundary + .fill MAX_PAGE_SIZE - 8, 1, 0xfa +src_cross_data: + .byte 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27 +pageB_start: + .byte 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F + .set NUM_CROSS_BYTES, . - src_cross_data + + .section .bss + .balign MAX_PAGE_SIZE +dst_data: + .space 16 + + .balign MAX_PAGE_SIZE + .space (MAX_PAGE_SIZE - 8) +dst_cross_data: + .space 16 + +.option norelax +.option norvc + + .text + .globl _start +_start: + // Case 1: Load/store within a page. t3 is the exit code on failure + li t3, 1 + la a0, src_data + li a1, NUM_BYTES + + // SEW=3D8, LMUL=3D1 + vsetvli t0, a1, e8, m1, ta, ma + + // Check the load will cover 16 bytes + bne t0, a1, fail + + // perform load + vle8.v v1, (a0) + + // Store vector content in memory + la a2, dst_data + vse8.v v1, (a2) + + // Compare first half + ld t1, 0(a0) + ld t2, 0(a2) + bne t1, t2, fail + + // Compare second half + ld t1, 8(a0) + ld t2, 8(a2) + bne t1, t2, fail + + // Case 2: Load straddles a page boundary + li t3, 2 + la a0, src_cross_data + li a1, NUM_CROSS_BYTES + + // SEW=3D8, LMUL=3D1 + vsetvli t0, a1, e8, m1, ta, ma + bne t0, a1, fail + + // perform load + vle8.v v1, (a0) + + // Store vector content in memory + la a2, dst_data + vse8.v v1, (a2) + + // Compare first half + ld t1, 0(a0) + ld t2, 0(a2) + bne t1, t2, fail + + // Compare second half + ld t1, 8(a0) + ld t2, 8(a2) + bne t1, t2, fail + + // Case 3: Store straddles a page boundary + li t3, 3 + la a0, src_data + li a1, NUM_BYTES + + // SEW=3D8, LMUL=3D1 + vsetvli t0, a1, e8, m1, ta, ma + bne t0, a1, fail + + // perform load + vle8.v v1, (a0) + + // Store vector content in memory + la a2, dst_cross_data + vse8.v v1, (a2) + + // Compare first half + ld t1, 0(a0) + ld t2, 0(a2) + bne t1, t2, fail + + // Compare second half + ld t1, 8(a0) + ld t2, 8(a2) + bne t1, t2, fail + +pass: + li a0, 0 + j exit + +fail: + mv a0, t3 + +exit: + li a7, 93 // sys_exit + ecall --=20 2.53.0 From nobody Fri Aug 21 21:27:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Signed-off-by: Joel Stanley --- tests/tcg/riscv64/test-rvv-ldst-intrinsics.c | 66 ++++++++++++++++++++ tests/tcg/riscv64/Makefile.target | 12 +++- 2 files changed, 75 insertions(+), 3 deletions(-) create mode 100644 tests/tcg/riscv64/test-rvv-ldst-intrinsics.c diff --git a/tests/tcg/riscv64/test-rvv-ldst-intrinsics.c b/tests/tcg/riscv= 64/test-rvv-ldst-intrinsics.c new file mode 100644 index 000000000000..3dbc8624700a --- /dev/null +++ b/tests/tcg/riscv64/test-rvv-ldst-intrinsics.c @@ -0,0 +1,66 @@ +/* + * RISC-V vector load/store test, including accesses that cross a page + * boundary. Intrinsics version of test-rvv-ldst.S. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include +#include +#include +#include + +#define MAX_PAGE_SIZE 65536 +#define NUM_BYTES 16 + +struct cross_page { + uint8_t pad[MAX_PAGE_SIZE - NUM_BYTES / 2]; + uint8_t data[NUM_BYTES]; +}; + +/* Page aligned so the within-page cases never cross a boundary */ +static const uint8_t src_data[NUM_BYTES] + __attribute__((aligned(MAX_PAGE_SIZE))) =3D { + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, +}; + +static const struct cross_page src_cross + __attribute__((aligned(MAX_PAGE_SIZE))) =3D { + .data =3D { + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, + 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F, + }, +}; + +static uint8_t dst_data[NUM_BYTES] __attribute__((aligned(MAX_PAGE_SIZE))); +static struct cross_page dst_cross __attribute__((aligned(MAX_PAGE_SIZE))); + +static void vec_copy(uint8_t *dst, const uint8_t *src, int code) +{ + size_t vl =3D __riscv_vsetvl_e8m1(NUM_BYTES); + if (vl !=3D NUM_BYTES) { + exit(code); + } + + vuint8m1_t v =3D __riscv_vle8_v_u8m1(src, vl); + __riscv_vse8_v_u8m1(dst, v, vl); + + if (memcmp(dst, src, NUM_BYTES)) { + exit(code); + } +} + +int main(void) +{ + /* Case 1: load/store within a page */ + vec_copy(dst_data, src_data, 1); + + /* Case 2: the load straddles a page boundary */ + vec_copy(dst_data, src_cross.data, 2); + + /* Case 3: the store straddles a page boundary */ + vec_copy(dst_cross.data, src_data, 3); + + return 0; +} diff --git a/tests/tcg/riscv64/Makefile.target b/tests/tcg/riscv64/Makefile= .target index 68a5ec525598..3c6cd4937cad 100644 --- a/tests/tcg/riscv64/Makefile.target +++ b/tests/tcg/riscv64/Makefile.target @@ -14,10 +14,11 @@ TESTS +=3D test-aes run-test-aes: QEMU_OPTS +=3D -cpu rv64,zk=3Don =20 # Vector load test -TESTS +=3D test-rvv-ldst -test-rvv-ldst: CFLAGS +=3D -march=3Drv64gcv +TESTS +=3D test-rvv-ldst test-rvv-ldst-intrinsics +test-rvv-ldst-intrinsics test-rvv-ldst: CFLAGS +=3D -march=3Drv64gcv test-rvv-ldst: LDFLAGS =3D -nostdlib -static -run-test-rvv-ldst: QEMU_OPTS +=3D -cpu max +test-rvv-ldst-intrinsics: LDFLAGS =3D -static +run-test-rvv-ldst-intrinsics run-test-rvv-ldst: QEMU_OPTS +=3D -cpu max =20 # Re-run the vector tests at each supported VLEN TEST_RVV_VLENS =3D 128 256 512 1024 @@ -26,6 +27,11 @@ run-test-rvv-ldst-vlen%: test-rvv-ldst $(call run-test, $@, env QEMU=3D$(QEMU) $(QEMU) $(QEMU_OPTS) -cpu max$(CO= MMA)vlen=3D$* $<, \ test-rvv-ldst with vlen=3D$*) =20 +EXTRA_RUNS +=3D $(patsubst %,run-test-rvv-ldst-intrinsics-vlen%,$(TEST_RVV= _VLENS)) +run-test-rvv-ldst-intrinsics-vlen%: test-rvv-ldst-intrinsics + $(call run-test, $@, env QEMU=3D$(QEMU) $(QEMU) $(QEMU_OPTS) -cpu max$(CO= MMA)vlen=3D$* $<, \ + test-rvv-ldst-intrinsics with vlen=3D$*) + # Test for fcvtmod TESTS +=3D test-fcvtmod test-fcvtmod: CFLAGS +=3D -march=3Drv64imafdc --=20 2.53.0