From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197539; cv=none; d=zohomail.com; s=zohoarc; b=l3BpDHvNyIeOTz/c8WVHtsmOG2FiQRts5IRwbIzeDqAt+NzWVg0wjQ2IMqzkx+Kx44cAN79c3+qVLU5IjaYDI0K8uACglLRBn5uy/heel1vKHtMvTMTTz7Z4CuOKIwnYVYfXWCz7Tktuf2LPyYugr37cXKOS9deIoycQmrZn1qY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197539; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=GzgYJSOfb1JzqJElM0sfMHzqHZr3yXBM8BzCAb4upso=; b=WK7m3443QabOu5NGmqO2gqsCsZya1fxpSUG7dVZ4Ml4c1ad4YGSL0lsIAWypoHXJIdvNBfvcj4AUngsSZC0ZMcTXJWlyG50svJe63JMATqtQpAPTZ5T0mhuJFJG+2s9pq4yJPkhI7GhsbPnpswywasy+haMAloJyDqdEoopCrDc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719753920993.39517727885311; Wed, 19 Aug 2026 20:45:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwthx-0006rX-IT; Wed, 19 Aug 2026 23:44:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwthw-0006rO-A3 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:48 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtht-0003bP-FJ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:48 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-2ced3386430so15113445ad.1 for ; Wed, 19 Aug 2026 20:44:45 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.44.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:44:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197484; x=1787802284; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=GzgYJSOfb1JzqJElM0sfMHzqHZr3yXBM8BzCAb4upso=; b=e5t92DL7WWKMjXL40v4VaYRZBnCo99RDpB6rxQmsZH5Zw6imCXkaMOXWvZxdCDtr9T byttFhb5F2dWHLkH8urDSLzzcbSQ/hMODk+n/dYAPYp5V2ic+IWifkkWm2RJrlMcWKaX Q4ZK/gVC4O1/PzrxatVIc+b1NjTqGuRTQm1RkHdREWPXHX7Y1rolekGxc2zcByuyxWo/ P0IiHsWcnulk6LqdiRHetgXKnQz7PqjWDwzBG/fmaEnWj2Q7RgJ8nfsqsisMf96vK2cw h5G4ycN6PO3yDTy356O2/HOsz4yXj7dmb1C3oIC+yQtat4GUGXsbYtNv7mLfTQIHJFo1 /8rQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197484; x=1787802284; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=GzgYJSOfb1JzqJElM0sfMHzqHZr3yXBM8BzCAb4upso=; b=eTgOhu4JYBCOgxQXuVi9K/SCNterHEhYknQ4ADieVZmzXLs6ouA3u5RwSc45HRx7Tp MWE/6OzlhtSYidKT8xxvcGyG+Iw3alxs2Kvkb3XISJ0R9hjP9KJODatS/+c8YuenC3/k 3VTtq2BVHKFEDG30piEBrayY5hUE3zfydWKv2qdKNGPQSQu/ChwBpYFmwSrgQvI90AZ0 84nwgjENu/cYBhHPTSEvSTRWFEsO4e8V4vEE9S+8EuLCeANJUXLvzUWQRKyusdzHn+GP GIAIyHWbgX4pOJII0ujzcRgE6eVOFBO8v3SI9GJtbFSeOi8bvuuS781o61s9OEMpdF6/ wWCQ== X-Gm-Message-State: AFuF++kf/ALvfqQi+4p/8pBcK0S5AzncJntTjZQegFcbwmPDB8pQsess H3Za+C/u23/uVXdRm/AysDCuv3wWbRSuUGGRHvAgRTb+3+0+BYtKofZJ6QfEqA== X-Gm-Gg: AR+sD11JJZWXR5lN5hqNLcJKbykPfVVzJSLu8yo8wyojDMZdAbDVnxEeYKQgvOYjRO/ dn2XfD6a4l1+81yMQQVsp2iCMSSFpjdP24MQAyR/fr5jr3nlEIPsqGxvm7UUAi7I7f7g7tVJsEr 0o94iZO1qmbuSC4WLJrC6k7pv7Xbj6vHoZZqbC08JVskZ53Z+I+EPj1Z3i52udwK7i7igqzstvE ZmZ9REBqoxbbrfSfw51sYnbdPa3tNJAuMoQbDB3AvHl4X/o69xQKvF1xoIPkIt9e8MmCrn+HSaN ML2PEBHkIvySF7h2QbviQ4fF86J2hJYbBydOjnYGK8RIQitLU5aBz33F5sL0pgllUZjnELPlHTH 8p8KA5RZi9Ehn42t2Z8JDH22kNpqLUr5xKSOEcwDRu7SwhkRMW4Q6igNEaj8mhScqUI8m9H+3GF cM5dZfcTBvaKPD6PdjMqpxg0gDyq4jx4bkkWHYYR+e83O7VlTEI4AgTXyR+ezuTTsuIQjdTBPmG cKQUg== X-Received: by 2002:a17:90b:4b0e:b0:38f:26c7:165e with SMTP id 98e67ed59e1d1-39580f6c042mr17435450a91.9.1787197483834; Wed, 19 Aug 2026 20:44:43 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Junze Cao , Chao Liu , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 01/93] hw/misc: Add K230 DDR controller and PHY models Date: Thu, 20 Aug 2026 13:42:58 +1000 Message-ID: <20260820034430.1186695-2-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197540237158500 Content-Type: text/plain; charset="utf-8" From: Junze Cao The K230 SDK U-Boot SPL programs K230 DDRC CFG and K230 DDR PHY registers before DRAM can be used. Add separate SysBus devices for both register ranges. Model controller reset values, DFI and software-update handshakes. For the PHY, model register ownership, the training mailbox, and DFI completion. Include migration state for both devices. Signed-off-by: Junze Cao Suggested-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Message-ID: <20260807-k230-ddr-v2-v2-1-c531308ae819@gmail.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 2 + include/hw/misc/k230_ddr.h | 59 ++++ hw/misc/k230_ddr.c | 556 +++++++++++++++++++++++++++++++++++++ hw/misc/meson.build | 1 + 4 files changed, 618 insertions(+) create mode 100644 include/hw/misc/k230_ddr.h create mode 100644 hw/misc/k230_ddr.c diff --git a/MAINTAINERS b/MAINTAINERS index b51f5c3e60..b957fa74d9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1843,8 +1843,10 @@ M: Chao Liu L: qemu-riscv@nongnu.org S: Maintained F: docs/system/riscv/k230.rst +F: hw/misc/k230_ddr.c F: hw/riscv/k230.c F: hw/watchdog/k230_wdt.c +F: include/hw/misc/k230_ddr.h F: include/hw/riscv/k230.h F: include/hw/watchdog/k230_wdt.h F: tests/functional/riscv64/test_k230.py diff --git a/include/hw/misc/k230_ddr.h b/include/hw/misc/k230_ddr.h new file mode 100644 index 0000000000..d912e8e1b0 --- /dev/null +++ b/include/hw/misc/k230_ddr.h @@ -0,0 +1,59 @@ +/* + * Kendryte K230 DDR controller and PHY models + * + * Device state and type declarations for the K230 DDRC CFG and K230 DDR P= HY + * registers. + * + * Copyright (c) 2026 Junze Cao + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_MISC_K230_DDR_H +#define HW_MISC_K230_DDR_H + +#include "hw/core/sysbus.h" + +#define K230_DDRC_MMIO_SIZE 0x02000000 +#define K230_DDR_PHY_MMIO_SIZE 0x00400000 + +#define K230_DDRC_REG_SIZE 0x328 +#define K230_DDRC_REG_COUNT (K230_DDRC_REG_SIZE / sizeof(uint32_t)) + +#define K230_DDR_PHY_ANIB_COUNT 10 +#define K230_DDR_PHY_DBYTE_COUNT 4 +#define K230_DDR_PHY_NIBBLES_PER_DBYTE 2 + +#define TYPE_K230_DDR_CFG "riscv.k230.ddr-cfg" +OBJECT_DECLARE_SIMPLE_TYPE(K230DDRCfgState, K230_DDR_CFG) + +#define TYPE_K230_DDR_PHY "riscv.k230.ddr-phy" +OBJECT_DECLARE_SIMPLE_TYPE(K230DDRPhyState, K230_DDR_PHY) + +struct K230DDRCfgState { + SysBusDevice parent_obj; + + MemoryRegion mmio; + K230DDRPhyState *phy; + uint32_t regs[K230_DDRC_REG_COUNT]; + bool initialized; +}; + +struct K230DDRPhyState { + SysBusDevice parent_obj; + + MemoryRegion mmio; + uint16_t atx_impedance[K230_DDR_PHY_ANIB_COUNT]; + uint16_t tx_impedance_ctrl1[K230_DDR_PHY_DBYTE_COUNT] + [K230_DDR_PHY_NIBBLES_PER_DBYTE]; + uint16_t tx_odt_drv_stren[K230_DDR_PHY_DBYTE_COUNT] + [K230_DDR_PHY_NIBBLES_PER_DBYTE]; + uint16_t dfi_init_complete; + uint16_t vref_in_global; + uint16_t micro_cont_mux_sel; + bool training_trigger_seen; + bool training_complete; + bool mailbox_message_pending; +}; + +#endif diff --git a/hw/misc/k230_ddr.c b/hw/misc/k230_ddr.c new file mode 100644 index 0000000000..dac700b201 --- /dev/null +++ b/hw/misc/k230_ddr.c @@ -0,0 +1,556 @@ +/* + * Kendryte K230 DDR controller and PHY models + * + * Models the K230 DDRC CFG registers and K230 DDR PHY registers exercised + * by the K230 SDK U-Boot SPL. + * + * Copyright (c) 2026 Junze Cao + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "migration/vmstate.h" +#include "hw/core/registerfields.h" +#include "hw/core/resettable.h" +#include "hw/misc/k230_ddr.h" + +/* DDRC CFG registers */ + +enum K230DDRCOperatingMode { + K230_DDRC_MODE_INIT =3D 0, + K230_DDRC_MODE_NORMAL =3D 1, +}; + +REG32(K230_DDRC_MSTR, 0x000) + +REG32(K230_DDRC_STAT, 0x004) + FIELD(K230_DDRC_STAT, OPERATING_MODE, 0, 3) + +REG32(K230_DDRC_PWRCTL, 0x030) + +REG32(K230_DDRC_RFSHCTL0, 0x050) + +REG32(K230_DDRC_RFSHTMG, 0x064) + +REG32(K230_DDRC_RFSHTMG1, 0x068) + +REG32(K230_DDRC_INIT0, 0x0d0) + +REG32(K230_DDRC_INIT2, 0x0d8) + +REG32(K230_DDRC_INIT3, 0x0dc) + +REG32(K230_DDRC_INIT5, 0x0e4) + +REG32(K230_DDRC_DRAMTMG0, 0x100) +#define R_K230_DDRC_DRAMTMG(index) \ + (R_K230_DDRC_DRAMTMG0 + (index)) + +REG32(K230_DDRC_ZQCTL0, 0x180) + +REG32(K230_DDRC_ZQCTL1, 0x184) + +REG32(K230_DDRC_ZQCTL2, 0x188) + +REG32(K230_DDRC_ZQSTAT, 0x18c) + +REG32(K230_DDRC_DFITMG0, 0x190) + +REG32(K230_DDRC_DFITMG1, 0x194) + +REG32(K230_DDRC_DFIUPD0, 0x1a0) + +REG32(K230_DDRC_DFIUPD1, 0x1a4) + +REG32(K230_DDRC_DFIUPD2, 0x1a8) + +REG32(K230_DDRC_DFIMISC, 0x1b0) + FIELD(K230_DDRC_DFIMISC, DFI_INIT_COMPLETE_EN, 0, 1) + FIELD(K230_DDRC_DFIMISC, DFI_INIT_START, 5, 1) + +REG32(K230_DDRC_DFITMG2, 0x1b4) + +REG32(K230_DDRC_DFISTAT, 0x1bc) + FIELD(K230_DDRC_DFISTAT, DFI_INIT_COMPLETE, 0, 1) + +REG32(K230_DDRC_ODTCFG, 0x240) + +REG32(K230_DDRC_SWCTL, 0x320) + FIELD(K230_DDRC_SWCTL, SW_DONE, 0, 1) + +REG32(K230_DDRC_SWSTAT, 0x324) + FIELD(K230_DDRC_SWSTAT, SW_DONE_ACK, 0, 1) + +static const uint32_t k230_ddrc_reset_values[K230_DDRC_REG_COUNT] =3D { + [R_K230_DDRC_MSTR] =3D 0x01040000, + [R_K230_DDRC_RFSHCTL0] =3D 0x00210000, + [R_K230_DDRC_RFSHTMG] =3D 0x0062008c, + [R_K230_DDRC_RFSHTMG1] =3D 0x0000008c, + [R_K230_DDRC_INIT0] =3D 0x0002004e, + [R_K230_DDRC_INIT3] =3D 0x00000510, + [R_K230_DDRC_INIT5] =3D 0x00100000, + [R_K230_DDRC_DRAMTMG(0)] =3D 0x0f101b0f, + [R_K230_DDRC_DRAMTMG(1)] =3D 0x00080414, + [R_K230_DDRC_DRAMTMG(2)] =3D 0x0305060d, + [R_K230_DDRC_DRAMTMG(3)] =3D 0x00004000, + [R_K230_DDRC_DRAMTMG(4)] =3D 0x05040405, + [R_K230_DDRC_DRAMTMG(5)] =3D 0x05050403, + [R_K230_DDRC_DRAMTMG(6)] =3D 0x02020005, + [R_K230_DDRC_DRAMTMG(7)] =3D 0x00000202, + [R_K230_DDRC_DRAMTMG(8)] =3D 0x03034405, + [R_K230_DDRC_DRAMTMG(9)] =3D 0x0004040d, + [R_K230_DDRC_DRAMTMG(10)] =3D 0x001c180a, + [R_K230_DDRC_DRAMTMG(11)] =3D 0x440c021c, + [R_K230_DDRC_DRAMTMG(12)] =3D 0x00020610, + [R_K230_DDRC_DRAMTMG(13)] =3D 0x1c200004, + [R_K230_DDRC_DRAMTMG(14)] =3D 0x000000a0, + [R_K230_DDRC_DRAMTMG(16)] =3D 0x05100404, + [R_K230_DDRC_ZQCTL0] =3D 0x02000040, + [R_K230_DDRC_ZQCTL1] =3D 0x02000100, + [R_K230_DDRC_DFITMG0] =3D 0x07020002, + [R_K230_DDRC_DFITMG1] =3D 0x00000404, + [R_K230_DDRC_DFIUPD0] =3D 0x00400003, + [R_K230_DDRC_DFIUPD1] =3D 0x00010001, + [R_K230_DDRC_DFIUPD2] =3D 0x80000000, + [R_K230_DDRC_DFIMISC] =3D 0x00000001, + [R_K230_DDRC_DFITMG2] =3D 0x00000202, + [R_K230_DDRC_ODTCFG] =3D 0x04000400, + [R_K230_DDRC_SWCTL] =3D 0x00000001, + [R_K230_DDRC_SWSTAT] =3D 0x00000001, +}; + +/* K230 DDR PHY CSRs use byte offset =3D CSR index * 4. */ +#define K230_DDR_PHY_CSR_OFFSET(index) ((index) * 4) +#define K230_DDR_PHY_MASTER_CSR(reg) \ + K230_DDR_PHY_CSR_OFFSET(0x20000 + (reg)) +#define K230_DDR_PHY_APBONLY_CSR(reg) \ + K230_DDR_PHY_CSR_OFFSET(0xd0000 + (reg)) + +#define K230_DDR_PHY_ATX_IMPEDANCE_RESET UINT32_C(0x03ff) + +REG32(K230_DDR_PHY_MICRO_CONT_MUX_SEL, + K230_DDR_PHY_APBONLY_CSR(0x000)) + FIELD(K230_DDR_PHY_MICRO_CONT_MUX_SEL, MICRO_CONT_MUX_SEL, 0, 1) + +REG32(K230_DDR_PHY_TRAINING_STATUS, + K230_DDR_PHY_APBONLY_CSR(0x004)) + FIELD(K230_DDR_PHY_TRAINING_STATUS, MAILBOX_EMPTY, 0, 1) + +REG32(K230_DDR_PHY_TRAINING_ACK, + K230_DDR_PHY_APBONLY_CSR(0x031)) + +REG32(K230_DDR_PHY_TRAINING_MESSAGE, + K230_DDR_PHY_APBONLY_CSR(0x032)) + +REG32(K230_DDR_PHY_TRAINING_TRIGGER, + K230_DDR_PHY_APBONLY_CSR(0x099)) + +#define K230_DDR_PHY_TX_IMPEDANCE_CTRL1_RESET UINT32_C(0x0fff) + +REG32(K230_DDR_PHY_DFI_INIT_COMPLETE, + K230_DDR_PHY_MASTER_CSR(0x0f9)) + FIELD(K230_DDR_PHY_DFI_INIT_COMPLETE, DFI_INIT_COMPLETE, 0, 1) + +REG32(K230_DDR_PHY_VREF_IN_GLOBAL, + K230_DDR_PHY_MASTER_CSR(0x0b2)) +#define K230_DDR_PHY_VREF_IN_GLOBAL_RESET UINT32_C(0x0200) + +static void k230_ddr_cfg_update_state(K230DDRCfgState *s) +{ + bool dfi_complete =3D false; + unsigned int operating_mode =3D K230_DDRC_MODE_INIT; + + if (s->phy) { + dfi_complete =3D FIELD_EX32(s->phy->dfi_init_complete, + K230_DDR_PHY_DFI_INIT_COMPLETE, + DFI_INIT_COMPLETE); + } + + ARRAY_FIELD_DP32(s->regs, K230_DDRC_DFISTAT, + DFI_INIT_COMPLETE, dfi_complete); + ARRAY_FIELD_DP32(s->regs, K230_DDRC_SWSTAT, SW_DONE_ACK, + ARRAY_FIELD_EX32(s->regs, K230_DDRC_SWCTL, SW_DONE)); + + if (dfi_complete && + ARRAY_FIELD_EX32(s->regs, K230_DDRC_DFIMISC, + DFI_INIT_COMPLETE_EN)) { + s->initialized =3D true; + } + + if (s->initialized) { + operating_mode =3D K230_DDRC_MODE_NORMAL; + } + + ARRAY_FIELD_DP32(s->regs, K230_DDRC_STAT, + OPERATING_MODE, operating_mode); +} + +static uint64_t k230_ddr_cfg_read(void *opaque, hwaddr addr, unsigned int = size) +{ + K230DDRCfgState *s =3D opaque; + uint64_t value =3D 0; + + if (addr < K230_DDRC_REG_SIZE) { + k230_ddr_cfg_update_state(s); + value =3D s->regs[addr / sizeof(uint32_t)]; + } + + return value; +} + +static void k230_ddr_cfg_write(void *opaque, hwaddr addr, uint64_t value, + unsigned int size) +{ + K230DDRCfgState *s =3D opaque; + uint32_t val =3D value; + + if (addr >=3D K230_DDRC_REG_SIZE) { + return; + } + + switch (addr) { + case A_K230_DDRC_STAT: + case A_K230_DDRC_DFISTAT: + case A_K230_DDRC_ZQSTAT: + case A_K230_DDRC_SWSTAT: + return; + case A_K230_DDRC_PWRCTL: + s->regs[R_K230_DDRC_PWRCTL] =3D val & MAKE_64BIT_MASK(0, 9); + break; + case A_K230_DDRC_ZQCTL2: + /* ZQ reset completes immediately and the W1S bit self-clears. */ + s->regs[R_K230_DDRC_ZQCTL2] =3D 0; + s->regs[R_K230_DDRC_ZQSTAT] =3D 0; + break; + case A_K230_DDRC_DFIMISC: + s->regs[R_K230_DDRC_DFIMISC] =3D + val & (MAKE_64BIT_MASK(0, 6) | MAKE_64BIT_MASK(8, 5)); + if (s->phy && s->phy->training_complete && + FIELD_EX32(val, K230_DDRC_DFIMISC, DFI_INIT_START)) { + s->phy->dfi_init_complete =3D FIELD_DP32( + s->phy->dfi_init_complete, + K230_DDR_PHY_DFI_INIT_COMPLETE, DFI_INIT_COMPLETE, 1); + } + break; + case A_K230_DDRC_SWCTL: + s->regs[R_K230_DDRC_SWCTL] =3D + val & R_K230_DDRC_SWCTL_SW_DONE_MASK; + break; + default: + s->regs[addr / sizeof(uint32_t)] =3D val; + break; + } + + k230_ddr_cfg_update_state(s); +} + +static bool k230_ddr_phy_decode_anib(hwaddr addr, unsigned int *anib) +{ + uint32_t csr =3D addr / sizeof(uint32_t); + + if ((csr & 0xfff) !=3D 0x043) { + return false; + } + + *anib =3D csr >> 12; + return *anib < K230_DDR_PHY_ANIB_COUNT; +} + +static bool k230_ddr_phy_decode_dbyte(hwaddr addr, uint32_t reg, + unsigned int *dbyte, + unsigned int *nibble) +{ + uint32_t csr =3D addr / sizeof(uint32_t); + uint32_t block_offset; + + if (csr < 0x10000) { + return false; + } + + csr -=3D 0x10000; + *dbyte =3D csr >> 12; + if (*dbyte >=3D K230_DDR_PHY_DBYTE_COUNT) { + return false; + } + + block_offset =3D csr & 0xfff; + *nibble =3D block_offset >> 8; + return *nibble < K230_DDR_PHY_NIBBLES_PER_DBYTE && + (block_offset & 0xff) =3D=3D reg; +} + +static uint64_t k230_ddr_phy_read(void *opaque, hwaddr addr, + unsigned int size) +{ + K230DDRPhyState *s =3D opaque; + unsigned int dbyte; + unsigned int nibble; + unsigned int anib; + uint64_t value =3D 0; + + switch (addr) { + case A_K230_DDR_PHY_MICRO_CONT_MUX_SEL: + value =3D s->micro_cont_mux_sel; + break; + case A_K230_DDR_PHY_TRAINING_STATUS: + value =3D s->mailbox_message_pending ? 0 : + R_K230_DDR_PHY_TRAINING_STATUS_MAILBOX_EMPTY_MASK; + break; + case A_K230_DDR_PHY_TRAINING_MESSAGE: + value =3D s->training_complete ? 0x07 : 0; + break; + case A_K230_DDR_PHY_TRAINING_ACK: + case A_K230_DDR_PHY_TRAINING_TRIGGER: + break; + case A_K230_DDR_PHY_DFI_INIT_COMPLETE: + value =3D s->dfi_init_complete; + break; + case A_K230_DDR_PHY_VREF_IN_GLOBAL: + value =3D s->vref_in_global; + break; + default: + if (k230_ddr_phy_decode_anib(addr, &anib)) { + value =3D s->atx_impedance[anib]; + } else if (k230_ddr_phy_decode_dbyte(addr, 0x049, + &dbyte, &nibble)) { + value =3D s->tx_impedance_ctrl1[dbyte][nibble]; + } else if (k230_ddr_phy_decode_dbyte(addr, 0x04d, + &dbyte, &nibble)) { + value =3D s->tx_odt_drv_stren[dbyte][nibble]; + } else { + qemu_log_mask(LOG_UNIMP, + "%s: unimplemented DDR PHY read at offset 0x%" + HWADDR_PRIx ", returning 0\n", + __func__, addr); + } + break; + } + + return value; +} + +static void k230_ddr_phy_write(void *opaque, hwaddr addr, uint64_t value, + unsigned int size) +{ + K230DDRPhyState *s =3D opaque; + uint16_t val =3D value; + unsigned int dbyte; + unsigned int nibble; + unsigned int anib; + + switch (addr) { + case A_K230_DDR_PHY_MICRO_CONT_MUX_SEL: + s->micro_cont_mux_sel =3D + val & R_K230_DDR_PHY_MICRO_CONT_MUX_SEL_MICRO_CONT_MUX_SEL_MAS= K; + return; + case A_K230_DDR_PHY_TRAINING_STATUS: + case A_K230_DDR_PHY_TRAINING_MESSAGE: + return; + case A_K230_DDR_PHY_TRAINING_ACK: + if (val =3D=3D 0) { + s->mailbox_message_pending =3D false; + } + return; + case A_K230_DDR_PHY_TRAINING_TRIGGER: + if (val !=3D 0) { + s->training_trigger_seen =3D true; + } else if (s->training_trigger_seen) { + /* Abstract the loaded firmware run to its final mailbox messa= ge. */ + s->training_trigger_seen =3D false; + s->training_complete =3D true; + s->mailbox_message_pending =3D true; + } + return; + default: + break; + } + + if (FIELD_EX32(s->micro_cont_mux_sel, + K230_DDR_PHY_MICRO_CONT_MUX_SEL, + MICRO_CONT_MUX_SEL)) { + return; + } + + switch (addr) { + case A_K230_DDR_PHY_DFI_INIT_COMPLETE: + s->dfi_init_complete =3D + val & R_K230_DDR_PHY_DFI_INIT_COMPLETE_DFI_INIT_COMPLETE_MASK; + return; + case A_K230_DDR_PHY_VREF_IN_GLOBAL: + s->vref_in_global =3D val & UINT16_C(0x7fff); + return; + default: + break; + } + + if (k230_ddr_phy_decode_anib(addr, &anib)) { + s->atx_impedance[anib] =3D val & UINT16_C(0x03ff); + return; + } + + if (k230_ddr_phy_decode_dbyte(addr, 0x049, &dbyte, &nibble)) { + s->tx_impedance_ctrl1[dbyte][nibble] =3D val & UINT16_C(0x0fff); + return; + } + + if (k230_ddr_phy_decode_dbyte(addr, 0x04d, &dbyte, &nibble)) { + s->tx_odt_drv_stren[dbyte][nibble] =3D val & UINT16_C(0x0fff); + return; + } + + qemu_log_mask(LOG_UNIMP, + "%s: unimplemented DDR PHY write at offset 0x%" + HWADDR_PRIx ", value 0x%" PRIx64 "\n", + __func__, addr, value); +} + +static const MemoryRegionOps k230_ddr_cfg_ops =3D { + .read =3D k230_ddr_cfg_read, + .write =3D k230_ddr_cfg_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + .unaligned =3D false, + }, +}; + +static const MemoryRegionOps k230_ddr_phy_ops =3D { + .read =3D k230_ddr_phy_read, + .write =3D k230_ddr_phy_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + .unaligned =3D false, + }, +}; + +static void k230_ddr_cfg_init(Object *obj) +{ + K230DDRCfgState *s =3D K230_DDR_CFG(obj); + + memory_region_init_io(&s->mmio, obj, &k230_ddr_cfg_ops, s, + "k230-ddr-cfg", K230_DDRC_MMIO_SIZE); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); +} + +static void k230_ddr_phy_init(Object *obj) +{ + K230DDRPhyState *s =3D K230_DDR_PHY(obj); + + memory_region_init_io(&s->mmio, obj, &k230_ddr_phy_ops, s, + "k230-ddr-phy", K230_DDR_PHY_MMIO_SIZE); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); +} + +static void k230_ddr_cfg_reset_enter(Object *obj, ResetType type) +{ + K230DDRCfgState *s =3D K230_DDR_CFG(obj); + + s->initialized =3D false; + memcpy(s->regs, k230_ddrc_reset_values, sizeof(s->regs)); +} + +static void k230_ddr_phy_reset_enter(Object *obj, ResetType type) +{ + K230DDRPhyState *s =3D K230_DDR_PHY(obj); + unsigned int dbyte; + unsigned int nibble; + unsigned int anib; + + memset(s->tx_odt_drv_stren, 0, sizeof(s->tx_odt_drv_stren)); + + for (anib =3D 0; anib < ARRAY_SIZE(s->atx_impedance); anib++) { + s->atx_impedance[anib] =3D K230_DDR_PHY_ATX_IMPEDANCE_RESET; + } + + for (dbyte =3D 0; dbyte < ARRAY_SIZE(s->tx_impedance_ctrl1); dbyte++) { + for (nibble =3D 0; + nibble < ARRAY_SIZE(s->tx_impedance_ctrl1[dbyte]); nibble++) { + s->tx_impedance_ctrl1[dbyte][nibble] =3D + K230_DDR_PHY_TX_IMPEDANCE_CTRL1_RESET; + } + } + + s->dfi_init_complete =3D 0; + s->vref_in_global =3D K230_DDR_PHY_VREF_IN_GLOBAL_RESET; + s->micro_cont_mux_sel =3D 0; + s->training_trigger_seen =3D false; + s->training_complete =3D false; + s->mailbox_message_pending =3D false; +} + +static const VMStateDescription vmstate_k230_ddr_cfg =3D { + .name =3D "k230-ddr-cfg", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32_ARRAY(regs, K230DDRCfgState, K230_DDRC_REG_COUNT), + VMSTATE_BOOL(initialized, K230DDRCfgState), + VMSTATE_END_OF_LIST() + }, +}; + +static const VMStateDescription vmstate_k230_ddr_phy =3D { + .name =3D "k230-ddr-phy", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT16_ARRAY(atx_impedance, K230DDRPhyState, + K230_DDR_PHY_ANIB_COUNT), + VMSTATE_UINT16_2DARRAY(tx_impedance_ctrl1, K230DDRPhyState, + K230_DDR_PHY_DBYTE_COUNT, + K230_DDR_PHY_NIBBLES_PER_DBYTE), + VMSTATE_UINT16_2DARRAY(tx_odt_drv_stren, K230DDRPhyState, + K230_DDR_PHY_DBYTE_COUNT, + K230_DDR_PHY_NIBBLES_PER_DBYTE), + VMSTATE_UINT16(dfi_init_complete, K230DDRPhyState), + VMSTATE_UINT16(vref_in_global, K230DDRPhyState), + VMSTATE_UINT16(micro_cont_mux_sel, K230DDRPhyState), + VMSTATE_BOOL(training_trigger_seen, K230DDRPhyState), + VMSTATE_BOOL(training_complete, K230DDRPhyState), + VMSTATE_BOOL(mailbox_message_pending, K230DDRPhyState), + VMSTATE_END_OF_LIST() + }, +}; + +static void k230_ddr_cfg_class_init(ObjectClass *klass, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + rc->phases.enter =3D k230_ddr_cfg_reset_enter; + dc->vmsd =3D &vmstate_k230_ddr_cfg; +} + +static void k230_ddr_phy_class_init(ObjectClass *klass, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + rc->phases.enter =3D k230_ddr_phy_reset_enter; + dc->vmsd =3D &vmstate_k230_ddr_phy; +} + +static const TypeInfo k230_ddr_types[] =3D { + { + .name =3D TYPE_K230_DDR_CFG, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(K230DDRCfgState), + .instance_init =3D k230_ddr_cfg_init, + .class_init =3D k230_ddr_cfg_class_init, + }, + { + .name =3D TYPE_K230_DDR_PHY, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(K230DDRPhyState), + .instance_init =3D k230_ddr_phy_init, + .class_init =3D k230_ddr_phy_class_init, + }, +}; + +DEFINE_TYPES(k230_ddr_types) diff --git a/hw/misc/meson.build b/hw/misc/meson.build index e86d9ad6b3..15a06974f1 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -29,6 +29,7 @@ system_ss.add(when: 'CONFIG_IOSB', if_true: files('iosb.c= ')) system_ss.add(when: 'CONFIG_VIRT_CTRL', if_true: files('virt_ctrl.c')) =20 # RISC-V devices +system_ss.add(when: 'CONFIG_K230', if_true: files('k230_ddr.c')) system_ss.add(when: 'CONFIG_MCHP_PFSOC_DMC', if_true: files('mchp_pfsoc_dm= c.c')) system_ss.add(when: 'CONFIG_MCHP_PFSOC_IOSCB', if_true: files('mchp_pfsoc_= ioscb.c')) system_ss.add(when: 'CONFIG_MCHP_PFSOC_SYSREG', if_true: files('mchp_pfsoc= _sysreg.c')) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197533; cv=none; d=zohomail.com; s=zohoarc; b=iRb2b3Wse/bdQ/6NYMUpWrrgMQCXAgVt8V5JCcRlxRD9cAC1PAMfMjBSpmDPboBeeqC9IWjRgB0g0TBKUanQHDkSJ7pqijF5nsGtqVOCNmQ/Aescvjt13lC0brTUaklQiASGk0X+UQGVP/GnloAo5NklA07lbjlnp6DSrnsYwqY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197533; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=v+sECY3ATOpspmun2v/pmM0HIUARTgenM86VzLHZI6Q=; b=NAqDE1ltI8yfk7mSIqYlbk0aR12tuFpPEzepMQTxKYXAG29EfnzfirpeXMk6j6J95XtNZxJv6D/m/dzxm2eK/Gv6aOz9su4LRz9JLvsA2+/jjjt3loSsZRtATOSDbJKsctxf3LZdGeO9dLZO9t7YApg4jOzKld9qLs5urQ9mACk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719753367677.54425826504007; Wed, 19 Aug 2026 20:45:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwthz-0006s0-L2; Wed, 19 Aug 2026 23:44:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwthy-0006rn-FD for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:50 -0400 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwthw-0003bd-Lr for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:50 -0400 Received: by mail-pj1-x102b.google.com with SMTP id 98e67ed59e1d1-38e08baf860so1863547a91.2 for ; Wed, 19 Aug 2026 20:44:48 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.44.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:44:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197487; x=1787802287; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=v+sECY3ATOpspmun2v/pmM0HIUARTgenM86VzLHZI6Q=; b=S38U4khe154CITiAcP7O2qn5DbxCsx1VYt7FBKaKkO8DOWCebAudiIczAnPB7Dq6U2 Nu5v0Kozy0jXKny6uSQuAC+1KbJVg+/8NJjkvcvJ8XHseEdsTkyAP0EmbnjaSUd90iFv zRrEGWuXr4j7ClquFGgPbRQxoFMfgGSxsUGiUqAthTZRP4pxMBqppcTUQCDnH7eVpi+5 3v9ctt1SApa6TWoPbb1zm2oUbYTsHPpMuJepoq6Kh40a0Zv7QloHLdwy1m/FgjXXAape 0eroP/s2dTlSkoVNbUyWi6uVN/wPg9gjZN6iQciutx8PzjDszOY4WGmRWyeNVO15f9Wj x/Jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197487; x=1787802287; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=v+sECY3ATOpspmun2v/pmM0HIUARTgenM86VzLHZI6Q=; b=iZSgngWnFARcvA4rDB9+jXuzya2QIu1VPACQaPUQkkVw2AIyjY5pE+OfYMbbWezzUM l7l7cIYDV1yKxaz9ISby5p6KiuIESM/HBAZUHj4FD7CMTL4YA3vbFnS0uMSm2wc+lK6s lNmVimY/FXhNeIaQ1G/lUuNKG4zq8zr0moUUy8OW1wceyz1YHeK/hY82RGUz6ssXCwPT VyQU/8kuzhVppQNu6RNqOb1vnDlQFvEcddYZoKxThsNS04sgwUiMFmK+Gq01946/Dxqy S7mPR3vkLy9GvPlYZb6T70+S8sctAfy4LM0zt2aUC5Kq2ThKL5gRcbwAGL6aQGmePRGm P/Lw== X-Gm-Message-State: AFuF++mJtBaD/rEuU1/BumeeLOOCUSIKISNkXSsNCP/FIDrsLpkxg4G6 weceKPj/i98K0HgaA6gD2qIpBNDbv5wnjOAJkbIa5P2tZKAUAWLg0czvLL5XDw== X-Gm-Gg: AR+sD12YwFodvgRkzGIe4b1k9Ch6I+vfxdJ5IyC7y5GyMn0oz75if1FpXB5r+TGfger eHwU4cg8i7n9DXVpdtTI6rcPJW2aB90TTCbVxu2fGTyvjvrnI0hLch7AKS+ZhYuSca1ESj/O0OT 0othpmpZ9++MMe3Ki8Vh/dNEOOJRfDUO4HmKfd3Kj0ZOv0c4NJSORNg5H8Xm72knhXCMPRPj7v+ yXV9kpwvySLkC5+716AXze+VhPVYzxfPerR1k4/O6AcKSrnSOOQibrOHgUsvQg53M6WtnPI882l rhH/F3onRqCNoVWpWPnPvWWkJEFCZA63v6UFKVWqblnq3/YtwrQqjkkaxeEAPSjhfGDrdkjMTKu E4vf55QgdKRV9k5fmJJxUItGNL/SYqbGcYshOtXJPgpDtS3WxA04y1qgwymA0pWD0aTI54HSI7e tqH3KdILfSK2kU3FxuWLuSt+nHxv8kbjYQoZKHfD3YYRsQ0gi07ljuYQP7J1cWfWiYWC9mf1Rtn hThkw== X-Received: by 2002:a17:90b:39ab:b0:38e:fea2:df53 with SMTP id 98e67ed59e1d1-39580ed4567mr15720146a91.4.1787197487023; Wed, 19 Aug 2026 20:44:47 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Junze Cao , Chao Liu , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 02/93] hw/riscv: Connect K230 DDR controller and PHY models Date: Thu, 20 Aug 2026 13:42:59 +1000 Message-ID: <20260820034430.1186695-3-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197536500158500 Content-Type: text/plain; charset="utf-8" From: Junze Cao Replace the unimplemented K230 DDR configuration region with the DDRC model and map the PHY model at 0x9a000000. Connect the controller to the PHY so DFI status reflects PHY training and initialization state. Suggested-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Signed-off-by: Junze Cao Message-ID: <20260807-k230-ddr-v2-v2-2-c531308ae819@gmail.com> Signed-off-by: Alistair Francis --- docs/system/riscv/k230.rst | 4 ++++ include/hw/riscv/k230.h | 4 ++++ hw/riscv/k230.c | 19 ++++++++++++++++--- 3 files changed, 24 insertions(+), 3 deletions(-) diff --git a/docs/system/riscv/k230.rst b/docs/system/riscv/k230.rst index cea8202e55..06a819fbdb 100644 --- a/docs/system/riscv/k230.rst +++ b/docs/system/riscv/k230.rst @@ -20,12 +20,16 @@ The ``k230`` machine supports the following devices: * Platform-Level Interrupt Controller (PLIC) * 2 K230 Watchdog Timer * 5 UART +* K230 DDRC CFG and DDR PHY =20 Boot options ------------ The ``k230`` machine supports K230 SDK boot through M-mode U-Boot, which t= hen starts OpenSBI/Linux with ``bootm``. It also supports direct Linux boot. =20 +The DDRC CFG and DDR PHY models allow the K230 SDK U-Boot SPL to complete = DDR +initialization before loading the next boot stage. + K230 SDK Linux kernels use T-HEAD C9xx private MAEE page table attributes.= QEMU does not implement MAEE in the generic RISC-V MMU, so such kernels need to= be built with standard RISC-V PTE bits before they can boot under QEMU. diff --git a/include/hw/riscv/k230.h b/include/hw/riscv/k230.h index 592e1c26bf..80ca16338c 100644 --- a/include/hw/riscv/k230.h +++ b/include/hw/riscv/k230.h @@ -16,6 +16,7 @@ #define HW_K230_H =20 #include "hw/core/boards.h" +#include "hw/misc/k230_ddr.h" #include "hw/riscv/riscv_hart.h" #include "hw/watchdog/k230_wdt.h" =20 @@ -32,6 +33,8 @@ typedef struct K230SoCState { /*< public >*/ RISCVHartArrayState c908_cpu; /* Small core */ =20 + K230DDRCfgState ddr_cfg; + K230DDRPhyState ddr_phy; K230WdtState wdt[2]; MemoryRegion sram; MemoryRegion bootrom; @@ -112,6 +115,7 @@ enum { K230_DEV_SPI, K230_DEV_HI_SYS_CFG, K230_DEV_DDRC_CFG, + K230_DEV_DDR_PHY, K230_DEV_FLASH, K230_DEV_PLIC, K230_DEV_CLINT, diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c index 656f28190c..627150b463 100644 --- a/hw/riscv/k230.c +++ b/hw/riscv/k230.c @@ -97,6 +97,7 @@ static const MemMapEntry memmap[] =3D { [K230_DEV_SPI] =3D { 0x91584000, 0x00001000 }, [K230_DEV_HI_SYS_CFG] =3D { 0x91585000, 0x00000400 }, [K230_DEV_DDRC_CFG] =3D { 0x98000000, 0x02000000 }, + [K230_DEV_DDR_PHY] =3D { 0x9A000000, 0x00400000 }, [K230_DEV_FLASH] =3D { 0xC0000000, 0x08000000 }, [K230_DEV_PLIC] =3D { 0xF00000000, 0x00400000 }, [K230_DEV_CLINT] =3D { 0xF04000000, 0x00400000 }, @@ -108,6 +109,11 @@ static void k230_soc_init(Object *obj) RISCVHartArrayState *cpu0 =3D &s->c908_cpu; =20 object_initialize_child(obj, "c908-cpu", cpu0, TYPE_RISCV_HART_ARRAY); + object_initialize_child(obj, "ddr-cfg", &s->ddr_cfg, + TYPE_K230_DDR_CFG); + object_initialize_child(obj, "ddr-phy", &s->ddr_phy, + TYPE_K230_DDR_PHY); + s->ddr_cfg.phy =3D &s->ddr_phy; object_initialize_child(obj, "k230-wdt0", &s->wdt[0], TYPE_K230_WDT); object_initialize_child(obj, "k230-wdt1", &s->wdt[1], TYPE_K230_WDT); =20 @@ -158,6 +164,16 @@ static void k230_soc_realize(DeviceState *dev, Error *= *errp) int c908_cpus; =20 sysbus_realize(SYS_BUS_DEVICE(&s->c908_cpu), &error_fatal); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->ddr_cfg), errp)) { + return; + } + if (!sysbus_realize(SYS_BUS_DEVICE(&s->ddr_phy), errp)) { + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ddr_cfg), 0, + memmap[K230_DEV_DDRC_CFG].base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ddr_phy), 0, + memmap[K230_DEV_DDR_PHY].base); =20 c908_cpus =3D s->c908_cpu.num_harts; =20 @@ -361,9 +377,6 @@ static void k230_soc_realize(DeviceState *dev, Error **= errp) create_unimplemented_device("hi_sys_cfg", memmap[K230_DEV_HI_SYS_CFG].= base, memmap[K230_DEV_HI_SYS_CFG].size); =20 - create_unimplemented_device("ddrc_cfg", memmap[K230_DEV_DDRC_CFG].base, - memmap[K230_DEV_DDRC_CFG].size); - create_unimplemented_device("flash", memmap[K230_DEV_FLASH].base, memmap[K230_DEV_FLASH].size); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198170; cv=none; d=zohomail.com; s=zohoarc; b=cwQXD43ZdkEcX4G1WF3XAdKuEDTnNFgb8p0jr96IH0GPnea/HZs07I2BQZ7qoVDcveWbsz6dEQlJlRihDeAr92jdnvhx4Ko3lGXfSqym0tI8Z1sZ6HOukj6uG/YY8Tzyn6jrDcoZiH1Gp4O0NpWCXuVGe0+sIJPdrZdlQxeC8+U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198170; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=YLZW+WC6XzwXmMPSObI4jtS6Mg2Ad7TYWfRIDenp+Hw=; b=NxRVhcoXWIDFlOhrOm3DOZ0FhmEq3Oa7aSIydxJUHVc42GuxfD2yj10JVFilmEUalIXM+gVDKCaiBpaW8ZXZiJnl9MkFXPKixhCw97vtEXRsAC3GU4I99oQBXNjzWqbFcDn26VaYrarZFhkozy6nfebZ9axEyXG1hp92aPxCj1E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719817088531.718050190947224; Wed, 19 Aug 2026 20:56:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwti3-0006sZ-K8; Wed, 19 Aug 2026 23:44:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwti2-0006sO-JC for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:54 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwti0-0003bz-H4 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:54 -0400 Received: by mail-pj1-x1036.google.com with SMTP id 98e67ed59e1d1-3810c5d691bso1231755a91.1 for ; Wed, 19 Aug 2026 20:44:51 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.44.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:44:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197490; x=1787802290; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=YLZW+WC6XzwXmMPSObI4jtS6Mg2Ad7TYWfRIDenp+Hw=; b=K274oJ2nS9wqC8IPZFeCvSuXEMzxv5j0JeGyRGeflMvQBKDo5fT71foCxcf3AkRKE6 aht+IYp8QEkhi8GxvirMdY0GvKf4UOqoBe6l+AfYgh8NKPQ5Q5W9gWjWqn4hCevWp+cG FVnC1Am1/X6iSO2RT1qZVUnJmHua56UJACKYlULLOVBOu6GgleEhegNh0isZzIdQE0jw lgBuLDe4B/iJ3kWWisN0nY6alqAkTJyt8inSvpZrLDnKrg7Fx03pttFHiXTKdQN8F+Sg mejG0iBT28JcF49oySWcoBTHvsGzo8gT1OCtW2WN3CFWJuG+DZ2Ocnw2IjZ/0Gz4qvw9 PyvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197490; x=1787802290; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=YLZW+WC6XzwXmMPSObI4jtS6Mg2Ad7TYWfRIDenp+Hw=; b=hTP/Ub2IwB0gyrGl66eklHSvlWxFc25oKUz8P66X7sOT3uPCfxacCiEJ2SKp1CcmVN w1SYcKAbjZPHMpetPCwZl9q1Dr1O4JziRnaXtOE3EH1JaI4IF9lthn01XzhLzEGF4X2B eJkAjTKclml/VnFbHTEf+USC2DR8iWynVmyLeD7BqKGFfKAegyzt9RxmKylEYiaVNyhr vnYldoz0gsKiTUksxl/A2zC34sXrGKbN3gUl8M3S5cwXRQpX1A0yvjRycnWyZuwoWqGF hrDrKc18GI98kC7edjHWLrQglhTjEyokWbX2Ez5itqCX0zth2YcHIWM6Dj54g6PSGzwM XKTw== X-Gm-Message-State: AFuF++mVIBOv/BWDtF+EYd6/ukZqvwBswR3iSrruv+SGi107lMgRGSB7 +GNZmDFN6Ty/YBCd4EoADZophBpBnZ1lfpgrJHQcAbEnEE3nZOhujXZdtVLdOA== X-Gm-Gg: AR+sD11Q3AF9Xk3cHRtJ2qu5qIdCWzaiXsaqan1HH9+AOGdC+v8LA5q6yPJXclmN0x9 DV7jUDnMpC3wiEFNwOXcw/LhPTwsEybKZpsEXH2nXeNCwfIV2F9qQeowBcRLHPgiYjbdTKelk8+ qPDlQ32wGX8D3S1kvjfUhNzWaRrG+vIA39FPpDzqVp9sBJf0XS20f5zr8wMOW0prX7vfuq3iEY4 tocaCvum0B1rSwrxGVeSVp1COx4Fy5pi7DRxZLTD8vr+mOTWVYxCaL8as/K+hbJIz1ck0LrIRqR 1nYHUGCvN9+UZ/7bfEzFz1AWSDPnFB+rL90WSQlTT2MOwLmerRGV3WL0oKoGCjcNTfeibWU9Nyv mtQiom9s67MAe7LhPxcyif+gA2CVUXOtUC1tZbv7EMKgzOnCWes7fmA+dLBofraLNRbZ6QhiWJt BixPcI9rpeVNXT+lQ3maHGe5X4rX6D5aAt2fg3YzLx0tNIqjiUuSzpBNknSeV4QEvMO+lA2onxu YQetg== X-Received: by 2002:a17:90b:4d81:b0:37d:f206:a2ac with SMTP id 98e67ed59e1d1-39580a7c832mr17918754a91.7.1787197490223; Wed, 19 Aug 2026 20:44:50 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Junze Cao , Daniel Henrique Barboza , Chao Liu , Alistair Francis Subject: [PULL 03/93] tests/qtest: Add K230 DDR controller tests Date: Thu, 20 Aug 2026 13:43:00 +1000 Message-ID: <20260820034430.1186695-4-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1036.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198171932158500 Content-Type: text/plain; charset="utf-8" From: Junze Cao Add qtests for DDRC and PHY reset values, register access policy, the software-update handshake, and PHY register ownership. Exercise PHY training and mailbox acknowledgement through the DFI initialization sequence. Include negative coverage to ensure DFI cannot complete before PHY training or enter Normal mode before completion is enabled. Reviewed-by: Daniel Henrique Barboza Suggested-by: Chao Liu Signed-off-by: Junze Cao Message-ID: <20260807-k230-ddr-v2-v2-3-c531308ae819@gmail.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 1 + tests/qtest/k230-ddr-test.c | 226 ++++++++++++++++++++++++++++++++++++ tests/qtest/meson.build | 3 +- 3 files changed, 229 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/k230-ddr-test.c diff --git a/MAINTAINERS b/MAINTAINERS index b957fa74d9..b6fb59fdf5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1850,6 +1850,7 @@ F: include/hw/misc/k230_ddr.h F: include/hw/riscv/k230.h F: include/hw/watchdog/k230_wdt.h F: tests/functional/riscv64/test_k230.py +F: tests/qtest/k230-ddr-test.c F: tests/qtest/k230-wdt-test.c =20 RX Machines diff --git a/tests/qtest/k230-ddr-test.c b/tests/qtest/k230-ddr-test.c new file mode 100644 index 0000000000..72362929bc --- /dev/null +++ b/tests/qtest/k230-ddr-test.c @@ -0,0 +1,226 @@ +/* + * QTest testcase for the K230 DDR controller and PHY + * + * Exercises register access, reset, PHY ownership, training mailbox, and = DFI + * initialization. + * + * Copyright (c) 2026 Junze Cao + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "libqtest.h" + +#define K230_DDRC_BASE UINT64_C(0x98000000) +#define K230_DDR_PHY_BASE UINT64_C(0x9a000000) + +#define K230_DDRC_MSTR 0x000 +#define K230_DDRC_STAT 0x004 +#define K230_DDRC_DRAMTMG4 0x110 +#define K230_DDRC_DFIMISC 0x1b0 +#define K230_DDRC_DFISTAT 0x1bc +#define K230_DDRC_SWCTL 0x320 +#define K230_DDRC_SWSTAT 0x324 + +#define K230_DDRC_STAT_OPERATING_MODE_MASK 0x7 +#define K230_DDRC_DFISTAT_DFI_INIT_COMPLETE_MASK 0x1 + +#define K230_DDR_PHY_CSR(index) \ + (K230_DDR_PHY_BASE + (uint64_t)(index) * sizeof(uint32_t)) + +#define K230_DDR_PHY_ATX_IMPEDANCE 0x00043 +#define K230_DDR_PHY_TX_IMPEDANCE_CTRL1 0x10049 +#define K230_DDR_PHY_VREF_IN_GLOBAL 0x200b2 +#define K230_DDR_PHY_MICRO_CONT_MUX_SEL 0xd0000 +#define K230_DDR_PHY_TRAINING_STATUS 0xd0004 +#define K230_DDR_PHY_TRAINING_ACK 0xd0031 +#define K230_DDR_PHY_TRAINING_MESSAGE 0xd0032 +#define K230_DDR_PHY_TRAINING_TRIGGER 0xd0099 + +static void complete_phy_training(QTestState *qts) +{ + qtest_writel(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_MICRO_CONT_MUX_SEL), 1); + qtest_writel(qts, K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_TRIGGER), 9); + qtest_writel(qts, K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_TRIGGER), 1); + qtest_writel(qts, K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_TRIGGER), 0); +} + +static void test_reset_and_register_access(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_MSTR), + =3D=3D, 0x01040000); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_STAT), + =3D=3D, 0x00000000); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_DRAMTMG4), + =3D=3D, 0x05040405); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_DFIMISC), + =3D=3D, 0x00000001); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_SWCTL), + =3D=3D, 0x00000001); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_SWSTAT), + =3D=3D, 0x00000001); + + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_ATX_IMPEDANCE)), + =3D=3D, 0x03ff); + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_TX_IMPEDANCE_CTRL1)), + =3D=3D, 0x0fff); + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_VREF_IN_GLOBAL)), + =3D=3D, 0x0200); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_MSTR, 0x01040008); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_MSTR), + =3D=3D, 0x01040008); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_STAT, 0xffffffff); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_STAT), + =3D=3D, 0x00000000); + + qtest_writel(qts, K230_DDR_PHY_CSR(K230_DDR_PHY_VREF_IN_GLOBAL), + 0xffffffff); + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_VREF_IN_GLOBAL)), + =3D=3D, 0x7fff); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_DRAMTMG4, 0); + + qtest_system_reset(qts); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_MSTR), + =3D=3D, 0x01040000); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_DRAMTMG4), + =3D=3D, 0x05040405); + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_VREF_IN_GLOBAL)), + =3D=3D, 0x0200); + + qtest_quit(qts); +} + +static void test_software_update_handshake(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_SWCTL, 0); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_SWSTAT), + =3D=3D, 0); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_SWCTL, 1); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_SWSTAT), + =3D=3D, 1); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_SWSTAT, 0); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_SWSTAT), + =3D=3D, 1); + + qtest_quit(qts); +} + +static void test_phy_ownership(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + uint64_t atx =3D K230_DDR_PHY_CSR(K230_DDR_PHY_ATX_IMPEDANCE); + uint64_t mux =3D K230_DDR_PHY_CSR(K230_DDR_PHY_MICRO_CONT_MUX_SEL); + + qtest_writel(qts, atx, 0x155); + g_assert_cmphex(qtest_readl(qts, atx), =3D=3D, 0x155); + + qtest_writel(qts, mux, 1); + qtest_writel(qts, atx, 0x2aa); + g_assert_cmphex(qtest_readl(qts, atx), =3D=3D, 0x155); + + qtest_writel(qts, mux, 0); + qtest_writel(qts, atx, 0x2aa); + g_assert_cmphex(qtest_readl(qts, atx), =3D=3D, 0x2aa); + + qtest_quit(qts); +} + +static void test_dfi_prerequisites(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_DFIMISC, 0x20); + + g_assert_cmphex(qtest_readl(qts, + K230_DDRC_BASE + K230_DDRC_DFISTAT) & + K230_DDRC_DFISTAT_DFI_INIT_COMPLETE_MASK, + =3D=3D, 0); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_STAT) & + K230_DDRC_STAT_OPERATING_MODE_MASK, + =3D=3D, 0); + + qtest_quit(qts); +} + +static void test_dfi_complete_enable(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + complete_phy_training(qts); + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_DFIMISC, 0x20); + + g_assert_cmphex(qtest_readl(qts, + K230_DDRC_BASE + K230_DDRC_DFISTAT) & + K230_DDRC_DFISTAT_DFI_INIT_COMPLETE_MASK, + =3D=3D, 1); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_STAT) & + K230_DDRC_STAT_OPERATING_MODE_MASK, + =3D=3D, 0); + + qtest_quit(qts); +} + +static void test_training_and_dfi_handshake(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + complete_phy_training(qts); + + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_STATUS)), + =3D=3D, 0); + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_MESSAGE)), + =3D=3D, 0x07); + + qtest_writel(qts, K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_ACK), 0); + g_assert_cmphex(qtest_readl(qts, + K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_STATUS)), + =3D=3D, 1); + qtest_writel(qts, K230_DDR_PHY_CSR(K230_DDR_PHY_TRAINING_ACK), 1); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_DFIMISC, 0x20); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_DFISTAT), + =3D=3D, 1); + + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_DFIMISC, 0); + qtest_writel(qts, K230_DDRC_BASE + K230_DDRC_DFIMISC, 1); + g_assert_cmphex(qtest_readl(qts, K230_DDRC_BASE + K230_DDRC_STAT) & 0x= 7, + =3D=3D, 1); + + qtest_quit(qts); +} + +int main(int argc, char **argv) +{ + g_test_init(&argc, &argv, NULL); + + qtest_add_func("/k230-ddr/reset-and-register-access", + test_reset_and_register_access); + qtest_add_func("/k230-ddr/software-update-handshake", + test_software_update_handshake); + qtest_add_func("/k230-ddr/phy-ownership", test_phy_ownership); + qtest_add_func("/k230-ddr/dfi-prerequisites", test_dfi_prerequisites); + qtest_add_func("/k230-ddr/dfi-complete-enable", + test_dfi_complete_enable); + qtest_add_func("/k230-ddr/training-and-dfi-handshake", + test_training_and_dfi_handshake); + + return g_test_run(); +} diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index f7c7d06620..49b654036a 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -297,7 +297,8 @@ qtests_riscv64 =3D ['riscv-csr-test'] + \ (config_all_devices.has_key('CONFIG_IOMMU_TESTDEV') and config_all_devices.has_key('CONFIG_RISCV_IOMMU') ? ['iommu-riscv-test'] : []) + \ - (config_all_devices.has_key('CONFIG_K230') ? ['k230-wdt-test'] : []) + (config_all_devices.has_key('CONFIG_K230') ? + ['k230-ddr-test', 'k230-wdt-test'] : []) =20 qtests_hexagon =3D ['boot-serial-test', 'l2vic-test', 'qct-qtimer-test'] =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198306; cv=none; d=zohomail.com; s=zohoarc; b=lDabsugf0DkKBINuBKnQoE4NSEWsghKeh3kI56XYK7qOLyH4KAbQQ6Rv93dXG9jeZesx5JQYqHxtQ0rVaAIrsbVhGQjQDLcRSgDbPpp8CjjQEbUclivFBhmloevKvOkzkEeliux6XC5AXxitAZnGjjf/rPO8j91MPvlOmPuF0PM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198306; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KUPc+7xlIMFvbQpIIY3o0TpfZjkwNXRng4YhTZLGtEc=; b=CM96qovvOkc+d2jXvopwLnr1VwNpdCeXX4Vo2p9kdvtnxrUqsmTV3WYZ2PL0vAUDQF++6/rmRsv6Qo7eIw7PsnFoMRruQm1aoMMG4wY/CkjD2Zrstr7ob9J2sgRDMuyyxqusf6s0fb1eRYMKFnh9SEE1fsvivQ4Nx4KatA7adtA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198306235246.26264147728523; Wed, 19 Aug 2026 20:58:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwti6-0006t9-Ob; Wed, 19 Aug 2026 23:44:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwti4-0006sf-J5 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:56 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwti2-0003c9-NE for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:44:56 -0400 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-2ccf2360620so13002955ad.3 for ; Wed, 19 Aug 2026 20:44:54 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.44.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:44:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197493; x=1787802293; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=KUPc+7xlIMFvbQpIIY3o0TpfZjkwNXRng4YhTZLGtEc=; b=PtwUFpkNUkNTSoo0FA97OilU93WDeL2bMbtxsJZhqVpzLhTBhCg27RUw7VY55NbFcM E89CPCllKtbDKPPkouci8hYdrGsTEbYQGxR3eTscQQjoodECG1ZqsibAc41OxWAk0XE9 gQbzJUWAI6ZApcZORP56q/THXiZJUnZLBfuxg5sJxc1ICqrdbnl2GYW7/lmu47qSGkPt 2fs1ralpLQNyvJ5W5wWHuKlv8hW3hdmBsyb7zR/aVO1dhkzscGICXEnGiQrEF+Nk4T3C VXMjB03YG3A5tGKK9kwJcs28+X9SvW9qboKCm9qNHOLSzco+JC+b71aNuQCVPm4WcA2o CvSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197493; x=1787802293; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=KUPc+7xlIMFvbQpIIY3o0TpfZjkwNXRng4YhTZLGtEc=; b=J5l0JGyn5aWU8X9AE7BMKAMRnET39016gZjZcy2HobklK0Pss3O40KTPOjySntkVd5 WEA2vxpyUzxgijPqIsF7vCJWhxlSk0EPGiu8ye2NO/FcGAh1Kz7hBXx1vMp6yxasTRJ/ fMZssCxYVHIGv2MXDqGWs6QdTiTUSn4zEd8S+58mZjxp4Cjt0XxwddjQx8qkIHl0pMNd 0ggEfZBTDbrm4mbMspX+mIdyjTebAtzYBQHBs7wwqB6drz/cMVFlezXnbIBKbRkJLocV 63/kFhnO8gd7OXf7PImFIco0UKVlZakPJYEpYFSYZtxSYMBSuUJCswQKjH2h+MLwp6jh WaUQ== X-Gm-Message-State: AFuF++nLWtDdmhOlPdknUCBR3qvgkdotBO63iT6gIYzzyCYo8ziktbSo oweGK0NMs28yyWzANyCwPHfv+ehLPW2ZVHVo3LiOEKtJL8llWbXYbU9AsWJuAg== X-Gm-Gg: AR+sD10BVRc42pOdEAherbxLnmrAcxDQO8B+OpJ37QSzP90BBg4d7tPEPjNZOmTykCT iwfp7PYQ+6YBnpahlbVuFpI3DqOzSxDgV6Kno0/Ei33z0TQoLNN9NxYGPGsUoLVE9R5kS4+UvXe bvk2YHDIY1FTqczifxRchXexNGvZUk/Hjc0uAhL7Nwy2edTbdF6xBWBP7Ks/A7YH8LT9I4518mH PB8J1HwUYOhUoEY2NdeaOEwbrswa8LJqHfznI70ntLMExRTW4lm+0nqfpKohqcM12hwJhjfgodB O8HzSiBoCfuqt1n4QiTplZZpOd00VKid7L8H9YGq21Zd7048AQi2K6oHNEx+EL+j9d3CsVQczlq IIKQmke1fqH0K8gozaZA+5cd5DqqgnsIDr79h+wu3uSrc4t9mARY8t2h8nhLBHvrBU0rRtq0IIz A7ZEoleVT1vaR0ZZztZn6iOPcgVgBpssKFLsAj4xb11+a9/ziWzwu2EAM/FClWMn3xWxDftXgMu 6mxSg== X-Received: by 2002:a17:90b:4488:b0:38e:250b:122f with SMTP id 98e67ed59e1d1-395810f21dbmr16496045a91.16.1787197493202; Wed, 19 Aug 2026 20:44:53 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Yanfeng Liu , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 04/93] riscv/virt: Add optional UART1 Date: Thu, 20 Aug 2026 13:43:01 +1000 Message-ID: <20260820034430.1186695-5-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=alistair23@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198308469158500 From: Yanfeng Liu This adds optional UART1 to RiscV virt board if required at runtime to simplify multicore development. Note that UART0 remains default serial_hd(0) and it is: - the lowest address UART - first serial in DTB - behind /aliases/serial0 in DTB - the /chosen/stdout-path in DTB Note that UART1 is placed at different page from UART0 to support page level isolation. Signed-off-by: Yanfeng Liu Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: Signed-off-by: Alistair Francis --- docs/system/riscv/virt.rst | 5 ++++- include/hw/riscv/virt.h | 3 +++ hw/riscv/virt-acpi-build.c | 12 ++++++++---- hw/riscv/virt.c | 40 ++++++++++++++++++++++++++++---------- 4 files changed, 45 insertions(+), 15 deletions(-) diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst index 60850970ce..3c87246891 100644 --- a/docs/system/riscv/virt.rst +++ b/docs/system/riscv/virt.rst @@ -16,7 +16,7 @@ The ``virt`` machine supports the following devices: * Core Local Interruptor (CLINT) * Platform-Level Interrupt Controller (PLIC) * CFI parallel NOR flash memory -* 1 NS16550 compatible UART +* Either 1 or 2 NS16550 compatible UARTs * 1 Google Goldfish RTC * 1 SiFive Test device * 8 virtio-mmio transport devices @@ -27,6 +27,9 @@ The hypervisor extension has been enabled for the default= CPU, so virtual machines with hypervisor extension can simply be used without explicitly declaring. =20 +The second UART only exists if a backend is configured explicitly (e.g. +with a second ``-serial`` command line option). + Hardware configuration information ---------------------------------- =20 diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 36a2def410..7c862b0da2 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -59,6 +59,7 @@ struct RISCVVirtState { int aia_guests; char *oem_id; char *oem_table_id; + bool uart1_present; OnOffAuto acpi; const MemMapEntry *memmap; struct GPEXHost *gpex_host; @@ -79,6 +80,7 @@ enum { VIRT_APLIC_S, VIRT_UART0, VIRT_VIRTIO, + VIRT_UART1, VIRT_FW_CFG, VIRT_IMSIC_M, VIRT_IMSIC_S, @@ -94,6 +96,7 @@ enum { enum { UART0_IRQ =3D 10, RTC_IRQ =3D 11, + UART1_IRQ =3D 12, VIRTIO_IRQ =3D 1, /* 1 to 8 */ VIRTIO_COUNT =3D 8, PCIE_IRQ =3D 0x20, /* 32 to 35 */ diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 59c454f4f9..8e516ec114 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -177,11 +177,11 @@ static void acpi_dsdt_add_plic_aplic(Aml *scope, uint= 8_t socket_count, =20 static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap, - uint32_t uart_irq) + uint32_t uart_irq, int uartidx) { - Aml *dev =3D aml_device("COM0"); + Aml *dev =3D aml_device("COM%d", uartidx); aml_append(dev, aml_name_decl("_HID", aml_string("RSCV0003"))); - aml_append(dev, aml_name_decl("_UID", aml_int(0))); + aml_append(dev, aml_name_decl("_UID", aml_int(uartidx))); =20 Aml *crs =3D aml_resource_template(); aml_append(crs, aml_memory32_fixed(uart_memmap->base, @@ -490,7 +490,11 @@ static void build_dsdt(GArray *table_data, memmap[VIRT_APLIC_S].size, "RSCV0002"); } =20 - acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], UART0_IRQ); + acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], UART0_IRQ, 0); + if (s->uart1_present) { + acpi_dsdt_add_uart(scope, &memmap[VIRT_UART1], UART1_IRQ, 1); + } + if (virt_is_iommu_sys_enabled(s)) { acpi_dsdt_add_iommu_sys(scope, &memmap[VIRT_IOMMU_SYS], IOMMU_SYS_= IRQ); } diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 51bac47a91..d58656f70d 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -97,6 +97,8 @@ static const MemMapEntry virt_memmap[] =3D { [VIRT_APLIC_S] =3D { 0xd000000, APLIC_SIZE(VIRT_CPUS_MAX) }, [VIRT_UART0] =3D { 0x10000000, 0x100 }, [VIRT_VIRTIO] =3D { 0x10001000, 0x1000 }, + /* UART1 supports page isolation from UART0 */ + [VIRT_UART1] =3D { 0x1000a000, 0x100 }, [VIRT_FW_CFG] =3D { 0x10100000, 0x18 }, [VIRT_FLASH] =3D { 0x20000000, 0x4000000 }, [VIRT_IMSIC_M] =3D { 0x24000000, VIRT_IMSIC_MAX_SIZE }, @@ -187,7 +189,8 @@ static void create_pcie_irq_map(RISCVVirtState *s, void= *fdt, char *nodename, FDT_MAX_INT_MAP_WIDTH] =3D {}; uint32_t *irq_map =3D full_irq_map; =20 - /* This code creates a standard swizzle of interrupts such that + /* + * This code creates a standard swizzle of interrupts such that * each device's first interrupt is based on it's PCI_SLOT number. * (See pci_swizzle_map_irq_fn()) * @@ -805,28 +808,38 @@ static void create_fdt_reset(RISCVVirtState *s, uint3= 2_t *phandle) } =20 static void create_fdt_uart(RISCVVirtState *s, - uint32_t irq_mmio_phandle) + uint32_t irq_mmio_phandle, int memId, int irqN= o) { g_autofree char *name =3D NULL; MachineState *ms =3D MACHINE(s); =20 name =3D g_strdup_printf("/soc/serial@%"HWADDR_PRIx, - s->memmap[VIRT_UART0].base); + s->memmap[memId].base); qemu_fdt_add_subnode(ms->fdt, name); qemu_fdt_setprop_string(ms->fdt, name, "compatible", "ns16550a"); qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg", - 2, s->memmap[VIRT_UART0].base, - 2, s->memmap[VIRT_UART0].size); + 2, s->memmap[memId].base, + 2, s->memmap[memId].size); qemu_fdt_setprop_cell(ms->fdt, name, "clock-frequency", 3686400); qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_phan= dle); if (s->aia_type =3D=3D VIRT_AIA_TYPE_NONE) { - qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", UART0_IRQ); + qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", irqNo); } else { - qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", UART0_IRQ, 0x4= ); + qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", irqNo, 0x4); + } + + if (VIRT_UART0 =3D=3D memId) { + qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", name); + qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name); } +} =20 - qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", name); - qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name); +static void create_fdt_uarts(RISCVVirtState *s, uint32_t irq_mmio_phandle) +{ + if (s->uart1_present) { + create_fdt_uart(s, irq_mmio_phandle, VIRT_UART1, UART1_IRQ); + } + create_fdt_uart(s, irq_mmio_phandle, VIRT_UART0, UART0_IRQ); } =20 static void create_fdt_rtc(RISCVVirtState *s, @@ -996,7 +1009,7 @@ static void finalize_fdt(RISCVVirtState *s) =20 create_fdt_reset(s, &phandle); =20 - create_fdt_uart(s, irq_mmio_phandle); + create_fdt_uarts(s, irq_mmio_phandle); =20 create_fdt_rtc(s, irq_mmio_phandle); } @@ -1486,6 +1499,13 @@ static void virt_machine_init(MachineState *machine) 0, qdev_get_gpio_in(mmio_irqchip, UART0_IRQ), 399193, serial_hd(0), DEVICE_LITTLE_ENDIAN); =20 + if (serial_hd(1)) { + serial_mm_init(system_memory, s->memmap[VIRT_UART1].base, + 0, qdev_get_gpio_in(mmio_irqchip, UART1_IRQ), 399193, + serial_hd(1), DEVICE_LITTLE_ENDIAN); + s->uart1_present =3D true; + } + sysbus_create_simple("goldfish_rtc", s->memmap[VIRT_RTC].base, qdev_get_gpio_in(mmio_irqchip, RTC_IRQ)); =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197754; cv=none; d=zohomail.com; s=zohoarc; b=M/BBly7QMXJx9ZWkzevyBowbldyTUj80oSxb3UW7vQzoc+NkePoazKawVAAks4gY9ng+TDf55/R0BIVp1q7TVDsjvj7cWZNjlEVA1gE2UeMJu4MOrGDsjityeVAL8jj7juHpkaD+XFzCi8cESPV0pdSyMxr7pYI2Rp841UPwync= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197754; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=cAsQbUhalIuGGPP+DHSK6ZTEMK5HgLqVKIyTj8mnqAg=; b=nhfAZdmHPSI/zzxXWVenntinq4hUSoKrOdTV5Qpn82P9konPdsv/VsvGWRjpE8WVBcLPFF3mY0qwMhLP58jHZeP28C6avD7cNRfJOCVSs8rBAA4GQTDBuLjlxqkQfZdEfeQUKyxf/kPV13aBfUxiKTYIc+FOy5/H2pyfl6z+o4w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197754675487.19387202115854; Wed, 19 Aug 2026 20:49:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiC-0006uU-53; Wed, 19 Aug 2026 23:45:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiA-0006tp-FX for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:02 -0400 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwti6-0003cT-Nf for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:01 -0400 Received: by mail-pg1-x52f.google.com with SMTP id 41be03b00d2f7-cbee3777e1cso854733a12.3 for ; Wed, 19 Aug 2026 20:44:58 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.44.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:44:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197497; x=1787802297; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=cAsQbUhalIuGGPP+DHSK6ZTEMK5HgLqVKIyTj8mnqAg=; b=XfMxEaKSgC1g/9y8BiBbw3Gn/pLTrHQTI0PL9r8NgmXQj54MuboT8o47+nK70/4YCF szynAS//LI06NUwKqlHIAsgNB466aKYN1seVJlxlFkBA4/Nvsjo6AN86neQxE7O09dJZ 5pu+Za9bi35DMIJVUfXH8knEuNZBQeILtdiyHioBX4IfUVtl/Stu4mru6Gpp1T8aZqwg jtBW9UTnFMicxyR2yPpE2f9Lskm5iCjhxapEfBc019qIi+Wjr6Uilv7ecf5T0nFyeGxi P4Jq7+4rnbaLHP5Z+vbhJjdyKN8+tOz2ueGUom+NN3VknQuiQKqy3uKXF2z9rqBJz4Wa /omg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197497; x=1787802297; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=cAsQbUhalIuGGPP+DHSK6ZTEMK5HgLqVKIyTj8mnqAg=; b=Gy0/5pZUVB5APfes4/oKk4J/2yzPOyuVAgtmHRWaXK75EJ8nRhS9eqZ0iCSnGb+hfW SFexGq26yEwWrP/lw5qd5xOAFpsVWkKVViZdhS3N7V4iR+i5bqpyNTrlbCjSxXlhtfxe RDEYR6KtSbB5u9udXm5IYRMS3wAqdf/+CSpRxsXJiQwGHPLkSEY2rxTnSYy63P+hoNjp aprTxbDSvgnzSiYTPRIjDb7IigKDvwpt0Zy1WkSBOI4498GJvwzHWq3nXR9gaJOiLT9Z 8QjcJtqp7wJGBaEM/iXUZ48DzcREZS58/RgWxfe9XlKsCWeeGLwJ4zgYMjdQLR5NdUFA Yocw== X-Gm-Message-State: AOJu0YxvMFymVzqbUUVLjQd8QQv1QUC/F93zIAR/B02yd/TCVoNTYrB0 do7E7v72mbZckhlwTOFNT3X9u9W41ay/8MmYdTY514T3nzZA+kLXxvrxEVO/8g== X-Gm-Gg: AR+sD11se42Qnl1C2e/Rk0CznIeGqxj+T5qJJC5B/xSbOXPMeMhc9EDD4cakug6Uqb5 tbSFUAt4YlFyZAmNV0lFXZBgF3SFMIWfVvS+yyc2oZ+kN8U1A7L219gw3dFQDOTe7oHqSGpipdX yxfk+TWfYXeOobgUr6aKItu3xfrISlA8WKZQDD21i3/hWWE7wIWCFSG7KNlE37S9QhFFna+YFoh geZbGQg+MrNdX/qaUwvmgNg/qnrzKtsvgZvYA0USMkVxXcowpXpZK1zbiKdZPMN3Je4Pl51U4Uf lQW47YuJf0LeGYrsnEZccNRpLLjZiWubL9L1VlnTt8tPE9Rg3jaBEJ2A67FuCIju6RiylOZEh/K KaQiHMkKyx+/971hrrJdiCnGsuNChuGK6IYkfVNKQP8VEhuxebrauQnJCUPygGM6PSvOs2wRRXd Jn6H/bw4UVNCCKj/53NzOk3qXjNas9wJ9wxrkKTdzeyq+3Z9vB3Tlg3ZR1gi/YJqOuX7hh9FAs9 JTIuQ== X-Received: by 2002:a05:6a20:3ca2:b0:3c0:eeb7:28b with SMTP id adf61e73a8af0-3cd0109b883mr15628836637.8.1787197497136; Wed, 19 Aug 2026 20:44:57 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Tao Ding , Chao Liu , Daniel Henrique Barboza , Junze Cao , Alistair Francis Subject: [PULL 05/93] hw/dma: add K230 gsdma Date: Thu, 20 Aug 2026 13:43:02 +1000 Message-ID: <20260820034430.1186695-6-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197756739158500 Content-Type: text/plain; charset="utf-8" From: Tao Ding K230 GSDMA includes SDMA (System Direct Memory Access) and GDMA (Graphic Di= rect Memory Access). In this patch, add SDMA for k230 board. The following features have not bee= n implemented: 1. axi protocol related 2. channel arbitration 3. lower power mode SDMA supports transfer data between memory, in which case SDMA is the contr= oller. It also supports transfer data to decomp_gzip and caching it through SRAM. In this case, decomp_gzip is the controller, which controls SDMA through ha= ndshake signals. According to "K230 Technical Reference Manual v0.3.1" section 2.5.2. https://download.kendryte.com/developer/k230/HDK/K230%E7%A1%AC%E4%BB%B6%E6%= 96%87%E6%A1%A3/K230_Technical_Reference_Manual_V0.3.1_20241118.pdf This commit includes: - K230 SDMA (System Direct Memory Access) model (k230_gsdma.c, k230_gsdma.h) - GSDMA trace log (trace-events) - Kconfig and meson.build - update MAINTAINERS Signed-off-by: Tao Ding Reviewed-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Reviewed-by: Junze Cao Message-ID: <20260808062227.66961-2-dingtao0430@163.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 2 + include/hw/dma/k230_gsdma.h | 130 +++++++++ hw/dma/k230_gsdma.c | 551 ++++++++++++++++++++++++++++++++++++ hw/dma/Kconfig | 3 + hw/dma/meson.build | 1 + hw/dma/trace-events | 6 + 6 files changed, 693 insertions(+) create mode 100644 include/hw/dma/k230_gsdma.h create mode 100644 hw/dma/k230_gsdma.c diff --git a/MAINTAINERS b/MAINTAINERS index b6fb59fdf5..8d312e1fe5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1846,9 +1846,11 @@ F: docs/system/riscv/k230.rst F: hw/misc/k230_ddr.c F: hw/riscv/k230.c F: hw/watchdog/k230_wdt.c +F: hw/dma/k230_gsdma.c F: include/hw/misc/k230_ddr.h F: include/hw/riscv/k230.h F: include/hw/watchdog/k230_wdt.h +F: include/hw/dma/k230_gsdma.h F: tests/functional/riscv64/test_k230.py F: tests/qtest/k230-ddr-test.c F: tests/qtest/k230-wdt-test.c diff --git a/include/hw/dma/k230_gsdma.h b/include/hw/dma/k230_gsdma.h new file mode 100644 index 0000000000..629cce29f8 --- /dev/null +++ b/include/hw/dma/k230_gsdma.h @@ -0,0 +1,130 @@ +/* + * K230 GSDMA + * + * Copyright (c) 2026 Tao Ding + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_DMA_K230_GSDMA_H +#define HW_DMA_K230_GSDMA_H + +#include "hw/core/sysbus.h" + +#define TYPE_K230_GSDMA "riscv.k230.gsdma" +OBJECT_DECLARE_SIMPLE_TYPE(K230GSDMAState, K230_GSDMA) + +#define K230_GSDMA_MMIO_SIZE 0x4000 +#define K230_GSDMA_NUM_SDMA_CHANNELS 4 + +#define K230_GSDMA_CH_STRIDE 0x30 +#define K230_GSDMA_CH_BASE 0x50 + +/* K230 SDMA request input */ +enum { + K230_GSDMA_GPIO_DECOMP_CTRL_EN, + K230_GSDMA_GPIO_DMA_WRITE_REQ, + K230_GSDMA_GPIO_DMA_READ_REQ, + K230_GSDMA_NUM_GPIOS_IN, +}; + +/* K230 SDMA ACK output */ +enum { + K230_GSDMA_GPIO_DMA_WRITE_ACK, + K230_GSDMA_GPIO_DMA_READ_ACK, + K230_GSDMA_NUM_GPIOS_OUT, +}; + +/* K230 GSDMA Registers Map */ +#define K230_GSDMA_DMA_CH_EN 0x00 +#define K230_GSDMA_DMA_INT_MASK 0x04 +#define K230_GSDMA_DMA_INT_STAT 0x08 +#define K230_GSDMA_DMA_CFG 0x0c +#define K230_GSDMA_GDMA_CTRL 0x10 +#define K230_GSDMA_GDMA_LLI_BASE 0x14 +#define K230_GSDMA_GDMA_CH_CNT0 0x18 +#define K230_GSDMA_GDMA_CH_CNT_LAST 0x34 +#define K230_GSDMA_GDMA_CURRENT_LLT 0x38 +#define K230_GSDMA_DMA_WEIGHT 0x48 + +/* K230 GSDMA SDMA Channel Register Map */ +#define K230_GSDMA_CH_CTL 0x00 +#define K230_GSDMA_CH_STATUS 0x04 +#define K230_GSDMA_CH_CFG 0x08 +#define K230_GSDMA_CH_USR_DATA 0x0c +#define K230_GSDMA_CH_LLT_SADDR 0x10 +#define K230_GSDMA_CH_CURRENT_LLT 0x14 + +/* K230 SDMA Control bit */ +#define K230_GSDMA_CTL_START BIT(0) +#define K230_GSDMA_CTL_STOP BIT(1) +#define K230_GSDMA_CTL_RESUME BIT(2) + +/* K230 SDMA States bit */ +#define K230_GSDMA_SDMA_STATUS_BUSY BIT(0) +#define K230_GSDMA_SDMA_STATUS_PAUSE BIT(1) + +/* K230 SDMA Interrupt bit */ +#define K230_GSDMA_SDMA_DONE_INT(ch) BIT(ch) +#define K230_GSDMA_SDMA_ITEM_INT(ch) BIT((ch) + 4) +#define K230_GSDMA_SDMA_PAUSE_INT(ch) BIT((ch) + 8) + + +#define K230_GSDMA_DMA_CH_EN_MASK MAKE_64BIT_MASK(0, 5) +#define K230_GSDMA_DMA_CFG_RESET 0x000007ff + +/* K230 SDMA Linked List bit */ +#define K230_GSDMA_LLT_2D_MODE BIT(28) +#define K230_GSDMA_LLT_PAUSE BIT(29) +#define K230_GSDMA_LLT_NODE_INTR BIT(30) +#define K230_GSDMA_GDMA_LLT_GCH_SHIFT 16 +#define K230_GSDMA_GDMA_LLT_GCH_MASK 0x7 +#define K230_GSDMA_CH_CFG_DAT_MODE BIT(0) +#define K230_GSDMA_CH_CFG_USR_DATA_SIZE_SHIFT 1 +#define K230_GSDMA_CH_CFG_USR_DATA_SIZE_MASK 0x3 +#define K230_GSDMA_CH_CFG_DAT_ENDIAN_SHIFT 4 +#define K230_GSDMA_CH_CFG_DAT_ENDIAN_MASK 0x3 +#define K230_GSDMA_CH_CFG_SRC_FIXED BIT(8) +#define K230_GSDMA_CH_CFG_DST_FIXED BIT(9) +#define K230_GSDMA_CH0_CFG_DECOMP_CTRL_EN BIT(10) + +/* K230 SDMA channel state */ +typedef struct K230GSDMAChannel { + uint32_t ctl; + uint32_t status; + uint32_t cfg; + uint32_t usr_data; + uint32_t llt_saddr; + uint32_t current_llt; + uint32_t next_llt; + bool started; +} K230GSDMAChannel; + +/* K230 SDMA Linked List */ +typedef struct K230GSDMALLT { + uint32_t cfg; + uint32_t src_addr; + uint32_t line_size; + uint32_t line_cfg; + uint32_t dst_addr; + uint32_t next_llt_addr; +} K230GSDMALLT; + +/* K230 GSDMA state */ +struct K230GSDMAState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + qemu_irq irq; + qemu_irq handshake_out[K230_GSDMA_NUM_GPIOS_OUT]; + + uint32_t dma_ch_en; + uint32_t dma_int_mask; + uint32_t dma_int_stat; + uint32_t dma_cfg; + uint32_t dma_weight; + + K230GSDMAChannel channels[K230_GSDMA_NUM_SDMA_CHANNELS]; +}; + +#endif diff --git a/hw/dma/k230_gsdma.c b/hw/dma/k230_gsdma.c new file mode 100644 index 0000000000..7635cd19e8 --- /dev/null +++ b/hw/dma/k230_gsdma.c @@ -0,0 +1,551 @@ +/* + * Kendryte K230 GSDMA + * + * Copyright (c) 2026 Tao Ding + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * GSDMA includes SDMA (System Direct Memory Access, K230 TRM section 10.2= ) and + * GDMA (Graphic Direct Memory Access, K230 TRM section 2.5.2). + */ + +#include "qemu/osdep.h" +#include "qemu/bitops.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "migration/vmstate.h" +#include "system/address-spaces.h" +#include "hw/dma/k230_gsdma.h" +#include "hw/core/irq.h" +#include "trace.h" + +static void k230_gsdma_update_irq(K230GSDMAState *s) +{ + qemu_set_irq(s->irq, !!(s->dma_int_stat & ~s->dma_int_mask)); +} + +static bool k230_gsdma_decomp_enabled(K230GSDMAState *s) +{ + /* Only sdma channel 0 has decomp enable flag */ + return !!(s->channels[0].cfg & K230_GSDMA_CH0_CFG_DECOMP_CTRL_EN); +} + +static bool k230_gsdma_read_sdma_llt(hwaddr addr, K230GSDMALLT *llt) +{ + bool ok =3D address_space_read(&address_space_memory, addr, + MEMTXATTRS_UNSPECIFIED, llt, + sizeof(*llt)) =3D=3D MEMTX_OK; + + if (ok) { + trace_k230_gsdma_read_sdma_llt(addr, le32_to_cpu(llt->cfg), + le32_to_cpu(llt->src_addr), + le32_to_cpu(llt->line_size), + le32_to_cpu(llt->line_cfg), + le32_to_cpu(llt->dst_addr), + le32_to_cpu(llt->next_llt_addr)); + } else { + trace_k230_gsdma_read_sdma_llt_failed(addr); + } + + return ok; +} + +static unsigned int k230_gsdma_usr_data_size(uint32_t cfg) +{ + /* decode usr_dat_size in CH_CFG register */ + switch (extract32(cfg, K230_GSDMA_CH_CFG_USR_DATA_SIZE_SHIFT, 2)) { + case 0: + return 1; + case 1: + return 2; + default: + return 4; + } +} + +static void k230_gsdma_convert_endian(uint8_t *buf, uint32_t len, uint32_t= cfg) +{ + unsigned int mode =3D extract32(cfg, + K230_GSDMA_CH_CFG_DAT_ENDIAN_SHIFT, 2); + unsigned int unit_size; + unsigned int offset; + + if (mode =3D=3D 0) { + return; + } + + unit_size =3D 1U << mode; + for (offset =3D 0; offset + unit_size <=3D len; offset +=3D unit_size)= { + unsigned int i; + + for (i =3D 0; i < unit_size / 2; i++) { + uint8_t tmp =3D buf[offset + i]; + + buf[offset + i] =3D buf[offset + unit_size - i - 1]; + buf[offset + unit_size - i - 1] =3D tmp; + } + } +} + +static bool k230_gsdma_transfer_llt(K230GSDMAChannel *c, const K230GSDMALL= T *llt) +{ + uint32_t llt_cfg =3D le32_to_cpu(llt->cfg); + hwaddr src =3D le32_to_cpu(llt->src_addr); + hwaddr dst =3D le32_to_cpu(llt->dst_addr); + uint32_t line_size =3D le32_to_cpu(llt->line_size); + uint32_t line_cfg =3D le32_to_cpu(llt->line_cfg); + /* Number of lines required for 2d mode */ + uint32_t line_num =3D + (llt_cfg & K230_GSDMA_LLT_2D_MODE) ? extract32(line_cfg, 0, 16= ) : 1; + /* Stride line size required for 2d mode */ + uint32_t line_space =3D extract32(line_cfg, 16, 16); + + bool dat_mode =3D c->cfg & K230_GSDMA_CH_CFG_DAT_MODE; + bool src_fixed =3D c->cfg & K230_GSDMA_CH_CFG_SRC_FIXED; + bool dst_fixed =3D c->cfg & K230_GSDMA_CH_CFG_DST_FIXED; + + uint8_t buf[8]; /* K230 sdma axi data width is 64-bit */ + uint8_t fill[4]; /* Usr data is 32-bit*/ + unsigned int fill_len =3D k230_gsdma_usr_data_size(c->cfg); + uint32_t i; + + memcpy(fill, &c->usr_data, sizeof(fill)); + + for (i =3D 0; i < line_num; i++) { + uint32_t remaining =3D line_size; + hwaddr line_src =3D src; + hwaddr line_dst =3D dst; + + while (remaining) { + uint32_t chunk =3D MIN(remaining, (uint32_t)sizeof(buf)); + + if (dat_mode) { + uint32_t j; + + for (j =3D 0; j < chunk; j++) { + buf[j] =3D fill[j % fill_len]; + } + } else if (address_space_read(&address_space_memory, line_src, + MEMTXATTRS_UNSPECIFIED, buf, + chunk) !=3D MEMTX_OK) { + return false; + } + + k230_gsdma_convert_endian(buf, chunk, c->cfg); + + if (address_space_write(&address_space_memory, line_dst, + MEMTXATTRS_UNSPECIFIED, buf, + chunk) !=3D MEMTX_OK) { + return false; + } + + if (!dat_mode && !src_fixed) { + line_src +=3D chunk; + } + if (!dst_fixed) { + line_dst +=3D chunk; + } + remaining -=3D chunk; + } + + if (!dat_mode && !src_fixed) { + if (llt_cfg & K230_GSDMA_LLT_2D_MODE) { /* 2d mode */ + src +=3D line_size + line_space; + } else { + src +=3D line_size; + } + } + + if (!dst_fixed) { + dst +=3D line_size; + } + } + + return true; +} + +static void k230_gsdma_sdma_set_idle(K230GSDMAChannel *c) +{ + c->status &=3D ~(K230_GSDMA_SDMA_STATUS_BUSY | K230_GSDMA_SDMA_STATUS_= PAUSE); + c->next_llt =3D 0; +} + +static void k230_gsdma_sdma_set_paused(K230GSDMAChannel *c, hwaddr next_ll= t) +{ + c->status &=3D ~K230_GSDMA_SDMA_STATUS_BUSY; + c->status |=3D K230_GSDMA_SDMA_STATUS_PAUSE; + c->next_llt =3D next_llt; +} + +static void k230_gsdma_run_sdma(K230GSDMAState *s, unsigned int ch, hwaddr= addr) +{ + K230GSDMAChannel *c =3D &s->channels[ch]; + + c->status &=3D ~K230_GSDMA_SDMA_STATUS_PAUSE; + c->status |=3D K230_GSDMA_SDMA_STATUS_BUSY; + c->next_llt =3D 0; + c->current_llt =3D addr; + + while (addr) { + K230GSDMALLT llt; + uint32_t cfg; + hwaddr next; + + if (!k230_gsdma_read_sdma_llt(addr, &llt)) { + k230_gsdma_sdma_set_idle(c); + return; + } + + cfg =3D le32_to_cpu(llt.cfg); + next =3D le32_to_cpu(llt.next_llt_addr); + c->current_llt =3D addr; + + if (!k230_gsdma_transfer_llt(c, &llt)) { + k230_gsdma_sdma_set_idle(c); + return; + } + + if (cfg & K230_GSDMA_LLT_NODE_INTR) { + s->dma_int_stat |=3D K230_GSDMA_SDMA_ITEM_INT(ch); + } + + if (cfg & K230_GSDMA_LLT_PAUSE) { + s->dma_int_stat |=3D K230_GSDMA_SDMA_PAUSE_INT(ch); + k230_gsdma_sdma_set_paused(c, next); + k230_gsdma_update_irq(s); + return; + } + + addr =3D next; + } + + s->dma_int_stat |=3D K230_GSDMA_SDMA_DONE_INT(ch); + s->dma_ch_en &=3D ~BIT(ch); + k230_gsdma_sdma_set_idle(c); + k230_gsdma_update_irq(s); +} + +/* Decomp gzip request step sdma */ +static void k230_gsdma_step_sdma(K230GSDMAState *s, unsigned int ch, hwadd= r addr) +{ + K230GSDMAChannel *c =3D &s->channels[ch]; + K230GSDMALLT llt; + uint32_t cfg; + hwaddr next; + + if (!addr || !k230_gsdma_read_sdma_llt(addr, &llt)) { + k230_gsdma_sdma_set_idle(c); + return; + } + + cfg =3D le32_to_cpu(llt.cfg); + next =3D le32_to_cpu(llt.next_llt_addr); + + c->status |=3D K230_GSDMA_SDMA_STATUS_BUSY; + c->status &=3D ~K230_GSDMA_SDMA_STATUS_PAUSE; + c->current_llt =3D addr; + + if (!k230_gsdma_transfer_llt(c, &llt)) { + k230_gsdma_sdma_set_idle(c); + return; + } + + if (cfg & K230_GSDMA_LLT_NODE_INTR) { + s->dma_int_stat |=3D K230_GSDMA_SDMA_ITEM_INT(ch); + } + + c->status &=3D ~K230_GSDMA_SDMA_STATUS_BUSY; + c->next_llt =3D next; + if (next =3D=3D 0) { + s->dma_int_stat |=3D K230_GSDMA_SDMA_DONE_INT(ch); + s->dma_ch_en &=3D ~BIT(ch); + } + + k230_gsdma_update_irq(s); +} + +static const VMStateDescription vmstate_k230_gsdma_channel =3D { + .name =3D "k230.gsdma.channel", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32(ctl, K230GSDMAChannel), + VMSTATE_UINT32(status, K230GSDMAChannel), + VMSTATE_UINT32(cfg, K230GSDMAChannel), + VMSTATE_UINT32(usr_data, K230GSDMAChannel), + VMSTATE_UINT32(llt_saddr, K230GSDMAChannel), + VMSTATE_UINT32(current_llt, K230GSDMAChannel), + VMSTATE_UINT32(next_llt, K230GSDMAChannel), + VMSTATE_END_OF_LIST() + } +}; + +static const VMStateDescription vmstate_k230_gsdma =3D { + .name =3D "k230.gsdma", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32(dma_ch_en, K230GSDMAState), + VMSTATE_UINT32(dma_int_mask, K230GSDMAState), + VMSTATE_UINT32(dma_int_stat, K230GSDMAState), + VMSTATE_UINT32(dma_cfg, K230GSDMAState), + VMSTATE_UINT32(dma_weight, K230GSDMAState), + VMSTATE_STRUCT_ARRAY(channels, K230GSDMAState, + K230_GSDMA_NUM_SDMA_CHANNELS, 2, + vmstate_k230_gsdma_channel, K230GSDMAChannel), + VMSTATE_END_OF_LIST() + } +}; + +static uint64_t k230_gsdma_read(void *opaque, hwaddr addr, unsigned int si= ze) +{ + K230GSDMAState *s =3D K230_GSDMA(opaque); + unsigned int ch; + hwaddr ch_off; + uint64_t ret =3D 0; + + switch (addr) { + case K230_GSDMA_DMA_CH_EN: + ret =3D s->dma_ch_en; + break; + case K230_GSDMA_DMA_INT_MASK: + ret =3D s->dma_int_mask; + break; + case K230_GSDMA_DMA_INT_STAT: + ret =3D s->dma_int_stat; + break; + case K230_GSDMA_DMA_CFG: + ret =3D s->dma_cfg; + break; + case K230_GSDMA_DMA_WEIGHT: + ret =3D s->dma_weight; + break; + default: + if (addr < K230_GSDMA_CH_BASE) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: not implement gdma at offset 0x%" HWADDR_PRIx + "\n", __func__, addr); + } + break; + } + + ch =3D (addr - K230_GSDMA_CH_BASE) / K230_GSDMA_CH_STRIDE; + ch_off =3D (addr - K230_GSDMA_CH_BASE) % K230_GSDMA_CH_STRIDE; + if (ch < K230_GSDMA_NUM_SDMA_CHANNELS) { + switch (ch_off) { + case K230_GSDMA_CH_CTL: + break; + case K230_GSDMA_CH_STATUS: + ret =3D s->channels[ch].status; + break; + case K230_GSDMA_CH_CFG: + ret =3D s->channels[ch].cfg; + break; + case K230_GSDMA_CH_USR_DATA: + ret =3D s->channels[ch].usr_data; + break; + case K230_GSDMA_CH_LLT_SADDR: + ret =3D s->channels[ch].llt_saddr; + break; + case K230_GSDMA_CH_CURRENT_LLT: + ret =3D s->channels[ch].current_llt; + break; + default: + break; + } + } + + trace_k230_gsdma_read(addr, size, ret); + return ret; +} + +static void k230_gsdma_write_channel(K230GSDMAState *s, unsigned int ch, + hwaddr ch_off, uint32_t value) +{ + K230GSDMAChannel *c =3D &s->channels[ch]; + bool handshake_mode =3D ch < 2 && k230_gsdma_decomp_enabled(s); + + switch (ch_off) { + case K230_GSDMA_CH_CTL: + c->ctl =3D value; + if ((value & K230_GSDMA_CTL_STOP) !=3D 0) { + c->started =3D false; + k230_gsdma_sdma_set_idle(c); + break; + } + if ((value & K230_GSDMA_CTL_RESUME) !=3D 0 && + (c->status & K230_GSDMA_SDMA_STATUS_PAUSE) && c->next_llt !=3D= 0) { + k230_gsdma_run_sdma(s, ch, c->next_llt); + break; + } + if (handshake_mode && (value & K230_GSDMA_CTL_START) !=3D 0) { + c->started =3D true; + c->status &=3D ~(K230_GSDMA_SDMA_STATUS_BUSY | + K230_GSDMA_SDMA_STATUS_PAUSE); + c->current_llt =3D 0; + c->next_llt =3D 0; + break; + } + if ((value & K230_GSDMA_CTL_START) !=3D 0 && + (s->dma_ch_en & BIT(ch)) && c->llt_saddr !=3D 0) { + c->started =3D true; + k230_gsdma_run_sdma(s, ch, c->llt_saddr); + } + break; + case K230_GSDMA_CH_CFG: + c->cfg =3D value; + break; + case K230_GSDMA_CH_USR_DATA: + c->usr_data =3D value; + break; + case K230_GSDMA_CH_LLT_SADDR: + c->llt_saddr =3D value; + break; + case K230_GSDMA_CH_CURRENT_LLT: + break; + default: + break; + } +} + +static void k230_gsdma_write(void *opaque, hwaddr addr, + uint64_t value, unsigned int size) +{ + K230GSDMAState *s =3D K230_GSDMA(opaque); + unsigned int ch; + hwaddr ch_off; + uint32_t v =3D value; + + trace_k230_gsdma_write(addr, size, value); + + switch (addr) { + case K230_GSDMA_DMA_CH_EN: + s->dma_ch_en =3D v & K230_GSDMA_DMA_CH_EN_MASK; + return; + case K230_GSDMA_DMA_INT_MASK: + s->dma_int_mask =3D v; + k230_gsdma_update_irq(s); + return; + case K230_GSDMA_DMA_INT_STAT: + s->dma_int_stat &=3D ~v; + k230_gsdma_update_irq(s); + return; + case K230_GSDMA_DMA_CFG: + s->dma_cfg =3D v; + return; + case K230_GSDMA_DMA_WEIGHT: + s->dma_weight =3D v & 0x00ffffff; + return; + default: + break; + } + + if (addr < K230_GSDMA_CH_BASE) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: not implement gdma at offset 0x%" HWADDR_PRIx + "\n", __func__, addr); + return; + } + + ch =3D (addr - K230_GSDMA_CH_BASE) / K230_GSDMA_CH_STRIDE; + ch_off =3D (addr - K230_GSDMA_CH_BASE) % K230_GSDMA_CH_STRIDE; + if (ch >=3D K230_GSDMA_NUM_SDMA_CHANNELS) { + return; + } + + k230_gsdma_write_channel(s, ch, ch_off, v); +} + +static void k230_gsdma_handle_signal(void *opaque, int n, int level) +{ + K230GSDMAState *s =3D opaque; + K230GSDMAChannel *c; + hwaddr addr; + unsigned int ch; + + if (!level || n =3D=3D K230_GSDMA_GPIO_DECOMP_CTRL_EN) { + return; + } + + ch =3D n - 1; + + c =3D &s->channels[ch]; + if (!k230_gsdma_decomp_enabled(s) || !(s->dma_ch_en & BIT(ch)) || !c->= started) { + return; + } + + if (c->current_llt =3D=3D 0) { + addr =3D c->llt_saddr; + } else { + addr =3D c->next_llt; + } + if (!addr) { + return; + } + + k230_gsdma_step_sdma(s, ch, addr); + qemu_set_irq(s->handshake_out[n - 1], 1); + qemu_set_irq(s->handshake_out[n - 1], 0); +} + +static const MemoryRegionOps k230_gsdma_ops =3D { + .read =3D k230_gsdma_read, + .write =3D k230_gsdma_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .impl.min_access_size =3D 4, + .impl.max_access_size =3D 4, + .valid.min_access_size =3D 4, + .valid.max_access_size =3D 4, +}; + +static void k230_gsdma_reset_hold(Object *obj, ResetType type) +{ + K230GSDMAState *s =3D K230_GSDMA(obj); + + memset(s->channels, 0, sizeof(s->channels)); + s->dma_ch_en =3D 0; + s->dma_int_mask =3D 0; + s->dma_int_stat =3D 0; + s->dma_cfg =3D K230_GSDMA_DMA_CFG_RESET; + s->dma_weight =3D 0; +} + +static void k230_gsdma_realize(DeviceState *dev, Error **errp) +{ + K230GSDMAState *s =3D K230_GSDMA(dev); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); + + memory_region_init_io(&s->iomem, OBJECT(dev), &k230_gsdma_ops, s, + TYPE_K230_GSDMA, K230_GSDMA_MMIO_SIZE); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_irq(sbd, &s->irq); + qdev_init_gpio_in(DEVICE(dev), k230_gsdma_handle_signal, + K230_GSDMA_NUM_GPIOS_IN); + qdev_init_gpio_out(DEVICE(dev), s->handshake_out, + K230_GSDMA_NUM_GPIOS_OUT); +} + +static void k230_gsdma_class_init(ObjectClass *klass, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + dc->realize =3D k230_gsdma_realize; + rc->phases.hold =3D k230_gsdma_reset_hold; + dc->vmsd =3D &vmstate_k230_gsdma; + dc->desc =3D "Kendryte K230 GSDMA"; +} + +static const TypeInfo k230_gsdma_info =3D { + .name =3D TYPE_K230_GSDMA, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(K230GSDMAState), + .class_init =3D k230_gsdma_class_init, +}; + +static void k230_gsdma_register_types(void) +{ + type_register_static(&k230_gsdma_info); +} + +type_init(k230_gsdma_register_types) diff --git a/hw/dma/Kconfig b/hw/dma/Kconfig index 98fbb1bb04..0a23e7d7b8 100644 --- a/hw/dma/Kconfig +++ b/hw/dma/Kconfig @@ -30,3 +30,6 @@ config SIFIVE_PDMA config XLNX_CSU_DMA bool select REGISTER + +config K230_GSDMA + bool \ No newline at end of file diff --git a/hw/dma/meson.build b/hw/dma/meson.build index cc7810beb8..45db5e7357 100644 --- a/hw/dma/meson.build +++ b/hw/dma/meson.build @@ -12,3 +12,4 @@ system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_d= ma.c', 'soc_dma.c')) system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c')) system_ss.add(when: 'CONFIG_SIFIVE_PDMA', if_true: files('sifive_pdma.c')) system_ss.add(when: 'CONFIG_XLNX_CSU_DMA', if_true: files('xlnx_csu_dma.c'= )) +system_ss.add(when: 'CONFIG_K230_GSDMA', if_true: files('k230_gsdma.c')) diff --git a/hw/dma/trace-events b/hw/dma/trace-events index 4c09790f9a..a494755b5a 100644 --- a/hw/dma/trace-events +++ b/hw/dma/trace-events @@ -47,3 +47,9 @@ pl330_iomem_read(uint32_t addr, uint32_t data) "addr: 0x%= 08"PRIx32" data: 0x%08" =20 # xilinx_axidma.c xilinx_axidma_loading_desc_fail(uint32_t res) "error:%u" + +# k230_gsdma.c +k230_gsdma_read(uint64_t addr, unsigned int size, uint64_t data) "K230 GSD= MA read: [0x%"PRIx64"] size %u -> 0x%"PRIx64 +k230_gsdma_write(uint64_t addr, unsigned int size, uint64_t data) "K230 GS= DMA write: [0x%"PRIx64"] size %u <- 0x%"PRIx64 +k230_gsdma_read_sdma_llt(uint64_t addr, uint32_t cfg, uint32_t src_addr, u= int32_t line_size, uint32_t line_cfg, uint32_t dst_addr, uint32_t next_llt_= addr) "K230 GSDMA read SDMA LLT: addr=3D0x%"PRIx64" cfg=3D0x%"PRIx32" src= =3D0x%"PRIx32" line_size=3D0x%"PRIx32" line_cfg=3D0x%"PRIx32" dst=3D0x%"PRI= x32" next=3D0x%"PRIx32 +k230_gsdma_read_sdma_llt_failed(uint64_t addr) "K230 GSDMA read SDMA LLT f= ailed: addr=3D0x%"PRIx64 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197533; cv=none; d=zohomail.com; s=zohoarc; b=KrBdFDsIYdBSJ+QiXWNMR6rfk/wJY9PhZFKe0fIlPi4fk8GWoQSUhhe7Y5soYIKuVbQjFRf5mewQdfllqX/s8sRLZkng4sAbu1njaNn4tDzgXkFoFJxOg71+IlL4jPvWRPqf/+QJkodQS2QXYJ+zFNNqB0mGyTa0MclyfjYz32Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197533; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=zYwYUcVG2VW3tzoyHfgQKdzE7Y51E+RzfXFNYF+fePE=; b=YZOZ+Xpx4SfI2H1/OnP6F8nw55Cg3I+FnDLeTEqSowaD4VDZ/eKDj838nbgntpU8yIFN8KmZKUt2f3jlSzp2HHDn4ASBSSP3qVQwDAHs+rB6zN7ULVU2cuh9EeJgFJkg57Khs/TUrN1uMMrl0m2hv0WXD+Mvqar/Sks17+KzWGc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197533659289.52865615267206; Wed, 19 Aug 2026 20:45:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiD-0006vi-VC; Wed, 19 Aug 2026 23:45:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiB-0006u7-Sk for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:03 -0400 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiA-0003cd-8P for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:03 -0400 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-2cf452def93so3669885ad.1 for ; Wed, 19 Aug 2026 20:45:01 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.44.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:44:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197500; x=1787802300; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=zYwYUcVG2VW3tzoyHfgQKdzE7Y51E+RzfXFNYF+fePE=; b=GQp/M7iSD8lwPZs3Ljg8eaesHYLj1vLjFd69Q0jVyFEXofRLMduN99/tkvl6KvD1O+ cc6n2y3zUF/XVUX2XCzjYjJNmtQfAE89MIS1Cj3f+LfuQXE7FpSVcYQ+IduemjQEkfNj Nsod7nQwSGQHc6cJuRfzzq8GILgZpjsKT/YiML3XejfVCXoBFxGwV+cujKshya2bWcq9 XxEqb1CpMQZY1sOEbfD0J94GG3jcalsWqNcLLsCBrvXtsMswDiP6PW3nJ5RIcusjYbLS R9QEvTizaSMnNTJSIIPTa7O8V4RsVMSl/hkK0cf8NEOXZc/qxeYQ1VJ7uRRMKDPQpZuK 7dow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197500; x=1787802300; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=zYwYUcVG2VW3tzoyHfgQKdzE7Y51E+RzfXFNYF+fePE=; b=LHXP9AW8+mbfarXlk1/gRNKESInkyxyLgwgFYFWodoo1AHxrgJ/em/Ivd+v5LTQs1F S5dqlx8FZbaEHaYXLU1GDrMJl7C+QTK/mwVFa4lVTtvaZSTxDJ5TRHvuO7A375Iueits cHrgE37vbKVvNJxYjwd2BwCjgOhC5xwQDBXugxlWNx8zp9DXEGU5WSa5aUSqgQ0dj1yS inYD9JIHp3W9w/E9Op+NiyDg1n0NCotxwglRSpU2F8ckG0bm5aw71sFFmltc87LCAhe3 9XKhGgiFT25QfAlxIGWA2Sfg30TJUPRPO/0Ca0DZloIiF3K6dRiRa9EYrwU9NQC/7FYm CR3g== X-Gm-Message-State: AFuF++nE+a9QKIBUX7aOLMCkg1sbs0RFSxd2izdMtVuopAd1PNS3pO1Y agUjaRAEyu9qslDRkZQPxVk3IT2nWTMN9RWrsR+SOGDVMGOqeYCYHHRdaQ52YA== X-Gm-Gg: AR+sD10XmVsPXStqb0lsESAoH2zcLVVSzLsi753HFuQSWiIhA76BmkV+9cq9leFnAgp UBQF1vyeUez3x0QbKiTh+/BjhLg5rWkyYilPSuBVSRPhw5LTaTnVNlqveEC5iSlgju3dN/dePsE fO/aVA5h0z8DOmr+OUnMfMwv1dmw7C4/y2SOElmrENPicW5ftFssL5HEvTMH++z2+C5teGLYyWJ CEU9BAjgkmsL6T9xteTHPbNR2ZuJFyAwbs5kVSLcKzy5HLWx/jGGvGCNm1ZWGhlanZnppt4jTVZ DSbrXg4BGcfcBYPksQYVONm3y4yQ+q/ppCkXAEseYGbTjsPLskVHhj8rNtFzjsc94tjPj7S6KjV FiX0bFDV2ma/8lPe0qy51zjaO78kEcRqFsbshDMxdWbq55q+e084mx5C3cHrDGz4eFqmnYGwt8t CAJsxUxD4pivpBfWKif6ZVrPYtoSTm0iiBEM0eNrm29i2tCYFBZ8LH4PYxWvvFxDkTH6uGjPSQl Uvchw== X-Received: by 2002:a17:90b:224c:b0:36b:b903:994 with SMTP id 98e67ed59e1d1-395a044f27dmr4639909a91.4.1787197500316; Wed, 19 Aug 2026 20:45:00 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Tao Ding , Junze Cao , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 06/93] hw/riscv: k230: add gsdma in K230 board Date: Thu, 20 Aug 2026 13:43:03 +1000 Message-ID: <20260820034430.1186695-7-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197536502158500 Content-Type: text/plain; charset="utf-8" From: Tao Ding This commit replaces the unimplemented part of GSDMA in K230. And connect t= he interrupt to plic. Update K230.rst. Signed-off-by: Tao Ding Reviewed-by: Junze Cao Reviewed-by: Daniel Henrique Barboza Message-ID: <20260808062227.66961-3-dingtao0430@163.com> Signed-off-by: Alistair Francis --- docs/system/riscv/k230.rst | 1 + include/hw/riscv/k230.h | 3 +++ hw/riscv/k230.c | 12 +++++++++--- hw/riscv/Kconfig | 1 + 4 files changed, 14 insertions(+), 3 deletions(-) diff --git a/docs/system/riscv/k230.rst b/docs/system/riscv/k230.rst index 06a819fbdb..5cbc0b14bc 100644 --- a/docs/system/riscv/k230.rst +++ b/docs/system/riscv/k230.rst @@ -21,6 +21,7 @@ The ``k230`` machine supports the following devices: * 2 K230 Watchdog Timer * 5 UART * K230 DDRC CFG and DDR PHY +* System Direct Memory Access (SDMA) =20 Boot options ------------ diff --git a/include/hw/riscv/k230.h b/include/hw/riscv/k230.h index 80ca16338c..8879d56d98 100644 --- a/include/hw/riscv/k230.h +++ b/include/hw/riscv/k230.h @@ -19,6 +19,7 @@ #include "hw/misc/k230_ddr.h" #include "hw/riscv/riscv_hart.h" #include "hw/watchdog/k230_wdt.h" +#include "hw/dma/k230_gsdma.h" =20 #define C908_CPU_HARTID (0) =20 @@ -36,6 +37,7 @@ typedef struct K230SoCState { K230DDRCfgState ddr_cfg; K230DDRPhyState ddr_phy; K230WdtState wdt[2]; + K230GSDMAState gsdma; MemoryRegion sram; MemoryRegion bootrom; =20 @@ -133,6 +135,7 @@ enum { K230_UART4_IRQ =3D 20, K230_WDT0_IRQ =3D 107, K230_WDT1_IRQ =3D 108, + K230_GSDMA_IRQ =3D 140, }; =20 #define K230_UART_COUNT 5 diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c index 627150b463..49c3b50c57 100644 --- a/hw/riscv/k230.c +++ b/hw/riscv/k230.c @@ -116,6 +116,7 @@ static void k230_soc_init(Object *obj) s->ddr_cfg.phy =3D &s->ddr_phy; object_initialize_child(obj, "k230-wdt0", &s->wdt[0], TYPE_K230_WDT); object_initialize_child(obj, "k230-wdt1", &s->wdt[1], TYPE_K230_WDT); + object_initialize_child(obj, "k230-gsdma", &s->gsdma, TYPE_K230_GSDMA); =20 qdev_prop_set_uint32(DEVICE(cpu0), "hartid-base", 0); qdev_prop_set_string(DEVICE(cpu0), "cpu-type", TYPE_RISCV_CPU_THEAD_C9= 08); @@ -222,6 +223,14 @@ static void k230_soc_realize(DeviceState *dev, Error *= *errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[1]), 0, qdev_get_gpio_in(DEVICE(s->c908_plic), K230_WDT1_IR= Q)); =20 + /* Gsdma */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->gsdma), errp)) { + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gsdma), 0, memmap[K230_DEV_GSDMA].b= ase); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gsdma), 0, + qdev_get_gpio_in(DEVICE(s->c908_plic), K230_GSDMA_I= RQ)); + /* unimplemented devices */ create_unimplemented_device("kpu.l2-cache", memmap[K230_DEV_KPU_L2_CACHE].base, @@ -237,9 +246,6 @@ static void k230_soc_realize(DeviceState *dev, Error **= errp) memmap[K230_DEV_AI_2D_ENGINE].base, memmap[K230_DEV_AI_2D_ENGINE].size); =20 - create_unimplemented_device("gsdma", memmap[K230_DEV_GSDMA].base, - memmap[K230_DEV_GSDMA].size); - create_unimplemented_device("dma", memmap[K230_DEV_DMA].base, memmap[K230_DEV_DMA].size); =20 diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index de37c08cae..d28ac06043 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -162,3 +162,4 @@ config K230 select SERIAL_MM select UNIMP select K230_WDT + select K230_GSDMA --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197533; cv=none; d=zohomail.com; s=zohoarc; b=DAOd3bIR7TN3ABTeNFFZ9wsWPHEvvpe2Tmsl/rqeStsjaeOVzr2qSgffYn6xmLHtpQbqwaB19MY1LltSYE2XjAp5VLQPhKFiAGxriOwbtngvcmPCQIjDAJWqG59FqK7TZjAFeM9Fz3kTM1F3ZBxRYP0j3W/u+hHfEHJZwX+KodU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197533; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fyOS9jVxclUBk/WFZwkwos/V32r0NQTKT+2xj+O2KAc=; b=YS2c/IO8PAD/wfuxCPajpRxHqYzPy3RGjT+JhUENl4lxMH2MnOrvQPH+QFQo1kP3+036ELeRfxNTgZp1pRZUS9R7S9dN075eCOV7/6nXkaCmzkc+8aTIaRcMzgX3yPYjyQvvbFGfLkO4yvo1KvHGAOhJt2jNWxb1URc8uMHVZEI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197533660984.6219183181377; Wed, 19 Aug 2026 20:45:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiK-00073d-OD; Wed, 19 Aug 2026 23:45:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiI-000708-EL for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:10 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiD-0003ny-HH for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:10 -0400 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-2d5655cc850so20677695ad.3 for ; Wed, 19 Aug 2026 20:45:05 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197504; x=1787802304; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=fyOS9jVxclUBk/WFZwkwos/V32r0NQTKT+2xj+O2KAc=; b=EUIOIFkSPGV+uXz3JlaWNYFcAsawfJy53+bDCT59JZ08F65QzJUBA94Zme6fI0ECwz 4DnLYRwvgIOX3Dmyr0juWSd0ZExHQ2FKNHUJZD6I1CAQ4Jb1VYzrtQ3wg6Ud2DWADf+X N02pDk7zIUtAaMn/R4p1ZvwAxfJZG0IlLmg8eT2XM6PXNr5HUG6b3cWqt1e8wR5kZK1e 3wR4i9XDeGalY2vyCF8S4x2TKMrkVG8DhIkD1NJWzDylAQFFk+caIl+eY8fDhCxzW4n0 B9x2gn9PBQ8PosFuxEkQpS5HzRTREspmsHJoxNR67igWHRcFS5XvidXRMZibJJlUL7NS mrnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197504; x=1787802304; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=fyOS9jVxclUBk/WFZwkwos/V32r0NQTKT+2xj+O2KAc=; b=APSmaxMC37eYFTDr1N+aKc8vjeGWTEPpV+c/UB2wKZMLE+ZcPEpRcuebNMZz7+w0t0 joLfjwAl2G62Mvk+IL//8pQpIMEYnUOol+vZJ8qid4UyS9fQDvoidLwoToaUr4VqxkvK 9aUT44aF99/kWU9fv18PxCRT05tV1CaTGTnHdaHJs6ZQM4YwdR3kVnkN3/7v1WCek2Tz FZPJecH7J4z0CHUc5kcBlufDmSiyg/k/KEdDkI/bJbCczonPD+/fNyqCmKeHdePA/xxj Z5WFnTrL+7ZkVapwi3uxhnP5N+OUXNfGMicw8k/oBXfmHSHFouBJtlD3BkJUQv2x17WY iKow== X-Gm-Message-State: AFuF++lD1TnLWLgnTlnzBHD1E3bIpMQVx0Chby/AAVXdwBb/ZvGvyFv5 p277D2Z4jd7UN5BKfLetPNc6SbaSKO+0lKYTC/zNlQ2+dfLqSA180aS3hOyqQQ== X-Gm-Gg: AR+sD10fI5qikcXxfDeLsMNiMa/N3H4Uq30Jh2Gk7igrxKli3p8PytlhrUNXDO3Xg2R 982yMOdce8pRotrRwTDmiVdMk7my1QkeGCSwMIPAYk1RnF1BoyciYAYCb/Z8PW3M5W1vG+fspt1 jbq9RJpd6l6uPmB/P6pvK3eS3afbD3NyhXpVxvMrfwcGnlmhQMYKkdbDNOVVAueYAKb99WL+uYg EdnkhNaV2Ez+xuSzuCyFKUwAyxxuzrHbHOA8aLj8ePZpBSUMGj5w8fkJF8cqyvmmunq5csWRiXw /xR/byCQ58Ixd0XC3MfZ7+b3i2aG08ZFXmm2RcUhzoTPIaQ7oU5Nykt+7hYoCsyjIzaM+vqdtZp Eh+gDKpIolI1wwjbiu4VFKm+ED9Go66xvSyO2mi9emF4uW+g+BhgLovUOMM7jok+1myDUhj8zjm tepEVQkp1g18HBhZrTrCLvn1Gir1oIZrUQijyNs85UaatYrZJC3h+BNP/y6UHxFYufH4x5D1vDC x+bjw== X-Received: by 2002:a17:90b:2792:b0:395:5404:95 with SMTP id 98e67ed59e1d1-3958108bb19mr19817517a91.12.1787197503786; Wed, 19 Aug 2026 20:45:03 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Tao Ding , Daniel Henrique Barboza , Junze Cao , Alistair Francis Subject: [PULL 07/93] tests/qtest: add test for K230 gsdma Date: Thu, 20 Aug 2026 13:43:04 +1000 Message-ID: <20260820034430.1186695-8-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=alistair23@gmail.com; helo=mail-pl1-x635.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197536580158500 Content-Type: text/plain; charset="utf-8" From: Tao Ding This commit adds test cases for GSDMA. Imitate the behavior of the driver, set LLT and sdma registers. After the data transmission is completed, check the destination address dat= a. Update MAINTAINERS for this test. Run this qtest: $ mkdir build && cd build && ../configure --target-list=3D"riscv64-soft= mmu" $ QTEST_QEMU_BINARY=3D./qemu-system-riscv64 tests/qtest/k230-gsdma-te= st Signed-off-by: Tao Ding Reviewed-by: Daniel Henrique Barboza Reviewed-by: Junze Cao Message-ID: <20260808062227.66961-4-dingtao0430@163.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 3 + docs/system/riscv/k230.rst | 1 + include/hw/misc/k230_decomp_gzip.h | 92 ++++++ hw/misc/k230_decomp_gzip.c | 511 +++++++++++++++++++++++++++++ tests/qtest/k230-gsdma-test.c | 201 ++++++++++++ hw/misc/Kconfig | 3 + hw/misc/meson.build | 1 + hw/misc/trace-events | 4 + tests/qtest/meson.build | 2 +- 9 files changed, 817 insertions(+), 1 deletion(-) create mode 100644 include/hw/misc/k230_decomp_gzip.h create mode 100644 hw/misc/k230_decomp_gzip.c create mode 100644 tests/qtest/k230-gsdma-test.c diff --git a/MAINTAINERS b/MAINTAINERS index 8d312e1fe5..84b6e4a72a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1847,13 +1847,16 @@ F: hw/misc/k230_ddr.c F: hw/riscv/k230.c F: hw/watchdog/k230_wdt.c F: hw/dma/k230_gsdma.c +F: hw/misc/k230_decomp_gzip.c F: include/hw/misc/k230_ddr.h F: include/hw/riscv/k230.h F: include/hw/watchdog/k230_wdt.h F: include/hw/dma/k230_gsdma.h +F: include/hw/misc/k230_decomp_gzip.h F: tests/functional/riscv64/test_k230.py F: tests/qtest/k230-ddr-test.c F: tests/qtest/k230-wdt-test.c +F: tests/qtest/k230-gsdma-test.c =20 RX Machines ----------- diff --git a/docs/system/riscv/k230.rst b/docs/system/riscv/k230.rst index 5cbc0b14bc..237611eddf 100644 --- a/docs/system/riscv/k230.rst +++ b/docs/system/riscv/k230.rst @@ -22,6 +22,7 @@ The ``k230`` machine supports the following devices: * 5 UART * K230 DDRC CFG and DDR PHY * System Direct Memory Access (SDMA) +* GZIP Decompress Engine (Decomp_gzip) =20 Boot options ------------ diff --git a/include/hw/misc/k230_decomp_gzip.h b/include/hw/misc/k230_deco= mp_gzip.h new file mode 100644 index 0000000000..9911af0095 --- /dev/null +++ b/include/hw/misc/k230_decomp_gzip.h @@ -0,0 +1,92 @@ +/* + * K230 Decompress Engine + * + * Copyright (c) 2026 Tao Ding + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_MISC_K230_DECOMP_GZIP_H +#define HW_MISC_K230_DECOMP_GZIP_H + +#include +#include "hw/core/sysbus.h" + +#define TYPE_K230_DECOMP_GZIP "riscv.k230.decomp-gzip" +OBJECT_DECLARE_SIMPLE_TYPE(K230DecompGzipState, K230_DECOMP_GZIP) + +/* K230 DECOMP GZIP ACK input */ +enum { + K230_DECOMP_GZIP_GPIO_DMA_WRITE_ACK, + K230_DECOMP_GZIP_GPIO_DMA_READ_ACK, + K230_DECOMP_GZIP_NUM_GPIOS_IN, +}; + +/* K230 DECOMP GZIP REQ output */ +enum { + K230_DECOMP_GZIP_GPIO_DECOMP_CTRL_EN, + K230_DECOMP_GZIP_GPIO_DMA_WRITE_REQ, + K230_DECOMP_GZIP_GPIO_DMA_READ_REQ, + K230_DECOMP_GZIP_NUM_GPIOS_OUT, +}; + +#define K230_DECOMP_GZIP_MMIO_SIZE 0x4000 + +/* K230 DECOMP GZIP Registers map */ +/* Start decompression controller */ +#define K230_DECOMP_GZIP_DECOMP_START 0x00 +/* Source data length register */ +#define K230_DECOMP_GZIP_GZIP_SRC_SIZE 0x04 +/* Output data length register */ +#define K230_DECOMP_GZIP_GZIP_OUT_SIZE 0x08 +/* Decompress status register */ +#define K230_DECOMP_GZIP_DECOMP_STAT 0x0c + +/* Start decompression controller */ +#define K230_DECOMP_GZIP_START (1U << 0) + +#define K230_DECOMP_GZIP_CTRL_EN (1U << 31) +#define K230_DECOMP_GZIP_DMA_IN_MASK 0x7fffffffU + +#define K230_DECOMP_GZIP_STAT_CRC_OK (1U << 10) +#define K230_DECOMP_GZIP_STAT_STATE_MASK 0xfU + +#define K230_DECOMP_GZIP_BLOCK_SIZE 0x00020000 +#define K230_DECOMP_GZIP_SRAM_IN_BASE 0x80000 +#define K230_DECOMP_GZIP_SRAM_OUT_BASE 0 + +typedef struct K230DecompGzipSlotState { + uint32_t slot; /* Slot index */ + /* + * Data offset in current slot. + * First valid data in input buffer. Last valid data in output buffer. + */ + uint32_t current_offset; +} K230DecompGzipSlotState; + +struct K230DecompGzipState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + hwaddr sram_base; + qemu_irq signal_out[K230_DECOMP_GZIP_NUM_GPIOS_OUT]; + uint32_t decomp_start; + uint32_t gzip_src_size; + uint32_t gzip_out_size; + uint32_t decomp_stat; + K230DecompGzipSlotState input; /* decomp gzip ring input */ + K230DecompGzipSlotState output; /* decomp gzip ring output */ + uint32_t total_requested; + uint32_t total_produced; + bool active; + bool in_kick; + bool zstream_inited; + bool stream_end; + /* Read from ring input. */ + uint8_t input_buf[K230_DECOMP_GZIP_BLOCK_SIZE]; + /* Write to ring output. */ + uint8_t output_buf[K230_DECOMP_GZIP_BLOCK_SIZE]; + z_stream zs; +}; + +#endif diff --git a/hw/misc/k230_decomp_gzip.c b/hw/misc/k230_decomp_gzip.c new file mode 100644 index 0000000000..0d8a3b2d2e --- /dev/null +++ b/hw/misc/k230_decomp_gzip.c @@ -0,0 +1,511 @@ +/* + * Kendryte K230 GZIP decompression engine + * + * Copyright (c) 2026 Tao Ding + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Decompression accelerator is mainly used to implement hardware + * GZIP decompression function. (K230 TRM section 15) + */ + +#include "qemu/osdep.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "hw/core/qdev-properties.h" +#include "migration/vmstate.h" +#include "system/address-spaces.h" +#include "hw/core/irq.h" +#include "hw/misc/k230_decomp_gzip.h" +#include "trace.h" + +#define GZIP_METHOD_DEFLATE 8 +#define GZIP_METHOD_VENDOR_9 9 + +#define DEFLATE_BTYPE_DYNAMIC 2 + +#define K230_DECOMP_GZIP_OUTPUT_SLOTS 4 +#define K230_DECOMP_GZIP_INPUT_SLOTS 2 + +static void k230_decomp_gzip_set_output(K230DecompGzipState *s, int line, + int level) +{ + qemu_set_irq(s->signal_out[line], level); +} + +static bool k230_decomp_gzip_read_mem(K230DecompGzipState *s, hwaddr addr, + void *buf, size_t len) +{ + MemTxResult ret =3D address_space_read(&address_space_memory, + s->sram_base + addr, + MEMTXATTRS_UNSPECIFIED, buf, len); + + return ret =3D=3D MEMTX_OK; +} + +static bool k230_decomp_gzip_write_mem(K230DecompGzipState *s, hwaddr addr, + const void *buf, size_t len) +{ + return address_space_write(&address_space_memory, s->sram_base + addr, + MEMTXATTRS_UNSPECIFIED, buf, len) =3D=3D ME= MTX_OK; +} + +static hwaddr k230_decomp_gzip_output_addr(K230DecompGzipState *s) +{ + return K230_DECOMP_GZIP_SRAM_OUT_BASE + + s->output.slot * K230_DECOMP_GZIP_BLOCK_SIZE + + s->output.current_offset; +} + +static hwaddr k230_decomp_gzip_input_addr(K230DecompGzipState *s) +{ + return s->input.slot * K230_DECOMP_GZIP_BLOCK_SIZE + + K230_DECOMP_GZIP_SRAM_IN_BASE; +} + +static uint32_t k230_decomp_gzip_current_input_size(K230DecompGzipState *s) +{ + if (s->total_requested =3D=3D 0) { + return 0; + } + + return ((s->total_requested - 1) % K230_DECOMP_GZIP_BLOCK_SIZE) + 1; +} + +static void k230_decomp_gzip_update_ctrl_en(K230DecompGzipState *s) +{ + int level =3D s->active && !!(s->gzip_src_size & K230_DECOMP_GZIP_CTRL= _EN); + + k230_decomp_gzip_set_output(s, K230_DECOMP_GZIP_GPIO_DECOMP_CTRL_EN, + level); +} + +static void k230_decomp_gzip_reset_stream(K230DecompGzipState *s) +{ + if (s->zstream_inited) { + inflateEnd(&s->zs); + s->zstream_inited =3D false; + } + memset(&s->zs, 0, sizeof(s->zs)); +} + +static void k230_decomp_gzip_finish(K230DecompGzipState *s, bool crc_ok) +{ + s->active =3D false; + k230_decomp_gzip_reset_stream(s); + k230_decomp_gzip_update_ctrl_en(s); + if (crc_ok) { + s->decomp_stat |=3D K230_DECOMP_GZIP_STAT_CRC_OK; + } else { + s->decomp_stat &=3D ~K230_DECOMP_GZIP_STAT_CRC_OK; + } +} + +static bool k230_decomp_gzip_load_input(K230DecompGzipState *s, + uint32_t addr, uint32_t size) +{ + s->input.current_offset =3D 0; + + return k230_decomp_gzip_read_mem(s, addr, s->input_buf, size); +} + +static bool k230_decomp_gzip_request_input(K230DecompGzipState *s) +{ + uint32_t total_requested =3D s->total_requested; + + k230_decomp_gzip_set_output(s, K230_DECOMP_GZIP_GPIO_DMA_WRITE_REQ, 1); + if (s->total_requested =3D=3D total_requested) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: dma write request not acknowledged\n", + TYPE_K230_DECOMP_GZIP); + return false; + } + return true; +} + +static bool k230_decomp_gzip_request_output(K230DecompGzipState *s) +{ + uint32_t slot =3D s->output.slot; + uint32_t current_offset =3D s->output.current_offset; + + k230_decomp_gzip_set_output(s, K230_DECOMP_GZIP_GPIO_DMA_READ_REQ, 1); + if (s->output.slot =3D=3D slot && + s->output.current_offset =3D=3D current_offset) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: dma read request not acknowledged\n", + TYPE_K230_DECOMP_GZIP); + return false; + } + return true; +} + +static bool k230_decomp_gzip_init_stream(K230DecompGzipState *s) +{ + uint8_t btype =3D (s->input_buf[10] >> 1) & 0x3; + if (btype !=3D DEFLATE_BTYPE_DYNAMIC) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: unsupported DEFLATE BTYPE %u\n", + TYPE_K230_DECOMP_GZIP, btype); + return false; + } + + /* The compression script for K230 will modify the third byte to 0x9 */ + if (s->input_buf[2] =3D=3D GZIP_METHOD_VENDOR_9) { + s->input_buf[2] =3D GZIP_METHOD_DEFLATE; + } + + if (inflateInit2(&s->zs, 15 + 16) !=3D Z_OK) { + return false; + } + + s->zstream_inited =3D true; + return true; +} + +static bool k230_decomp_gzip_run_inflate(K230DecompGzipState *s) +{ + uint32_t output_size =3D s->gzip_out_size; + uint32_t current_input_size =3D k230_decomp_gzip_current_input_size(s); + uint32_t avail_in; + uint32_t avail_out; + uint32_t consumed; + uint32_t produced; + int ret; + + avail_in =3D current_input_size - s->input.current_offset; + avail_out =3D K230_DECOMP_GZIP_BLOCK_SIZE - s->output.current_offset; + + s->zs.next_in =3D s->input_buf + s->input.current_offset; + s->zs.avail_in =3D avail_in; + s->zs.next_out =3D s->output_buf; + s->zs.avail_out =3D avail_out; + + ret =3D inflate(&s->zs, Z_NO_FLUSH); + if (ret !=3D Z_OK && ret !=3D Z_STREAM_END && ret !=3D Z_BUF_ERROR) { + return false; + } + + consumed =3D avail_in - s->zs.avail_in; + produced =3D avail_out - s->zs.avail_out; + + if (produced) { + if (s->total_produced + produced > output_size || + !k230_decomp_gzip_write_mem(s, k230_decomp_gzip_output_addr(s), + s->output_buf, produced)) { + return false; + } + s->output.current_offset +=3D produced; + s->total_produced +=3D produced; + } + + if (consumed) { + s->input.current_offset +=3D consumed; + } + + if (ret =3D=3D Z_STREAM_END) { + s->stream_end =3D true; + if (s->total_produced !=3D output_size) { + return false; + } + } + + return true; +} + +static void k230_decomp_gzip_kick(K230DecompGzipState *s) +{ + if (!s->active || s->in_kick) { + return; + } + + uint32_t input_size =3D s->gzip_src_size & K230_DECOMP_GZIP_DMA_IN_MAS= K; + s->in_kick =3D true; + while (s->active) { + uint32_t current_input_size =3D k230_decomp_gzip_current_input_siz= e(s); + /* Output is full or last block */ + if (s->output.current_offset =3D=3D K230_DECOMP_GZIP_BLOCK_SIZE || + (s->stream_end && s->output.current_offset !=3D 0)) { + if (!k230_decomp_gzip_request_output(s)) { + k230_decomp_gzip_finish(s, false); + break; + } + continue; + } + + if (!s->zstream_inited) { + if (!k230_decomp_gzip_request_input(s) || + !k230_decomp_gzip_init_stream(s)) { + k230_decomp_gzip_finish(s, false); + break; + } + continue; + } + + /* Transfer finish */ + if (s->stream_end) { + k230_decomp_gzip_finish(s, + s->total_produced =3D=3D s->gzip_out_s= ize); + break; + } + + /* Input buf has has been fully decompreed, need request more */ + if (s->input.current_offset =3D=3D current_input_size) { + if (s->total_requested < input_size) { + if (!k230_decomp_gzip_request_input(s)) { + k230_decomp_gzip_finish(s, false); + break; + } + continue; + } + k230_decomp_gzip_finish(s, false); + break; + } + + /* Decompress the data, input buf or output buf are consumed in on= e block */ + if (!k230_decomp_gzip_run_inflate(s)) { + k230_decomp_gzip_finish(s, false); + break; + } + } + s->in_kick =3D false; +} + +static void k230_decomp_gzip_handle_ack(void *opaque, int n, int level) +{ + K230DecompGzipState *s =3D opaque; + + if (!level || !s->active) { + return; + } + + switch (n) { + case K230_DECOMP_GZIP_GPIO_DMA_WRITE_ACK: + { + uint32_t input_size =3D s->gzip_src_size & K230_DECOMP_GZIP_DMA_IN= _MASK; + uint32_t chunk =3D MIN(K230_DECOMP_GZIP_BLOCK_SIZE, + input_size - s->total_requested); + + if (!k230_decomp_gzip_load_input(s, k230_decomp_gzip_input_addr(s), + chunk)) { + k230_decomp_gzip_finish(s, false); + return; + } + s->total_requested +=3D chunk; + s->input.slot =3D (s->input.slot + 1) % K230_DECOMP_GZIP_INPUT_SLO= TS; + break; + } + case K230_DECOMP_GZIP_GPIO_DMA_READ_ACK: + if (s->output.current_offset =3D=3D 0) { + k230_decomp_gzip_finish(s, false); + return; + } + s->output.slot =3D (s->output.slot + 1) % K230_DECOMP_GZIP_OUTPUT_= SLOTS; + s->output.current_offset =3D 0; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid DMA acknowledgment signal %d\n", + TYPE_K230_DECOMP_GZIP, n); + return; + } + + k230_decomp_gzip_kick(s); +} + +static void k230_decomp_gzip_start(K230DecompGzipState *s) +{ + uint32_t input_size =3D s->gzip_src_size & K230_DECOMP_GZIP_DMA_IN_MAS= K; + + k230_decomp_gzip_reset_stream(s); + s->decomp_stat &=3D ~K230_DECOMP_GZIP_STAT_CRC_OK; + s->total_requested =3D 0; + s->total_produced =3D 0; + s->stream_end =3D false; + memset(&s->input, 0, sizeof(s->input)); + memset(&s->output, 0, sizeof(s->output)); + + if (!(s->gzip_src_size & K230_DECOMP_GZIP_CTRL_EN) || + input_size =3D=3D 0 || s->gzip_out_size =3D=3D 0) { + k230_decomp_gzip_finish(s, false); + return; + } + + s->active =3D true; + k230_decomp_gzip_update_ctrl_en(s); + k230_decomp_gzip_kick(s); +} + +static uint64_t k230_decomp_gzip_read(void *opaque, hwaddr offset, + unsigned size) +{ + K230DecompGzipState *s =3D opaque; + uint64_t value =3D 0; + + switch (offset) { + case K230_DECOMP_GZIP_DECOMP_START: + value =3D s->decomp_start & ~K230_DECOMP_GZIP_START; /* start bit = is write only */ + break; + case K230_DECOMP_GZIP_GZIP_SRC_SIZE: + value =3D s->gzip_src_size; + break; + case K230_DECOMP_GZIP_GZIP_OUT_SIZE: + value =3D s->gzip_out_size; + break; + case K230_DECOMP_GZIP_DECOMP_STAT: + value =3D s->decomp_stat; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: bad read offset 0x%" HWADDR_PRIx "\n", + TYPE_K230_DECOMP_GZIP, offset); + break; + } + + trace_k230_decomp_gzip_read(offset, size, value); + return value; +} + +static void k230_decomp_gzip_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + K230DecompGzipState *s =3D opaque; + + trace_k230_decomp_gzip_write(offset, size, value); + + switch (offset) { + case K230_DECOMP_GZIP_DECOMP_START: + s->decomp_start =3D value; + if (value & K230_DECOMP_GZIP_START) { + k230_decomp_gzip_start(s); + } + break; + case K230_DECOMP_GZIP_GZIP_SRC_SIZE: + s->gzip_src_size =3D value; + k230_decomp_gzip_update_ctrl_en(s); + break; + case K230_DECOMP_GZIP_GZIP_OUT_SIZE: + s->gzip_out_size =3D value; + break; + case K230_DECOMP_GZIP_DECOMP_STAT: + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: bad write offset 0x%" HWADDR_PRIx "\n", + TYPE_K230_DECOMP_GZIP, offset); + break; + } +} + +static const MemoryRegionOps k230_decomp_gzip_ops =3D { + .read =3D k230_decomp_gzip_read, + .write =3D k230_decomp_gzip_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid.min_access_size =3D 4, + .valid.max_access_size =3D 4, + .impl.min_access_size =3D 4, + .impl.max_access_size =3D 4, +}; + +static const VMStateDescription vmstate_k230_decomp_gzip_slot =3D { + .name =3D "k230.decomp-gzip.slot", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32(slot, K230DecompGzipSlotState), + VMSTATE_UINT32(current_offset, K230DecompGzipSlotState), + VMSTATE_END_OF_LIST() + } +}; + +static const VMStateDescription vmstate_k230_decomp_gzip =3D { + .name =3D "k230.decomp-gzip", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32(decomp_start, K230DecompGzipState), + VMSTATE_UINT32(gzip_src_size, K230DecompGzipState), + VMSTATE_UINT32(gzip_out_size, K230DecompGzipState), + VMSTATE_UINT32(decomp_stat, K230DecompGzipState), + VMSTATE_STRUCT(input, K230DecompGzipState, 1, + vmstate_k230_decomp_gzip_slot, + K230DecompGzipSlotState), + VMSTATE_STRUCT(output, K230DecompGzipState, 1, + vmstate_k230_decomp_gzip_slot, + K230DecompGzipSlotState), + VMSTATE_UINT32(total_requested, K230DecompGzipState), + VMSTATE_UINT32(total_produced, K230DecompGzipState), + VMSTATE_BOOL(active, K230DecompGzipState), + VMSTATE_BOOL(in_kick, K230DecompGzipState), + VMSTATE_BOOL(zstream_inited, K230DecompGzipState), + VMSTATE_BOOL(stream_end, K230DecompGzipState), + VMSTATE_UINT8_ARRAY(input_buf, K230DecompGzipState, + K230_DECOMP_GZIP_BLOCK_SIZE), + VMSTATE_UINT8_ARRAY(output_buf, K230DecompGzipState, + K230_DECOMP_GZIP_BLOCK_SIZE), + VMSTATE_END_OF_LIST() + } +}; + +static void k230_decomp_gzip_reset_hold(Object *obj, ResetType type) +{ + K230DecompGzipState *s =3D K230_DECOMP_GZIP(obj); + + k230_decomp_gzip_reset_stream(s); + memset(&s->zs, 0, sizeof(s->zs)); + s->decomp_start =3D 0; + s->gzip_src_size =3D 0; + s->gzip_out_size =3D 0; + s->decomp_stat =3D 0; + memset(&s->input, 0, sizeof(s->input)); + memset(&s->output, 0, sizeof(s->output)); + s->total_requested =3D 0; + s->total_produced =3D 0; + s->active =3D false; + s->in_kick =3D false; + s->stream_end =3D false; +} + +static void k230_decomp_gzip_realize(DeviceState *dev, Error **errp) +{ + K230DecompGzipState *s =3D K230_DECOMP_GZIP(dev); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); + + memory_region_init_io(&s->iomem, OBJECT(dev), &k230_decomp_gzip_ops, s, + TYPE_K230_DECOMP_GZIP, + K230_DECOMP_GZIP_MMIO_SIZE); + sysbus_init_mmio(sbd, &s->iomem); + qdev_init_gpio_in(dev, k230_decomp_gzip_handle_ack, + K230_DECOMP_GZIP_NUM_GPIOS_IN); + qdev_init_gpio_out(dev, s->signal_out, + K230_DECOMP_GZIP_NUM_GPIOS_OUT); +} + +static const Property k230_decomp_gzip_properties[] =3D { + DEFINE_PROP_UINT64("sram-base", K230DecompGzipState, sram_base, 0), +}; + +static void k230_decomp_gzip_class_init(ObjectClass *oc, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + ResettableClass *rc =3D RESETTABLE_CLASS(oc); + + dc->realize =3D k230_decomp_gzip_realize; + rc->phases.hold =3D k230_decomp_gzip_reset_hold; + device_class_set_props(dc, k230_decomp_gzip_properties); + dc->vmsd =3D &vmstate_k230_decomp_gzip; + dc->desc =3D "Kendryte K230 GZIP decompression engine"; +} + +static const TypeInfo k230_decomp_gzip_info =3D { + .name =3D TYPE_K230_DECOMP_GZIP, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(K230DecompGzipState), + .class_init =3D k230_decomp_gzip_class_init, +}; + +static void k230_decomp_gzip_register_types(void) +{ + type_register_static(&k230_decomp_gzip_info); +} + +type_init(k230_decomp_gzip_register_types) diff --git a/tests/qtest/k230-gsdma-test.c b/tests/qtest/k230-gsdma-test.c new file mode 100644 index 0000000000..44d4248739 --- /dev/null +++ b/tests/qtest/k230-gsdma-test.c @@ -0,0 +1,201 @@ +/* + * QTest testcase for K230 GSDMA + * + * Copyright (c) 2026 Tao Ding + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/bitops.h" +#include "exec/hwaddr.h" +#include "hw/dma/k230_gsdma.h" +#include "libqtest.h" + +#define K230_GSDMA_BASE 0x80800000 +#define TEST_LLT_ADDR0 0x10000 +#define TEST_LLT_ADDR1 0x10040 +#define TEST_LLT_ADDR2 0x10080 + +#define TEST_SRC_ADDR0 0x20000 +#define TEST_SRC_ADDR1 0x22000 +#define TEST_SRC_ADDR2 0x23000 +#define TEST_DST_ADDR0 0x30000 +#define TEST_DST_ADDR1 0x32000 +#define TEST_DST_ADDR2 0x33000 + +static inline uint64_t gsdma_reg(hwaddr off) +{ + return K230_GSDMA_BASE + off; +} + +static inline uint64_t gsdma_ch_reg(unsigned int ch, hwaddr off) +{ + return K230_GSDMA_BASE + K230_GSDMA_CH_BASE + + ch * K230_GSDMA_CH_STRIDE + off; +} + +static void write_sdma_llt_node_full(QTestState *qts, hwaddr addr, + uint32_t cfg, hwaddr src, + uint32_t size, hwaddr dst, + hwaddr next) +{ + qtest_writel(qts, addr + offsetof(K230GSDMALLT, cfg), cfg); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, src_addr), src); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, line_size), size); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, line_cfg), 0x1); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, dst_addr), dst); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, next_llt_addr), next); +} + +static void write_sdma_llt_node(QTestState *qts, hwaddr addr, uint32_t cfg, + uint32_t next) +{ + write_sdma_llt_node_full(qts, addr, cfg, 0x11110000, 0x200, + 0x22220000, next); +} + +static void fill_pattern(uint8_t *buf, size_t size, uint8_t seed) +{ + for (size_t i =3D 0; i < size; i++) { + buf[i] =3D seed + i * 37; + } +} + +static void test_global_registers(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + g_assert_cmphex(qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_CFG)), =3D= =3D, + K230_GSDMA_DMA_CFG_RESET); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_CH_EN), 0xff); + g_assert_cmphex(qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_CH_EN)), =3D= =3D, + K230_GSDMA_DMA_CH_EN_MASK); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_INT_MASK), 0x12345); + g_assert_cmphex(qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_INT_MASK)), = =3D=3D, + 0x12345); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_CFG), 0xa5a5a5a5); + g_assert_cmphex(qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_CFG)), =3D= =3D, + 0xa5a5a5a5); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_WEIGHT), 0xff55aa55); + g_assert_cmphex(qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_WEIGHT)), = =3D=3D, + 0x55aa55); + + qtest_quit(qts); +} + +static void test_sdma_pause_resume(void) +{ + uint32_t int_stat; + QTestState *qts =3D qtest_init("-machine k230"); + + write_sdma_llt_node(qts, TEST_LLT_ADDR0, K230_GSDMA_LLT_PAUSE, + TEST_LLT_ADDR1); + write_sdma_llt_node(qts, TEST_LLT_ADDR1, K230_GSDMA_LLT_NODE_INTR, 0); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_CH_EN), BIT(0)); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_LLT_SADDR), TEST_LLT_A= DDR0); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CTL), K230_GSDMA_CTL_S= TART); + + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_STATUS)= ), =3D=3D, + K230_GSDMA_SDMA_STATUS_PAUSE); + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CURRENT= _LLT)), + =3D=3D, TEST_LLT_ADDR0); + + int_stat =3D qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_INT_STAT)); + g_assert_cmphex(int_stat & K230_GSDMA_SDMA_PAUSE_INT(0), =3D=3D, + K230_GSDMA_SDMA_PAUSE_INT(0)); + g_assert_cmphex(int_stat & K230_GSDMA_SDMA_DONE_INT(0), =3D=3D, 0); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_INT_STAT), int_stat); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CTL), K230_GSDMA_CTL_R= ESUME); + + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_STATUS)= ), =3D=3D, + 0); + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CURRENT= _LLT)), + =3D=3D, TEST_LLT_ADDR1); + + int_stat =3D qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_INT_STAT)); + g_assert_cmphex(int_stat & K230_GSDMA_SDMA_DONE_INT(0), =3D=3D, + K230_GSDMA_SDMA_DONE_INT(0)); + g_assert_cmphex(int_stat & K230_GSDMA_SDMA_ITEM_INT(0), =3D=3D, + K230_GSDMA_SDMA_ITEM_INT(0)); + + qtest_quit(qts); +} + +static void test_sdma_three_llt_copy(void) +{ + uint8_t src0[0x1000]; + uint8_t src1[1]; + uint8_t src2[511]; + uint8_t dst0[sizeof(src0)]; + uint8_t dst1[sizeof(src1)]; + uint8_t dst2[sizeof(src2)]; + uint32_t int_stat; + QTestState *qts =3D qtest_init("-machine k230"); + + fill_pattern(src0, sizeof(src0), 0x10); + fill_pattern(src1, sizeof(src1), 0x31); + fill_pattern(src2, sizeof(src2), 0x52); + memset(dst0, 0xa5, sizeof(dst0)); + memset(dst1, 0xa5, sizeof(dst1)); + memset(dst2, 0xa5, sizeof(dst2)); + + qtest_memwrite(qts, TEST_SRC_ADDR0, src0, sizeof(src0)); + qtest_memwrite(qts, TEST_SRC_ADDR1, src1, sizeof(src1)); + qtest_memwrite(qts, TEST_SRC_ADDR2, src2, sizeof(src2)); + qtest_memwrite(qts, TEST_DST_ADDR0, dst0, sizeof(dst0)); + qtest_memwrite(qts, TEST_DST_ADDR1, dst1, sizeof(dst1)); + qtest_memwrite(qts, TEST_DST_ADDR2, dst2, sizeof(dst2)); + + write_sdma_llt_node_full(qts, TEST_LLT_ADDR0, 0, TEST_SRC_ADDR0, + sizeof(src0), TEST_DST_ADDR0, TEST_LLT_ADDR1); + write_sdma_llt_node_full(qts, TEST_LLT_ADDR1, 0, TEST_SRC_ADDR1, + sizeof(src1), TEST_DST_ADDR1, TEST_LLT_ADDR2); + write_sdma_llt_node_full(qts, TEST_LLT_ADDR2, 0, TEST_SRC_ADDR2, + sizeof(src2), TEST_DST_ADDR2, 0); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_CH_EN), BIT(0)); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_LLT_SADDR), TEST_LLT_A= DDR0); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CTL), K230_GSDMA_CTL_S= TART); + + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_STATUS)= ), =3D=3D, + 0); + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CURRENT= _LLT)), + =3D=3D, TEST_LLT_ADDR2); + + int_stat =3D qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_INT_STAT)); + g_assert_cmphex(int_stat & K230_GSDMA_SDMA_DONE_INT(0), =3D=3D, + K230_GSDMA_SDMA_DONE_INT(0)); + g_assert_cmphex(int_stat & K230_GSDMA_SDMA_PAUSE_INT(0), =3D=3D, 0); + + memset(dst0, 0, sizeof(dst0)); + memset(dst1, 0, sizeof(dst1)); + memset(dst2, 0, sizeof(dst2)); + qtest_memread(qts, TEST_DST_ADDR0, dst0, sizeof(dst0)); + qtest_memread(qts, TEST_DST_ADDR1, dst1, sizeof(dst1)); + qtest_memread(qts, TEST_DST_ADDR2, dst2, sizeof(dst2)); + + g_assert_cmpmem(dst0, sizeof(dst0), src0, sizeof(src0)); + g_assert_cmpmem(dst1, sizeof(dst1), src1, sizeof(src1)); + g_assert_cmpmem(dst2, sizeof(dst2), src2, sizeof(src2)); + + qtest_quit(qts); +} + +int main(int argc, char **argv) +{ + g_test_init(&argc, &argv, NULL); + + qtest_add_func("/k230-gsdma/global-registers", test_global_registers); + qtest_add_func("/k230-gsdma/sdma-pause-resume", test_sdma_pause_resume= ); + qtest_add_func("/k230-gsdma/sdma-three-llt-copy", + test_sdma_three_llt_copy); + + return g_test_run(); +} diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index b8860dd3e7..46e3c03cc8 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -260,4 +260,7 @@ config XLNX_ZYNQ_DDRC config AXIADO_CLK bool =20 +config K230_DECOMP_GZIP + bool + source macio/Kconfig diff --git a/hw/misc/meson.build b/hw/misc/meson.build index 15a06974f1..f67ad424cd 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -38,6 +38,7 @@ system_ss.add(when: 'CONFIG_SIFIVE_E_PRCI', if_true: file= s('sifive_e_prci.c')) system_ss.add(when: 'CONFIG_SIFIVE_E_AON', if_true: files('sifive_e_aon.c'= )) system_ss.add(when: 'CONFIG_SIFIVE_U_OTP', if_true: files('sifive_u_otp.c'= )) system_ss.add(when: 'CONFIG_SIFIVE_U_PRCI', if_true: files('sifive_u_prci.= c')) +system_ss.add(when: 'CONFIG_K230_DECOMP_GZIP', if_true: files('k230_decomp= _gzip.c')) =20 subdir('macio') =20 diff --git a/hw/misc/trace-events b/hw/misc/trace-events index c9a868b3ef..16db4ba0cc 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -442,3 +442,7 @@ iommu_testdev_dma_read(uint64_t gva, uint32_t len) "gva= =3D0x%" PRIx64 " len=3D%u" iommu_testdev_dma_verify(uint32_t expected, uint32_t actual) "expected=3D0= x%x actual=3D0x%x" iommu_testdev_dma_result(uint32_t result) "DMA completed result=3D0x%x" iommu_testdev_dma_armed(bool armed) "armed=3D%d" + +# k230_decomp_gzip.c +k230_decomp_gzip_read(uint64_t offset, unsigned int size, uint64_t value) = "K230 DECOMP GZIP read: [0x%"PRIx64"] size %u -> 0x%"PRIx64 +k230_decomp_gzip_write(uint64_t offset, unsigned int size, uint64_t value)= "K230 DECOMP GZIP write: [0x%"PRIx64"] size %u <- 0x%"PRIx64 diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 49b654036a..7d8e8c6491 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -298,7 +298,7 @@ qtests_riscv64 =3D ['riscv-csr-test'] + \ config_all_devices.has_key('CONFIG_RISCV_IOMMU') ? ['iommu-riscv-test'] : []) + \ (config_all_devices.has_key('CONFIG_K230') ? - ['k230-ddr-test', 'k230-wdt-test'] : []) + ['k230-ddr-test', 'k230-wdt-test', 'k230-gsdma-test'] : []) =20 qtests_hexagon =3D ['boot-serial-test', 'l2vic-test', 'qct-qtimer-test'] =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197534; cv=none; d=zohomail.com; s=zohoarc; b=YhnQNAicBwpFXsfeKwaLNOh5YBom/OBBvPJagZ6bspAGaA4i41mL6uHwhTEXe3hiVVGIT7FvmCVDJ2GgTjRrq8HF0grrTTAbragudZEczYM5kYtZA/kg+BHE/ilMtZEUvUFOc1FhWKvkRFP5n2dhjUFUMWtNu2YPiFT2zbsxI6c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197534; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qZOFXhGNRxNOm5KFMFQUurJQSlkP1SuCKksgxHQSBBc=; b=H39/KgtA+X4ywsHahrxYAg9bgvXqYQlWtNT0OVTn4UnfKDUq6Hx6Kt2MnOxfGsDufdqBzryqY9nwilLwmL9xrL0OG38VOSx1GeE13PQe7/WZDyqaZiVIHnOtKRF8xaJbF+lDfQSsu9rpwbl1GYmSJlluDviXErXhqRQfB8PiDZg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197534121641.6286389767628; Wed, 19 Aug 2026 20:45:34 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiJ-00073J-7K; Wed, 19 Aug 2026 23:45:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiI-0006zy-5q for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:10 -0400 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiG-0003o8-Gn for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:09 -0400 Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-8486ac3f347so399326b3a.1 for ; Wed, 19 Aug 2026 20:45:08 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197507; x=1787802307; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=qZOFXhGNRxNOm5KFMFQUurJQSlkP1SuCKksgxHQSBBc=; b=f9JotdpJGo8Y0LLbfBdxkBzCPIy36GmGJsbvK2UZ+WvKlEJdSjmxXMHic7K6O+TjHc qatJTJ0OVdJqOF/gc86Abg/pQTnf3aLjoGC0N32WI1dZ+jr7C9c9Z+PylK3sSqazpVMI VVinJ/X5uSNQSffNfdWletnleyeTraVwQ7JPJAwfTLT9mY272tOgtVaJ8wSCKrjxc7ry d1VR75+Bv0snjqLJjFamnCKZ4b9xd10UqkDlZcsfVqINZNjrrhz8hvDdQoQsR5o+AOv/ zvrLmyTMAw1g1/ULApVZYkWEKD6m07iapl39HxAeBXu396lUI5NIzIFBvGs5y6Ti5GGF fVgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197507; x=1787802307; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=qZOFXhGNRxNOm5KFMFQUurJQSlkP1SuCKksgxHQSBBc=; b=M6gza64N9mKXeas44CvZe2kIlTkG0Dx6JJJ2FhrlVHfwWqgFqDN3tNI1UiXDkqwp/w dxapTYyRtSoEKCIbtKDBw5oqHllMBiLHIUHEjqCEd2a2cekmzgRaXFxLn7YFDJT7ygFF ignPrR9jMLxFNsGIfUazuBV3/49ZtAGu7QCR0jz77m/f9p3PZkEgMJklX4t6kXz/KC0W eevbYwhxDA24T0Hsrzv7zsddGGN5s0irghJlnif/VmKbbu6t2nSaTMMFafcEA5Kn9uJz Ji6twT7U1xumifR7/JtGiSKWTRg+jKkSlmpm+L/82cvzBTtR2Ehp6IHi1//8G/MkYTCw BOmg== X-Gm-Message-State: AOJu0YxD+LWbjfplP20YmGc38NfwOqNl4HyhXcDf33dZFx4j5xtYY5+a ia+7hWgspz8FD3NE+raor60maTqNvkKwHWkhDHccy5hVWOJzAF/7WRH+/d3Ydw== X-Gm-Gg: AR+sD12oob8GY8klFRKpcRUH0yJXzGPDbAp3tKdvx62vq87u/H6BjUkEvGiQry1tEzp NAAWC28FTYuuYMN0YS1tVfRaXPQkOrcFHHrtMfLm1Al3EIbPiwjRdT+4q9MjWDnuLABRCx6HvNV w9TyXj1Cc7cFy/7Up26iR20bIeIHZNVUooOnwhQ2MMMyXMbDk7q5BsW+PcCFQA5kLMQdogiRZnw 8/PBLzbALHwSEDnOiJTk+Yz58Sr0FcSkDhNSOKuk1T1nP8mj1ZubdbQYmXkySQEkbvruyl7W826 oIzFghy2PaZjFidgT1tFFUoeid3mZ2ylBtjdTaRVBBvyqIloITPEpZSxcElpI6aYWJFSFM0aoCm ieIo9mWbKMny3ZmkNQ2its6ebopnbAUPLPZZE5lsX+83MXF3EoOFdy2o6UY2DiF2vCN6bcDGye5 q1XY5Y8NEgfNZ/B2+dH1xAhokRnMNnMzC85AFhmSRean6/dIjnQdV3yOVjpNTk+YYfX/vid6fBT kgoUg== X-Received: by 2002:a05:6a21:c188:b0:3cc:f9a0:3ada with SMTP id adf61e73a8af0-3cd14fbd28cmr3603558637.16.1787197506930; Wed, 19 Aug 2026 20:45:06 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Tao Ding , Junze Cao , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 08/93] hw/riscv: k230: add decomp gzip in K230 board Date: Thu, 20 Aug 2026 13:43:05 +1000 Message-ID: <20260820034430.1186695-9-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=alistair23@gmail.com; helo=mail-pf1-x42e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197536451158500 Content-Type: text/plain; charset="utf-8" From: Tao Ding This commit replaces the unimplemented part of Decomp_gzip in K230. Connect to the handshake interface of GSDMA. Signed-off-by: Tao Ding Reviewed-by: Junze Cao Reviewed-by: Daniel Henrique Barboza Message-ID: <20260808062227.66961-6-dingtao0430@163.com> Signed-off-by: Alistair Francis --- include/hw/riscv/k230.h | 2 ++ hw/riscv/k230.c | 23 +++++++++++++++++++---- hw/riscv/Kconfig | 1 + 3 files changed, 22 insertions(+), 4 deletions(-) diff --git a/include/hw/riscv/k230.h b/include/hw/riscv/k230.h index 8879d56d98..8679d09891 100644 --- a/include/hw/riscv/k230.h +++ b/include/hw/riscv/k230.h @@ -20,6 +20,7 @@ #include "hw/riscv/riscv_hart.h" #include "hw/watchdog/k230_wdt.h" #include "hw/dma/k230_gsdma.h" +#include "hw/misc/k230_decomp_gzip.h" =20 #define C908_CPU_HARTID (0) =20 @@ -38,6 +39,7 @@ typedef struct K230SoCState { K230DDRPhyState ddr_phy; K230WdtState wdt[2]; K230GSDMAState gsdma; + K230DecompGzipState decomp_gzip; MemoryRegion sram; MemoryRegion bootrom; =20 diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c index 49c3b50c57..5163eaa7ef 100644 --- a/hw/riscv/k230.c +++ b/hw/riscv/k230.c @@ -117,6 +117,8 @@ static void k230_soc_init(Object *obj) object_initialize_child(obj, "k230-wdt0", &s->wdt[0], TYPE_K230_WDT); object_initialize_child(obj, "k230-wdt1", &s->wdt[1], TYPE_K230_WDT); object_initialize_child(obj, "k230-gsdma", &s->gsdma, TYPE_K230_GSDMA); + object_initialize_child(obj, "k230-decomp-gzip", &s->decomp_gzip, + TYPE_K230_DECOMP_GZIP); =20 qdev_prop_set_uint32(DEVICE(cpu0), "hartid-base", 0); qdev_prop_set_string(DEVICE(cpu0), "cpu-type", TYPE_RISCV_CPU_THEAD_C9= 08); @@ -231,6 +233,23 @@ static void k230_soc_realize(DeviceState *dev, Error *= *errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->gsdma), 0, qdev_get_gpio_in(DEVICE(s->c908_plic), K230_GSDMA_I= RQ)); =20 + /* Decomp gzip */ + qdev_prop_set_uint64(DEVICE(&s->decomp_gzip), "sram-base", + memmap[K230_DEV_SRAM].base); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->decomp_gzip), errp)) { + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->decomp_gzip), 0, + memmap[K230_DEV_DECOMP_GZIP].base); + for (int i =3D 0; i < K230_DECOMP_GZIP_NUM_GPIOS_OUT; i++) { + qdev_connect_gpio_out(DEVICE(&s->decomp_gzip), i, + qdev_get_gpio_in(DEVICE(&s->gsdma), i)); + } + for (int i =3D 0; i < K230_DECOMP_GZIP_NUM_GPIOS_IN; i++) { + qdev_connect_gpio_out(DEVICE(&s->gsdma), i, + qdev_get_gpio_in(DEVICE(&s->decomp_gzip), i)= ); + } + /* unimplemented devices */ create_unimplemented_device("kpu.l2-cache", memmap[K230_DEV_KPU_L2_CACHE].base, @@ -249,10 +268,6 @@ static void k230_soc_realize(DeviceState *dev, Error *= *errp) create_unimplemented_device("dma", memmap[K230_DEV_DMA].base, memmap[K230_DEV_DMA].size); =20 - create_unimplemented_device("decomp-gzip", - memmap[K230_DEV_DECOMP_GZIP].base, - memmap[K230_DEV_DECOMP_GZIP].size); - create_unimplemented_device("2d-engine.non-ai", memmap[K230_DEV_NON_AI_2D].base, memmap[K230_DEV_NON_AI_2D].size); diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index d28ac06043..d06ac26648 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -163,3 +163,4 @@ config K230 select UNIMP select K230_WDT select K230_GSDMA + select K230_DECOMP_GZIP --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198297; cv=none; d=zohomail.com; s=zohoarc; b=VgagMjRusXQiX5updvw7gqwJDxyr4EH8poTguPuQdRtGHzBqFttanv9AGtWZQEqZWPOYK8wk6JrNZFsDAWczfq/69qxRIxHRtxwQhrayXjAiyoOU+bBgMPjJ31ApEn+/Tk4HlRwfaKTFz5sgeakrfoMgCPA8Pww0WRpLQAboDLw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198297; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=9a3/1bxFihnrZ/FDVZb5ElrXA3E1zIJVg2BjvwAlr70=; b=hE4DwEGiXrNnEuZWzguTUjVnGAx7lhmShViuBnQdy+RfPEuXHCrFggTvcativrboVodlQzT81Jj+bV11VoY/UDbKfzncFkO5JGb4Oud8j/Cd+1bhNvyUeIujgC2O/+ATHEPn+CheotNxhfRNDYNGJB692ALyXZZw1KSnIW+l36c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198296999878.7421627174465; Wed, 19 Aug 2026 20:58:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiN-00074H-9R; Wed, 19 Aug 2026 23:45:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiL-000745-Qj for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:13 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiJ-0003oQ-Jn for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:13 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-cbe6295f05bso318670a12.1 for ; Wed, 19 Aug 2026 20:45:11 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197510; x=1787802310; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=9a3/1bxFihnrZ/FDVZb5ElrXA3E1zIJVg2BjvwAlr70=; b=EP/j3gmLKDfVfnES/xw6wsf2pHh0eG1DIXTAIp/A3qzYTNM8OCfrTu6cnO8daiMZ9Z lGMfZhKbMmpkLZJ09hNYkvjbTjSUQphlKLYFvgBVop1I2olSADbsX9UCTa1djsuAMmeh qBPVExUpC7+45AZ46GVRkddaUIxwG7q2c8rvekF0cF7i0P1crbK+Zqzn0jAuVfFw4FQa xdTrWutdUSo2iTBdDqpSzGvc1TFfG+DDPJ5FBEXDNCO8Ui0FODldoAgr8EU6ffp5q2dA cSV6nw9gYAHETZ/z1YM00I8WeWuNzBBZRs+MC7xisOqPmaESe5rGn0HNfD08srCc8kne /bBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197510; x=1787802310; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=9a3/1bxFihnrZ/FDVZb5ElrXA3E1zIJVg2BjvwAlr70=; b=K/mBh7onkUQo+pN8qE4FHTJ4oNNcwEqdFwz2jYbh3yQS0VY1rFGWiUOvqSShTF/BaG qiCRHyhjC5Z5r+FAOFNd66cR1lFEesjb9q/JQ8bpvxscI0gPmxsjchqgGZZ+3ftrVlnE TDumdy60G/6LcwmcCCiqbdkhnCrCvLVTJi+9x6mzMrlzh9NY3tcKcQ4+CJkFIx3W6Dvt JoR1zhiae5sNGRiHnt9t3DixcOXOaIUIHE9zSgEaEqSKDnudkzXFSCycf1G7u+M8QjeU g3mcUFowNRI6JZovpLlBSba0sEyKXhk+lFBtADgzxbbfTCDW9ivzu3Tq54IY5p1UDayy QoOg== X-Gm-Message-State: AFuF++lYAER6EOHfIxTP6UHd9GnYlRZsJ3m31I5X+P6Z428YdIQ5ygn4 KaH1VStQ7EnJxBAMs+xub4DlVfa/MU8Qnt3seU3LDcKsCigHrkmufhdQaICWxg== X-Gm-Gg: AR+sD11hd0UTxBYf5hB17IWZnGUqLZlZ9n2Ix8cfBkAXYVQ+gtaGCIavsd37fXRPEt0 Lp45QmC9eXLFsLBPlluy6ANeBM/O10LuB31Pp/OZAKbr9ZX2DXQ2r5RJxw7HK5I0ho3gZRXYCm2 Mm0EAMsO8zdcJAx7zZmDQuMnpKwxOypJer7n16FxT2daQSUU3O9xncZZf9Gei0AuuXbC4syCQX7 T+WA4H0F2vEeojim9NxZEtiE/AZ/ERWX01hBJgEYgRz26vNBG2hRyAIRouNF3Chn9NMwCTqGmTd TqN8nFxzXl0iDAnDuuJkzsPTlEH5IeIHA+ZhZNz82IKkBzuOcYqDE/CLS5RhqIdoPm7xg239YrC 3W519PwQLh2x5rgLWpBKuv/xAgLhql1HTADxLfa1zTmWl8zk1bj/aiOkds2boEyJDxRj0r7foUw bcoPOz0wtj8yuX+HF4qNXrrwNHR7BxOc0m7Tfit6Q4+OpEK6FiB8d1qxYzvG9Br6s5SGkYOtP/i m5brw== X-Received: by 2002:a17:90b:524a:b0:380:86d8:8162 with SMTP id 98e67ed59e1d1-395a07022b9mr4716956a91.18.1787197510069; Wed, 19 Aug 2026 20:45:10 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Tao Ding , Daniel Henrique Barboza , Junze Cao , Alistair Francis Subject: [PULL 09/93] tests/qtest: add test for K230 decomp gzip Date: Thu, 20 Aug 2026 13:43:06 +1000 Message-ID: <20260820034430.1186695-10-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198298302158500 Content-Type: text/plain; charset="utf-8" From: Tao Ding This commit adds test cases for Decomp_gzip. A compressed data segment has been pre-set, configure GSDMA and decomp_gzip. Compare the decompressed data with the original data Update MAINTAINERS for this test. Run this qtest: $ mkdir build && cd build && ../configure --target-list=3D"riscv64-soft= mmu" $ QTEST_QEMU_BINARY=3D./qemu-system-riscv64 tests/qtest/k230-decomp-g= zip-test Signed-off-by: Tao Ding Reviewed-by: Daniel Henrique Barboza Reviewed-by: Junze Cao Message-ID: <20260808062227.66961-7-dingtao0430@163.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 1 + tests/qtest/k230-decomp-gzip-test.c | 200 ++++++++++++++++++++++++++++ tests/qtest/meson.build | 2 +- 3 files changed, 202 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/k230-decomp-gzip-test.c diff --git a/MAINTAINERS b/MAINTAINERS index 84b6e4a72a..8066bb92a0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1857,6 +1857,7 @@ F: tests/functional/riscv64/test_k230.py F: tests/qtest/k230-ddr-test.c F: tests/qtest/k230-wdt-test.c F: tests/qtest/k230-gsdma-test.c +F: tests/qtest/k230-decomp-gzip-test.c =20 RX Machines ----------- diff --git a/tests/qtest/k230-decomp-gzip-test.c b/tests/qtest/k230-decomp-= gzip-test.c new file mode 100644 index 0000000000..e80113fd28 --- /dev/null +++ b/tests/qtest/k230-decomp-gzip-test.c @@ -0,0 +1,200 @@ +/* + * QTest testcase for K230 GZIP decompression engine + * + * Copyright (c) 2026 Tao Ding + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/bitops.h" +#include "libqtest.h" +#include "hw/dma/k230_gsdma.h" +#include "hw/misc/k230_decomp_gzip.h" + +#define K230_DECOMP_GZIP_BASE 0x80808000 +#define K230_GSDMA_BASE 0x80800000 +#define K230_SRAM_BASE 0x80200000 +#define TEST_LLT_ADDR0 0x01000000 +#define TEST_LLT_ADDR1 0x01000040 +#define TEST_SRC_ADDR 0x01100000 +#define TEST_DST_ADDR 0x01200000 + +#define TEST_PAYLOAD_LEN (sizeof(test_payload) - 1) + +static inline uint64_t gzip_reg(hwaddr off) +{ + return K230_DECOMP_GZIP_BASE + off; +} + +static inline uint64_t gsdma_reg(hwaddr off) +{ + return K230_GSDMA_BASE + off; +} + +static inline uint64_t gsdma_ch_reg(unsigned int ch, hwaddr off) +{ + return K230_GSDMA_BASE + K230_GSDMA_CH_BASE + + ch * K230_GSDMA_CH_STRIDE + off; +} + +static inline hwaddr k230_sram_addr(hwaddr off) +{ + return K230_SRAM_BASE + off; +} + +static inline hwaddr k230_sram_input_addr(unsigned int slot) +{ + return k230_sram_addr(K230_DECOMP_GZIP_SRAM_IN_BASE + + slot * K230_DECOMP_GZIP_BLOCK_SIZE); +} + +/* + * test_gzip_data was generated by compressing test_payload in gzip format + * using Dynamic Huffman coding. The compression method byte in the gzip + * header was then changed from the standard value 0x08 to the K230-specif= ic + * value 0x09. + */ +static const uint8_t test_gzip_data[] =3D { + 0x1f, 0x8b, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x04, 0x03, 0x05, 0xc1, 0xb1, 0x0d, 0x00, 0x20, + 0x08, 0x04, 0xc0, 0x9e, 0x29, 0x7e, 0x04, 0x23, + 0x63, 0x38, 0x85, 0x05, 0x21, 0x14, 0x10, 0x23, + 0x5f, 0x39, 0xbd, 0x77, 0x6b, 0xea, 0x80, 0xbf, + 0x38, 0x68, 0x5e, 0xdb, 0x19, 0xe5, 0xa0, 0x35, + 0x65, 0x4d, 0x1d, 0xf0, 0x17, 0x07, 0xcd, 0x6b, + 0x3b, 0xa3, 0x1c, 0xb4, 0xa6, 0xac, 0xa9, 0x03, + 0xfe, 0xe2, 0xa0, 0x79, 0x6d, 0x67, 0x94, 0x83, + 0xd6, 0x94, 0x35, 0x75, 0xc0, 0x5f, 0x1c, 0x34, + 0xaf, 0xed, 0x8c, 0x72, 0xd0, 0x9a, 0xb2, 0xa6, + 0x0e, 0xf8, 0x8b, 0x83, 0xe6, 0xb5, 0x9d, 0x51, + 0x0e, 0x5a, 0x53, 0xd6, 0xd4, 0x01, 0x7f, 0x71, + 0xd0, 0xbc, 0xb6, 0x33, 0xca, 0x41, 0x6b, 0xca, + 0x9a, 0x3a, 0xe0, 0x2f, 0x0e, 0x9a, 0xd7, 0x76, + 0x46, 0x39, 0x68, 0x4d, 0x59, 0x53, 0x07, 0xfc, + 0xc5, 0x41, 0xf3, 0xda, 0xce, 0x28, 0x07, 0xad, + 0x29, 0x1f, 0xdb, 0x9d, 0xbc, 0xdd, 0xc8, 0x00, + 0x00, 0x00, +}; + +static const uint8_t test_payload[] =3D + "K230 gzip streaming test\n" + "K230 gzip streaming test\n" + "K230 gzip streaming test\n" + "K230 gzip streaming test\n" + "K230 gzip streaming test\n" + "K230 gzip streaming test\n" + "K230 gzip streaming test\n" + "K230 gzip streaming test\n"; + +static void write_sdma_llt_node(QTestState *qts, hwaddr addr, uint32_t src, + uint32_t dst, uint32_t len, uint32_t next) +{ + qtest_writel(qts, addr + offsetof(K230GSDMALLT, cfg), 0); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, src_addr), src); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, line_size), len); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, line_cfg), 0x1); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, dst_addr), dst); + qtest_writel(qts, addr + offsetof(K230GSDMALLT, next_llt_addr), next); +} + +static void test_reset_and_rw(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + g_assert_cmphex(qtest_readl(qts, gzip_reg(K230_DECOMP_GZIP_DECOMP_STAR= T)), + =3D=3D, 0); + g_assert_cmphex(qtest_readl(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_SRC_SI= ZE)), + =3D=3D, 0); + g_assert_cmphex(qtest_readl(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_OUT_SI= ZE)), + =3D=3D, 0); + g_assert_cmphex(qtest_readl(qts, gzip_reg(K230_DECOMP_GZIP_DECOMP_STAT= )), + =3D=3D, 0); + + qtest_writel(qts, gzip_reg(K230_DECOMP_GZIP_DECOMP_START), + K230_DECOMP_GZIP_START); + + qtest_writel(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_SRC_SIZE), 0xffffffff= ); + g_assert_cmphex(qtest_readl(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_SRC_SI= ZE)), + =3D=3D, 0xffffffff); + + qtest_writel(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_OUT_SIZE), 0x12345678= ); + g_assert_cmphex(qtest_readl(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_OUT_SI= ZE)), + =3D=3D, 0x12345678); + + qtest_quit(qts); +} + +static void test_gsdma_handshake_flow(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + uint32_t stat; + uint8_t output[TEST_PAYLOAD_LEN]; + + qtest_memwrite(qts, TEST_SRC_ADDR, test_gzip_data, sizeof(test_gzip_da= ta)); + write_sdma_llt_node(qts, TEST_LLT_ADDR0, TEST_SRC_ADDR, + k230_sram_input_addr(0), + sizeof(test_gzip_data), 0); + write_sdma_llt_node(qts, TEST_LLT_ADDR1, + k230_sram_addr(K230_DECOMP_GZIP_SRAM_OUT_BASE), + TEST_DST_ADDR, TEST_PAYLOAD_LEN, 0); + + qtest_writel(qts, gsdma_reg(K230_GSDMA_DMA_CH_EN), BIT(0) | BIT(1)); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CFG), + K230_GSDMA_CH0_CFG_DECOMP_CTRL_EN); + qtest_writel(qts, gsdma_ch_reg(1, K230_GSDMA_CH_CFG), 0); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_LLT_SADDR), TEST_LLT_A= DDR0); + qtest_writel(qts, gsdma_ch_reg(1, K230_GSDMA_CH_LLT_SADDR), TEST_LLT_A= DDR1); + qtest_writel(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CTL), K230_GSDMA_CTL_S= TART); + qtest_writel(qts, gsdma_ch_reg(1, K230_GSDMA_CH_CTL), K230_GSDMA_CTL_S= TART); + + g_assert_cmphex(qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_CH_EN)), + =3D=3D, BIT(0) | BIT(1)); + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_CFG)) & + K230_GSDMA_CH0_CFG_DECOMP_CTRL_EN, + =3D=3D, K230_GSDMA_CH0_CFG_DECOMP_CTRL_EN); + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(0, K230_GSDMA_CH_LLT_SAD= DR)), + =3D=3D, TEST_LLT_ADDR0); + g_assert_cmphex(qtest_readl(qts, gsdma_ch_reg(1, K230_GSDMA_CH_LLT_SAD= DR)), + =3D=3D, TEST_LLT_ADDR1); + + qtest_writel(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_SRC_SIZE), + K230_DECOMP_GZIP_CTRL_EN | sizeof(test_gzip_data)); + qtest_writel(qts, gzip_reg(K230_DECOMP_GZIP_GZIP_OUT_SIZE), + TEST_PAYLOAD_LEN); + qtest_writel(qts, gzip_reg(K230_DECOMP_GZIP_DECOMP_START), + K230_DECOMP_GZIP_START); + + stat =3D qtest_readl(qts, gzip_reg(K230_DECOMP_GZIP_DECOMP_STAT)); + g_assert_cmphex(stat & K230_DECOMP_GZIP_STAT_CRC_OK, =3D=3D, + K230_DECOMP_GZIP_STAT_CRC_OK); + + g_assert_cmphex(qtest_readl(qts, + gsdma_ch_reg(0, K230_GSDMA_CH_CURRENT_LLT)= ), + =3D=3D, TEST_LLT_ADDR0); + g_assert_cmphex(qtest_readl(qts, + gsdma_ch_reg(1, K230_GSDMA_CH_CURRENT_LLT)= ), + =3D=3D, TEST_LLT_ADDR1); + + stat =3D qtest_readl(qts, gsdma_reg(K230_GSDMA_DMA_INT_STAT)); + g_assert_cmphex(stat & K230_GSDMA_SDMA_DONE_INT(0), =3D=3D, + K230_GSDMA_SDMA_DONE_INT(0)); + g_assert_cmphex(stat & K230_GSDMA_SDMA_DONE_INT(1), =3D=3D, + K230_GSDMA_SDMA_DONE_INT(1)); + + qtest_memread(qts, TEST_DST_ADDR, output, sizeof(output)); + g_assert_cmpmem(output, sizeof(output), test_payload, TEST_PAYLOAD_LEN= ); + + qtest_quit(qts); +} + +int main(int argc, char **argv) +{ + g_test_init(&argc, &argv, NULL); + + qtest_add_func("/k230-decomp-gzip/reset-and-rw", test_reset_and_rw); + qtest_add_func("/k230-decomp-gzip/gsdma-handshake-flow", + test_gsdma_handshake_flow); + + return g_test_run(); +} diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 7d8e8c6491..c58d1a657c 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -298,7 +298,7 @@ qtests_riscv64 =3D ['riscv-csr-test'] + \ config_all_devices.has_key('CONFIG_RISCV_IOMMU') ? ['iommu-riscv-test'] : []) + \ (config_all_devices.has_key('CONFIG_K230') ? - ['k230-ddr-test', 'k230-wdt-test', 'k230-gsdma-test'] : []) + ['k230-ddr-test', 'k230-wdt-test', 'k230-gsdma-test', 'k230-decomp-gzip= -test'] : []) =20 qtests_hexagon =3D ['boot-serial-test', 'l2vic-test', 'qct-qtimer-test'] =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197904; cv=none; d=zohomail.com; s=zohoarc; b=RihoXGk2srvEq94CXHWqVjYVed/wSLL3GbY2Kdm5gO9g56eqNjQTJILQ8AeAxglUnqSmDw5bkj5G1o1E5yI0uePANOoCRtgjqDfGAM4XWCev+UjCot6jC3sceuTMNQVvgTpRVmMqFxZujTlCorE/Nxy5GiaLxzYD98t1hsEN8n0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197904; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=lfg+S33mxYhTkp+vJzcce1d3QWdWhesMvM16KE705Pg=; b=KlnTGIl1jgpJ2VX7ejaFr3tgl1HTAieebbVqp9jDbNFURWViwNZBc1hk2sSQyVDOvZezi32CHwnKrkWVhB8SUKzL7BP4JRzU21P8daVIr3Khe0aqa7tJInZocNfU2uWfpF+LYdM/sUOlrODSG8ndA2hr5WB2jG12f/Rl0pzq2jQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197903965327.0825249872988; Wed, 19 Aug 2026 20:51:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiP-00074i-ON; Wed, 19 Aug 2026 23:45:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiO-00074Y-2A for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:16 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiM-0003oc-I2 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:15 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-381b831d535so2764515a91.0 for ; Wed, 19 Aug 2026 20:45:14 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197513; x=1787802313; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=lfg+S33mxYhTkp+vJzcce1d3QWdWhesMvM16KE705Pg=; b=GEKWLICNHxlAnq6SPDc7lbRKFYUJDJ6PrVPg+tr7KxvEOCUTDKfN7fCdmcKS+d5XI2 iAa6WxHAIXj9jumqlDgH6vsiUDY/DVhUvepI1ScdWtseaYO7I+NLMwUWhxWxi1OIV8tX Rv6JA8zg3C8Ek/LIGWLe9IDAzMOfe1S/UQMaX0D8jzBgKnHdTRiKJBKeV4BDv9jzRIOO Waz/xqrCdZq4fw6ekmLfJHA6cqdFPb7o5wAn0WlHdo92EfEjt0mDhpx5QC8605LHx6+o zWNcnfCbZcqAl+aof8aj5oiyXu5PFxPreCjtaz1BDG6hxSSBa0Qill17i/4TkqR34KeA s9mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197513; x=1787802313; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=lfg+S33mxYhTkp+vJzcce1d3QWdWhesMvM16KE705Pg=; b=ITjlCvEE8cxMB6DlIJjDUfTYXBS3tA8ylfe4RWBnu/h5ybX/RMsWXZiXubov8albAs 9xLKvIeTNrh3qZCquBLbtQN4l4OYHrp0B3FUwQq1ZK8saiqB61WA7jMN81HS9iymRXrh Vttyv6BBPfWNqmk4bW8lSl5icZaIwsVynw53nHjx9HaB7G3WjIxvYzW80llkNY0OxdBc Z9eRs36WvS1mXo/9XOOmTtfOmQwXcc9e4oD2r8/k9CGhoZKXevdNHalaasFoirb/yBQ0 Qwjiw0v5QktC5ju8EguEaA6j2JGKN5lmdj1lFEQjfNi7lgPQriJBABV/WTznfg8wxzGA B7kg== X-Gm-Message-State: AFuF++m74le/aStXSeETsBPU1i3wvP6EEmcnGEVS1+3w3uHiv25b1sI4 Cai4xL/EE2RO9ieeUufB3ofuTkxuNIMoZMntnW/4PKvNumKNCaGY1QOOFlaRgw== X-Gm-Gg: AR+sD112RbvyTIKPCRv5EfiLfyA9nPWiYTgoOl3t7BT1JW3uHQI/hW0hqGrkuUgt/mZ K/a3Kal8ggVpvFUlUorimiT3npqLcYDDr+I8sTIxtSIJ790Ww4cVP4frWvnzhT6jjBASUS1/8jR rz1G3J2WQnVWD8ttk68b/t1XtMFywv1uMnhI35v4J1DrZfqeznngiBrSogBvlbcBos+qpgSTXVV eFpw7/NFmJrTKJiFP1BXg6114nkrLR/zKgijnv9OWfAzCLXSa7SNyvwz/PghctFR21XcReQSecE MZWE5mh7jqMTfqIDo5a6dIRSgNNvfbj90x+8MXhM3as8rrRkEGg43MsWHH6kWyVMn6lBxWAa9ck vRnK99sKFln62G1YPjEnvzEKJy9Vc+dgumEywqqzYycf3SNWCmEEunvEj0PgQMXlXKhJU+vGyoR 2Ae8x99Tb3213gyy6qOLvxSbDuqxsxEfaPasHEJSlrBqTVNFdzEu+GR2lEt9DwMabzluX6UyZbV oyVzyoNdZlc9eNuhrQ0dXshauBc X-Received: by 2002:a17:90a:e7cb:b0:38e:6f90:eabd with SMTP id 98e67ed59e1d1-39580aa5106mr17743204a91.5.1787197513245; Wed, 19 Aug 2026 20:45:13 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Tao Ding , Junze Cao , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 10/93] hw/riscv: k230: add a noc stub region in K230 board Date: Thu, 20 Aug 2026 13:43:07 +1000 Message-ID: <20260820034430.1186695-11-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197905025158500 Content-Type: text/plain; charset="utf-8" From: Tao Ding The NOC address was accessed in the k230_unzip driver, but it is currently = not in k230. This commit uses create_unimplemented_device to preset the region. Signed-off-by: Tao Ding Reviewed-by: Junze Cao Reviewed-by: Daniel Henrique Barboza Message-ID: <20260808062227.66961-8-dingtao0430@163.com> Signed-off-by: Alistair Francis --- hw/riscv/k230.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c index 5163eaa7ef..558f30b97e 100644 --- a/hw/riscv/k230.c +++ b/hw/riscv/k230.c @@ -250,6 +250,9 @@ static void k230_soc_realize(DeviceState *dev, Error **= errp) qdev_get_gpio_in(DEVICE(&s->decomp_gzip), i)= ); } =20 + /* Noc stub, the k230 decomp_gzip driver in uboot will access this reg= ion */ + create_unimplemented_device("noc-stub", 0x91302000, 0x1000); + /* unimplemented devices */ create_unimplemented_device("kpu.l2-cache", memmap[K230_DEV_KPU_L2_CACHE].base, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197866; cv=none; d=zohomail.com; s=zohoarc; b=Y5qVkFVS9unS5gAVc1OAmo1X5720YoT6EkHS2cYRLjo0TralOFyzm0R6PjQGsWktRi6x2nxT4fQU4XfkK/fn5TVEo2vCW755iDj9O+wjwiOLR4Zzs95cMtk0JlzvXGj7Q/4hYGEq2XT8+Fc5lKdiVk5aKtt/EF13OmHROTfkJPA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197866; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=JtX66qmQh5hGei4ld9cb4CgJsixrU426wPgSFrendcA=; b=TZ7vu0H0sv5ZvJo+NjfHc44wEQzVSrkFmqU0YuiZHS3EdEYt2dyLy/jaOkmP3a54AyO66jebpOL3rIpK31zE8H3Z9tz71UMhR5ox6uWNZqwAFoIIuYSNDwbGf4n+Q8rBM02kLhz9ovqYGwuEAAVfRnhyQWy/Exj44FIvpeVso64= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197866115224.40031580489847; Wed, 19 Aug 2026 20:51:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiT-00075N-Rp; Wed, 19 Aug 2026 23:45:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiR-00075B-9u for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:19 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiP-0003ox-My for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:18 -0400 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-2cf27856f9cso16857655ad.2 for ; Wed, 19 Aug 2026 20:45:17 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197516; x=1787802316; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=JtX66qmQh5hGei4ld9cb4CgJsixrU426wPgSFrendcA=; b=BOTf9BTCxaKt5+DSvfIhAF+8OMxFgfgHa0WuAsXaLlCivUx6E+uw/38qMmthTpdLT/ iwoWzuuThFZbbWnDMMLoQq3x5/cZbEI+4YI2H5yLD6pVW2/Fym3rEHFWHWN8bRHQ/Q2u +0QYtznVZSTdiMDMV+jKLMNM7oWhuQWpZO7yD0drX+KOV6bAePEI4IeVyqX684mvZ4TN VFeo+fR2mTIYfQiHpazLs5PMhV3p7vDa6YKSBX+u73HnyWcYe4VgK0khkzpACM+2VOV5 WqaadhwHuT3jzK4XdvkOqEfzKFlEPe6/5LTZD8+yY3XsFDd/Mh2sVV578YPZXSlRGfF5 h7YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197516; x=1787802316; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=JtX66qmQh5hGei4ld9cb4CgJsixrU426wPgSFrendcA=; b=fTFjzHhrYKM8ge8xQAHCLKncZTyMkG8pnnZNdWu99YssFWmbYmzY6hluA3AP9M6IOU 5x+spkSx79YzdP/qjZ0K6zy/zE1Qjahxm5P9o7hq8f3h03cdGW9NQ2cMen0PMR3Bx3tB 1taz5OCqwgBk/rDyoHVvn5k04dlQtbnH+3K/vi+vv/+96kcraQ5QpxUtVHJH/BGZwa5f zi1eseOULt063FHmKQG3PgBfHI0jfDNIidLkT5LZUXOvjMs5bJRzwBf2W0qW8P432/AC CP8G27FVTh8rem0l5EXFgbt8U0RjzN4JEKrE1MIjFXxezbqN7u2c4TMKtYAJvPCg1V9R vXWQ== X-Gm-Message-State: AFuF++mKQgehfRmbunJy8hZkSv7se7wRRyhgcqgir3Xvmo5AwtylNkmK kE1+vJaA27Kaq8Fhgv9HgBsaHDaknzxWFSKEGFql3Y9mIBk3nMxLQNSVNLsw5Q== X-Gm-Gg: AR+sD12SVv79XIxlGSDfyJw+6MVl0VsAouiR3qCu6rJhDohyimiEwRLWkaGLRz6yf+L XZerpuLXyba/pSxt/1ZqmE5LmNUC+Y4o0bVP0mTK4JQ+/lHVv3vnBs3Jh5H/UxEI+ZY15ai3mra CYWiwy126zNFesFiR8OqLl6H09eUhjAclH39n9LB5/ituogrE5tvH/LBqsmbzuifVTYHVLR09yl GjNjOkEQBGs0IzwU5zHsSigeEcrWs7MSC9tVApwjOgqZkZMM1b64QTbGVLeKoVhWwGCcEL4mcIA 1WPgjyRtY+qC5LFPkVU4J3Fm/9oLqE/0eTpMOWOxO/gzrKcJRaeARb+LcPY/LqPaZFfRph8aLjH 42ZfYBPQec6KIDAbl3lDDXUkRjE3Y7kVg0YjNa2xjTJZFqXt/DJ2EgQvYyG27gh8GYTONR7Aeiu B/xzzhhC19TQJpldnTdkZrVpGK1cFQUnef2Bnfg0oe0ftiZEmUc6zOLXIqF4NX0IhcwIKVwENrp j7o3A== X-Received: by 2002:a17:90b:5624:b0:38e:e9b:ffa4 with SMTP id 98e67ed59e1d1-39580a7c3dbmr18932291a91.6.1787197516157; Wed, 19 Aug 2026 20:45:16 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Xie Bo , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 11/93] target/riscv/kvm: Synchronize privilege mode Date: Thu, 20 Aug 2026 13:43:08 +1000 Message-ID: <20260820034430.1186695-12-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=alistair23@gmail.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197867116158500 Content-Type: text/plain; charset="utf-8" From: Xie Bo The KVM core register synchronization currently omits the vCPU privilege mode. As a result, env.priv can be stale when the migration stream is saved and the destination can restore the vCPU in the wrong mode. Read and write the KVM core mode register together with the other core registers. The generic RISC-V CPU VMState already carries env.priv, so no migration format change is required. Signed-off-by: Xie Bo Reviewed-by: Daniel Henrique Barboza Message-ID: <20260808125157.1220511-2-xb@ultrarisc.com> Signed-off-by: Alistair Francis --- target/riscv/kvm/kvm-cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 97069bf597..f6ddd0db9b 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -603,6 +603,12 @@ static int kvm_riscv_get_regs_core(CPUState *cs) } env->pc =3D reg; =20 + ret =3D kvm_get_one_reg(cs, RISCV_CORE_REG(mode), ®); + if (ret) { + return ret; + } + env->priv =3D reg; + for (i =3D 1; i < 32; i++) { uint64_t id =3D KVM_RISCV_REG_ID_ULONG(KVM_REG_RISCV_CORE, i); ret =3D kvm_get_one_reg(cs, id, ®); @@ -628,6 +634,12 @@ static int kvm_riscv_put_regs_core(CPUState *cs) return ret; } =20 + reg =3D env->priv; + ret =3D kvm_set_one_reg(cs, RISCV_CORE_REG(mode), ®); + if (ret) { + return ret; + } + for (i =3D 1; i < 32; i++) { uint64_t id =3D KVM_RISCV_REG_ID_ULONG(KVM_REG_RISCV_CORE, i); reg =3D env->gpr[i]; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198238; cv=none; d=zohomail.com; s=zohoarc; b=LhQthGCml0RD9QnIOw6H8vyhty8A8QUQunOjMTmLcAToiVpv3547pORJMJF7LdPohzmuzaA0nDM4Z2YQ5ALkJqXYYyUkyC11FowtSeV/yP5v0bGOKUYK03I+Dbnwzr0YyJs16EvXI5G9tVxgjVPe/1eN/hSFmH6aoB34zCx/YEY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198238; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xsIv20ka3W9n/PovKdbA0aIXZvkmbBl4/VeH5qj6NKc=; b=dqXHar9JVhdG++w2Q5hOYbLpXIqK23RIoFCfThzlBxdqTNT2CYtLuhN/S+A9W9Peak5o64iiXnSwjNBYuaeHJwm2SHyhdZBIvRGCTpQRHLD30RK0uD0Tifbcx2ZNCdELN8qag7C08xQPUXvqPuG/9T40vTUoui6eXuInHat3tYo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198238390273.2295742217932; Wed, 19 Aug 2026 20:57:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiV-00075s-C7; Wed, 19 Aug 2026 23:45:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiU-00075e-L0 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:22 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiS-0003pT-LJ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:22 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-38dc69c74b8so2168159a91.0 for ; Wed, 19 Aug 2026 20:45:20 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197519; x=1787802319; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=xsIv20ka3W9n/PovKdbA0aIXZvkmbBl4/VeH5qj6NKc=; b=Eb16+JGidMleOFqUazQLwb2C40/D03mODrEc/bMSoBxKssst2x0IB2JHoPIP26Y9X5 r8lEA6IDjSC4EGoJz3ps7r1GfhOUWeUb59gGXtsZd5ctHmUUf3+JXNwNDqinKJLrCCZl fes9FuTGhJrbJuonXek9E+L8e3jZhVjhd3ERiRR2Z/U2dyNZLHS2RkoJ+vCjIsBQU1F5 xB2ghbXIZaeSAW9oAyhUqC8NanFvN03YBVi4sYFYNK3qVh24Kgde7Ay4fdR5VB/367Cb HlE546tOSNlUMy+Aep1clKLdOKXacesBSpF5Ai4x7zQloXy0jhaIrUy7Iait9Zasx7qs cYng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197519; x=1787802319; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=xsIv20ka3W9n/PovKdbA0aIXZvkmbBl4/VeH5qj6NKc=; b=sgLiwlBcePKlArB1JSSwj1fKCE0xK8mu4vf9ajFIryDHHKDN5YWHAzo5l1N6JeNoBJ c0k2cKFAYWQNDeN1QIb6kngQ98U2SkmFdhYnCHZUhU5U9suiYzhyN4R47NCLVCcZqJru Uq0WCWMGi//mXuKrTvcU/54XPmZi1BbW3GamkkML0NHvLcNmFgBy60PHFc4trTrAgzDo uz/YWCApNn+fX9z34joROFyE4U1XnfIlDkDaUUTA/CbG20uuNicPaP/QDGnhhlKbvuev GNUH8FSTu1pQB/RShg+yeFLjKo6yVL1MSnmW7ByTn9NsHhtDWAG79hM6PwWL0/Dp2Yvy ziqQ== X-Gm-Message-State: AFuF++l2+HkLtaqymz/UMzy+paTrbMr1dm5w5wZ4+RII7Ehem9Ex5kbb OzGs3yEJnBz1OvRUmMgM0+b5WCSmX7LLgqe+2RXw4O+OQAqXZ6vx15ePz1rV6Q== X-Gm-Gg: AR+sD101Znq0MDMGzwWk+cxwFIwcTWsvvWH7hyokS2OXt6kxs6BQJvd/8NNVamFwYwf BlmqrZ/Su8oAVr+5041/KyhoYPNz/G5amuMmHNc3DoiO8hgg3dbmKnBEjbNKHTAkAfZGqCTTgGL HcoXP+4eh7S4Cmb4iwRCyyp5wlIlr5Mc25ZP5KlEJ3I8N7JB8PNxahAPJMH6FEOXVCff1jOuHzU zdZ5f/hoQU55BJXoQYql/l8C9utCyyKZs9qGqnmC+lBFCPPKGM6Qu5t8DVTkmH2zf6Di9Q03YL7 uWyDzcgerdfcwmCiWj+wZJXf1uRSqEwOhnwL+/8rZQ4zuyTMn3aS2NJelTECtBfAzRlziqiXaE0 3D0NfTKztHZ1z7bzotbxb04IkS68Z/03kcAb8jbsj18Se4wXmY3/iR5vXwvKcd4Zbg+vLyCoYHD bTtkUgxXnVZTusflp8Jy6Bu9PSCOBki0RUfKIpKW/u3cNJTbpCRyy7GJQP18m8qs3VrIG1fhlJY wHi4fU62xI/eHBodQ== X-Received: by 2002:a17:90b:524e:b0:37f:be6c:f3f2 with SMTP id 98e67ed59e1d1-39580ecefcbmr16496015a91.2.1787197519087; Wed, 19 Aug 2026 20:45:19 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Xie Bo , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 12/93] target/riscv/kvm: Preserve MP state across migration Date: Thu, 20 Aug 2026 13:43:09 +1000 Message-ID: <20260820034430.1186695-13-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198240408158500 Content-Type: text/plain; charset="utf-8" From: Xie Bo RISC-V KVM initializes secondary vCPUs in KVM_MP_STATE_STOPPED, but QEMU does not save their runtime MP state. A destination therefore retains reset MP state after migration and cannot reliably resume all vCPUs. Save KVM_GET_MP_STATE in a capability-gated KVM VMState subsection and restore it on KVM_PUT_FULL_STATE. Keep the existing reset initialization path unchanged. Track whether the subsection was loaded so streams where the subsection is absent retain the destination reset behavior. Bump the RISC-V CPU VMState version and minimum version to 12 for the new pre_load hook and KVM MP-state subsection. Keep the subsection out of KVM migration streams when the host does not support the MP-state capability. Signed-off-by: Xie Bo Reviewed-by: Daniel Henrique Barboza Message-ID: <20260808125157.1220511-3-xb@ultrarisc.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 4 +++ target/riscv/kvm/kvm_riscv.h | 2 +- target/riscv/kvm/kvm-cpu.c | 50 ++++++++++++++++++++++++------------ target/riscv/machine.c | 49 +++++++++++++++++++++++++++++++++-- 4 files changed, 86 insertions(+), 19 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 376cff656f..718b66487a 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -538,6 +538,10 @@ struct CPUArchState { uint64_t kvm_timer_compare; uint64_t kvm_timer_state; uint64_t kvm_timer_frequency; + + /* KVM multiprocessor state */ + uint32_t kvm_mp_state; + bool kvm_mp_state_loaded; #endif /* CONFIG_KVM */ }; =20 diff --git a/target/riscv/kvm/kvm_riscv.h b/target/riscv/kvm/kvm_riscv.h index b2bcd1041f..61eaa12443 100644 --- a/target/riscv/kvm/kvm_riscv.h +++ b/target/riscv/kvm/kvm_riscv.h @@ -28,7 +28,7 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t= group_shift, uint64_t aplic_base, uint64_t imsic_base, uint64_t guest_num); void riscv_kvm_aplic_request(void *opaque, int irq, int level); -int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state); +bool kvm_riscv_has_mp_state(void); void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp); uint64_t kvm_riscv_get_timebase_frequency(RISCVCPU *cpu); =20 diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index f6ddd0db9b..68e1501b21 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -1374,25 +1374,35 @@ int kvm_arch_get_registers(CPUState *cs, Error **er= rp) return ret; } =20 + if (cap_has_mp_state) { + struct kvm_mp_state mp_state; + + ret =3D kvm_vcpu_ioctl(cs, KVM_GET_MP_STATE, &mp_state); + if (ret) { + return ret; + } + RISCV_CPU(cs)->env.kvm_mp_state =3D mp_state.mp_state; + } + return ret; } =20 -int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state) +bool kvm_riscv_has_mp_state(void) { - if (cap_has_mp_state) { - struct kvm_mp_state mp_state =3D { - .mp_state =3D state - }; + return cap_has_mp_state; +} =20 - int ret =3D kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); - if (ret) { - fprintf(stderr, "%s: failed to sync MP_STATE %d/%s\n", - __func__, ret, strerror(-ret)); - return -1; - } +static int kvm_riscv_put_mp_state(CPUState *cs) +{ + struct kvm_mp_state mp_state =3D { + .mp_state =3D RISCV_CPU(cs)->env.kvm_mp_state, + }; + + if (!cap_has_mp_state) { + return 0; } =20 - return 0; + return kvm_vcpu_ioctl(cs, KVM_SET_MP_STATE, &mp_state); } =20 int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) @@ -1431,10 +1441,18 @@ int kvm_arch_put_registers(CPUState *cs, KvmPutStat= e level, Error **errp) } =20 if (KVM_PUT_RESET_STATE =3D=3D level) { - RISCVCPU *cpu =3D RISCV_CPU(cs); - int state =3D cs->cpu_index =3D=3D 0 ? KVM_MP_STATE_RUNNABLE - : KVM_MP_STATE_STOPPED; - ret =3D kvm_riscv_sync_mpstate_to_kvm(cpu, state); + CPURISCVState *env =3D &RISCV_CPU(cs)->env; + + env->kvm_mp_state =3D cs->cpu_index =3D=3D 0 ? KVM_MP_STATE_RUNNAB= LE + : KVM_MP_STATE_STOPPED; + env->kvm_mp_state_loaded =3D false; + ret =3D kvm_riscv_put_mp_state(cs); + if (ret) { + return ret; + } + } else if (KVM_PUT_FULL_STATE =3D=3D level && + RISCV_CPU(cs)->env.kvm_mp_state_loaded) { + ret =3D kvm_riscv_put_mp_state(cs); if (ret) { return ret; } diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 0ab613a298..31c49ca3e6 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -25,6 +25,9 @@ #include "exec/icount.h" #include "target/riscv/tcg/debug.h" #include "hw/riscv/machines-qom.h" +#ifdef CONFIG_KVM +#include "kvm/kvm_riscv.h" +#endif =20 static bool pmp_needed(void *opaque) { @@ -222,6 +225,44 @@ static const VMStateDescription vmstate_kvmtimer =3D { VMSTATE_END_OF_LIST() } }; + +static int riscv_cpu_kvm_pre_load(void *opaque) +{ + RISCVCPU *cpu =3D opaque; + + cpu->env.kvm_mp_state_loaded =3D false; + return 0; +} + +static bool kvm_mp_state_needed(void *opaque) +{ + return kvm_enabled() && kvm_riscv_has_mp_state(); +} + +static int kvm_mp_state_post_load(void *opaque, int version_id) +{ + RISCVCPU *cpu =3D opaque; + CPURISCVState *env =3D &cpu->env; + + if (!kvm_enabled() || !kvm_riscv_has_mp_state()) { + return -ENOTSUP; + } + + env->kvm_mp_state_loaded =3D true; + return 0; +} + +static const VMStateDescription vmstate_kvm_mp_state =3D { + .name =3D "cpu/kvm-mp-state", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D kvm_mp_state_needed, + .post_load =3D kvm_mp_state_post_load, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32(env.kvm_mp_state, RISCVCPU), + VMSTATE_END_OF_LIST() + } +}; #endif =20 static bool debug_needed(void *opaque) @@ -457,8 +498,11 @@ static const VMStateDescription vmstate_mseccfg =3D { =20 const VMStateDescription vmstate_riscv_cpu =3D { .name =3D "cpu", - .version_id =3D 11, - .minimum_version_id =3D 11, + .version_id =3D 12, + .minimum_version_id =3D 12, +#ifdef CONFIG_KVM + .pre_load =3D riscv_cpu_kvm_pre_load, +#endif .post_load =3D riscv_cpu_post_load, .fields =3D (const VMStateField[]) { VMSTATE_UINT64_ARRAY(env.gpr, RISCVCPU, 32), @@ -522,6 +566,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { &vmstate_rv128, #ifdef CONFIG_KVM &vmstate_kvmtimer, + &vmstate_kvm_mp_state, #endif &vmstate_envcfg, &vmstate_debug, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198205; cv=none; d=zohomail.com; s=zohoarc; b=PzDm/MO4riTBCp141iQcYmyWKuWcftMzRBqrO3qMnuLBiZiEu/AoNoZmVTkd7NcMAyWbqWEWy98DyF5ZUkT+Mte1LrsxrkvhqCZMFrMuICzw9aa0rt3b8N4UPj1hm+h4KYBcNUGqFGof2Olz6Rn2Zrc4596mAkheLtxfYCCmZJo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198205; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pmOBYgqrw3RiSWM58XHjxeAyd3bF4nHvgyQYSsEFwig=; b=oBekrc/neP/VlU/JJzVqp2jX1UqxkNGsPTMoZjkbcnEW7mAXBYLaJ8J7oR0Oigi1/QJT5uoysWf2bCtyA4D4NnJ2KvI66tim5VmTd+9ntNdHzvCgnlQs0NxwtCKA68VoOr9eb/rzpfRNvR1ulp13ShYl25R9K0M4A4K7W++RSoU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198205739634.7602924367593; Wed, 19 Aug 2026 20:56:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiY-00076W-Ow; Wed, 19 Aug 2026 23:45:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiX-000769-IA for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:25 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiV-0003q9-OQ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:25 -0400 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-cbedf6a6fe8so1138622a12.3 for ; Wed, 19 Aug 2026 20:45:23 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197522; x=1787802322; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=pmOBYgqrw3RiSWM58XHjxeAyd3bF4nHvgyQYSsEFwig=; b=lB8LPDaIIbD7gRwgrlp2i1kOAC8CgJcDnB85aBuJNBL9sTkpCsXIGV99H3YlpVNDCm pmLzuj/A0A3ob2QucR4jSuBypp7rkJHbeqJBEJYQxdOS/Mz2IItnUFrkIbGZhbFihdEZ gpK1t4azXBRHHOhsF6A9767lHNphfCooqVDr4NTWwCBtdtt18Lsugm+WLi0OLn7ywGs9 uWVVokdVx+ilZriYeDf+zO+Sti9+M9Hk8d4ltBqEuhnAl+C1m5fGBYBFjttLpYuzyspv jcm1KDkXkthhiqiFyhD9cSlbBehSzElWhd0AUDyqxqtn9IqGoaw5SBMHFyh+gPg0PWwU 8nmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197522; x=1787802322; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=pmOBYgqrw3RiSWM58XHjxeAyd3bF4nHvgyQYSsEFwig=; b=c3F4TAP9XmtpSbRwh72DWASrLj0/9CIk803eOwTSKiUl0LQHHzYXSVxhkDj6KCvOAw YoXwjbowpOEZYuI6GfQUOxdEcKGCQ2LB0nJiv2GkV8V1qftTgfcDUmmZl3sNcklO07Ak GLnjVZB0hn4z5lDV+1liftAME8LHf1VxWPAEZWbjhrejSqpsMdBzJ29Hxbhok9Oww3vO unjk5jaBij0KC84loFmu2N/XSMF2AbZyPV6MNriGikUAT9gB6S++OpkBY3RVSJ5pw4vo P592wGIWF57FU40H1wYjyshzrm5jKMmu3Sqr4jLZge+nys0nf+HWg8oeaNw9cGQW9flG VBww== X-Gm-Message-State: AFuF++kzAhduuQZ9K3dBnOPadt2CtFunlqukqdrz1WhLLijFqjM1etGC yHB2GGOdqMNXJKHN3oH6egS70kF2iQXCxQ5+1JvWvvvnlSlcHqzZ7Dmfe+VF+g== X-Gm-Gg: AR+sD11eXC7hywZdVW7hL2HPzI8T7O55QXtm+slK2WuUCwGInBa55y0ynG2xGNYtcYL daT0DAL0yvJUJr9Sfz9qRGwKgNF1/gpWyUnFiLZyxDBXgz10rLcdMIUoikahb9hXCSm3RSfwURP jNUaVIufNIDZwXddgYjPN7FP+1F35WoOKkz6iOYEONLADgVjq1HHlXxvDZSpLC4JcpLlNlENqyB tyM6+Yiy297TG4hNVpcTxqrorXlGNiihbFK+84OiqiJrcawEuEk6BBN+El2S4BwTLZ98e8Zyzbx LLE3cKSiMjyYjmjYeaZutaq7qplJnYC/qI7KM+cgnRf5HRsBrnBS4gRbcHtRE3QjordWQoDksNt KBckiipwirCF5yX1yPM6Y/6uLBgJ8FFBWqXMSqKDxBtQggV6RHLTy7KrbS/Xo4PEvYqeoaL4KQt vaZLC/lRW/pcgo42mEsDphT3Li3OBWf+Kml94XLFYMjLyyc+J+LnJtI4lbEZJum57nPIAa1OcdS P0Apxd+sXU= X-Received: by 2002:a17:90b:380e:b0:38f:5869:387b with SMTP id 98e67ed59e1d1-39581212176mr17119450a91.9.1787197522259; Wed, 19 Aug 2026 20:45:22 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Max Chou , A-Shehab , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 13/93] target/riscv: Fix PC sync in trans_sspopchk for CFI exception handling Date: Thu, 20 Aug 2026 13:43:10 +1000 Message-ID: <20260820034430.1186695-14-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=alistair23@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198206066158500 Content-Type: text/plain; charset="utf-8" From: Max Chou Move gen_update_pc call before conditional logic to ensure consistent PC state regardless of execution path. Previously, the host instructions generated to update the cpu_pc were only executed in the failure path when shadow stack validation failed. This created inconsistent PC synchronization. This inconsistency caused issues in CF_PCREL mode where subsequent instructions calculated wrong relative offsets from stale pc_save values, and could lead to incorrect exception return addresses. This fix ensures PC is always synchronized before any helper that might raise an exception, maintaining consistent translator state across all execution paths. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4118 Signed-off-by: Max Chou [ahshehab: rebased on current master; file moved to target/riscv/tcg/insn_trans/ and the ssp load is now 64-bit wide] Tested-by: A-Shehab Signed-off-by: A-Shehab Reviewed-by: Daniel Henrique Barboza Message-ID: <20260730181852.1622-1-ahshehab24@gmail.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc b/target/ris= cv/tcg/insn_trans/trans_rvzicfiss.c.inc index a813232887..d47a9f9c7d 100644 --- a/target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvzicfiss.c.inc @@ -32,6 +32,7 @@ static bool trans_sspopchk(DisasContext *ctx, arg_sspopch= k *a) TCGLabel *skip =3D gen_new_label(); uint32_t tmp =3D (get_xl(ctx) =3D=3D MXL_RV64) ? 8 : 4; TCGv data =3D tcg_temp_new(); + gen_update_pc(ctx, 0); TCGv_i64 wide_addr =3D tcg_temp_new_i64(); tcg_gen_ld_i64(wide_addr, tcg_env, offsetof(CPURISCVState, ssp)); tcg_gen_trunc_i64_tl(addr, wide_addr); @@ -42,7 +43,6 @@ static bool trans_sspopchk(DisasContext *ctx, arg_sspopch= k *a) tcg_gen_brcond_tl(TCG_COND_EQ, data, rs1, skip); tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_BCFI_TVAL), tcg_env, offsetof(CPURISCVState, sw_check_code)); - gen_update_pc(ctx, 0); gen_helper_raise_exception(tcg_env, tcg_constant_i32(RISCV_EXCP_SW_CHECK)); gen_set_label(skip); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197551; cv=none; d=zohomail.com; s=zohoarc; b=BvXqPO9f6Vjm5dmIBNcaOMGAyTIi45E47mA3TfGUWW9TMXblzw1QApj+FTTMjDMGbddm0NLmgriDU72hNkeoQEHVqtX6Yo2C14nUk2y/HC8S+uFAvd9/SpfXnyF0gxaTNmrrm310hAlueDwlSETlo/lO2bErUGGC5c6PCBs3CFI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197551; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=InDjCg2L0Bovh8ca/Rz0G2mpdBtxcIk8gJadCrq3EA0=; b=BCQd1NSzu4/dVAsa8Go6TCo48VYupjfjFKRNKd11MKhg/KJIO4xYr70VYK4IW4FuuoIvY1D6pDEhHkz3sz53Af/93vnYY7CwUO0YVSsJhyW3wpgw0li9OSqpILrikHD163YMTbRNt+3J8MmtOrbly16CTEbhukv479lKJV8ISZQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197551326540.7829344453872; Wed, 19 Aug 2026 20:45:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtij-0007bS-6y; Wed, 19 Aug 2026 23:45:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtib-0007IR-Vx for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:30 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiY-0003rZ-GJ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:29 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-38e69bdb0fcso1545625a91.1 for ; Wed, 19 Aug 2026 20:45:26 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197525; x=1787802325; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=InDjCg2L0Bovh8ca/Rz0G2mpdBtxcIk8gJadCrq3EA0=; b=XkZq9l7HvlYJ6WMK2Z2SbrHUTA50GwW/CczINI80FNW+0jfhLSj3Gpmkx71+N2LCj4 ynQ80VLIHhlvT2xmJbtTQHwEyXMlcjS7E8hNnOBqJxfL5fWPflESekyGmdMAWQUuLGtA Iyugi9Ic7zsDsu/35imDtM04upOhW/80KyuON5GONMCBNdWW4WomVD7AI5IjSbJ8TR79 XPqlCHoAwWTRUlZqE+XPRlIHQfHRF1sH94pQPJ7GlJPDN/qF/6yYveqYUeh4ujkLNAoc mwCH9nnrahn65BbT6LBLacjKE2YLz9mQBXE2pffJ9S6VaAQILE7ryP59fScdObSW/5d2 4qoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197525; x=1787802325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=InDjCg2L0Bovh8ca/Rz0G2mpdBtxcIk8gJadCrq3EA0=; b=gUWU5rARKrqe6xxjF7N4lGMUKt1YvJ25EmL+WDdP+gzhmXCuwe0HXI2cZfDS+j9enz uzzIomujVTv4BIkkUWi9xaEUG5SlxD2RKaSpKSpVVy3WmbwBjNQMWNvtSPN9pw/7Vkhu BsJTaJoL80V53UoMRXpI6jWN+7PKJEKzD+Af5cza+O6cgNhAaMTFcUZauFSJ03zgA4+k ogeW2rofEUa8tIVKImIly4xGTbhIIFiWL0dJBH3vfiwKQRS8C7f9iShXelAkhr5Q7deW Sk8SZhHafFg84kihTXrKt7y5fGVfusDgrno/VTmyZDGoltPQozCvRdyaTJm7S+9RxRfr KWVQ== X-Gm-Message-State: AFuF++lVzSr8o8rhcbUdCY1PpS4Z8QKx4wE+oblSREdqhalxyehTMQVH 5hYmKoxZJ2mQXtIyyE3/pGeSsdzcu2sdNi+g+tnIMAPJodmCdHf8tIZ7Q1zVxA== X-Gm-Gg: AR+sD11VZlo688DVy6qawBgk6OBYixPk/LGFx8vYSN0VkCvn7Sl355Mpz3jVconBnzK rt5nyok1Y71+VrKcnSUh/fa1fWMXN6S9QFxtKLpptAXFN1AuhqFg+FRIfmMGV4Ty+F7vxAUlFlI hydzpFX2MyJomU3HBwNrbbVDg2fdGQyv0ARQpWf8juHkIo3l5dNrCDry2RFz4YS4bw/GdGyI2fS ZSr6IhLRdt+0dqhjQwUzYyuBy9AaCtAPADj671Gv+Rm8HKBcc8PxQwnUB5uZ+YfxVGn8qsNCWqW llBiVZAcpdWzu9PwfsuXuhouPmd3xEs0yrckAzNQ+uCOvxOU6B6aoqjqftroVsxN+WwT5f7U+bR mh3plXkq+rspX8ZD2MmEaLo9UtAHV0CQyCcDJ/zeUlO02y/YwqbMRcA8enyUMJHMgYvC/Os+DXC e9O95UEqGoCh4wBCj+EqWz0TzdUPvk1YctpnsdH+oKlbGid/9Xcop5xdq4iY/uyc7fERKTMD7j2 flJtQ== X-Received: by 2002:a17:90b:1e53:b0:38f:bbc:6a0f with SMTP id 98e67ed59e1d1-39580ecefbemr16926273a91.1.1787197525118; Wed, 19 Aug 2026 20:45:25 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Abhigyan Kumar <314abh@gmail.com>, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 14/93] target/riscv: use SXL instead of MXL for read_sstatus Date: Thu, 20 Aug 2026 13:43:11 +1000 Message-ID: <20260820034430.1186695-15-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197552094158500 Content-Type: text/plain; charset="utf-8" From: Abhigyan Kumar <314abh@gmail.com> According to the RISC-V spec, a 64-bit system can have M-mode in 64-bit with S-mode being 32-bit (SXL bits or mstatus[35:34] being 1). In this case, read_sstatus should use SXL. QEMU doesn't allow changing the SXL bits in mstatus in M-mode. This was because of the missing MSTATUS64_SXL mask in write_mstatus. Now, both the SXL field in mstatus can be safely modified in M-mode and read_sstatus correctly uses SXL not MXL. Fixes: b550f89457 ("target/riscv: Compute mstatus.sd on demand") Signed-off-by: Abhigyan Kumar <314abh@gmail.com> Reviewed-by: Daniel Henrique Barboza Message-ID: <20260723142254.1683113-1-314abh@gmail.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/csr.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target/riscv/tcg/csr.c b/target/riscv/tcg/csr.c index 36f2004bc5..a90449b87f 100644 --- a/target/riscv/tcg/csr.c +++ b/target/riscv/tcg/csr.c @@ -2067,6 +2067,11 @@ static RISCVException write_mstatus(CPURISCVState *e= nv, int csrno, } =20 if (xl !=3D MXL_RV32 || env->debugger) { + if ((val & MSTATUS64_SXL) !=3D 0) { + mask |=3D MSTATUS64_SXL; + val =3D riscv_write_uxl(env, val, MSTATUS64_SXL); + } + if ((val & MSTATUS64_UXL) !=3D 0) { mask |=3D MSTATUS64_UXL; val =3D riscv_write_uxl(env, val, MSTATUS64_UXL); @@ -4014,8 +4019,8 @@ static RISCVException read_sstatus(CPURISCVState *env= , int csrno, if (riscv_cpu_cfg(env)->ext_ssdbltrp) { mask |=3D SSTATUS_SDT; } - /* TODO: Use SXL not MXL. */ - *val =3D add_status_sd(riscv_cpu_mxl(env), env->mstatus & mask); + + *val =3D add_status_sd(riscv_cpu_sxl(env), env->mstatus & mask); return RISCV_EXCP_NONE; } =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197680; cv=none; d=zohomail.com; s=zohoarc; b=IazU0Ff7ZLIHLt7Qk9RueYIwPoE9pDWMRIQuFOx4cOmu4+u0/F3iJaXSoXnbbkme5CSMzRADB8QcoetmS4i6O8HL1K9mz0uqt2UhYrid8OTMCp6YNktC3LrgENfYUEXX8Rr2ePdb++JDIeWNba31nu/9jYQLXBVwggX1opMes6s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197680; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=1lmUdEov6FqZsd0VDIKqfsQZY33RKDRt1qK6/MBemXQ=; b=UHWSNaU00JujLGA3l3LwItJhF8XZxy/3opIaL0DM3z22MPzeGO0wBXe4dJWftjMSIH3u2qe23OBlGPvbKt9YjFnlkHXKyuZaBfoMwp94MANP4uYyOyUiJoVQxAMfGkImzUp3YQUyysk621U+gYqEk7ntQRlGUTHrLAuBwfVaO2I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197680333206.5971466075231; Wed, 19 Aug 2026 20:48:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtij-0007bV-8a; Wed, 19 Aug 2026 23:45:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtid-0007MT-SV for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:31 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtib-0003u5-To for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:31 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-383cb94f742so1955211a91.3 for ; Wed, 19 Aug 2026 20:45:29 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197528; x=1787802328; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=1lmUdEov6FqZsd0VDIKqfsQZY33RKDRt1qK6/MBemXQ=; b=MGKwClNbMnv35bO2buxo6/Y/duwDczhdEfP9hQRNkWs8lc8D09iu6oZwtc+KX/zYq3 HVutP4OKZfjQhrl8aRE+dNmFvKIrVQH3r234sFzUGcRYccOwS+vcaRL1QEVCJ2/FZ8Iq lFAaKujtXu1z1fMT0C330XbdpHyWht4rYl+3goflbSz1bhpAN/YNHanRjuBZylUaFTZN Fon0FGuMNWffwHAOEOefRxuoElRdQCg73WoSRZto6iMyzsk0MaHoHCbje6ISUVBspZw4 qCcIyc+5lOVTwC7wSENSJ5RNi7MjsWYlHSG8CTJeWC7V6FcfKPZ8RIEJCsEclKFCJmCH fobw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197528; x=1787802328; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=1lmUdEov6FqZsd0VDIKqfsQZY33RKDRt1qK6/MBemXQ=; b=U5BK66tQigE+iVr/pD/UwXUdQgtQoEPbZXOmD6FNYzK/Z/Lmh3l8tWrFETzFXIIevS NMocDbdSFmp5N6wmqQeoEfQjtpRmFn6CjMZFpb6njg/Yz5O3oFP+Kxm/QZedvCJoWYwj qbqJU4/LKvqgcR2N5fzlWdi/yGy7HVx2VfCoTxt0SpKmRvQSwII6ptH0DpiHVUTLk5O+ aygQwQXDzrAuch9sSeHjWEtBS6V+cAqNxFwBqSdWscC/gPT6vMUoHWo0PNmRkb3chcVe oz4BVmYnpXTBFa69IcpoGkX7EN9VFo5+x8vzqhCY5HzTOXIii6SVKkStCaTz7OmsoFx2 ATLg== X-Gm-Message-State: AFuF++nIj9dlcZVoauoSRwfZmnoGWqGMSHovm9gLoYePHZEwffcTAh1+ K6Q+07ZqSOOK3JhjT/YNBjyus2PQ/M18nnvRkIAx8V0s3dNbVmveRYpROQvegA== X-Gm-Gg: AR+sD13vxCZKcSrdvDEZ2tktiIRG/sXsC6PiwMovYyi61f2miq3BPRDqZ/OI8lkc+Nt O9EvnVnpS/6unW1RgnuLzuWddHcByN2d2sSw2SrDH17onyGWwNNxtk+u9fhQVJC7y2wOlIVQLsi zrNDH4aAPVUDbyaq2YCxRc4W1gSLG8cW+A+VDQROXm2+mLXFaRqCqJpC8yKIlfiSspSIqlL84q6 DzR/EH8uD8SD2kIBQTUE0/NkRR3XA5eTWFJh5ofDxq42XLndDy4x4TX6zrLmv3FTrH3Ndoq13l4 XsKk3SQJxBucbib40O6HH1Hs5Z0Of9UWq0LhEgXyLA6pMJIbQLELj+j9bH9wmqorR6YXaWFeiYZ Nlx5XkKtrQmE3pdqb0AowIaTVgr8ko5vNwDNfpHIsMEfpDjdk5whBb8oCCh3E/BuT1ADdVX4tf8 bOOgYacVaeBVxFApizdsGpLPAUwyqFd58PQnSvLJqnYwfS3iTMzn/aK4YgnDRCtq8bn7g2/l0vW Eo9Dw== X-Received: by 2002:a17:90b:524e:b0:37f:be6c:f3f2 with SMTP id 98e67ed59e1d1-39580ecefcbmr16497113a91.2.1787197528352; Wed, 19 Aug 2026 20:45:28 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Zeng Chi , Daniel Henrique Barboza , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 15/93] target/riscv: Fix memory leak in riscv_trigger_unrealize() Date: Thu, 20 Aug 2026 13:43:12 +1000 Message-ID: <20260820034430.1186695-16-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197682544158500 From: Zeng Chi In riscv_trigger_unrealize(), the per-trigger QEMUTimer objects are created in riscv_trigger_realize() using timer_new_ns(). However, unrealize only calls timer_del() to cancel them, but never frees the timer objects themselves. This results in a memory leak every time a CPU instance is unrealized (e.g., during hot-unplug or machine teardown). Fix it by replacing timer_del() with timer_free(), which internally cancels the timer and frees its memory. The separate timer_del() call is no longer needed. Fixes: 820552a92e32 ("target/riscv: dynamic alloc of debug trigger arrays") Signed-off-by: Zeng Chi Reviewed-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20260724063927.3360599-1-zeng_chi911@163.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/tcg/debug.c b/target/riscv/tcg/debug.c index 3c0fe70101..5ab29f6945 100644 --- a/target/riscv/tcg/debug.c +++ b/target/riscv/tcg/debug.c @@ -1080,7 +1080,7 @@ void riscv_trigger_unrealize(CPURISCVState *env) g_free(env->cpu_watchpoint); =20 for (int i =3D 0; i < env->num_triggers; i++) { - timer_del(env->itrigger_timer[i]); + timer_free(env->itrigger_timer[i]); } g_free(env->itrigger_timer); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197593; cv=none; d=zohomail.com; s=zohoarc; b=SWqbq5WFG/9N32SpK/+0mn0jtpW2m2uz4IC8m163+j4YFcHg0pEID/4PenhJZKFb8nlDBFu2pm0wFaVMOcFy5L/OPDjMCEzCi5SjgLOrqGi90xZ0rcILHvrIKGRH5+IYHGoy2PZrOZ2Pjd1Bd0+IOXg3vUfXv7lJzROOiiZiNh4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197593; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=+FdWVqHvbukBDTAtIE0GsAxOTICi4E0tdgbLrJwjft8=; b=T9w659iHtmvC0fAKoNcj8toHPzx0lDr9jewnZNm1N8ijLa3IKrzmNLGIw87wWtBQeuMFLj+vB91W52yfrpCi8tbjUEkTDPsJnbuewiF2IZX7ngbbT/vwjASOqb3eWaDYhFeMMv5mT25QNkbMD5SWM9L23bEH8MkBaIB07mhbSLc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197593340472.28581357523024; Wed, 19 Aug 2026 20:46:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtil-0007r7-4B; Wed, 19 Aug 2026 23:45:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtii-0007Vk-BD for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:36 -0400 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtif-0003vJ-4E for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:35 -0400 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-2cf452def93so3671885ad.1 for ; Wed, 19 Aug 2026 20:45:32 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197532; x=1787802332; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=+FdWVqHvbukBDTAtIE0GsAxOTICi4E0tdgbLrJwjft8=; b=JHI9rSjqDYbZSpdVKQlYkLPxw6wwKp43/lGXIvtZGlghSB09YVUlJHkWhLsy7RFmp1 m1zl6DfF9JmjvqomSfrXg56kk1gOcAAxeSavhjJWTOG9ABKopQVbv7pLSBKKiwsMMTSU QDNJftJJNf0nYgr8BaNtiI/RKBXYnE9QyUASd22w5XhLNs/9uIiSwd7Wl70/mR4aBC6W ojW4IrkaKPq87G8vh36tuk0IJzezSwfRXQKFWfYKvNEe08/odIkI9cXY97FpNPDF/xKN kJTliEwvwiD1Sy7xYaTceYPA2kJ+CVd1upMtjsqxZzlk24qlga5ZaBGo94MJE3YkcM4R JISg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197532; x=1787802332; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=+FdWVqHvbukBDTAtIE0GsAxOTICi4E0tdgbLrJwjft8=; b=aN6motpghmMksHfG7rvzziFLklrYQpFX80njcFI2XTNcE2F6A6QKUojDC8qv247iLZ upEIqoxeThb6gKt4G/6lM2Yxc6HvsHxNUaSeJj1NFOtkAG0BBleYFrCWTIFwif+6GUU/ Lp4FVdAmaJ9CDRpIUYyZLSnunyk03AHFgH8sQoD2qhiqd8EwpkDCR/R4d5TIP/3jmDch 8Eiu92AHPgLLEFPm+rR9WmaUoLKvYLCPKqEhaHz3TEyKIiIJfFX1AS9ZPHAkVq8+o1Um PrE5+zKypc2XhtxsgJQ2xxI/WDp85wO//Qu1/RNKebJ1JzR/UK9OyonLXg9vjxjvHJ0z NKew== X-Gm-Message-State: AFuF++k6M9ZzvCFzClVz1UNoIKg/q/16qUkMSY2pWGDrWKBgGqrmfAiU 3aT1YhBlgw3WsmqIGmG7xw7hmSea8AGtHxgMsDQAXou71p//FJIu08CHQIjhoA== X-Gm-Gg: AR+sD13qlmb+O603YNhQYq3ePA4to2MlI4X5+BEmRmTDbgmMx15FEkKP8BSWJwXh18C 4i2YVtlvswVYyC299IFHcPTu5UNThsywayHecj/UVzzHCA9qw6/M8/poy/UV9XwSCR/6XLHH9wI Wj5Qs/6jPS1DkP1Ojxcfaum50AbfcwyNA3io8tbYycvT2PFZX4iIy2UoKHIIvp/kG5ZPeQY9dm9 efMQIxbr6AQdFW9jiph4ifCusL+nkUUz4WkMFPUstuzGEV8N78m74/YqajcMpAWg/xT0tVwy0SI 6j0e+94hmieIxZ1Ssj+r5l1wZEB4lRs+Im5ekUXGRnwYHPsaowr3FVpsJhwPs1mh249BEHysbMN doqkyD9mB2jQ6yhTRjA2HgMDeBwxnzpr4KcTOfR81Me+72vPsckHRsYTdvk90VmVAFidNll3rDQ KWlivZf2JlrwLnV+1tiNsD9Lv4abJPA0qp5DDw3Mdvkn6e/5SWUyJdyT85dGVkQCcYBhKyXYzq2 9YPYA== X-Received: by 2002:a17:90a:e70c:b0:38d:eaed:4adb with SMTP id 98e67ed59e1d1-395a074d955mr5010276a91.20.1787197531640; Wed, 19 Aug 2026 20:45:31 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Frank Chang , Max Chou , Alistair Francis , Daniel Henrique Barboza Subject: [PULL 16/93] target/riscv: Add Zicclsm CPU option and enable it for the eligible CPUs Date: Thu, 20 Aug 2026 13:43:13 +1000 Message-ID: <20260820034430.1186695-17-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=alistair23@gmail.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197594182158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang Add Zicclsm CPU option and enable it for the following eligible CPUs: - Base 32 CPU (to be backward compatible) - Base 64 CPU (to be backward compatible) - XuanTie (T-Head) C908 - Tenstorrent Ascalon - Ventana Veyron V1 - XiangShan Kunminghu - MIPS P8700 (ISA doesn't include Zicclsm, but their datasheet claims that it has unaligned load/store support in hardware) Signed-off-by: Frank Chang Reviewed-by: Max Chou Acked-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20260810055618.1175500-2-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/cpu_cfg_fields.h.inc | 2 ++ target/riscv/cpu.c | 7 +++++++ 2 files changed, 9 insertions(+) diff --git a/target/riscv/cpu_cfg_fields.h.inc b/target/riscv/cpu_cfg_field= s.h.inc index 9eb47af0a7..f8c27a574f 100644 --- a/target/riscv/cpu_cfg_fields.h.inc +++ b/target/riscv/cpu_cfg_fields.h.inc @@ -139,6 +139,8 @@ BOOL_FIELD(has_priv_1_11) /* Always enabled for TCG if has_priv_1_11 */ BOOL_FIELD(ext_ziccrse) =20 +BOOL_FIELD(ext_zicclsm) + /* Vendor-specific custom extensions */ BOOL_FIELD(ext_xtheadba) BOOL_FIELD(ext_xtheadbb) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index e73ff53159..b2693f4c20 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -3347,6 +3347,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { .cfg.ext_zicbom =3D true, .cfg.ext_zicbop =3D true, .cfg.ext_zicboz =3D true, + .cfg.ext_zicclsm =3D true, .cfg.ext_zicntr =3D true, .cfg.ext_zicsr =3D true, .cfg.ext_zifencei =3D true, @@ -3419,6 +3420,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { .cfg.ext_zicbom =3D true, .cfg.ext_zicbop =3D true, .cfg.ext_zicboz =3D true, + .cfg.ext_zicclsm =3D true, .cfg.ext_zicntr =3D true, .cfg.ext_zicsr =3D true, .cfg.ext_zifencei =3D true, @@ -3505,6 +3507,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { .cfg.ext_zbs =3D true, .cfg.ext_zkt =3D true, .cfg.ext_zbkc =3D true, + .cfg.ext_zicclsm =3D true, .cfg.ext_zicsr =3D true, .cfg.ext_zifencei =3D true, .cfg.ext_zihintpause =3D true, @@ -3548,6 +3551,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { .cfg.ext_zicbom =3D true, .cfg.ext_zicbop =3D true, .cfg.ext_zicboz =3D true, + .cfg.ext_zicclsm =3D true, .cfg.ext_zicntr =3D true, .cfg.ext_zicond =3D true, .cfg.ext_zicsr =3D true, @@ -3597,6 +3601,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { =20 /* ISA extensions */ .cfg.mmu =3D true, + .cfg.ext_zicclsm =3D true, .cfg.ext_zifencei =3D true, .cfg.ext_zicsr =3D true, .cfg.pmp =3D true, @@ -3656,6 +3661,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { * The RISC-V Instruction Set Manual: Volume I * Unprivileged Architecture */ + .cfg.ext_zicclsm =3D true, .cfg.ext_zicntr =3D true, .cfg.ext_zihpm =3D true, .cfg.ext_zihintntl =3D true, @@ -3712,6 +3718,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { .misa_ext =3D RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU, .priv_spec =3D PRIV_VERSION_1_12_0, .cfg.max_satp_mode =3D VM_1_10_SV48, + .cfg.ext_zicclsm =3D true, .cfg.ext_zifencei =3D true, .cfg.ext_zicsr =3D true, .cfg.mmu =3D true, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198128; cv=none; d=zohomail.com; s=zohoarc; b=B+Lh+rMUIUgvYW3HnxqNAZb/DGcK06f4x18kg0sIqkng0UUty6MvejA6fk4tXipSYZnI/1IQAZDarP10wXuGS3AaMBuSI+3kCj9A96DHrUh2hFa+H7Cr895q+udNKehO7gjEIWI+XQZZB570SfJABn4d5JF7M6u+OegM4FSCN9A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198128; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=bEOIVZvOI6v3LMY4XYw/LCi0puozDvkVflYenuC6IF8=; b=ELLnSai/f0qPuwFkR6oi/jh6Ltrh5xxnEkruDZgFC/yM8dqHb+CThbiMN0g9x57rTMYMbY654dKuCJ1V3njhzxYwtln5Ns1+WOvUVWeX0dE29DhtwiSn+kGeFmJgIvUIujGmDtbFQOOVd9/+tklaSUFceGzgt4hoc+KGy2JcyF4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198128674975.6009777016542; Wed, 19 Aug 2026 20:55:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtim-0007y7-1S; Wed, 19 Aug 2026 23:45:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtij-0007gm-PI for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:37 -0400 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtii-0003xO-3s for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:37 -0400 Received: by mail-pj1-x102b.google.com with SMTP id 98e67ed59e1d1-38de840f2f0so1561305a91.0 for ; Wed, 19 Aug 2026 20:45:35 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197534; x=1787802334; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=bEOIVZvOI6v3LMY4XYw/LCi0puozDvkVflYenuC6IF8=; b=N8qniS9hfMjt/5jAf7P23d6qgZKxZ3l0p3lbnY5IZ/fLmKrch1s4SRvkiNCBtHz8D0 eIEJGBymGBiDwU9vJQN9q/O6VLBpxvfNti38TLlqqiEWiHWX0h2S6JeVrTTybQZK5ngR 8WNhrrWljhrmPgUijgrpdtM+hbReJuxiac5RFFbxmIIR++ue7CV3yrWuQqmd5ydi1rD+ XASWwkWHzLPGr+8zqLbjYNjHU95MJDW7pXc0okEP3Uje3uCzAm2h29W1xLkUIAhhesqL yg/CGPAtSEPOLZHMZCaGMHw25FfJpZ8ptBHZtE1dt5vc1dusLRamyP2Tq1Cd7rJ/lDx5 p/Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197534; x=1787802334; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=bEOIVZvOI6v3LMY4XYw/LCi0puozDvkVflYenuC6IF8=; b=RZbjb+FwHIdfTIfRDVv6FPTXJdbB8xilWI2lz4OW+fuhXZ75SZ+YPiTzFw6p5Fc6s2 rupBV/6RBE6gJoShP4L2ILbCksb3LUuN7f732JyCC8t+v64OJTx3b7O/0mIxY+2oSLrU IAoZAtLIWszi3b8nI4Uh282181i4cSBpN9FBoLGavMJBeNjurtD/czaJKI0HPy3UCnbC Bv+7fEXWs83dRTzOBxUOgVDcRxF3QQLGE5aigE1vlRe4QxA1YmFRTQAai4rzr03B+MWF qH5MwZpPfgIH16ZbgzDNs1rmURem5o7sW4I9mVkcxZHlJBNHdwnnUe55e7PnlBSq/roJ gMpA== X-Gm-Message-State: AFuF++lZvKBhEUcdVAfV3624DQyfuGQpCi4N2zm2W7+/xKP01vfY+/E+ /iyy9oWKGpJ4d4DKhRVIGonCan4iXbbYW426UR+d89XSwWmbAoHJylzRYVQv7w== X-Gm-Gg: AR+sD13m8T4p9lEe3Q8OBpquE8AIPo8O8Wb3ozYcFuam24wcyS86iq18jjKWu5gzfCX seQbmDxbK/veCd64w2m0vEUcvHpTdtVJs/2J0HECnocbzQUpKx1DzyTPEfZY9Gj+nUy+tev04Zo 40VFyT3fIiCwuJxh6RqvAMfYv+uh0gCgvhZGM3i/S6Q3XRSHMOoKSBSgELHcmdpwauncvpzBEd8 G8qo7h0UIea4l1k72gmldyl3SKB3k/FA0FbGS8ZRfCv23fKvqf+w2Zy37aVyPRja6KCmyRLetNG kkZIAIjh2l+2kv4tpHp6SmIIaEDh0b+B8SpQMeO26nluI4valYv/SrfhMk5QlTWfK2AYIXh/H2N Ie51zf5oVjPFaWhrCYfeYs2PAzHlNfFKFAz94JeYpIXK15Ped00FT/6tsnBkTNvNPMRYtLMcms1 tSVOrXIZPkeDBpMQp7MonhGWI6NdGXa2H3vLVsgQ3zw6J7Tup6/ULFY1tBWlPEpEeNLpiEEm807 RECGw== X-Received: by 2002:a17:90b:3c47:b0:38f:1a2e:6e56 with SMTP id 98e67ed59e1d1-395813f4f3dmr18627022a91.9.1787197534557; Wed, 19 Aug 2026 20:45:34 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Frank Chang , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 17/93] hw/riscv: sifive_u: Align ROM reset vector data Date: Thu, 20 Aug 2026 13:43:14 +1000 Message-ID: <20260820034430.1186695-18-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198129941158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang The SiFive U ROM reset vector data needs proper 8-byte alignment for RV64 ld instructions. The misaligned load will cause exception when Zicclsm is supported as SiFive U CPU doesn't support hardware misaligned loads and stores. Add padding to ensure start_addr and fdt_load_addr are placed at 8-byte aligned offsets and adjust the load instruction offsets to match the new data layout. Signed-off-by: Frank Chang Reviewed-by: Daniel Henrique Barboza Message-ID: <20260810055618.1175500-3-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- hw/riscv/sifive_u.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 99423ef472..57a57c96e1 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -564,19 +564,20 @@ static void sifive_u_machine_init(MachineState *machi= ne) 0, 0, 0x00028067, /* jr t0 */ + 0x00000000, /* padding for alignment */ start_addr, /* start: .dword */ start_addr_hi32, fdt_load_addr, /* fdt_laddr: .dword */ fdt_load_addr_hi32, - 0x00000000, /* fw_dyn: */ }; + if (riscv_is_32bit(&s->soc.u_cpus)) { - reset_vec[4] =3D 0x0202a583; /* lw a1, 32(t0) */ - reset_vec[5] =3D 0x0182a283; /* lw t0, 24(t0) */ + reset_vec[4] =3D 0x0242a583; /* lw a1, 36(t0) */ + reset_vec[5] =3D 0x01c2a283; /* lw t0, 28(t0) */ } else { - reset_vec[4] =3D 0x0202b583; /* ld a1, 32(t0) */ - reset_vec[5] =3D 0x0182b283; /* ld t0, 24(t0) */ + reset_vec[4] =3D 0x0242b583; /* ld a1, 36(t0) */ + reset_vec[5] =3D 0x01c2b283; /* ld t0, 28(t0) */ } =20 =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197622; cv=none; d=zohomail.com; s=zohoarc; b=LwWPICB7ZRgZtcqiIJyed+m8yBaIVEXP0PQGoBBrcmVsji4Ne/bCvKwhOic1XwLTUizmElZf31/qi1t4+o5lS02cbmLTjxhLiDygxznng7UDTdEzboMhHuU9eVgPmwV4JqeqDBXj+3mThSU8KQUmaV90vYbGPUVNYfffTLkJaJg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197622; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=dpctRoR5ytohYBbHmTxahKvAOMfFUypV6/ZUeeRK850=; b=G78N7jAh7li3TQbr9v09nJNEuPmE24h2EN/f8AemKgRgSwIRb+KzU8om7J9Xy7KNYGbKMertws55hENqy6cKnjiZ9aWSa0IEJKvHEgY0wAbdIm+l8kW45KJjT6XOsanaeVNCspkwIzTAaaICuuu3MBlqe6bDTCzc5V+I8ZuURRQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197622822134.65353490589223; Wed, 19 Aug 2026 20:47:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtio-0008Aa-AY; Wed, 19 Aug 2026 23:45:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtim-00083d-Jc for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:40 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtik-0003y9-R4 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:40 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-38dc4553f62so2437398a91.0 for ; Wed, 19 Aug 2026 20:45:38 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197537; x=1787802337; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=dpctRoR5ytohYBbHmTxahKvAOMfFUypV6/ZUeeRK850=; b=hucIvgJf7rOpwzqQ3rWh6PcmHgncUKN8xJfIgl3H9BXH09cYc9Uj1OwFP+/UBwcgPx AidA0kiUD0xsUoGrfc0O+ORPmHunSMpfNH/ppn88Waz3sxDfGTowm7mCAlzEgDpdulwj z5u2fJdeF6h2fHMjBJbxMA+8dY2MuqZ2hfrDRKR0fbFl/F1ZwK2tB8jyvmQy2HLb5gHt gagi3jXafisWorPoieRCy8gViOP/ZC2gi2xmlaGpC/ZqUXyaXHwpBzSEhGgBxzxUQT3k FtQbqBGKdO84qFe1gNRo/GjP5SDhFYVF9I9pge0Hm1lHwvnGRYufTSVVVTN5deI+39kA PDCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197537; x=1787802337; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=dpctRoR5ytohYBbHmTxahKvAOMfFUypV6/ZUeeRK850=; b=DJMOo/iLU8ThUU7AVxYd7etYFspaXEpOsqfi5iRwYWAH3Mn79CXyCkPuF4s95+22LW C+cszVadqOZh4Ki7sQ4TdCsZstZ5IcGp49wrq64N276DuZzCHe3ivBt8sW7fepPvjj1R 3nEpy/Oi+5CRdCmC4Cc+VxBOki6JX7TigkGhm3F7s1ilA21PxDEJu9aKU1GL1pQZUYz2 Dkt/EL/oam2QBJYJJAH+2FnBVfb/84ufh9hkt8rPiSvi6JvLBLhu4wHagaJdmT3Kaaqb Isa6Ow9wJ+GrzqL5eZiUQdMit917mnboW0rKw+18463cx7Q8lqTBc0sz1bUHADNUudiL 3BuQ== X-Gm-Message-State: AFuF++nU8yStiQLmwuNtkzgmXjQHAtgj5lYcWFnn2hKNlLw08NiSSNPG BWbSxaChjD26SBF2ULsLfGdbzXoLBs16rpXs7FqQHI8TNqHzQ4D/r4h1GYYvFA== X-Gm-Gg: AR+sD11AqKAgtws6gnUnVHk56bHm76Q9OCp8UWce8+LvXrXQdHvJe8KeXF1dCacEpwH tMRL0v5BTCN2eOQrUpGDWSjARHQR8vEKrDcVnOuUWshfOC5zPz77vcH/kt2GE0ZiSmBKmjQ+iBg XAoBK65UtRKTT/OruGFsrV+Qt9BOlCHEqYPdgq3VRXgEGPCcYeNXSq1v0fL/VGyvst8nbKcnDeR JetM6XZhfdUmXxiIzWEXFPqQTPUh8RyJcWZdWE+0WwQgRmK4A9OOFQRnVSCaroUjmTurmUP8HFO BcsLuP6B5M78bjt83IXz+pl1iwt9epm8aFSw6tjscLtGX0su5EAZGdOz23Zp8+w2K+pwGosf7SM L5cV3klabIRtaIlFMjy5XE7Yw2L30U/RrxfrLyuLw2k80jGG2mt+QpO3eO5y6FMasKwjHaJ9Zqn tWSv1Xp4VXp5FkY/13pO8F2f+KUF4jLseT0hhWaiLHycD0mudkdtIzLPcMcV/KaKX8Sj2YxjB2X Nl13g== X-Received: by 2002:a17:90b:2f8b:b0:38f:57f0:1f5d with SMTP id 98e67ed59e1d1-395810d73e6mr18328539a91.15.1787197537469; Wed, 19 Aug 2026 20:45:37 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Frank Chang , Max Chou , Alistair Francis Subject: [PULL 18/93] target/riscv: Support raising misaligned exceptions for scalar loads/stores Date: Thu, 20 Aug 2026 13:43:15 +1000 Message-ID: <20260820034430.1186695-19-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197624165158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang When the Zicclsm extension is not enabled, raise misaligned load/store exceptions for misaligned accesses from scalar load/store instructions. Signed-off-by: Frank Chang Reviewed-by: Max Chou Reviewed-by: Alistair Francis Message-ID: <20260810055618.1175500-4-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/insn_trans/trans_rvi.c.inc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/riscv/tcg/insn_trans/trans_rvi.c.inc b/target/riscv/tcg= /insn_trans/trans_rvi.c.inc index e47b16a7fa..cc1b5dbbad 100644 --- a/target/riscv/tcg/insn_trans/trans_rvi.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvi.c.inc @@ -413,6 +413,9 @@ static bool gen_load(DisasContext *ctx, arg_lb *a, MemO= p memop) if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } decode_save_opc(ctx, 0); if (get_xl(ctx) =3D=3D MXL_RV128) { out =3D gen_load_i128(ctx, a, memop); @@ -524,6 +527,9 @@ static bool gen_store(DisasContext *ctx, arg_sb *a, Mem= Op memop) if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } decode_save_opc(ctx, 0); if (get_xl(ctx) =3D=3D MXL_RV128) { return gen_store_i128(ctx, a, memop); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197611; cv=none; d=zohomail.com; s=zohoarc; b=Dz7DLmzM5W7GTcyKJYnHJ9qgGUoK+13+Kzi6KF0yse26kBZLI6FMI51OP9JCHwsmc03qAg2xQ5SLQxk4rltQooDvOyjEtLQhrrOHpcQvXt0/rKIQTDT3PJU8V9wNGK5UyQC6EN7C+TOrYH/oo9Upoj3inqsSeJduK1WG1LJ940M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197611; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=f/u6W5uGxQ0lZiZRWiD37XIIJQNcqJvCdasbU0HSOvs=; b=ZjVZNH7DGWb9CRZOawT3MHvbmz54JSnGx1HyED/VHrxn9t2RWE3BvKCQwAd8JaMbZIsVRZGD+dy0pNII+k3ON0onJe2qmjrGpAHHFi4w07IgTDWox6KU68gPmtq8/tAvMbC8CcmklR0QetbOtRd8/jCETiLo4lTruIAKQ7OUBCg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197611094446.73829749667686; Wed, 19 Aug 2026 20:46:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtir-0008F5-Ny; Wed, 19 Aug 2026 23:45:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtip-0008Da-KP for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:43 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtin-0003yi-Qm for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:43 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-384930ca5e2so2213242a91.3 for ; Wed, 19 Aug 2026 20:45:41 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197540; x=1787802340; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=f/u6W5uGxQ0lZiZRWiD37XIIJQNcqJvCdasbU0HSOvs=; b=eSsDn9Z4AG5rk8rhCn/DTxznATZ+MxtbvXPdsXm6zbQS9OetMmmovnwM9DU5WFFRM3 dONHc0C+0gOz2igLUAYC7qz7MIROtJaneMV9ZqkluqStLtiodzUG0Ra4gJWvnWnxgR3U Bi72t4N1DJ+kDW6SSayxnpOCMMdlk4CmGLbKEDlx3LsrtGn+MQy3wBEBSqjd2e+xM0xP LRHFNwQ7v5tYnhoJfBaVB8EoNpVcuTeA7lFBDQRrLMumFmHPNzEVWIP94+T1Uj9WNhVL 92MUX2a2yI6Lf0FR6ym+hdqgNIZq5IGyJpzIoC4UF/aRQJSt6Pu8xhmWUcLYlBGxL48p XHlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197540; x=1787802340; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=f/u6W5uGxQ0lZiZRWiD37XIIJQNcqJvCdasbU0HSOvs=; b=FpnXtZpd9tHfpH0OkFQvN9fEnrxeGJ4xdSGjHEOBKC6PD7RZpz6VBFRwqeHVutSFXV +4WxE+GwFi9TBmiYA3ZlSHRSQjpJGkLRShGkv9/gwV+29UqxT8vWxA6X3UsPHwfi+ImF kLTWYl1YriMV6uHmO4KVth/x+970TD+fztuTzMsVmgG5WRnO6GlgPLCFLFyZGEj4gHRX 82/ASves6ScKQICGjtUsZfIjjL0VV0nN2qX9oYear71AP9cyWWIoWuB2bGrIDclrQ+ab Wt124+xJnO1YoCeHuJSjXfWbA5nO50BdCKheu5ompD9YA7SWqOBn6eWvBafd7uVobUC5 cxDA== X-Gm-Message-State: AFuF++kCMdebY/1x0TpVNLPf5xtlvuV+dQnmck+Zj+9hMAvBHPs4Rsua C2FUdDIO73yiT8BbmEsZdjTYkqT5jxvNGb/qq/zWWfutbD4czHanmI+Dw87Yyg== X-Gm-Gg: AR+sD10qAm9fPy8tmJQqPF8jxJ+SiCsWXXbkVa/PQ9oHYoDMLqhRzd7aaUqL9YEnsG9 rC7zciYX8K2hgSlH/woBQhHvf5iMt1rb8MHpVVnDEhwHkyv5XVkTWzTY/Z9QJyZ+p0rqV5OsgfN OAfF8NT9MWPsU5UPM8yyDJr3ZyZ/09JlIZSlxD2kEc6IkW0dJ1OP+lTwrPYW4qkWGwJQKwpyex9 7jNjjTNPGzkrxHHZSYCl8BpVxQSClZfGpW9RI9NeWBOleoJyM9Ekn1WOcOFy/bsFd2uzV/n8oN8 5mGTHgkRTWKpz4kCGsB5xo49vkewfFlIaXBEWJlfdPJ8m4axn4bAkhQyNWev3esY2kQdxr1ObFE o5ermf5mKAUdzfzsMi1LHoo03xa+j+g2iBOCURpclLijjUuktEOCBwfH3HLHTd4Y+56KCfx2cC3 1ySYnhstcExqSdNAGXczNEpny5KazuAXS87TiQNd9EM/hYrqU8HMRwgkod1VvmqzJSTrrsWDhIQ 6FDQhc1Vx8= X-Received: by 2002:a17:90b:2d8d:b0:392:e5b1:d833 with SMTP id 98e67ed59e1d1-39581252d0fmr17755246a91.13.1787197540313; Wed, 19 Aug 2026 20:45:40 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Frank Chang , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 19/93] target/riscv: Support raising misaligned exceptions for floating-point loads/stores Date: Thu, 20 Aug 2026 13:43:16 +1000 Message-ID: <20260820034430.1186695-20-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197612228158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang When the Zicclsm extension is not enabled, raise misaligned load/store exceptions for misaligned accesses from floating-point load/store instructions (RVF, RVD, Zfh). Signed-off-by: Frank Chang Reviewed-by: Daniel Henrique Barboza Message-ID: <20260810055618.1175500-5-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/insn_trans/trans_rvd.c.inc | 6 ++++++ target/riscv/tcg/insn_trans/trans_rvf.c.inc | 6 ++++++ target/riscv/tcg/insn_trans/trans_rvzfh.c.inc | 6 ++++++ 3 files changed, 18 insertions(+) diff --git a/target/riscv/tcg/insn_trans/trans_rvd.c.inc b/target/riscv/tcg= /insn_trans/trans_rvd.c.inc index 3b9a745520..1be2bee946 100644 --- a/target/riscv/tcg/insn_trans/trans_rvd.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvd.c.inc @@ -61,6 +61,9 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a) memop |=3D MO_ATOM_IFALIGN; } memop |=3D ctx->mo_endianness; + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } =20 decode_save_opc(ctx, 0); addr =3D get_address(ctx, a->rs1, a->imm); @@ -86,6 +89,9 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a) memop |=3D MO_ATOM_IFALIGN; } memop |=3D ctx->mo_endianness; + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } =20 decode_save_opc(ctx, 0); addr =3D get_address(ctx, a->rs1, a->imm); diff --git a/target/riscv/tcg/insn_trans/trans_rvf.c.inc b/target/riscv/tcg= /insn_trans/trans_rvf.c.inc index e935523c93..481f7282da 100644 --- a/target/riscv/tcg/insn_trans/trans_rvf.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvf.c.inc @@ -52,6 +52,9 @@ static bool trans_flw(DisasContext *ctx, arg_flw *a) if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } =20 decode_save_opc(ctx, 0); addr =3D get_address(ctx, a->rs1, a->imm); @@ -75,6 +78,9 @@ static bool trans_fsw(DisasContext *ctx, arg_fsw *a) if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } =20 decode_save_opc(ctx, 0); addr =3D get_address(ctx, a->rs1, a->imm); diff --git a/target/riscv/tcg/insn_trans/trans_rvzfh.c.inc b/target/riscv/t= cg/insn_trans/trans_rvzfh.c.inc index f36b46c211..88711fb076 100644 --- a/target/riscv/tcg/insn_trans/trans_rvzfh.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvzfh.c.inc @@ -50,6 +50,9 @@ static bool trans_flh(DisasContext *ctx, arg_flh *a) REQUIRE_ZFHMIN_OR_ZFBFMIN(ctx); =20 memop |=3D ctx->mo_endianness; + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } decode_save_opc(ctx, 0); t0 =3D get_gpr(ctx, a->rs1, EXT_NONE); if (a->imm) { @@ -75,6 +78,9 @@ static bool trans_fsh(DisasContext *ctx, arg_fsh *a) REQUIRE_ZFHMIN_OR_ZFBFMIN(ctx); =20 memop |=3D ctx->mo_endianness; + if (!ctx->cfg_ptr->ext_zicclsm) { + memop |=3D MO_ALIGN; + } decode_save_opc(ctx, 0); t0 =3D get_gpr(ctx, a->rs1, EXT_NONE); if (a->imm) { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197706; cv=none; d=zohomail.com; s=zohoarc; b=Gnn0iAcVQbVt4xUZn1G5UQQ2376E3B8R2M7SNQKE+xKGcX/HpJPxftO/tVD/RssQCVsr0X9t1yHTuUm8SizMHfw2EfZdHmAra7jhV6u+uvDnnrxf/fvhugvgHP/X5JGwMYeFvex0MTVv+T1cCqnPS+QhKoU4RXy79K5TGqAmfMg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197706; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=/8dJDx1ilTYyZ18Kjsv/DFio2MP9Dc526iF16cUqG6E=; b=LNhkT2O2E7VhdDzaaaVw9bebDtxSIxz3EZt2hj/6viSPS1/Y71qpcUQuVdSueV+KHa5wUpGUoGEKXwM1XZjauJJWM3zjBgTAHa6NOcA9xfJtmO0a8cI0JlNJNRdoTxBelTVBfME/1dhpM2lkyQqwmtRbPnWiESYiUEW12gbQb4o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719770682017.8643336098894; Wed, 19 Aug 2026 20:48:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiu-0008Rf-Pm; Wed, 19 Aug 2026 23:45:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtit-0008Kw-1D for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:47 -0400 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiq-0003zA-SG for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:46 -0400 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-2d032846c95so22135785ad.1 for ; Wed, 19 Aug 2026 20:45:44 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197543; x=1787802343; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=/8dJDx1ilTYyZ18Kjsv/DFio2MP9Dc526iF16cUqG6E=; b=iEV8XOlhYa7Xoo6PwIEm40RqgE1dyY4YNE191CZrI6LkaL2NbgGPYO1mreObSxvf7G AztQhEnA4u3aW+SipZFN9KmdBs79N2LnrpLXTlA4YrSWps177Sq0Wy6AVRhuW7VTaySa SpW/eSeHZ/5FlFOaRE4k8bzL0WIaacBoTuKJ1Kkoho2YsTQlbZgpcvM99hKU3VQxaR0T tqOYUrfhQAM4yeBdSkOUbhh0J2eftjNYuPSXYxeRGe5oSKlLLhu+P+6u3SM+PXxh+UOd hZPivC/SJ6/zpN7kqjN4aWz6Nt5hYFg89Y5HXYbPcNI3dHu5uivnVWFqcW/H1a2gr/AZ Vf1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197543; x=1787802343; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=/8dJDx1ilTYyZ18Kjsv/DFio2MP9Dc526iF16cUqG6E=; b=K/ry0/wTwuvNSUrg4ZvX69hzhHPDqfDnd/K0biy8hXBwDDceLEdB8YTnkkYb5F7Po6 O4rgpFXFFxI0CnFCTX5sNxKZrY8U51daCTBJyL5IgFVvqP+2Uluoj2lEB0h3iyZWuc1a jkC7i9rFHC7VLQDtuaUlK53eXnEVWGPh2vXMApieIrcfG1TnKijIHPcCUgKtoIAuyM6b t23iCI1N72W6ltQMh4mVJys+pblqkaey2uov1us5BgAmN6wxpAAWdITHVgZuajWPtiqG zUWOZIXSfBxTWftIGwWSZ+2csCmeguJM/OnntmybZNnBdFTCF8Wx8R5M/H/0UJB8oblY P14w== X-Gm-Message-State: AOJu0YyHHV7mj7kuzg+hHEBHNNPwxW1wMsKgXlIsAnqjRWY2a+YxsXEf 0H9mrezvWXiqPL4NGO5MuHJpJWycfGUcmHOErOaXTmH4muPvnPVh/yXVKFPfPg== X-Gm-Gg: AR+sD13FOuOOyScYuWxO1huDIlVvvJxI2N0Oets1EwOBkwpqkSLS5rwOAhhw2Dt5kxY R9rYxAORN7j8rE/GtAK2E2u20IMlRsIXXdhOm52zVa/7BLLZwfzBB/HAnyHKKKiiQbI9ZBfspMn 9L1IWV+cmf0GYRNEzW2r38kNzm45hLtkcp10x257iXNDM4aaM0S48ObUZGt5uaVnlnROhQIo7GG 3RY79eqP7ATALISfjri7h4nJV0mEYZQ1cI8eyW/f4GZfWB1oKX4o5Bn07g8MfQZukphdaK+npUQ LEjHU0xR7ZSUJKLCt0clDGMGoiokw0vXbrOKvMdRcg5l7U4KE05LMq/pYv1z+yJ2ZyRBPCTB0ha Z+c1okRJ12Nca0/zKwRV+Y4/XlIbKC0iIa4M++im9AIzT9/98w2JH3E4BXGHqoJykt+IuDZu6iq QcOPbWS4g73W8dZ2fGcsHL3oCMfICbXBN9npVePV0CztMCkagFy6cXr+wfUdT6NqIhZ3l2br5r7 wtpfd+mQYxfttRm X-Received: by 2002:a05:6a20:12c7:b0:3c3:cc3e:a9 with SMTP id adf61e73a8af0-3cd00dd6be8mr15148105637.4.1787197543215; Wed, 19 Aug 2026 20:45:43 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Frank Chang , Max Chou , Alistair Francis Subject: [PULL 20/93] target/riscv: Support raising misaligned exceptions for vector loads/stores Date: Thu, 20 Aug 2026 13:43:17 +1000 Message-ID: <20260820034430.1186695-21-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=alistair23@gmail.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197708501158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang When the Zicclsm extension is not enabled, raise misaligned load/store exceptions for misaligned accesses from vector load/store instructions. We will skip the host fast-path and fall back to the slow TLB-path to raise misaligned load/store exceptions for the misaligned accesses when Zicclsm extension is disabled. Signed-off-by: Frank Chang Reviewed-by: Max Chou Acked-by: Alistair Francis Message-ID: <20260810055618.1175500-6-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/vector_helper.c | 65 ++++++++++++++++----- target/riscv/tcg/insn_trans/trans_rvv.c.inc | 18 +++++- 2 files changed, 65 insertions(+), 18 deletions(-) diff --git a/target/riscv/tcg/vector_helper.c b/target/riscv/tcg/vector_hel= per.c index e321ca2616..e28d8a3d9f 100644 --- a/target/riscv/tcg/vector_helper.c +++ b/target/riscv/tcg/vector_helper.c @@ -199,20 +199,34 @@ static inline void vext_set_elem_mask(void *v0, int i= ndex, ((uint64_t *)v0)[idx] =3D deposit64(old, pos, 1, value); } =20 +static inline MemOpIdx vext_make_memop_idx(CPURISCVState *env, size_t size) +{ + int mmu_idx =3D riscv_env_mmu_index(env, false); + MemOp memop =3D size_memop(size) | mo_endian_env(env); + + if (!riscv_cpu_cfg(env)->ext_zicclsm) { + memop |=3D MO_ALIGN; + } + + return make_memop_idx(memop, mmu_idx); +} + /* elements operations for load and store */ typedef void vext_ldst_elem_fn_tlb(CPURISCVState *env, abi_ptr addr, uint32_t idx, void *vd, uintptr_t retad= dr); typedef void vext_ldst_elem_fn_host(void *vd, uint32_t idx, void *host); =20 -#define GEN_VEXT_LD_ELEM(NAME, ETYPE, H, LDSUF) \ +#define GEN_VEXT_TLB_LD_ELEM(NAME, ETYPE, H, LDSUF) \ static inline QEMU_ALWAYS_INLINE \ void NAME##_tlb(CPURISCVState *env, abi_ptr addr, \ uint32_t idx, void *vd, uintptr_t retaddr) \ { \ ETYPE *cur =3D ((ETYPE *)vd + H(idx)); \ - *cur =3D cpu_##LDSUF##_data_ra(env, addr, retaddr); \ + MemOpIdx oi =3D vext_make_memop_idx(env, sizeof(ETYPE)); \ + *cur =3D cpu_##LDSUF##_mmu(env, addr, oi, retaddr); \ } \ - \ + +#define GEN_VEXT_HOST_LD_ELEM(NAME, ETYPE, H, LDSUF) \ static inline QEMU_ALWAYS_INLINE \ void NAME##_host(void *vd, uint32_t idx, void *host) \ { \ @@ -220,20 +234,27 @@ void NAME##_host(void *vd, uint32_t idx, void *host) = \ *cur =3D (ETYPE)LDSUF##_p(host); \ } =20 -GEN_VEXT_LD_ELEM(lde_b, uint8_t, H1, ldub) -GEN_VEXT_LD_ELEM(lde_h, uint16_t, H2, lduw_le) -GEN_VEXT_LD_ELEM(lde_w, uint32_t, H4, ldl_le) -GEN_VEXT_LD_ELEM(lde_d, uint64_t, H8, ldq_le) +GEN_VEXT_TLB_LD_ELEM(lde_b, uint8_t, H1, ldb) +GEN_VEXT_TLB_LD_ELEM(lde_h, uint16_t, H2, ldw) +GEN_VEXT_TLB_LD_ELEM(lde_w, uint32_t, H4, ldl) +GEN_VEXT_TLB_LD_ELEM(lde_d, uint64_t, H8, ldq) =20 -#define GEN_VEXT_ST_ELEM(NAME, ETYPE, H, STSUF) \ +GEN_VEXT_HOST_LD_ELEM(lde_b, uint8_t, H1, ldub) +GEN_VEXT_HOST_LD_ELEM(lde_h, uint16_t, H2, lduw_le) +GEN_VEXT_HOST_LD_ELEM(lde_w, uint32_t, H4, ldl_le) +GEN_VEXT_HOST_LD_ELEM(lde_d, uint64_t, H8, ldq_le) + +#define GEN_VEXT_TLB_ST_ELEM(NAME, ETYPE, H, STSUF) \ static inline QEMU_ALWAYS_INLINE \ void NAME##_tlb(CPURISCVState *env, abi_ptr addr, \ uint32_t idx, void *vd, uintptr_t retaddr) \ { \ ETYPE data =3D *((ETYPE *)vd + H(idx)); \ - cpu_##STSUF##_data_ra(env, addr, data, retaddr); \ + MemOpIdx oi =3D vext_make_memop_idx(env, sizeof(ETYPE)); \ + cpu_##STSUF##_mmu(env, addr, data, oi, retaddr); \ } \ - \ + +#define GEN_VEXT_HOST_ST_ELEM(NAME, ETYPE, H, STSUF) \ static inline QEMU_ALWAYS_INLINE \ void NAME##_host(void *vd, uint32_t idx, void *host) \ { \ @@ -241,10 +262,15 @@ void NAME##_host(void *vd, uint32_t idx, void *host) = \ STSUF##_p(host, data); \ } =20 -GEN_VEXT_ST_ELEM(ste_b, uint8_t, H1, stb) -GEN_VEXT_ST_ELEM(ste_h, uint16_t, H2, stw_le) -GEN_VEXT_ST_ELEM(ste_w, uint32_t, H4, stl_le) -GEN_VEXT_ST_ELEM(ste_d, uint64_t, H8, stq_le) +GEN_VEXT_TLB_ST_ELEM(ste_b, uint8_t, H1, stb) +GEN_VEXT_TLB_ST_ELEM(ste_h, uint16_t, H2, stw) +GEN_VEXT_TLB_ST_ELEM(ste_w, uint32_t, H4, stl) +GEN_VEXT_TLB_ST_ELEM(ste_d, uint64_t, H8, stq) + +GEN_VEXT_HOST_ST_ELEM(ste_b, uint8_t, H1, stb) +GEN_VEXT_HOST_ST_ELEM(ste_h, uint16_t, H2, stw_le) +GEN_VEXT_HOST_ST_ELEM(ste_w, uint32_t, H4, stl_le) +GEN_VEXT_HOST_ST_ELEM(ste_d, uint64_t, H8, stq_le) =20 static inline QEMU_ALWAYS_INLINE void vext_continuous_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_t= lb, @@ -398,7 +424,16 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target= _ulong addr, probe_pages(env, addr, size, ra, access_type, mmu_index, &host, &flags, true); =20 - if (flags =3D=3D 0) { + bool misaligned =3D addr & (esz - 1); + + /* + * Allow the host fast-pash when: + * 1. Page permission/pmp/watchpoint are checked and we have a conti= gous + * host mapping. + * 2. Zicclsm is enabled or load/store is not a misaligned access. + * Otherwise, we will fall back to the slow TLB-path. + */ + if (flags =3D=3D 0 && (riscv_cpu_cfg(env)->ext_zicclsm || !misaligned)= ) { if (nf =3D=3D 1) { vext_continuous_ldst_host(env, ldst_host, vd, evl, env->vstart, host, esz, is_load); diff --git a/target/riscv/tcg/insn_trans/trans_rvv.c.inc b/target/riscv/tcg= /insn_trans/trans_rvv.c.inc index 23262b1d03..a22e2cae6c 100644 --- a/target/riscv/tcg/insn_trans/trans_rvv.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvv.c.inc @@ -1191,26 +1191,38 @@ static bool ldst_whole_trans(uint32_t vd, uint32_t = rs1, uint32_t nf, * Use the helper function if either: * - vstart is not 0. */ - bool use_helper_fn =3D !s->vstart_eq_zero; =20 if (!use_helper_fn) { uint32_t size =3D s->cfg_ptr->vlenb * nf; TCGv_i64 t8 =3D tcg_temp_new_i64(); MemOp atomicity =3D MO_ATOM_NONE; + MemOp alignment =3D MO_UNALN; + + /* + * If Zicclsm is disabled, require alignment based on element size. + * Use MO_ALIGN_* based on log2_esz (0 =3D MO_UNALN, 1 =3D MO_ALIG= N_2, etc). + */ + if (!s->cfg_ptr->ext_zicclsm) { + alignment =3D log2_esz << MO_ASHIFT; + } + if (log2_esz =3D=3D 0) { atomicity =3D MO_ATOM_NONE; } else { atomicity =3D MO_ATOM_IFALIGN_PAIR; } + for (int i =3D 0; i < size; i +=3D 8) { TCGv addr =3D get_address(s, rs1, i); if (is_load) { - tcg_gen_qemu_ld_i64(t8, addr, s->mem_idx, MO_LEUQ | atomic= ity); + tcg_gen_qemu_ld_i64(t8, addr, s->mem_idx, + MO_LEUQ | atomicity | alignment); tcg_gen_st_i64(t8, tcg_env, vreg_ofs(s, vd) + i); } else { tcg_gen_ld_i64(t8, tcg_env, vreg_ofs(s, vd) + i); - tcg_gen_qemu_st_i64(t8, addr, s->mem_idx, MO_LEUQ | atomic= ity); + tcg_gen_qemu_st_i64(t8, addr, s->mem_idx, + MO_LEUQ | atomicity | alignment); } if (i =3D=3D size - 8) { tcg_gen_movi_i32(cpu_vstart, 0); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197589; cv=none; d=zohomail.com; s=zohoarc; b=FKyh0wD8qM9fNsNrDfk1cECOGQROZll0CQfbqK7zPAJlPQZkrVjsm9O1xOFIbd5rTqgGInAATV4cE4+5QVyHnM8vhLrpIjGbI7LoIi/vgsVhLJqPkjkeLt8Ds9UhASJuSnZuWY6oTuGPKq0zMSH/JBn1wu44t8IWhvbGVLxjpVQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197589; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=0zVHz1vI4ZmKFiVEVtHQt6VWbe6dmqIzbriZ7N5663A=; b=YojvULzHhvZoOv5EyijnjIhYWEc+iIj4EEMZEdtBVz41HbbjoqBCI4EOhXad8XFn0/nVj5/aZUfKMaT74N3wuAmNbOo8iyzBbmn62AsuoXGOndtf+UWLuQ3msZe/4/a+d2SadrqLXmQHfnMcTfja3RNzIHT/vH8bLhB/8JnLqT0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197589088769.7775402246901; Wed, 19 Aug 2026 20:46:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtiw-0000BR-UA; Wed, 19 Aug 2026 23:45:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiv-0008UU-CB for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:49 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtit-0003zd-Mt for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:49 -0400 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-38125cebfdaso2754694a91.1 for ; Wed, 19 Aug 2026 20:45:47 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197546; x=1787802346; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=0zVHz1vI4ZmKFiVEVtHQt6VWbe6dmqIzbriZ7N5663A=; b=fJ9Fvt/yUbJvxyXPW0HvCXB34CL7V4xBVg02G5zdu18KxlumLf7Dgfn6uPu2tP88nZ pyDL3X0OxNNNr7+n6zRWYLEk3bxI+xy2wkbL4BIq7HUyOo0PiW3jDHM5ajZIdxNQ0mza /KQDvNFJ/GZvAn4i5L8lBh9XYapz9nGIFMuH4TiSUkoSqmbVpnMxD+y099jBX8+octzQ Zzj/56EIDoeGjHer0IQO1gT3D9KWca90HhI6uCvzKEpJcNNV8IxFzq7BUJ5yzowQsy+z dfcd4WlksY36TyTQhZ/kCw66V2qjN9BOsEDrg6vjDvZ2RaoinXMeA7IfTQT6jBO0thwH rA0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197546; x=1787802346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=0zVHz1vI4ZmKFiVEVtHQt6VWbe6dmqIzbriZ7N5663A=; b=PiomH7YZaBmdfEY03CclPVZMqBipv6HmrnzKYLS5xYVsudmwIFa2uurBnmahHmLxgS hwhhXnbnzt2ss3Xwu3B1FmyX/UTHHGX8xePC+pT/O3OgLAkl1CQ2dsJl55AoweBmK6gb sAOOMjA+z4b54wyk6O4We3RBDKpsKeWngsH1bLZKfgDzDsZrMW1sYSGUUtbbGFymfeeP 3ZfwIWB790nYnZr4OY1waZ1pNUfSDyCErB4mOMHYQK7M/OhaUwNUFUhxGQbqX3PnASSx jqnHQmhbOunRUq0RsAU4qi8fvX16JRL9WwxiNdwcUr4flvH9VNQFNdgUmnnnko8byWtH Vt4g== X-Gm-Message-State: AFuF++lz6K7QYG4qx4sPT9g/5uIR+HMtmjv0UsCCflqfe/Ud9YxYgdjF qJ2eCsGNPK1lAL9OqHdgR0znte3jmP5aEd0hWQQbjN/BS/RwKMNIFydWxdnaWA== X-Gm-Gg: AR+sD13xTKXuSToISBpdR9iIDzB+kD+YMUDOLPfsDzPwD/TbqnCw0YYisLCFt8tk8em kMscuQIwNAoy5ulAU7bJa7pAYo0EXU3McnsaYAQJoZhY4A/kFH++CURT/cYBaTTqyoc8q7EvSBb u6oQeoiBEXPvVVMtqVYiV1WDXtDueP2ZDRD8SaHHgROmGwrRGH/kuiIEjyyBmy+i6HJe5v5qRJJ lOZMRlcYS+ueQqrPhxgADe3xyL2HWOYskdOdvETJYuMNPU2nhqvYXeyF5O0u+gL24eqLUhrcHjt Ge4fx7nnCo9obQfsp2YBGE+6iozPm16okVORDzcEyyEB4ASNXoe608ahYgr0cQYYYTsnKnOOZZp 2KBWL82pVBi/U4oc5GtyseIr4JjIH7eHkFrc+WW2/DLw+x/XVAe25KJdHc3mdxHU9o9XXHtH7ek JaYgqHDnCW0HE553+z7qmcGcFj96pvwrfPIlfKBj449rRYyUeIxy25gT/ti+3QUiMh0wa1XH9lA iRZfuyckZc20+OO3g== X-Received: by 2002:a17:90a:fc45:b0:38a:c3f:3b87 with SMTP id 98e67ed59e1d1-39580f6d136mr18842994a91.12.1787197546101; Wed, 19 Aug 2026 20:45:46 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Frank Chang , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 21/93] target/riscv: Expose Zicclsm as a CPU property and update RVA22U64 profile Date: Thu, 20 Aug 2026 13:43:18 +1000 Message-ID: <20260820034430.1186695-22-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197590055158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang Update Zicclsm ISA string and expose it as a CPU property to allow user to turn on/off Zicclsm extension. In addition, Zicclsm extension is mandatory for the RVA22U64 profile. Previously, Zicclsm was enabled automatically when has_priv_1_11 was true. Now that Zicclsm has been converted to an explicit CPU option, it must be explicitly added to the RVA22U64 profile's extension list to ensure the profile remains compliant with the specification. Signed-off-by: Frank Chang Reviewed-by: Daniel Henrique Barboza Message-ID: <20260810055618.1175500-7-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index b2693f4c20..d8f239e41d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -165,7 +165,7 @@ const RISCVIsaExtData isa_edata_arr[] =3D { ISA_EXT_DATA_ENTRY(zicboz, PRIV_VERSION_1_12_0, ext_zicboz), ISA_INTERNAL_EXT_DATA_ENTRY(ziccamoa, PRIV_VERSION_1_11_0, has_priv_1_= 11), ISA_INTERNAL_EXT_DATA_ENTRY(ziccif, PRIV_VERSION_1_11_0, has_priv_1_11= ), - ISA_INTERNAL_EXT_DATA_ENTRY(zicclsm, PRIV_VERSION_1_11_0, has_priv_1_1= 1), + ISA_EXT_DATA_ENTRY(zicclsm, PRIV_VERSION_1_11_0, ext_zicclsm), ISA_EXT_DATA_ENTRY(ziccrse, PRIV_VERSION_1_11_0, ext_ziccrse), ISA_EXT_DATA_ENTRY(zicfilp, PRIV_VERSION_1_12_0, ext_zicfilp), ISA_EXT_DATA_ENTRY(zicfiss, PRIV_VERSION_1_13_0, ext_zicfiss), @@ -2316,6 +2316,7 @@ static RISCVCPUProfile RVA22U64 =3D { CPU_CFG_OFFSET(ext_zkt), CPU_CFG_OFFSET(ext_zicntr), CPU_CFG_OFFSET(ext_zihpm), CPU_CFG_OFFSET(ext_zicbom), CPU_CFG_OFFSET(ext_zicbop), CPU_CFG_OFFSET(ext_zicboz), + CPU_CFG_OFFSET(ext_zicclsm), =20 /* mandatory named features for this profile */ CPU_CFG_OFFSET(ext_zic64b), --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197821; cv=none; d=zohomail.com; s=zohoarc; b=XdwPq9Xo/+jwkXbXZ65kzBxUdyI6Y/ngGqkPOEEfnDjDfmwkFV7+OK1evA8D9pd2V1vN+DJphw4rm56T3ACVG/h+YnPFRKKk+9bgcdrIWsEfos9Wl1TnlbP5O8Q/UjzbSunbth8swxC+ZCJ3nh9c26zHOlPBHL+WSOFpBDXNICA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197821; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=P/6Agw5nt0+eKUGMb/KCImqqQ0Wj2MEA9zyQKBC5/kA=; b=Q6omiLH0hZQh8VdzaRN2Er3lDC+JVK4cn+T5gN5/pC6eCNjUsXA0ojo6+DNMfQ+2eeNI3kAyP3v2Tx5USIH2xQPxavX3arE4YQMRxNsSqyPK3HLRdi8zK92L2OAOxuNWtggeJzFaAdUmb76AVcsX5uSVdZHXcU4rXNS35ZWuSOM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197821645561.0255558632551; Wed, 19 Aug 2026 20:50:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtj0-0000Ik-MX; Wed, 19 Aug 2026 23:45:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtiz-0000HZ-2V for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:53 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiw-00040A-JG for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:52 -0400 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-2cc7e86e7aeso19231775ad.2 for ; Wed, 19 Aug 2026 20:45:50 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197549; x=1787802349; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=P/6Agw5nt0+eKUGMb/KCImqqQ0Wj2MEA9zyQKBC5/kA=; b=X2fadzC5o1+VUqxV5Wmu3mZoWpDzqA+BUER8osX2jZnj9VdPFM+NM/PqN+8gQAohWr y/Wep/m4+J/aplGtfVcmFeEPM8IXzEIlyfRvX1LKCJxXel4RW7ZQ32V5d9yqlFLgdV0n akS/7eVNfPbSLOG3p6ieNHk5BbSQ8j9VODdi4Zcn2Wl8k9xieNjH/pIljEcIfLANX0qp AvllQNlGcbD+8EahnK6rROv7sY+HSlWoa0hf+slwIXXhvASkHCNmyERCaZ7k3QkMD4a1 kjVgM9LvZLTAtYoZQF5eK6eOFAfrLVb9ns9+nLy1QZ2vf2NRpoEapeWI/V/ApC9DQYjx KmQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197549; x=1787802349; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=P/6Agw5nt0+eKUGMb/KCImqqQ0Wj2MEA9zyQKBC5/kA=; b=MgNsIe7n0ZSHn+a1cQ2uL0ctT6MRxshYhQWFKXDlXLZMLe4u7uYztP3luPwO68Gj29 8H7G6GmmFlFMv+CwSzovhQJoGDKLe5r6v90sHQwlgWCyf1pxqcXWlyGkYbHOfkeJorO0 xTudbwqx9EY6f949YNwn2ph6glp7zILSK267glLQiDY+Wty5OcXsIsB9QEDbWuC7eZJN 5cKLV7DYh7dLFs6mX5W6Erd9y8HJB101kNbhJXUSBLDfZcW9L6oRZAqHf3KdYTMM7H+J Ra+yWfy4f3+K1l+NQRyYv8AiLZ+Xt6QGACmsxJKawfmttg0NG+69ZCUSoqUOGNIe+S5V FT3g== X-Gm-Message-State: AFuF++mWlJvnnP+Wwa3US+thh+hHY7O3XMZ2fNPviOnwRBL2B4zxBNJf fPYs38H5xe8z9JCOnqt9Bd5T9jJM/pdlxG6NKikRBKSyDd8W+aT3b0vhUPKMIQ== X-Gm-Gg: AR+sD10SDddLTmIJrGRsJFqec2OCa5aFZLOr3PpoA7NkaFB62w0MM5am326o90rEvTn endGYAn2aJ6E5u30ZVceh4X/ya3lIfAoK/KMVChgvG1CJbDKvqeHj/hb7eThqeeNOJidWg/+Yca nlxvNMwxf14dGMO4mY9cAh2zmSRrtlLOXraOGZfVrTyyvWrXwhaxbWHjeIUqGYAfV0oNtf4gf9Z y79bPfyi6ydN/0SKpC/U7pbACvH4/U7WRLWEJWExX5LvTEk/RyuVgzJ6VJWsPMkzNFiqRmsWbGk tnh4fLhZgHiANniMKy+k+olTGC+KRVoTL5v6/q65eO4x/KeNFe1UwX81+8qdAjLi7Twuh0hCZ2+ 7Bqy0TG3/afpsi9KYqhc/PgfTpTeOG0cLCc2TwZy2BxtRJFSYz2j08lGEhlKvAtgQf29DLgDLvh bolmuXVrb2FLMldZN4BOTwi5BmVPMCMPmowcIja9cNOraOGaAmbhx7lQhclbUT0wQ9/8M5Q7/tO GvI5w== X-Received: by 2002:a17:90b:4e8f:b0:383:f52b:d616 with SMTP id 98e67ed59e1d1-395810844a8mr16933048a91.10.1787197549009; Wed, 19 Aug 2026 20:45:49 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Frank Chang , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 22/93] tests/tcg/riscv64: Add test for Zicclsm Date: Thu, 20 Aug 2026 13:43:19 +1000 Message-ID: <20260820034430.1186695-23-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=alistair23@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197822849158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang Cover scalar, floating-point, vector, and segmented misaligned accesses with Zicclsm enabled and disabled. Clean up both generated test binaries. To build and run the tests: make -C build/tests/tcg/riscv64-softmmu \ CC=3Driscv64-unknown-elf-gcc LD=3Driscv64-unknown-elf-ld \ test-zicclsm test-zicclsm-off make -C build/tests/tcg/riscv64-softmmu \ run-test-zicclsm run-test-zicclsm-off To clean the generated binaries and objects: make -C build/tests/tcg/riscv64-softmmu clean Signed-off-by: Frank Chang Reviewed-by: Daniel Henrique Barboza Message-ID: <20260810055618.1175500-8-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- tests/tcg/riscv64/Makefile.softmmu-target | 22 ++ tests/tcg/riscv64/test-zicclsm.S | 368 ++++++++++++++++++++++ 2 files changed, 390 insertions(+) create mode 100644 tests/tcg/riscv64/test-zicclsm.S diff --git a/tests/tcg/riscv64/Makefile.softmmu-target b/tests/tcg/riscv64/= Makefile.softmmu-target index 82be8a2c91..908fd008e4 100644 --- a/tests/tcg/riscv64/Makefile.softmmu-target +++ b/tests/tcg/riscv64/Makefile.softmmu-target @@ -41,5 +41,27 @@ comma:=3D , run-test-crc32: test-crc32 $(call run-test, $<, $(QEMU) -cpu rv64$(comma)xlrbr=3Dtrue $(QEMU_OPTS)$<) =20 +# Zicclsm: misaligned load/store support. Assemble one source twice: the +# default build expects every misaligned access to succeed (zicclsm=3Dtrue= ), +# the -DZICCLSM_DISABLED build expects every one to trap (zicclsm=3Dfalse). +ZICCLSM_MARCH =3D -march=3Drv64gcv_zfh +CLEANFILES +=3D test-zicclsm test-zicclsm-off + +test-zicclsm: test-zicclsm.S $(LINK_SCRIPT) + $(CC) $(CFLAGS) $(ZICCLSM_MARCH) $< -Wa,--noexecstack -c -o test-zicclsm.o + $(LD) $(LDFLAGS) test-zicclsm.o -o $@ + +test-zicclsm-off: test-zicclsm.S $(LINK_SCRIPT) + $(CC) $(CFLAGS) $(ZICCLSM_MARCH) -DZICCLSM_DISABLED $< -Wa,--noexecstack = -c -o test-zicclsm-off.o + $(LD) $(LDFLAGS) test-zicclsm-off.o -o $@ + +EXTRA_RUNS +=3D run-test-zicclsm +run-test-zicclsm: test-zicclsm + $(call run-test, $<, $(QEMU) -cpu rv64$(comma)v=3Dtrue$(comma)zfh=3Dtrue$= (comma)zicclsm=3Dtrue $(QEMU_OPTS)$<) + +EXTRA_RUNS +=3D run-test-zicclsm-off +run-test-zicclsm-off: test-zicclsm-off + $(call run-test, $<, $(QEMU) -cpu rv64$(comma)v=3Dtrue$(comma)zfh=3Dtrue$= (comma)zicclsm=3Dfalse $(QEMU_OPTS)$<) + # We don't currently support the multiarch system tests undefine MULTIARCH_TESTS diff --git a/tests/tcg/riscv64/test-zicclsm.S b/tests/tcg/riscv64/test-zicc= lsm.S new file mode 100644 index 0000000000..a2f217c0d1 --- /dev/null +++ b/tests/tcg/riscv64/test-zicclsm.S @@ -0,0 +1,368 @@ +/* + * Test the Zicclsm extension (misaligned load/store support). + * + * This single source is assembled twice: + * - test-zicclsm : run on a CPU with zicclsm=3Dtrue. Every misalig= ned + * scalar integer, floating-point and vector + * load/store must complete WITHOUT raising a trap. + * - test-zicclsm-off : built with -DZICCLSM_DISABLED and run on a CPU = with + * zicclsm=3Dfalse. Every misaligned access must r= aise a + * misaligned load/store exception, with the corre= ct + * mcause and mtval. + * + * Zicclsm governs all regular scalar loads/stores (integer and F/D/Zfh + * floating-point) as well as vector element loads/stores. Floating-point + * loads/stores (flh/flw/fld, fsh/fsw/fsd) are therefore exercised here. + * + * Atomic (A/Zacas/...) accesses are intentionally excluded: they always + * require natural alignment regardless of Zicclsm. Likewise cm.push/cm.p= op + * (Zcmp) are excluded, as they are not regular loads/stores. + * + * Register conventions (persist across the whole test; the trap handler o= nly + * clobbers t0-t4): + * s1 =3D expected mcause for the pending misaligned access + * s2 =3D expected mtval (the misaligned address) + * s3 =3D trap counter (incremented by the handler) + * s4 =3D base address of the aligned data buffer + * s5 =3D snapshot of s3 taken before an access, used to check the delta + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + + .option norelax + .option norvc + +/* RISC-V exception causes (see target/riscv/cpu_bits.h). */ +#define CAUSE_LOAD_MISALIGNED 0x4 +#define CAUSE_STORE_MISALIGNED 0x6 + +/* + * EXPECT sets up the expectation for the access that immediately follows = and + * snapshots the trap counter. + * \cause =3D expected mcause if the access traps + * \off =3D byte offset from the buffer base; also the expected mtval + */ + .macro EXPECT cause, off + li s1, \cause + addi s2, s4, \off + mv s5, s3 + .endm + +/* + * CHECK validates the outcome of the preceding access. + * - When Zicclsm is disabled, exactly one trap must have fired. + * - When Zicclsm is enabled, no trap must have fired. + */ + .macro CHECK +#ifdef ZICCLSM_DISABLED + addi s5, s5, 1 + bne s3, s5, fail +#else + bne s3, s5, fail +#endif + .endm + +/* In the enabled case, also verify the value returned by scalar loads. */ + .macro CHECK_VALUE value +#ifndef ZICCLSM_DISABLED + li t0, \value + bne a2, t0, fail +#endif + .endm + +/* Verify bytes written by an enabled scalar store. */ + .macro CHECK_BYTE off, value +#ifndef ZICCLSM_DISABLED + lbu t0, \off(s4) + li t1, \value + bne t0, t1, fail +#endif + .endm + + .text + .global _start +_start: + /* Install the trap handler. */ + lla t0, trap + csrw mtvec, t0 + + /* Enable the FP (FS) and Vector (VS) unit state so F/D/V instructions + * do not trap as illegal. 0x6600 =3D FS[14:13]=3D11 | VS[10:9]=3D11. */ + li t0, 0x6600 + csrs mstatus, t0 + + /* Initialise persistent state. */ + li s3, 0 /* trap counter */ + lla s4, buf /* aligned buffer base */ + + /* + * ---- Scalar integer loads ---- + * lh/lhu need 2-byte alignment; lw/lwu 4-byte; ld 8-byte. + */ + EXPECT CAUSE_LOAD_MISALIGNED, 1 + lh a2, 1(s4) + CHECK + CHECK_VALUE 0x2211 + EXPECT CAUSE_LOAD_MISALIGNED, 1 + lhu a2, 1(s4) + CHECK + CHECK_VALUE 0x2211 + + EXPECT CAUSE_LOAD_MISALIGNED, 1 + lw a2, 1(s4) + CHECK + CHECK_VALUE 0x44332211 + EXPECT CAUSE_LOAD_MISALIGNED, 3 + lw a2, 3(s4) + CHECK + CHECK_VALUE 0x66554433 + EXPECT CAUSE_LOAD_MISALIGNED, 1 + lwu a2, 1(s4) + CHECK + CHECK_VALUE 0x44332211 + + EXPECT CAUSE_LOAD_MISALIGNED, 1 + ld a2, 1(s4) + CHECK + CHECK_VALUE 0x8877665544332211 + EXPECT CAUSE_LOAD_MISALIGNED, 3 + ld a2, 3(s4) + CHECK + CHECK_VALUE 0xaa99887766554433 + EXPECT CAUSE_LOAD_MISALIGNED, 7 + ld a2, 7(s4) + CHECK + CHECK_VALUE 0xeeddccbbaa998877 + + /* + * ---- Scalar integer stores ---- + */ + li t6, 0x1122334455667788 + EXPECT CAUSE_STORE_MISALIGNED, 1 + sh t6, 1(s4) + CHECK + CHECK_BYTE 1, 0x88 + CHECK_BYTE 2, 0x77 + + EXPECT CAUSE_STORE_MISALIGNED, 1 + sw t6, 1(s4) + CHECK + CHECK_BYTE 1, 0x88 + CHECK_BYTE 2, 0x77 + CHECK_BYTE 3, 0x66 + CHECK_BYTE 4, 0x55 + EXPECT CAUSE_STORE_MISALIGNED, 3 + sw t6, 3(s4) + CHECK + CHECK_BYTE 3, 0x88 + CHECK_BYTE 4, 0x77 + CHECK_BYTE 5, 0x66 + CHECK_BYTE 6, 0x55 + + EXPECT CAUSE_STORE_MISALIGNED, 1 + sd t6, 1(s4) + CHECK + CHECK_BYTE 1, 0x88 + CHECK_BYTE 2, 0x77 + CHECK_BYTE 3, 0x66 + CHECK_BYTE 4, 0x55 + CHECK_BYTE 5, 0x44 + CHECK_BYTE 6, 0x33 + CHECK_BYTE 7, 0x22 + CHECK_BYTE 8, 0x11 + EXPECT CAUSE_STORE_MISALIGNED, 7 + sd t6, 7(s4) + CHECK + CHECK_BYTE 7, 0x88 + CHECK_BYTE 8, 0x77 + CHECK_BYTE 9, 0x66 + CHECK_BYTE 10, 0x55 + CHECK_BYTE 11, 0x44 + CHECK_BYTE 12, 0x33 + CHECK_BYTE 13, 0x22 + CHECK_BYTE 14, 0x11 + + /* + * ---- Floating-point loads ---- + * flh needs 2-byte alignment; flw 4-byte; fld 8-byte. Their alignment + * is governed by Zicclsm just like the scalar integer forms. + */ + EXPECT CAUSE_LOAD_MISALIGNED, 1 + flh fa0, 1(s4) + CHECK + + EXPECT CAUSE_LOAD_MISALIGNED, 1 + flw fa0, 1(s4) + CHECK + EXPECT CAUSE_LOAD_MISALIGNED, 3 + flw fa0, 3(s4) + CHECK + + EXPECT CAUSE_LOAD_MISALIGNED, 1 + fld fa0, 1(s4) + CHECK + EXPECT CAUSE_LOAD_MISALIGNED, 7 + fld fa0, 7(s4) + CHECK + + /* + * ---- Floating-point stores ---- + */ + EXPECT CAUSE_STORE_MISALIGNED, 1 + fsh fa0, 1(s4) + CHECK + + EXPECT CAUSE_STORE_MISALIGNED, 1 + fsw fa0, 1(s4) + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 3 + fsw fa0, 3(s4) + CHECK + + EXPECT CAUSE_STORE_MISALIGNED, 1 + fsd fa0, 1(s4) + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 7 + fsd fa0, 7(s4) + CHECK + + /* + * ---- Vector unit-stride loads / stores ---- + * A base address that is not aligned to the element size (SEW) is + * misaligned for the first element access. + */ + vsetvli t1, x0, e16, m1, ta, ma + EXPECT CAUSE_LOAD_MISALIGNED, 1 + addi a0, s4, 1 + vle16.v v0, (a0) + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 1 + addi a0, s4, 1 + vse16.v v0, (a0) + CHECK + + vsetvli t1, x0, e32, m1, ta, ma + EXPECT CAUSE_LOAD_MISALIGNED, 1 + addi a0, s4, 1 + vle32.v v0, (a0) + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 3 + addi a0, s4, 3 + vse32.v v0, (a0) + CHECK + + vsetvli t1, x0, e64, m1, ta, ma + EXPECT CAUSE_LOAD_MISALIGNED, 1 + addi a0, s4, 1 + vle64.v v0, (a0) + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 7 + addi a0, s4, 7 + vse64.v v0, (a0) + CHECK + + /* + * ---- Vector strided loads / stores ---- + */ + vsetvli t1, x0, e32, m1, ta, ma + li a1, 8 /* stride in bytes */ + EXPECT CAUSE_LOAD_MISALIGNED, 1 + addi a0, s4, 1 + vlse32.v v0, (a0), a1 + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 1 + addi a0, s4, 1 + vsse32.v v0, (a0), a1 + CHECK + + /* ---- Vector indexed loads / stores ---- */ + /* + * Zero indices keep the first element at the deliberately misaligned bas= e. + */ + vmv.v.i v1, 0 + EXPECT CAUSE_LOAD_MISALIGNED, 1 + addi a0, s4, 1 + vluxei32.v v0, (a0), v1 + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 1 + addi a0, s4, 1 + vsuxei32.v v0, (a0), v1 + CHECK + + /* ---- Vector segmented loads / stores ---- */ + EXPECT CAUSE_LOAD_MISALIGNED, 1 + addi a0, s4, 1 + vlseg2e32.v v0, (a0) + CHECK + EXPECT CAUSE_STORE_MISALIGNED, 1 + addi a0, s4, 1 + vsseg2e32.v v0, (a0) + CHECK + + /* + * ---- Vector whole-register load ---- + * Only the whole-register *load* forms carry an element width + * (vl1re32.v =3D> EEW=3D32), so only they enforce alignment when Zicclsm= is + * off. The whole-register store form (vs1r.v) is defined as EEW=3D8 + * (byte granular) and therefore never faults on misalignment, so it is + * not exercised here. + */ + EXPECT CAUSE_LOAD_MISALIGNED, 1 + addi a0, s4, 1 + vl1re32.v v1, (a0) + CHECK + + /* Success. */ + li a0, 0 + j _exit + + /* + * Trap handler: validate mcause and mtval against the expectation, bump + * the trap counter, then skip past the faulting instruction. The + * instruction length is decoded from its low two bits (0b11 =3D> 4 bytes, + * otherwise a 2-byte compressed instruction). + */ + .balign 4 +trap: + csrr t0, mcause + bne t0, s1, fail + csrr t1, mtval + bne t1, s2, fail + addi s3, s3, 1 + + csrr t0, mepc + lhu t2, 0(t0) + andi t3, t2, 3 + li t4, 3 + bne t3, t4, 1f + addi t0, t0, 4 /* 32-bit instruction */ + j 2f +1: + addi t0, t0, 2 /* 16-bit compressed instruction */ +2: + csrw mepc, t0 + mret + +fail: + li a0, 1 +_exit: + lla a1, semiargs + li t0, 0x20026 /* ADP_Stopped_ApplicationExit */ + sd t0, 0(a1) + sd a0, 8(a1) + li a0, 0x20 /* TARGET_SYS_EXIT_EXTENDED */ + .balign 16 + slli zero, zero, 0x1f + ebreak + srai zero, zero, 0x7 + j . + + .data + .balign 16 +semiargs: + .space 16 + .balign 64 +buf: + .byte 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 + .byte 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff + .space 240 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198155; cv=none; d=zohomail.com; s=zohoarc; b=XCJV9iNyJsYq6mjAgzpuSBFOCf1nEgySWDWJuHAcaZkEP4qGriiJ0IHcdoAqn+PaFBxwEqJPfygABPdFSnspJwYm1tZCfQw6IcjHK9Wi+DwGdSDXv+SALPuS5s4Ansf1TE6Qf+G6EgCapfLuWNBksaMI26u2yNWbnb5qbMJ6IsQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198155; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=PltKUjMnHc0h/eHYDCnaxVw3n7hGNmURlznNMKxaWok=; b=PWtUpS6mpj5c0gFvIXJADh54yDLOW6KCh04b+tjt0yqXPgjpm3NXcixYiKrA5iaWQS1Hrs+irTeX7FOw5EWIxf6NF4rOe5R9A357TiNgCmACdMUrLhC41gQgVuTSNJcEZvC3rvX1ZdFZSixtnoFLIK6rna1ezYZm9Qji+fEWt3s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198155299422.71655823146773; Wed, 19 Aug 2026 20:55:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtj3-0000Rr-Al; Wed, 19 Aug 2026 23:45:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtj1-0000Ix-Kg for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:55 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtiz-00040K-Un for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:55 -0400 Received: by mail-pj1-x1033.google.com with SMTP id 98e67ed59e1d1-3811f512167so2522485a91.3 for ; Wed, 19 Aug 2026 20:45:53 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197552; x=1787802352; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=PltKUjMnHc0h/eHYDCnaxVw3n7hGNmURlznNMKxaWok=; b=OFOwshXN1nGgeWigLfBcsXCC54q1miIhHw/L9mCjVu8wA9PMfrmAKsWjKOibNnuhWA jAYvCjIxpKfyTan7U1wQwYjN3zDG7TbWyabsiS9qir3qTZRZYR6CYGHK3BiK2c9pqWa/ LPdKs8kHellxnMVT5WJEjKkhMK1ZjQQ9HEqDHavxUGyWNngbuCfAsZCS0KiKulp4p48E VuNfJRj0dvyVcvhP/cWq5p5Vl7J23noMIf/GEyi02XJV+THC35deUF1GjWzZI0lY06LM z9ObvVNLFRDr6VEBuQAk06Rx927Luphz5e2hAQajsFe3qRcMskZ7U0FuoFhLhYHGAF34 dmBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197552; x=1787802352; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=PltKUjMnHc0h/eHYDCnaxVw3n7hGNmURlznNMKxaWok=; b=KBUkn/BJGvnHVRv725M6cFS4IJcgqVAajx3xoVwIGc1TyIN0nYfHxyqOU3LdYrVd/0 ra5A/dYpuW/5JZ0iKWd+WeQOGEbva8YNcVRZlczKOULcUWfCnAWNi45feLF/sZwqmmkU +Ec7aEyzO7wlHleLMfotClrRBD3cJSnyylJ6/ZiMd9VvzJiAoQvpv1SKXartiOKgS0uL o90uwi07EOFfokq4AxYU+8TdC/qTRTWlb7S0r5sj5p8v45Q+PQBByQwSWrsuCNC247XC DbMKgOeElhOXHjzMAofKyvjRviLdObnC7IWE2xoYfzZWsYY9ToMXcMGNQ8ZiywNHJRHC EPcg== X-Gm-Message-State: AFuF++mqkIwFgFK96ZxoHGaQtojsGgpYjh1eh1TWBrKfqKYHNXjtSVqt RfhxE+oZgBsGEGA/Mb3Tku7ZBqWFpf17SSWcffAqai7ETMC1IG8Rs9myrb8H2g== X-Gm-Gg: AR+sD136bfjmYRclYw3Uhq9P3wvW1GvlwQRbqeDZkVwxeYOPCcGxTN+IZWuTuVjGr6M NMhfg4avziCWv+VlkGpln2bCpOKBLGwBlKQOqRfMzo155+21vFBNwXRKl2l8caVdlxnjkEfgGwS 6gSwUacfUNYK2THlI4WRdruvILyqvZrFkXnutYuHUz8p0hIbJcJqhK23Ze3q6aByTsQD9m3vHmr lSmDiPsF1EVQClG+h/qNuDy1qP6Xtv1AKsLU/tWdBq5gPL0yK6m6pKqWWv0CA7IY4pKS5koDtYL 3uHg+N2bcX6K0k+liNDtyZGJB5b9cl/b3wzaawPHogv0KX+Z8RtI4zbvMLLRwK4DatGaD/X7PwR K6++6NSW2u9ckChV/rySaY1nd+pMmxz9Sv3gcw4+nEHZTMCQ5m22NyjGHPz2JVG4b1p7D4x0J5n FHgpkHex9Eo1IHlDMB8/PdQ2h2i/Mysy/IR8Y2P8gFlZ4hNsxW4nRpx4UN201O3kU0y0gQzAICA N4tbQ== X-Received: by 2002:a17:90b:4e8f:b0:392:ca3b:370a with SMTP id 98e67ed59e1d1-39580a50d67mr19140461a91.2.1787197552157; Wed, 19 Aug 2026 20:45:52 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Flavien Solt , Tao Tang , Nutty Liu , Alistair Francis Subject: [PULL 23/93] hw/misc/iommu-testdev: support PCI MSI test writes Date: Thu, 20 Aug 2026 13:43:20 +1000 Message-ID: <20260820034430.1186695-24-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198156232158500 Content-Type: text/plain; charset="utf-8" From: Flavien Solt iommu-testdev writes ITD_DMA_WRITE_VAL with unspecified requester attributes. RISC-V MSI remapping tests need to select an interrupt identity in the payload. The MSI trap also identifies the device through MemTxAttrs.requester_id. Add a write-value register with the existing constant as its reset default. Populate the requester ID from the PCI function. Existing translation tests retain their payload while interrupt-remapping tests can issue a valid MSI for the test device. Signed-off-by: Flavien Solt Reviewed-by: Tao Tang Reviewed-by: Nutty Liu Acked-by: Alistair Francis Message-ID: <20260727-qemu-mrif-v4-v4-1-73e0890ad395@gmail.com> Signed-off-by: Alistair Francis --- include/hw/misc/iommu-testdev.h | 1 + hw/misc/iommu-testdev.c | 14 ++++++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/include/hw/misc/iommu-testdev.h b/include/hw/misc/iommu-testde= v.h index 338365947c..2f4e9310df 100644 --- a/include/hw/misc/iommu-testdev.h +++ b/include/hw/misc/iommu-testdev.h @@ -81,6 +81,7 @@ enum { ITD_REG_DMA_ATTRS =3D 0x18, ITD_REG_DMA_GPA_LO =3D 0x1c, ITD_REG_DMA_GPA_HI =3D 0x20, + ITD_REG_DMA_WRITE_VAL =3D 0x24, BAR0_SIZE =3D 0x1000, }; =20 diff --git a/hw/misc/iommu-testdev.c b/hw/misc/iommu-testdev.c index 15eb6de78a..6428a57fed 100644 --- a/hw/misc/iommu-testdev.c +++ b/hw/misc/iommu-testdev.c @@ -28,6 +28,7 @@ struct IOMMUTestDevState { uint64_t dma_paddr; uint32_t dma_len; uint32_t dma_result; + uint32_t dma_write_val; bool dma_armed; /* armed until a trigger consumes the request */ =20 AddressSpace *dma_as; /* IOMMU-mediated DMA AS for this device */ @@ -80,6 +81,7 @@ static void iommu_testdev_maybe_run_dma(IOMMUTestDevState= *s) =20 /* Initialize MemTxAttrs from generic register. */ attrs.secure =3D ITD_ATTRS_GET_SECURE(s->dma_attrs_cfg); + attrs.requester_id =3D pci_requester_id(&s->parent_obj); =20 space_valid =3D ITD_ATTRS_GET_SPACE_VALID(s->dma_attrs_cfg); if (space_valid) { @@ -97,12 +99,12 @@ static void iommu_testdev_maybe_run_dma(IOMMUTestDevSta= te *s) =20 as =3D s->dma_as; =20 - /* Step 1: Write ITD_DMA_WRITE_VAL to DMA address */ + /* Step 1: Write the configured test value to DMA address */ trace_iommu_testdev_dma_write(s->dma_vaddr, s->dma_len); =20 for (int i =3D 0; i < s->dma_len; i++) { /* Data is written in little-endian order */ - write_buf[i] =3D (ITD_DMA_WRITE_VAL >> ((i % 4) * 8)) & 0xff; + write_buf[i] =3D (s->dma_write_val >> ((i % 4) * 8)) & 0xff; } write_res =3D dma_memory_write(as, s->dma_vaddr, write_buf, s->dma_len, attrs); @@ -186,6 +188,9 @@ static uint64_t iommu_testdev_mmio_read(void *opaque, h= waddr addr, case ITD_REG_DMA_ATTRS: value =3D s->dma_attrs_cfg; break; + case ITD_REG_DMA_WRITE_VAL: + value =3D s->dma_write_val; + break; default: value =3D 0; break; @@ -240,6 +245,9 @@ static void iommu_testdev_mmio_write(void *opaque, hwad= dr addr, uint64_t val, case ITD_REG_DMA_ATTRS: s->dma_attrs_cfg =3D data; break; + case ITD_REG_DMA_WRITE_VAL: + s->dma_write_val =3D data; + break; default: break; } @@ -263,6 +271,7 @@ static void iommu_testdev_realize(PCIDevice *pdev, Erro= r **errp) s->dma_paddr =3D 0; s->dma_len =3D 0; s->dma_result =3D ITD_DMA_RESULT_IDLE; + s->dma_write_val =3D ITD_DMA_WRITE_VAL; s->dma_armed =3D false; s->dma_attrs_cfg =3D ITD_ATTRS_SET_SPACE(0, ITD_ATTRS_SPACE_NONSECURE); s->dma_as =3D pci_device_iommu_address_space(pdev); @@ -280,6 +289,7 @@ static void iommu_testdev_reset(DeviceState *dev) s->dma_paddr =3D 0; s->dma_len =3D 0; s->dma_result =3D ITD_DMA_RESULT_IDLE; + s->dma_write_val =3D ITD_DMA_WRITE_VAL; s->dma_armed =3D false; s->dma_attrs_cfg =3D ITD_ATTRS_SET_SPACE(0, ITD_ATTRS_SPACE_NONSECURE); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198226; cv=none; d=zohomail.com; s=zohoarc; b=gSy4YhdvR2Y+EE65DT9aY4Wy7SO6eMJfewUCjil3qGbDXJzaS7qgOhdofI96375vkPObY5r10MKQN140J5LHRrsh+G9FZ25vsloUV/mFDo5P1t2/Lx8Tx9CZZGynvorgAaFtmh0+9iGwI6iTyuDH+xaiBQkhq95Aysi4Lu9nthw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198226; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=iD2tMtkECcQrx2RUBOvv3hC8c/xLCnyFp2Y8KlrwhSY=; b=YPdtMIwV6+5gXa1cNtRu8Jwcr/lViJoABdSYvHlGSCXAE3OjNe8RkzJWEsSdz9d3LkzsTvxvng+qlM60LRnmwNpQ9P13auRh2EokZQlUruyhu+5dxM1ZVtjnUwPaB290Rc9aYLEhKwiPQWbZTbMTpcNloVfGjfuMYuH3KIBpoBs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198226148734.0131236127968; Wed, 19 Aug 2026 20:57:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtj7-0000aq-Bm; Wed, 19 Aug 2026 23:46:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtj5-0000Xv-9w for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:59 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtj3-00040l-Ng for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:45:59 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-38759bcd877so2221129a91.2 for ; Wed, 19 Aug 2026 20:45:57 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197556; x=1787802356; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=iD2tMtkECcQrx2RUBOvv3hC8c/xLCnyFp2Y8KlrwhSY=; b=ZjbqO0/I9WkW70crMvSTduMjMkdmGDDn2yntDp0513JZz71CCXAT9/wBJypfWkws/a oTetGR3r91040VUb2Btc9ZGMQ0tVAr8oc8uGxONSxsDNHkfoVEIgapeLEFUNxZ8SRnDm LLE92xEsss3/IAmkbPdSAva33GRkSaMbipyrqxk0R2R8AZUXOzURpEZcbPVtqehF0d+v +UBmW8OntMXcZT7INliHKgwbmiGWuMcTL0ybJpk0ZA8GReQxuurh22vrXUxwYaHX1Efa Vpbt1RqCxVv8kpzBfEGwzTxt1VDl3l/sWwljRQYlEx1HIikIucbvkTGxiJBgJrY+IM1M MX7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197556; x=1787802356; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=iD2tMtkECcQrx2RUBOvv3hC8c/xLCnyFp2Y8KlrwhSY=; b=mspi29DVZK548yrTEHOo9cA3NB1SZM3AvWfU98dqkUNVJQC4jvCmtf5ip87cUrtNZC J4gpPX+7MY0SASAirbMcrc9JCa5X5ypF0YusvL4w3lpcMTVsA0aUeiRVs5dkKmF404j4 RyGgTSyZgWdf8G3qEeu7yTDuvs+ayQleGP7kLFO763fXv8DKXrnZC00cFgGG30/Tu/vm peKBUnhYhCWbx+gy0Cfp1YYoSgANGhvwxWtBSPRGzHqX2Ff5du5F9UQs0WX21IsQZb3i ZCRsk17ZzqVPxLf4nSTbCbGCz8xfk9GE7HGhoJ9LqNFBTZ/lYHCVP1nsZw/Hj21qc0Mw 0lLQ== X-Gm-Message-State: AFuF++ngbxYG4q2o++ZidbmpXZ0uYoQe5MBMREKsW32d3lMzLpBzYYMD YiDYAN2cYD8NCD+Kvz9vQMEyY9ah7E9WGXfpWv4sChYzNrbUan7S/iaI/b6+FA== X-Gm-Gg: AR+sD12xiJbEO/azz9iLPxchjIYFoHA2rYMjaMe/QRDLuWa5XC3LBWJi20zmkSpcWR+ 3KBobtAPQEoRjKbi7ZqSQzeACdVZsW+k+PAHrtLUpkf+9rCFpHJ1K2PicmYoDqIcgLMXvp56N0G SjXG8Kfj6vHOQ52ZTTwjfOYSWQh+HEw3nOlt6Lqo9yDRObfF1bYsXcergzbe6lWzFU9lAkIqh7q Ua0y1zBEqHVRYQ/+zjnr0jQklI1mr4HN4Lko0laAVQyKaZjdrIRZAaj2SKqf33DJlZqS+sEWNwG oOo5DeozZyLi25qPYtdNQMppABi+zwM/fzqSLkRXlh0zkOZ3cAb9thrx8OGlAdl6WflGjUOrAy7 wVRgYsoal8O/SdMFVhAUr/+hDeVrnr03YK/ZgB1YBiJ30OpS2Bxp6K/C1QsepwQqv0jixBUZYhF EYAmIFRYJEEEZjWyZvpiIxJUzxiFt89IZL287g2w0JTm9/51UeqUAd4o2/dfPZLR+OTZbYxrXL+ vT6/vuNFK7h0HFw X-Received: by 2002:a17:90b:164c:b0:393:19a3:4e5 with SMTP id 98e67ed59e1d1-395812c6e07mr14933291a91.16.1787197556270; Wed, 19 Aug 2026 20:45:56 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Flavien Solt , qemu-stable@nongnu.org, Andrew Jones , Daniel Henrique Barboza , Nutty Liu , Chao Liu , Alistair Francis Subject: [PULL 24/93] hw/riscv/riscv-iommu.c: always send MRIF notice MSI Date: Thu, 20 Aug 2026 13:43:21 +1000 Message-ID: <20260820034430.1186695-25-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198228281158500 Content-Type: text/plain; charset="utf-8" From: Flavien Solt The AIA specification requires an IOMMU to send the configured notice MSI after storing an MSI to an MRIF, even when the corresponding interrupt-enable bit is clear. riscv_iommu_msi_write() currently reads the MRIF interrupt-enable doubleword and suppresses the notice MSI when the matching bit is zero. This makes notice delivery depend on a bit that AIA requires the IOMMU to ignore. Remove the enable-word read and send the notice MSI unconditionally after updating the MRIF pending bit. Fixes: 0c54acb8243d ("hw/riscv: add RISC-V IOMMU base emulation") Cc: qemu-stable@nongnu.org Reviewed-by: Andrew Jones Signed-off-by: Flavien Solt Reviewed-by: Daniel Henrique Barboza Reviewed-by: Nutty Liu Reviewed-by: Chao Liu Tested-by: Chao Liu Message-ID: <20260727-qemu-mrif-v4-v4-2-73e0890ad395@gmail.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index f6865d1e16..2bbac30cfa 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -788,19 +788,6 @@ static MemTxResult riscv_iommu_msi_write(RISCVIOMMUSta= te *s, goto err; } =20 - /* Get MRIF enable bits */ - addr =3D addr + sizeof(intn); - res =3D dma_memory_read(s->target_as, addr, &intn, sizeof(intn), attrs= ); - if (res !=3D MEMTX_OK) { - cause =3D RISCV_IOMMU_FQ_CAUSE_MSI_LOAD_FAULT; - goto err; - } - - if (!(intn & data)) { - /* notification disabled, MRIF update completed. */ - return MEMTX_OK; - } - /* Send notification message */ addr =3D PPN_PHYS(get_field(pte[1], RISCV_IOMMU_MSI_MRIF_NPPN)); n190 =3D get_field(pte[1], RISCV_IOMMU_MSI_MRIF_NID) | --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197614; cv=none; d=zohomail.com; s=zohoarc; b=H1XTI9u3/9OKvEDssUUjNmHIksVNxD7NaQshIJduGp7a5of2U9fdBQxqsEPRef+nckftHbiKOWFBbFHk71NBHHyCuyY/eoSfdu2Q7oSKurPcl9PR4Xs8NfWUekH8wBVC+GhdVWwexbS86Smms5EHSHGphw4Ww0nwZVqmJsgGz58= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197614; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=bmY41LJV136WTAQr9mDvHt6oN81a2s5d+AHK4tbcUfQ=; b=FsSqxdu6A/1Y6WZhs402hq/GkWaDb1zjmfAJYwuQMz4fF/qnL+8r96Xq4EUpxqf0mjw6IfVra1vf40u7OaPGQptnaXs6oPGOx1Lrcyt9LmeQjJ1a3DLDpaLbBeH48GLC7OwFSx5dMBpb2k2gHB0I0U/i6VdK6R3a0hbyVmZtCrA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197614466683.2808988801656; Wed, 19 Aug 2026 20:46:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjB-0000hL-Hj; Wed, 19 Aug 2026 23:46:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtj8-0000dt-HW for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:02 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtj6-00041B-Jg for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:02 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-38e041ea211so1771911a91.0 for ; Wed, 19 Aug 2026 20:46:00 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:45:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197559; x=1787802359; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=bmY41LJV136WTAQr9mDvHt6oN81a2s5d+AHK4tbcUfQ=; b=ix0TtYS+yZ+ecC5xmRqtuxcQbpNJhr6EM0FGEPqssM9Di9iTqFRK4cmHeU2ueqooc+ TOzGtOzcl0laXP5qZOPLj0zis+TK6lpQpHOUeBBXbDTlf99Gt5gc5B+PRoxVwxu1THwq 22Lwmv0p038dnvIVOp0FsdroOuxZDOIdLt7JKAPmwjrvKAJSbXOi8XjOdMGNZLxItRrL asLbHPwQ5ShyglwmZlaUyqiDh1kDGQJVxyauqBx/N3dtt7KDrU9BV2lnOzS6XaDg7zmG VzjqIgmrT/bcyc/IBZnw2S3JWu/oCxP0M4XhpGoBob4oFZsJjlXSouvHBhrtGURSHlXC 7B/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197559; x=1787802359; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=bmY41LJV136WTAQr9mDvHt6oN81a2s5d+AHK4tbcUfQ=; b=gYpITM7KiPEajTgkbTKqCmTYJNTE32sa+36/1y7w65HItzsoooCZwfbM0x8YNnTJcN pGQ9Jh5/aRLR/9ZawQ2BEmvIPpG7NAbDfw4JP4bLdMbrvJo42bycsFAERVbABNOvKbnx twFfHfh1KepruNkL9eLUtjsGD3d3ectApADR5dMhFBWb3zcs59rvfN9DrsDTe1XwKiQI UKChpekUlT0XQv/Kpm481mSCooch4FOodkQwiQeGeAlnUgc2XB8p6xhRcNqm7SMesJvT XzkCByJSLVPFDV8QUGWYl3wuuB5cDOwc0jucaJMctW1Z6HRAAvONSE4OdlxRiWsfTbbh JO7w== X-Gm-Message-State: AFuF++mNG8sz/XsN9IRxJkYlaYLGvDpoyeSJtoB9EU90COTNwA7MVykQ lXMeCraU1vTPL1tHvM4L9BZU8xp+5ufmQ9g/maJ67V0krLWwecUkNP1ELaiSzQ== X-Gm-Gg: AR+sD12t8TQZ/EHW70Dj9uYTBjQT3Uj6uTfsEofCrtsVGgOI6A/kUtOJgLNlLiQpVIa JI4sQfJgx8gsZdzp0pMvwI9jAOVlv7IbYVkAkcnKAGBJhEtSWODJLkKqpKC7TCELw48qG6KihGB D5sk1rrKOvV70HnmdEGNBw8SQ6FX3Rpn61U9YSQl20fqwTNfYqmhWWDCeSVkP5xEG+2dQ3kNE7G vJcjF9sP4sX598Z/Py+PSyUQxcE8uWWRtfsCGneFY1mMlo292/8uFqzHOsPaJpWruxtskN3Euco MFRzTNM6tMMKIj6nwCkEnQOw+7F5xXBHI8hJVFV3s4yjW91SmvT14jTV6gSO+QyvBEF47EuPFXU 6jgt8F5V6C9aqkkntEyVNLy02wsmt7TNdUpANB79o4Yq7IRr0MH9jO1QXzLfE1M3wcQ8E24LHaR J3DLU0/sAtLKmm1FCTMtEdGpIeAzY8nOjzxJQMt0qDvAYfIKxM+i56AW13+xsYMHePbIaTGvoQx F+Ogw== X-Received: by 2002:a17:90b:1f8f:b0:38d:f5bb:e0f4 with SMTP id 98e67ed59e1d1-39580840520mr19089238a91.1.1787197559259; Wed, 19 Aug 2026 20:45:59 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Flavien Solt , Chao Liu , Alistair Francis Subject: [PULL 25/93] tests/qtest: add RISC-V IOMMU MRIF notice tests Date: Thu, 20 Aug 2026 13:43:22 +1000 Message-ID: <20260820034430.1186695-26-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197616309158500 Content-Type: text/plain; charset="utf-8" From: Flavien Solt Exercise MRIF-mode MSI writes through iommu-testdev with the destination interrupt-enable bit both clear and set. Each case requires the pending bit to be stored plus the configured notice ID to reach guest memory. The enable-clear case regresses the notice suppression fixed by the previous patch. The enable-set case provides a control for the existing path. Signed-off-by: Flavien Solt Reviewed-by: Chao Liu Message-ID: <20260727-qemu-mrif-v4-v4-3-73e0890ad395@gmail.com> Signed-off-by: Alistair Francis --- tests/qtest/iommu-riscv-test.c | 102 +++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/tests/qtest/iommu-riscv-test.c b/tests/qtest/iommu-riscv-test.c index 2638024891..85f79ea9cc 100644 --- a/tests/qtest/iommu-riscv-test.c +++ b/tests/qtest/iommu-riscv-test.c @@ -14,6 +14,7 @@ #include "hw/pci/pci_regs.h" #include "hw/misc/iommu-testdev.h" #include "hw/riscv/riscv-iommu-bits.h" +#include "libqos/qos-iommu-testdev.h" #include "libqos/qos-riscv-iommu.h" #include "libqos/riscv-iommu.h" =20 @@ -26,6 +27,13 @@ #define RISCV_BUS_MMIO_LIMIT 0x80000000 #define RISCV_ECAM_ALLOC_PTR 0x30000000 =20 +#define RISCV_MRIF_MSI_IOVA 0x00000000fee00000ull +#define RISCV_MRIF_MSI_PT_GPA (QRIOMMU_SPACE_OFFS + 0x00030000ull) +#define RISCV_MRIF_BASE_GPA (QRIOMMU_SPACE_OFFS + 0x00031000ull) +#define RISCV_MRIF_NOTICE_GPA (QRIOMMU_SPACE_OFFS + 0x00032000ull) +#define RISCV_MRIF_INTID 5u +#define RISCV_MRIF_NOTICE_ID 0x12du + typedef struct RiscvIommuTestState { QTestState *qts; QGenericPCIBus gbus; @@ -264,6 +272,96 @@ static void test_riscv_iommu_nested(void) run_riscv_iommu_translation(&cfg); } =20 +static void riscv_iommu_setup_mrif_context(RiscvIommuTestState *state) +{ + uint64_t dc_addr; + uint64_t msiptp; + uint64_t pte0; + uint64_t pte1; + + qtest_memset(state->qts, QRIOMMU_SPACE_OFFS + QRIOMMU_DDT_BASE, 0, + 0x1000); + qtest_memset(state->qts, RISCV_MRIF_MSI_PT_GPA, 0, 0x1000); + qtest_memset(state->qts, RISCV_MRIF_BASE_GPA, 0, 0x1000); + qtest_memset(state->qts, RISCV_MRIF_NOTICE_GPA, 0, 4); + + dc_addr =3D QRIOMMU_SPACE_OFFS + QRIOMMU_DDT_BASE + + state->testdev->devfn * sizeof(struct riscv_iommu_dc); + + msiptp =3D (RISCV_MRIF_MSI_PT_GPA >> 12) | + ((uint64_t)RISCV_IOMMU_DC_MSIPTP_MODE_FLAT << 60); + + qtest_writeq(state->qts, dc_addr + 0, RISCV_IOMMU_DC_TC_V); + qtest_writeq(state->qts, dc_addr + 8, 0); + qtest_writeq(state->qts, dc_addr + 16, 0); + qtest_writeq(state->qts, dc_addr + 24, 0); + qtest_writeq(state->qts, dc_addr + 32, msiptp); + qtest_writeq(state->qts, dc_addr + 40, 0); + qtest_writeq(state->qts, dc_addr + 48, RISCV_MRIF_MSI_IOVA >> 12); + qtest_writeq(state->qts, dc_addr + 56, 0); + + pte0 =3D RISCV_IOMMU_MSI_PTE_V | + ((uint64_t)RISCV_IOMMU_MSI_PTE_M_MRIF << 1) | + ((RISCV_MRIF_BASE_GPA >> 9) << 7); + pte1 =3D ((RISCV_MRIF_NOTICE_GPA >> 12) << 10) | RISCV_MRIF_NOTICE_ID; + + qtest_writeq(state->qts, RISCV_MRIF_MSI_PT_GPA, pte0); + qtest_writeq(state->qts, RISCV_MRIF_MSI_PT_GPA + 8, pte1); + + qriommu_program_regs(state->qts, state->iommu_base); +} + +static void run_riscv_iommu_mrif_notice(bool enable_bit) +{ + RiscvIommuTestState state =3D { 0 }; + uint64_t pending; + uint64_t enabled; + uint32_t notice; + uint32_t dma_result; + + if (!riscv_iommu_test_setup(&state)) { + return; + } + + riscv_iommu_check(state.qts, state.iommu_base, QRIOMMU_TM_BARE); + riscv_iommu_setup_mrif_context(&state); + + enabled =3D enable_bit ? (1ull << RISCV_MRIF_INTID) : 0; + qtest_writeq(state.qts, RISCV_MRIF_BASE_GPA + 8, enabled); + qpci_io_writel(state.testdev, state.testdev_bar, ITD_REG_DMA_WRITE_VAL, + RISCV_MRIF_INTID); + + dma_result =3D qos_iommu_testdev_trigger_dma( + state.testdev, state.testdev_bar, RISCV_MRIF_MSI_IOVA, + RISCV_MRIF_NOTICE_GPA, DMA_LEN, qriommu_build_dma_attrs()); + + pending =3D qtest_readq(state.qts, RISCV_MRIF_BASE_GPA); + notice =3D qtest_readl(state.qts, RISCV_MRIF_NOTICE_GPA); + + g_test_message("MRIF notice: enable=3D%u pending=3D0x%" PRIx64 + " notice=3D0x%x", enable_bit, pending, notice); + + /* + * Interrupt remapping consumes the original DMA write; the generic + * test device cannot read it back from the supplied physical address. + */ + g_assert_cmpuint(dma_result, =3D=3D, ITD_DMA_ERR_MISMATCH); + g_assert_cmpuint(pending & (1ull << RISCV_MRIF_INTID), !=3D, 0); + g_assert_cmpuint(notice, =3D=3D, RISCV_MRIF_NOTICE_ID); + + riscv_iommu_test_teardown(&state); +} + +static void test_riscv_iommu_mrif_notice_enable_clear(void) +{ + run_riscv_iommu_mrif_notice(false); +} + +static void test_riscv_iommu_mrif_notice_enable_set(void) +{ + run_riscv_iommu_mrif_notice(true); +} + int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); @@ -275,5 +373,9 @@ int main(int argc, char **argv) test_riscv_iommu_g_stage_only); qtest_add_func("/iommu-testdev/translation/ns-nested", test_riscv_iommu_nested); + qtest_add_func("/iommu-testdev/mrif-notice/enable-clear", + test_riscv_iommu_mrif_notice_enable_clear); + qtest_add_func("/iommu-testdev/mrif-notice/enable-set", + test_riscv_iommu_mrif_notice_enable_set); return g_test_run(); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197626; cv=none; d=zohomail.com; s=zohoarc; b=SiVmQhBWDAbokNO9+BG9axJVwIhDoCy1r7LRSQ7DWXHLzOPb2RJ2N5kpgamgYzX1ujmY74lnes8KUEkM/XCrAqHka5ZbJgKsNe/vrkM4VpU/IvMix+KKE01oaR+b1+tPJ/+gdjk4Wa73kAF8bwR7ec6lkM1YzuR29vXP+MvO5AA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197626; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=U9hvvtE/mLZxSo9keqAsE4vQdBL311za+hiZdp6fz9g=; b=KIgSrf8gOPIhVsQq6cimx3h8nWYHt9Pg7LJ77SS8okOKx9SUDX+xpD3RBrLedVkqa7RWz2rz0J7+V1iJyOSe0qq6yheLDdddcy/2bADlZxhKdjw0Y+/LPT/p6pcVKFe8NBq9pZvmavhDVC5LyHyk5gd/L+gXPFM2nvbJ0DygxPU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17871976265391022.3835868621438; Wed, 19 Aug 2026 20:47:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjE-0000nS-21; Wed, 19 Aug 2026 23:46:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjC-0000lD-5K for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:06 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtj9-00041R-Ss for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:05 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c9d1fff21edso1145533a12.1 for ; Wed, 19 Aug 2026 20:46:03 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.45.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197562; x=1787802362; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=U9hvvtE/mLZxSo9keqAsE4vQdBL311za+hiZdp6fz9g=; b=nO4l4tZ3tU/0mjTWr8WOe/ZixDQlOxxOZIyXHiewE32/kh+40uJCsIXnbIWsLjligQ fLGVoYZsvsFuYvLrpWWPsFB8MdRD5/Pi1RBQmZ0vO8rRhJMGxTQS7DdpaWtPFn+g0L9D UlZYulHJfUWqS9z6OYTtomFI4QrxFJsSCAUsWhZEtq1jNZZeASz8voKa8LkP8mT936k9 i0iy0DkY49WhTa+rLPwh6JwZMz5NhWIUqH7aBPZgDkpmfTYvL/5Z2ViEYusNL2cOX5H1 CknLq+wRz1YYtlJSAmjH8fEkfJn5G+AM0E28U6xVgBZo8iIU7s8A6vj3WfWbZ8sPIvUs Ubpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197562; x=1787802362; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=U9hvvtE/mLZxSo9keqAsE4vQdBL311za+hiZdp6fz9g=; b=KO31CIDNLp8R89YurMKWwkb4XImX7GKHTXYGThYxwo5aHKZ7jMQ6zgK3DOhr3qFvTX H321ZwDSahtDKTjtj/SAmngTSNHFcmoJbTKCWpfoiCAXIzsO2VIR0xodIB/xjTgDTcDv YHhuMpllLna5B+LaDcHm9QS4l81qrsULcgaMDyxditJ5JT8JTMSb2KCUMYHlFHyCZ2i6 5yF3QVo6khm6V3IL0/W/VH+EvCllTm74Ymx2EXgz+xcMo0HSYAAg+F05Sj0ywhVlNkfj VmMAs4mDGgbJmFIcfq58Z9mH7lSUQz0Zf2Aa6wev6nHn9fWcKNfivKRdg1WNkenOquBx svcg== X-Gm-Message-State: AOJu0YwSo0ZMnV49Id0BwpdDtWMimT6kElYXN8qjkVFRKlu3fM94x7ix tBRHa/eXyEohfMU1r9wsbrNxb8OVQ5SJ2DoklIn0zQm4GYz+tT4j+JU4vUUnyQ== X-Gm-Gg: AR+sD11zFZmGkejn1xsS+pyaNcoBvcx7md8fPmxTBv/W25Hb9rfKJRuczZaZG6Dy9jc NVn/ZJpsOPdsjORxePxvvgKByZkbB/MP/Dp/Zus6XF/f1B2yHNvLKmBUAufAfzHuoWLxIl87GyD KILHTnz33+9QGmq3F8wL9fMOu4LLIX1O131Q5bTi0eFctqzxzfck/ni821FWRsPr5mH6BFs1QI1 HWWl6gehv1cwyJ3B5CH14Lh/aq7hMcYecnVkgrxx5yKTWqo0/sKOckB5rsk4o7ufagnA6fPBygw rh1WBUOQHuzRTmfPCnn7P6N4TXVSlwWgT9TlF1N/dTFksbtIyRa05Nkrv4re735/VqaCrgGtuZr p7y4CXXDS09cgwKsb0lOZ2tULEB6hkesPFQWwy9RbSyMgKNr219aIhfwv85WlZyM4hVUQbavj6J AO07dzWh/GmDS+wOQM1/L5QXuOBofMjwJCZStwGtwFEvo6Sf+gxB4SMcle4XlKGNQI9zURMfOBs HtWaw== X-Received: by 2002:a05:6a20:258f:b0:3c3:6b6e:8ba0 with SMTP id adf61e73a8af0-3cd011d7d63mr16413159637.11.1787197562217; Wed, 19 Aug 2026 20:46:02 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Zephyr Li , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 26/93] target/riscv: do not count ECALL in minstret Date: Thu, 20 Aug 2026 13:43:23 +1000 Message-ID: <20260820034430.1186695-27-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197628247158500 Content-Type: text/plain; charset="utf-8" From: Zephyr Li With icount enabled, helper_raise_exception() leaves ECALL in icount_get_raw() because it exits without restoring the current TB state. This makes minstret count an instruction that does not retire. Adjust only the fixed minstret baseline so that mcycle accounting remains unchanged. Add an RV64 softmmu regression test for the issue. Fixes: 4fe8ae09062d ("target/riscv: Combine mhpmcounter and mhpmcounterh") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4087 Signed-off-by: Zephyr Li Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260730032122.2564190-1-fritchleybohrer@gmail.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/pmu.h | 1 + target/riscv/tcg/op_helper.c | 6 +++ target/riscv/tcg/pmu.c | 44 +++++++++++++----- tests/tcg/riscv64/Makefile.softmmu-target | 4 ++ tests/tcg/riscv64/test-minstret-ecall.S | 55 +++++++++++++++++++++++ 5 files changed, 98 insertions(+), 12 deletions(-) create mode 100644 tests/tcg/riscv64/test-minstret-ecall.S diff --git a/target/riscv/tcg/pmu.h b/target/riscv/tcg/pmu.h index b4f1e469a2..2429c01b77 100644 --- a/target/riscv/tcg/pmu.h +++ b/target/riscv/tcg/pmu.h @@ -36,6 +36,7 @@ int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t va= lue, uint32_t ctr_idx); void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, privilege_mode_t newp= riv, bool new_virt); +void riscv_pmu_decr_instret(CPURISCVState *env); RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val, bool upper_half, uint32_t ctr_idx); =20 diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index ba3c7da375..acdccd1a97 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -21,6 +21,9 @@ #include "qemu/osdep.h" #include "cpu.h" #include "target/riscv/tcg/csr.h" +#ifndef CONFIG_USER_ONLY +#include "pmu.h" +#endif #include "internals.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" @@ -47,6 +50,9 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env, =20 void helper_raise_exception(CPURISCVState *env, uint32_t exception) { +#ifndef CONFIG_USER_ONLY + riscv_pmu_decr_instret(env); +#endif riscv_raise_exception(env, exception, 0); } =20 diff --git a/target/riscv/tcg/pmu.c b/target/riscv/tcg/pmu.c index 38ad2737e1..1a4658319b 100644 --- a/target/riscv/tcg/pmu.c +++ b/target/riscv/tcg/pmu.c @@ -49,6 +49,21 @@ static bool riscv_pmu_counter_enabled(RISCVCPU *cpu, uin= t32_t ctr_idx) } } =20 +static bool riscv_pmu_counter_filtered(CPURISCVState *env, uint64_t cfg) +{ + bool virt_on =3D env->virt_enabled; + + return (env->priv =3D=3D PRV_M && (cfg & MHPMEVENT_BIT_MINH)) || + (env->priv =3D=3D PRV_S && virt_on && + (cfg & MHPMEVENT_BIT_VSINH)) || + (env->priv =3D=3D PRV_U && virt_on && + (cfg & MHPMEVENT_BIT_VUINH)) || + (env->priv =3D=3D PRV_S && !virt_on && + (cfg & MHPMEVENT_BIT_SINH)) || + (env->priv =3D=3D PRV_U && !virt_on && + (cfg & MHPMEVENT_BIT_UINH)); +} + /* * Information needed to update counters: * new_priv, new_virt: To correctly save starting snapshot for the newly @@ -147,12 +162,27 @@ void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, riscv_pmu_icount_update_priv(env, newpriv, new_virt); } =20 +void riscv_pmu_decr_instret(CPURISCVState *env) +{ + if (!icount_enabled() || + (env->mcountinhibit & COUNTEREN_IR) || + riscv_pmu_counter_filtered(env, env->minstretcfg)) { + return; + } + + /* + * minstret is derived from icount, which includes the current + * instruction. Move the baseline forward to exclude an instruction + * that raises an exception and therefore does not retire. + */ + env->pmu_ctrs[2].mhpmcounter_prev++; +} + int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx) { uint32_t ctr_idx; CPURISCVState *env =3D &cpu->env; uint64_t max_val =3D UINT64_MAX; - bool virt_on =3D env->virt_enabled; PMUCTRState *counter; gpointer value; =20 @@ -170,17 +200,7 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_e= vent_idx event_idx) return -1; } =20 - /* Privilege mode filtering */ - if ((env->priv =3D=3D PRV_M && - (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_MINH)) || - (env->priv =3D=3D PRV_S && virt_on && - (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_VSINH)) || - (env->priv =3D=3D PRV_U && virt_on && - (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_VUINH)) || - (env->priv =3D=3D PRV_S && !virt_on && - (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_SINH)) || - (env->priv =3D=3D PRV_U && !virt_on && - (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_UINH))) { + if (riscv_pmu_counter_filtered(env, env->mhpmevent_val[ctr_idx])) { return 0; } =20 diff --git a/tests/tcg/riscv64/Makefile.softmmu-target b/tests/tcg/riscv64/= Makefile.softmmu-target index 908fd008e4..fac0474746 100644 --- a/tests/tcg/riscv64/Makefile.softmmu-target +++ b/tests/tcg/riscv64/Makefile.softmmu-target @@ -24,6 +24,10 @@ EXTRA_RUNS +=3D run-test-mepc-masking run-test-mepc-masking: test-mepc-masking $(call run-test, $<, $(QEMU) $(QEMU_OPTS)$<) =20 +EXTRA_RUNS +=3D run-test-minstret-ecall +run-test-minstret-ecall: test-minstret-ecall + $(call run-test, $<, $(QEMU) -icount shift=3D1 $(QEMU_OPTS)$<) + EXTRA_RUNS +=3D run-plugin-doubletrap run-plugin-doubletrap: doubletrap $(call run-test, $<, \ diff --git a/tests/tcg/riscv64/test-minstret-ecall.S b/tests/tcg/riscv64/te= st-minstret-ecall.S new file mode 100644 index 0000000000..ab268f7f22 --- /dev/null +++ b/tests/tcg/riscv64/test-minstret-ecall.S @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + + .option norvc + + .text + .global _start +_start: + lla t0, trap + csrw mtvec, t0 + + /* + * The first CSR read retires after obtaining s0. The ecall does not + * retire, so the trap handler must observe a difference of one. + */ + csrr s0, minstret + ecall + sub t0, s1, s0 + li t1, 1 + bne t0, t1, fail + + li a0, 0 + j _exit + +trap: + csrr s1, minstret + csrr t0, mcause + li t1, 11 /* Environment call from M-mode */ + bne t0, t1, fail + + csrr t0, mepc + addi t0, t0, 4 + csrw mepc, t0 + mret + +fail: + li a0, 1 + +_exit: + lla a1, semiargs + li t0, 0x20026 /* ADP_Stopped_ApplicationExit */ + sd t0, 0(a1) + sd a0, 8(a1) + li a0, 0x20 /* TARGET_SYS_EXIT_EXTENDED */ + + /* Semihosting call sequence */ + .balign 16 + slli zero, zero, 0x1f + ebreak + srai zero, zero, 0x7 + j . + + .data + .balign 16 +semiargs: + .space 16 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197606; cv=none; d=zohomail.com; s=zohoarc; b=nRV+bhEqD4ieoxY8dixN/GxxGxIlpkZ1DPn7fu3hkj0G6EHNOI37MWEsR7vYycQ2P6wrXAn3VXJOhIEj7GXWocNMHcZGTwZHAoJsGxEPs6YBNHcDR9l2muCH7SYd+cIKuIFGO57ykT6KD+T7jDLb+4MF66F8LcpJV4hPUGTs91c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197606; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qfECYY3QZRTyl/SOMv9+jWU3ydUdOrBVrmpFSQeHgA8=; b=jp8QebIacvRhHrNM9hUbEuJxxoyXT+sNVooLTotWi4LwJVfLmXS739sWF7PnRDRx0A08ov5bmUY7cXb4k1d600JD35WdqkrULTTAQHdgeV22idPhgOq6FjjT84bqEpHLjfX0djAyOUrJPsOhiP7k3Dyffy0eJNgx3iv3rMUSs9w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197606595530.7772676368405; Wed, 19 Aug 2026 20:46:46 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjF-0000oH-Dj; Wed, 19 Aug 2026 23:46:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjE-0000nY-2X for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:08 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjC-00041d-9M for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:07 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-38e08baf860so1864210a91.2 for ; Wed, 19 Aug 2026 20:46:05 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197565; x=1787802365; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=qfECYY3QZRTyl/SOMv9+jWU3ydUdOrBVrmpFSQeHgA8=; b=cusk8MfEX6WkteZeamb579jqRyUTYXrl3/d/ZMAM2ZHzFhuV1DLPO9ib7LUUoW0cGz slo2/AFZEF00Bh6kzKwmYpVYZVy71ZY7LJixp70H3pjSEwOKUAwxpy00nG2X43GEnj1K Mbf8Befasn+ThZfPjM6aGigNJ+uub+Tl10y47E3JhlvOJv1fkMmhgIMVScfySRh5QY77 mg+EbsafJJO4zKsL8b4oTsvbf8ytguZx79fAI1ZjYWT9aXlOwKxnmR9eTDBq15E9H/1d 4wmOfaLsRrJ5EKJAMMmxdtgcHv+v5LwUq187q+8zSEFCHo/htOXQsIyH2uhGBh13QQRn 1+WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197565; x=1787802365; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=qfECYY3QZRTyl/SOMv9+jWU3ydUdOrBVrmpFSQeHgA8=; b=QHZSAovni2ZvFicvg4NdCCuXcT9nz07OpX9XGe+wTceb0RI7kym9n9GAtQCQMr8FSl qYVm5HtAhQl7NeAxyFMB5CfoBhq4Wue6Di5/bTQfMYygF07oOXSul1GW+ufGzDi3V/ty RbRpnAobMCvkihhmr9Z2wrir1ZMPyaoyyPTxNOoOp+nQPzbB4svgVhSyNDzU44klSkjX t6qqizGd/2/CopIbrzZak2NfskPoTXh7z1U458Az2OOzNKJLumOwsPKddfsVvGm8UZ5O snO4LhRZgq8sWHApnWduBKibDg+C9UTA9JvYbWNxqPBUPqOzD59aIAepX3Wb3PvZnNzL uO8g== X-Gm-Message-State: AFuF++lIzSoyL1NOalXAgmtRtMoYOjQ0x3kPOghp2qy0ai3kv6Skir7V 3fwC2DEb1sh2mNWhBkwmtPkNHil2DB0LUmKssC6aY+L6PUQebuZgpkelTWqctA== X-Gm-Gg: AR+sD13d++i0nxIl59FbAbzB1x60XOfQpUgES7GN7sweXc3YNCfEgR7djtCBMLqWYgl zjIp6QjqS1q/SzRfdt1o3YlofMLKNH/hRQHtHKjBAZCCtxYZHkkAP07iK2MFOCirio1aRkebso+ 5nffxiUtk+dLBdSonmhPftZeY6DPi3kA0duVFVs3qdIkaQWjx3mL8h9Tq3AeH4jfEQ/SkXk88Bt Te1llIRZGx18nfiXlxhu7cXG6YTUDVKvpC4NotKubFPQkdxWalE73nESKMcaJRdWY6Qt1DutfnA n50jIDTY+iyWiqpBLEduf706BdwSohkjoflQK4eowmDKr4rOtg29Uda4mb7nWCxddV+Wh5/mBSV eJFx1atcg9A/hsekAEE3Nl/Fd1r0aDRefd7PnAyqlsGv3NxvClJZss0GpAiq6R4PUbwrGIPUvAM Sijmlmc4HUt/liLFQrnVU2vb7zs5ncAZoYOJOYT++/9jfiMfO+xx7Z5SkFJu34kmRIvrnocQNaQ ir7Qw== X-Received: by 2002:a17:90b:4d0b:b0:38e:2860:253f with SMTP id 98e67ed59e1d1-39581211d6emr16204730a91.12.1787197564810; Wed, 19 Aug 2026 20:46:04 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Ivan Efremov , Alistair Francis Subject: [PULL 27/93] target/riscv: Fix seed CSR sign extension Date: Thu, 20 Aug 2026 13:43:24 +1000 Message-ID: <20260820034430.1186695-28-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197608694158500 Content-Type: text/plain; charset="utf-8" From: Ivan Efremov The SEED_OPST_* macros expanded to int expressions. When bit 31 was present, converting a CSR seed value to target_ulong on RV64 sign extended the value and incorrectly set the upper 32 bits. Make the SEED_OPST_* constants unsigned so that CSR values are zero extended on RV64. Fixes: 77442380ecbe ("target/riscv: rvk: add CSR support for Zkr") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4121 Signed-off-by: Ivan Efremov Reviewed-by: Alistair Francis Message-ID: <20260802113130.7818-2-nendensu@ispras.ru> Signed-off-by: Alistair Francis --- target/riscv/cpu_bits.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 3f146a43fe..c01050ce2b 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -1086,11 +1086,11 @@ typedef enum CTRType { (HVICTL_VTI | HVICTL_IID | HVICTL_IPRIOM | HVICTL_IPRIO) =20 /* seed CSR bits */ -#define SEED_OPST (0b11 << 30) -#define SEED_OPST_BIST (0b00 << 30) -#define SEED_OPST_WAIT (0b01 << 30) -#define SEED_OPST_ES16 (0b10 << 30) -#define SEED_OPST_DEAD (0b11 << 30) +#define SEED_OPST (0b11U << 30) +#define SEED_OPST_BIST (0b00U << 30) +#define SEED_OPST_WAIT (0b01U << 30) +#define SEED_OPST_ES16 (0b10U << 30) +#define SEED_OPST_DEAD (0b11U << 30) /* PMU related bits */ #define MIE_LCOFIE (1 << IRQ_PMU_OVF) =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197797; cv=none; d=zohomail.com; s=zohoarc; b=YR9XB9pkfs9GjL59POmvPwHP+XCWNORVod/n3YdLIyGCHH0xj95PlAemcirsrg0gZBg/oJo8opns95aD/tLkcoAS/ZfAQ05NVgsbvDgYaOWnkzllkUjv1E7i15laUg3IU015c0DTtdiD7+vGT3jkle4yVRHZI2lafgvox71gFsE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197797; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xN0xQN5mdER04LVt6luBkNx814GvD/i+FtKZY4I0s/E=; b=PshZTw6FRNyNpsEBhqYB+DCYV3PH8VFEsW+29nWYYXTxtwtRkshx4lHBTV9+0kbC5exha1y2lLSalaLgLSh3Va0swvc+NlZ5S+hf3ORVj7JRgljhAT3xEtBpwXimd90oh6m4aru+KhTJMmgh5z9Sl/+ykL6g0MYp7bW4VCN7gcM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197797386844.1149344086999; Wed, 19 Aug 2026 20:49:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjI-0000p8-2O; Wed, 19 Aug 2026 23:46:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjG-0000op-G0 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:10 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjF-00041z-0n for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:10 -0400 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-2cc7e86e7aeso19233805ad.2 for ; Wed, 19 Aug 2026 20:46:08 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197567; x=1787802367; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=xN0xQN5mdER04LVt6luBkNx814GvD/i+FtKZY4I0s/E=; b=ob7XLjWCqpscpoEtzncczxeNzDerfck5KpyfaqM39bb2i6Md5e6HlDNV1p2dJLvKEG sDCniTWxZ7CXaVzFq1Hzgkflp9GCBQioVO0zE3GjgK4G6HndZjdIT22hO4haxAqX5Ek1 1DybwPgQ+sHI6mgJfDQC5dOn8+cpWGZcTvWSGjNciv989WQtVflAxkJb7ki6MhQwVjtt J/8vNQ1MLTNGAbUYNJEwj6bPS+i/4ijmo6eFlRjbJIBTpjdJop3Q4ZKnpXxFAKqVkvSP vDlbpdTR17RIgLDJZQFwG7z2TcRGqy3iid/s1uqC557ZaFG9u9wCA+53qGexZLk6esup Exuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197567; x=1787802367; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=xN0xQN5mdER04LVt6luBkNx814GvD/i+FtKZY4I0s/E=; b=WTUXMNFdxgVk+3OxhwJ9so7r33WBEWheXBIrNQNltc7ZmIOqri0DzluvWzpfb+uvDD CDuhNXoStHHFoA3KDG87waiORrbAOm/r4kmO6L/Be6TWViYc9SCfE2q3R887fPugAWdw rQ+Jw2OHIxTzgK+znF0c7qzHYw2kMueJI8jQpkoLh0kHQAJGSSTp8qb1LxFVoSY2WmMz NtYVGlp0T7x9f2dLLWrpB7jlQiXgIVCpAXmmfsC8h2+HWGpG+ZUhF/GxasoT9WRCgKZN j9WkS9OXin8HuJ2RqrAlKkxQjA6Bag+mqaZozNi2eLBf8S3Dc2OgTrEK5RCNPWxgWAjt WF/w== X-Gm-Message-State: AFuF++kxVUwLQ9c6lz9nfdYWbR571VzKfdFpLeb9LpA+iJX7eJePMk1D J8NJsTsiBsYSETeqxJQCh3OMpvs5Gawz8YPVQt5/zJlCdm+uvoWCyOpuXW+PTw== X-Gm-Gg: AR+sD13vUhx6nbADrQROnfq9nytTz5NE76AHpQCpoWBbKfoI6l31TOSQTuiiXrQVJhQ q9DIwcC7GGSqfRx9FD7yD3QANdkHdlhbn23jXn9MU9jMLpgsUeFpQW/EeWwQQJBMbvwxl6qL/oY WgfTZJIsoYtmZW89tevTXHEZTiv4MZ78kJhx4EGTawwgW5EheKu/z0kprTEPK6v9T4bq3HphO4c roMTjBDs12eGD038R5tAoCroEjjS9KCh8P7A2tyxJOa/RlpQ5a6STB1axWkfCZhJQyZxe/dZZQ7 nCt96NFuLX7jho/uEtl72RZVyGVNLXwMaEJoyo4093LqdIjfr6C5OpmQCnbT3mxoBIi8qvoZL3E ucidTzlRGwQNBGsZA29IrR9VOsQdRmJljsDr5hdIAvPTUd2ar/LIr/PT/Tc8GrGDsuVXVv1obZy bzanXM2RqX4mae2y/LGyEjc2Ps7iuPsAmXmwSWAlwZ+hmOgjmtsFU9xHhto6BgDA210PniFMlMV cLgXA== X-Received: by 2002:a17:90b:4e8f:b0:383:f52b:d616 with SMTP id 98e67ed59e1d1-395810844a8mr16935775a91.10.1787197567526; Wed, 19 Aug 2026 20:46:07 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Ivan Efremov , Alistair Francis Subject: [PULL 28/93] tests/qtest: Add seed CSR zero extension test Date: Thu, 20 Aug 2026 13:43:25 +1000 Message-ID: <20260820034430.1186695-29-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=alistair23@gmail.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197799035158500 Content-Type: text/plain; charset="utf-8" From: Ivan Efremov Add a qtest that reads the seed CSR on RV64 machine with Zkr support and verifies that the upper 32 bits are clear. Signed-off-by: Ivan Efremov Reviewed-by: Alistair Francis Message-ID: <20260802113130.7818-3-nendensu@ispras.ru> Signed-off-by: Alistair Francis --- tests/qtest/riscv-csr-test.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/tests/qtest/riscv-csr-test.c b/tests/qtest/riscv-csr-test.c index bb1b0ffed3..7479a5c5bc 100644 --- a/tests/qtest/riscv-csr-test.c +++ b/tests/qtest/riscv-csr-test.c @@ -20,6 +20,12 @@ #define CSR_MVENDORID 0xf11 #define CSR_MISELECT 0x350 =20 +#define CSR_SEED 0x015 + +#define SEED_OPST_MASK (UINT64_C(0x3) << 30) +#define SEED_OPST_ES16 (UINT64_C(0x2) << 30) +#define SEED_OPST_DEAD (UINT64_C(0x3) << 30) + static void run_test_csr(void) { uint64_t res; @@ -46,12 +52,32 @@ static void run_test_csr(void) qtest_quit(qts); } =20 +static void run_test_seed_csr(void) +{ + uint64_t val =3D 0; + uint64_t opst; + QTestState *qts; + + qts =3D qtest_init("-machine virt -cpu tt-ascalon"); + + qtest_csr_call(qts, "get_csr", 0, CSR_SEED, &val); + + opst =3D val & SEED_OPST_MASK; + g_assert_true(opst =3D=3D SEED_OPST_ES16 || + opst =3D=3D SEED_OPST_DEAD); + + g_assert_cmphex(val >> 32, =3D=3D, 0); + + qtest_quit(qts); +} + int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); =20 if (qtest_has_machine("virt")) { qtest_add_func("/cpu/csr", run_test_csr); + qtest_add_func("/cpu/csr/seed", run_test_seed_csr); } =20 return g_test_run(); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198169; cv=none; d=zohomail.com; s=zohoarc; b=Gs/466De8n1dIbBMg92RRYhhb0ziTj7/UtO2D9odhnWTDYxwyzbXcYtFYa9Mwwb5ytGmBvvSwR4TJp/mUELkjinlUnHRcxmHSOG49slr+k2QAMpOhyQXiVop5lzYgrXoAXkg9ORjn+RGIYkCP0ckcvql8Pi3KYz4KF2FNZS4yOQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198169; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=K7jyUxpCMyWmPG7deRl8ThJ1u0ATYoDtwpi499af0mc=; b=YYkrmvLbsBp5Fw+5Rm6HY+G1bjP3gnBGDz/neEZiiXf4wqPgzVQHhidon2WgPOr+CgAPQpFShLuNV05aTGPWSYd0yu7jc3tnZC42NOL/H4u4A1FiijALTB+NnJctMkCdf5htJpb7LfKfoP5sRRmrtR3uqSxRzuHEzqo6UQOWMYY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198169114931.6635429784666; Wed, 19 Aug 2026 20:56:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjN-0000vB-24; Wed, 19 Aug 2026 23:46:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjJ-0000t1-SX for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:13 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjI-00042L-DS for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:13 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-cbe6295f05bso319034a12.1 for ; Wed, 19 Aug 2026 20:46:12 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197571; x=1787802371; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=K7jyUxpCMyWmPG7deRl8ThJ1u0ATYoDtwpi499af0mc=; b=UCphYrCXkdYWcRoh+ctkOp2TvNJQkzoFA3+xpt0te5RPwZ60cMOBkDlFMTwDCzQHUD B4VK2YYwNihV0C+506YEq3gl7NhQfueytD/fu7mpUFP/zSC4gvqWNFk2YeI9vkFGNf5L Qm+RJ9SyeEnELz9C0zL4DC5J7f2DqKO11VUYSTuWZVuy7/vcV90NBxY6DoXh0N3EtXQ6 jR87cyXvJfu/3EfLFdjAL3h0rivBI+hs8R8ynBVh6lFvWdZwohs0BU0fZFMjmGZmsOY1 oCeLIrEsdqXPNOwAwh5XStIkGkejb+xoExo7YYIRGclIknieNYakYuBOUWJ/Xg3Lk2hy VLAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197571; x=1787802371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=K7jyUxpCMyWmPG7deRl8ThJ1u0ATYoDtwpi499af0mc=; b=izas54o0JFLB2Y65vHAN5SDH2sNVw9p4p/z1q2UhZr/Yo5WeHzjFIscM6FAJZFtvPu MHelR8d0LVC6Inyy5HP1/4xYOuoz85YE34WyauiIUq9BrJ9CPRSYtY0xXfF4l+OEkzW3 fqq0KcKhwfDLWg3XFnqggEq9zAzQGAHEuoELG2gXPr1j5FczIbQcCrcn/Ua/z7M7i75N LWzf/wugXG/wxg3tzDj/Iing5fHrfGty+UdWhXUEh5Tn1x2yLaapZ1xirMSHifoTYFFv dmqn4zgNslVO1xIHpfTVTOlaGO3c6Qo4nlWWqmAH0EvVYY5L8XTSuO1i+cYOGC4tfVZy cP8g== X-Gm-Message-State: AFuF++lZ7DLgF7bw8hNNeu9NyHuIdbHPk7aSENb+hA4DmTV3d0MlwpYn +/1citwAQT7uDL1BrZRmXy2mln4WsR/wOkM9SShZzJVbhx1ZgPHN8+mWkOhzcw== X-Gm-Gg: AR+sD12/xMzaM1rCPEPlgsDh8SibkZBZDnDPmq/obsLSkY+zjh2gf8hblX/XjOFr3VF iialjFoAanFG0y6NrcYkxUq8EET+jbtmlDz0MgKY2X8ZQBZCOwWKW1GrdyuXhD1aoZl2p3+Qmb5 srRftYZY1Aeaqw0P9afw0QyTOliIaa0PGJnGGicbXicLhr/49bDdjQhuBbAlmjlD4Rz8P24lDQA WWCLrLuuZBsw1AqyI/4ciXx8PyJa85tRJlg6oopv8fAEh/anZI9flCdmdy8IpKQ1T3wZLgZzt5k dGW29nLXrazEM3J5FUJrAI18si3fH6HuPqjIo+Eu0lBwdEZbZAt5A3UwHLc57YDRXzv2IILNGru drtFOp0nWtBQL1TChYwmZSHKTld557nptTQfYNkDI48rr+Ei1w4k08YLPrO6rIKNuo/GUSJlmB8 NkfbNAxhB9vQ+13c1YcPtBHggPOQZnSiqomxB/yhZe1KahuvncJSVKa/THt3bztdwCok8i45tFO rRGJFo= X-Received: by 2002:a17:90a:d883:b0:38e:7e9b:5fbc with SMTP id 98e67ed59e1d1-395a04e402emr4553795a91.7.1787197570989; Wed, 19 Aug 2026 20:46:10 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: TANG Tiancheng , LIU Zhiwei , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 29/93] disas/riscv: Fix th.srri decoding Date: Thu, 20 Aug 2026 13:43:26 +1000 Message-ID: <20260820034430.1186695-30-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198169980158500 Content-Type: text/plain; charset="utf-8" From: TANG Tiancheng target/riscv/xthead.decode defines th.srri as funct6=3D000100 in bits 31:26, with the 6-bit immediate in bits 25:20. decode_xtheadbb() switches on bits 31:25, i.e. funct6 plus imm[5]. Therefore valid th.srri encodings are 0001000 and 0001001. The current 0000100 and 0000101 cases use the wrong funct6 value and decode valid th.srri instructions as illegal. Fix the cases to match funct6=3D000100 with both imm[5] values. Fixes: 318df7238b9f ("disas/riscv: Add support for XThead* instructions") Signed-off-by: TANG Tiancheng Reviewed-by: LIU Zhiwei Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260703-b4-disas-xthead-fix-riscv-next-v4-1-84c566330bc7@linu= x.alibaba.com> Signed-off-by: Alistair Francis --- disas/riscv-xthead.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/disas/riscv-xthead.c b/disas/riscv-xthead.c index fcca326d1c..2f2ddb8dd9 100644 --- a/disas/riscv-xthead.c +++ b/disas/riscv-xthead.c @@ -315,8 +315,10 @@ void decode_xtheadbb(rv_decode *dec, rv_isa isa) op =3D rv_op_th_revw; } break; - case 0b0000100: - case 0b0000101: op =3D rv_op_th_srri; break; + case 0b0001000: + case 0b0001001: + op =3D rv_op_th_srri; + break; } break; case 2: op =3D rv_op_th_ext; break; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197660; cv=none; d=zohomail.com; s=zohoarc; b=Av4sp4R2cSvWRUKYLyVuDKdnB22hVXIsJVwYgTEiYQRvnQdo87CjgEg5S0QweS42O5Mfc2fxij3UxH4Oj+K8ajoMQAp5jxRiGuCkikyZ3M8F72qBQDVK/ocU8qeXsUsTDbADCBjaThnzFv8r70GYvgn3IWzPAvGKHb75Q+yDkOU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197660; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pvkNgzPBnkClRwc9O5eyz1kkZLDtZhEMJDHTwwC8vGY=; b=KmlDM9M106ilvhMQTjrFLLikcH6NLdH6dXY7GJgwehvw3kH5D3HL8tAyqJcCEOla9cXnUAIbO8XOea+EXFvIW2Yhyg1w8jC5L2g9Dslu7rddvBniLGpKi3WPG48TObj5mjSahqOKmMDnH5X7X8cCu9HbV6xjPg0DKIWFFuI6mlM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197660400949.8614598881769; Wed, 19 Aug 2026 20:47:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjQ-0000yu-26; Wed, 19 Aug 2026 23:46:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjN-0000wh-Rq for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:17 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjL-00042k-U0 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:17 -0400 Received: by mail-pj1-x1034.google.com with SMTP id 98e67ed59e1d1-38125cebfdaso2755108a91.1 for ; Wed, 19 Aug 2026 20:46:15 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197574; x=1787802374; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=pvkNgzPBnkClRwc9O5eyz1kkZLDtZhEMJDHTwwC8vGY=; b=o500PZZQsMbtAX+JO8MdDd26EvRQ0d3DkmmvAY/H2tBZ43fqxDBE6gER4zQqcWbRCE JI36s+Q31J1SvAodqlTljoQXNMjgAjQIzU0gZFnxu/VExJDEdzbQwNEWox54Y3vaeUV4 hBYufy89tvo/al6U+3MwqbgSZC18yvtR3OaDTQUMK83+Kou4qgbs/P/gT0SSs1AgHZN0 BGjXhA/XiitrkS2DP+XlyU/bKQPgb6hKPN0cHzHwkM9SrQfhPNgaXiHebrppcP0M9xEG h5jdx5SQiI1an3VIlmSl0jP0ODmvPhhLKXuUr9zszvjNGXdd7oG7xWlmTynq5MmJnUa1 FqDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197574; x=1787802374; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=pvkNgzPBnkClRwc9O5eyz1kkZLDtZhEMJDHTwwC8vGY=; b=TzGG631ue5kxe5DG+1wCFTGS301L2FwF8ZfKQZ97JOzauvw/gqMknYWyz1x6/i6kC5 RykE+HCuIeUyNa6MkgNDTF3OOD1qhLibbXm56+2MzdiSba9Fp+KfRXrZ8eFv7i54o1Ak Ad/ZdX3sw+lkkWCIplge2zORNTsfvQoMTNqTvyNu0Ilfm6NcSpJLY+YZ95mN4iDmIVJ2 Ay4/1kaeFESaS4Yqb7WHPI3X1mblUHrvvI2MgZIFTmPP1JYuOIBxAUH9ecTxh+ojplLR BVcCSW0Q8YqGJdysT86EtbxFT9wBz3/9YtVpw8dPjNBq3mRr3MFtOyg0a0I2noDIn5xX atDA== X-Gm-Message-State: AFuF++nL1k9pVi4G1DbTR4YH5TqaJ7q1lseyrRz304J6fLh4PRsygpvp /scfdq8I9ByjWJFSjQ7+ohb832It6YpXArB4JugMONXGedDg6Jad1QvgbOFzhg== X-Gm-Gg: AR+sD10VWS11YlVMea52HcmV2oo/O/eAmykhK4ShHROcA6EF5qHsE0cnLV4HGKru23l KHkPXNXc3ntaQu3CFS+CaJaakUGnMk7ZthYI43KE639cGjdtM83S4yX6+ww5dEc6D78eHfrmYpn ai7+8wfAaHKmwtv8Wp8UZHg+BAYkoSWvV0TqM9UAkCv3ela6LXVdC8NjpvjbC1S10gdCTa5qIlv aNZHWp+PXpLEgcREx6ct5fA89ZY9KWIv9lTmYh/PnpqE3XsVlPFFRrbhzOCxKPrVs8dyj8B+Hyw OkypZ1eWFKc9Dudxk1R0+SYzjhuCAX8eUBXvbUmO4dXBtXuAk/rY7zILNBY+tHc4S02btTl6iWK Wq6L5Z4PN5it2GEqaw3WnSlVGbcCsuhM/on3x/CZBLi7F3NPW8pyOHudWIehoC6tKLnx/FwjWQT RfGcmiah8QFS7RDmuHu8w31bD4WpJHG1SyQLZ7+7R39d1MQEOUFhe+01+wJxbpFVi4EpxniscZG sXXXA== X-Received: by 2002:a17:90a:fc45:b0:38a:c3f:3b87 with SMTP id 98e67ed59e1d1-39580f6d136mr18847912a91.12.1787197574502; Wed, 19 Aug 2026 20:46:14 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: TANG Tiancheng , =?UTF-8?q?Alex=20Benn=C3=A9e?= , LIU Zhiwei , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 30/93] disas/riscv: Fix 6-bit immediate extraction Date: Thu, 20 Aug 2026 13:43:27 +1000 Message-ID: <20260820034430.1186695-31-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197662334158501 From: TANG Tiancheng rv_codec_r2_imm6 is used for XThead instructions whose 6-bit immediate field is encoded in bits 25:20. The old expression left-shifted by 38 and then right-shifted by 60, so it kept only bits 25:22. Use extract32() to decode bits 25:20 directly. This fixes the immediate printed for th.srri and th.tst. Fixes: 318df7238b9f ("disas/riscv: Add support for XThead* instructions") Suggested-by: Alex Benn=C3=A9e Signed-off-by: TANG Tiancheng Reviewed-by: LIU Zhiwei Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260703-b4-disas-xthead-fix-riscv-next-v4-2-84c566330bc7@linu= x.alibaba.com> Signed-off-by: Alistair Francis --- disas/riscv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/disas/riscv.c b/disas/riscv.c index 7f1b262773..fdf75a12ef 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -4546,7 +4546,7 @@ static uint32_t operand_zcmp_rlist(rv_inst inst) =20 static uint32_t operand_imm6(rv_inst inst) { - return (inst << 38) >> 60; + return extract32(inst, 20, 6); } =20 static uint32_t operand_imm2(rv_inst inst) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197889; cv=none; d=zohomail.com; s=zohoarc; b=JSo7YZ8L1ZVUgXd/xkdAxQQWXN6OAYuV7/00TndPr5suhAwWo1QVwQ0mKmIUfDqkBmcHhevI1BYOcyUlEwksmPE2ScD/ck0DFlUtuuXk4GpLU4w12fIph78mMxD6c3l+/qOBNxRxs/VIhW+m+0tGBqYEaUEzPnFqk1HRJVdGyMI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197889; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uqnXWGuDLvEfhlq4w5r6kD4ZoGnJTkkdca1i+GCVCbs=; b=Deyd/VZMX5Ynj/orej7WwfURVxfNeF/tcbOC0M0L2bVWpj5Nno8w2Uo6EhpsTOnsPf2dfrEn0Kr1rTlsnxK8xwXMd9gQIWCMOUvcAl2Z9Fx/g132JW5K0VdtwIJEfCQ2YnNcTzu14uSFQExp3qjegKTCa+E9TMpOLm1Ub35csS0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17871978895761006.6011603803765; Wed, 19 Aug 2026 20:51:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjR-00010u-HP; Wed, 19 Aug 2026 23:46:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjQ-0000zZ-7p for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:20 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjO-000432-Qh for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:19 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-cbedf6a6fe8so1138953a12.3 for ; Wed, 19 Aug 2026 20:46:18 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197577; x=1787802377; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=uqnXWGuDLvEfhlq4w5r6kD4ZoGnJTkkdca1i+GCVCbs=; b=N+HBZkDCc/IIypWljbciy2syz01oRFG48AOa9tofRVZ/2WTaOlawgFjhhgkzBXVJeS htKzZ3sY7T3euUxJGuYTboyWLDmbYmY57yUnFvvM54yWdnMHmC8adIb22uU1fTzVWwfO Wb6locE36Yn1H6pXGP1CYQg7G8tVpATu4ouecunhII2mAUt2cqJgh7gFPDWfoNYPFO4D SVARalsIGGz+CkHo61mqSGOWQhg/ys40vXgU5pEmk9H013ch26grLZ22O6/VpclOZRFI mEpXqWCRbG9WgDd0Yzia74f9oaO3aJtFDyBBilBc04DutrmU8mXRZTHdNrABuK69tJ/T HYUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197577; x=1787802377; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=uqnXWGuDLvEfhlq4w5r6kD4ZoGnJTkkdca1i+GCVCbs=; b=oDaMddzwwyDp3lTk/QPZjktL4ouLeG7NJSfOzz7Gn0pHHAMcZ9ixX2AXHAADzjzQ2+ zWQdXs2vwBRmS8AE70aNWmcfV2FmMvydPMYbpMfq5B2xzPvp9QRjDDDeaxL3hZhucoUH vGZhCCMWLngSAO5QuHQiOX2uQ+XzbKzoC6LcUTEMPRrh/lq9EvYPuNEdNBSWWwe949pd iMjpyovc7YOHnVT7PQu+rPQgPHDQHxX3/1lq+VRnss8Pd9NPLMATjJbRZSwc4s3izNBf dhW3FgCioW6NqcryTJKz4BsGem2rGHuUAhhRHRlahkhcNMO1Tklp4EA1+z1hnqg8Lq7+ +q8Q== X-Gm-Message-State: AOJu0YzbCiBbUARltNO8KnOGcylsQYGOu93Hmw3TfclpWZrcF1zMAAnR KgLihgXegGQzz1f3T/HfDQig4PtdDdgEVQpAAtQKsPg/EUetfhZCqUcuJ5fLCg== X-Gm-Gg: AR+sD12U+p4PCt2KuZ+WBJYZF40hnlEKzf4B5XAPxXeepiZLRsuuklZad8xmnKZK/IZ 3EMUyJYuPatI1XgoG0ke/l4d7p7HSocaZ2QYluDHBBGC9Izyw+vu4w6TuLy1sHl/lJ5PrdtnrEC 9aPIhdm47Jl+sJ3L6NcaApXt4Hsa52MR8UHHrJKF40utoaO2OFCw95NYo9GqfD+lSeBq/P+U+o3 HnJuU6D8b8ElJeTAbeCz+uNFIaLCdrmNukkNmkrqgM354g/6Y9Mjzu70LkajlF3Ct3BUMVdhAHz zIsZET1DoTlSaf5gWETKnHZVA5E6Gt3IBp1mt7XlMJNJakYlj7V9ZIKFa4gdr2XUFW8258bb/Tu 85uWbIzmH88o43aEkqK/Dr+tThDzoHB69VgcHkLt0rBJhJQYFNHcbMSSe+k9QqFm/3Tq650UckD 8ps7FgYMY3B4ftySH6KajHT4/6awT8/1nFf8iBzY9iNb/FlF/Db7z4u3wuOvMIy8C4W1AmTfyX9 QLjBnJJkfb7OD0A X-Received: by 2002:a05:6a20:3ca5:b0:3bf:6222:2e7e with SMTP id adf61e73a8af0-3cd014a9a32mr18446831637.4.1787197577358; Wed, 19 Aug 2026 20:46:17 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: TANG Tiancheng , LIU Zhiwei , Alistair Francis Subject: [PULL 31/93] disas/riscv: Use signed type for vector immediates Date: Thu, 20 Aug 2026 13:43:28 +1000 Message-ID: <20260820034430.1186695-32-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=alistair23@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197891025158500 Content-Type: text/plain; charset="utf-8" From: TANG Tiancheng operand_vimm() sign-extends the 5-bit vector immediate field in bits 19:15, but returns uint32_t. This sends negative immediates through an unsigned type before they are assigned to rv_decode.imm. Return int32_t to match the signed value extracted by the helper. Signed-off-by: TANG Tiancheng Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-ID: <20260703-b4-disas-xthead-fix-riscv-next-v4-3-84c566330bc7@linu= x.alibaba.com> Signed-off-by: Alistair Francis --- disas/riscv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/disas/riscv.c b/disas/riscv.c index fdf75a12ef..967739bdbb 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -4487,7 +4487,7 @@ static uint32_t operand_cimmq(rv_inst inst) ((inst << 57) >> 62) << 6; } =20 -static uint32_t operand_vimm(rv_inst inst) +static int32_t operand_vimm(rv_inst inst) { return (int64_t)(inst << 44) >> 59; } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198397; cv=none; d=zohomail.com; s=zohoarc; b=ZZ2l4EDZuRV/CneekqO7/DhXXTDEI3RLvqvZwTaYAY/uTyIX3C4D61Ca9sgUx7dipVDI41722edSjuDfMVR5Mk8hfayKVZd+vgtfBGy8ARikb4MsMWzxyUn1hU7Ohfi2OrAy2ufZAi+RyJDMtFNb6k6p2lGLihj/73G19cUlVYo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198397; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=UxYkvzeEyEowcGzylLSarORZJmNgzBitvz+9ePz3P9w=; b=gLeakoDF7vLrQmzaW9B+hyMtIFtyaXHpiHDAq2pkoMsmFDD/DrvEmo9YuwtpSP+8dbDw5VGmlwkCS5GiFFjXzVNcfZwwtkcAhmBDyOrXtfM9R2xKTab3ercn0L5x7o+ksidUp7BnNTlVytA0HazongW2/zbkn5kENpf8O8v6cj0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198397922515.5635053401822; Wed, 19 Aug 2026 20:59:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjW-00014X-1A; Wed, 19 Aug 2026 23:46:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjU-000120-1k for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:24 -0400 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjR-00043G-SK for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:23 -0400 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-cc11a905ba5so1033954a12.2 for ; Wed, 19 Aug 2026 20:46:21 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197580; x=1787802380; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=UxYkvzeEyEowcGzylLSarORZJmNgzBitvz+9ePz3P9w=; b=OlvaGRQN5BZGBpS+3eN5JvV27BsoniYGsBo/mQMTdlyTm2fAxevJ+y5WUIzpGeUCZM 3KhqVH7c5CgEazD5Npt6UCC5mIaQcG95fnaYJ9RvzDg8UcJmXE/E1/ZRhlcQgj6cAKXm SzBgHzLAElE31FZBwQTnYoruaQym8pg0oX5TIBuUzkKB//dAYBT4cZqpmUdh33jHp6/V gXDhm+zKhEAuVUbMFQTdb5Xpkzb9ENYe+Qkm7PvA6uMPfA3VoatNawQk6ezIGlvGWxlC NFYSYE7U83wTXvMsP+kfQln+fNLUV7OOES9/M1INbr/BhIrVXHLHbWqbsDXK7lFrQR+y iqsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197580; x=1787802380; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=UxYkvzeEyEowcGzylLSarORZJmNgzBitvz+9ePz3P9w=; b=Cupn2LKDTZY3UywDbOdO7GO1hyTRey/eHxizbcLyc/nWsykM7Slrfk8W4/QJpAgaV7 Pqfmfjsgx2LhqxufwrTQu32TlxW8AlwZ+/L7xyXRcC0OxyIZQ40HMUa0mtqiAkhCxnQQ PdktuEWTf8/8V3MR3SxcSa+DYjL8w0armyK29HFwe8l8OfkCfpWhAPphqG18+XM61l3i Gq3laawpCx5xfN8ssj+Dw7AXtRLTjY7rDKk0Ryc2MwAqWm3MK+stk41JFmIdIJ5RLGbP JYXphjcw2WeE3hJywbQVOo27sGyKE2yUgcSnRTlaWRKA0lsM4oGC/+RElBfn3S632MZ9 2bkA== X-Gm-Message-State: AOJu0Yww/PVcC68KnPg5pQDIa0kmI9Jf2rKgVl7tQkkfNg8Wq978XP8G zJkgAQGOpelO+q47uK6OqEpQbzK0AXWdYawy7bcpGha7orRFZ9lSisEwkZeLUw== X-Gm-Gg: AR+sD13mz134P6Z6QppRY3wT7KX9RR/wWNNMgGJkHpDYWqqpVxaZb+Wx+S9+z4Z1Hzb aaf1t9Q1jsH14Fj1GueGqT/5luP8JHDRWpfgcxEQVozC2e5/QB0FgpvGphNTev4QXQBTsBndVqo +NthLyqc2WmmEt8AdAZIswD+/hY4x9pDWpK0WQODtSyEcV6FJT7hqbQL5wTnLu5Vakn81PrcIKP lxe12qK20viaI4VBW7BGs6u3CS447Bwy8tNgOJ/y6+c9Un54kkiGekmR5F4wIE8JMvfPn7rqjCM To/VVABm/u1jCn8MgVCYfK+RBNdZtTrSBN3JWWpb7iP72qdJJzugJUcPw5osL7fktphQjnKH6Iu Xsgs37qqXk0SVgPDzykq01QU8emfkRFnjwRKt1byB48I3HQ0kO5qpHOiTzYzzZEqTCEu+YA1opO 5mx5YpJfKAVmGtaBZdznS+jLhHpDegDNiwCS05A3CVTY26FmuC7DT7vayk2hW+kBidqC1jHpk/x X/iqgL5kf/bKewF X-Received: by 2002:a05:6a21:394c:b0:3cb:c1f8:5722 with SMTP id adf61e73a8af0-3cd011c8420mr19443549637.10.1787197580220; Wed, 19 Aug 2026 20:46:20 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: TANG Tiancheng , LIU Zhiwei , Alistair Francis Subject: [PULL 32/93] disas/riscv: Decode unsigned vector immediates as unsigned Date: Thu, 20 Aug 2026 13:43:29 +1000 Message-ID: <20260820034430.1186695-33-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198398705158500 Content-Type: text/plain; charset="utf-8" From: TANG Tiancheng rv_codec_v_i decodes all .vi operands with operand_vimm(), which sign-extends bits 19:15. That matches spec operands named imm, but not the .vi forms whose operand is uimm; uimm=3D31 is decoded as -1 and printed by the shared 6-bit 'u' formatter as 63. Add rv_codec_v_i_u/operand_vuimm() for the 5-bit uimm forms: vsll.vi, vsrl.vi, vsra.vi, vnsrl.wi, vnsra.wi, vssrl.vi, vssra.vi, vnclipu.wi, vnclip.wi, vslideup.vi, vslidedown.vi, vrgather.vi, vaeskf1.vi, vaeskf2.vi, vsm3c.vi, vsm4k.vi and vwsll.vi. The remaining rv_codec_v_i entries are the signed imm forms. Fixes: 07f4964d1785 ("disas/riscv.c: rvv: Add disas support for vector inst= ructions") Fixes: 9d92f56d4a44 ("disas/riscv: Add support for vector crypto extensions= ") Signed-off-by: TANG Tiancheng Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-ID: <20260703-b4-disas-xthead-fix-riscv-next-v4-4-84c566330bc7@linu= x.alibaba.com> Signed-off-by: Alistair Francis --- disas/riscv.h | 1 + disas/riscv.c | 45 ++++++++++++++++++++++++++++----------------- 2 files changed, 29 insertions(+), 17 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 379e642ec8..91ada8b531 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -149,6 +149,7 @@ typedef enum { rv_codec_v_r, rv_codec_v_ldst, rv_codec_v_i, + rv_codec_v_i_u, rv_codec_vsetvli, rv_codec_vsetivli, rv_codec_vror_vi, diff --git a/disas/riscv.c b/disas/riscv.c index 967739bdbb..82b962dc71 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1803,19 +1803,19 @@ const rv_opcode_data rvi_opcode_data[] =3D { { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vsrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vsra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnsrl.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vnsrl.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnsra.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vnsra.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, @@ -1909,16 +1909,16 @@ const rv_opcode_data rvi_opcode_data[] =3D { { "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, { "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vssrl.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vssrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vssra.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vssra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnclipu.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vnclipu.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnclip.wi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vnclip.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, { "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, @@ -2048,15 +2048,15 @@ const rv_opcode_data rvi_opcode_data[] =3D { { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2, NULL, 0, 0, 0 }, { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 }, { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vslideup.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vslideup.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 = }, { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vslidedown.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 = }, + { "vslidedown.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, = 0 }, { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 = }, { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0= }, { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vrgather.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vrgather.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 = }, { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, @@ -2144,8 +2144,8 @@ const rv_opcode_data rvi_opcode_data[] =3D { { "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, { "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, { "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaeskf1.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, - { "vaeskf2.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, + { "vaeskf1.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, + { "vaeskf2.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, { "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, { "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, @@ -2169,14 +2169,14 @@ const rv_opcode_data rvi_opcode_data[] =3D { { "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, { "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, { "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vsm3c.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, + { "vsm3c.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, { "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vsm4k.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, + { "vsm4k.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, { "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, { "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, { "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, { "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwsll.vi", rv_codec_v_i, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, + { "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, { "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, { "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, { "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, @@ -4492,6 +4492,11 @@ static int32_t operand_vimm(rv_inst inst) return (int64_t)(inst << 44) >> 59; } =20 +static uint32_t operand_vuimm(rv_inst inst) +{ + return extract32(inst, 15, 5); +} + static uint32_t operand_vzimm11(rv_inst inst) { return (inst << 33) >> 53; @@ -4895,6 +4900,12 @@ static void decode_inst_operands(rv_decode *dec, rv_= isa isa) dec->imm =3D operand_vimm(inst); dec->vm =3D operand_vm(inst); break; + case rv_codec_v_i_u: + dec->rd =3D operand_rd(inst); + dec->rs2 =3D operand_rs2(inst); + dec->imm =3D operand_vuimm(inst); + dec->vm =3D operand_vm(inst); + break; case rv_codec_vror_vi: dec->rd =3D operand_rd(inst); dec->rs2 =3D operand_rs2(inst); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198448; cv=none; d=zohomail.com; s=zohoarc; b=AjxUDDaxdQ/EXj5h6Jf0FgzUVFAbNFM+Ykzv8X5F27kHgwpJFNUy2ntjB0/mC+Z4ldW4hSREwNB71Ig301xxCHL1eVQaksPMT9s0mztt+CS5atGmYEsLW7AIhUI0KO38T2qwB+dbK7ItJYj9lZAugZTtu3TbQti+eTxrvE1+tW4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198448; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=RNFgnM0t7+t0Hez1CnQLXLKNEeRTeeGqtk2q17G/SNg=; b=dKcLkhc5Ge172Y3mrmprL+loCnWWylCbg8YRfE/DCzWE4L/eWX9ad5uQ0vp11gd0A8zACjG03Uz6mZjW4J4JHbZY5xsPLvkj82hF90Tyfzigvo/d+Def/lCCAxHgDBG8inMtkhHpc9+2i17HiJP2JC2mMhnVi/42GslVn/wgP/o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198447949438.5486510419669; Wed, 19 Aug 2026 21:00:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjZ-0001Gw-CS; Wed, 19 Aug 2026 23:46:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjX-00015b-8r for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:27 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjU-00043X-Tv for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:27 -0400 Received: by mail-pg1-x52d.google.com with SMTP id 41be03b00d2f7-cbb8b54fcf8so1426426a12.0 for ; Wed, 19 Aug 2026 20:46:24 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197583; x=1787802383; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=RNFgnM0t7+t0Hez1CnQLXLKNEeRTeeGqtk2q17G/SNg=; b=dCuv70Kz6G9XLA6fA1H/kxO/tcOtI2pkfEoOX44J3lYk1RGfcqX8eqtCCNA+/fD5Xd 3LOTjvz0QXisIgDZUGkX/WiMs+jquB1QyGnQdW8JWNIKvOeYyqKX+4JzeF2B+NkV+Rv8 RaCwzTZexSCqtsXJbgJb2F/+NvvR4X41FS6OloMxQ2KQpWRjNCDwLYLvdyVA+lgLGLJB NRCq63X7SFbFU1kfG1cLOlQlRUKxxGRLDb7VjlG/fFviEbQJFPrtP6b+3muBnMS53hCp ddRBFylGno3VNLQD/7WXWN3KUVSmeqQWeiu9NJ+T5TEaJMf8iL0VKpMztD/4TO0KoGt3 jGcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197583; x=1787802383; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=RNFgnM0t7+t0Hez1CnQLXLKNEeRTeeGqtk2q17G/SNg=; b=nA7iJGa+BHo6FKYdvwkLdTCcvsnCTGbMg5FLCwBp147NVPc8DwnjzITKx061vOKe2a X6AnXN3XWNbdSY+lH+P9Lke13BQCDC61BpFuy9LF2uAWvyZM8psGJtzgPS8aLAd5IKmF 9uckpHIOfVsHJjoqQq+26VR2rPY64jixbb7wwCP/K9AQ3sZbeIfQE0Dcp8Nx4fKwEocg 3keU+KAQtqiY6GuXh1ugc8lmXzbbgfINATt56B6uqqNpZWEGftbI+JnOt0Dh+FTLWjc1 M64hBex7xDK3H0ns9PVo3VmMWQBunGiVtqryMV3pp+yhpoKi3g+VMMr03qvmzyVp3Qln 0bXQ== X-Gm-Message-State: AOJu0YwD+b1irrKSzgigU9lNuMVa11X2YktMLz7g14bX4n/DDh4LEeWf fDQdx7M6pryqEE874wLcIT49MBdSjlV8usVVkGameQ2O8nerPNA/QeOCn16dWg== X-Gm-Gg: AR+sD12v1fCjSJNZfXPIcTTwpfjVmskGVtssW739uS7YN6XVYfc4+hb0PxumYeTHRJq UhX/s3ogSVNMZcvxren/BQSF/2RukDr+TVmap9PSr7bQKseRj/U2czSw4YTtRFrqe9NWN6TXr3N 2kX5BR3dCCI+6x2rYdlTGrzmSMLt1lVIf5YD5FVosq+/kjEr21Q2i7nZnqY2tQnsOFT+MmZ5GdF BBQD8qud2FXv+aEoiehrUa3BfWOk3cCrwMlh5W3780AKtW/1jZ3EGStzatGDgTfOrfKS4Oq7qlJ 0A2Fcdh63JNOtodo7sMm3jm/vnzh8T0+0hO/pnJTLTEmy03PCTF3zDlzjpL00aZHxNutbqFTBsn IbYe3SAkCAQDSYiObC4mo1L9hbV68YXWZspe3V0/5AlE9Jg2rLB9kzmoXoCFB6yCOdecpmkWO+O HS6/8ShDE8TkGJu/wUnbzsWthYrFWUfYHTgNoupI3Ixom42kmzAS3SRWyk6OeZRh6ZQbIfzADfw y7K2g== X-Received: by 2002:a05:6a21:9984:b0:3c3:b57b:6291 with SMTP id adf61e73a8af0-3cd0132c618mr15437140637.18.1787197583393; Wed, 19 Aug 2026 20:46:23 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: TANG Tiancheng , Richard Henderson , LIU Zhiwei , Alistair Francis Subject: [PULL 33/93] disas/riscv: Use extract helpers for operand fields Date: Thu, 20 Aug 2026 13:43:30 +1000 Message-ID: <20260820034430.1186695-34-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198449240158500 Content-Type: text/plain; charset="utf-8" From: TANG Tiancheng Replace shift-based operand extraction with extract32() and sextract32(). For signed immediates, use sextract32() on the field that carries the sign bit and combine it with the remaining extract32() fields. The RISC-V disassembler currently follows target/riscv/internals.h: insn_len() and decodes only 16-bit or 32-bit instruction lengths, so the converted fields are all in the low 32 bits of rv_inst. Suggested-by: Richard Henderson Signed-off-by: TANG Tiancheng Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-ID: <20260703-b4-disas-xthead-fix-riscv-next-v4-5-84c566330bc7@linu= x.alibaba.com> Signed-off-by: Alistair Francis --- disas/riscv.c | 214 +++++++++++++++++++++++++------------------------- 1 file changed, 107 insertions(+), 107 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 82b962dc71..2ba0a6a73a 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -4202,82 +4202,82 @@ static void decode_inst_opcode(rv_decode *dec, rv_i= sa isa) =20 static uint32_t operand_rd(rv_inst inst) { - return (inst << 52) >> 59; + return extract32(inst, 7, 5); } =20 static uint32_t operand_rs1(rv_inst inst) { - return (inst << 44) >> 59; + return extract32(inst, 15, 5); } =20 static uint32_t operand_rs2(rv_inst inst) { - return (inst << 39) >> 59; + return extract32(inst, 20, 5); } =20 static uint32_t operand_rs3(rv_inst inst) { - return (inst << 32) >> 59; + return extract32(inst, 27, 5); } =20 static uint32_t operand_aq(rv_inst inst) { - return (inst << 37) >> 63; + return extract32(inst, 26, 1); } =20 static uint32_t operand_rl(rv_inst inst) { - return (inst << 38) >> 63; + return extract32(inst, 25, 1); } =20 static uint32_t operand_pred(rv_inst inst) { - return (inst << 36) >> 60; + return extract32(inst, 24, 4); } =20 static uint32_t operand_succ(rv_inst inst) { - return (inst << 40) >> 60; + return extract32(inst, 20, 4); } =20 static uint32_t operand_rm(rv_inst inst) { - return (inst << 49) >> 61; + return extract32(inst, 12, 3); } =20 static uint32_t operand_shamt5(rv_inst inst) { - return (inst << 39) >> 59; + return extract32(inst, 20, 5); } =20 static uint32_t operand_shamt6(rv_inst inst) { - return (inst << 38) >> 58; + return extract32(inst, 20, 6); } =20 static uint32_t operand_shamt7(rv_inst inst) { - return (inst << 37) >> 57; + return extract32(inst, 20, 7); } =20 static uint32_t operand_crdq(rv_inst inst) { - return (inst << 59) >> 61; + return extract32(inst, 2, 3); } =20 static uint32_t operand_crs1q(rv_inst inst) { - return (inst << 54) >> 61; + return extract32(inst, 7, 3); } =20 static uint32_t operand_crs1rdq(rv_inst inst) { - return (inst << 54) >> 61; + return extract32(inst, 7, 3); } =20 static uint32_t operand_crs2q(rv_inst inst) { - return (inst << 59) >> 61; + return extract32(inst, 2, 3); } =20 static uint32_t calculate_xreg(uint32_t sreg) @@ -4287,80 +4287,80 @@ static uint32_t calculate_xreg(uint32_t sreg) =20 static uint32_t operand_sreg1(rv_inst inst) { - return calculate_xreg((inst << 54) >> 61); + return calculate_xreg(extract32(inst, 7, 3)); } =20 static uint32_t operand_sreg2(rv_inst inst) { - return calculate_xreg((inst << 59) >> 61); + return calculate_xreg(extract32(inst, 2, 3)); } =20 static uint32_t operand_crd(rv_inst inst) { - return (inst << 52) >> 59; + return extract32(inst, 7, 5); } =20 static uint32_t operand_crs1(rv_inst inst) { - return (inst << 52) >> 59; + return extract32(inst, 7, 5); } =20 static uint32_t operand_crs1rd(rv_inst inst) { - return (inst << 52) >> 59; + return extract32(inst, 7, 5); } =20 static uint32_t operand_crs2(rv_inst inst) { - return (inst << 57) >> 59; + return extract32(inst, 2, 5); } =20 static uint32_t operand_cimmsh5(rv_inst inst) { - return (inst << 57) >> 59; + return extract32(inst, 2, 5); } =20 static uint32_t operand_csr12(rv_inst inst) { - return (inst << 32) >> 52; + return extract32(inst, 20, 12); } =20 static int32_t operand_imm12(rv_inst inst) { - return ((int64_t)inst << 32) >> 52; + return sextract32(inst, 20, 12); } =20 static int32_t operand_imm20(rv_inst inst) { - return (((int64_t)inst << 32) >> 44) << 12; + return sextract32(inst, 12, 20) << 12; } =20 static int32_t operand_jimm20(rv_inst inst) { - return (((int64_t)inst << 32) >> 63) << 20 | - ((inst << 33) >> 54) << 1 | - ((inst << 43) >> 63) << 11 | - ((inst << 44) >> 56) << 12; + return sextract32(inst, 31, 1) << 20 | + extract32(inst, 21, 10) << 1 | + extract32(inst, 20, 1) << 11 | + extract32(inst, 12, 8) << 12; } =20 static int32_t operand_simm12(rv_inst inst) { - return (((int64_t)inst << 32) >> 57) << 5 | - (inst << 52) >> 59; + return sextract32(inst, 25, 7) << 5 | + extract32(inst, 7, 5); } =20 static int32_t operand_sbimm12(rv_inst inst) { - return (((int64_t)inst << 32) >> 63) << 12 | - ((inst << 33) >> 58) << 5 | - ((inst << 52) >> 60) << 1 | - ((inst << 56) >> 63) << 11; + return sextract32(inst, 31, 1) << 12 | + extract32(inst, 25, 6) << 5 | + extract32(inst, 8, 4) << 1 | + extract32(inst, 7, 1) << 11; } =20 static uint32_t operand_cimmshl6(rv_inst inst, rv_isa isa) { - int imm =3D ((inst << 51) >> 63) << 5 | - (inst << 57) >> 59; + int imm =3D extract32(inst, 12, 1) << 5 | + extract32(inst, 2, 5); if (isa =3D=3D rv128) { imm =3D imm ? imm : 64; } @@ -4369,8 +4369,8 @@ static uint32_t operand_cimmshl6(rv_inst inst, rv_isa= isa) =20 static uint32_t operand_cimmshr6(rv_inst inst, rv_isa isa) { - int imm =3D ((inst << 51) >> 63) << 5 | - (inst << 57) >> 59; + int imm =3D extract32(inst, 12, 1) << 5 | + extract32(inst, 2, 5); if (isa =3D=3D rv128) { imm =3D imm | (imm & 32) << 1; imm =3D imm ? imm : 64; @@ -4380,116 +4380,116 @@ static uint32_t operand_cimmshr6(rv_inst inst, rv= _isa isa) =20 static int32_t operand_cimmi(rv_inst inst) { - return (((int64_t)inst << 51) >> 63) << 5 | - (inst << 57) >> 59; + return sextract32(inst, 12, 1) << 5 | + extract32(inst, 2, 5); } =20 static int32_t operand_cimmui(rv_inst inst) { - return (((int64_t)inst << 51) >> 63) << 17 | - ((inst << 57) >> 59) << 12; + return sextract32(inst, 12, 1) << 17 | + extract32(inst, 2, 5) << 12; } =20 static uint32_t operand_cimmlwsp(rv_inst inst) { - return ((inst << 51) >> 63) << 5 | - ((inst << 57) >> 61) << 2 | - ((inst << 60) >> 62) << 6; + return extract32(inst, 12, 1) << 5 | + extract32(inst, 4, 3) << 2 | + extract32(inst, 2, 2) << 6; } =20 static uint32_t operand_cimmldsp(rv_inst inst) { - return ((inst << 51) >> 63) << 5 | - ((inst << 57) >> 62) << 3 | - ((inst << 59) >> 61) << 6; + return extract32(inst, 12, 1) << 5 | + extract32(inst, 5, 2) << 3 | + extract32(inst, 2, 3) << 6; } =20 static uint32_t operand_cimmlqsp(rv_inst inst) { - return ((inst << 51) >> 63) << 5 | - ((inst << 57) >> 63) << 4 | - ((inst << 58) >> 60) << 6; + return extract32(inst, 12, 1) << 5 | + extract32(inst, 6, 1) << 4 | + extract32(inst, 2, 4) << 6; } =20 static int32_t operand_cimm16sp(rv_inst inst) { - return (((int64_t)inst << 51) >> 63) << 9 | - ((inst << 57) >> 63) << 4 | - ((inst << 58) >> 63) << 6 | - ((inst << 59) >> 62) << 7 | - ((inst << 61) >> 63) << 5; + return sextract32(inst, 12, 1) << 9 | + extract32(inst, 6, 1) << 4 | + extract32(inst, 5, 1) << 6 | + extract32(inst, 3, 2) << 7 | + extract32(inst, 2, 1) << 5; } =20 static int32_t operand_cimmj(rv_inst inst) { - return (((int64_t)inst << 51) >> 63) << 11 | - ((inst << 52) >> 63) << 4 | - ((inst << 53) >> 62) << 8 | - ((inst << 55) >> 63) << 10 | - ((inst << 56) >> 63) << 6 | - ((inst << 57) >> 63) << 7 | - ((inst << 58) >> 61) << 1 | - ((inst << 61) >> 63) << 5; + return sextract32(inst, 12, 1) << 11 | + extract32(inst, 11, 1) << 4 | + extract32(inst, 9, 2) << 8 | + extract32(inst, 8, 1) << 10 | + extract32(inst, 7, 1) << 6 | + extract32(inst, 6, 1) << 7 | + extract32(inst, 3, 3) << 1 | + extract32(inst, 2, 1) << 5; } =20 static int32_t operand_cimmb(rv_inst inst) { - return (((int64_t)inst << 51) >> 63) << 8 | - ((inst << 52) >> 62) << 3 | - ((inst << 57) >> 62) << 6 | - ((inst << 59) >> 62) << 1 | - ((inst << 61) >> 63) << 5; + return sextract32(inst, 12, 1) << 8 | + extract32(inst, 10, 2) << 3 | + extract32(inst, 5, 2) << 6 | + extract32(inst, 3, 2) << 1 | + extract32(inst, 2, 1) << 5; } =20 static uint32_t operand_cimmswsp(rv_inst inst) { - return ((inst << 51) >> 60) << 2 | - ((inst << 55) >> 62) << 6; + return extract32(inst, 9, 4) << 2 | + extract32(inst, 7, 2) << 6; } =20 static uint32_t operand_cimmsdsp(rv_inst inst) { - return ((inst << 51) >> 61) << 3 | - ((inst << 54) >> 61) << 6; + return extract32(inst, 10, 3) << 3 | + extract32(inst, 7, 3) << 6; } =20 static uint32_t operand_cimmsqsp(rv_inst inst) { - return ((inst << 51) >> 62) << 4 | - ((inst << 53) >> 60) << 6; + return extract32(inst, 11, 2) << 4 | + extract32(inst, 7, 4) << 6; } =20 static uint32_t operand_cimm4spn(rv_inst inst) { - return ((inst << 51) >> 62) << 4 | - ((inst << 53) >> 60) << 6 | - ((inst << 57) >> 63) << 2 | - ((inst << 58) >> 63) << 3; + return extract32(inst, 11, 2) << 4 | + extract32(inst, 7, 4) << 6 | + extract32(inst, 6, 1) << 2 | + extract32(inst, 5, 1) << 3; } =20 static uint32_t operand_cimmw(rv_inst inst) { - return ((inst << 51) >> 61) << 3 | - ((inst << 57) >> 63) << 2 | - ((inst << 58) >> 63) << 6; + return extract32(inst, 10, 3) << 3 | + extract32(inst, 6, 1) << 2 | + extract32(inst, 5, 1) << 6; } =20 static uint32_t operand_cimmd(rv_inst inst) { - return ((inst << 51) >> 61) << 3 | - ((inst << 57) >> 62) << 6; + return extract32(inst, 10, 3) << 3 | + extract32(inst, 5, 2) << 6; } =20 static uint32_t operand_cimmq(rv_inst inst) { - return ((inst << 51) >> 62) << 4 | - ((inst << 53) >> 63) << 8 | - ((inst << 57) >> 62) << 6; + return extract32(inst, 11, 2) << 4 | + extract32(inst, 10, 1) << 8 | + extract32(inst, 5, 2) << 6; } =20 static int32_t operand_vimm(rv_inst inst) { - return (int64_t)(inst << 44) >> 59; + return sextract32(inst, 15, 5); } =20 static uint32_t operand_vuimm(rv_inst inst) @@ -4499,54 +4499,54 @@ static uint32_t operand_vuimm(rv_inst inst) =20 static uint32_t operand_vzimm11(rv_inst inst) { - return (inst << 33) >> 53; + return extract32(inst, 20, 11); } =20 static uint32_t operand_vzimm10(rv_inst inst) { - return (inst << 34) >> 54; + return extract32(inst, 20, 10); } =20 static uint32_t operand_vzimm6(rv_inst inst) { - return ((inst << 37) >> 63) << 5 | - ((inst << 44) >> 59); + return extract32(inst, 26, 1) << 5 | + extract32(inst, 15, 5); } =20 static uint32_t operand_bs(rv_inst inst) { - return (inst << 32) >> 62; + return extract32(inst, 30, 2); } =20 static uint32_t operand_rnum(rv_inst inst) { - return (inst << 40) >> 60; + return extract32(inst, 20, 4); } =20 static uint32_t operand_vm(rv_inst inst) { - return (inst << 38) >> 63; + return extract32(inst, 25, 1); } =20 static uint32_t operand_uimm_c_lb(rv_inst inst) { - return (((inst << 58) >> 63) << 1) | - ((inst << 57) >> 63); + return extract32(inst, 5, 1) << 1 | + extract32(inst, 6, 1); } =20 static uint32_t operand_uimm_c_lh(rv_inst inst) { - return (((inst << 58) >> 63) << 1); + return extract32(inst, 5, 1) << 1; } =20 static uint32_t operand_zcmp_spimm(rv_inst inst) { - return ((inst << 60) >> 62) << 4; + return extract32(inst, 2, 2) << 4; } =20 static uint32_t operand_zcmp_rlist(rv_inst inst) { - return ((inst << 56) >> 60); + return extract32(inst, 4, 4); } =20 static uint32_t operand_imm6(rv_inst inst) @@ -4556,17 +4556,17 @@ static uint32_t operand_imm6(rv_inst inst) =20 static uint32_t operand_imm2(rv_inst inst) { - return (inst << 37) >> 62; + return extract32(inst, 25, 2); } =20 static uint32_t operand_immh(rv_inst inst) { - return (inst << 32) >> 58; + return extract32(inst, 26, 6); } =20 static uint32_t operand_imml(rv_inst inst) { - return (inst << 38) >> 58; + return extract32(inst, 20, 6); } =20 static uint32_t calculate_stack_adj(rv_isa isa, uint32_t rlist, uint32_t s= pimm) @@ -4585,12 +4585,12 @@ static uint32_t operand_zcmp_stack_adj(rv_inst inst= , rv_isa isa) =20 static uint32_t operand_tbl_index(rv_inst inst) { - return ((inst << 54) >> 56); + return extract32(inst, 2, 8); } =20 static uint32_t operand_lpl(rv_inst inst) { - return inst >> 12; + return extract32(inst, 12, 20); } =20 /* decode operands */ --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197721; cv=none; d=zohomail.com; s=zohoarc; b=ieuxRr+0ks16IVua92IESYW5IOj25p0R/3qvmnx029+Xzl4kdRdXJK3WAR+4oELEk3gOmYgexsok8F+QbtU0XAlT8JmkCJIg0AtZe3DUX9b5fMIIkaHjs4/nIX/+C9xxodUEZmKP8THgbxgjnZxTuFWnfA1sb8bhhwO4S0+El9U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197721; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=SgsaYtQ8tDSYVVM1L00F+By8GMWleAT9fxOmw/AcfMA=; b=JFNGbgrSElysP/qN/vru8w8bjzbpyl9lT43nSTgNaNxQUh5JdkUbSUkILWChc5ZLmbvav5JdXqFQt2e7iGEsqChnpc3ro9vh/98iGxEMzU4d1Hx9DL6S35nC69vykuFR0Yi/sjsmmFBbwUHDx8gkS+TNaerFuEMSaCnlbrA7eGY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719772125927.586866456998678; Wed, 19 Aug 2026 20:48:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjb-0001Ov-Mc; Wed, 19 Aug 2026 23:46:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjZ-0001Hu-Q0 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:29 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjY-00043q-20 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:29 -0400 Received: by mail-pj1-x1033.google.com with SMTP id 98e67ed59e1d1-38dc69c74b8so2168806a91.0 for ; Wed, 19 Aug 2026 20:46:27 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197587; x=1787802387; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=SgsaYtQ8tDSYVVM1L00F+By8GMWleAT9fxOmw/AcfMA=; b=Vlz3R3rWZoJY1Zqj3BM5/Oj7WZjmXao/FMz1kx6vVoJZrn0SX4VdNbCE2rlvOO8nV7 bVmRavytSoqXpQPiw+JkbcbLwm+7icRhEEOLp9Go1xmUV2TEJqiwimzyjTCS4CVkIBqf iaXL+g5MM29csPsF35YsTpSdagiqG+BFy7Iu3J0T3EC+Jh8gDSe6ji+Ugi6TWdQhtCEM AfrvCpVreauOzZDhzOUzr9Q2gfWEEhIj+xOS5jpUINSGOnX8QZsQniJJvTa+CrDohY6j 8CVnB5SuZ+rIpsFYYpfalV+BXT/Do7NmJfOBh2a7ny+uAidlf9J0BFfICLtQPlbL6s6F mFSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197587; x=1787802387; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=SgsaYtQ8tDSYVVM1L00F+By8GMWleAT9fxOmw/AcfMA=; b=GabrICtc1/rrHFeDy8r8yU+kvNcXhR9RkdxJulay4t1oA13Jq510WcYtJfejYUcKZt j7zDzoZKThmc7s9bTrC2HvvmVG0TQWya6/4D9g8SrzOoX4jId1MoBhMd9USa273l9JgS zcF/R44lPL0Jd4SlmQsMSHrhZBDZFWgsCUjbb6nRwz4QuUYgofALzBtQ4rRiQEGvOlzw HlhjWZ8Z9bOGRgMpDQQg6XTjeR9PT4Zt6Wtw1SUdFy/kNmJVIxPRa6tuap3xdsAoLq6B CRTK3w+8pVGtFkjt2KgKEhRc0xmLNWB/+Z1w7IdXoFKfkUCYCD/8uZsg6ROknx68N4qC N1Mg== X-Gm-Message-State: AFuF++lzODpr7bbQn5d4dUECBO0aRvet2NBilTkmTwWnfy2U7mb3RVXS Ms6WvtS/9AfLvKiiaboR3PvWNs7tJ4QHfwhC0mFTVrYKWnT6AdA0hCK0V0+Sgw== X-Gm-Gg: AR+sD13Xz6lLH6Cv6K1W9ZaIbbQYc6m3HhdPhhvExQhy7aGR/i6awGPefD8sqm5ANMF 0Hlmp85CqB5hycRBqzPPA1/4yHhDjINTuKTrfD8ubkRdr+nVXDNXxNEFuJeoIx1KbUbcX6nQd+/ JSY8brZTbx6cQN0813wmGQRn6yKAFCh1tPhQqWwibXceNMzI7Ou4Wl9AGGMJqrwEsn+dI1jnZK/ JElJAuPNfXFmFslQGzc1IsepsRmlrSh5aCTaLJXFu884ZWzuAQLqywA9beNdnkmfLTz4TPbh7yg 4zZ0jOchcmKTcw59n5y+LZ+AZJj148AxKx2LaBlbehzwr3BZ8+G3+gPq1AoYEko/lH0MCVw+MAb vAHt5yjjxn/geDELr/jbbr4hA7seziXY6pY1ASw9ajoaVEEEqF6bqxS1dEyf7f1ycYmzd063dIC MJXUho5sjVFBazPWJC/KbktHCCTK5bDL+a2GDXGEvF+iTrU8PZUxYxaEidoDuu0Pz+8pCGDhtl2 Ixt2g== X-Received: by 2002:a17:90b:2b8e:b0:38e:75f3:ad4d with SMTP id 98e67ed59e1d1-39580f03c97mr18254727a91.7.1787197586624; Wed, 19 Aug 2026 20:46:26 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Andrew Jones , Daniel Henrique Barboza , Nutty Liu , Alistair Francis Subject: [PULL 34/93] hw/riscv/riscv-iommu: fix U-bit check to apply only to leaf S/VS-stage PTEs Date: Thu, 20 Aug 2026 13:43:31 +1000 Message-ID: <20260820034430.1186695-35-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197722495158500 Content-Type: text/plain; charset="utf-8" From: Andrew Jones Commit b795ea0ba471 ("hw/riscv/riscv-iommu.c: fault when !PTE_U and no priv access") placed its check ahead of the leaf-vs-non-leaf branch in riscv_iommu_spa_fetch(), so it fires on every PTE walked, including non-leaf/table entries. Per the RISC-V privileged spec's address translation algorithm (Sv39/Sv48/etc., the "leaf PTE has been reached" step, followed separately by the U-bit permission check), the U bit is only defined and checked for the leaf PTE reached at the end of the walk -- non-leaf PTEs don't carry a meaningful U bit at all. Move the check after the leaf/non-leaf branch, alongside the other leaf-only checks, mirroring how the G_STAGE U-bit check (added in 9158c900ab30) is already correctly placed. Fixes: b795ea0ba471 ("hw/riscv/riscv-iommu.c: fault when !PTE_U and no priv= access") Signed-off-by: Andrew Jones Reviewed-by: Daniel Henrique Barboza Reviewed-by: Nutty Liu Message-ID: <20260717112340.1071148-1-andrew.jones@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 2bbac30cfa..462087f401 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -476,13 +476,6 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, R= ISCVIOMMUContext *ctx, break; /* Invalid PTE */ } else if (pte & PTE_RESERVED(false)) { break; /* Reserved PTE bits set */ - } else if (!(pte & PTE_U) && !pv) { - /* - * All accesses are assumed to be User mode unless - * process_id is valid (pv). In case we have a - * non-user mode PTE and !pv we need to fault. - */ - break; } else if (!(pte & (PTE_R | PTE_W | PTE_X))) { base =3D PPN_PHYS(ppn); /* Inner PTE, continue walking */ } else if ((pte & (PTE_R | PTE_W | PTE_X)) =3D=3D PTE_W) { @@ -491,6 +484,13 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, R= ISCVIOMMUContext *ctx, break; /* Reserved leaf PTE flags: PTE_W + PTE_= X */ } else if (ppn & ((1ULL << (va_skip - TARGET_PAGE_BITS)) - 1)) { break; /* Misaligned PPN */ + } else if (!(pte & PTE_U) && !pv) { + /* + * All accesses are assumed to be User mode unless + * process_id is valid (pv). In case we have a + * non-user mode leaf PTE and !pv we need to fault. + */ + break; } else if ((iotlb->perm & IOMMU_RO) && !(pte & PTE_R)) { break; /* Read access check failed */ } else if ((iotlb->perm & IOMMU_WO) && !(pte & PTE_W)) { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197665; cv=none; d=zohomail.com; s=zohoarc; b=oJzhJHje9A7wath0fbfHOqEjeQTss0W2iy9khakuCIQfCSEanOyd9kFnHkfCTmieBOQ53SCYAqNu8MYMQCMulA1kw8mkPuQMYgVHNsEwYt4edh/5f+wm2W3HUQ2kJ2Awl6Po0lT1aAKQ69G9bNBugVMLGqiQ0TuIvpZfiqTuP90= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197665; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=EDFMUC4WDu3hg73sBA3d+xAHHiRETvA/OxfHKXKbHcA=; b=BfX5soNrSCUFYMItusVszcdxgIOfqpOQGZ1yKWT1kItg/LY6Ba+eX9HXeamixyr7RdGiXcUWD9XsxWBNygT7BURW2fevHVamYsDU3d5ubPpL/XlcbZHKr6sk2lpwsQf57g6TgpH9GZszVydLGWZH5/PYXwsnGR8GWbTxEaw6vMg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197665583960.1123973409892; Wed, 19 Aug 2026 20:47:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtje-0001Y3-Du; Wed, 19 Aug 2026 23:46:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjd-0001Uk-7Z for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:33 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjb-00044J-9D for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:32 -0400 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-cbee846deecso1821362a12.1 for ; Wed, 19 Aug 2026 20:46:30 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197590; x=1787802390; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=EDFMUC4WDu3hg73sBA3d+xAHHiRETvA/OxfHKXKbHcA=; b=phYotmFeGYlk02Hief/gCfH4LsDgdDoacE7iTHdqRxbxSsAoKo2qKXWsGhnsEFFpLo FOB2qvz9ZzH9C1L16a5Yh2jduWQmvHPvaCo/2Ivpq9ytoVkx1+m/yxgvyOEY50/5qWYm 4SPg3JN3Au25UhYpqe+H4nsyqLylwYFZrqmAJhkXSf7Fne1alU+/Puie2PWqKANwqzGK rWho9ico8DILDKAjRPGBj2XJyOAMO4lGJ1Qykljrf5RB4jy92D0FS9ILv+4RKzT3DLCT kjtz9WtLgELTNloHvGKqnIyEYkrSRi3bmoAMyyx1ExDoTMqiSz51veTv6pSitmmYEIWw r+7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197590; x=1787802390; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=EDFMUC4WDu3hg73sBA3d+xAHHiRETvA/OxfHKXKbHcA=; b=rDcccNqBEm7SA43cbyMU45y88Zd1wNBZMTBaWPwfZKEut3ae2L42BNEzJB+bQbzO5D VK8gh8IwSzDZIp6DFri3jExU2nNFkgmX9sn9X8434zqewYR1JWXxMUMw7ccji8I7fjAV KP0AlNuFY58sV1HLlEGYGhLLlnIAWvW9kcIy0EWUDjwEJ5fEaVC8GJPCJEUHjkCBEAec V4zpai9ASaMX6aoZniRqKeqsc5NmyuuXpIaGTQk8H34GvOEpQxQxWEcheTvHntgUPYtt X3zt0DxBXLFsmone3pnZ0UK3ghxIFzF20C1UJy3pwOmkaO5gBePsO2rhM7/RKTDgwLBE vAwA== X-Gm-Message-State: AOJu0YxEsUP3LjS5eAxKQCYeLMXXbFSoQPfXeLXilRWaIJKLbo5WEXv6 ozmFPN+Dj3S6puCm9U76pGchEmyG4AEfOriTFDMrDX+lHJf+7NiAOnB0v20DrQ== X-Gm-Gg: AR+sD12UyAo4pxVZBo+c35d8hWrpacgrJf1vC1UUaB8HE17U3I8bshWQo1vk6YF+cA0 HliuGOVys3t/q+dzpzSBSo7exHrlbrLC8QPxMFBre1hWVYQEx9fh9loJ8TMMVgaCCTwrbqHPryr 82C6JaQx7S6pJZU5PY6gTHtXoXWAGXewZy9u9zwjOPX8umnH22XEnCCPDz1r5lQgsz2BH+Sxlmo vvCGqBWh7X4lDEVV/49bawakxSzbTs479xXFoSogdqr1kNr4oQJ+ZDyZ9Wf9rUkDBF4QMF1WgtX /TLGlpQq3pNhkbXK80GZE1Q+aIrh6fZwbCo5blJbmKlfJatDGrxW5Q0JnfsYHJ7cxCcCpatnzbv 6jFtUbmrzwzd4rUnoJEmud6NLuC3aNNm8kyUS7N9eP4vkmL3ey7EcsWGjFVdqh3vSbRESC2Gu5I dInZ1QfaGZTwT2+R7w6ho4Tt53RGDtJS1M3ZtCZI5cnRwCJz0L9FRSyLfg5yk88qRrQ+Dns/DrU Ocpw8Y= X-Received: by 2002:a05:6a20:3d19:b0:3bf:b1d3:393e with SMTP id adf61e73a8af0-3cd00dcb3dfmr19006012637.2.1787197589554; Wed, 19 Aug 2026 20:46:29 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Andrew Jones , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 35/93] hw/riscv/riscv-iommu: preserve requested perm in spa_fetch() Date: Thu, 20 Aug 2026 13:43:32 +1000 Message-ID: <20260820034430.1186695-36-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=alistair23@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197666344158500 Content-Type: text/plain; charset="utf-8" From: Andrew Jones b18e3f0e2d0f fixed spa_fetch() faults whose TTYP used the leaf PTE permission instead of the original request permission. However, it kept that request-narrowed value in iotlb->perm after a successful walk, and riscv_iommu_translate() caches iotlb->perm for later accesses to the same IOVA. That means a write to an RW mapping can cache the entry as write-only. A later read then hits the cache and faults even though the mapping allows it, which showed up in NVMe testing as bogus completions and controller timeouts. Keep the requested permission in a separate req_perm and use it for all permission checks and fault-type decisions. Accumulate the leaf permissions separately and copy them to iotlb->perm only after the full walk succeeds, so cached entries describe the mapping rather than the current request. Since faults leave iotlb->perm as the original request, the S-stage and G-stage TTYP fixes remain intact. Fixes: b18e3f0e2d0f ("hw/riscv/riscv-iommu.c: fix fault type for spa_fetch(= ) faults") Signed-off-by: Andrew Jones Reviewed-by: Daniel Henrique Barboza Message-ID: <20260717144525.1154204-1-andrew.jones@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu.c | 50 ++++++++++++++++++++++++------------------ 1 file changed, 29 insertions(+), 21 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 462087f401..f611c10c59 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -281,7 +281,7 @@ static hwaddr riscv_iommu_napot_page_mask(hwaddr ppn, h= waddr addr, hwaddr *out) static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RISCVIOMMUContext *ct= x, IOMMUTLBEntry *iotlb) { - IOMMUAccessFlags pte_perm; + IOMMUAccessFlags trans_perm =3D IOMMU_NONE; dma_addr_t addr, base; uint64_t satp, gatp, pte; bool en_s, en_g; @@ -298,6 +298,14 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, R= ISCVIOMMUContext *ctx, } pass; MemTxResult ret; bool pv =3D !!ctx->process_id; + /* + * Keep the request permission separate from iotlb->perm. G-stage + * walks translate S-stage PTE addresses before the real leaf is + * reached, but permission checks and fault types must still use the + * original request. A successful walk leaves iotlb->perm with the + * effective leaf permission for the translation cache. + */ + const IOMMUAccessFlags req_perm =3D iotlb->perm; =20 satp =3D get_field(ctx->satp, RISCV_IOMMU_ATP_MODE_FIELD); gatp =3D get_field(ctx->gatp, RISCV_IOMMU_ATP_MODE_FIELD); @@ -316,7 +324,7 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RI= SCVIOMMUContext *ctx, * means we can't do an early MSI check unless we have * strictly !en_s. */ - if (!en_s && (iotlb->perm & IOMMU_WO) && + if (!en_s && (req_perm & IOMMU_WO) && riscv_iommu_msi_check(s, ctx, iotlb->iova)) { iotlb->target_as =3D &s->trap_as; iotlb->translated_addr =3D iotlb->iova; @@ -434,13 +442,13 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, = RISCVIOMMUContext *ctx, masked_msbs =3D (addr >> (va_len - 1)) & mask; =20 if (masked_msbs !=3D 0 && masked_msbs !=3D mask) { - return (iotlb->perm & IOMMU_WO) ? + return (req_perm & IOMMU_WO) ? RISCV_IOMMU_FQ_CAUSE_WR_FAULT_S : RISCV_IOMMU_FQ_CAUSE_RD_FAULT_S; } } else { if ((addr & va_mask) !=3D addr) { - return (iotlb->perm & IOMMU_WO) ? + return (req_perm & IOMMU_WO) ? RISCV_IOMMU_FQ_CAUSE_WR_FAULT_VS : RISCV_IOMMU_FQ_CAUSE_RD_FAULT_VS; } @@ -465,8 +473,8 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RI= SCVIOMMUContext *ctx, MEMTXATTRS_UNSPECIFIED); } if (ret !=3D MEMTX_OK) { - return (iotlb->perm & IOMMU_WO) ? RISCV_IOMMU_FQ_CAUSE_WR_FAULT - : RISCV_IOMMU_FQ_CAUSE_RD_FAUL= T; + return (req_perm & IOMMU_WO) ? RISCV_IOMMU_FQ_CAUSE_WR_FAULT + : RISCV_IOMMU_FQ_CAUSE_RD_FAULT; } =20 sc[pass].step++; @@ -491,13 +499,13 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, = RISCVIOMMUContext *ctx, * non-user mode leaf PTE and !pv we need to fault. */ break; - } else if ((iotlb->perm & IOMMU_RO) && !(pte & PTE_R)) { + } else if ((req_perm & IOMMU_RO) && !(pte & PTE_R)) { break; /* Read access check failed */ - } else if ((iotlb->perm & IOMMU_WO) && !(pte & PTE_W)) { + } else if ((req_perm & IOMMU_WO) && !(pte & PTE_W)) { break; /* Write access check failed */ } else if (!ade && !(pte & PTE_A)) { break; /* Access bit not set */ - } else if ((iotlb->perm & IOMMU_WO) && !ade && !(pte & PTE_D)) { + } else if ((req_perm & IOMMU_WO) && !ade && !(pte & PTE_D)) { break; /* Dirty bit not set */ } else if (pass =3D=3D G_STAGE && !(pte & PTE_U)) { /* @@ -532,21 +540,20 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, = RISCVIOMMUContext *ctx, addr =3D iotlb->iova; continue; } + + /* Cache the effective permission, not this request's subset. = */ + IOMMUAccessFlags leaf_perm =3D (pte & PTE_W) ? + ((pte & PTE_R) ? IOMMU_RW : IOMMU= _WO) : + IOMMU_RO; + + trans_perm =3D trans_perm =3D=3D IOMMU_NONE ? + leaf_perm : trans_perm & leaf_perm; + /* Translation phase completed (GPA or SPA) */ iotlb->translated_addr =3D base; =20 - /* - * Do a bit_and between the PTE bits and the original - * request flags to determine the exact permission we - * need, i.e. if the original request is RO and the - * PTE has RW flags the actual perm is RO. - */ - pte_perm =3D (pte & PTE_W) ? ((pte & PTE_R) ? IOMMU_RW : IOMMU= _WO) - : IOMMU_RO; - iotlb->perm &=3D pte_perm; - /* Check MSI GPA address match */ - if (pass =3D=3D S_STAGE && (iotlb->perm & IOMMU_WO) && + if (pass =3D=3D S_STAGE && (req_perm & IOMMU_WO) && riscv_iommu_msi_check(s, ctx, base)) { /* Trap MSI writes and return GPA address. */ iotlb->target_as =3D &s->trap_as; @@ -563,6 +570,7 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RI= SCVIOMMUContext *ctx, continue; } =20 + iotlb->perm =3D trans_perm; return 0; } =20 @@ -587,7 +595,7 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RI= SCVIOMMUContext *ctx, */ iotlb->translated_addr =3D addr; =20 - return (iotlb->perm & IOMMU_WO) ? + return (req_perm & IOMMU_WO) ? (pass ? RISCV_IOMMU_FQ_CAUSE_WR_FAULT_VS : RISCV_IOMMU_FQ_CAUSE_WR_FAULT_S) : (pass ? RISCV_IOMMU_FQ_CAUSE_RD_FAULT_VS : --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198155; cv=none; d=zohomail.com; s=zohoarc; b=TA+m3EuqUDi2pSoaO+6EcjCT/nDc/MhwQCIlDoaE5uH25Yfm9RohL6rmFvXrkE6X2jxBbUuaB7yF03mUvyXrt7lEzJnjhXvN4Q+BHhugjMWQjixVF4OBYvPTKfjEHH9wKCyP4g/J8PGOKpAnOlmaOJ7Q4skhJPOZ/94FdOi9yUo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198155; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8ZvrE0OJGfngMr7vtDZpzHvPZXdScoco3DbqKgkdkXM=; b=kMLgpg2SfcPN61bo1H3EAjwXMyhXhwkvx5xsTv9/SbAvaZ2yPLnLoFWPB5eOMe/Tm6O0FatzXYgijm/Z9cjsPEaGZ9QzbHqoQmCBPNGFM/BvpBrWCRzsujrNX7WAl58NyQDrUbG5ruaEpn8YhrWMrL2jCxRZJ2Twkbcad+cn/Do= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198155269185.6742264089853; Wed, 19 Aug 2026 20:55:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtji-0001as-BR; Wed, 19 Aug 2026 23:46:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjf-0001YL-LR for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:36 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjd-00044d-QE for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:35 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c999f162c9aso1095686a12.3 for ; Wed, 19 Aug 2026 20:46:33 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197592; x=1787802392; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=8ZvrE0OJGfngMr7vtDZpzHvPZXdScoco3DbqKgkdkXM=; b=jVKgwCfeCfCs/OkIxKIoyiIAY/7arl4c/G+yQOiyMCEpuatVCyAvmoWmg4O4fBcBrw jlnnaaOTSl5IvUHFW11i8fAEd1jTCaHsVLB5HU4VSdIlCK1jLDnMCV7R6b6JR7vHzTMU BQ+inxqHD+qkZ0Giga52cpxf2jbq84SG9CpwN5VUiVqAHzJTC8JhUfSQk7QYjRPfWuxC oeoNilcqSn1yzyZOugz8OGJPrx0OeftPc3hPJBm9CSMPQtYOf12rW9WumqIveyiUVJWY Iwz1QW9M7rXptf+dCfVsLm6Ap4ff5A4UEn2CHLteyNKI2/1pzFhlZbdYLTsEr8AALx2A lZ6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197592; x=1787802392; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=8ZvrE0OJGfngMr7vtDZpzHvPZXdScoco3DbqKgkdkXM=; b=S0prwInbqoiBBr3HXnbIPjtXyP6BUu79aQ/3AjHqZBsgJJySa2jgQpyLDdP6ToQXIM appV9JbYXs6peQAvKx0Y5kJbwIvTVVJMJlWVmZXMmNGvDtDqiTQMqCBZF3BCr3SV0a/T L6p7KV/2m9NvzILaPoMKC+jBpJ/FzI9HlswwqRHb/IGItEROv+wxl4FGxnCw3zq6v99q ADVbLjVlKjA81Ya5D98ouYiGvQ3ADNIikR34afjDwW/uJRcFOz7X4Avsls8CTSEzt041 nOe23O4eJTuwJMOaGg4WT5Ccuj7nydblwOOvLprM94UTt+OJpEL50hKhThWqu4CQ5bNZ N/nw== X-Gm-Message-State: AOJu0Yzeccul+QnAbb5rSzy5iCU0czZmwdMrfBVQhn0zlvYgHyqMSHLz mnUdxt5ZemUd7jyQFsgApbNuIrEVmfgiL62Bvup3MnGMMji1f4Z/Or/whoaDnQ== X-Gm-Gg: AR+sD12hEHRPuRe5cID86nAtECTmv/FMDVM5aAzh0iTcT3sjjbDAsivmnby9IAsqq4U dNxCA1lMJl8WVDFkA3Q6W8hjYsAqIVdFwLpUeZ5d5mFXUn63uyNvIL6j8xcHED/0y4Rz6KFNTiO SXUyozERFG1WnJXd0hQX9TF/UWdhTSL8ek//L+2ev8KZvKYcrODOfc+4Ya9KsFnxU0YAOfcT0c6 e7CcxgYsBwWMACTTH6Zn2bu4ghPSWadj/Pj4680aBMMfAZq7m7CLJ20Dxn1M5ZKQHS5yR5Vf7nw sJEtWqeXBjgnCHLo4jpqwN71WalpU+rhxFO0P6miYahr8BPvMavvQ9C78qjfsnEtQvCqUAhRYN+ EXwqc2fbUZtjglFbx4qXk/EJO9r8VCF6jRVcHXZkwKW9psSzZGYaJtx1jcFBw6VnQ3EPK5h+mjv FROrWdGrc3gSRrFvRkh2MgKeH2EjgVuXSdl8F4p4PgYvJ9Ci80onkvwSddDd4G7B42gTezU3is5 T+tqQ== X-Received: by 2002:a05:6a21:9984:b0:3c3:b57b:6291 with SMTP id adf61e73a8af0-3cd0132c618mr15438400637.18.1787197592488; Wed, 19 Aug 2026 20:46:32 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: A-Shehab , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 36/93] target/riscv: allow menvcfg/henvcfg LPE and SSE bits on RV32 Date: Thu, 20 Aug 2026 13:43:33 +1000 Message-ID: <20260820034430.1186695-37-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198156015158500 Content-Type: text/plain; charset="utf-8" From: A-Shehab The Zicfilp landing-pad enable (LPE, bit 2) and Zicfiss shadow-stack enable (SSE, bit 3) controls live in the low 32 bits of menvcfg and henvcfg, and the CFI specification defines them for both RV32 and RV64. QEMU only adds MENVCFG_LPE/MENVCFG_SSE (and the henvcfg equivalents) to the writable mask inside the "riscv_cpu_mxl(env) =3D=3D MXL_RV64" block, so on RV32 these bits are silently dropped and the features cannot be enabled. This is inconsistent with write_senvcfg(), which already handles SENVCFG_LPE/SENVCFG_SSE regardless of MXLEN. Hoist the LPE/SSE mask handling out of the RV64-only block in write_menvcfg() and write_henvcfg() so the bits become writable on RV32 as well. The upper-half writers (write_menvcfgh/write_henvcfgh) are unaffected because these bits reside in the low 32 bits. Reproducible on qemu-system-riscv32 -cpu rv32,zicfilp=3Dtrue,zicfiss=3Dtrue: an M-mode write of menvcfg.{LPE,SSE} reads back as zero, while the same program on rv64 keeps the bits set. Fixes: 4923f672e3d7 ("target/riscv: Introduce elp state and enabling contro= ls for zicfilp") Fixes: 8205bc127a83 ("target/riscv: introduce ssp and enabling controls for= zicfiss") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4045 Signed-off-by: A-Shehab Reviewed-by: Daniel Henrique Barboza Message-ID: <20260726080537.13913-1-ahshehab24@gmail.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/csr.c | 45 +++++++++++++++++++++++++----------------- 1 file changed, 27 insertions(+), 18 deletions(-) diff --git a/target/riscv/tcg/csr.c b/target/riscv/tcg/csr.c index a90449b87f..ffd751caa5 100644 --- a/target/riscv/tcg/csr.c +++ b/target/riscv/tcg/csr.c @@ -3221,6 +3221,19 @@ static RISCVException write_menvcfg(CPURISCVState *e= nv, int csrno, MENVCFG_CBZE; bool stce_changed =3D false; =20 + /* + * menvcfg.LPE (Zicfilp) and menvcfg.SSE (Zicfiss) reside in the low + * 32 bits and are defined for both RV32 and RV64, so they must be + * writable regardless of MXLEN. + */ + if (cfg->ext_zicfilp) { + mask |=3D MENVCFG_LPE; + } + + if (cfg->ext_zicfiss) { + mask |=3D MENVCFG_SSE; + } + if (riscv_cpu_mxl(env) =3D=3D MXL_RV64) { mask |=3D (cfg->ext_svpbmt ? MENVCFG_PBMTE : 0) | (cfg->ext_sstc ? MENVCFG_STCE : 0) | @@ -3228,14 +3241,6 @@ static RISCVException write_menvcfg(CPURISCVState *e= nv, int csrno, (cfg->ext_svadu ? MENVCFG_ADUE : 0) | (cfg->ext_ssdbltrp ? MENVCFG_DTE : 0); =20 - if (env_archcpu(env)->cfg.ext_zicfilp) { - mask |=3D MENVCFG_LPE; - } - - if (env_archcpu(env)->cfg.ext_zicfiss) { - mask |=3D MENVCFG_SSE; - } - /* Update PMM field only if the value is valid according to Zjpm v= 1.0 */ if (env_archcpu(env)->cfg.ext_smnpm && get_field(val, MENVCFG_PMM) !=3D PMM_FIELD_RESERVED) { @@ -3383,20 +3388,24 @@ static RISCVException write_henvcfg(CPURISCVState *= env, int csrno, return ret; } =20 + /* + * henvcfg.LPE (Zicfilp) and henvcfg.SSE (Zicfiss) reside in the low + * 32 bits and are defined for both RV32 and RV64, so they must be + * writable regardless of MXLEN. + */ + if (cfg->ext_zicfilp) { + mask |=3D HENVCFG_LPE; + } + + /* H can light up SSE for VS only if HS had it from menvcfg */ + if (cfg->ext_zicfiss && get_field(env->menvcfg, MENVCFG_SSE)) { + mask |=3D HENVCFG_SSE; + } + if (riscv_cpu_mxl(env) =3D=3D MXL_RV64) { mask |=3D env->menvcfg & (HENVCFG_PBMTE | HENVCFG_STCE | HENVCFG_A= DUE | HENVCFG_DTE); =20 - if (env_archcpu(env)->cfg.ext_zicfilp) { - mask |=3D HENVCFG_LPE; - } - - /* H can light up SSE for VS only if HS had it from menvcfg */ - if (env_archcpu(env)->cfg.ext_zicfiss && - get_field(env->menvcfg, MENVCFG_SSE)) { - mask |=3D HENVCFG_SSE; - } - /* Update PMM field only if the value is valid according to Zjpm v= 1.0 */ if (env_archcpu(env)->cfg.ext_ssnpm && get_field(val, HENVCFG_PMM) !=3D PMM_FIELD_RESERVED) { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198497; cv=none; d=zohomail.com; s=zohoarc; b=l17VJmCRZvw4/umDzXiWXOa3okyqgS+QXIdQ86c7mHvvWxhj/pLx1BztKTaiepEohBcohPFPhJ86DYSPZwLoEMPeXmnysMRzm+ueXpvRIx2ojEYa3sScE+lLvRw4gZ8+ea4//TBzxqmYVXpb/uA4bghj3qvznDKhujCGifhtTFg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198497; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=YDe9QslZfKvhuINTOB9JrcuDeFDRZ6aQd6kbXZ9uq/w=; b=A6CiU3g/jlTbTOGu983pEi0dDnE6koak52DT7Y/54bAqzNxNTCCEpALJMHuPdCCSCmWV8jXgVmv0Aqc1LzTQTEHLAOHfasDmJJ9fIZW4GNnYTlnac2rPlCMyo2s/IvZiESJDC0U85HJtq1T0e7C13bTQp4bonROn1gStKhQNzmk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198497108964.3675176177048; Wed, 19 Aug 2026 21:01:37 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjn-0001iw-1C; Wed, 19 Aug 2026 23:46:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjk-0001cR-5E for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:41 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjg-00044y-SN for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:39 -0400 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-8486672f03cso1707389b3a.0 for ; Wed, 19 Aug 2026 20:46:36 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197595; x=1787802395; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=YDe9QslZfKvhuINTOB9JrcuDeFDRZ6aQd6kbXZ9uq/w=; b=hbvr0HbTu887iK45smGPhPHsFiqwXIJPibsgxHNRVKT7R2aT6YMC461G4UciPyoovx xxpsg+ME7EOrcmH/ZIFJMd3T/Mtlg2U+y4TJblw2tnU3BudbhocSDPKooSLSuP+ADVY4 kf55pv5R68uX5fUx6cL7jd+PBcv1ezed3FGfHrsQ/boeiCm/o6fAiMCayr0DeCQSl4Ux xP8wqoWqWLzw4U9k2mLp9uWTCa2hKHrjYazI3fWhnOMNnlPe9+3MFIOjqMwnr/55S/9G VBFmW8HJpbuwukGpRY4d4nFZ/VQHXYjVDYqiAOUXMuuplkB6ELdG7xH0b0BFsmNzxqso 2JSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197595; x=1787802395; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=YDe9QslZfKvhuINTOB9JrcuDeFDRZ6aQd6kbXZ9uq/w=; b=CoY0vwrFLERjfab5t2pMWXZzEBJ4uoeaFN/gI812t1Gy17VQcgTjlBFH+tlJ6s+37f 3O8Ce2u/t5iqu0K2PDMeKfJqbzaDhQ5aJzlGOxt/foiHolDMGrCeLBRTKCHq0P5SpG4A c8LZeQj+s3JRkv3IltqHiJAvMGrUmHvruZnMVI5PzOP1xVg2+XR3VBtlG7Tb7NZVFcXg f4NTQ6XpJKYRqUC041N6yBpnGJBYVhD07PH278M6Zoz4Y3V+fwDpRuliCGw316mvYefI HCRxh6drILPx4Q7nBCJ98zdZD/W/LYSDGCvukFMl+lWMeQa4GvxaW+k8C01R6sQUJfG+ TBgw== X-Gm-Message-State: AOJu0YzTncqcigMQ55I2FuIS3BqXyls3q0s9glFz7BF2DJmrmFBNLaGq nLGpTpK9oFCvQ3t39dSPV44Cp9aJZ7b9kc9C7swoPcPI07LADuae8VkzhZU60Q== X-Gm-Gg: AR+sD11irS2IRg9kVkf514bx5UYjIERZQBgeK52VV994GByBF1S+HUjTID1tJoQOtOX WtYx1yZ8ZiwQ8HebQCZVzVcEoTJXjGWYysR0YiFb7Fp0BU0Hm/ucqKNOzTVHeWifTpVmfq4qGiu VBVVZJAUobrwQyjURbBu0g8WH3+GcvNL54YbaF3NcGnBKVo4sINOWVwjn/CgyXq/v87pIUhd8L8 1e9RKjtbv+qLn1DzD/pE7zR6is/WO/qsA+x3QYqtgNrsbHP17s9C8wfZ856xKIaSB+DmEXoOin3 +yrZUbypwLgqCgYoLPz5loGPsxCMp7qprt+IYt6nVK7HMbvQoz05FkhMrI5mOKRXvlyO9jgkK4p 20yD3PVixlo/Crs+2zRw9ULp1PNleC9e4qbDuVtLA/Si1JGzqrf+ifrk4jfcaDxfDsia0wNyb01 b7I6aRAnpVE4BL1++c+sdxtjrkcVICZ/bvyq85HLkpHecLpQjxUA2wYEJrHKQ+tt30CHvoU5lvs pJxEA== X-Received: by 2002:a05:6a21:7d02:b0:3c4:46ca:334b with SMTP id adf61e73a8af0-3cd016660e9mr19159698637.9.1787197595221; Wed, 19 Aug 2026 20:46:35 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 37/93] disas/riscv: Move operand extractors earlier in file Date: Thu, 20 Aug 2026 13:43:34 +1000 Message-ID: <20260820034430.1186695-38-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=alistair23@gmail.com; helo=mail-pf1-x434.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198499291158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-2-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 870 +++++++++++++++++++++++++------------------------- 1 file changed, 435 insertions(+), 435 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 2ba0a6a73a..e3fbc26626 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1259,6 +1259,401 @@ static const rv_comp_data rvcp_fsgnjx_q[] =3D { { rv_op_illegal, NULL } }; =20 +/* operand extractors */ + +static uint32_t operand_rd(rv_inst inst) +{ + return extract32(inst, 7, 5); +} + +static uint32_t operand_rs1(rv_inst inst) +{ + return extract32(inst, 15, 5); +} + +static uint32_t operand_rs2(rv_inst inst) +{ + return extract32(inst, 20, 5); +} + +static uint32_t operand_rs3(rv_inst inst) +{ + return extract32(inst, 27, 5); +} + +static uint32_t operand_aq(rv_inst inst) +{ + return extract32(inst, 26, 1); +} + +static uint32_t operand_rl(rv_inst inst) +{ + return extract32(inst, 25, 1); +} + +static uint32_t operand_pred(rv_inst inst) +{ + return extract32(inst, 24, 4); +} + +static uint32_t operand_succ(rv_inst inst) +{ + return extract32(inst, 20, 4); +} + +static uint32_t operand_rm(rv_inst inst) +{ + return extract32(inst, 12, 3); +} + +static uint32_t operand_shamt5(rv_inst inst) +{ + return extract32(inst, 20, 5); +} + +static uint32_t operand_shamt6(rv_inst inst) +{ + return extract32(inst, 20, 6); +} + +static uint32_t operand_shamt7(rv_inst inst) +{ + return extract32(inst, 20, 7); +} + +static uint32_t operand_crdq(rv_inst inst) +{ + return extract32(inst, 2, 3); +} + +static uint32_t operand_crs1q(rv_inst inst) +{ + return extract32(inst, 7, 3); +} + +static uint32_t operand_crs1rdq(rv_inst inst) +{ + return extract32(inst, 7, 3); +} + +static uint32_t operand_crs2q(rv_inst inst) +{ + return extract32(inst, 2, 3); +} + +static uint32_t calculate_xreg(uint32_t sreg) +{ + return sreg < 2 ? sreg + 8 : sreg + 16; +} + +static uint32_t operand_sreg1(rv_inst inst) +{ + return calculate_xreg(extract32(inst, 7, 3)); +} + +static uint32_t operand_sreg2(rv_inst inst) +{ + return calculate_xreg(extract32(inst, 2, 3)); +} + +static uint32_t operand_crd(rv_inst inst) +{ + return extract32(inst, 7, 5); +} + +static uint32_t operand_crs1(rv_inst inst) +{ + return extract32(inst, 7, 5); +} + +static uint32_t operand_crs1rd(rv_inst inst) +{ + return extract32(inst, 7, 5); +} + +static uint32_t operand_crs2(rv_inst inst) +{ + return extract32(inst, 2, 5); +} + +static uint32_t operand_cimmsh5(rv_inst inst) +{ + return extract32(inst, 2, 5); +} + +static uint32_t operand_csr12(rv_inst inst) +{ + return extract32(inst, 20, 12); +} + +static int32_t operand_imm12(rv_inst inst) +{ + return sextract32(inst, 20, 12); +} + +static int32_t operand_imm20(rv_inst inst) +{ + return sextract32(inst, 12, 20) << 12; +} + +static int32_t operand_jimm20(rv_inst inst) +{ + return sextract32(inst, 31, 1) << 20 | + extract32(inst, 21, 10) << 1 | + extract32(inst, 20, 1) << 11 | + extract32(inst, 12, 8) << 12; +} + +static int32_t operand_simm12(rv_inst inst) +{ + return sextract32(inst, 25, 7) << 5 | + extract32(inst, 7, 5); +} + +static int32_t operand_sbimm12(rv_inst inst) +{ + return sextract32(inst, 31, 1) << 12 | + extract32(inst, 25, 6) << 5 | + extract32(inst, 8, 4) << 1 | + extract32(inst, 7, 1) << 11; +} + +static uint32_t operand_cimmshl6(rv_inst inst, rv_isa isa) +{ + int imm =3D extract32(inst, 12, 1) << 5 | + extract32(inst, 2, 5); + if (isa =3D=3D rv128) { + imm =3D imm ? imm : 64; + } + return imm; +} + +static uint32_t operand_cimmshr6(rv_inst inst, rv_isa isa) +{ + int imm =3D extract32(inst, 12, 1) << 5 | + extract32(inst, 2, 5); + if (isa =3D=3D rv128) { + imm =3D imm | (imm & 32) << 1; + imm =3D imm ? imm : 64; + } + return imm; +} + +static int32_t operand_cimmi(rv_inst inst) +{ + return sextract32(inst, 12, 1) << 5 | + extract32(inst, 2, 5); +} + +static int32_t operand_cimmui(rv_inst inst) +{ + return sextract32(inst, 12, 1) << 17 | + extract32(inst, 2, 5) << 12; +} + +static uint32_t operand_cimmlwsp(rv_inst inst) +{ + return extract32(inst, 12, 1) << 5 | + extract32(inst, 4, 3) << 2 | + extract32(inst, 2, 2) << 6; +} + +static uint32_t operand_cimmldsp(rv_inst inst) +{ + return extract32(inst, 12, 1) << 5 | + extract32(inst, 5, 2) << 3 | + extract32(inst, 2, 3) << 6; +} + +static uint32_t operand_cimmlqsp(rv_inst inst) +{ + return extract32(inst, 12, 1) << 5 | + extract32(inst, 6, 1) << 4 | + extract32(inst, 2, 4) << 6; +} + +static int32_t operand_cimm16sp(rv_inst inst) +{ + return sextract32(inst, 12, 1) << 9 | + extract32(inst, 6, 1) << 4 | + extract32(inst, 5, 1) << 6 | + extract32(inst, 3, 2) << 7 | + extract32(inst, 2, 1) << 5; +} + +static int32_t operand_cimmj(rv_inst inst) +{ + return sextract32(inst, 12, 1) << 11 | + extract32(inst, 11, 1) << 4 | + extract32(inst, 9, 2) << 8 | + extract32(inst, 8, 1) << 10 | + extract32(inst, 7, 1) << 6 | + extract32(inst, 6, 1) << 7 | + extract32(inst, 3, 3) << 1 | + extract32(inst, 2, 1) << 5; +} + +static int32_t operand_cimmb(rv_inst inst) +{ + return sextract32(inst, 12, 1) << 8 | + extract32(inst, 10, 2) << 3 | + extract32(inst, 5, 2) << 6 | + extract32(inst, 3, 2) << 1 | + extract32(inst, 2, 1) << 5; +} + +static uint32_t operand_cimmswsp(rv_inst inst) +{ + return extract32(inst, 9, 4) << 2 | + extract32(inst, 7, 2) << 6; +} + +static uint32_t operand_cimmsdsp(rv_inst inst) +{ + return extract32(inst, 10, 3) << 3 | + extract32(inst, 7, 3) << 6; +} + +static uint32_t operand_cimmsqsp(rv_inst inst) +{ + return extract32(inst, 11, 2) << 4 | + extract32(inst, 7, 4) << 6; +} + +static uint32_t operand_cimm4spn(rv_inst inst) +{ + return extract32(inst, 11, 2) << 4 | + extract32(inst, 7, 4) << 6 | + extract32(inst, 6, 1) << 2 | + extract32(inst, 5, 1) << 3; +} + +static uint32_t operand_cimmw(rv_inst inst) +{ + return extract32(inst, 10, 3) << 3 | + extract32(inst, 6, 1) << 2 | + extract32(inst, 5, 1) << 6; +} + +static uint32_t operand_cimmd(rv_inst inst) +{ + return extract32(inst, 10, 3) << 3 | + extract32(inst, 5, 2) << 6; +} + +static uint32_t operand_cimmq(rv_inst inst) +{ + return extract32(inst, 11, 2) << 4 | + extract32(inst, 10, 1) << 8 | + extract32(inst, 5, 2) << 6; +} + +static int32_t operand_vimm(rv_inst inst) +{ + return sextract32(inst, 15, 5); +} + +static uint32_t operand_vuimm(rv_inst inst) +{ + return extract32(inst, 15, 5); +} + +static uint32_t operand_vzimm11(rv_inst inst) +{ + return extract32(inst, 20, 11); +} + +static uint32_t operand_vzimm10(rv_inst inst) +{ + return extract32(inst, 20, 10); +} + +static uint32_t operand_vzimm6(rv_inst inst) +{ + return extract32(inst, 26, 1) << 5 | + extract32(inst, 15, 5); +} + +static uint32_t operand_bs(rv_inst inst) +{ + return extract32(inst, 30, 2); +} + +static uint32_t operand_rnum(rv_inst inst) +{ + return extract32(inst, 20, 4); +} + +static uint32_t operand_vm(rv_inst inst) +{ + return extract32(inst, 25, 1); +} + +static uint32_t operand_uimm_c_lb(rv_inst inst) +{ + return extract32(inst, 5, 1) << 1 | + extract32(inst, 6, 1); +} + +static uint32_t operand_uimm_c_lh(rv_inst inst) +{ + return extract32(inst, 5, 1) << 1; +} + +static uint32_t operand_zcmp_spimm(rv_inst inst) +{ + return extract32(inst, 2, 2) << 4; +} + +static uint32_t operand_zcmp_rlist(rv_inst inst) +{ + return extract32(inst, 4, 4); +} + +static uint32_t operand_imm6(rv_inst inst) +{ + return extract32(inst, 20, 6); +} + +static uint32_t operand_imm2(rv_inst inst) +{ + return extract32(inst, 25, 2); +} + +static uint32_t operand_immh(rv_inst inst) +{ + return extract32(inst, 26, 6); +} + +static uint32_t operand_imml(rv_inst inst) +{ + return extract32(inst, 20, 6); +} + +static uint32_t calculate_stack_adj(rv_isa isa, uint32_t rlist, uint32_t s= pimm) +{ + int xlen_bytes_log2 =3D isa =3D=3D rv64 ? 3 : 2; + int regs =3D rlist =3D=3D 15 ? 13 : rlist - 3; + uint32_t stack_adj_base =3D ROUND_UP(regs << xlen_bytes_log2, 16); + return stack_adj_base + spimm; +} + +static uint32_t operand_zcmp_stack_adj(rv_inst inst, rv_isa isa) +{ + return calculate_stack_adj(isa, operand_zcmp_rlist(inst), + operand_zcmp_spimm(inst)); +} + +static uint32_t operand_tbl_index(rv_inst inst) +{ + return extract32(inst, 2, 8); +} + +static uint32_t operand_lpl(rv_inst inst) +{ + return extract32(inst, 12, 20); +} + /* instruction metadata */ =20 const rv_opcode_data rvi_opcode_data[] =3D { @@ -4155,442 +4550,47 @@ static void decode_inst_opcode(rv_decode *dec, rv_= isa isa) case 2: op =3D rv_op_vaesem_vv; break; case 3: op =3D rv_op_vaesef_vv; break; case 16: op =3D rv_op_vsm4r_vv; break; - case 17: op =3D rv_op_vgmul_vv; break; - } - break; - case 41: - switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_vaesdm_vs; break; - case 1: op =3D rv_op_vaesdf_vs; break; - case 2: op =3D rv_op_vaesem_vs; break; - case 3: op =3D rv_op_vaesef_vs; break; - case 7: op =3D rv_op_vaesz_vs; break; - case 16: op =3D rv_op_vsm4r_vs; break; - } - break; - case 42: op =3D rv_op_vaeskf2_vi; break; - case 43: op =3D rv_op_vsm3c_vi; break; - case 44: op =3D rv_op_vghsh_vv; break; - case 45: op =3D rv_op_vsha2ms_vv; break; - case 46: op =3D rv_op_vsha2ch_vv; break; - case 47: op =3D rv_op_vsha2cl_vv; break; - } - } - break; - case 30: - switch (((inst >> 22) & 0b1111111000) | - ((inst >> 12) & 0b0000000111)) { - case 0: op =3D rv_op_addd; break; - case 1: op =3D rv_op_slld; break; - case 5: op =3D rv_op_srld; break; - case 8: op =3D rv_op_muld; break; - case 12: op =3D rv_op_divd; break; - case 13: op =3D rv_op_divud; break; - case 14: op =3D rv_op_remd; break; - case 15: op =3D rv_op_remud; break; - case 256: op =3D rv_op_subd; break; - case 261: op =3D rv_op_srad; break; - } - break; - } - break; - } - dec->op =3D op; -} - -/* operand extractors */ - -static uint32_t operand_rd(rv_inst inst) -{ - return extract32(inst, 7, 5); -} - -static uint32_t operand_rs1(rv_inst inst) -{ - return extract32(inst, 15, 5); -} - -static uint32_t operand_rs2(rv_inst inst) -{ - return extract32(inst, 20, 5); -} - -static uint32_t operand_rs3(rv_inst inst) -{ - return extract32(inst, 27, 5); -} - -static uint32_t operand_aq(rv_inst inst) -{ - return extract32(inst, 26, 1); -} - -static uint32_t operand_rl(rv_inst inst) -{ - return extract32(inst, 25, 1); -} - -static uint32_t operand_pred(rv_inst inst) -{ - return extract32(inst, 24, 4); -} - -static uint32_t operand_succ(rv_inst inst) -{ - return extract32(inst, 20, 4); -} - -static uint32_t operand_rm(rv_inst inst) -{ - return extract32(inst, 12, 3); -} - -static uint32_t operand_shamt5(rv_inst inst) -{ - return extract32(inst, 20, 5); -} - -static uint32_t operand_shamt6(rv_inst inst) -{ - return extract32(inst, 20, 6); -} - -static uint32_t operand_shamt7(rv_inst inst) -{ - return extract32(inst, 20, 7); -} - -static uint32_t operand_crdq(rv_inst inst) -{ - return extract32(inst, 2, 3); -} - -static uint32_t operand_crs1q(rv_inst inst) -{ - return extract32(inst, 7, 3); -} - -static uint32_t operand_crs1rdq(rv_inst inst) -{ - return extract32(inst, 7, 3); -} - -static uint32_t operand_crs2q(rv_inst inst) -{ - return extract32(inst, 2, 3); -} - -static uint32_t calculate_xreg(uint32_t sreg) -{ - return sreg < 2 ? sreg + 8 : sreg + 16; -} - -static uint32_t operand_sreg1(rv_inst inst) -{ - return calculate_xreg(extract32(inst, 7, 3)); -} - -static uint32_t operand_sreg2(rv_inst inst) -{ - return calculate_xreg(extract32(inst, 2, 3)); -} - -static uint32_t operand_crd(rv_inst inst) -{ - return extract32(inst, 7, 5); -} - -static uint32_t operand_crs1(rv_inst inst) -{ - return extract32(inst, 7, 5); -} - -static uint32_t operand_crs1rd(rv_inst inst) -{ - return extract32(inst, 7, 5); -} - -static uint32_t operand_crs2(rv_inst inst) -{ - return extract32(inst, 2, 5); -} - -static uint32_t operand_cimmsh5(rv_inst inst) -{ - return extract32(inst, 2, 5); -} - -static uint32_t operand_csr12(rv_inst inst) -{ - return extract32(inst, 20, 12); -} - -static int32_t operand_imm12(rv_inst inst) -{ - return sextract32(inst, 20, 12); -} - -static int32_t operand_imm20(rv_inst inst) -{ - return sextract32(inst, 12, 20) << 12; -} - -static int32_t operand_jimm20(rv_inst inst) -{ - return sextract32(inst, 31, 1) << 20 | - extract32(inst, 21, 10) << 1 | - extract32(inst, 20, 1) << 11 | - extract32(inst, 12, 8) << 12; -} - -static int32_t operand_simm12(rv_inst inst) -{ - return sextract32(inst, 25, 7) << 5 | - extract32(inst, 7, 5); -} - -static int32_t operand_sbimm12(rv_inst inst) -{ - return sextract32(inst, 31, 1) << 12 | - extract32(inst, 25, 6) << 5 | - extract32(inst, 8, 4) << 1 | - extract32(inst, 7, 1) << 11; -} - -static uint32_t operand_cimmshl6(rv_inst inst, rv_isa isa) -{ - int imm =3D extract32(inst, 12, 1) << 5 | - extract32(inst, 2, 5); - if (isa =3D=3D rv128) { - imm =3D imm ? imm : 64; - } - return imm; -} - -static uint32_t operand_cimmshr6(rv_inst inst, rv_isa isa) -{ - int imm =3D extract32(inst, 12, 1) << 5 | - extract32(inst, 2, 5); - if (isa =3D=3D rv128) { - imm =3D imm | (imm & 32) << 1; - imm =3D imm ? imm : 64; + case 17: op =3D rv_op_vgmul_vv; break; + } + break; + case 41: + switch ((inst >> 15) & 0b11111) { + case 0: op =3D rv_op_vaesdm_vs; break; + case 1: op =3D rv_op_vaesdf_vs; break; + case 2: op =3D rv_op_vaesem_vs; break; + case 3: op =3D rv_op_vaesef_vs; break; + case 7: op =3D rv_op_vaesz_vs; break; + case 16: op =3D rv_op_vsm4r_vs; break; + } + break; + case 42: op =3D rv_op_vaeskf2_vi; break; + case 43: op =3D rv_op_vsm3c_vi; break; + case 44: op =3D rv_op_vghsh_vv; break; + case 45: op =3D rv_op_vsha2ms_vv; break; + case 46: op =3D rv_op_vsha2ch_vv; break; + case 47: op =3D rv_op_vsha2cl_vv; break; + } + } + break; + case 30: + switch (((inst >> 22) & 0b1111111000) | + ((inst >> 12) & 0b0000000111)) { + case 0: op =3D rv_op_addd; break; + case 1: op =3D rv_op_slld; break; + case 5: op =3D rv_op_srld; break; + case 8: op =3D rv_op_muld; break; + case 12: op =3D rv_op_divd; break; + case 13: op =3D rv_op_divud; break; + case 14: op =3D rv_op_remd; break; + case 15: op =3D rv_op_remud; break; + case 256: op =3D rv_op_subd; break; + case 261: op =3D rv_op_srad; break; + } + break; + } + break; } - return imm; -} - -static int32_t operand_cimmi(rv_inst inst) -{ - return sextract32(inst, 12, 1) << 5 | - extract32(inst, 2, 5); -} - -static int32_t operand_cimmui(rv_inst inst) -{ - return sextract32(inst, 12, 1) << 17 | - extract32(inst, 2, 5) << 12; -} - -static uint32_t operand_cimmlwsp(rv_inst inst) -{ - return extract32(inst, 12, 1) << 5 | - extract32(inst, 4, 3) << 2 | - extract32(inst, 2, 2) << 6; -} - -static uint32_t operand_cimmldsp(rv_inst inst) -{ - return extract32(inst, 12, 1) << 5 | - extract32(inst, 5, 2) << 3 | - extract32(inst, 2, 3) << 6; -} - -static uint32_t operand_cimmlqsp(rv_inst inst) -{ - return extract32(inst, 12, 1) << 5 | - extract32(inst, 6, 1) << 4 | - extract32(inst, 2, 4) << 6; -} - -static int32_t operand_cimm16sp(rv_inst inst) -{ - return sextract32(inst, 12, 1) << 9 | - extract32(inst, 6, 1) << 4 | - extract32(inst, 5, 1) << 6 | - extract32(inst, 3, 2) << 7 | - extract32(inst, 2, 1) << 5; -} - -static int32_t operand_cimmj(rv_inst inst) -{ - return sextract32(inst, 12, 1) << 11 | - extract32(inst, 11, 1) << 4 | - extract32(inst, 9, 2) << 8 | - extract32(inst, 8, 1) << 10 | - extract32(inst, 7, 1) << 6 | - extract32(inst, 6, 1) << 7 | - extract32(inst, 3, 3) << 1 | - extract32(inst, 2, 1) << 5; -} - -static int32_t operand_cimmb(rv_inst inst) -{ - return sextract32(inst, 12, 1) << 8 | - extract32(inst, 10, 2) << 3 | - extract32(inst, 5, 2) << 6 | - extract32(inst, 3, 2) << 1 | - extract32(inst, 2, 1) << 5; -} - -static uint32_t operand_cimmswsp(rv_inst inst) -{ - return extract32(inst, 9, 4) << 2 | - extract32(inst, 7, 2) << 6; -} - -static uint32_t operand_cimmsdsp(rv_inst inst) -{ - return extract32(inst, 10, 3) << 3 | - extract32(inst, 7, 3) << 6; -} - -static uint32_t operand_cimmsqsp(rv_inst inst) -{ - return extract32(inst, 11, 2) << 4 | - extract32(inst, 7, 4) << 6; -} - -static uint32_t operand_cimm4spn(rv_inst inst) -{ - return extract32(inst, 11, 2) << 4 | - extract32(inst, 7, 4) << 6 | - extract32(inst, 6, 1) << 2 | - extract32(inst, 5, 1) << 3; -} - -static uint32_t operand_cimmw(rv_inst inst) -{ - return extract32(inst, 10, 3) << 3 | - extract32(inst, 6, 1) << 2 | - extract32(inst, 5, 1) << 6; -} - -static uint32_t operand_cimmd(rv_inst inst) -{ - return extract32(inst, 10, 3) << 3 | - extract32(inst, 5, 2) << 6; -} - -static uint32_t operand_cimmq(rv_inst inst) -{ - return extract32(inst, 11, 2) << 4 | - extract32(inst, 10, 1) << 8 | - extract32(inst, 5, 2) << 6; -} - -static int32_t operand_vimm(rv_inst inst) -{ - return sextract32(inst, 15, 5); -} - -static uint32_t operand_vuimm(rv_inst inst) -{ - return extract32(inst, 15, 5); -} - -static uint32_t operand_vzimm11(rv_inst inst) -{ - return extract32(inst, 20, 11); -} - -static uint32_t operand_vzimm10(rv_inst inst) -{ - return extract32(inst, 20, 10); -} - -static uint32_t operand_vzimm6(rv_inst inst) -{ - return extract32(inst, 26, 1) << 5 | - extract32(inst, 15, 5); -} - -static uint32_t operand_bs(rv_inst inst) -{ - return extract32(inst, 30, 2); -} - -static uint32_t operand_rnum(rv_inst inst) -{ - return extract32(inst, 20, 4); -} - -static uint32_t operand_vm(rv_inst inst) -{ - return extract32(inst, 25, 1); -} - -static uint32_t operand_uimm_c_lb(rv_inst inst) -{ - return extract32(inst, 5, 1) << 1 | - extract32(inst, 6, 1); -} - -static uint32_t operand_uimm_c_lh(rv_inst inst) -{ - return extract32(inst, 5, 1) << 1; -} - -static uint32_t operand_zcmp_spimm(rv_inst inst) -{ - return extract32(inst, 2, 2) << 4; -} - -static uint32_t operand_zcmp_rlist(rv_inst inst) -{ - return extract32(inst, 4, 4); -} - -static uint32_t operand_imm6(rv_inst inst) -{ - return extract32(inst, 20, 6); -} - -static uint32_t operand_imm2(rv_inst inst) -{ - return extract32(inst, 25, 2); -} - -static uint32_t operand_immh(rv_inst inst) -{ - return extract32(inst, 26, 6); -} - -static uint32_t operand_imml(rv_inst inst) -{ - return extract32(inst, 20, 6); -} - -static uint32_t calculate_stack_adj(rv_isa isa, uint32_t rlist, uint32_t s= pimm) -{ - int xlen_bytes_log2 =3D isa =3D=3D rv64 ? 3 : 2; - int regs =3D rlist =3D=3D 15 ? 13 : rlist - 3; - uint32_t stack_adj_base =3D ROUND_UP(regs << xlen_bytes_log2, 16); - return stack_adj_base + spimm; -} - -static uint32_t operand_zcmp_stack_adj(rv_inst inst, rv_isa isa) -{ - return calculate_stack_adj(isa, operand_zcmp_rlist(inst), - operand_zcmp_spimm(inst)); -} - -static uint32_t operand_tbl_index(rv_inst inst) -{ - return extract32(inst, 2, 8); -} - -static uint32_t operand_lpl(rv_inst inst) -{ - return extract32(inst, 12, 20); + dec->op =3D op; } =20 /* decode operands */ --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198497; cv=none; d=zohomail.com; s=zohoarc; b=KDnZ3IjZtl57Nei7xGfpDoTYa+PdteGSSDDylSqaGGx4T6ZBxr+bw4vJILE8mn0b3xM5nzx6QfX2vhbRJ5zcB8/Wz0FUgVsofn6bfUBf8WBtCuNOPW6nYFsQpbVvxml+c/uuZ29IvB5o2zMlj97PloojiOYw42PFqSQ0TsBn2/o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198497; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qpYDuVLamBiG/Q1V6ktBM2fQXQo2lFRXtyDFj85aeY4=; b=M4J4ktqCIzMZLIxQNhHnRIbjCIZL8L3huT816xOBnLHiKAQcWPX8Zk28/4hFB+5z3IUYw6dA6eolPZXspxbSuKGuzgL9/ibQSZowZCD/bZbkjJ/WKkD2Bo2cZHo3Kdjwp4wQbAGGDapKP8OsdzaXiTdRvk+b+iJZvR/RjUsli0A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198497877156.91094964130082; Wed, 19 Aug 2026 21:01:37 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjn-0001kj-FX; Wed, 19 Aug 2026 23:46:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjl-0001cV-1v for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:41 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjj-00045J-H5 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:40 -0400 Received: by mail-pj1-x1034.google.com with SMTP id 98e67ed59e1d1-38101f85591so406959a91.1 for ; Wed, 19 Aug 2026 20:46:39 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197598; x=1787802398; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=qpYDuVLamBiG/Q1V6ktBM2fQXQo2lFRXtyDFj85aeY4=; b=pG1B9OSch9F0d/jYbPID1z2OrZn1K2no6m6wabHhgmujkJK6JJ2a2DeXoBWdmIy9P7 R8uYrhL+wWAaeaPyPHlEZUmisq8NNjKU61/FeGXqwjumwX76fCL8jG015ysK2nJBMjU6 S4IrKTxNyWLPaX3IHw7GF7Sa3UX6Z0kNIemr5yXILo2oCMGd+pSdFmgFNFu2m8W0zNlt PmnQqZo8XluuT46SZSrU7naLnO0O7PzWUlmDyfSBIHLBKfJuixftlVvk7wDksi5wJPzH v8f9340eFxm+2OscOJkPDHaD1dka30twC6PGKpLFlmGs/ZXoZUFsGqgM2Zc7HVRhvAVk 5haw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197598; x=1787802398; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=qpYDuVLamBiG/Q1V6ktBM2fQXQo2lFRXtyDFj85aeY4=; b=P4OFMafIh5Bc+gWPqJ6VpYXre+95olQ8L/Fh+PjEuhgNUqDPr03bq6oPmB0Zn0ZgzD jdGMFpJM2EuTwcXsCtT0uDOzlo8CrTJQMSfOsZC6P+59qlBjQVWnbUMkFcXEzp+zG/+0 jTQIrsCQnMp2NMOhKp6xhp0duP3P0gltezJrlLhHjzL0DRXxhMD+oNgMn9levqyPDdjr HTiZCuR5oxJUFX3fuK/1W8SPF/YRdPVD0ctdG/v8RlIlXZ37SrR2/uFREcp65JnnvLz6 cS9DzWpMWx7kVMQbhzPEbhKn3SRfyX+HXLy1rrSDSDl+wSCAIORE9OKXPj0tmGO2lKQf SoPw== X-Gm-Message-State: AFuF++kNVqOi42uiJYF8AzM3I082Z3Trp7c25zc+8R7oejfxfz7xha7z GJnaJwhhti3WoTcTkrsUjAYjGeD9j66sKPtpCm/DcEazHFC5AYruJEm3ksWXNQ== X-Gm-Gg: AR+sD132Fg0UWmGsNgpJOUfyy5dyenLoEj2mm7wNS+lKrHgdvLLbjv9KsfIAwm6RZsn yYxPlCevmYbv3mX5hnkajYRaLMPIGwZ+33r29kqBrhfvFooiVS0Ea8BJFLfWJHcQF9Xdv1U3X01 jYdVdYsGg7DtEts924ZbgySpbtEr63dYYzrHVhXt5cJUUEbYwcW0S77Y8PJqDRZdsgiiHM79rnN PHEqlAv8JNxVwYWuTbBpkvQyn8daLCZo/V1KOJUhfgBiD3AiXhWRWDcasdfLmG3Y7eBgery8UFf twP5DEImbRFEMLHfIFiQ690m+cU8OsI7pyoV3KjuD4r1zouq0FvBBGZOQ9myV3OIIII7fWZLZmg /UaVLk+W48E88YZe34AVN9rrviLD/D3VsqDuKUBobyUda7jlXjWapZvRNZZYo7JjG0XYyRCQUOy 3dG+xs07cCqqt5nHF/WOYlziKsWq62naF6xt+0am9jxWuJ4jDm6XunEdgptYWX9h88Tk8+GcE4j 5p0Tot3aIMRCEfC X-Received: by 2002:a17:90b:3bcc:b0:37f:a913:1554 with SMTP id 98e67ed59e1d1-395a06bc47amr4469463a91.16.1787197598057; Wed, 19 Aug 2026 20:46:38 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 38/93] disas/riscv: Reduce rv_insn to uint32_t Date: Thu, 20 Aug 2026 13:43:35 +1000 Message-ID: <20260820034430.1186695-39-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198499179158500 From: Richard Henderson Since 758dce9c98a, the only possible values for instruction length are 2 and 4. Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-3-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 2 +- disas/riscv.c | 12 +++--------- 2 files changed, 4 insertions(+), 10 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 91ada8b531..eabe193b4f 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -11,7 +11,7 @@ =20 /* types */ =20 -typedef uint64_t rv_inst; +typedef uint32_t rv_inst; typedef uint16_t rv_opcode; =20 /* enums */ diff --git a/disas/riscv.c b/disas/riscv.c index e3fbc26626..012f90fce6 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5491,10 +5491,8 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc,= rv_inst inst, return format_inst(24, &dec); } =20 -#define INST_FMT_2 "%04" PRIx64 " " -#define INST_FMT_4 "%08" PRIx64 " " -#define INST_FMT_6 "%012" PRIx64 " " -#define INST_FMT_8 "%016" PRIx64 " " +#define INST_FMT_2 "%04x " +#define INST_FMT_4 "%08x " =20 static int print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa is= a) @@ -5530,12 +5528,8 @@ print_insn_riscv(bfd_vma memaddr, struct disassemble= _info *info, rv_isa isa) case 4: (*info->fprintf_func)(info->stream, INST_FMT_4, inst); break; - case 6: - (*info->fprintf_func)(info->stream, INST_FMT_6, inst); - break; default: - (*info->fprintf_func)(info->stream, INST_FMT_8, inst); - break; + g_assert_not_reached(); } } =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198497; cv=none; d=zohomail.com; s=zohoarc; b=gdRBXPD0A/0KieM82/Sa4L7fsv/sizhoOwCPNqecbiQk/5f6vl7J4S3QQRuXCxXR9tOrBiWGh3yKBEjneI22+rrqS5vDSAfGL8PzCrOfklNMRlUpkeA1bt0H7fJfspXc2obq2djY+PREL9vnLAa0rQiu6NWsL1XN2ZyWXn36eHM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198497; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2/TGr75vkp0br2SHR4F1+UQxBkhDhZrz6IHZEj1QXJE=; b=oK1TGQnEcwmvUtxukBxqdDBkz7oQi+vSaOYPdmIQYAFy25RuOUdlp7314H+vkPNWIkjltmxPuHnLW2MyixNfzRol2lC2gEUfT/viBrZUmozO51APBmIn/KhQs5QEi+SoboNtAQMfzlF3xjjB1qBadviyMWa7UXTfk+WRD43XRUo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198497717240.84955525818975; Wed, 19 Aug 2026 21:01:37 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjs-0001xk-51; Wed, 19 Aug 2026 23:46:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjn-0001mD-SS for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:43 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjm-00045l-E5 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:43 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-38511175ad3so1645756a91.2 for ; Wed, 19 Aug 2026 20:46:42 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197601; x=1787802401; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=2/TGr75vkp0br2SHR4F1+UQxBkhDhZrz6IHZEj1QXJE=; b=YdJ4ABe2hYfvrnw7kCYEj49Aos3vlA4+nUXKRnMmU00oAJMOFZ+kPCFdUKFYDMWsr+ CtLuPF4whgr0G9WmmTU5EKm44P0bKxIY/1PfVuYW1WtkI6ExYg68D11fkjkVOjqcv+4h eWhRYxRdrjbfBSgh4GVG444gXrTYa/C9WdssZURIcxAT9t/DTCKCUYifEm0VtruLK9iW I1KLMkh5E/R2sXDdT2ihzc8VgOvPXFACuCTYVvpD/GzXm7/hlUu89o8rLUFrIT7na+AY ekAHbDWRKGK2XI2xTp915l6TMB6xKMpIdPnRXeyWwG5VfeYTd3wGcvPkdwEcY2S77BQv 1o3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197601; x=1787802401; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=2/TGr75vkp0br2SHR4F1+UQxBkhDhZrz6IHZEj1QXJE=; b=qR9PdhWvF2etzX/r58uAQ+g4gVGt634K5Na15e7UKVVkQljakKXbgjkFys6G6nyZcJ Jx8qmQ5FFIulX8yqXqAw5Dy/eZzp+XJa8FoQYlEKu3cti/T47J4S4rpt0w+C+TXhQPBi eJXBSDR+pOHt7UKMSNfQNXOfU+zjPz5i8u5e7BCRxVAfJPB1MguM0tCDii0oNEYsCVV4 T3XEJNQp1Uo4wXmmOvgusXnZPF04v9YlQHJTfgNdn5VGG8H3j9f3u4usG3g2ol8ITkYL atI6ODuPoacMsd8egxGHdHNQK3p2NX6upAuHH6h/3f7jG+yC+RKouFp0jDMjI4iF/6rR W8eQ== X-Gm-Message-State: AFuF++nuj97ofobCbLrjzTmc6iwcjnt8fORcXkj2yNyF8xgsASLAudpD TbsKafHxyfZoU+1XyOJhL1xfthqX/G6paTaoLfathj7kBckLk1iwUgZ9yOeFKw== X-Gm-Gg: AR+sD12qRyFAegVXC0vGSotVmMnjKCqWxmiREqhbUCER5qn7RlJ/nn75T6sZvjHRqRt 9Pu3qHhZ5Hx3fEGH3hCUGUFxFQ6XGnwH++5FQNj5Ddc/yXXgfQtfFuw5vAuL7z4O+TRFBvYlvyO jKJaj3/ISVN3Sg1OQb+WJO4ldxk+L0OKM6WVnSBWq6x6ZJKlaLIpocJkyv6Myu0qVe0P1e0m1qf c6QDJ8R8ETdTqlS3+DUqoykiLijFg31gwRi1N7aq//3HX6yBhWrVoJb49WTV23L2jiw5bC7J6C+ jvHGSkksNBl+El52lWn014hx+kdtgV2yvMNORnANFT0s1JpS7vExyqner+XTjgZfS+xopsYRQ3x CDjhND9ic2F5iRmeG0TwCV2kKPjYl3S2NMAqB7a4eoN1roW5uDUfD9W6s/SjoN3rEEbreGG6FeY 4FeeYMRR4oAmuPHE0gYH8URCsbnhdvrFNJiLGP4S+AIgJl+Q5LDqtpL1/hE4B2FFJs7TC7zyq8p w3jpw== X-Received: by 2002:a17:90b:1f82:b0:38e:2524:724f with SMTP id 98e67ed59e1d1-3958108a4c6mr17821854a91.12.1787197601157; Wed, 19 Aug 2026 20:46:41 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 39/93] disas/riscv: Tidy dec initialization in disasm_inst Date: Thu, 20 Aug 2026 13:43:36 +1000 Message-ID: <20260820034430.1186695-40-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198499153158500 From: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-4-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 012f90fce6..986dc6b752 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5441,10 +5441,11 @@ static void decode_inst_decompress(rv_decode *dec, = rv_isa isa) static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst, const RISCVCPUConfig *cfg) { - rv_decode dec =3D { 0 }; - dec.pc =3D pc; - dec.inst =3D inst; - dec.cfg =3D cfg; + rv_decode dec =3D { + .pc =3D pc, + .inst =3D inst, + .cfg =3D cfg, + }; =20 static const struct { bool (*guard_func)(const RISCVCPUConfig *); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198509; cv=none; d=zohomail.com; s=zohoarc; b=dIgo5Bl35xFsYz1AxDsjQ6M+IgvrpSI+67oTwtT0HFvybdSbdeUqFVuCfuH1kqRx9NN40sqrTq7+ch3zJuMFoWdOUtelXmjQik6E2dEFi49CzgC9zkzzGg+lEUUfYFekMkQ3A3gFWU8am01oBE2I4ldZbYeuHHbarjwbT9WAs5k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198509; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=AXSMuIYcdvTbWFw3R3IymTx+qxtp/rW/iojAskcb29A=; b=oCmPMGMvB8sXv35Z/I8ZlpXgYIf78tGUbWjpexwrahoI+rmPUddcGXTeBFNTwJBoNB+X4Cc+kIrSjmF5o5SGWssc4rPcKZqkTF0kYJFPXULSA9d8OFhjBjh/j06JgZQtANPoDe8vhQAhEcewwrrfGkP9X7GT7aD4jaEyqjzdXo4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198509077593.0228195756781; Wed, 19 Aug 2026 21:01:49 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjs-00020n-NC; Wed, 19 Aug 2026 23:46:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjq-0001rS-Mq for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:47 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjp-000463-43 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:46 -0400 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-382ef647e20so1758193a91.1 for ; Wed, 19 Aug 2026 20:46:44 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197604; x=1787802404; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=AXSMuIYcdvTbWFw3R3IymTx+qxtp/rW/iojAskcb29A=; b=eJdSQMS83c8mkJp/YL3m2yF1MGKbcXmF2TMhMxfd97MCmG1vEwvNFIeexioARoGpqD /8bcZJRwehKVqVFIMqz+6Jc/pyGKCpezIk9MUHFNkKCpVzy7b/FTwY+opNDCysHCIUR0 JQLWfxrjgt0O3O9EsID9QcIZz6lZKQHegf7P3mTiQLkFBCq2lmvtcJythdh57uDO3782 TD8LM/oCtn6xbfJhB5Eu04xMbzH/qvZBFbCPk7SoH6QDKcwyNl48ER9kWhkJtsYMZDCQ MS6tT72Bn899jVZp10Mce1fwAyef2qljg9BhZLucpdtYVbXeXFQ5j3n3eLiJWDuv0ch8 cCGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197604; x=1787802404; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=AXSMuIYcdvTbWFw3R3IymTx+qxtp/rW/iojAskcb29A=; b=lLoiJgSHqSdqJiwysBPef1pieK+/nQisQJS/M2291XK8WBQ7xNxyPdPG8+WLyHXrmG kuVRlvuwsU+fIkxxPbHmybYjPPJaS794JcYyihybf6Cbut3t0wgkARt+vJi2fMLeeePl Z4htJwVoeid5WFvbkDGJydUjQufD5HGopRNIVy8J5QggAtLF1wW0Y26b4Vq0seiS9shn GY2AiH6KMWRNX1D6FKOyFXIOe1Fs8wB75N7UGBXfNWcDhWcKJGvKBnB8lF8MykLquTFU NzeeK+6zoo59+/AkFXcOZ3AQuyF9e1AWOJmtpOX2/uCC1PURKWaBAXT6o5SlUzQxOdCl 8dkQ== X-Gm-Message-State: AFuF++mkChjUPzRkMo6C+k+4PJYSMNOZ3yTL2i9VZkSC+zocdN7vmJZI CmuxTgJfSJ6/NGZwJH3sCXgLodYrR5/GEUr5tC3LyHM4VPSDdTnDvX5QY6kYOQ== X-Gm-Gg: AR+sD11SfsXaP46iF5P8IexGFaJ8v9YQDQVrjacgwkwPuJ8NN+WYJpxCLfPOjYE2GaC ZSwPzf0nA3FI8Z9b7pPZf8wmsuLovnbY7KWKXnBQFq19TWIMumMQj0RmzM51jAFmGc+MF7znqWG 6uyIyc+ET1yEMcf8G9Xu4Hh8Pl7LADHEnlZhsPkhsc99IGmDhlJPj/Y+YnK38NPBwT76OqeZBFW qK7qqSAbj80Q09ueY+lDVbtsXKKHVp+sNA11ir73OQN+hAp447enjuNVoEtjq8V7qGTFpbPN7TX E7ptXimNzJyNsONWUqtRh7unkl0/mNixrxA/gJl2/t8yltjRCLDeO6kuu1Q3SxsoEjBRjaEV+sW GSusqzFsl+hmcxPdZWDT92l3hjiBptom2QrEbyY5lrH/8w0FcNP1BFuH6JBF2H53kDpgQOyj3VN w+f2Xsn3HiHDlXF6pUPkB6Kws5ajPKCBxYVvPLKi2y+rcIxqkRbRlUKhOBr9J4aYDY+VtGeAPxs PKkDg== X-Received: by 2002:a17:90b:544f:b0:38f:de97:b06 with SMTP id 98e67ed59e1d1-39580f0943emr19445423a91.5.1787197603809; Wed, 19 Aug 2026 20:46:43 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 40/93] disas/riscv: Pass rv_opcode_data pointer to decode_inst_operands Date: Thu, 20 Aug 2026 13:43:37 +1000 Message-ID: <20260820034430.1186695-41-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198511200158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-5-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 986dc6b752..af43940732 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -4595,11 +4595,12 @@ static void decode_inst_opcode(rv_decode *dec, rv_i= sa isa) =20 /* decode operands */ =20 -static void decode_inst_operands(rv_decode *dec, rv_isa isa) +static void decode_inst_operands(rv_decode *dec, rv_isa isa, + const rv_opcode_data *op) { - const rv_opcode_data *opcode_data =3D dec->opcode_data; rv_inst inst =3D dec->inst; - dec->codec =3D opcode_data[dec->op].codec; + + dec->codec =3D op->codec; switch (dec->codec) { case rv_codec_none: dec->rd =3D dec->rs1 =3D dec->rs2 =3D rv_ireg_zero; @@ -5468,6 +5469,8 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, { has_xlrbr_p, rv_xlrbr_opcode_data, decode_xlrbr }, }; =20 + const rv_opcode_data *op; + for (size_t i =3D 0; i < ARRAY_SIZE(decoders); i++) { bool (*guard_func)(const RISCVCPUConfig *) =3D decoders[i].guard_f= unc; const rv_opcode_data *opcode_data =3D decoders[i].opcode_data; @@ -5486,7 +5489,8 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, dec.opcode_data =3D rvi_opcode_data; } =20 - decode_inst_operands(&dec, isa); + op =3D &dec.opcode_data[dec.op]; + decode_inst_operands(&dec, isa, op); decode_inst_decompress(&dec, isa); decode_inst_lift_pseudo(&dec); return format_inst(24, &dec); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198339; cv=none; d=zohomail.com; s=zohoarc; b=jbce9HvjBJE+nHZZZsKS1qmaqh8A9XTBi9uMa73hgZXhLQWUptOB+gfDwdUDxEB55oZ9vysAOTaQmuP5Bo6rmteozvuP0ddQUtBnLW5sZonpmyQtnCDnauAt5FJ1KBEC2KXBrilR0ixL3M1//Ihpmis9gPfW8qre95RnBUwA8bI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198339; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=cjyHLAWuHJgJ/+lIjyXwN6xYrYB6otvsADCyVj8AJtU=; b=XDcO6hL5vCqcogPXuQ3ssT4NqsqC7xWUpx4PeqACWXgHRDawiH4xdASJL5fNgnfXsOdebBqddVNr29vp8oSuhFOUF0DezPy7dD1PBddVzMlXqV2/8+/fYFseOiUohPph+l/dqDw7nm1S5Bxt9uggTfTKNY9vrt/ROMh0/1ZuBMA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198339823560.9521246170248; Wed, 19 Aug 2026 20:58:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjv-0002Db-8l; Wed, 19 Aug 2026 23:46:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjt-00027F-UO for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:49 -0400 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjr-00046W-U8 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:49 -0400 Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-84e04df8c46so1709148b3a.2 for ; Wed, 19 Aug 2026 20:46:47 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197606; x=1787802406; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=cjyHLAWuHJgJ/+lIjyXwN6xYrYB6otvsADCyVj8AJtU=; b=ZVeatdPqflWZzDjScIfs+X5cQfemFnFL5YHF+Ase7KbLCCYnz64sj3Guo+JQMgZB6D j9URtZx5zYaXMKW3+89kurparuhbWPAoSfUpRf4SomAG7CqBFXUmXDD4FKBJHcSoqmHK SdNV3MmonGUP0OZ/CF4tuOQCiYBktNekEkQK6pHTcU2GVwlj3cg19Ny2eBo6iDqfE6TZ zB2TaTV5X5xad8gqLVSdLnB5DJGLVdakLOzi7gRErMKRS4LgGwhKVN+uUSAzeLxoU3dN dejjVEIJ/4WQhH+59zJm1N7b4GddPgqj5hRVU2MfztyA9CfB0IUQjV2crm9rEqHM2nqx v8Bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197606; x=1787802406; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=cjyHLAWuHJgJ/+lIjyXwN6xYrYB6otvsADCyVj8AJtU=; b=IRooPZL+xoAe5MeWmwxxnHSsGr3EbL/WepMEQ2AKULKoJCs1UE1c1SDiiilkht5cYV n99heSa+A9NK/s/XxgaxIrCrCvugY8a8Jb2Q4zGoZLZSjq3h8joYDGUkTw80QtWbgH9k dvJcvwn0ejxtv1hw4whbn/CwdP49/QuTKU0RvgHdpK3cNXLILlE92VtrT7ZIVDDUvANi yrZ6O2uwfoa3v9vrNaXcLQ/Ynz5OJl5J4mgfsBl9vjUHncI1+7r5gTtlX7MUVsaR20Ey Yc6RwZsvQOeZe3vlwGd855WU2kdMgxfrD+TPeSeh5+mbU01y+ozaRFXiZPdUGxQSvdkN Hr5g== X-Gm-Message-State: AOJu0YzYTWS7Js3BKT4kmwiYJGGa2fIFLsefB+cl2/SGC9uZNdYN2B/1 +gVasQPDcZdYZbHvJoma7GuUzwyNWCFYPNc+3e/tSdbJMN4HpRI58xzYWINCYw== X-Gm-Gg: AR+sD13YTV0fIIcWDfC+bcxP3j6ymt2CYFbj8uUNiMMynSFFkBhLt2+KFrCnnn1CzF9 4BEvpKli5LYOlaaKmFy8TqJQY3mmN0+poErRu+hV1f/hToD3sX/E6FiSVF7VVc7RCCi39j8Ykd4 CzHR0mz3fVq27xycHMYUQF+X6cJSTaiyBOleBh0IVmuPwQW0Nb//NeBVUdSqZo+GNrl35D7hTUW +yf+xDSMb7xczpCAZvbWfHOQGRCBP/UT8PM7xYRiv6lEFlTnq8MeWQY9+ebTiKhTgaXF/dc13gc xeP1pjAE2cEPAUcEFt7EakzqoVgQ+BAcFucM6rteRWgBSwuE5ne0FdJFcTSaDLtClFW8wDRh7le ryxT6l3D7pJYXBhm3mSE/XAUrtqD5UTPk6AgpkV52SzJxzS+u29rF+mORqf++sNBwuA8Tt1js9w LE8qlVShnTN/1hYr+RvgSPFuPx6d5dyZxT+a7ETs6i/pl5WxMK0RVfxwLaH8zbjLTV6ROWy4b8k a0hog== X-Received: by 2002:a05:6a21:748e:b0:3c4:1493:6822 with SMTP id adf61e73a8af0-3cd0127962amr20225420637.18.1787197606396; Wed, 19 Aug 2026 20:46:46 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 41/93] disas/riscv: Pass rv_opcode_data pointer to/from decode_inst_decompress Date: Thu, 20 Aug 2026 13:43:38 +1000 Message-ID: <20260820034430.1186695-42-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=alistair23@gmail.com; helo=mail-pf1-x431.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198340456158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Unify 4 functions, sharing code. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-6-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 70 ++++++++++++++++----------------------------------- 1 file changed, 21 insertions(+), 49 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index af43940732..47fae7316c 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5377,64 +5377,36 @@ static void decode_inst_lift_pseudo(rv_decode *dec) =20 /* decompress instruction */ =20 -static void decode_inst_decompress_rv32(rv_decode *dec) +static const rv_opcode_data *decode_inst_decompress(rv_decode *dec, rv_isa= isa, + const rv_opcode_data *= op) { - const rv_opcode_data *opcode_data =3D dec->opcode_data; - int decomp_op =3D opcode_data[dec->op].decomp_rv32; - if (decomp_op !=3D rv_op_illegal) { - if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) - && dec->imm =3D=3D 0) { - dec->op =3D rv_op_illegal; - } else { - dec->op =3D decomp_op; - dec->codec =3D opcode_data[decomp_op].codec; - } - } -} - -static void decode_inst_decompress_rv64(rv_decode *dec) -{ - const rv_opcode_data *opcode_data =3D dec->opcode_data; - int decomp_op =3D opcode_data[dec->op].decomp_rv64; - if (decomp_op !=3D rv_op_illegal) { - if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) - && dec->imm =3D=3D 0) { - dec->op =3D rv_op_illegal; - } else { - dec->op =3D decomp_op; - dec->codec =3D opcode_data[decomp_op].codec; - } - } -} + int decomp_op; =20 -static void decode_inst_decompress_rv128(rv_decode *dec) -{ - const rv_opcode_data *opcode_data =3D dec->opcode_data; - int decomp_op =3D opcode_data[dec->op].decomp_rv128; - if (decomp_op !=3D rv_op_illegal) { - if ((opcode_data[dec->op].decomp_data & rvcd_imm_nz) - && dec->imm =3D=3D 0) { - dec->op =3D rv_op_illegal; - } else { - dec->op =3D decomp_op; - dec->codec =3D opcode_data[decomp_op].codec; - } - } -} - -static void decode_inst_decompress(rv_decode *dec, rv_isa isa) -{ switch (isa) { case rv32: - decode_inst_decompress_rv32(dec); + decomp_op =3D op->decomp_rv32; break; case rv64: - decode_inst_decompress_rv64(dec); + decomp_op =3D op->decomp_rv64; break; case rv128: - decode_inst_decompress_rv128(dec); + decomp_op =3D op->decomp_rv128; break; + default: + g_assert_not_reached(); + } + + if (decomp_op !=3D rv_op_illegal) { + if ((op->decomp_data & rvcd_imm_nz) && dec->imm =3D=3D 0) { + dec->opcode_data =3D rvi_opcode_data; + dec->op =3D rv_op_illegal; + } else { + dec->op =3D decomp_op; + } + op =3D &dec->opcode_data[decomp_op]; + dec->codec =3D op->codec; } + return op; } =20 /* disassemble instruction */ @@ -5491,7 +5463,7 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, =20 op =3D &dec.opcode_data[dec.op]; decode_inst_operands(&dec, isa, op); - decode_inst_decompress(&dec, isa); + op =3D decode_inst_decompress(&dec, isa, op); decode_inst_lift_pseudo(&dec); return format_inst(24, &dec); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198239; cv=none; d=zohomail.com; s=zohoarc; b=N+CguZ8xMuNrqSuJnIv7+LOx7TeqiAGT6yNPXc8ENDS80xdR+yAncxa9D8iFUI4RNXxJMrCSfZvqrgvi5KaL3MvsPQeutorYGguZXS2tYxZI3CEcV2yd0XY95td+e5/5ZLfwM1MWqTIMXddhLejwSgM+tNTXqhb+fSdppgBIAxs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198239; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WGgzdLMhBzqqG5u7HPy4pNvhAXusg8bxQ2Tn3SIcnEE=; b=n/DUDv95n7/cJs1XT43kveeGdhEflaGaqa573Y0fiAc0g+nUpcq9a0rINqDj1j47suCsXNZuEFDlvJSzwGr5QJ02W96wVxkCqRKxsq7JW5TwFr7/q9cmp0xObPZi8HtmfrrgSPatJdSwuXZPBt3pMw8zfJIlVyvr/hf3cQ2Unkc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198239296937.9521639480205; Wed, 19 Aug 2026 20:57:19 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtjx-0002LN-De; Wed, 19 Aug 2026 23:46:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjw-0002Gz-19 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:52 -0400 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtju-00046l-HZ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:51 -0400 Received: by mail-pg1-x530.google.com with SMTP id 41be03b00d2f7-cc1469c1b83so1787362a12.1 for ; Wed, 19 Aug 2026 20:46:50 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197609; x=1787802409; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=WGgzdLMhBzqqG5u7HPy4pNvhAXusg8bxQ2Tn3SIcnEE=; b=asQ9m269yWHw5ENOzOsReFq9VSGuDh3zVbfAXx/JmbWb6peTnqaEGLQw6gLyEhKWYD MJy8JfUWB1NCVuqWJamkSdPb1WQG5PtOmpt1G+vA9BpUAVhhrm+vOfOjsDZq1Y6RrnA+ zcMerWuGDtsdMw1vs3lAmTen/T1PIENuoKDUIGNMk/9pF5lXkBYkdyGcfoLPzVYRi9pW 3Dy0rw9DOvIqIPNOog5fhPtVGOyzwpj0C/bcWpSOzyOuXMuJ878z8AMnXKdSR4ntNBiH 4kYcdbbWvgUKvw1DRocjORQ0dGYhvi9r9cs1cX3+zMP2rWxwLTRMu9SGg1+dbL4iSH4z Kcpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197609; x=1787802409; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=WGgzdLMhBzqqG5u7HPy4pNvhAXusg8bxQ2Tn3SIcnEE=; b=EM/FRMYcCGyd1sJje0nZxDVK1gHyhSirpUMkGiSJx83uSllqXo0Co3rlnkqgHHL58j Kz+ICHWcfbY+R+zBXGYliDOtACSp59mpknuQdVbdVCKr/lcdLzBv5As/JjIJ338okI6w ljSnE2nQJ6Doks/wfuufj1U5SK2TZpbk44CKr5pDJsbEo/GJyJMpceWXZSFaIfTxLAYW Uk7Op/PuJlUaQXDZKikdV8eZXtBeVGWSqKOvqenXlKagua7zl7W6VHHonYUOONh6Wwck im9wi5ZK2xLhuckEM1zJ3vvVTywgY2p1QlpPXaRcxGYg3c7ZSyh4u6aSTLUVm7P1QZLG ENqA== X-Gm-Message-State: AOJu0YyRF1CwOihkBXDeW7Xwfff24dVhVGH5S56U7BYXFUzK2dUKAav4 AASzTs8XidFVl+3TKotxLFRnWhcLPp/C9POj+R9iGpSgzsVaGLNep/7vjw9DSw== X-Gm-Gg: AR+sD1063dYtf48/25UMlXiW/Uc7nl/SEyY2WI9/GGrrcEiQsoVrqyDscTY4an9JkX7 EuQnmJU3AuRDN3gq7MsAfKKpGH1HhwTeKqJyOqAX+l9w2/BSD09Pec3bLlrewde1KHnAWbKvvg4 YjeeW/ypC3a4Mkxmdk/jBD1B31+fzr+hBdj9xMGKcZWQR7zOjDebXFJUxMqqL793pKfhy9kC46Y Y0lm39sEnR0ma+gw4mou8GTrF+3Sg+ceigy9ocEbc9qmE5xXHxGsPXDXFsCMm3Rl05ndM6Lb1mL adB8TyM9snZrVkN5fECG9ddyJKGsh8oabqsezZ/xSXBNXkga6k07UAezJlANdc/Jv6bQMBmvUN3 w1ssw9gB1VPDh2okpWS1CSXQsNyDsfHkNm1CqSS1+yuaPk13n/6ugzU7JY3Wnk55SuN2LpwxA7u 27bw579CUqnJvrcb6RxUcNNaiaOgcj5XT/IQ0xiyc3I2z1EJbJpOIlN56iBwmG+mJe/ss+fMCOO fcdew== X-Received: by 2002:a05:6a20:2446:b0:3cc:22bb:8911 with SMTP id adf61e73a8af0-3cd00e65097mr16039277637.6.1787197608997; Wed, 19 Aug 2026 20:46:48 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 42/93] disas/riscv: Pass rv_opcode_data pointer to/from decode_inst_lift_pseudo Date: Thu, 20 Aug 2026 13:43:39 +1000 Message-ID: <20260820034430.1186695-43-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=alistair23@gmail.com; helo=mail-pg1-x530.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198240222158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-7-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 47fae7316c..0be2f07612 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5358,21 +5358,22 @@ static GString *format_inst(size_t tab, rv_decode *= dec) =20 /* lift instruction to pseudo-instruction */ =20 -static void decode_inst_lift_pseudo(rv_decode *dec) +static const rv_opcode_data *decode_inst_lift_pseudo(rv_decode *dec, + const rv_opcode_data = *op) { - const rv_opcode_data *opcode_data =3D dec->opcode_data; - const rv_comp_data *comp_data =3D opcode_data[dec->op].pseudo; - if (!comp_data) { - return; - } - while (comp_data->constraints) { - if (check_constraints(dec, comp_data->constraints)) { - dec->op =3D comp_data->op; - dec->codec =3D opcode_data[dec->op].codec; - return; + const rv_comp_data *comp_data =3D op->pseudo; + if (comp_data) { + while (comp_data->constraints) { + if (check_constraints(dec, comp_data->constraints)) { + dec->op =3D comp_data->op; + op =3D &dec->opcode_data[dec->op]; + dec->codec =3D op->codec; + break; + } + comp_data++; } - comp_data++; } + return op; } =20 /* decompress instruction */ @@ -5464,7 +5465,7 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, op =3D &dec.opcode_data[dec.op]; decode_inst_operands(&dec, isa, op); op =3D decode_inst_decompress(&dec, isa, op); - decode_inst_lift_pseudo(&dec); + op =3D decode_inst_lift_pseudo(&dec, op); return format_inst(24, &dec); } =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198268; cv=none; d=zohomail.com; s=zohoarc; b=Vs9viObPUr/E0cPXMUKKHFHbwcCmqsXtGj8pgg2TliLGrOD9YKgTXuJHuHa9ilnDW7eRNxw3Ynqx6UIK66vY3eV1EW/dUWs4Fokgylm9KEdlNgZuBFC4jh1CcUcX+e8XpB0q0Thm4rNlOj2u1U5ySjUorPvkLT0t7v1ZPJWJiDw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198268; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fQDgWJg7DF9eHEdRBw/5L4zK1k6fMkTJXubxOKeqz3Y=; b=kSqdwhb5pqb20ZGz0gurM5EJGBHkRN6YQeGnxro5/RVV8pZtYPd28eONQX1oKQiFM8ImEF+ZZZFCJ0m8jTa/KZ+ReKI9xky3XNFTA7nSV/WjXY5nIs+XCHCEFU2eBpNDPJGwykM5D2yTuwHBMq+ni7HPeK8WTExdhMIJKbdPRIE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198267808208.9959629278154; Wed, 19 Aug 2026 20:57:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtk0-0002TM-3n; Wed, 19 Aug 2026 23:46:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtjy-0002R0-OA for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:54 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjx-00047F-3L for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:54 -0400 Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-c9b373d5af0so1122024a12.2 for ; Wed, 19 Aug 2026 20:46:52 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197612; x=1787802412; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=fQDgWJg7DF9eHEdRBw/5L4zK1k6fMkTJXubxOKeqz3Y=; b=VKqKMb2TaFCG70GPcHb+VTp/sTFss25qiYRrBbGCstrV/Hdljtn0cewR75TcWVuvwx eDYgUmWwjAvyCsNWuhee47jTKWZPpOfmJhFHxCHMiayLve0CvqO7VOZYBhn/Zj5uC0tN dkOeoirYrxjmjcbF2Pu+3oCcn3KVn4aYlnrCv38aBxQOaS9VP4YnZmuWg8TbKXq7U2a0 hfhlG7ze8JXFPe6A715fIz6bLSN5H8xEWqGaoYJ+HSfqO0g6NiroYUIqkykLt5JyXroP FhdnQdRjuGuQPnXdyf1zXDflpxklXOAiMMrqlHRFcihmFUBVC6sS8kOe364zDUxpN1bw jgyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197612; x=1787802412; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=fQDgWJg7DF9eHEdRBw/5L4zK1k6fMkTJXubxOKeqz3Y=; b=YlqTxlMbCJatI8PTK555kL1D+YRlbEyaJBmFzh4ECv6zv3e5mdVyS3wKrkFpAZeeEr jRSMKX/yAGSzunM4uqIisoYlni5vS+R5Lh9dMHITcmYF5H/Yof4qR4MKqV37/uPXZPbx czZRLJj/SoBdfLzj+EAQaxWFQf3ej2RE8mOYv+9wjKG5xWp5Y/iW45+Tw0nE08hexiem ddoEFBCYbzC9L6rilXwm6v1dVK2vZZb7PPxj4yLVF5nQ6CS3Yqdn4+HUMmpytNZKgO9/ VC9pCSNspgN/k7h9KWBwqE1YPjgIWSqmGQHdVk7Kvd15igvIsnrAz6IXGy+gI6YXAFR+ LYbw== X-Gm-Message-State: AOJu0YzGxLgarsm9wA5KN/50xKow1C3d7mstiX1kr3CHi+gpmPowkIxe hhkNXGgv1YiC6860erEFaULo/LnUhCEPf1teB90KHLEJSr/a9Wn613a4WNP8pQ== X-Gm-Gg: AR+sD12yKCmTG0RjqHdO+NuJMl1i0dtASlfjVkBLtxOggKZQSdcXCgSMJPY9b2pXWoM BcBlXHN2xchkCz5GigYt3p1ttAyrwB8m4pfsphG0nRpDTakRfsfzHuUTc4b127P/3gV2k1HPCH4 eTWYo/c1xlmnanI1CRDZIA8CZA54rDCC4yOtSLTXqAibwvPQSKU2NWaEgl/fKmJH7HN9HHca9na iXxlDj869F21O1CfOBXCoNjwcOe6vsTvJZjVwvmt69RFZ7h/toiFejaVkP7QHyYWTGhe/OLnCO0 zdlJLzVhrhxsbf0ucyDO2cQ+pjGq5YPuv9QUes+wS+z2rClYLYschIQTWRFtgmfOU+E1v8m6KY7 m+Gm5TRTnB37JhmVP875xWh0BZce0mXX8SEqWGdwMlR/6/1IIekpJ9Ak09V2HCdRFndW0thui2k UV8EzwqV6o9FbLVmxlhqGBrsVIq+MsymhmQTComEPz+rTdyOo4QRNz2BLwq2iIFHnlyUINXSl7J 6DuMyVG2vZJ679TzPi9GzkB7i/0 X-Received: by 2002:a05:6a21:4cc2:b0:3cc:f008:8123 with SMTP id adf61e73a8af0-3cd010d38c4mr17724926637.8.1787197611580; Wed, 19 Aug 2026 20:46:51 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 43/93] disas/riscv: Pass rv_opcode_data pointer to format_inst Date: Thu, 20 Aug 2026 13:43:40 +1000 Message-ID: <20260820034430.1186695-44-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198268249158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-8-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 0be2f07612..70ea41f125 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5111,17 +5111,16 @@ static size_t inst_length(rv_inst inst) =20 /* format instruction */ =20 -static GString *format_inst(size_t tab, rv_decode *dec) +static GString *format_inst(size_t tab, rv_decode *dec, + const rv_opcode_data *op) { - const rv_opcode_data *opcode_data =3D dec->opcode_data; GString *buf =3D g_string_sized_new(64); - const char *fmt; + const char *fmt =3D op->format; =20 - fmt =3D opcode_data[dec->op].format; while (*fmt) { switch (*fmt) { case 'O': - g_string_append(buf, opcode_data[dec->op].name); + g_string_append(buf, op->name); break; case '(': case ',': @@ -5466,7 +5465,7 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, decode_inst_operands(&dec, isa, op); op =3D decode_inst_decompress(&dec, isa, op); op =3D decode_inst_lift_pseudo(&dec, op); - return format_inst(24, &dec); + return format_inst(24, &dec, op); } =20 #define INST_FMT_2 "%04x " --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197757; cv=none; d=zohomail.com; s=zohoarc; b=Nf8wwP/ytIUhMth9IbQzPpm0gUbbG2mi9D+9qBtQde+cA/NsR2S1itO0VeNCgRXACIMeuKCcneJ6YlnouU3tPSsq4LVlIqDGG79VSL/Szy+ygTrthwbRuxf7YNRCZskdGhfvI4HCuPDiBRuS1muAG7v+p0jyodq9zV7RFgVsGps= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197757; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=HiY1OdOtBijExrR7AqCE72zrQVCis7QsYpBlu+X6Ymk=; b=QWC2YiRe7UPinzG/g92DVMUgHBu69OQdXjPnnyM/fh5S67Rlka6FYlDTZi4BuSBaNRHfCslCMd0YOEfqfwzr0GltOnQRkB7yetFy8SGc0IV7V1XTI14fWAPj68ERMFV0eDAmRaEICwmn2ic3mOcEBNlFaiDplfjlWcWMu6uaoyQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197757006895.9421836931149; Wed, 19 Aug 2026 20:49:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtk2-0002U5-Nc; Wed, 19 Aug 2026 23:46:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtk1-0002Tc-AH for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:57 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtjz-00047W-N3 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:46:57 -0400 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-38e347638adso1950631a91.0 for ; Wed, 19 Aug 2026 20:46:55 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197614; x=1787802414; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=HiY1OdOtBijExrR7AqCE72zrQVCis7QsYpBlu+X6Ymk=; b=r7isK4UPDK41afbycR1msFqx7eYebniaA6Ah9OyuI2g3JKYahzcRq4db2ZePMJ2N7i zCa71fT/tdhnrraz5KFtKyMAZC5aDgeWLC/CMu3duwmRJv3vMY9z3ytYbXuE1Xi2POtv o59wC1NfdH29aa+Qglxv+t1eUARVKqHdWTl31Kr28stdVE65vNZBr3OMzGlkz1XvZXVb xO7yE4/IJEKPFK4gIN8wxlMTAIQE+fynTH/qfGCVmvB8tB1KlXFAtFmviqSg/HQJjbel aZp2UsFik0ZgD6JjoNdrkPtjc9gtrjPyW57KaI5rqR2LphxNBiMmPh4ru5eLD96iTiHC BfdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197614; x=1787802414; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=HiY1OdOtBijExrR7AqCE72zrQVCis7QsYpBlu+X6Ymk=; b=lojjCJZXLIwStoZeV6ET4Zxs2Cwd5dilNSlHSleMu9a2Guil5LmdSbmKLfLJg4s4jw frMh6UBSzfLLqqUfgWZVUOJxku8oH4dOpQ6Umupbg8ENhyVDOMsJsdM6IPbd0fXeYEHb bJsbfsDIn+5NkgqdRJLcf7FptsKDjH5IW5guog0uV3jJllU9wvNgHwZSgw0tLdzgD9c6 82/RKCGrJcfz4eWIsRiBwq8jvLSmqGbsp8VA3SWB5aJ3cGeB1DiQ8XpH50VTPNTAAgwb UQ7r4aIpf98QjMWAHokdDE1hmSd2WrBGVLgHCrOzlNoB/yuCSqswX6oMZ/9pr/xBeXbh Iv4w== X-Gm-Message-State: AFuF++kUKwz+Ze4PvdILh8fVwV0vUxNKCz5iRuW95nSfyWeo0bFt132w aD1fIgFx188xDRLg0yAdxDLCvb0l2fucO6hqGGqE/J/yPVi1y/6+zZxAvN6PWA== X-Gm-Gg: AR+sD13ogVI5IssCZlDCSvjKIX3IqdQ7N11+FbZGXiJc+Vm0x+ngkGfRx9AJmVPY+5H wSQazAbF1KJSwdxvfRQRqh8DLmTfHXW/PCwnHITCKW1mUQ2KwB3qu7Jykf1i+sefyzbU8rRvuNa DUxIVh2XZ2A7iiqrv+b/OuqvJo9PbzND0kGeu2Ic08Gbl1QKn4t6oK31FbMhP47/iUKCRng5YNU WTPN+cc8p155Sa9hj9ObDgeX6nUoa3mo56QZde3FCuLo4h7UYLpjPwotVKmck0HYgpQUGJvkgRf bFPRQ+hAEpAkGSYB+9MUsw3+oFzj0HZ7CJCaFLdirkf0V+qeQVLFufRGMuqFeBHsAaQbKmE39CF JpfaEeZrPkIEj5JylmBmo5FaTbNtohF+xCELFVvOi847U80g3DxDplJqyO7n8/etGMrXD1m6H0P S2kWHve9YWGh83hGCo5oRlhfoS7BZbt7wOJYiCkUXRi9ZV8J5gAy3X8T4ZC8HZGPeyDYM/XtPVg 2Xukw== X-Received: by 2002:a17:90b:5250:b0:38d:b36e:9813 with SMTP id 98e67ed59e1d1-395810b57d1mr17850979a91.11.1787197614195; Wed, 19 Aug 2026 20:46:54 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 44/93] disas/riscv: Tidy disasm_inst main loop Date: Thu, 20 Aug 2026 13:43:41 +1000 Message-ID: <20260820034430.1186695-45-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197758561158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Unroll first iteration, so that always_true_p is not used, Drop some local variables and use 'decoders' directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-9-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 65 +++++++++++++++++++++++++-------------------------- 1 file changed, 32 insertions(+), 33 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 70ea41f125..9880b8de20 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5419,41 +5419,40 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc= , rv_inst inst, .inst =3D inst, .cfg =3D cfg, }; - - static const struct { - bool (*guard_func)(const RISCVCPUConfig *); - const rv_opcode_data *opcode_data; - void (*decode_func)(rv_decode *, rv_isa); - } decoders[] =3D { - { always_true_p, rvi_opcode_data, decode_inst_opcode }, - { has_xtheadba_p, xthead_opcode_data, decode_xtheadba }, - { has_xtheadbb_p, xthead_opcode_data, decode_xtheadbb }, - { has_xtheadbs_p, xthead_opcode_data, decode_xtheadbs }, - { has_xtheadcmo_p, xthead_opcode_data, decode_xtheadcmo }, - { has_xtheadcondmov_p, xthead_opcode_data, decode_xtheadcondmov }, - { has_xtheadfmemidx_p, xthead_opcode_data, decode_xtheadfmemidx }, - { has_xtheadfmv_p, xthead_opcode_data, decode_xtheadfmv }, - { has_xtheadmac_p, xthead_opcode_data, decode_xtheadmac }, - { has_xtheadmemidx_p, xthead_opcode_data, decode_xtheadmemidx }, - { has_xtheadmempair_p, xthead_opcode_data, decode_xtheadmempair }, - { has_xtheadsync_p, xthead_opcode_data, decode_xtheadsync }, - { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanacondo= ps }, - { has_xlrbr_p, rv_xlrbr_opcode_data, decode_xlrbr }, - }; - const rv_opcode_data *op; =20 - for (size_t i =3D 0; i < ARRAY_SIZE(decoders); i++) { - bool (*guard_func)(const RISCVCPUConfig *) =3D decoders[i].guard_f= unc; - const rv_opcode_data *opcode_data =3D decoders[i].opcode_data; - void (*decode_func)(rv_decode *, rv_isa) =3D decoders[i].decode_fu= nc; - - /* always_true_p don't dereference cfg */ - if (((i =3D=3D 0) || cfg) && guard_func(cfg)) { - dec.opcode_data =3D opcode_data; - decode_func(&dec, isa); - if (dec.op !=3D rv_op_illegal) - break; + dec.opcode_data =3D rvi_opcode_data; + decode_inst_opcode(&dec, isa); + + if (dec.op =3D=3D rv_op_illegal && cfg) { + static const struct { + bool (*guard_func)(const RISCVCPUConfig *); + const rv_opcode_data *opcode_data; + void (*decode_func)(rv_decode *, rv_isa); + } decoders[] =3D { + { has_xtheadba_p, xthead_opcode_data, decode_xtheadba }, + { has_xtheadbb_p, xthead_opcode_data, decode_xtheadbb }, + { has_xtheadbs_p, xthead_opcode_data, decode_xtheadbs }, + { has_xtheadcmo_p, xthead_opcode_data, decode_xtheadcmo }, + { has_xtheadcondmov_p, xthead_opcode_data, decode_xtheadcondmo= v }, + { has_xtheadfmemidx_p, xthead_opcode_data, decode_xtheadfmemid= x }, + { has_xtheadfmv_p, xthead_opcode_data, decode_xtheadfmv }, + { has_xtheadmac_p, xthead_opcode_data, decode_xtheadmac }, + { has_xtheadmemidx_p, xthead_opcode_data, decode_xtheadmemidx = }, + { has_xtheadmempair_p, xthead_opcode_data, decode_xtheadmempai= r }, + { has_xtheadsync_p, xthead_opcode_data, decode_xtheadsync }, + { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanac= ondops }, + { has_xlrbr_p, rv_xlrbr_opcode_data, decode_xlrbr }, + }; + + for (size_t i =3D 0; i < ARRAY_SIZE(decoders); i++) { + if (decoders[i].guard_func(cfg)) { + dec.opcode_data =3D decoders[i].opcode_data; + decoders[i].decode_func(&dec, isa); + if (dec.op !=3D rv_op_illegal) { + break; + } + } } } =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198312; cv=none; d=zohomail.com; s=zohoarc; b=nBoZKCwmy979zNQFakB4p8V/iaPihk/I23CO/uFjkswI0PrqF1nukaeydcoBk8S1JQHBvrYvGC+gjtnOwlMcLSYK0izL7hrmnxyn1TiV6jIdCzoIamMpfjbemuNY5L6pQsYxqHlxm0BXP1sv7PNdXd+lGBuyNAhtJqk/YhEjAdk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198312; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=V3fM4y2C472xM9X4uqOcufwfeVn3Wu1NX6yZjjnlfQ0=; b=U6tVlfGXtgFBW0bIo8gZr/EOX2QN6y/x0ir2f+FFIzIz+WAByGMryvmirCB14fDIr9K7eek5IlYjVzDsvKORaLrbRNyZUdOSMFb1hWhANPxOeLcYPY5GVwxgHGyZZarzBNVq5FMIZq4Ljrf8SVZhl8cqi422IqI4GWkgDIyCTJU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198312079103.16331345233687; Wed, 19 Aug 2026 20:58:32 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtk6-0002wu-IU; Wed, 19 Aug 2026 23:47:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtk4-0002dy-8t for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:00 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtk2-00047w-3f for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:00 -0400 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-38e07ebd263so1182859a91.1 for ; Wed, 19 Aug 2026 20:46:57 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197617; x=1787802417; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=V3fM4y2C472xM9X4uqOcufwfeVn3Wu1NX6yZjjnlfQ0=; b=OTN0e6XFVmwTWTGZqjwLGhaVlxWl7a2ZHu4HWairBxQGX7a+D3hpY190+7gOHbR1jO fMFvUw3hXA8Vk6eS2c9isw5vbnBMwFumK0/h91edxHf2SMiHbTAl0Dnw+BneiGk1B1NK /N4oXXC96OwRRIZOG/nOefaISRqRTX9YsRp5tClFkMEnGLVVW7cbCoVdvWFeYpzndqRb O9EAz+7P9LD5L73A969A676SkBYoaBrC0JOW1dy6/fqOO8P56JW3UUolS8xdq0jhPpGw zCSAg8pvnFtmdAe+yvBvdBIaoUbd+Ft7ODTrF2kvIS9fpPQ/Xq3jGsuj5z877mqSZv1I A8eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197617; x=1787802417; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=V3fM4y2C472xM9X4uqOcufwfeVn3Wu1NX6yZjjnlfQ0=; b=diwGM/TEoOeuL7EcDpNR+AixXjYVNXeppM7BCLBPSTwmalHdNYV2jghWFw6Zs1Bjjl 0SNrJi0f23aPm6tbW8CQYM68b5JAZRBMplFNCzfrudFkLEm3/QJrA8IRWn8Rc2C4vuh8 +KbMGcaAX6HebruOKMpcIvHlVL09u11mAVXTE6rX1a1bwheJDeTYK9W8aKz0FDvMfkkM LNdusscvObH7xHpbhbNTdoOKKjrj+XzbN767aN/ZpeduUeof2Evbu7wEGo8AfhqWcC+u hMdxYokGrSHIz0M4do0cX62HrlknWeXMz0Z7Z+sYbGwU3Wu9SM0CsxHX8UNymNrRVbEv 0i/Q== X-Gm-Message-State: AFuF++nhZNN/tcdil089ZA9Hc1kspjbs9uSe5azoz4aR7Z7Kf39uRxk9 cbFRmtf9YgKls3Pp/bBZS8gmflPrSw8UUt4UAWHen+oddlP3TOVsM7d/brnL8Q== X-Gm-Gg: AR+sD10ylM9XQ9d2i1irD19N4Pp1bmcrbjlEwM8vq70WMBOnJmHXPN/my/6mOpdI2Um EuiLbJMD2Bn/pzNYz/dwePj+uy+8M/iHyodojAQ9LePGMznRRi4E2auhpdJKshBNq/G+Lc/m81u gU/h+DH9hLAaEjV74gCRMxbxqKV2wT7/Rz+FaWqJY+nNrBa13ej/nR/n/IIWN4d4noMpoN6GeuT bORmr+v9TT5Z1IfXPSUsdNUvDG+tQY7c4SioXY5nasKKL8C3hQy6XbSARaSRV06yG2HozgzKEgJ K0+CRQmjP7C2DydPmBoNHgMnUEv0so58Bq3uj5+HHpbOQJiHoj2zdMsaiJ+P9jD14BQ36zL/YpF lJYVmtJQdy/FdNj1b9nGKREvrJ6z8eVFGopsQR9FkgyY98E8xwfzalJpaklBnZgr+VHOdrnjRgp pqXcUSpxos2NpkhyztnnHFlyCsC2B0rlBTbz4kpN+IFGHnuiyD2w9Kl3Dak+iZCRgz+XbOgjp0C l3Q7g== X-Received: by 2002:a17:90b:2dce:b0:38e:524:8797 with SMTP id 98e67ed59e1d1-395810e91c8mr19152576a91.13.1787197616746; Wed, 19 Aug 2026 20:46:56 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 45/93] disas/riscv: Set dec->opcode_data in decode function Date: Thu, 20 Aug 2026 13:43:42 +1000 Message-ID: <20260820034430.1186695-46-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198312353158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson This allows each opcode table to be private to the decode file. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-10-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-xlrbr.h | 2 -- disas/riscv-xthead.h | 2 -- disas/riscv-xventana.h | 2 -- disas/riscv-xlrbr.c | 4 +++- disas/riscv-xthead.c | 13 ++++++++++++- disas/riscv-xventana.c | 3 ++- disas/riscv.c | 34 +++++++++++++++++----------------- 7 files changed, 34 insertions(+), 26 deletions(-) diff --git a/disas/riscv-xlrbr.h b/disas/riscv-xlrbr.h index 939a69ea6d..ebf3d4c133 100644 --- a/disas/riscv-xlrbr.h +++ b/disas/riscv-xlrbr.h @@ -12,8 +12,6 @@ =20 #include "disas/riscv.h" =20 -extern const rv_opcode_data rv_xlrbr_opcode_data[]; - void decode_xlrbr(rv_decode *, rv_isa); =20 #endif /* DISAS_RISCV_XLRBR_H */ diff --git a/disas/riscv-xthead.h b/disas/riscv-xthead.h index fcd42746e7..0c65c8e0af 100644 --- a/disas/riscv-xthead.h +++ b/disas/riscv-xthead.h @@ -11,8 +11,6 @@ =20 #include "disas/riscv.h" =20 -extern const rv_opcode_data xthead_opcode_data[]; - void decode_xtheadba(rv_decode *, rv_isa); void decode_xtheadbb(rv_decode *, rv_isa); void decode_xtheadbs(rv_decode *, rv_isa); diff --git a/disas/riscv-xventana.h b/disas/riscv-xventana.h index 72be9ffa16..1006c3be00 100644 --- a/disas/riscv-xventana.h +++ b/disas/riscv-xventana.h @@ -11,8 +11,6 @@ =20 #include "disas/riscv.h" =20 -extern const rv_opcode_data ventana_opcode_data[]; - void decode_xventanacondops(rv_decode*, rv_isa); =20 #endif /* DISAS_RISCV_XVENTANA_H */ diff --git a/disas/riscv-xlrbr.c b/disas/riscv-xlrbr.c index 57cb434523..f61028fce9 100644 --- a/disas/riscv-xlrbr.c +++ b/disas/riscv-xlrbr.c @@ -24,7 +24,7 @@ typedef enum { rv_op_crc32c_d =3D 8, } rv_xlrbr_op; =20 -const rv_opcode_data rv_xlrbr_opcode_data[] =3D { +static const rv_opcode_data xlrbr_opcode_data[] =3D { { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, { "crc32.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, { "crc32.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, @@ -75,5 +75,7 @@ void decode_xlrbr(rv_decode *dec, rv_isa isa) } break; } + + dec->opcode_data =3D xlrbr_opcode_data; dec->op =3D op; } diff --git a/disas/riscv-xthead.c b/disas/riscv-xthead.c index 2f2ddb8dd9..96f80bc8e5 100644 --- a/disas/riscv-xthead.c +++ b/disas/riscv-xthead.c @@ -127,7 +127,7 @@ typedef enum { rv_op_th_sync_s, } rv_xthead_op; =20 -const rv_opcode_data xthead_opcode_data[] =3D { +static const rv_opcode_data xthead_opcode_data[] =3D { { "th.illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, /* XTheadBa */ { "th.addsl", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, @@ -272,6 +272,7 @@ void decode_xtheadba(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -330,6 +331,7 @@ void decode_xtheadbb(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -356,6 +358,7 @@ void decode_xtheadbs(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -434,6 +437,7 @@ void decode_xtheadcmo(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -461,6 +465,7 @@ void decode_xtheadcondmov(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -498,6 +503,7 @@ void decode_xtheadfmemidx(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -533,6 +539,7 @@ void decode_xtheadfmv(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -564,6 +571,7 @@ void decode_xtheadmac(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -638,6 +646,7 @@ void decode_xtheadmemidx(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -672,6 +681,7 @@ void decode_xtheadmempair(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } =20 @@ -706,5 +716,6 @@ void decode_xtheadsync(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D xthead_opcode_data; dec->op =3D op; } diff --git a/disas/riscv-xventana.c b/disas/riscv-xventana.c index cd694f15f3..4539173d95 100644 --- a/disas/riscv-xventana.c +++ b/disas/riscv-xventana.c @@ -14,7 +14,7 @@ typedef enum { ventana_op_vt_maskcn =3D 2, } rv_ventana_op; =20 -const rv_opcode_data ventana_opcode_data[] =3D { +static const rv_opcode_data ventana_opcode_data[] =3D { { "vt.illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, { "vt.maskc", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, { "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, @@ -38,5 +38,6 @@ void decode_xventanacondops(rv_decode *dec, rv_isa isa) break; } =20 + dec->opcode_data =3D ventana_opcode_data; dec->op =3D op; } diff --git a/disas/riscv.c b/disas/riscv.c index 9880b8de20..eb6d132a2c 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1656,7 +1656,7 @@ static uint32_t operand_lpl(rv_inst inst) =20 /* instruction metadata */ =20 -const rv_opcode_data rvi_opcode_data[] =3D { +static const rv_opcode_data rvi_opcode_data[] =3D { { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, { "lui", rv_codec_u, rv_fmt_rd_uimm, NULL, 0, 0, 0 }, { "auipc", rv_codec_u, rv_fmt_rd_uoffset, NULL, 0, 0, 0 }, @@ -2948,6 +2948,7 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa= isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; + switch ((inst >> 0) & 0b11) { case 0: switch ((inst >> 13) & 0b111) { @@ -4590,6 +4591,8 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa= isa) } break; } + + dec->opcode_data =3D rvi_opcode_data; dec->op =3D op; } =20 @@ -5421,33 +5424,30 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc= , rv_inst inst, }; const rv_opcode_data *op; =20 - dec.opcode_data =3D rvi_opcode_data; decode_inst_opcode(&dec, isa); =20 if (dec.op =3D=3D rv_op_illegal && cfg) { static const struct { bool (*guard_func)(const RISCVCPUConfig *); - const rv_opcode_data *opcode_data; void (*decode_func)(rv_decode *, rv_isa); } decoders[] =3D { - { has_xtheadba_p, xthead_opcode_data, decode_xtheadba }, - { has_xtheadbb_p, xthead_opcode_data, decode_xtheadbb }, - { has_xtheadbs_p, xthead_opcode_data, decode_xtheadbs }, - { has_xtheadcmo_p, xthead_opcode_data, decode_xtheadcmo }, - { has_xtheadcondmov_p, xthead_opcode_data, decode_xtheadcondmo= v }, - { has_xtheadfmemidx_p, xthead_opcode_data, decode_xtheadfmemid= x }, - { has_xtheadfmv_p, xthead_opcode_data, decode_xtheadfmv }, - { has_xtheadmac_p, xthead_opcode_data, decode_xtheadmac }, - { has_xtheadmemidx_p, xthead_opcode_data, decode_xtheadmemidx = }, - { has_xtheadmempair_p, xthead_opcode_data, decode_xtheadmempai= r }, - { has_xtheadsync_p, xthead_opcode_data, decode_xtheadsync }, - { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanac= ondops }, - { has_xlrbr_p, rv_xlrbr_opcode_data, decode_xlrbr }, + { has_xtheadba_p, decode_xtheadba }, + { has_xtheadbb_p, decode_xtheadbb }, + { has_xtheadbs_p, decode_xtheadbs }, + { has_xtheadcmo_p, decode_xtheadcmo }, + { has_xtheadcondmov_p, decode_xtheadcondmov }, + { has_xtheadfmemidx_p, decode_xtheadfmemidx }, + { has_xtheadfmv_p, decode_xtheadfmv }, + { has_xtheadmac_p, decode_xtheadmac }, + { has_xtheadmemidx_p, decode_xtheadmemidx }, + { has_xtheadmempair_p, decode_xtheadmempair }, + { has_xtheadsync_p, decode_xtheadsync }, + { has_XVentanaCondOps_p, decode_xventanacondops }, + { has_xlrbr_p, decode_xlrbr }, }; =20 for (size_t i =3D 0; i < ARRAY_SIZE(decoders); i++) { if (decoders[i].guard_func(cfg)) { - dec.opcode_data =3D decoders[i].opcode_data; decoders[i].decode_func(&dec, isa); if (dec.op !=3D rv_op_illegal) { break; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197768; cv=none; d=zohomail.com; s=zohoarc; b=Ph9kxp8rbFQc30H0Xou4NuK0sS+ztlSnGAr46Ad0Nl5KwH4gVlbUMyrgUUDFksfKnwK/i8KkEYgRDdNMmH1/rgm0fS+16QElYkGyBXejFZPTk69GDZMc+bjl2NC0VzxIhpBfSMeM358hy9b2n2Yw0uShWd0iZ1d3r/Mdqo51icU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197768; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KzYlE6NRpHzxIO5tp2LGbdAwVUy14ecn+rwbu6SIIug=; b=Mw11IYaDtvZ3GIFWWogVRWG2hD1WOddcqBGlD9sADMYwG7iWZT4hPyKBZnyaCXX5zL7ud5Sm4AzTHKKXaWIEyjbiBw1p/XQuq8gV7z9VwP2ihHa9MNndOGqMwl/oD26gv/pNBuB7q9Z5fNRDwroS61sYGtGGfDlmXDx92U9mQMk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197768477191.64810403017998; Wed, 19 Aug 2026 20:49:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkb-000467-Vb; Wed, 19 Aug 2026 23:47:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkC-0003Zo-9t for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:08 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtk6-00048F-IK for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:08 -0400 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-2ccf2360620so13010415ad.3 for ; Wed, 19 Aug 2026 20:47:02 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.46.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:46:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197621; x=1787802421; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=KzYlE6NRpHzxIO5tp2LGbdAwVUy14ecn+rwbu6SIIug=; b=ggtBKpRLn9WcHdJQ5oGvv0oqG7Mng7txgK5gAmGORWoNduOjlkgEPwzML+Xz8Kstb6 l2AlQLk2j25szoWUi+DPnBFmGKllym5whJwwbkvtS3s/KiDPD2W2KKLFrQG/rT2amGRE SRih18X+JiRCWzl0/7g8i3UI29Fl8ORV2IH/dkI7ebDO0rS4m26OSYtBA/LgTOA5c8jb UD2mGJ+tUKlfaUbI2U3EkeOhU1CDEd6rPc3I6HDtdwdX4mfAJAHJj31F39iL4/+k5Fmi MDdQuaSkL7jD9Zy2zz48Okg+DgHOj+aqrS5lVNy33i/DHon9V7e3/Xabfmb5J3fUTY7j cAoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197621; x=1787802421; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=KzYlE6NRpHzxIO5tp2LGbdAwVUy14ecn+rwbu6SIIug=; b=U8oviMuSC6fNYpxrgSDTweWTe8+upMah5CDUj2K+4itDStSIB+7nIhZcCcwD8PfcJg jFjp6HzHGjDObKnKKdCzNVdcIPszE4+K8u3QnTR0XU4Yspit3bc3y6rcNtcDxZQ+dkaT u9fqbkGPyobXccvuMaO7PXbHRqr0kyLZS1Z0oR0mm9M556To/gAjMZ+d0ZN4dKB7H9B8 vjlHMHMkc540YLGTJ8iVtgmy1RHhAXUi3z4NXejqAriLfIT0fQwUHyduEe0a9UK0Xoqz +i2TwUx7M00ogK8+hA1avZb+6bTC2jIaVgkw7KFs29/X+R6yNa9oeA/d00eK2JMRgIyT oAWg== X-Gm-Message-State: AFuF++lUUl/sdzdvWT3czrmeI/itdBhplJ7rMAv3p10LAjlA3G0RJgSL 2sDZi6lQ4c4drWLyFJT6/zlgbqhTLZC2VYGk8KcBACuWxEB92vi07U5uhE8xDA== X-Gm-Gg: AR+sD10nLWF075kRqV+6bN6nT8qx3HXA68YJHfD6QjjjxwzXHbD36rNsjOqIyziDIN2 RosOOGMTc/1+t6/zaL4wKc+k+eafHvHt1QhhOnsntygtuhwAAMjz353k1wtlTJ65KWlLMhDMcaB D3fvpnM+bfwDe486xyIjsG5IScilNqEcNxgFMP/fvgciPZocnu/OBZUQYXLEQ22l0EJgBUlR1t6 IFisdEebnSqeeJm0dV+RcDWrwYS6M7Sssh56CTo/816W8R1BqC8KBZfsIc9ji51QBvlhVb04s2c yyF8crDstmzEyRD8Le6ws1roHcvuYh9eaH5+mZo8Wdc0IC9/1MVQkjT0MBkluZNmCHE7OJjEJ+Y Sb5VzrOvRmomB2c7Bqok7HoWUHJ4cIrFLWxG/IxP6UE2yghkyruizi8Jaq3LZBrLlm6kItz4CoX YUVkpnfzcN+2Jv4jCoz92Ypgm4DSXhifTIP8NrB+LDDab5DClRb959g4AxQ5TN07N+Jc/OarmHo SwXs3+hclpfzQgb X-Received: by 2002:a17:90b:2748:b0:392:7f74:58c9 with SMTP id 98e67ed59e1d1-395810f2738mr18260084a91.15.1787197620056; Wed, 19 Aug 2026 20:47:00 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 46/93] disas/riscv: Drop explicit zero of rv_opcode_data fields Date: Thu, 20 Aug 2026 13:43:43 +1000 Message-ID: <20260820034430.1186695-47-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=alistair23@gmail.com; helo=mail-pl1-x635.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197770794158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Mechanical s/, NULL, 0, 0, 0 }/ }/ s/, 0, 0, 0 }/ }/ s/, NULL, 0, 0 }/ }/ s/, NULL, 0 }/ }/ Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-11-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-xlrbr.c | 18 +- disas/riscv-xthead.c | 210 ++--- disas/riscv-xventana.c | 6 +- disas/riscv.c | 1826 ++++++++++++++++++++-------------------- 4 files changed, 1030 insertions(+), 1030 deletions(-) diff --git a/disas/riscv-xlrbr.c b/disas/riscv-xlrbr.c index f61028fce9..d0092e9edd 100644 --- a/disas/riscv-xlrbr.c +++ b/disas/riscv-xlrbr.c @@ -25,15 +25,15 @@ typedef enum { } rv_xlrbr_op; =20 static const rv_opcode_data xlrbr_opcode_data[] =3D { - { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, - { "crc32.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "crc32.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "crc32.w", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "crc32.d", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "crc32c.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "crc32c.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "crc32c.w", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "crc32c.d", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, + { "illegal", rv_codec_illegal, rv_fmt_none }, + { "crc32.b", rv_codec_r, rv_fmt_rd_rs1 }, + { "crc32.h", rv_codec_r, rv_fmt_rd_rs1 }, + { "crc32.w", rv_codec_r, rv_fmt_rd_rs1 }, + { "crc32.d", rv_codec_r, rv_fmt_rd_rs1 }, + { "crc32c.b", rv_codec_r, rv_fmt_rd_rs1 }, + { "crc32c.h", rv_codec_r, rv_fmt_rd_rs1 }, + { "crc32c.w", rv_codec_r, rv_fmt_rd_rs1 }, + { "crc32c.d", rv_codec_r, rv_fmt_rd_rs1 }, }; =20 void decode_xlrbr(rv_decode *dec, rv_isa isa) diff --git a/disas/riscv-xthead.c b/disas/riscv-xthead.c index 96f80bc8e5..757d6ff39f 100644 --- a/disas/riscv-xthead.c +++ b/disas/riscv-xthead.c @@ -128,122 +128,122 @@ typedef enum { } rv_xthead_op; =20 static const rv_opcode_data xthead_opcode_data[] =3D { - { "th.illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, + { "th.illegal", rv_codec_illegal, rv_fmt_none }, /* XTheadBa */ - { "th.addsl", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, + { "th.addsl", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, /* XTheadBb */ - { "th.srri", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "th.srriw", rv_codec_r2_imm5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "th.ext", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml, NULL, 0, 0, 0 = }, - { "th.extu", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml, NULL, 0, 0, 0= }, - { "th.ff0", rv_codec_r2, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "th.ff1", rv_codec_r2, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "th.rev", rv_codec_r2, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "th.revw", rv_codec_r2, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "th.tstnbz", rv_codec_r2, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, + { "th.srri", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm }, + { "th.srriw", rv_codec_r2_imm5, rv_fmt_rd_rs1_imm }, + { "th.ext", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml }, + { "th.extu", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml }, + { "th.ff0", rv_codec_r2, rv_fmt_rd_rs1 }, + { "th.ff1", rv_codec_r2, rv_fmt_rd_rs1 }, + { "th.rev", rv_codec_r2, rv_fmt_rd_rs1 }, + { "th.revw", rv_codec_r2, rv_fmt_rd_rs1 }, + { "th.tstnbz", rv_codec_r2, rv_fmt_rd_rs1 }, /* XTheadBs */ - { "th.tst", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, + { "th.tst", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm }, /* XTheadCmo */ - { "th.dcache.call", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.dcache.ciall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.dcache.iall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.dcache.cpa", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.cipa", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.ipa", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.cva", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.civa", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.iva", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.csw", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.cisw", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.isw", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.cpal1", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.dcache.cval1", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.icache.iall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.icache.ialls", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.icache.ipa", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.icache.iva", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "th.l2cache.call", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.l2cache.ciall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.l2cache.iall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, + { "th.dcache.call", rv_codec_none, rv_fmt_none }, + { "th.dcache.ciall", rv_codec_none, rv_fmt_none }, + { "th.dcache.iall", rv_codec_none, rv_fmt_none }, + { "th.dcache.cpa", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.cipa", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.ipa", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.cva", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.civa", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.iva", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.csw", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.cisw", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.isw", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.cpal1", rv_codec_r, rv_fmt_rs1 }, + { "th.dcache.cval1", rv_codec_r, rv_fmt_rs1 }, + { "th.icache.iall", rv_codec_none, rv_fmt_none }, + { "th.icache.ialls", rv_codec_none, rv_fmt_none }, + { "th.icache.ipa", rv_codec_r, rv_fmt_rs1 }, + { "th.icache.iva", rv_codec_r, rv_fmt_rs1 }, + { "th.l2cache.call", rv_codec_none, rv_fmt_none }, + { "th.l2cache.ciall", rv_codec_none, rv_fmt_none }, + { "th.l2cache.iall", rv_codec_none, rv_fmt_none }, /* XTheadCondMov */ - { "th.mveqz", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "th.mvnez", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, + { "th.mveqz", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "th.mvnez", rv_codec_r, rv_fmt_rd_rs1_rs2 }, /* XTheadFMemIdx */ - { "th.flrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.flrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.flurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.flurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.fsrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.fsrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.fsurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.fsurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm, NULL, 0, 0, 0 }, + { "th.flrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, + { "th.flrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, + { "th.flurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, + { "th.flurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, + { "th.fsrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, + { "th.fsrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, + { "th.fsurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, + { "th.fsurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, /* XTheadFmv */ - { "th.fmv.hw.x", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "th.fmv.x.hw", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, + { "th.fmv.hw.x", rv_codec_r, rv_fmt_rd_frs1 }, + { "th.fmv.x.hw", rv_codec_r, rv_fmt_rd_frs1 }, /* XTheadMac */ - { "th.mula", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "th.mulaw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "th.mulah", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "th.muls", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "th.mulsw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "th.mulsh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, + { "th.mula", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "th.mulaw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "th.mulah", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "th.muls", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "th.mulsw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "th.mulsh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, /* XTheadMemIdx */ - { "th.lbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.lbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml, NULL, 0, = 0, 0 }, - { "th.lbuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NUL= L, 0, 0, 0 }, - { "th.lbuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NUL= L, 0, 0, 0 }, - { "th.lhia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.lhib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.lhuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NUL= L, 0, 0, 0 }, - { "th.lhuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NUL= L, 0, 0, 0 }, - { "th.lwia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.lwib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.lwuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NUL= L, 0, 0, 0 }, - { "th.lwuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NUL= L, 0, 0, 0 }, - { "th.ldia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.ldib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.sbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.sbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.shia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.shib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.swia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.swib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.sdia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.sdib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr, NULL= , 0, 0, 0 }, - { "th.lrb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lrbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lrh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lrhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lrw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lrwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lrd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.srb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.srh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.srw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.srd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lurb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lurbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lurh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lurhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lurw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lurwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.lurd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.surb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.surh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.surw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, - { "th.surd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm, NULL, 0, 0, 0 }, + { "th.lbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml }, + { "th.lbuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lbuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lhia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lhib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lhuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lhuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lwia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lwib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lwuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lwuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.ldia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.ldib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.sbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.sbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.shia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.shib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.swia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.swib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.sdia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.sdib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, + { "th.lrb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lrbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lrh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lrhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lrw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lrwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lrd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.srb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.srh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.srw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.srd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lurb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lurbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lurh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lurhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lurw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lurwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.lurd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.surb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.surh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.surw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, + { "th.surd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, /* XTheadMemPair */ - { "th.ldd", rv_codec_r_imm2, rv_fmt_rd2_imm, NULL, 0, 0, 0 }, - { "th.lwd", rv_codec_r_imm2, rv_fmt_rd2_imm, NULL, 0, 0, 0 }, - { "th.lwud", rv_codec_r_imm2, rv_fmt_rd2_imm, NULL, 0, 0, 0 }, - { "th.sdd", rv_codec_r_imm2, rv_fmt_rd2_imm, NULL, 0, 0, 0 }, - { "th.swd", rv_codec_r_imm2, rv_fmt_rd2_imm, NULL, 0, 0, 0 }, + { "th.ldd", rv_codec_r_imm2, rv_fmt_rd2_imm }, + { "th.lwd", rv_codec_r_imm2, rv_fmt_rd2_imm }, + { "th.lwud", rv_codec_r_imm2, rv_fmt_rd2_imm }, + { "th.sdd", rv_codec_r_imm2, rv_fmt_rd2_imm }, + { "th.swd", rv_codec_r_imm2, rv_fmt_rd2_imm }, /* XTheadSync */ - { "th.sfence.vmas", rv_codec_r, rv_fmt_rs1_rs2, NULL, 0, 0, 0 }, - { "th.sync", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.sync.i", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.sync.is", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "th.sync.s", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, + { "th.sfence.vmas", rv_codec_r, rv_fmt_rs1_rs2 }, + { "th.sync", rv_codec_none, rv_fmt_none }, + { "th.sync.i", rv_codec_none, rv_fmt_none }, + { "th.sync.is", rv_codec_none, rv_fmt_none }, + { "th.sync.s", rv_codec_none, rv_fmt_none }, }; =20 void decode_xtheadba(rv_decode *dec, rv_isa isa) diff --git a/disas/riscv-xventana.c b/disas/riscv-xventana.c index 4539173d95..4fb9a29d0b 100644 --- a/disas/riscv-xventana.c +++ b/disas/riscv-xventana.c @@ -15,9 +15,9 @@ typedef enum { } rv_ventana_op; =20 static const rv_opcode_data ventana_opcode_data[] =3D { - { "vt.illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, - { "vt.maskc", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, + { "vt.illegal", rv_codec_illegal, rv_fmt_none }, + { "vt.maskc", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2 }, }; =20 void decode_xventanacondops(rv_decode *dec, rv_isa isa) diff --git a/disas/riscv.c b/disas/riscv.c index eb6d132a2c..ec40abb618 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1657,233 +1657,233 @@ static uint32_t operand_lpl(rv_inst inst) /* instruction metadata */ =20 static const rv_opcode_data rvi_opcode_data[] =3D { - { "illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, - { "lui", rv_codec_u, rv_fmt_rd_uimm, NULL, 0, 0, 0 }, - { "auipc", rv_codec_u, rv_fmt_rd_uoffset, NULL, 0, 0, 0 }, - { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal, 0, 0, 0 }, - { "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr, 0, 0, 0 }, - { "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq, 0, 0, 0 }, - { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne, 0, 0, 0 }, - { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt, 0, 0, 0 }, - { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge, 0, 0, 0 }, - { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu, 0, 0, 0 }, - { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu, 0, 0, 0 }, - { "lb", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "lh", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "lw", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "lbu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "lhu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "sb", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, - { "sh", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, - { "sw", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, - { "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi, 0, 0, 0 }, - { "slti", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu, 0, 0, 0 }, - { "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori, 0, 0, 0 }, - { "ori", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "andi", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub, 0, 0, 0 }, - { "sll", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt, 0, 0, 0 }, - { "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu, 0, 0, 0 }, - { "xor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "srl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sra", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "or", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "and", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "fence", rv_codec_r_f, rv_fmt_pred_succ, NULL, 0, 0, 0 }, - { "fence.i", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "lwu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "ld", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "sd", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, - { "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw, 0, 0, 0 }, - { "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "addw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw, 0, 0, 0 }, - { "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "ldu", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "lq", rv_codec_i, rv_fmt_rd_offset_rs1, NULL, 0, 0, 0 }, - { "sq", rv_codec_s, rv_fmt_rs2_offset_rs1, NULL, 0, 0, 0 }, - { "addid", rv_codec_i, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "addd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "subd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "slld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "srld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "srad", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "div", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "divu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "rem", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "remu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "divw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "remw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "muld", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "divd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "divud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "remd", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "remud", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, - { "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, - { "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1, NULL, 0, 0, 0 }, - { "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "ecall", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "ebreak", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "uret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "sret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "hret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "mret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "dret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "sfence.vm", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2, NULL, 0, 0, 0 }, - { "wfi", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrw, 0, 0, 0 }, - { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs, 0, 0, 0 }, - { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1, NULL, 0, 0, 0 }, - { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi, 0, 0, 0 }, - { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 }, - { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm, NULL, 0, 0, 0 }, - { "flw", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, - { "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, - { "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, = 0 }, - { "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, = 0 }, - { "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0,= 0 }, - { "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0,= 0 }, - { "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s, 0, 0, 0 }, - { "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s, 0, 0, 0= }, - { "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s, 0, 0, 0= }, - { "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fclass.s", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, - { "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fld", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, - { "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, - { "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, = 0 }, - { "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, = 0 }, - { "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0,= 0 }, - { "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0,= 0 }, - { "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d, 0, 0, 0 }, - { "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d, 0, 0, 0= }, - { "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d, 0, 0, 0= }, - { "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fclass.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, - { "flq", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, - { "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, - { "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, = 0 }, - { "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0, = 0 }, - { "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0,= 0 }, - { "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3, NULL, 0, 0,= 0 }, - { "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q, 0, 0, 0 }, - { "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q, 0, 0, 0= }, - { "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q, 0, 0, 0= }, - { "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fclass.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1, NULL, 0, 0, 0 }, - { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, + { "illegal", rv_codec_illegal, rv_fmt_none }, + { "lui", rv_codec_u, rv_fmt_rd_uimm }, + { "auipc", rv_codec_u, rv_fmt_rd_uoffset }, + { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal }, + { "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr }, + { "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq }, + { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne }, + { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt }, + { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge }, + { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu }, + { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu }, + { "lb", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "lh", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "lw", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "lbu", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "lhu", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "sb", rv_codec_s, rv_fmt_rs2_offset_rs1 }, + { "sh", rv_codec_s, rv_fmt_rs2_offset_rs1 }, + { "sw", rv_codec_s, rv_fmt_rs2_offset_rs1 }, + { "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi }, + { "slti", rv_codec_i, rv_fmt_rd_rs1_imm }, + { "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu }, + { "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori }, + { "ori", rv_codec_i, rv_fmt_rd_rs1_imm }, + { "andi", rv_codec_i, rv_fmt_rd_rs1_imm }, + { "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub }, + { "sll", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt }, + { "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu }, + { "xor", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "srl", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sra", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "or", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "and", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "fence", rv_codec_r_f, rv_fmt_pred_succ }, + { "fence.i", rv_codec_none, rv_fmt_none }, + { "lwu", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "ld", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "sd", rv_codec_s, rv_fmt_rs2_offset_rs1 }, + { "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw }, + { "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, + { "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, + { "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, + { "addw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw }, + { "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "ldu", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "lq", rv_codec_i, rv_fmt_rd_offset_rs1 }, + { "sq", rv_codec_s, rv_fmt_rs2_offset_rs1 }, + { "addid", rv_codec_i, rv_fmt_rd_rs1_imm }, + { "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, + { "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, + { "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, + { "addd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "subd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "slld", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "srld", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "srad", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mul", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "div", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "divu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "rem", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "remu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "divw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "remw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "muld", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "divd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "divud", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "remd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "remud", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1 }, + { "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1 }, + { "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1 }, + { "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "ecall", rv_codec_none, rv_fmt_none }, + { "ebreak", rv_codec_none, rv_fmt_none }, + { "uret", rv_codec_none, rv_fmt_none }, + { "sret", rv_codec_none, rv_fmt_none }, + { "hret", rv_codec_none, rv_fmt_none }, + { "mret", rv_codec_none, rv_fmt_none }, + { "dret", rv_codec_none, rv_fmt_none }, + { "sfence.vm", rv_codec_r, rv_fmt_rs1 }, + { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2 }, + { "wfi", rv_codec_none, rv_fmt_none }, + { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrw }, + { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs }, + { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, + { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi }, + { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, + { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, + { "flw", rv_codec_i, rv_fmt_frd_offset_rs1 }, + { "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1 }, + { "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s }, + { "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s }, + { "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s }, + { "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1 }, + { "fclass.s", rv_codec_r, rv_fmt_rd_frs1 }, + { "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1 }, + { "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fld", rv_codec_i, rv_fmt_frd_offset_rs1 }, + { "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1 }, + { "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d }, + { "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d }, + { "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d }, + { "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fclass.d", rv_codec_r, rv_fmt_rd_frs1 }, + { "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1 }, + { "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1 }, + { "flq", rv_codec_i, rv_fmt_frd_offset_rs1 }, + { "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1 }, + { "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, + { "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, + { "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q }, + { "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q }, + { "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q }, + { "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fclass.q", rv_codec_r, rv_fmt_rd_frs1 }, + { "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, + { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1 }, + { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1 }, { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_addi, rv_op_addi, rvcd_imm_nz }, { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, @@ -1970,696 +1970,696 @@ static const rv_opcode_data rvi_opcode_data[] =3D= { { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_= lq }, { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, 0, 0, rv_op_sq }, - { "nop", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 }, - { "mv", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "not", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "neg", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, - { "negw", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, - { "sext.w", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "seqz", rv_codec_i, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "snez", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, - { "sltz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "sgtz", rv_codec_r, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, - { "fmv.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fabs.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fneg.s", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fmv.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fabs.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fneg.d", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fmv.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fabs.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "fneg.q", rv_codec_r, rv_fmt_frd_frs1, NULL, 0, 0, 0 }, - { "beqz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, - { "bnez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, - { "blez", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 }, - { "bgez", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, - { "bltz", rv_codec_sb, rv_fmt_rs1_offset, NULL, 0, 0, 0 }, - { "bgtz", rv_codec_sb, rv_fmt_rs2_offset, NULL, 0, 0, 0 }, - { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, - { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, - { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, - { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset, NULL, 0, 0, 0 }, - { "j", rv_codec_uj, rv_fmt_offset, NULL, 0, 0, 0 }, - { "ret", rv_codec_i, rv_fmt_none, NULL, 0, 0, 0 }, - { "jr", rv_codec_i, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "rdcycle", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "rdtime", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "rdinstret", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "rdcycleh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "rdtimeh", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "rdinstreth", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "frcsr", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "frrm", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "frflags", rv_codec_i_csr, rv_fmt_rd, NULL, 0, 0, 0 }, - { "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 }, - { "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm, NULL, 0, 0, 0 }, - { "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "clz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "ctz", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "cpop", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "sext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "sext.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "orn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "andn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "rol", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "ror", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "min", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "minu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "max", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "clzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "ctzw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "cpopw", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "rev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "zext.h", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm, NULL, 0, 0, 0 }, - { "orc.b", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "bset", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "binv", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "bext", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, - { "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, - { "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, - { "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, - { "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum, NULL, 0, 0, 0 }, - { "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "aes64im", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha256sig0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "sha256sig1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "sha256sum0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "sha256sum1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "sm3p0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "sm3p1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, - { "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs, NULL, 0, 0, 0 }, - { "brev8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "pack", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "packh", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "packw", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "unzip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "zip", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "xperm8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0, 0 }, - { "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm, NULL, 0, 0, 0 }, - { "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 = }, - { "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 = }, - { "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 = }, - { "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0 = }, - { "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm, NULL, 0, 0, 0= }, - { "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm, NULL, 0, 0, 0 }, - { "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, - { "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, - { "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, - { "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, - { "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, - { "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, - { "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, - { "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, - { "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, - { "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, - { "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnsrl.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnsra.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm, NULL, 0, 0, 0 }, - { "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1, NULL, 0, 0, 0 }, - { "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 }, - { "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm, NULL, 0, 0, 0 }, - { "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl, NULL, 0, 0, 0 }, - { "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl, NULL, 0, 0, 0 }, - { "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl, NULL, 0, 0, 0 }, - { "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm, NULL, 0, 0, 0 }, - { "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vssrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vssra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnclipu.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vnclip.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 }, - { "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0= }, - { "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm, NULL, 0, 0, 0 }, - { "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl, NULL, 0, 0, 0 }, - { "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 }, - { "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 }, - { "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm, NULL, 0, 0, 0 }, - { "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vid.v", rv_codec_v_r, rv_fmt_vd_vm, NULL, 0, 0, 0 }, - { "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2, NULL, 0, 0, 0 }, - { "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1, NULL, 0, 0, 0 }, - { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2, NULL, 0, 0, 0 }, - { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1, NULL, 0, 0, 0 }, - { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vslideup.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 = }, - { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vslidedown.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, = 0 }, - { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 = }, - { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0= }, - { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vrgather.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 = }, - { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli, NULL, 0, 0, 0 }, - { "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli, NULL, 0, 0, 0 }, - { "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, - { "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, - { "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, - { "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, - { "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, - { "c.not", rv_codec_zcb_ext, rv_fmt_rd, NULL, 0 }, - { "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2, NULL, 0, 0 }, - { "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, - { "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, - { "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, - { "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, - { "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst, NULL, 0, 0, 0 }, - { "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist, NULL, 0, 0 }, - { "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0 }, - { "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0,= 0 }, - { "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist, NULL, 0, 0= }, - { "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, - { "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2, NULL, 0, 0, 0 }, - { "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 }, - { "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index, NULL, 0 }, - { "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "fcvt.bf16.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fcvt.s.bf16", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm, NULL, 0, 0, 0 = }, - { "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm, NULL, 0, 0, 0 = }, - { "flh", rv_codec_i, rv_fmt_frd_offset_rs1, NULL, 0, 0, 0 }, - { "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1, NULL, 0, 0, 0 }, - { "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1, NULL, 0, 0, 0 }, - { "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fli.s", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 }, - { "fli.d", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 }, - { "fli.q", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 }, - { "fli.h", rv_codec_fli, rv_fmt_fli, NULL, 0, 0, 0 }, - { "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmaxm.d", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmaxm.q", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fminm.h", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2, NULL, 0, 0, 0 }, - { "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1, NULL, 0, 0, 0 }, - { "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1, NULL, 0, 0, 0 }, - { "fmvh.x.d", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2, NULL, 0, 0, 0 }, - { "fmvh.x.q", rv_codec_r, rv_fmt_rd_frs1, NULL, 0, 0, 0 }, - { "fmvp.q.x", rv_codec_r, rv_fmt_frd_rs1_rs2, NULL, 0, 0, 0 }, - { "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2, NULL, 0, 0, 0 }, - { "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaesdf.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaesdm.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vaeskf1.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, - { "vaeskf2.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, - { "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vbrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vclmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vclmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vclmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vclmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vclz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vcpop.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vctz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vghsh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vgmul.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm, NULL, 0, 0, 0 }, - { "vrol.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vrol.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vror.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vror.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vsm3c.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, - { "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1, NULL, 0, 0, 0 }, - { "vsm4k.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm, NULL, 0, 0, 0 }, - { "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2, NULL, 0, 0, 0 }, - { "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm, NULL, 0, 0, 0 }, - { "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm, NULL, 0, 0, 0 }, - { "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm, NULL, 0, 0, 0 }, - { "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "mop.r.0", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.1", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.2", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.3", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.4", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.5", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.6", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.7", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.8", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.9", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.10", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.11", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.12", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.13", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.14", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.15", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.16", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.17", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.18", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.19", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.20", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.21", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.22", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.23", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.24", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.25", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.26", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.27", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.28", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.29", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.30", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.r.31", rv_codec_r, rv_fmt_rd_rs1, NULL, 0, 0 }, - { "mop.rr.0", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mop.rr.1", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mop.rr.2", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mop.rr.3", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mop.rr.4", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mop.rr.5", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mop.rr.6", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "mop.rr.7", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, - { "c.mop.1", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "c.mop.3", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "c.mop.5", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "c.mop.7", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "c.mop.9", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "c.mop.11", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "c.mop.13", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "c.mop.15", rv_codec_ci_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoand.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomin.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomax.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amominu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomaxu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoswap.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoadd.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoxor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amoand.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomin.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomax.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amominu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "wrs.sto", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "wrs.nto", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, - { "lpad", rv_codec_lp, rv_fmt_imm, NULL, 0, 0, 0 }, - { "sspush", rv_codec_r, rv_fmt_rs2, NULL, 0, 0, 0 }, - { "sspopchk", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "ssrdp", rv_codec_r, rv_fmt_rd, NULL, 0, 0, 0 }, - { "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, - { "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, + { "nop", rv_codec_i, rv_fmt_none }, + { "mv", rv_codec_i, rv_fmt_rd_rs1 }, + { "not", rv_codec_i, rv_fmt_rd_rs1 }, + { "neg", rv_codec_r, rv_fmt_rd_rs2 }, + { "negw", rv_codec_r, rv_fmt_rd_rs2 }, + { "sext.w", rv_codec_i, rv_fmt_rd_rs1 }, + { "seqz", rv_codec_i, rv_fmt_rd_rs1 }, + { "snez", rv_codec_r, rv_fmt_rd_rs2 }, + { "sltz", rv_codec_r, rv_fmt_rd_rs1 }, + { "sgtz", rv_codec_r, rv_fmt_rd_rs2 }, + { "fmv.s", rv_codec_r, rv_fmt_frd_frs1 }, + { "fabs.s", rv_codec_r, rv_fmt_frd_frs1 }, + { "fneg.s", rv_codec_r, rv_fmt_frd_frs1 }, + { "fmv.d", rv_codec_r, rv_fmt_frd_frs1 }, + { "fabs.d", rv_codec_r, rv_fmt_frd_frs1 }, + { "fneg.d", rv_codec_r, rv_fmt_frd_frs1 }, + { "fmv.q", rv_codec_r, rv_fmt_frd_frs1 }, + { "fabs.q", rv_codec_r, rv_fmt_frd_frs1 }, + { "fneg.q", rv_codec_r, rv_fmt_frd_frs1 }, + { "beqz", rv_codec_sb, rv_fmt_rs1_offset }, + { "bnez", rv_codec_sb, rv_fmt_rs1_offset }, + { "blez", rv_codec_sb, rv_fmt_rs2_offset }, + { "bgez", rv_codec_sb, rv_fmt_rs1_offset }, + { "bltz", rv_codec_sb, rv_fmt_rs1_offset }, + { "bgtz", rv_codec_sb, rv_fmt_rs2_offset }, + { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset }, + { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset }, + { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset }, + { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset }, + { "j", rv_codec_uj, rv_fmt_offset }, + { "ret", rv_codec_i, rv_fmt_none }, + { "jr", rv_codec_i, rv_fmt_rs1 }, + { "rdcycle", rv_codec_i_csr, rv_fmt_rd }, + { "rdtime", rv_codec_i_csr, rv_fmt_rd }, + { "rdinstret", rv_codec_i_csr, rv_fmt_rd }, + { "rdcycleh", rv_codec_i_csr, rv_fmt_rd }, + { "rdtimeh", rv_codec_i_csr, rv_fmt_rd }, + { "rdinstreth", rv_codec_i_csr, rv_fmt_rd }, + { "frcsr", rv_codec_i_csr, rv_fmt_rd }, + { "frrm", rv_codec_i_csr, rv_fmt_rd }, + { "frflags", rv_codec_i_csr, rv_fmt_rd }, + { "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1 }, + { "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1 }, + { "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1 }, + { "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm }, + { "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm }, + { "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, + { "clz", rv_codec_r, rv_fmt_rd_rs1 }, + { "ctz", rv_codec_r, rv_fmt_rd_rs1 }, + { "cpop", rv_codec_r, rv_fmt_rd_rs1 }, + { "sext.h", rv_codec_r, rv_fmt_rd_rs1 }, + { "sext.b", rv_codec_r, rv_fmt_rd_rs1 }, + { "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "orn", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "andn", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "rol", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "ror", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "min", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "minu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "max", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "clzw", rv_codec_r, rv_fmt_rd_rs1 }, + { "ctzw", rv_codec_r, rv_fmt_rd_rs1 }, + { "cpopw", rv_codec_r, rv_fmt_rd_rs1 }, + { "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, + { "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "rev8", rv_codec_r, rv_fmt_rd_rs1 }, + { "zext.h", rv_codec_r, rv_fmt_rd_rs1 }, + { "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, + { "orc.b", rv_codec_r, rv_fmt_rd_rs1 }, + { "bset", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "binv", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "bext", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, + { "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, + { "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, + { "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, + { "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum }, + { "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "aes64im", rv_codec_r, rv_fmt_rd_rs1 }, + { "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha256sig0", rv_codec_r, rv_fmt_rd_rs1 }, + { "sha256sig1", rv_codec_r, rv_fmt_rd_rs1 }, + { "sha256sum0", rv_codec_r, rv_fmt_rd_rs1 }, + { "sha256sum1", rv_codec_r, rv_fmt_rd_rs1 }, + { "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "sm3p0", rv_codec_r, rv_fmt_rd_rs1 }, + { "sm3p1", rv_codec_r, rv_fmt_rd_rs1 }, + { "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, + { "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, + { "brev8", rv_codec_r, rv_fmt_rd_rs1 }, + { "pack", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "packh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "packw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "unzip", rv_codec_r, rv_fmt_rd_rs1 }, + { "zip", rv_codec_r, rv_fmt_rd_rs1 }, + { "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "xperm8", rv_codec_r, rv_fmt_rd_rs1 }, + { "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, + { "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, + { "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, + { "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, + { "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, + { "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl }, + { "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, + { "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, + { "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl }, + { "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, + { "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, + { "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, + { "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, + { "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vsrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vsra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vnsrl.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vnsra.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, + { "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1 }, + { "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1 }, + { "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm }, + { "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, + { "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, + { "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl }, + { "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, + { "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vssrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vssra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vnclipu.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vnclip.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, + { "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl }, + { "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1 }, + { "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm }, + { "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm }, + { "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vid.v", rv_codec_v_r, rv_fmt_vd_vm }, + { "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2 }, + { "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1 }, + { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2 }, + { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1 }, + { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vslideup.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vslidedown.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vrgather.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, + { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli }, + { "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli }, + { "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd }, + { "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd }, + { "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd }, + { "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd }, + { "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd }, + { "c.not", rv_codec_zcb_ext, rv_fmt_rd }, + { "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2 }, + { "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst }, + { "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst }, + { "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst }, + { "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst }, + { "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst }, + { "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist }, + { "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist }, + { "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist }, + { "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist }, + { "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2 }, + { "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2 }, + { "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index }, + { "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index }, + { "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "fcvt.bf16.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fcvt.s.bf16", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, + { "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, + { "flh", rv_codec_i, rv_fmt_frd_offset_rs1 }, + { "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1 }, + { "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1 }, + { "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1 }, + { "fli.s", rv_codec_fli, rv_fmt_fli }, + { "fli.d", rv_codec_fli, rv_fmt_fli }, + { "fli.q", rv_codec_fli, rv_fmt_fli }, + { "fli.h", rv_codec_fli, rv_fmt_fli }, + { "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fmaxm.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fmaxm.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fminm.h", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2 }, + { "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, + { "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, + { "fmvh.x.d", rv_codec_r, rv_fmt_rd_frs1 }, + { "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2 }, + { "fmvh.x.q", rv_codec_r, rv_fmt_rd_frs1 }, + { "fmvp.q.x", rv_codec_r, rv_fmt_frd_rs1_rs2 }, + { "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2 }, + { "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaesdf.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaesdm.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vaeskf1.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, + { "vaeskf2.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, + { "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vbrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vclmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vclmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vclmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vclmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vclz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vcpop.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vctz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vghsh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, + { "vgmul.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, + { "vrol.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vrol.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vror.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vror.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm }, + { "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, + { "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, + { "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, + { "vsm3c.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, + { "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, + { "vsm4k.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, + { "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, + { "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, + { "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, + { "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, + { "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "mop.r.0", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.1", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.2", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.3", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.4", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.5", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.6", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.7", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.8", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.9", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.10", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.11", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.12", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.13", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.14", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.15", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.16", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.17", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.18", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.19", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.20", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.21", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.22", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.23", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.24", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.25", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.26", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.27", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.28", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.29", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.30", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.r.31", rv_codec_r, rv_fmt_rd_rs1 }, + { "mop.rr.0", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mop.rr.1", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mop.rr.2", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mop.rr.3", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mop.rr.4", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mop.rr.5", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mop.rr.6", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "mop.rr.7", rv_codec_r, rv_fmt_rd_rs1_rs2 }, + { "c.mop.1", rv_codec_ci_none, rv_fmt_none }, + { "c.mop.3", rv_codec_ci_none, rv_fmt_none }, + { "c.mop.5", rv_codec_ci_none, rv_fmt_none }, + { "c.mop.7", rv_codec_ci_none, rv_fmt_none }, + { "c.mop.9", rv_codec_ci_none, rv_fmt_none }, + { "c.mop.11", rv_codec_ci_none, rv_fmt_none }, + { "c.mop.13", rv_codec_ci_none, rv_fmt_none }, + { "c.mop.15", rv_codec_ci_none, rv_fmt_none }, + { "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoand.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomin.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomax.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amominu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomaxu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoswap.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoadd.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoxor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amoand.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomin.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomax.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amominu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "wrs.sto", rv_codec_none, rv_fmt_none }, + { "wrs.nto", rv_codec_none, rv_fmt_none }, + { "lpad", rv_codec_lp, rv_fmt_imm }, + { "sspush", rv_codec_r, rv_fmt_rs2 }, + { "sspopchk", rv_codec_r, rv_fmt_rs1 }, + { "ssrdp", rv_codec_r, rv_fmt_rd }, + { "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, + { "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, { "c.sspush", rv_codec_cmop_ss, rv_fmt_rs2, NULL, rv_op_sspush, rv_op_sspush, 0 }, { "c.sspopchk", rv_codec_cmop_ss, rv_fmt_rs1, NULL, rv_op_sspopchk, rv_op_sspopchk, 0 }, - { "cbo.inval", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "cbo.clean", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "cbo.flush", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "cbo.zero", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, - { "mnret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, + { "cbo.inval", rv_codec_r, rv_fmt_rs1 }, + { "cbo.clean", rv_codec_r, rv_fmt_rs1 }, + { "cbo.flush", rv_codec_r, rv_fmt_rs1 }, + { "cbo.zero", rv_codec_r, rv_fmt_rs1 }, + { "mnret", rv_codec_none, rv_fmt_none }, }; =20 /* CSR names */ --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197766; cv=none; d=zohomail.com; s=zohoarc; b=MM3kNmiaZGGI7pY9V6Po1WD9olVjtt5IPawTbcZgp6ExRbN5VeoS43o6oSzadQAJPy5OeM0oeecNLaLlCVe+tl4+9dOauuaQ33AG9gN6J9jU8AmTNmJ4zKOO1BuDdiypd/3aLxFmUFAg20kEEVlP8uP/fQNlRWWJVFncSeVqYzY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197766; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ZVsDsTudT9XSJrI4vG0rDBo8u+xmKSjOUGQovOsJcVY=; b=ZkCyLOadAEpprCQF81WW9OhMMjNBlOcXvNueW7QWHWfNEresh0k8XhAmFgNV9t5TCa1UdStLhmnxkAE8/XZz6QBcKkLEoodjkx6uDRgsYR4WMQBzmyHhRGD3VGfAeOIiv4aFGwu7eGM0XfhUM98o6WZs850uXmUEFpq7dFEW/E8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719776604951.063518530868805; Wed, 19 Aug 2026 20:49:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkC-0003Ze-Ad; Wed, 19 Aug 2026 23:47:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkA-0003Ql-MG for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:06 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtk9-00048N-3J for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:06 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-38deea72eebso1835707a91.1 for ; Wed, 19 Aug 2026 20:47:04 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197624; x=1787802424; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=ZVsDsTudT9XSJrI4vG0rDBo8u+xmKSjOUGQovOsJcVY=; b=Cnj5q3qYzAUdQuLu6gZBCsbDBqGJdhLXRsdk4W+Y9P2HCWjQpEh1GIr6uvZgbDRrBL YZIIE7TOYMQAjbrutcedyKzPSIpCP68njacwTmhEMUXwzT9beRXKi6n0p66idiRScrju jJNI/2oPvoen2V3OXWkvVh/NlwpLUAu0JXhKQphXjNxAiWfHqJLiGMCRM+1kPo/BJtCh YrTYvxlycbCHj0EJKDdNCVRGKBemL/kEPmxp1gywGEU0FWfndiLYVf9ocdar8F5UPNaI OzxGw2+u5lq7uM3fdsepYGRC22ikr1UDd2lK/16i75nVnMEsIBD49apnzRFN+6Ic6OWp yfcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197624; x=1787802424; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=ZVsDsTudT9XSJrI4vG0rDBo8u+xmKSjOUGQovOsJcVY=; b=AGscT5WH1cIdjvO1VUJw2Aq7duWM+TkTRHwJomyAGfCPmSAWNgP3ZraP0vAhswa7t2 lv4o5wkg+J9p2OM9BS6opjvT7mrsU4s2CFLL5t/C/IvNDDrjNzHf1lxIYAGsL7ziLzlk xydDZq/lLReD9SoCKIui7q9KaGnl+Gg2CRpBme2ciTFr/KmLFf2VRsxsYKoWZNa2dLfn m/henLpWUpI+qEoIdzNRSTJ5OaN2S/pvbaeJMvcPzL4o65O8jeCc4RqEeccva20+omSd U+HRBRfOXY4u21iJmUmhgOQWNy2focjQakPnL1wiP/UiLfrXLJk9wg+hhbiUenoqNjoc 4spg== X-Gm-Message-State: AFuF++m9X8YdNrHi4v51BYaYSy28BdSpsLrBFs++mbAenjCAMiDML/aL McYlE25ScBvmAAPwVHG1ugi4V8aBGzcP5dzFoC4nXX9c4FTQ1TXSwb4dHQi3Hg== X-Gm-Gg: AR+sD10bCpvBRpjB7wADzASr0XIcTo1lofccOA8XVmelA1JSUeIS8/3rPk/85VArFK2 3nd1gwRom1NCUAsx/SuZ0G4qeuNfiUE8y4zQLrldY5BwQWrV+XJOodEV3tYIDlR1xJwbZRytO32 2+oYyHy56kBJ0xUWN8RzrRtrQuHbFkeDUrOg5PNF+ilobrpU1uDCqw3pnQ50X3vdjIuAFE2G2EP LzZX9p/rr5g152b6lKmFAKRTgRI6BwBmC/fGmGRByCuBgCzs/Vu2rVxYl8txyzUjquxwtCBnvJz OEeySHAQTCzjkw1xflrwPQLDXhrKdEItkmSny0cvuf7AhP/3w4dKjs8SDJip9eFp+FqhGn+IK4a RKmz7TCAHTdYDmZsZuSdN5VP+u6L9i3ErHjTH5dF53z7YP8iq8AotprLQNKoCLTc2jdoFuIc4gH 4d5GycevV8o8QFLkdikuWSXvoKXzviwnUzcDzg9yEY1gw00DKN3gP2qOb9WWnJmXPhMlVxSliGk hKXpQ== X-Received: by 2002:a17:90b:3c8f:b0:395:4de4:92c8 with SMTP id 98e67ed59e1d1-395810e9626mr19183261a91.15.1787197622957; Wed, 19 Aug 2026 20:47:02 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 47/93] disas/riscv: Drop useless const in structures Date: Thu, 20 Aug 2026 13:43:44 +1000 Message-ID: <20260820034430.1186695-48-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197766597158500 From: Richard Henderson Individual fields should not be const, only full structures. Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-12-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index eabe193b4f..3325b7b4ef 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -174,19 +174,19 @@ typedef enum { /* structures */ =20 typedef struct { - const int op; + int op; const rvc_constraint *constraints; } rv_comp_data; =20 typedef struct { - const char * const name; - const rv_codec codec; - const char * const format; + const char *name; + rv_codec codec; + const char *format; const rv_comp_data *pseudo; - const short decomp_rv32; - const short decomp_rv64; - const short decomp_rv128; - const short decomp_data; + short decomp_rv32; + short decomp_rv64; + short decomp_rv128; + short decomp_data; } rv_opcode_data; =20 typedef struct { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198292; cv=none; d=zohomail.com; s=zohoarc; b=G3NUd4kA3Bw2hF46/fQcMb0Cqc97UHBga2aQZqthRcntHP+nlavZy6wxjUKhNi1NmIK0DB8JsPcbXF/tn5ghxSziSFWUj0opnKK/pxZw6pRNaIUdrD8lOLBWvc/UxKmiRNf9c3W4J9gdN77NUPkvkXWYDtiTZzDNIsfYQlFCrM8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198292; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=p2ERpv2R5tDGDX/CspojpX8vl9OuHWWYGhdlr3yYFXI=; b=MsORZSCDIku0L3nox1oaQJqoJbe+PZyU9MtIc6sw1IkBVTAgq6f/KyVzeZBkPM2aSSr9quv9KBcLUee4BP0bhN3h+cNtA/crTqkJcV5+z9DZdxHGXtuHzUisxy6loKNbZoxhw/anm2YVrrUuHVpvShpwJrTYZgr6wa6yuJFNrmI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17871982925641010.6904093142379; Wed, 19 Aug 2026 20:58:12 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkN-0003mn-OE; Wed, 19 Aug 2026 23:47:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkD-0003aq-1R for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:10 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkB-00048g-Jb for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:08 -0400 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-38e041ea211so1772531a91.0 for ; Wed, 19 Aug 2026 20:47:07 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197626; x=1787802426; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=p2ERpv2R5tDGDX/CspojpX8vl9OuHWWYGhdlr3yYFXI=; b=KdW5U/Ityh7h+YepAHpCdleIk1/lgrciqdYRKjxGtKYf7b4xhHJeEVlUM1HD4NQyMm 8qFnaiJuRXkg+izDM19VON0qDpX6z0jZtNmezJD2BY+zMdxMMROYuXZ85cDnbxKDFs44 uyKPqkOGev14iJhWTaaTs2n9m1RW+ph8xpXG3e60+AHu+SPbvKPN/8in6GevdbmjHn9T r0nhdicqYd568p07528Eq7ovmIZaEAlnidnQ+PRv6vJR05Orx2rkVPhl/CwSPJ0Xjm07 ZkGQDpP0hOIWrbgH7KZ50ZTYxAp/Q9F9seilWw5OzyfujP4TGc1LBDbeFgbEhzBL+pLO 5XVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197626; x=1787802426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=p2ERpv2R5tDGDX/CspojpX8vl9OuHWWYGhdlr3yYFXI=; b=i/cBCCsTbpC34E5D+7gOVfxfbiBnyZM9IcdMetnWnvLHv0QQvPLzXeQ8kIoxUMaodS BsRai/8RXJQ1TbDejfI6i/MLu44hmf3LDFUKh5rvZimsPFT/y1Qg2HQVuUsErqoRPCo0 AVEHPpEtyTXu00GkNQeobd7VTNWu9cw9D/HfKnpofDjXay4Yc51/tiSFZ3fS/mf1Badf 7Z9iyj/0w+d6rkl8B7lJRnz5JjSij2olOedPioQEzG6mXyT8I8T3Sv1/H9B28aXRd9UP KsahSfEhgw4FmBZrbxFJ+GNeZeuLPZ6ETJM5d/4QuWai9/SMWC6rM7oolpJ4O/9A3Cys QmAQ== X-Gm-Message-State: AFuF++naU9hzfcoj3sw1MU498GvuEwW8ppRHSHFv91Okqw8F22ai/Q5L /68bRwYFjfPJTwnqE0ODn68LY1aibLpRe0sjfmi3nU6adX45pOgh3yPXoXBeig== X-Gm-Gg: AR+sD11MMhpVdf9jWMh6UEdY9YFGI+cjMyx/S+DAKKkPDk3wTtW0ZNKuuiBzveM2Huj 2TpSsBS6dsBS2fWlnP+Q7zZaN5fghHhBYdWSCIqpJmQ00T3W80Fk22vw21UyQtBEQi0DyL9lCQS mrxxymDMG+bcAWUftUzaVceMTh8G6B7oGhcJm8lpH1sF6Bk0piK5V41Ah9uY5bGZPfIDq19G2sj ddwUw/yMnpgtj2wWshLA/GOK0ppDQiN/S0svS77K7/rOQKK7rOAbmKKSrwtFLp3U4Q6hToyXM+l CMr2BF1kRGCn+S6MAnydakoRvMedt4i15WX7J6Nl7uKxg1um6bJKREHzVmjojl6FY6H5K45tCBp y8WkysxclFkF5HHxv86a4ofaVNxVZcxUKiY8rbx4Q6xA9VaO6slZa0wDUzG6USivhIxRxagwao9 3EJZWYwzWmEr3/aBhSiXjsusa8usMWy5SKWn6jvSAwo2R+aVc04PXFKy8x8Ikzu+ptKtve6Q1Kh 9uv8A== X-Received: by 2002:a17:90b:4a46:b0:37f:e326:6557 with SMTP id 98e67ed59e1d1-3958083fc60mr17335792a91.4.1787197626309; Wed, 19 Aug 2026 20:47:06 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 48/93] disas/riscv: Drop codec from rv_decode Date: Thu, 20 Aug 2026 13:43:45 +1000 Message-ID: <20260820034430.1186695-49-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198294367158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson This is mostly write-only, only used in one place; other updates are ignored. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-13-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 1 - disas/riscv.c | 7 +++---- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 3325b7b4ef..31bb0db86c 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -197,7 +197,6 @@ typedef struct { int32_t imm; int32_t imm1; uint16_t op; - uint8_t codec; uint8_t rd; uint8_t rs1; uint8_t rs2; diff --git a/disas/riscv.c b/disas/riscv.c index ec40abb618..9813d75feb 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -4603,8 +4603,9 @@ static void decode_inst_operands(rv_decode *dec, rv_i= sa isa, { rv_inst inst =3D dec->inst; =20 - dec->codec =3D op->codec; - switch (dec->codec) { + switch (op->codec) { + case rv_codec_illegal: + break; case rv_codec_none: dec->rd =3D dec->rs1 =3D dec->rs2 =3D rv_ireg_zero; dec->imm =3D 0; @@ -5369,7 +5370,6 @@ static const rv_opcode_data *decode_inst_lift_pseudo(= rv_decode *dec, if (check_constraints(dec, comp_data->constraints)) { dec->op =3D comp_data->op; op =3D &dec->opcode_data[dec->op]; - dec->codec =3D op->codec; break; } comp_data++; @@ -5407,7 +5407,6 @@ static const rv_opcode_data *decode_inst_decompress(r= v_decode *dec, rv_isa isa, dec->op =3D decomp_op; } op =3D &dec->opcode_data[decomp_op]; - dec->codec =3D op->codec; } return op; } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197829; cv=none; d=zohomail.com; s=zohoarc; b=HnMVhKYB5uvhnbtkCy4pbt05WYzTTyF8cclePirYlb/97ysKbmqSaOxRAqFAZ1K5W5+kwuXXCszn6MgVtALJMVZco5CQ3rGk/mwOw/sYE4IW1Vhxvr6anmCrvgTXXvy/6t89kEFTVhxDnd1U671THcau93KkcsTfJSkDJr2YgiU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197829; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=/dfTpCPKeINTMs5DuO+JXEx9y5VLl487hSHIWrRqxGo=; b=PA3UmVjlJ6GIEwesfKLvbsrIlAKT9aoIHTxbm4K/QKtoLCzNJwuC3DzlmxWRqhUWpNNLV09k3W7SeyNALi9ST4UsZmFKyOaATnArVPA5gH2bf4rUi8Z1oZtfxYS9TcujITmSsEeiSUBdecRU3E7m8dxo22r7Dt7eea/LQ+CJW6o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17871978293821021.8029738395435; Wed, 19 Aug 2026 20:50:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkk-0004J1-5e; Wed, 19 Aug 2026 23:47:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkG-0003gB-B6 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:14 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkE-00049A-4g for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:11 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-38deea72eebso1835752a91.1 for ; Wed, 19 Aug 2026 20:47:09 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197629; x=1787802429; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=/dfTpCPKeINTMs5DuO+JXEx9y5VLl487hSHIWrRqxGo=; b=mP5EP/PF81zuJvu2KZBfYEic8b2AxgGNbuhIdgVSq0xxyvwgoWp25OM4jm/jfrPjhr T2e3pTcpEwZxeEQ6GZZodpR9qrPfSD3NhIWi8ZtH099qJzzA6Lz/Y/OG5ekMt0v98tBD slX2qJq4lI8gHpwtCtZlu5nU2D/1gfxye9OPftH6iEZP23HQOXKPfl+GVIHcGV7ZZijv h3bzWnt8pFFQSPlac7BbR4fcIPHASC2mOXza5KCWB+EUtFD2lHWuiuGMAojexPTfVRN1 FiJmiE81uDsSZh7vc6uXZvvjF7Wqu2bmG/7Ut0wlnQjqLpcLcUgtAtoF4E+F+3kO/2PP faFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197629; x=1787802429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=/dfTpCPKeINTMs5DuO+JXEx9y5VLl487hSHIWrRqxGo=; b=chRTnvqlnxYixd+rRbIZaL0TN/RjWKkdRkh3Y9OKiJH1X5eiCVbL65bIIwcuy09PSr 6vpCMy023KUMG1urBqveq60+nTjQEJomNUATP/1FQuz51z3dg2Qf+bIyd8ijUi0nqKtg C6bjoFk5DJ5jYgHalrl8ciQ2Xd1m7UdcFZSJKbdwfAQrfU2GhiEDPq8AqpUrAt5em6gT MlyrRpSi8AMNdQSwQqFDIERYiQcIx9V3nSrqhM9k74oeDhiIbtfUHFTloaNkhrliIi0Q BTq2t2Th7IKFiigXqNCxwosgjOa+Q69A+CyYZevs6MhZnCawoVoSTmAaumV45nlPDag7 /FLQ== X-Gm-Message-State: AFuF++mVcXVhJdeVB+lqYCEmGk8r+fb+8bePM4FLewq+71k2DhXLNWFz LaIczCyPtv768dimbJC6GAwu5NdXWaZ+oum7SC+P6awMr9Z+0erQDcjygbXjnQ== X-Gm-Gg: AR+sD10JWqa51AaSd8MI+Gyk5KiWpLnbxbumGsEqSfEpmsoOrxnsS7YAD3YQ6oIFy3G LwUc9etTOW7LbVVq3IEo6fxZZGWRHpoJL6YYDZwAw6tj08pUpKu9pzShCsfGcfYLt7WTAiNMtLR AJVgp7toz5PvDKGYsiiO99ymYR9j/LAf+Hpg1/TIt/M8tht1wF1JujfVVXwKfvKGsdNJlxlclNa ICEjhf0KwEaAXcMeHbwZl50mnk3NK1sLci0UIdBcBiVTjKmOXvoZdc2MnwoD2CbpXfQmYRFgwDc L1wDeLlZKAWQ7dkacWRyDkJZ8m0eahIQYPrpabZlxxRPJcn7XGtyHv/qUHyweQPWaQZ3KraeaKr 6//IpnKB+TCSYKDSEjvXLxXRP80UTmRXhwfWwi/ry1WbI38GV9zRQqfAkbJfR4onx5n2q1JFQ3T L/xWxPNofLE+KlekvnwDIVlocDIzBS8BqhO8yjyPLy7sBm/bCl6pd54wYibZ76jBH9dpYk3Aa2B DANc5P7+FwejAt4 X-Received: by 2002:a17:90b:4a05:b0:37f:c22a:c188 with SMTP id 98e67ed59e1d1-39580a80a65mr17774606a91.4.1787197628905; Wed, 19 Aug 2026 20:47:08 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 49/93] disas/riscv: Handle c.addi4spn imm != 0 during decode Date: Thu, 20 Aug 2026 13:43:46 +1000 Message-ID: <20260820034430.1186695-50-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197830874158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-14-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 9813d75feb..8a957e6a1e 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1885,7 +1885,7 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1 }, { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1 }, { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, - rv_op_addi, rv_op_addi, rvcd_imm_nz }, + rv_op_addi, rv_op_addi }, { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, rv_op_fld, 0 }, { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, rv_op_= lw, @@ -2952,7 +2952,11 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) switch ((inst >> 0) & 0b11) { case 0: switch ((inst >> 13) & 0b111) { - case 0: op =3D rv_op_c_addi4spn; break; + case 0: + if ((inst >> 5) & 0xff) { + op =3D rv_op_c_addi4spn; + } + break; case 1: if (isa =3D=3D rv128) { op =3D rv_op_c_lq; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198398; cv=none; d=zohomail.com; s=zohoarc; b=AM25DWz27W3y42wfAntGbZGLDfto68kCn9OZwiyMLZeIYTq7LUjK57r8tNT5utAt9N0EBScK82Uq26szxiclZVvJfMb0/An2KZDjV6LhCeBrGIBqsrb4+QnQrSSbIf2LEdyGzrsmscIFl/jZmLGzd/1po3zi0Y5TwTWGW4rZXKE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198398; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qht+Lyy6ya77fhoK8407K/BbvZSE066z6kEHDiB1ixw=; b=NdWv+J1kvhOvk7FNiJw215RmiQsRWSdFJugtLImDmYpTzNoPtqmBeGmYgI+eCWIK4/1ketZzuOZUgCh2Pge/Ot1fWu6h95ZcsHBLBzRd38+gUR9aIluWjQHjYPldA06I55wUgpKG2BwZcpelH6rOLHzwC/mQ3wRVq+I3fE3XL7U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198398551271.2189490803826; Wed, 19 Aug 2026 20:59:58 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkm-0004VV-Uj; Wed, 19 Aug 2026 23:47:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkI-0003lo-HZ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:16 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkG-00049V-To for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:14 -0400 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-2cf452def93so3677065ad.1 for ; Wed, 19 Aug 2026 20:47:12 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197631; x=1787802431; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=qht+Lyy6ya77fhoK8407K/BbvZSE066z6kEHDiB1ixw=; b=AjbGck1iqubos7iBfXFdyBYsKVF4+Q5zyzng5aogr3D5AYJDaK+H/ZpACcjR5oEham 5jXItmhqdZlf8PVeV0szgSs1BFMSmyxgtTn5mc7W9nDFd0VQP+MUPzY8oVXtXo5mTi+j Zcn9rYNe9RSWJaP0QtDZkg2hQG3NuM0RjWdMAErsnsdMLgXqes1jp7KYa9ij+ECy0saa 7sDfxcTcOxjpay5FxjC6dt1xpvIF9CX2sw7d4Fd1C9uNdcqv4UY+gH2Ya8R7MpSscSrh rkZ/mXUVMbwy3IIb4p4/Zwn+8gyuF/Fea5UW8nvv7IaSFRvR82OSL9cU7BcCCI+dpCOT udmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197631; x=1787802431; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=qht+Lyy6ya77fhoK8407K/BbvZSE066z6kEHDiB1ixw=; b=IW/gCS2pR2cXSP2q9AE5eJDmXcixlnk1awfTRjKC4xywvKPrEVCJglIVJttV9mKKf/ 6f2DI3GN29CK2/vxGcO+IhfGSIm2twhNwkHhwC3kP4lrs/ZcLZ53sKuLLL2WwGQhrz1Z dtu1Rh8zsVi7v9MbzrY+kN2knz0YeCrOGP+DpvgpnO1RIzPkwlDchoUExDbk/l/NyOjb x3rVSKXbA58kW0GcfNsyNO5+ZVBYN539/T56O5HEcV6Ho99UMtX/6yEZxCsCitCOyfqr 9kIccuhQJ0ovdCqC3msQGGuUmav0e/vRClu1GIqbzy8lCmvNkzk381wpD2NZLC8W1hGo 8fBQ== X-Gm-Message-State: AFuF++nCfgsWiUHHH0/HSRC+2DV6Dd/p0c+NCF5Fvs3PSGEtvNbY0CcR UafoSmutu6sYTNq6S1ZUM4/SgcQKGtudGcdUBq4g2fH5Hp845Sagz9Ny4eiovg== X-Gm-Gg: AR+sD12tXQTUq2jYJnJYYPqq9bw540pVACiQ0aGtO5YAXYFMjq1wl79uoI92vMOZh5t XdcFRZ7gmySOAxinmjPCI14aak/SonQunM+xDiD8l4wKIrWsZ0/SZNHgiIxpKa7dfxbYmbu5cLJ u+D1olAao5fDaAjOcdwFvKIcVTYNjSECQTilMnbL0RszFdDu3tRS2bXrjHkpvVIAA4z+ASql96s lQXDgFkxivbrPmazKGWkuNAOgjwYUK9boYwxSMxNsZ0Hb8jrlh8Fh+EVOykocJtS464zySLiYjz FjHOPJWUerglSc2lkA0g2rVpgj6PL0R1IzO4X/Fs7MpnACTtC6ezj2p/F8cS+31LlQ3iCsUnFPH CrYwIdgYQBW0gx9QIXTNf5Ki4hlrBDNoRg/T+uys2WmzorSIBntBQjknhUPzmOEAKqqAVF8mP+Z 4qMz5hRedR2OdM02MzQCBSK7tnJYaZYL35Jk1lkTHUdJcHMQwlVkK0L16hEuAf7kJBKk98aNcer ueMXA== X-Received: by 2002:a17:90b:3902:b0:38e:a52e:a3c9 with SMTP id 98e67ed59e1d1-395a04ea8f7mr3957748a91.8.1787197631480; Wed, 19 Aug 2026 20:47:11 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 50/93] disas/riscv: Simplify c.addi Date: Thu, 20 Aug 2026 13:43:47 +1000 Message-ID: <20260820034430.1186695-51-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=alistair23@gmail.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198400716158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson While c.addi with imm =3D=3D 0 and rd =3D=3D 0 is c.nop, other c.addi with imm =3D=3D 0 and rd !=3D 0 are not illegal, but are reserved as HINTs. Go ahead and disassemble as c.addi rather than falling back to invalid. Further, there's no reason to differentiate c.nop, since we have c.addi -> addi -> nop vs c.nop -> addi -> nop via decompress and pseudo translation steps. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-15-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 8a957e6a1e..7978ffb378 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -263,7 +263,6 @@ typedef enum { rv_op_c_fsd =3D 231, rv_op_c_sw =3D 232, rv_op_c_fsw =3D 233, - rv_op_c_nop =3D 234, rv_op_c_addi =3D 235, rv_op_c_jal =3D 236, rv_op_c_li =3D 237, @@ -1896,10 +1895,9 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, rv_op= _sw, rv_op_sw }, { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0,= 0 }, - { "c.nop", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_addi, rv_op_addi, - rv_op_addi }, + { }, { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_ad= di, - rv_op_addi, rvcd_imm_nz }, + rv_op_addi }, { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal, 0, 0 }, { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_a= ddi, rv_op_addi }, @@ -3010,10 +3008,7 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) case 1: switch ((inst >> 13) & 0b111) { case 0: - switch ((inst >> 2) & 0b11111111111) { - case 0: op =3D rv_op_c_nop; break; - default: op =3D rv_op_c_addi; break; - } + op =3D rv_op_c_addi; /* or unspecified HINT */ break; case 1: if (isa =3D=3D rv32) { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198143; cv=none; d=zohomail.com; s=zohoarc; b=h70g7O15m9XFPkghvMqzLzC/Maf0c1GPkLB5PhDIOAnUAicXKfhpYV07arPvO5GUWT0s+P3ZGRkt9SgCfR3PL2YTtmj83GLEgFCnB+A6oxmNfrHQb+IfOfTSMI+38rEDCxfDRsEMOJBENfM/zJfc03UBetnun7fjZP9YWp5Xz20= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198143; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=y3jYg6CN2EN6XbjmWcdyGyDrijaVSsDsBzbN2Vh61c0=; b=MtFLNgE4H7si91k7tZqQkWwVm4CGV9ncIZvCGgeQWyWhXJbRvkTn2Fh5pWZc3cLvozJtZwuStx4gNL9paYoRnsbVSXyNmiTED00oEcvgPVskt+9/JbJHLtSTZQtN9IgEXDNEUQ96JK2LQGwW8/lWzt8QRKzL9O35QdELTE6Gh9c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198143439670.6990778284335; Wed, 19 Aug 2026 20:55:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkm-0004Vl-Vp; Wed, 19 Aug 2026 23:47:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkL-0003mo-1E for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:18 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkJ-00049q-K9 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:16 -0400 Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-8487214ad2bso2283704b3a.1 for ; Wed, 19 Aug 2026 20:47:15 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197634; x=1787802434; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=y3jYg6CN2EN6XbjmWcdyGyDrijaVSsDsBzbN2Vh61c0=; b=hUF4bjYQaSVExfloYQKQt7jfNHhQD6EC4G4N60Xz4kMsRJ9I3FfCVk3iFTY8J4AbBv 4OgzDGjN011q79sHMcQEySWMXoPWR1/nDxe2cOJGGECkQWwovbNWu6F5pSY3ML3c9+L9 TvbUNwKIOOkVHwVqlflE9/oac0AJm/0WqwqRhd2mMBddFstv9OA72ZXWyLLK+Rm+TGvN D7h7Tjjb9j+VtHViSnaU+sNzQt2c3fDHXF0xswAz8Q19mr53VLsf2JDn2xg27sxc1kyw fTyBE1Y2mBwKMc/OVuQ+aFUxM4duZEVAC5ic8dtoT3xEjtGWpL1sr/nMs2G3i638E/Mk uiqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197634; x=1787802434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=y3jYg6CN2EN6XbjmWcdyGyDrijaVSsDsBzbN2Vh61c0=; b=iculV+uoSpqSXREL37nbpKfq8uxCWp7i+e0amMwnK6ZhJtBPiLlq53xWPl0tOMAEK7 jUUvF4G255L9jcHqUjngcJ2/myWyYYePM2xWOEjkIXhGD6CEuJyKE9ATrgiwF69xG/Rw HiPL5326X7JzfiEMcuUnYMJjF8bQ/3zFpbBxqN0jq0zCebTNBHYIdbU40rkK7EZpClxE rP9M1sftCAjSdQ1hzaUM99jt99GXAkqPOhZOD/92JF9F9qOPK4ooIYIbjp/31k3/VscP lh8U6sqzhK7LFCv/O9MDiLj/X61ImgozZdMBbmRWD0iAAkrhKP8kjoekG5jgKHHlLhEq 7Keg== X-Gm-Message-State: AOJu0YzaYTCo9BBMXjBxaSTsZBmwjchFIeOz+c0QW2ZlLaoX/KN9ephn KmnAKAwrP7mkNWm9gWJYPUezr20EuHvzGT8eGGU4UGZ/EFfS6djqik5tEBSnow== X-Gm-Gg: AR+sD12fJ06v/wRgNnPKLR45f+2M2Ll8hBUUL+U/WyKWaoQVboNKsCb2+JXqmbK4DK9 ZNxntWr/RFWXoESuD0OFXsWr8q6AWr22sBzRZBcTcJy5V3JCea5wJi1IRtbcqu47fcamqklloZm Q5oHtxn9TAwJxA00uYNzMo3StGpymww/t02d1EMssHLL1gD3DyiSs7fnv7c8yrVT9YT36ojTfHD pNGIj4sKUSLdMesT3DHXi/z5N0opt1Ih2yiN10kcoTP3HQWooNUOZ9r0JQ1pYrl7KGdea5e/ezX GvwJR/dBaN74oCwF02kYQKIjxVJie7EFN7XSsY7S8DD7HgyvLR3nV7Ef2CuMi6m9oVeFd7/QCNn hxDkRDO03jhUbzsX2fHi8CYp/z17yz8jcxfwquJlm8LyVb59yvacukGv5m0drqWtI+RU3VQcP7h BMmMovNVYKUSfxXDIG11rfqmXSUolPETDX4/XHSYruzHZ4i+zsV6AWugV7NgaV51jfqu/UXXb/a cjKVA== X-Received: by 2002:a05:6a20:9c12:b0:3cb:96dd:2477 with SMTP id adf61e73a8af0-3cd010879a0mr19187661637.8.1787197634116; Wed, 19 Aug 2026 20:47:14 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 51/93] disas/riscv: Handle c.lui imm != 0 during decode Date: Thu, 20 Aug 2026 13:43:48 +1000 Message-ID: <20260820034430.1186695-52-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=alistair23@gmail.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198144240158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-16-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 7978ffb378..d6fbb3bca6 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1902,9 +1902,9 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_a= ddi, rv_op_addi }, { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, - rv_op_addi, rv_op_addi, rvcd_imm_nz }, + rv_op_addi, rv_op_addi }, { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, NULL, rv_op_lui, rv_op_lui, - rv_op_lui, rvcd_imm_nz }, + rv_op_lui }, { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli, rv_op_srli, rv_op_srli, rvcd_imm_nz }, { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai, @@ -3032,9 +3032,11 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) break; } } - switch ((inst >> 7) & 0b11111) { - case 2: op =3D rv_op_c_addi16sp; break; - default: op =3D rv_op_c_lui; break; + if (inst & ((1 << 12) | (0x1f << 2))) { + switch ((inst >> 7) & 0b11111) { + case 2: op =3D rv_op_c_addi16sp; break; + default: op =3D rv_op_c_lui; break; + } } break; case 4: --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198144; cv=none; d=zohomail.com; s=zohoarc; b=ZNi+hMU2JpIDzinz+n4qDTMCrMNsIEzgNwzWQmoB0EePXP09CFl0RoJMx5AXccQ7InkeUXuWj690XsjpcCQx9NoxjN4kgRVDd6xrQsRPEbIkFxoElBg1KnixwQvMQ/M1fMUCrnkq0/gVXPZ1IWUlRWhXlsouk+L/vinwz0dumX8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198144; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=wqpgx19U+U0hdUaAa6qWGdcaekLx063/m+xN5qlHCgk=; b=K46XRLtX0Q+eh1RSOsAMX+Ai7cBWceDrcxxJsqgIWUy0Rusj9/2GxT5pk7E+tYYI/715rptIgQACaWmM99ch7c30Vz+60NcAy4VaHQrOWAxMF0aOMwF9SeXZoWWIJGOkSDA3kqyljBRX49Q/ijWwxOfHfS2wlw9RVY6YIfZQEpA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198143951601.6771090073916; Wed, 19 Aug 2026 20:55:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkq-0004y7-8O; Wed, 19 Aug 2026 23:47:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkN-0003pZ-Ou for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:19 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkM-0004A2-7V for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:19 -0400 Received: by mail-pj1-x1032.google.com with SMTP id 98e67ed59e1d1-38e347638adso1950775a91.0 for ; Wed, 19 Aug 2026 20:47:17 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197637; x=1787802437; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=wqpgx19U+U0hdUaAa6qWGdcaekLx063/m+xN5qlHCgk=; b=nvdPNwJOQG65zzMBDwtpbKicBztOGgqzhxHR0vIGmd3/kSDHxZSXF+R0gjJytbmDeo sVvAOUBmiFwwG8RKqK7eBS34xM1TS8MEI6L7NrRXUXaQVWMcdhvsmB06rYVA0mU/1Ck+ 4zIUR0Xg+vysvuspmh+o7Sl87qwtoVmEu9yC4bbIwOcKIGcnzR2hQCu6ePXyaX85imO9 CBtctVeE1E15R5srabvwfMngz5M1GeiZdRA99n1u7kutgdQdqhzm0mpzaz6lLd261XJp nP9yLE9FH5OypR0ziZeC34tV/ZTfp6zhOkqEsWwEoKlCdH6sK8IEQu9MDBekEcZGPD7O 8RdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197637; x=1787802437; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=wqpgx19U+U0hdUaAa6qWGdcaekLx063/m+xN5qlHCgk=; b=a26/cF4/HvEui9GDdWLDOzT59yk11hojbwxcUZi6LL9Y31qihZ9hxN9MCoe6PM6qzT KQ+AmbX+quc5Q/LqggG98tsGumSUTwcqkdChP24ndW/jdW022M2hhzKvqn5m/PQ9K4ce pjghV04x/kHABV3nFPwW/muH1VnBQKn5R9zhonfCNO7PPaA5lnFd9+g9F3GwqFZCciHw zrPq5FE8H+2zM+5A0RR+UmMN12kUVivLaoS3/qtwVjJ0paUmGGjl3TlaL84a8wbfue/u qy02iFjvE4OfxZa0REDD9N9nvS3VNnFGqna5Igot3TOYKw+WGE79tF8s0eLJTamd0uRX 5jcQ== X-Gm-Message-State: AFuF++mDaVsE5JjOft1k8/DnPDz00kTceOZ3ts1oOeXf2jhxb39p1/sG WGJLNntEWbeSfDSFwoN+5VwX4ptWls+ed5WWv5FdBJc9vdGdh79Cw2JTJkerWQ== X-Gm-Gg: AR+sD13gVFVXnE+UvI5yVrW3NQPY+9BVqfzBqkVePgAUT/U5IwlqFX4aUGuqXInyhAZ 755Gv++lTRRY+yVKjzpYc/t9M0oskuUrBvx9Nfq3eqQKLo8u9SezDWE3vGf9Gme6MXg6wnt4tNG Sykj6brpyczSU9lVRgO/4I28AEG1n0Dv+Hy+ZT95e2VfzSeeLs0oldiZ6/HH/nPjoSJSRPl4fA/ nj5axPbbLUCn3SBqBcC3VxXDFudR+RUE3vwYy+ePqpwbi29yxfApoFpLgTYQSJSkAGceXl8Ps6h bTJXAxwvEml1s4DYuokTdN/3M7X0kNdjc5SrOyfHsctDjTu1EgduDX1+IKU+s6TplPOOnSWJKBx QI5Mv17DrHgGvR+o9dN94HUXw5HOYM50jPuOdFnbfzSVUo1toXKYDaoLfouCeaWfUvTsJtWkaEV D8hiUKfVvyHPe/t76EtQ1Zd/1Rm8Tu0YE0Z7bNCfMjGirAA3nuUbSZ+VS/X74qOglWB9BcyGF/1 XYcGA== X-Received: by 2002:a17:90b:1804:b0:38f:dec8:f7e9 with SMTP id 98e67ed59e1d1-395810b5a15mr16885007a91.12.1787197636737; Wed, 19 Aug 2026 20:47:16 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 52/93] disas/riscv: Handle c.{srli,srai} imm during decode Date: Thu, 20 Aug 2026 13:43:49 +1000 Message-ID: <20260820034430.1186695-53-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1032.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198145917158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Zero shift immediate to c.srli and c.srai are not illegal, but are reserved as HINTs. Go ahead and disassemble as shifts rather than falling back to invalid. On the other hand, shift immediate >=3D 32 with RV32 is reserved for custom extensions, and we need to reject those early so that the extension disassemblers get a look in. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-17-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index d6fbb3bca6..a8fbefb9bd 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1906,9 +1906,9 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, NULL, rv_op_lui, rv_op_lui, rv_op_lui }, { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli, - rv_op_srli, rv_op_srli, rvcd_imm_nz }, + rv_op_srli, rv_op_srli }, { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai, - rv_op_srai, rv_op_srai, rvcd_imm_nz }, + rv_op_srai, rv_op_srai }, { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi, rv_op_andi, rv_op_andi }, { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub, rv_op_sub, @@ -3042,10 +3042,16 @@ static void decode_inst_opcode(rv_decode *dec, rv_i= sa isa) case 4: switch ((inst >> 10) & 0b11) { case 0: - op =3D rv_op_c_srli; + /* For rv32, shamt[5]=3D1 is designated for custom extensi= ons. */ + if (isa !=3D rv32 || (inst & 0x1000) =3D=3D 0) { + op =3D rv_op_c_srli; /* or unspecified HINT */ + } break; case 1: - op =3D rv_op_c_srai; + /* For rv32, shamt[5]=3D1 is designated for custom extensi= ons. */ + if (isa !=3D rv32 || (inst & 0x1000) =3D=3D 0) { + op =3D rv_op_c_srai; /* or unspecified HINT */ + } break; case 2: op =3D rv_op_c_andi; break; case 3: --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197842; cv=none; d=zohomail.com; s=zohoarc; b=naPtmgEg8IdktKxuzR9sbLxkWyKGGHVf9ibaKYCkY64EdjmBq4NjjoXdSr8EM4kUm0SXK/ofTueAB/dnhXX/dZes1sGqy5NAaTxgpXuEOTbu/4CMugFaBq+y1I9S3wQNfkIOkxzEyBxeFvpp6DnKdOe//f8RO/VY+/JeVbGnmPc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197842; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=IIaVZ5Le07IarJEOt1XE2S2+XTMommd1hEXZNLsmCmI=; b=IAHzRHRtW2nkDzhOqppIMeyVSVSER+G4rNQPkat4pzloqqF8gbIgJo5Ham0jPbPrysk2XFGwAhYRzqFnJGyxy+HIj0URwud9/9Wyb+f3x6DZgk6cmfNsurbIv55XX1pPjDQOCpLH6Sw0Z6SusMI8CuYv4S2yVDgjOxZ/3R3tuRg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197842136148.8957886260779; Wed, 19 Aug 2026 20:50:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkk-0004IT-3X; Wed, 19 Aug 2026 23:47:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkQ-0003yN-9n for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:27 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkO-0004AH-RR for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:22 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c998fd549a8so1222138a12.2 for ; Wed, 19 Aug 2026 20:47:20 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197639; x=1787802439; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=IIaVZ5Le07IarJEOt1XE2S2+XTMommd1hEXZNLsmCmI=; b=aA9/xPPdh4X0Byi/Ns9j03S2rijjgjuB0m+SHWI0k2UbdAIGeLsp246ZFIi6HIf9OG GOqvTqlJDEESEPOxebDZ730DWc660k8bLBXrj00RgiExifq1lk9/e9PIy7FILny+9R5M c9EucwVh0eNgDa3DL7dQ8HN2RstO6Hi1NxIKDHcdiDfCGlfyNIMUG/nnnGycf+NUNKGt QFiGUGGdWCuREsSjQkVlT4lmt55Y3Xqia2Qm8m2TOFwkITFW6N2EJBColvBWWboVzbEj gUViatx0q2+U3jYAYrpDfx+wk1XIk3lJu6Qhvd/vN5A+/2QxYJm0p99tKDD66J4cv7oF Di0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197639; x=1787802439; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=IIaVZ5Le07IarJEOt1XE2S2+XTMommd1hEXZNLsmCmI=; b=aK1BUeP9Y8E9DJe+OsTFc9Gn2fLYLCD+FxswiovnF9qcYGFu42J6ZdzJH5ZdOQ+OlA DnXYWoEeGJenwzfoeiHLzVE6/BexQHa7m20bM75Lo+PcZQVN52oaEPlaOlw2flEWl5gx Lk5NjDV2yPNh1S0HezlvosJjYzI2eziTE1sgK/KkeT/S0EG27h+MB6w1eOAvuxCmku1/ nlT4FHjqm+eS69/PzRzkd9gfS9H8In/gN/FACwphQ35SvcNZR8IcGwexzhYmGI0kq9yd ziHPGUpCZpnK//dRitAG5nmELxc+JK7GkxkRTNpIAm5lYUAG6TVMMd3mNTuGebQvGUBB 2m+w== X-Gm-Message-State: AOJu0Yy7J7Wx7w2OlchlGprIZBGmJ713Ka4/cQQtkLLzqVPKVwinueZa C5dsCon11Mwa/2Tyf2rNHSknbpFXaEaRqn54v9LTD8es9/tFX2gjMLAZ2/13Rw== X-Gm-Gg: AR+sD10oc2T7HVFi3qS/l22QLlJz7M2tQZ3u0bQ0WaFp4A12kb7DUdebcxu12343sXE iqoAkGt2CEQ59OkFeLnpe6NVhnZkAFDPznJr+TUlYOIDqg2Qz+yr61Axuk2Wm1cutdYDkxM1w/x T1Udfitz7Vvp8kP/jMfxxqYMu9JkdQFTYL6Rn9WJeaCxXKYb2omzS7VHtM2XJ9HD3Bxlnym1Lxh 0H4iWaoBW0SEoJ8N2kYSJ/BGEVqqNkDwq4gRey5ryGU+80ctCjzvyYALlLkP8TmMT1UmfFsO9Vn A1xhehlJtqDepA0cn/mif+nrni5M1mS5kypbsG/Mj5Z/3oiEOytD7+yE+k6oWc7NRCPqNYXgG0P dLhgDnRWMKL/D6ARDejAzd86FpLHaZUEmq7pn3YJh8PHkIDmU0Vv+EtEEDA0bKbiOhshLIHuvLR 2yklT3PuKA/O2qpUcnK1TSb/Rv67TpM9ov4kzuCVKksqQXeBeTjktg5WO4gdieJck2vWqoAc6qk pEFJcOr4c9fVAOb X-Received: by 2002:a05:6a21:3382:b0:3cc:9620:5816 with SMTP id adf61e73a8af0-3cd0164cc07mr18078509637.8.1787197639315; Wed, 19 Aug 2026 20:47:19 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 53/93] disas/riscv: Handle c.slli imm != 0 during decode Date: Thu, 20 Aug 2026 13:43:50 +1000 Message-ID: <20260820034430.1186695-54-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197842970158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-18-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index a8fbefb9bd..77347b557d 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1930,7 +1930,7 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne, rv_op= _bne, rv_op_bne }, { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli, - rv_op_slli, rv_op_slli, rvcd_imm_nz }, + rv_op_slli, rv_op_slli }, { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, rv_op_fld, rv_op_fld }, { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, @@ -3085,7 +3085,9 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa= isa) case 2: switch ((inst >> 13) & 0b111) { case 0: - op =3D rv_op_c_slli; + if (isa !=3D rv32 || (inst & 0x1000) =3D=3D 0) { + op =3D rv_op_c_slli; /* or unspecified HINT */ + } break; case 1: if (isa =3D=3D rv128) { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198355; cv=none; d=zohomail.com; s=zohoarc; b=PXp4CsCsbNM/s6rZhzYrApg4z0VzVd7X3XG2SY3kPjSVObnP794wfk3BmAsaAw6fYzWXh4qAh/PjgPfWrCal8P6z7MBUA1N0ALQZmKeX1GyqNcd5I4WzSUjZb+FO31GvFnUviaIyNj5ANAoUPIW1MbhZz2EjyH4+DqguAlyPq5I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198355; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3+CQdeS4ZDd2cPsyFQmittENkduVaoRgr67sy9mGB6w=; b=D+m+xLXpQ88uxsCKuHo+8wZXwg/e2BrIwYLHoBUoFrtAsEcHG+7eiEubXJqsgOkN1jQvcRDTP0jzLCRoaSilBXcno6YwkAL2T+4wsJT+CG1Ak+eFLRQJB6fyfksE8wIuYeeq/tY5Zcbrfb0A+8e5s4vHEq1CHKhBdXm30AEocFI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198355865326.0838818324838; Wed, 19 Aug 2026 20:59:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkq-00054y-Vs; Wed, 19 Aug 2026 23:47:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkS-0003yQ-Vx for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:27 -0400 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkR-0004Ad-KH for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:24 -0400 Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-2cfbbdfa60bso13265915ad.3 for ; Wed, 19 Aug 2026 20:47:23 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197642; x=1787802442; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=3+CQdeS4ZDd2cPsyFQmittENkduVaoRgr67sy9mGB6w=; b=KuP1qfKVFshRnC7TEBQnIb16+BQN3q+HKr3sk/6MIlAxGI+MWxvVjBkD3hWlssxms5 Tlm3iAOYS9akRRCuDLOnoz9FHWBtQJzuvEkYHpjYmsqF3ibZRCID31/CKRE3iegeGTC0 m8JyOVOXTwQbGQBFzuvj8FIhP0usBCQFpdYMoSEham6yQnYdjyMyjF+r6HKzIU1OSMcq 5TVtr3lmnLheqwL+xe0QTGIiBn4lQECUpf7vlpZ9Wk3auNazUfAEdKocAPbAJJjWukEh WfDU71aZsDRKTcWqqU+mnzp9Wq2QwAO6ELQcXz3U0IQU/xwh1l8hCjj5YaI33gxurNg1 0x+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197642; x=1787802442; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=3+CQdeS4ZDd2cPsyFQmittENkduVaoRgr67sy9mGB6w=; b=NxY/ZXY2G2O0Kd8TVET5+S4bvrTAz8tOR47EiB1ocVRYT+WkCDVqworzjcAqRBoWLu g6f656emohEDYuobsbxvaQQcGlznb8pSGdtlBGSmvi4Isijl1AvcJHj0Vhx19O1zkrtz Gb6eVaRfWnTePzvrY2/fs8fweu19rEdELeAAMj9kAxCZDIjnnbSJ06tKJuRhaQnVrUTm fxhZAF8kapNjcF7tzuoaWZ/3JMBGsQHlJgFCWtsdaBU2kyBHo8Hiru/9Zr7co9ocQFNZ fC3bvOP4/OW1K67kJPlbcLgUQXAzQn0LubZ8yDZFU7QxFFtteWgoZRcfHD99YivF1mUA ggXA== X-Gm-Message-State: AFuF++l2rIWZozsLF1yUf7Fc1oWNJBuCK7NAgykFlP8WEbNIstAny372 YPA7WcNak3rnap8877aO8ZL+hnYAcVj0YPK+P7/tSFsZO734uexsS2leKY2q5Q== X-Gm-Gg: AR+sD132GPHeX6oNqRaSNg64gy36aqFfqlf3U9iZ0a6ZqfsN8TWhnuNkucIp9sphkT1 FV7ZuhDX7NGBS9y9z5vTnqqD7uRLnT/rerBLwR0VrUK5UFMM6gQUluSGujCgFFVa9hKz70do/LL 41FkeYncziWrzYlYbFy4zrjVKZyGU0HclVdj46TkqRBwWRJbUB8TN04aAddiGc8LzwIbxfGDKeG i+PRD3ST1y41LKuF/9reebJWG63ns6kTlKOb8GNEglhWgIXwKIh/jAwWP6gkIaV7B+Ol3mGkHnK mFW8hCZe87zZrlyYzzKOkW1uM/UkEQ5q3X+hiOzuidUnEw+glqUN6Ma8q4ceI/gDZWenGNhENIy zHFeTkATFuX22J7QNixzCLUVY1mTjY98/ISBS1D6ege+irrp/fWg9HQqHGWmaSez9g6/gRzDtJz otC3vILFVTTjVhhulzrN9dX16W1TgqLV5JwEVMMkbzKAvrcK93gDx4Yo0IGxbIoHh2f142/zD5D NBq1g== X-Received: by 2002:a17:90b:5645:b0:381:1f51:1ff0 with SMTP id 98e67ed59e1d1-3958125af4bmr17962109a91.2.1787197641901; Wed, 19 Aug 2026 20:47:21 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 54/93] disas/riscv: Do not recognize c.{addw, subw} with rv32 Date: Thu, 20 Aug 2026 13:43:51 +1000 Message-ID: <20260820034430.1186695-55-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=alistair23@gmail.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198356507158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson These code points are reserved with RV32. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-19-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 77347b557d..ddc2f73eae 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -3060,8 +3060,16 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) case 1: op =3D rv_op_c_xor; break; case 2: op =3D rv_op_c_or; break; case 3: op =3D rv_op_c_and; break; - case 4: op =3D rv_op_c_subw; break; - case 5: op =3D rv_op_c_addw; break; + case 4: + if (isa !=3D rv32) { + op =3D rv_op_c_subw; + } + break; + case 5: + if (isa !=3D rv32) { + op =3D rv_op_c_addw; + } + break; case 6: op =3D rv_op_c_mul; break; case 7: switch ((inst >> 2) & 0b111) { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198462; cv=none; d=zohomail.com; s=zohoarc; b=BCiw9GZok76nUjCIHcha2uZ1L/3BPMp6aIbkdIGhR9qM+RJylg6fd4xabwtPIA+sgxxe0pyvY4ehWwONWJ/8XiEb86xdFiUIScvWtCsSEddRxgmgdkfuBOPRa8DZ6VKxMAZ9ucYkW7OtryMdNveNHd6800RzWdXlvsvz32truvM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198462; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=toVDeATvXKbZsEV6lrO/6YOhYfdtzoWUhVqQYDrEcNA=; b=N42ffqqcBdTs/vMC24tL6XQNofBxjAVa0D3MhAjKGVS8828bPnyj7AAMLCnThyeWGuUt+WWZrfPDyWmaG6iMrwjNEIDHFxDCkjWm35eLku9IxBAPGEBwQzGdMktrQBfUN7OJzZlW3QH79bhpl/cHi4bKK7N2DZ/JqKPNUtEpnJI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198462344835.1906758814142; Wed, 19 Aug 2026 21:01:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtko-0004eD-6a; Wed, 19 Aug 2026 23:47:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkV-0003yT-BO for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:27 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkT-0004Ax-U4 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:27 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-c9eefcf9175so1353047a12.3 for ; Wed, 19 Aug 2026 20:47:25 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197645; x=1787802445; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=toVDeATvXKbZsEV6lrO/6YOhYfdtzoWUhVqQYDrEcNA=; b=JA4nZ5Tj1r0Hy/3LA6ycvSqgH2PJB4gzAlYWirjCPgyGIfYcIvHEk8h+SslVX2ikV7 W/aZ010nQXQFQ1Bhib+4Tz09d294L6HmHkIC+/3gVaw0hhvGF1XalGm4i5bDa92tQ8BW jUjZHCRw0crdK0gqIRBWppoIikl8vGdptOD/SwqTvu9BrYffsYyoNuwD1hAleRL25WHx d5jdbSpBZOGPFHXjnzLFFx3jj0IOL08RS6mr0SU0B4yRdB0STFn7xRrzxcMtkjNyqCB1 V8o9/NqjFlxLQR+be895r1P/kRKzUn92tosnvhzl+r4XpwRMdd/dXNLrLjVoiLN4icuY HiuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197645; x=1787802445; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=toVDeATvXKbZsEV6lrO/6YOhYfdtzoWUhVqQYDrEcNA=; b=ilS+dYhzg2OemX+6b4Jv1xBELXkPPoegiMBK9UtPEw2VWOSQyY4FPR4hFvgKsykuaW yC/gOKbr+UdDHUz8/EKaqUdJDwYodwHnUuC/oV2XnSCT/6/L5AmLPu1PqU7hSpEhiwPO aVoWdfGRjDqnrri5/daC0r/HJELTy47EUwLR9z2NUjkfZkCrY1YqOBSl/msB2wSPxaRf YXpUngbCGP3Y1MC0WlT0parpG8FKdzyyRy5XGH4jEhlTu9lDUvUDfi8dJsD51aLSoydM au7EsCiO9ZwMfTxOJKyvrRQx3J3n+bvAYVZ8dxwq9FRqgaet9QDfREamte9fc8RNxlGm 7j+g== X-Gm-Message-State: AFuF++lCQw0dOUg9WHLTWVW1gopQkjflW0rGG6DWKmxrHFr1+hPOU2HL LLX3SjbbzaIlSiC9MXMk4FZzbrW4J+FomtEOwhTYDIGoAeaCnkGClVrvodNiRQ== X-Gm-Gg: AR+sD10b2e3o9UFcHSGtnU9OfaPQxy591Au8ze6qD6bi/bLCR7wmBggEowlgBSnnLt6 NnYXv5VrqrC6db/eZMPgIUz7uoV6XSaf/6yE49FSvfr2wyo2s3rK0Q1K/G6k+iB0xE+Aiz+WGNR ZCGjjGXxJUE27gQH3ZChd4oJ2ShypTCP2M8qoceOMzxx5IhBQhxZKRVMZXwSEulVZNeQNrpx6x1 QAT8v4sC38s4fFqRADU4cuNh7wQQhktGNVBR/W1IiRwnTBbUPKm4U5IHFBg6Fp7ML1RcxRRrtgX C03RfsMIqkAHz6RNwrp7kZe8O+kEaHd7HMIBPC4MBfx7vncgMQagacf4kjZhv2PHLBCXXW5KV+W lK4UsFOJGkOUchWEKSh+LQR3yPrs/4JIwHChDJQIHsyyBS+65jMSzvMgu+MOhKoENIaUH0A2rbH d67lWyaJoleuVT+vnIVvrDto4daq3xGqk3Z9Jvb/xkcPDyahzn0+7pqAcxgCMoDfANOBbDIDXvJ 7h8Zz72DsJLlD+LiQ== X-Received: by 2002:a17:90b:39ab:b0:36d:b424:4f17 with SMTP id 98e67ed59e1d1-39580a53474mr15870143a91.1.1787197644671; Wed, 19 Aug 2026 20:47:24 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 55/93] disas/riscv: Remove rvcd_imm_nz Date: Thu, 20 Aug 2026 13:43:52 +1000 Message-ID: <20260820034430.1186695-56-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=alistair23@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198463013158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Remove rvcd_imm_nz and rv_opcode_data.decomp_data as unused. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-20-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 5 ----- disas/riscv.c | 7 +------ 2 files changed, 1 insertion(+), 11 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 31bb0db86c..3909d73dd0 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -186,7 +186,6 @@ typedef struct { short decomp_rv32; short decomp_rv64; short decomp_rv128; - short decomp_data; } rv_opcode_data; =20 typedef struct { @@ -217,10 +216,6 @@ enum { rv_op_illegal =3D 0 }; =20 -enum { - rvcd_imm_nz =3D 0x1 -}; - /* instruction formats */ =20 #define rv_fmt_none "O\t" diff --git a/disas/riscv.c b/disas/riscv.c index ddc2f73eae..95957506bd 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5417,12 +5417,7 @@ static const rv_opcode_data *decode_inst_decompress(= rv_decode *dec, rv_isa isa, } =20 if (decomp_op !=3D rv_op_illegal) { - if ((op->decomp_data & rvcd_imm_nz) && dec->imm =3D=3D 0) { - dec->opcode_data =3D rvi_opcode_data; - dec->op =3D rv_op_illegal; - } else { - dec->op =3D decomp_op; - } + dec->op =3D decomp_op; op =3D &dec->opcode_data[decomp_op]; } return op; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198508; cv=none; d=zohomail.com; s=zohoarc; b=CMEzxp7SLDdwLD1+Mb8Yx9285nELxGo21wSuoKH8ToUZ0cb7WT27u5uY5iTPawvSnXM7vvHLz0+LROqiLS1jwHjzyBnu4RkSSOM8PgefQ4bsog3QS9WdspIlu1+Omwjbi8KjzU/Y8Pr65Nv325HOTnnTE0xgU/O/6nqyL/Yob3A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198508; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ipYCW2mTSZ2QTquJO9XqJRNLADtTowCNrowX6E/BVG0=; b=akHAUVhtXuAcgCi4qDTu43wE/mw15s3nBdqwzQNLTPJI1rHrJx7pHMLNbq50mmbKFX3dCdoWwkuhPa9eNCAcXhnm9aBiMaKiHFjtxltWQYIXSiZK2yMHUL2UWV4wsnnJ8F8nyQvVCvGjz3XgmgTZP/DSNLK4py1Y/7myjt504ok= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198508575243.50280909893945; Wed, 19 Aug 2026 21:01:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkn-0004Xv-6h; Wed, 19 Aug 2026 23:47:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkY-00046g-Ta for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:33 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkW-0004BO-Op for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:30 -0400 Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-ca88130e09aso904599a12.3 for ; Wed, 19 Aug 2026 20:47:28 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197647; x=1787802447; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=ipYCW2mTSZ2QTquJO9XqJRNLADtTowCNrowX6E/BVG0=; b=oUuG3j7ptBfK2qwv9tImAYZMslscc4x6ukqP3TXSynWZD8SJtpccrAgs5wncid3io3 WK/VJfQ/ykhTm+nthqqVwpz+8zxKAjiL11C2SIUhHt7Bb0r5zcnTWBGISJ8/Wep0PFld NLNnzvhEH+N32+AYqIZk+n2Hci3zTbvXnmYMmoLMLDF/II8PxuaZoAEfWji7txf7XkjJ PPKRoYjpaWMwGkpr5tc/xHurAudagdpxUP1pnZBipnvgnpmb6MhaAFkNRiITg3XXMfoT o7kBjqCTMp+T2yDjluDCrE9OEYiTlYtIX6n89uux19pUyCPrVmkMWH1ApuK4FC/ziuYM exsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197647; x=1787802447; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=ipYCW2mTSZ2QTquJO9XqJRNLADtTowCNrowX6E/BVG0=; b=U4s2x3NHnliV5AvGW2JPevMMJ3O+44vboZxmOK/0LybJk3DZyc7JDQci7767apOLOv 1rBHkILNVtrkA3pNVZ4M1anvgPZPWSoNpqi2GaqMH9RaJ/LncGl6e0jhOPO+Qq9G+GMv QZ4EVyZXwIOZYbImrn1P7N/fSwK6CT8gJqxCMl1bPI1UslGfw2U3Ky3nss4b3hzTQpX2 DcpDUemc5wMb6s9TRr5m8npreItc/HaMxlPtaji7yV3lT9mU+5i0yxEpse1USX4mNA8V KUH9niQrBxFKjGScaZXqOyEckmFVb0k5pD3oHPBdRWEfakzwiHq+BvPkbAaIJQEZB3rE yJew== X-Gm-Message-State: AOJu0YwOffn7/wb3jJyyd6u2x2KXxp/frSL9jGOGoLiAIqQbT1xi/g5J 0QCqut3VBfFngfEpggmUHSypk/wui0PdtILZFbVlzmctkO+HVWqIJ+Zz5GdFzQ== X-Gm-Gg: AR+sD135LWARxVrrDJhov4611xV01L6Gc/lvno80Phb+9wrT921zxbMDn3DOzWUQx5h 9gof5Iw9WD1z0zO5+2g9L/OvmT43HXz/p5e+eIFt3GklUXyjmUJDNQb71F9LODvEYZTL1wOIZ20 CbKSLpauqbF7/tkvct8ecjzhRCWuZ3Cx/MskOpggHZrKrpgfN3KsFf1V/8o+T9a5PR9D+9cJQgh vQwsgniOUsCJIb6wRMW4ONIXHYI5uPiK4bKt3bqspstHR9+UUnpjc2z2T/pr3XS0ZPExZfEpUne Ik/7g0UZfz62qVzor5PpEUV41XtRrerrkP+jUhEcmPZIo6ARE59G0kqfGs85Ct/o7P+2bUcaMwR jNHwmWSYMVN6PaauTwAOsBc5HNVBnfFANRy2XOOdiXP/L2icYTx7HlTq9uiQFjm1kHGdMG3oErv so8pZCAUtLTYz9l2WHmKGOYc449yNjpojYJVwFl2CVZdz+5WmvEZa6Lrd75siCTCOafHVtYLkb8 oLJkw== X-Received: by 2002:a05:6a20:c706:b0:3c6:61c6:8970 with SMTP id adf61e73a8af0-3cd0128ef69mr18135493637.14.1787197647358; Wed, 19 Aug 2026 20:47:27 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 56/93] disas/riscv: Unify decomp_rv{32,64,128} Date: Thu, 20 Aug 2026 13:43:53 +1000 Message-ID: <20260820034430.1186695-57-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198509272158501 Content-Type: text/plain; charset="utf-8" From: Richard Henderson We now distinguish compressed opcodes by isa during decode. Therefore we don't need 3 copies of decomp_*. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-21-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 4 +- disas/riscv.c | 155 ++++++++++++++++---------------------------------- 2 files changed, 51 insertions(+), 108 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 3909d73dd0..900363c603 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -183,9 +183,7 @@ typedef struct { rv_codec codec; const char *format; const rv_comp_data *pseudo; - short decomp_rv32; - short decomp_rv64; - short decomp_rv128; + rv_opcode decomp; } rv_opcode_data; =20 typedef struct { diff --git a/disas/riscv.c b/disas/riscv.c index 95957506bd..2e891f509e 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1883,91 +1883,52 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1 }, { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1 }, - { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, - rv_op_addi, rv_op_addi }, - { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, - rv_op_fld, 0 }, - { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, rv_op_= lw, - rv_op_lw }, - { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, NULL, rv_op_flw, 0, = 0 }, - { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd, - rv_op_fsd, 0 }, - { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, rv_op= _sw, - rv_op_sw }, - { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw, 0,= 0 }, + { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi= }, + { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld }, + { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw }, + { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, NULL, rv_op_flw }, + { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd }, + { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw }, + { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw }, { }, - { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_ad= di, - rv_op_addi }, - { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal, 0, 0 }, - { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, rv_op_a= ddi, - rv_op_addi }, - { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi, - rv_op_addi, rv_op_addi }, - { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, NULL, rv_op_lui, rv_op_lui, - rv_op_lui }, - { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli, - rv_op_srli, rv_op_srli }, - { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai, - rv_op_srai, rv_op_srai }, - { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi, - rv_op_andi, rv_op_andi }, - { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub, rv_op_sub, - rv_op_sub }, - { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_xor, rv_op_xor, - rv_op_xor }, - { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_or, rv_op_or, - rv_op_or }, - { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_and, rv_op_and, - rv_op_and }, - { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_subw, rv_op_su= bw, - rv_op_subw }, - { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_addw, rv_op_ad= dw, - rv_op_addw }, - { "c.j", rv_codec_cj, rv_fmt_rd_offset, NULL, rv_op_jal, rv_op_jal, - rv_op_jal }, - { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_beq, rv_op= _beq, - rv_op_beq }, - { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne, rv_op= _bne, - rv_op_bne }, - { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli, - rv_op_slli, rv_op_slli }, - { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld, - rv_op_fld, rv_op_fld }, - { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw, - rv_op_lw, rv_op_lw }, - { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, NULL, rv_op_flw,= 0, - 0 }, - { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr, - rv_op_jalr, rv_op_jalr }, - { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, NULL, rv_op_addi, rv_op_a= ddi, - rv_op_addi }, - { "c.ebreak", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_ebreak, - rv_op_ebreak, rv_op_ebreak }, - { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr, - rv_op_jalr, rv_op_jalr }, - { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, NULL, rv_op_add, rv_op_add, - rv_op_add }, - { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fs= d, - rv_op_fsd, rv_op_fsd }, - { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw, - rv_op_sw, rv_op_sw }, - { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fs= w, 0, - 0 }, - { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld, - rv_op_ld }, - { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_sd, - rv_op_sd }, - { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, 0, rv_op_addiw, - rv_op_addiw }, - { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, NULL, 0, rv_op_ld, - rv_op_ld }, - { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, NULL, 0, rv_op_s= d, - rv_op_sd }, - { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_lq }, - { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, NULL, 0, 0, rv_op_sq = }, - { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, 0, 0, rv_op_= lq }, - { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, 0, 0, - rv_op_sq }, + { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi }, + { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal }, + { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi }, + { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi = }, + { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, NULL, rv_op_lui }, + { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli }, + { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai }, + { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi }, + { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub }, + { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_xor }, + { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_or }, + { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_and }, + { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_subw }, + { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_addw }, + { "c.j", rv_codec_cj, rv_fmt_rd_offset, NULL, rv_op_jal }, + { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_beq }, + { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne }, + { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli }, + { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld = }, + { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw }, + { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, NULL, rv_op_flw = }, + { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr }, + { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, NULL, rv_op_addi }, + { "c.ebreak", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_ebreak }, + { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr }, + { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, NULL, rv_op_add }, + { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fs= d }, + { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw }, + { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fs= w }, + { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, NULL, rv_op_ld }, + { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, NULL, rv_op_sd }, + { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addiw }, + { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, NULL, rv_op_ld }, + { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sd }, + { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, NULL, rv_op_lq }, + { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, NULL, rv_op_sq }, + { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lq }, + { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sq }, { "nop", rv_codec_i, rv_fmt_none }, { "mv", rv_codec_i, rv_fmt_rd_rs1 }, { "not", rv_codec_i, rv_fmt_rd_rs1 }, @@ -2649,10 +2610,8 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "ssrdp", rv_codec_r, rv_fmt_rd }, { "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, { "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "c.sspush", rv_codec_cmop_ss, rv_fmt_rs2, NULL, rv_op_sspush, - rv_op_sspush, 0 }, - { "c.sspopchk", rv_codec_cmop_ss, rv_fmt_rs1, NULL, rv_op_sspopchk, - rv_op_sspopchk, 0 }, + { "c.sspush", rv_codec_cmop_ss, rv_fmt_rs2, NULL, rv_op_sspush }, + { "c.sspopchk", rv_codec_cmop_ss, rv_fmt_rs1, NULL, rv_op_sspopchk }, { "cbo.inval", rv_codec_r, rv_fmt_rs1 }, { "cbo.clean", rv_codec_r, rv_fmt_rs1 }, { "cbo.flush", rv_codec_r, rv_fmt_rs1 }, @@ -5397,24 +5356,10 @@ static const rv_opcode_data *decode_inst_lift_pseud= o(rv_decode *dec, =20 /* decompress instruction */ =20 -static const rv_opcode_data *decode_inst_decompress(rv_decode *dec, rv_isa= isa, +static const rv_opcode_data *decode_inst_decompress(rv_decode *dec, const rv_opcode_data *= op) { - int decomp_op; - - switch (isa) { - case rv32: - decomp_op =3D op->decomp_rv32; - break; - case rv64: - decomp_op =3D op->decomp_rv64; - break; - case rv128: - decomp_op =3D op->decomp_rv128; - break; - default: - g_assert_not_reached(); - } + int decomp_op =3D op->decomp; =20 if (decomp_op !=3D rv_op_illegal) { dec->op =3D decomp_op; @@ -5473,7 +5418,7 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, =20 op =3D &dec.opcode_data[dec.op]; decode_inst_operands(&dec, isa, op); - op =3D decode_inst_decompress(&dec, isa, op); + op =3D decode_inst_decompress(&dec, op); op =3D decode_inst_lift_pseudo(&dec, op); return format_inst(24, &dec, op); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198405; cv=none; d=zohomail.com; s=zohoarc; b=mLIlcK8YHY8QnTT9QNtsINmFfs+KE8S3SiFDEU74LnNBa2i1sWzEI/bvX/y+c8K662LXH0S0SdadAJABKPj0cTgTDGybPtlbMLSfO4+IxoVUQuTV14EB+nCM9R/zurR6+YJbiIChYwyllouytfWWxNKZzadP3RtwzIR6QnYjid0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198405; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=7JzAABpt44ci1D0IHFkbgQn/cNbaYvxZwjC8pfV0xrY=; b=SzGUlKsEPA1TLn20Jhu2W1EzJ4tpvCemsmHbsxvKSmrdkdEJdf22Z2lhrGfQAl4CSncnRRCFsdrlLplGJ10+UrIFziKr18TYWneV1vZ2jVitaBHIhc3I1/zL6muKCShPfEKSuNsJSKsD00FXvdmxu/1b7jXeDTtzkmPpCQ3OBS8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198405009983.0108260554232; Wed, 19 Aug 2026 21:00:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkr-0005Dp-OH; Wed, 19 Aug 2026 23:47:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkb-0004A6-Jh for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:33 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkZ-0004Bh-Th for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:33 -0400 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-2d032846c95so22147605ad.1 for ; Wed, 19 Aug 2026 20:47:31 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197650; x=1787802450; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=7JzAABpt44ci1D0IHFkbgQn/cNbaYvxZwjC8pfV0xrY=; b=WSnVVDMqNR2QGVwMeeIf5k0gHG90cP0d3pRRJPw6SFowbac30OYAqoPVSnWCbIzOMX j5jELgBhEnZXdJ8grSJfMaPXrbyqb4dVqKvlxAWtjty9HF1zYrFmVJl5NfsiEJGLcPwb GlJXOf22dahneEQ1GjeCyoklPbJRfKyrI2Hbvi+oTEW0N0tkU8/WCmmXAj1tDbNuXXjX mbFACATPUyupfAbbOH1S1J0Q9qKHLVQt1mn3/vZu/leOwaVu1JBcHH7tmapL/SwQt8cT WqL0aZE/L4ScXvZXuBhEbNNtxH05z9GWq6ShfO4LOVtyVCjYuQiSIkiQXaacZSoIlhpY iTWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197650; x=1787802450; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=7JzAABpt44ci1D0IHFkbgQn/cNbaYvxZwjC8pfV0xrY=; b=fbjN0dFTlWvqfZqL8CB3GoQBYbQ3WVvc0aheNoA32wimvj++vN3W9GiUgrekGB3tA1 yuxX/aq+ZlgcKy4EtoCZdXhSiMvdeV10uCaJh6mMHI6Ma0h2dF77yz/fqbVmzGQ1k6br 9OdAJ4En8GceZiLoDPZDxqskAfwazrQi++O6CRCphnUl2hLIEddlYGKWRGsFsohz3PZI M0sF3FPUuHL3TqsTFNI/iiTSLyDBNfzHFhBAfsYPovs6aquNk2R7goHhagQHjUb0uXtW SOnwuW6R9/2iJ7cIcSdkCXngpguHaTY/rHPm50E9ZdgBiJ3b7XJJ0Kwh1GtOMDZx368A GCSg== X-Gm-Message-State: AFuF++llk6dcQ8GE50X2C9iipRxDmjBdT9TX95UeNxpqXTG+ph76Puam Mm0VdbQsB6/0OQdeXg60goAsap0SDvfTV8rPaS3fPjawMOJmd4eJqLXbevOqGg== X-Gm-Gg: AR+sD112wIbkC8fctJd5SPdLbyvCIOuKakKiUqTAxBN2dqGIZrC9p/l2PGTl13leCJI Bao7l7hKSP2umKtX4xnQAzTFD/kCKdfiipVZb+/1T44fwo6yEwecUt2QykL/hTtKSlnFVH/SKIR n4kD0fOUjnn468RL/+qOUVpNa6ae4NBUGsUTGf5Ai5NdxCKzKI7Anee4+12kJLf09ZXc+ukpaF5 1DwGdoyXwTzPsyvXHRF3jbxFods3o9bnj6PlRUaJmnzji16KqlgUr91U8s7kC/D7dJGNacXbLJs 411eGhKY/ceOvCyy/2PdiHN7sh2XTDKyEeCJLzIVGYrPXGFWz5qbwPtb3SJSd2Vmc/DJJFqpAMn ukHyVPPcCTY55HgKE/lrMWRFn2Qi+k5ofmIrwMZSxzRhEAE+5TkHn9boe6UwLoSU0wG2yvgpSIh qrxuo/KPmghc6m4jTqv7e5Cd/cDDcqxVgpH6jmjpWbm+/IUDLle9CeADHjaW5oHGk9GDatyYbBR th5hA== X-Received: by 2002:a17:90b:4e8f:b0:392:ca3b:370a with SMTP id 98e67ed59e1d1-39580a50d67mr19152386a91.2.1787197650223; Wed, 19 Aug 2026 20:47:30 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 57/93] disas/riscv: Drop always true branch pseudos Date: Thu, 20 Aug 2026 13:43:54 +1000 Message-ID: <20260820034430.1186695-58-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=alistair23@gmail.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198406701158500 From: Richard Henderson The real insns are blt, bge, bltu, bgeu. Do not include pseudos that unconditionally swap operands. That's fine for an assembler but not a disassembler. Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-22-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 32 ++++++-------------------------- 1 file changed, 6 insertions(+), 26 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 2e891f509e..bde1cc6e62 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -326,10 +326,6 @@ typedef enum { rv_op_bgez =3D 295, rv_op_bltz =3D 296, rv_op_bgtz =3D 297, - rv_op_ble =3D 298, - rv_op_bleu =3D 299, - rv_op_bgt =3D 300, - rv_op_bgtu =3D 301, rv_op_j =3D 302, rv_op_ret =3D 303, rv_op_jr =3D 304, @@ -1062,10 +1058,6 @@ static const rvc_constraint rvcc_blez[] =3D { rvc_rs= 1_eq_x0, rvc_end }; static const rvc_constraint rvcc_bgez[] =3D { rvc_rs2_eq_x0, rvc_end }; static const rvc_constraint rvcc_bltz[] =3D { rvc_rs2_eq_x0, rvc_end }; static const rvc_constraint rvcc_bgtz[] =3D { rvc_rs1_eq_x0, rvc_end }; -static const rvc_constraint rvcc_ble[] =3D { rvc_end }; -static const rvc_constraint rvcc_bleu[] =3D { rvc_end }; -static const rvc_constraint rvcc_bgt[] =3D { rvc_end }; -static const rvc_constraint rvcc_bgtu[] =3D { rvc_end }; static const rvc_constraint rvcc_j[] =3D { rvc_rd_eq_x0, rvc_end }; static const rvc_constraint rvcc_ret[] =3D { rvc_rd_eq_x0, rvc_rs1_eq_ra, rvc_end }; @@ -1123,24 +1115,12 @@ static const rv_comp_data rvcp_bne[] =3D { static const rv_comp_data rvcp_blt[] =3D { { rv_op_bltz, rvcc_bltz }, { rv_op_bgtz, rvcc_bgtz }, - { rv_op_bgt, rvcc_bgt }, { rv_op_illegal, NULL } }; =20 static const rv_comp_data rvcp_bge[] =3D { { rv_op_blez, rvcc_blez }, { rv_op_bgez, rvcc_bgez }, - { rv_op_ble, rvcc_ble }, - { rv_op_illegal, NULL } -}; - -static const rv_comp_data rvcp_bltu[] =3D { - { rv_op_bgtu, rvcc_bgtu }, - { rv_op_illegal, NULL } -}; - -static const rv_comp_data rvcp_bgeu[] =3D { - { rv_op_bleu, rvcc_bleu }, { rv_op_illegal, NULL } }; =20 @@ -1665,8 +1645,8 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne }, { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt }, { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge }, - { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu }, - { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu }, + { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset }, + { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset }, { "lb", rv_codec_i, rv_fmt_rd_offset_rs1 }, { "lh", rv_codec_i, rv_fmt_rd_offset_rs1 }, { "lw", rv_codec_i, rv_fmt_rd_offset_rs1 }, @@ -1954,10 +1934,10 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "bgez", rv_codec_sb, rv_fmt_rs1_offset }, { "bltz", rv_codec_sb, rv_fmt_rs1_offset }, { "bgtz", rv_codec_sb, rv_fmt_rs2_offset }, - { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset }, - { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset }, - { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset }, - { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset }, + { }, + { }, + { }, + { }, { "j", rv_codec_uj, rv_fmt_offset }, { "ret", rv_codec_i, rv_fmt_none }, { "jr", rv_codec_i, rv_fmt_rs1 }, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198464; cv=none; d=zohomail.com; s=zohoarc; b=Oyh5JXoDMHpkXx07nPhJEU5f/i38dU5Wo6HpBAyKOlcgpyGmMOx0LwJrOyPTVLb8Mf+R7VLBdVLOYMdlHON+eOKU0R9ygwsExQXooImJseCrNfD1X0bb28OVXW2UNFiWbhdjkiN3gzjiR7E910JvRmuzSXrKLo4aDos6kLdzQSs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198464; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=YtA6CjFYKwQR207w18iiKRkmLC1dp+/klVeKoHfdRLU=; b=f1OdIxX/0g3J/3qwHNLH/RSxGSMMeO54P8FXp6/yZrMo+255E33ahIbxbW6OfWZpUkgYc9ERwy6Ad0tiDrLYowsb8jYYuFFmBd+i+IlL9xNp1/dpw7QG7vX5/Yl945PAHd3J1hzoF9OgTqe0OWLGJypWcKNs9NWADkMJndEycyE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198464788574.9030410085347; Wed, 19 Aug 2026 21:01:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkp-0004qQ-Dj; Wed, 19 Aug 2026 23:47:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkd-0004Cf-Vi for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:36 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkc-0004By-DI for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:35 -0400 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-2cab973140bso21237815ad.3 for ; Wed, 19 Aug 2026 20:47:34 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197653; x=1787802453; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=YtA6CjFYKwQR207w18iiKRkmLC1dp+/klVeKoHfdRLU=; b=tMw9LwQRxn5gKONn1Y0nvS9Q1t4LKxqafMVgU3E0x0jjA4jJHkhuT7f/KuNV2omn9h KFCq7TE+I2MXb2CJe9/n3/sW+jc3TKJoP7hPvrKPCewtZgxrUFW5S+c2EvqIj7UVlxYj TskFRi6/rojAoak6l39I7bV8uMOkri2q48Vbr9uny11vCarsI1GrJqkmSDDrYmTjxB0D DMILwfKPI2dIPzIrjzYcQhPCV5ksRFufo9A3mh4NS9Yav+D0YPtpEMWC+ZhVjv2fHMk6 1h0rop4c13JDpnUsMvdsIm4sVoNC5sTeZnJwYYf6A/ewiS5KW5LnWmtd9ikKhAsfnMzZ TNlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197653; x=1787802453; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=YtA6CjFYKwQR207w18iiKRkmLC1dp+/klVeKoHfdRLU=; b=R/kXbcp2bBlqXwAWpW4vnrF7Ww4sZRLbMMe9xLamfyMlofkX5qeSi9RITwHsY8AKP5 Y3k30G/gvt5ikMptQc5p5wOnsyAm4KWvo3yHuM69ceNQE6jAyqn7EAGFfBzkTdztnWKg i9C6DJDs2hsicZUUm6jHjgheqba9xIt+OZ6Zr4KTMMrnn8PQ05fAbHP/ka1oBsFoOZCd BR+6ac4u1gRPs0ZSmvRHNpORpDA8cjkc/NYjVP7gTBq2XmW2xkyzYcLLJIej/s3vurUI Xlle1JkNyOp7YckcC69gTHhEZ7go4SfRtxMeh/3Tk1n6Twgccp/PIX1G/ozOyb+WP7vN 1K1A== X-Gm-Message-State: AFuF++msi3JcHyQBAoB0NY7n195uITDaAxjJ+2LaGQgJI1VZbJK54Pkf zgVrYTNIeGXxJPrYNGxhnJqE7UJLb/67Q9gKmxdDryrQg6gdsbbXkNXAYfCP2Q== X-Gm-Gg: AR+sD100EKQIRQlDTtfkuxWYCB6gv0JRRHo2RqYFCTKCztoceYqGlRe0ckQwDUTXnDT HO9v2GNHPi6l6rQespbVa9dTgmTqcA9Zrz1Suk0o89XO3GT9Wz/rYTunLtXiCg2OG6PInfyn46H /Nta0HdhUaVqXBwMeIWDsIRuEGLXGCodzvO8WT3AM8F8OI6X3PUEFv+gK/oH41Y6rWpC/P2TAqs YCnZ1E7jBbG3yDAsAb7jI6rJ0qWPh5FvTY03WPIhltJ45ORR0xMIU12d9smOVc9XHAs1NC4+tiG XsIJCPHQBA8Fg7cqzEtq8WCcOfDkFzk83HgHwKJ80OWPih6dqgYExp1JzacWug8V5hQhHj8U+0G 1cys5ZTQf2OiiJa3723AM0XMsD6+Gsr0lSBl9zZOt8OttomozJsiXo9SyACU44OLgRqoS6eLAjv zQ1ge/BA6lUFy8X/JXTp8FtU3o+Q765btjRCCgWKxh8ys7INP+hY/KcEHLzp2qFLBlCZlV8W5he EBw0w== X-Received: by 2002:a17:90b:4a05:b0:37f:c22a:c188 with SMTP id 98e67ed59e1d1-39580a80a65mr17778572a91.4.1787197652858; Wed, 19 Aug 2026 20:47:32 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 58/93] disas/riscv: Handle aliases of csrrw during decode Date: Thu, 20 Aug 2026 13:43:55 +1000 Message-ID: <20260820034430.1186695-59-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198465082158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-23-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index bde1cc6e62..e464b8b075 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1081,9 +1081,6 @@ static const rvc_constraint rvcc_frrm[] =3D { rvc_rs1= _eq_x0, rvc_csr_eq_0x002, rvc_end }; static const rvc_constraint rvcc_frflags[] =3D { rvc_rs1_eq_x0, rvc_csr_eq= _0x001, rvc_end }; -static const rvc_constraint rvcc_fscsr[] =3D { rvc_csr_eq_0x003, rvc_end }; -static const rvc_constraint rvcc_fsrm[] =3D { rvc_csr_eq_0x002, rvc_end }; -static const rvc_constraint rvcc_fsflags[] =3D { rvc_csr_eq_0x001, rvc_end= }; static const rvc_constraint rvcc_fsrmi[] =3D { rvc_csr_eq_0x002, rvc_end }; static const rvc_constraint rvcc_fsflagsi[] =3D { rvc_csr_eq_0x001, rvc_en= d }; =20 @@ -1166,14 +1163,6 @@ static const rv_comp_data rvcp_subw[] =3D { { rv_op_illegal, NULL } }; =20 -static const rv_comp_data rvcp_csrrw[] =3D { - { rv_op_fscsr, rvcc_fscsr }, - { rv_op_fsrm, rvcc_fsrm }, - { rv_op_fsflags, rvcc_fsflags }, - { rv_op_illegal, NULL } -}; - - static const rv_comp_data rvcp_csrrs[] =3D { { rv_op_rdcycle, rvcc_rdcycle }, { rv_op_rdtime, rvcc_rdtime }, @@ -1761,7 +1750,7 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "sfence.vm", rv_codec_r, rv_fmt_rs1 }, { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2 }, { "wfi", rv_codec_none, rv_fmt_none }, - { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrw }, + { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs }, { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi }, @@ -4443,7 +4432,14 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) break; } break; - case 1: op =3D rv_op_csrrw; break; + case 1: + switch (operand_csr12(inst)) { + case 1: op =3D rv_op_fsflags; break; + case 2: op =3D rv_op_fsrm; break; + case 3: op =3D rv_op_fscsr; break; + default: op =3D rv_op_csrrw; break; + } + break; case 2: op =3D rv_op_csrrs; break; case 3: op =3D rv_op_csrrc; break; case 4: --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198463; cv=none; d=zohomail.com; s=zohoarc; b=HTdeX4DDEszCSS6wdgF7+SkrF+DwnsrKpq4FDecXFOWa4ee4RDHfeTt+6tWLSMjAUSrQnRnmbyYm97NtF4zW1wy3G1EO3ZFV6fc5uey9s8wW1R8rix/9Jwz4aW/tFph7sTVHGtUFiIh0hbgNIxd1v8w1R3lNDaYmgomSnUeTzEQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198463; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pELMg+WaaGuMaoeRzO7z5uC1+w1HHOpZNmw21D6h9tQ=; b=HjZqp/6jRS3icEfg2BJqc76Jmq4RQpYDPwGSxQrriD9tDYFicuK2Yv1RMDMLYJI6h+VfBZCHI7kSOjhGwR2h4PcVmI9FLqXh6+iw/IJFbGEMRMub0kOpefT0cntphcF0DZOUnhz018BqMHYdXNhpfqVplXXvkVEGqrBitexklko= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198463271983.8705477985432; Wed, 19 Aug 2026 21:01:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtko-0004jN-Iv; Wed, 19 Aug 2026 23:47:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkg-0004M2-LY for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:40 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtke-0004CH-R7 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:38 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-38e3efab7e0so399697a91.0 for ; Wed, 19 Aug 2026 20:47:36 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197656; x=1787802456; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=pELMg+WaaGuMaoeRzO7z5uC1+w1HHOpZNmw21D6h9tQ=; b=cB9gAhxrLd6naWIYcDBn40NjIbvOwjcADRsWGiYpj5altNs4TR5x1b/kuW0EyQ8qSU 1AmiuaZste9Ca2i/ZDkcahQ95aaJka0nrH3LT2bw5Ega3tj/fGinR/GIoqUhvZ+xn8Cm +fc1Z2AzCzXPbwO9VG40xgzWdPGet0ZN8HvC0aYMQXsn1mS1V602auFWwr4ztby5wQ4+ ZvrIyL7W6VTgtp1Rqay6Xiv0FsTYR4fyo4B/g4NRTKGg8hgVXWFVqKaKnQkxlc26j0EU Q7OJhiRdq+DRb+kBNvRtHn6qv29JMKajMTfxK8TRlyOTe7oqUBu+M2HKaxfHyj71ubxm 6UYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197656; x=1787802456; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=pELMg+WaaGuMaoeRzO7z5uC1+w1HHOpZNmw21D6h9tQ=; b=EJsusiwV2gBuaQScdgPRyQkGrrrVHwZGSbtjKB0tX2vdvJWbsTaLI8EdGJmlG0Zx51 DDe+nXVia5ssfqSznDizWzcgnL4gusyPKvplBk8yTTJxG41Y5DeS1ySp4V9avwzNGQVJ 0DD6Sxg8/3uMXpkrVKnxYHYIA/acendIkaE1ld9XpDjp7pA2ORdQnSf/es8mTLb6qt2E 2kwrBaOMuCIOhC5VWEz6Tj5tQ4qI8z5NHpPO7q5ZTGYzzKN88OGaDHMu7lZhGsNkplmh tuIrIrL6H11+Vk3FpEYNhRlVGefwjeVY1KxHMAxuRDg+ozwZYkEfIRQLpyCSfKVPH8r3 C73Q== X-Gm-Message-State: AFuF++kWbOS1HBqgO2JQXbLpzXRicJoJc4do05dzgqdLWKjQDDej79FR QMQZmTkYB1C/PhgsndPmAkSYPmX1D9WAMjRl2LaF51Jv24oop9AhTpJt39ff9Q== X-Gm-Gg: AR+sD119S1cFYuryzg7vVZXfx0L9MX2BZ/PIxpBlxAxJcxFPUZur2Sor6yuLLO3LhZ3 MkeG48kZiPvufz+qqScSUZhEw3gKT4Gt0X7LBcT16cujhCwbeAW8PorwVGxNscI4fXF02JsH8ed U9xNKfdbSOp8FU6+/vfaqCYSy1r3vnDQxniax51Un66gXorLV5QJAZafSg5O0qqyl5WOd2Ia4tL 801GSLQTka4pfy+YR/8pAsWIWFNOJ3J4htIOE7Gjes1rO9EwVbPJ1drqImhbEnKIzrcEHbyQ/NE 6JBfAtmsFsr1UGoS0E7x8Yh9qNPFml3yxJ8XbNstBx1QLLwPlheK6CvTuzWuNF2QtZ439pRY3HJ ozuYU85cTkrQacxEcC+AyO6SX8dG50RdCqicAC7LU+QZzstHksQSrz4zIjYaH2so06PEd2uaN1f fu0FdCB9nbPSS97k3EtR/YfD33PzMkvXptjVkDVGIS3l3hFwBgt/EWa5EZC0clSwzH+rgUu7woG DEUqA== X-Received: by 2002:a17:90b:3bcc:b0:37f:a913:1554 with SMTP id 98e67ed59e1d1-395a06bc47amr4474258a91.16.1787197655450; Wed, 19 Aug 2026 20:47:35 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 59/93] disas/riscv: Handle aliases of csrrs during decode Date: Thu, 20 Aug 2026 13:43:56 +1000 Message-ID: <20260820034430.1186695-60-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198465055158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-24-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 7 ----- disas/riscv.c | 85 +++++++++++---------------------------------------- 2 files changed, 17 insertions(+), 75 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 900363c603..d8c5acd969 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -86,13 +86,6 @@ typedef enum { rvc_imm_eq_p1, rvc_csr_eq_0x001, rvc_csr_eq_0x002, - rvc_csr_eq_0x003, - rvc_csr_eq_0xc00, - rvc_csr_eq_0xc01, - rvc_csr_eq_0xc02, - rvc_csr_eq_0xc80, - rvc_csr_eq_0xc81, - rvc_csr_eq_0xc82, } rvc_constraint; =20 typedef enum { diff --git a/disas/riscv.c b/disas/riscv.c index e464b8b075..9ec79baf4d 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1063,24 +1063,6 @@ static const rvc_constraint rvcc_ret[] =3D { rvc_rd_= eq_x0, rvc_rs1_eq_ra, rvc_end }; static const rvc_constraint rvcc_jr[] =3D { rvc_rd_eq_x0, rvc_imm_eq_zero, rvc_end }; -static const rvc_constraint rvcc_rdcycle[] =3D { rvc_rs1_eq_x0, rvc_csr_eq= _0xc00, - rvc_end }; -static const rvc_constraint rvcc_rdtime[] =3D { rvc_rs1_eq_x0, rvc_csr_eq_= 0xc01, - rvc_end }; -static const rvc_constraint rvcc_rdinstret[] =3D { rvc_rs1_eq_x0, - rvc_csr_eq_0xc02, rvc_end= }; -static const rvc_constraint rvcc_rdcycleh[] =3D { rvc_rs1_eq_x0, - rvc_csr_eq_0xc80, rvc_end = }; -static const rvc_constraint rvcc_rdtimeh[] =3D { rvc_rs1_eq_x0, rvc_csr_eq= _0xc81, - rvc_end }; -static const rvc_constraint rvcc_rdinstreth[] =3D { rvc_rs1_eq_x0, - rvc_csr_eq_0xc82, rvc_en= d }; -static const rvc_constraint rvcc_frcsr[] =3D { rvc_rs1_eq_x0, rvc_csr_eq_0= x003, - rvc_end }; -static const rvc_constraint rvcc_frrm[] =3D { rvc_rs1_eq_x0, rvc_csr_eq_0x= 002, - rvc_end }; -static const rvc_constraint rvcc_frflags[] =3D { rvc_rs1_eq_x0, rvc_csr_eq= _0x001, - rvc_end }; static const rvc_constraint rvcc_fsrmi[] =3D { rvc_csr_eq_0x002, rvc_end }; static const rvc_constraint rvcc_fsflagsi[] =3D { rvc_csr_eq_0x001, rvc_en= d }; =20 @@ -1163,19 +1145,6 @@ static const rv_comp_data rvcp_subw[] =3D { { rv_op_illegal, NULL } }; =20 -static const rv_comp_data rvcp_csrrs[] =3D { - { rv_op_rdcycle, rvcc_rdcycle }, - { rv_op_rdtime, rvcc_rdtime }, - { rv_op_rdinstret, rvcc_rdinstret }, - { rv_op_rdcycleh, rvcc_rdcycleh }, - { rv_op_rdtimeh, rvcc_rdtimeh }, - { rv_op_rdinstreth, rvcc_rdinstreth }, - { rv_op_frcsr, rvcc_frcsr }, - { rv_op_frrm, rvcc_frrm }, - { rv_op_frflags, rvcc_frflags }, - { rv_op_illegal, NULL } -}; - static const rv_comp_data rvcp_csrrwi[] =3D { { rv_op_fsrmi, rvcc_fsrmi }, { rv_op_fsflagsi, rvcc_fsflagsi }, @@ -1751,7 +1720,7 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2 }, { "wfi", rv_codec_none, rv_fmt_none }, { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, - { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1, rvcp_csrrs }, + { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi }, { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, @@ -4440,7 +4409,22 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) default: op =3D rv_op_csrrw; break; } break; - case 2: op =3D rv_op_csrrs; break; + case 2: + op =3D rv_op_csrrs; + if (operand_rs1(inst) =3D=3D 0) { + switch (operand_csr12(inst)) { + case 0x001: op =3D rv_op_frflags; break; + case 0x002: op =3D rv_op_frrm; break; + case 0x003: op =3D rv_op_frcsr; break; + case 0xc00: op =3D rv_op_rdcycle; break; + case 0xc01: op =3D rv_op_rdtime; break; + case 0xc02: op =3D rv_op_rdinstret; break; + case 0xc80: op =3D rv_op_rdcycleh; break; + case 0xc81: op =3D rv_op_rdtimeh; break; + case 0xc82: op =3D rv_op_rdinstreth; break; + } + } + break; case 3: op =3D rv_op_csrrc; break; case 4: if (dec->cfg && dec->cfg->ext_zimop) { @@ -5017,41 +5001,6 @@ static bool check_constraints(rv_decode *dec, const = rvc_constraint *c) return false; } break; - case rvc_csr_eq_0x003: - if (!(imm =3D=3D 0x003)) { - return false; - } - break; - case rvc_csr_eq_0xc00: - if (!(imm =3D=3D 0xc00)) { - return false; - } - break; - case rvc_csr_eq_0xc01: - if (!(imm =3D=3D 0xc01)) { - return false; - } - break; - case rvc_csr_eq_0xc02: - if (!(imm =3D=3D 0xc02)) { - return false; - } - break; - case rvc_csr_eq_0xc80: - if (!(imm =3D=3D 0xc80)) { - return false; - } - break; - case rvc_csr_eq_0xc81: - if (!(imm =3D=3D 0xc81)) { - return false; - } - break; - case rvc_csr_eq_0xc82: - if (!(imm =3D=3D 0xc82)) { - return false; - } - break; default: break; } c++; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198391; cv=none; d=zohomail.com; s=zohoarc; b=YveGGoXf0X1sBJYhcxVUM8f4XzT07Sz3XpF7TXnF2SDV6NKP0Uvlvth5IMs2tBAGq3cFmqhtsXFtx3YmRY2V/LYmX2ExGtrnAXDTlmDayCiNMhFR4foIajT57ZSIuKsvVSQmZ5HUXWrekT8QF0dWCXyvjxW3OwH40+oa4OmR1M8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198391; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=IJUxA2gEgVqA7Wq69py4RBGAGJf+JNTEdoMwMM1C2vc=; b=eeF9hJIM0Gu+nINtFhHqTpD+j664BWC0DNp1YfzNi/NrsvGbQmQc1JSzzhMnuFM2MJ6n+NMBRhD3NaFCRZ/nEoLsc5WRBz75IBUbSMrXYju516xSt2ZwXbEHJarSBjCin6paNZKaBsaxtuRtoJ5ttqD+p1Cb0jWsQ4zWiLsStvM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198391665325.04676709346904; Wed, 19 Aug 2026 20:59:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtko-0004eA-7K; Wed, 19 Aug 2026 23:47:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtki-0004OS-VS for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:42 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkh-0004CY-Az for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:40 -0400 Received: by mail-pj1-x102a.google.com with SMTP id 98e67ed59e1d1-38de840f2f0so1562107a91.0 for ; Wed, 19 Aug 2026 20:47:38 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197658; x=1787802458; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=IJUxA2gEgVqA7Wq69py4RBGAGJf+JNTEdoMwMM1C2vc=; b=ccdl7UmauKb+4Luvcsw51T0pQgFuTjL/tRAhb/q5a64nQ0giWoxxe2pIaT+WXX84hz FV87i6wf5Pwu7uETQJuWjo5Znj/3JdKJ3BA5c1EaiaUYEdbvLilQTE9pbVArsyNG01EI sfvgI76POwxZeEWaa710ornaR3VG6fYKhybP4i63hlWoGhOhRKk3IrOgChkXKVzSo9NM aysHvB7cj9dvgUTLslVGk6OAns9sHEwQK5+nhF4R05GX8NABTXgnWkl8T7YSmE79+0R7 pqhZ7+pazMD0j5KTLPDto2Z1oPAeuEdaPdl8DOEfHeuji3IFeGP7o4+9an73Ph21ijgq kGwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197658; x=1787802458; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=IJUxA2gEgVqA7Wq69py4RBGAGJf+JNTEdoMwMM1C2vc=; b=C1L3kywKi6EcXal8uYMaunzo2R/ZLUkZkJyecxT6O2xJyPu9Hugp8udImT5UEPze5O TIhZXigthHeVZFmjWrwX2d5zyVOm37Dsn6CpJLjx55wiwFjXktYkusryoftUTOLPUHI9 peSaxBRX7fSwHVXTU/xYFi6l5r8dxfXoKZrEspv//kWpynOQTnAkyTZYteKeklY6Ul2y tZhsqOj+npRn8R+AYdCx0j4BTQI+INH9SK86AL+jmj+zAGXTraYQcdLVriEEJ8CK7H92 xD2WfifYrw8u/7u5KVrJ1W0+TVeCNVb75QRiC+og32A0ZNNeWiVgcmWdJhyBr4tSClFC xoVg== X-Gm-Message-State: AFuF++kqPYm2zldB8tT83fxpDV4y/wiTqgZkZxvLr7YE16gHhhwXj845 EWY51lVVfHtR3NK3npbXbu6myRj+5EiunON0UQLaNky9N+3gwvhzbbMwt8A3cw== X-Gm-Gg: AR+sD12a/LCHrevMEwWk2pYlSBiIMtjfiEin29yvPJRZ1GVrEWVNdLEbDedQEEJ/Bhq LZaNefHfJuewhOEmK+BPFIserV6rZdB4edtGbptmpctH5N4rpr0b6kGKPFIv0vZ9YFvNHUwC8eh vsQShvU4h2AOfXzN7fGNJp0cTpyeYxLw9lEvdzvyxbvxVaHvNPoBb1SfSdShVOpFzirz3mIzL9M +hjjqmduqx5JKHhWoIwMTWCQ2qeKqiMnDN4lzZGqOHrvuJV8oaSK/HoMRfqjy9Epcx1CTYqorin Xp7jvPnnT+qv+FPAf9meJ0Z9djWgWaqXXJprUAnxU5Nd387sgRTUEUuIzPSOAScHGqCJD3QhQr1 6irZWwCcspjOk1GQvKrISgvSk/Pz2C/nq589xtikrFENzeDA1O5eCoQukmDer/IQ0p4bG5mCwLe 6uryF6AFtNWlVq/omY3AJQCLS7BAiRgmak1icztIoR4TqcP3RQa0R2Tn7RGGzE0yG+sr1tMBgsZ hy93b1FkibGGwlu X-Received: by 2002:a17:90a:d2d0:b0:38e:7168:281 with SMTP id 98e67ed59e1d1-395813f7597mr17687239a91.10.1787197658023; Wed, 19 Aug 2026 20:47:38 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 60/93] disas/riscv: Handle aliases of csrrwi during decode Date: Thu, 20 Aug 2026 13:43:57 +1000 Message-ID: <20260820034430.1186695-61-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198392643158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-25-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 2 -- disas/riscv.c | 28 ++++++++-------------------- 2 files changed, 8 insertions(+), 22 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index d8c5acd969..3bbcbf10fb 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -84,8 +84,6 @@ typedef enum { rvc_imm_eq_zero, rvc_imm_eq_n1, rvc_imm_eq_p1, - rvc_csr_eq_0x001, - rvc_csr_eq_0x002, } rvc_constraint; =20 typedef enum { diff --git a/disas/riscv.c b/disas/riscv.c index 9ec79baf4d..d3cbfb86ac 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1063,8 +1063,6 @@ static const rvc_constraint rvcc_ret[] =3D { rvc_rd_e= q_x0, rvc_rs1_eq_ra, rvc_end }; static const rvc_constraint rvcc_jr[] =3D { rvc_rd_eq_x0, rvc_imm_eq_zero, rvc_end }; -static const rvc_constraint rvcc_fsrmi[] =3D { rvc_csr_eq_0x002, rvc_end }; -static const rvc_constraint rvcc_fsflagsi[] =3D { rvc_csr_eq_0x001, rvc_en= d }; =20 /* pseudo-instruction metadata */ =20 @@ -1145,12 +1143,6 @@ static const rv_comp_data rvcp_subw[] =3D { { rv_op_illegal, NULL } }; =20 -static const rv_comp_data rvcp_csrrwi[] =3D { - { rv_op_fsrmi, rvcc_fsrmi }, - { rv_op_fsflagsi, rvcc_fsflagsi }, - { rv_op_illegal, NULL } -}; - static const rv_comp_data rvcp_fsgnj_s[] =3D { { rv_op_fmv_s, rvcc_fmv_s }, { rv_op_illegal, NULL } @@ -1722,7 +1714,7 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, - { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm, rvcp_csrrwi }, + { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, { "flw", rv_codec_i, rv_fmt_frd_offset_rs1 }, @@ -4469,7 +4461,13 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) } } break; - case 5: op =3D rv_op_csrrwi; break; + case 5: + switch (operand_csr12(inst)) { + case 1: op =3D rv_op_fsflagsi; break; + case 2: op =3D rv_op_fsrmi; break; + default: op =3D rv_op_csrrwi; break; + } + break; case 6: op =3D rv_op_csrrsi; break; case 7: op =3D rv_op_csrrci; break; } @@ -4991,16 +4989,6 @@ static bool check_constraints(rv_decode *dec, const = rvc_constraint *c) return false; } break; - case rvc_csr_eq_0x001: - if (!(imm =3D=3D 0x001)) { - return false; - } - break; - case rvc_csr_eq_0x002: - if (!(imm =3D=3D 0x002)) { - return false; - } - break; default: break; } c++; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198517; cv=none; d=zohomail.com; s=zohoarc; b=APp/j4NZaLjhVXX1PPn4xrRUXb0MPey1r94snXX/1iI/7/OipnoUIXNT6inzAZPHBj4q8J4Qsi0Js0imqZP7LOdyGaWQeHUbYVp5iIztUxbQ9LcncFCv+uso6IaNvgtfmaTuU19znwZUqzX28oxLkpr/HiKrYQWH87tVtjGLl1E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198517; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=9sf58UgizOO2O3vOdLTpSVW7MW2OkpGmmaGS8aJxPcE=; b=SiJryCKyoKjUzDYXSg3+BUuZrd79scOyE95I1bPWxuLKi/OrYxd0/GxZU2aNSRR3OmmhpohZqFZzzviD0jF2jfsgdgewInLVZZ3kBw8mm16HgOqUPZ9482GugBIn7kLcTK6VL7BV5+BA8RCx9IiOa14F8GXMkBaj/3/Y/s0T71Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198517480191.2661213457361; Wed, 19 Aug 2026 21:01:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtks-0005Ij-E8; Wed, 19 Aug 2026 23:47:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkl-0004PW-PD for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:44 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkk-0004Cr-9X for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:43 -0400 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-382ef647e20so1758645a91.1 for ; Wed, 19 Aug 2026 20:47:41 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197661; x=1787802461; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=9sf58UgizOO2O3vOdLTpSVW7MW2OkpGmmaGS8aJxPcE=; b=RcJ5/q2yqdUFnGgetJty89hYRfVqhdm44whfdGlXmGtPdI9uS5dVsu5bZrSJxhD8cU 1P/2giLPOfRtWgV/Vazui9FFkMxLJsz9pcwDyPLri7PjtWJA87eXPrLkYcuj8B9Qpc6I YLr14qVqbJVFkoq+0orHmmcKVVAOWIQwp/oOFm8DgBXCPL3Ta+GP0GxpLr4UhbGDQlXu 0443Fn6Gj9RjMOB7ptCR9AKH3/wzKoUd4K7qjtuipIfnWBQ/fFMsLPd9VOHVI+ciNFX4 zLhQSH2ABU3fC+YxC9vldbkABZmXBCK3Tp6OXftRxs7sGT03xxSzRiNeVz6jnzf0uuo5 LsrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197661; x=1787802461; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=9sf58UgizOO2O3vOdLTpSVW7MW2OkpGmmaGS8aJxPcE=; b=XgE1i8M64+juMpPD8o72lhMFLsV8FmI0Jh6AKfa2w14jEU/kpy9vz0YuVtrGzhrbel 979T84Es3IYFh2dTmxr4awfXbu+1cZDhIAdxqU+SXMHOWw4TR3cNjJ2IjpCf/PsUDAki dKSYyIvD8yua+2+z3e4f93XqISs7mV1oPdaTGI0oVgTZXWzmirqOcqtqWXAluViZrcxn XOjKdyj+i8ZbfxKxW+PP3VVnahsgQPOXvlwCw3Po1shJOy0J3OuNUwXEGi40nB5x0HLR gjrz6uMkUwDY7y/0MA4wQ87Zo2sRNow+d81bmpSKqOZqc05jMI0L/OScGlErABmaJKAU iJ0w== X-Gm-Message-State: AFuF++mpaXv+JIm9S74swICwrHx3kzThBHZ0oqEsf1YE1B6uwBpeWAwb j7T0CbAnmoBFSNDUKbF6l57FJ0o8tXSS/RiatMAG+yqmxwBkcOMPiZ0C42TbIg== X-Gm-Gg: AR+sD13Z/EKLgPUtRqQ8sq9tNeghHV1M8BhrEf4RiZgvTPBmD0uOisjmy+hIlkK+CZO XRRepieDZCd4xCWLROq2MO2nDQwdjjyaAfTt+0aztdi3P67CNLnUaE1r/K95XVxijCflpYUebzC TOZTvuITDi8OM0eoZgD2tNiOT3cK12Brek3X78w8/fVEBE59Zk8jlMEmTlku9bVpnxBlTAS0lcl h3NPheJsoIEO3r4lggQWqSgOBv/HACU3FFHBCfPjHd0iUQsadXvl/5ZoeXEABRfxtiaV0FDSfIy lbeo+43DGfZvBiOkjH74xer46OhlZigdDAH0Bdi9h/efwBeaJCMkr8I/ALri4ArJem2JlZXZFcE 7cMSJjL+pYL3HZ9GSi6swsgb7awTZio5yXTCPKw5zW1w5hFRDBKbUNNewLcZKZe/l1sbsKYIJqG cGjPE4loh5TmDfm1g0x7v27xb2P3qfRz4/f8GeUqeSzaz12rMNZ1N5ZEXvz1QNMvuZdUVIsRJvp pTFEg== X-Received: by 2002:a17:90b:39ab:b0:38e:fea2:df53 with SMTP id 98e67ed59e1d1-39580ed4567mr15742282a91.4.1787197660657; Wed, 19 Aug 2026 20:47:40 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 61/93] disas/riscv: Break pseudo loop for jal and jalr Date: Thu, 20 Aug 2026 13:43:58 +1000 Message-ID: <20260820034430.1186695-62-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198519239158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson These were clearly intending to simplify jal ra, foo to jal foo and similarly for jalr, but the pseudo expansion looped back to the original jal/jalr with the full format. Add new opcode expansions dropping the implied ra. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-26-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index d3cbfb86ac..fe503b6cae 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -326,6 +326,8 @@ typedef enum { rv_op_bgez =3D 295, rv_op_bltz =3D 296, rv_op_bgtz =3D 297, + rv_op_jal_ra =3D 298, + rv_op_jalr_ra =3D 299, rv_op_j =3D 302, rv_op_ret =3D 303, rv_op_jr =3D 304, @@ -1029,9 +1031,9 @@ static const char rv_fli_name_const[32][9] =3D =20 /* pseudo-instruction constraints */ =20 -static const rvc_constraint rvcc_jal[] =3D { rvc_rd_eq_ra, rvc_end }; -static const rvc_constraint rvcc_jalr[] =3D { rvc_rd_eq_ra, rvc_imm_eq_zer= o, - rvc_end }; +static const rvc_constraint rvcc_jal_ra[] =3D { rvc_rd_eq_ra, rvc_end }; +static const rvc_constraint rvcc_jalr_ra[] =3D { rvc_rd_eq_ra, rvc_imm_eq_= zero, + rvc_end }; static const rvc_constraint rvcc_nop[] =3D { rvc_rd_eq_x0, rvc_rs1_eq_x0, rvc_imm_eq_zero, rvc_end }; static const rvc_constraint rvcc_mv[] =3D { rvc_imm_eq_zero, rvc_end }; @@ -1068,14 +1070,14 @@ static const rvc_constraint rvcc_jr[] =3D { rvc_rd_= eq_x0, rvc_imm_eq_zero, =20 static const rv_comp_data rvcp_jal[] =3D { { rv_op_j, rvcc_j }, - { rv_op_jal, rvcc_jal }, + { rv_op_jal_ra, rvcc_jal_ra }, { rv_op_illegal, NULL } }; =20 static const rv_comp_data rvcp_jalr[] =3D { { rv_op_ret, rvcc_ret }, { rv_op_jr, rvcc_jr }, - { rv_op_jalr, rvcc_jalr }, + { rv_op_jalr_ra, rvcc_jalr_ra }, { rv_op_illegal, NULL } }; =20 @@ -1884,8 +1886,8 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "bgez", rv_codec_sb, rv_fmt_rs1_offset }, { "bltz", rv_codec_sb, rv_fmt_rs1_offset }, { "bgtz", rv_codec_sb, rv_fmt_rs2_offset }, - { }, - { }, + { "jal", rv_codec_none, rv_fmt_offset }, /* rv_op_jal_ra */ + { "jalr", rv_codec_none, rv_fmt_rs1 }, /* rv_op_jalr_ra */ { }, { }, { "j", rv_codec_uj, rv_fmt_offset }, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198393; cv=none; d=zohomail.com; s=zohoarc; b=VkI3eDbv5SXoZMPQFEJ1cCuB8TUUODF1HGMaTWMLE7EjvC7Q50/cLjpR8+AYYwdKSpXULa34Hf/ozeeeMCYbdIHLCXGFN29aW1AGOUfsgKoGzLgKkpqTmW/fY6BBx6hMWz2ADZ/qEF4EcFIOgA59Ki2LQvu2Tt3suOIHOgtwfic= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198393; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=1iq/zZquDTsNMfYQjuptbKKoh31S0HQU5QbrfhrMH/8=; b=c9Tq4ZYJvPNDc/5UF2IwA1XxIGs3R6oI7euKOtIJIuah6Gay7TeMme1s8Wi6DwbcOegXkZG3LeFJzwXdvRrYrNE9CtzDgYU6CtiFxvc5i6Y+wEvYfMqDI1+EiyOzF2uaogAuGYFxlu1A0KWGE7D3CIqYIwGri1Bfc+fMB9gqtec= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198393133517.6898397962101; Wed, 19 Aug 2026 20:59:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkr-0005CC-HZ; Wed, 19 Aug 2026 23:47:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtko-0004mg-H6 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:46 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkm-0004DC-SX for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:46 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-3811f512167so2524328a91.3 for ; Wed, 19 Aug 2026 20:47:44 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197663; x=1787802463; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=1iq/zZquDTsNMfYQjuptbKKoh31S0HQU5QbrfhrMH/8=; b=XH77IMQ1abHzH5OaHOemc3DnzwV57RCMJ2rc2OwdJ7zzgpAem6N8fHez61rDEAaXR1 4g6lSu29INjK0eoVsGr2IMsKqpr/hNpNkZdjP+qviA2uaHY0827+OR8/rQeRpv6wVCX3 /dDOrO3qSLNISnQhJ3U4EFuUlHO3ORIVORzcF//WbQbjIcmPEwweYN0qECYC5G8uoPjL 3s0jnKkMcuFWS1pv7D/Cuke0kNZosAIixrYLYESYQU2lsafmqN3krpfaXXC0Loq5X2aE pVs1XDIXbvxgaWGBZCxjxIVNnEwKg8KnCI8lNjTZzCgMEvL9OQgLOMWnz9bPY7sQuHyi itXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197663; x=1787802463; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=1iq/zZquDTsNMfYQjuptbKKoh31S0HQU5QbrfhrMH/8=; b=a6bwKb7w5F6Xp/Fyk2D6djkgeeu76gLggyjFZ7u+lE7IMJOCisoHD9X8Mz+tcqnIVM fi7irI3QZK0B7GYSBS/aP50b4N/fa0XzTxgv9r75BMj6N8ASwud25Gk20RP5lJTxQZfD 2GthrcCmvxY/IEJ/3bft1ll3jxEl0Bt1H+Hd3vmh/bD/0aD1MgySradXMNe+Wp5X2ZCL /oDhea36Mp54EXb4kadt7DvAOIy134GHaJrrN7WH7zjrWfvrNWL6ydTwzccIuXE8uVdQ +cwqbFBDPSaAy3M+nz+wQMbT/14D1uklpJ1D/9TZac6CY+1SocSSegM/2cVgNjNko07i lX6g== X-Gm-Message-State: AFuF++kbHl97hPLmJqVqv0pxazDeK5Bz9/hdgDtid2SA3J38vWYmaNvw FuNrmqDqB0+smc0aeY4pJ+MR7o6U2/BeKR7uE4XXax7n4oKZfGZviq6tfd0yQg== X-Gm-Gg: AR+sD104V6z79pA+k2wdZxz+IXbQB5vOjfvmW2hCqCEP84XN0mJub5VIVcxCM2qHGJZ NKNo5fPkytKTMACZ16eftqMnXPzqAuPFeU1z/n+WeCMTxwB/gaO6HwFx5CVXt831kWxIUl8W4BS snzFX0mpIh+uurKrELc2ziAbvEm2H89+Q0fItcQaJroekwdueQfcdmTgNRqBbmw9FWhKQktE+nz YwgnYkbR0RasOhXWioDEIC8v73bG08M2D0iB8Z0lZUb92X38hpmx5+d9jQYf92MHQRIgIZEyvDr VCV3LaOCGR6jFy1K2My+lgDXHFM3IRu7Xi4KHGBRAErXl5oaFmjnLApCWUbktQmwMd5jX0GOhpq A39AVxh4fOHnGn1vRjSC0A2zrngADtZ9FhRo347XX+6rkAOJ203MmoMTeH7J1HTwtkuEkipacMY +OGwK2f8XY/fT3trGbyZgRFlfReNmg9uXFaZYDq+fFvPRVcsO4Fp2k8QjP9TSf7Ug= X-Received: by 2002:a17:90b:2f8b:b0:38f:57f0:1f5d with SMTP id 98e67ed59e1d1-395810d73e6mr18346293a91.15.1787197663247; Wed, 19 Aug 2026 20:47:43 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 62/93] disas/riscv: Allow decode_inst_lift_pseudo to loop Date: Thu, 20 Aug 2026 13:43:59 +1000 Message-ID: <20260820034430.1186695-63-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198394640158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Allow pseudo expansion to proceed in multiple steps. Assert that we don't have simple loops. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-27-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index fe503b6cae..b8e5b124a5 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5259,9 +5259,9 @@ static const rv_opcode_data *decode_inst_lift_pseudo(= rv_decode *dec, if (comp_data) { while (comp_data->constraints) { if (check_constraints(dec, comp_data->constraints)) { - dec->op =3D comp_data->op; - op =3D &dec->opcode_data[dec->op]; - break; + const rv_opcode_data *new_op =3D &dec->opcode_data[comp_da= ta->op]; + assert(new_op !=3D op); + return decode_inst_lift_pseudo(dec, new_op); } comp_data++; } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198373; cv=none; d=zohomail.com; s=zohoarc; b=ndRtVdMUCWZ+iRbvigrSLXR4WvuXs+7my+cqrQPDT+Or6isgfYuSa+SKvuOk2oXuxZsgzhBKB0olIN3e6tUfKUNIVlyx9Yquud/uE/xH93bRaqY+20JPvBUmk4yaQSCdd0cyN3JNV44ZSMB7LYlxvUhhYnJhSxvfF+ZWOTaAZ6Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198373; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=GPJ/EM8CC6R9rZqKxgsloXc62/KmmIxRWgCKFfWrSo8=; b=H7SpMQmCJG+gZBoWeAKx63PjGHeJLkP9cdECOS0ACLjT9Zmk0QbacSDO0NA+SmnYuCx1bIRHnYTi2grM23vOQeN8YRtqaQzbZnz7d2lQlszQdDh7ook9Hmm2ypr95oJNl/vSnWLVDDzDXZntDqrGZYLW6bRrRgVC/TGAcQkg0wo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198373368336.18044614268865; Wed, 19 Aug 2026 20:59:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkv-0005OE-6R; Wed, 19 Aug 2026 23:47:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkr-0005GL-Ud for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:50 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkp-0004EQ-HN for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:49 -0400 Received: by mail-pg1-x52c.google.com with SMTP id 41be03b00d2f7-cc11a30a259so1502322a12.3 for ; Wed, 19 Aug 2026 20:47:47 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197666; x=1787802466; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=GPJ/EM8CC6R9rZqKxgsloXc62/KmmIxRWgCKFfWrSo8=; b=CP7uP3GY1qmOOzKtyvkjqNugyY2LCecW85qvzAGHk0kHFIfnsFDpNaoW6JKw8AskXR aQ9GRmuQVFJcHX6apBYnZoMWHZO8qLYQVcuwS7Ho2ihD6jPWbFgHrtGZY3k8ptVsDYLb C2Y6j564PNGh0bTyZfvEyMMYxHGZJfsJvKLpxzsLYk4VI/fOlgTXO5Xl3MCyyTzTgu4h sPNILM4oOONlD3y0HjPZg7tdlwHoqyzu7t2e8aoDw9+u2Lw20p5V2A7ebtyyugc9nI2Y VzOrUoobZIagGYHE1LyOz03+TQuKag0x6GJupxRB/lGrZ23MXkGjRg3m0prThg1AUSHy 93WA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197666; x=1787802466; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=GPJ/EM8CC6R9rZqKxgsloXc62/KmmIxRWgCKFfWrSo8=; b=Df6JCIwVyd8SlIElEflmBfWDNAyk13ElimnEbQpA2/gM/dpVMNLQ62VuMeAVEz4bZX HTNPpkNW/8EmSOujmaE7KTfGZKsKYm7+OvO7DBbPUsyc2DlRcI4GQQCAUioMu9soDDzF taY0gUmqywALay6uBb6VQMJjxjnXVouPv8WDED9sV8JOEXJPTvgiQZWik4Vhvbs+ienP L1tLXmdhTJmobsqhtdN5bTvgeBxyMB8EmhGsJNyZRQSC/61WpLZ/7IVUfycuXZ0Fno85 +tp7RoliV8fmhDOWn6P1KC6vQp48GU14kPKs4qW6/LN5Ik0AXD1dTNZK2xpBXYAGIaox wWKg== X-Gm-Message-State: AFuF++m7EQkmVsaKTTJqTAUTKlWOlpqGfIXtzM1zGHUZHu/3/UEANNte UZ7v0UT+wM5x67rhIgFdkhkjzh+Z6japZXNbx8okgCprPpd1lNBdJwSxkLjKCw== X-Gm-Gg: AR+sD12FvsdjEsA81erclIZvlbTd9orVMww56y4NNYILDKMaWZS4s6HfTTKgjxqm3hZ qgdZdWjl5tUmO89pUbXta9bpHk4Q+vIScGo068rOTq+1cqgeEstctLZK+Ji1ZlYnMbAoozcjqt7 uMOZjt7z2mWFQTag8jpnqrSMxjHsfjn2MnBbpnYeDylIVjusWcdhfurjj307a6NZz3cgR65ftW1 eIZg6irPr2GUin//7rjmCor220HQVd37XviZEaCaDukw4/Qb37tBLaAK89b2rysOGSuLiXAOeHw YMHPh5Q7XatYNcym/RziqlbOS1Idwi8/hRqkTp1wyaMgscMVuFz0Rp+OYlFETXXoX8jpwIP9f3F sV7rttgr3fmJt3i+h8EgSM8AVNbfteK3Lf8FdUWf+BN5seDXRZ0EFE7gTK9uj9ZFV/y1tp8Ph/U vYgLyvKF1Z+eMj6bml8WY3D2vABCITU8x/CqEJK5zUItum8nLvn6TwTBBuGofaDATr9wkFMBR1v BNzFi84rFyC/+yn X-Received: by 2002:a17:90b:280a:b0:38d:dfd1:7a8 with SMTP id 98e67ed59e1d1-39580a81304mr18416546a91.2.1787197665810; Wed, 19 Aug 2026 20:47:45 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 63/93] disas/riscv: Handle decompression via decode_inst_lift_pseudo Date: Thu, 20 Aug 2026 13:44:00 +1000 Message-ID: <20260820034430.1186695-64-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198374699158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Introduce a DECOMP macro that expands an rv_comp_data that always succeeds. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-28-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 1 - disas/riscv.c | 113 +++++++++++++++++++++++--------------------------- 2 files changed, 51 insertions(+), 63 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 3bbcbf10fb..ea7141d3b5 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -174,7 +174,6 @@ typedef struct { rv_codec codec; const char *format; const rv_comp_data *pseudo; - rv_opcode decomp; } rv_opcode_data; =20 typedef struct { diff --git a/disas/riscv.c b/disas/riscv.c index b8e5b124a5..a359badab5 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1065,6 +1065,7 @@ static const rvc_constraint rvcc_ret[] =3D { rvc_rd_e= q_x0, rvc_rs1_eq_ra, rvc_end }; static const rvc_constraint rvcc_jr[] =3D { rvc_rd_eq_x0, rvc_imm_eq_zero, rvc_end }; +static const rvc_constraint rvcc_true[] =3D { rvc_end }; =20 /* pseudo-instruction metadata */ =20 @@ -1190,6 +1191,9 @@ static const rv_comp_data rvcp_fsgnjx_q[] =3D { { rv_op_illegal, NULL } }; =20 +/* Convert compressed insns into normal insns via pseudo expansion. */ +#define DECOMP(X) &(const rv_comp_data){ X, rvcc_true } + /* operand extractors */ =20 static uint32_t operand_rd(rv_inst inst) @@ -1815,52 +1819,52 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1 }, { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1 }, - { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, NULL, rv_op_addi= }, - { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, NULL, rv_op_fld }, - { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, NULL, rv_op_lw }, - { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, NULL, rv_op_flw }, - { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsd }, - { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw }, - { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, NULL, rv_op_fsw }, + { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, DECOMP(rv_op_add= i) }, + { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, DECOMP(rv_op_fld) }, + { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lw) }, + { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, DECOMP(rv_op_flw) }, + { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_fsd) }, + { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sw) }, + { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_fsw) }, { }, - { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addi }, - { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, NULL, rv_op_jal }, - { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, NULL, rv_op_addi }, - { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, NULL, rv_op_addi = }, - { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, NULL, rv_op_lui }, - { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srli }, - { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_srai }, - { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, NULL, rv_op_andi }, - { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_sub }, - { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_xor }, - { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_or }, - { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_and }, - { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_subw }, - { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, NULL, rv_op_addw }, - { "c.j", rv_codec_cj, rv_fmt_rd_offset, NULL, rv_op_jal }, - { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_beq }, - { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, NULL, rv_op_bne }, - { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, NULL, rv_op_slli }, - { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, NULL, rv_op_fld = }, - { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lw }, - { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, NULL, rv_op_flw = }, - { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr }, - { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, NULL, rv_op_addi }, - { "c.ebreak", rv_codec_ci_none, rv_fmt_none, NULL, rv_op_ebreak }, - { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, NULL, rv_op_jalr }, - { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, NULL, rv_op_add }, - { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fs= d }, - { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sw }, - { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, NULL, rv_op_fs= w }, - { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, NULL, rv_op_ld }, - { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, NULL, rv_op_sd }, - { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, NULL, rv_op_addiw }, - { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, NULL, rv_op_ld }, - { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sd }, - { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, NULL, rv_op_lq }, - { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, NULL, rv_op_sq }, - { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, NULL, rv_op_lq }, - { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, NULL, rv_op_sq }, + { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addi) }, + { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, DECOMP(rv_op_jal) }, + { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addi) }, + { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addi= ) }, + { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, DECOMP(rv_op_lui) }, + { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, DECOMP(rv_op_srli) }, + { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, DECOMP(rv_op_srai) }, + { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, DECOMP(rv_op_andi) }, + { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_sub) }, + { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_xor) }, + { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_or) }, + { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_and) }, + { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_subw) }, + { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_addw) }, + { "c.j", rv_codec_cj, rv_fmt_rd_offset, DECOMP(rv_op_jal) }, + { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, DECOMP(rv_op_beq) }, + { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, DECOMP(rv_op_bne) }, + { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, DECOMP(rv_op_slli) }, + { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, DECOMP(rv_op_fld= ) }, + { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lw) }, + { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, DECOMP(rv_op_flw= ) }, + { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, DECOMP(rv_op_jalr) }, + { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_addi) }, + { "c.ebreak", rv_codec_ci_none, rv_fmt_none, DECOMP(rv_op_ebreak) }, + { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, DECOMP(rv_op_jalr)= }, + { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_add) }, + { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_f= sd) }, + { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sw)= }, + { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_f= sw) }, + { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, DECOMP(rv_op_ld) }, + { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sd) }, + { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addiw) }, + { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, DECOMP(rv_op_ld) }, + { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sd)= }, + { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lq) }, + { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sq) }, + { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lq) }, + { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sq)= }, { "nop", rv_codec_i, rv_fmt_none }, { "mv", rv_codec_i, rv_fmt_rd_rs1 }, { "not", rv_codec_i, rv_fmt_rd_rs1 }, @@ -2542,8 +2546,8 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "ssrdp", rv_codec_r, rv_fmt_rd }, { "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, { "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "c.sspush", rv_codec_cmop_ss, rv_fmt_rs2, NULL, rv_op_sspush }, - { "c.sspopchk", rv_codec_cmop_ss, rv_fmt_rs1, NULL, rv_op_sspopchk }, + { "c.sspush", rv_codec_cmop_ss, rv_fmt_rs2, DECOMP(rv_op_sspush) }, + { "c.sspopchk", rv_codec_cmop_ss, rv_fmt_rs1, DECOMP(rv_op_sspopchk) }, { "cbo.inval", rv_codec_r, rv_fmt_rs1 }, { "cbo.clean", rv_codec_r, rv_fmt_rs1 }, { "cbo.flush", rv_codec_r, rv_fmt_rs1 }, @@ -5269,20 +5273,6 @@ static const rv_opcode_data *decode_inst_lift_pseudo= (rv_decode *dec, return op; } =20 -/* decompress instruction */ - -static const rv_opcode_data *decode_inst_decompress(rv_decode *dec, - const rv_opcode_data *= op) -{ - int decomp_op =3D op->decomp; - - if (decomp_op !=3D rv_op_illegal) { - dec->op =3D decomp_op; - op =3D &dec->opcode_data[decomp_op]; - } - return op; -} - /* disassemble instruction */ =20 static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst, @@ -5333,7 +5323,6 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, =20 op =3D &dec.opcode_data[dec.op]; decode_inst_operands(&dec, isa, op); - op =3D decode_inst_decompress(&dec, op); op =3D decode_inst_lift_pseudo(&dec, op); return format_inst(24, &dec, op); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198364; cv=none; d=zohomail.com; s=zohoarc; b=RzWZeh8FZ0WXM0rHO7131/Fjwk16PLpeBJetlJXb+jugH9JOVNYhzzGu5kGnljwsg/h22q/DfTNABimS+aGkMMDFNXNx4opfgEYU8dKSl/Ojx4YQeQ6bKvbxdiU4rjLslLwXJah2Ly0KcGhJk3gbn1m/g2ZmJ/rZqQ+gy/adVhw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198364; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=NfDNN58R8WheefjeRqGFB5HT4nt99gbZjt03X7sKOYA=; b=g+gEWpZUKFsvQShXm6TxyW8PvESPqghh7pEwQ2pNMffaQePdYZxWYTR4TaCDnphz75Y4EUz3Httj1eeNGxniPU1LWliCQpsUH3HFsbl/kg9dNawyx0Jt8pmTr34OWKe7sLH8LtviRXNgwARP50kJCXaelMkKPlYVZ3+l9RtFsug= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198364537568.5181648299866; Wed, 19 Aug 2026 20:59:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkv-0005OO-Iu; Wed, 19 Aug 2026 23:47:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtku-0005Nu-2Y for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:52 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtks-0004Fv-1d for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:51 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-38d489b6b71so1819487a91.0 for ; Wed, 19 Aug 2026 20:47:49 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197668; x=1787802468; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=NfDNN58R8WheefjeRqGFB5HT4nt99gbZjt03X7sKOYA=; b=c4Mdwm+xRYBmB486xBsv6j4I98vAf7pfGAZsoLfpGY2nlcXJ+QGcTQNUsJXl3fp4aa JVAWjCCOeKqvWWhWBSVnXot2Aw1Iee+ykqrNnhFTi+hi1Kpfu2E/MsFH2DTE9HtYYmXQ DBvxtRLD44Jd/ItO+YIWH8GunxQ+XKY3s9gz4rErjoGcdz4wKP2ie5zW7Gaq6kX7tfIu /HCDubPEpenPfsTwibhx0Btu2zTAU6TyH0U3s8oBPY3JydT+KzixNHsijdnjLzGCySXc GABUL5JqaIdLQgFAq1xYVxVu//gHvonPvNN899Yq0+Uk8YIQGBASmrFO1vC3gpSnJSW8 Vg+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197668; x=1787802468; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=NfDNN58R8WheefjeRqGFB5HT4nt99gbZjt03X7sKOYA=; b=biQa7dfv8zoGA2zhK/0qYqz9vaE6SFIKjhRes0dFlZMlEkOQKX2qh24sHzaGTKH0lq KFfDyItMnJ4JHp/cvhCbThBkVfUoAEkm+X/vYg8TfQ0M3BbKC2hHXaPwhixT0XMuU2Hg Et49Zl8iPdmxwZ9UBnaSPvGlYpXWnSTipbxn7RzgVWW9QBdYh1LUc0Oe/CJba+IuJHns V3Gi/NDqP9OAqFn3gkZOI6611KDdBO6wqGGQDx3oAF492cCdUqPBf0Up3PG472Jfdc6m 19icSZuGGwZrDXPKhoUR47wOtFF4OFOy2gw9+1GAzuRaow8+4+4Fo/GDJjOv1BHIP4rR 2rJw== X-Gm-Message-State: AFuF++k+mnvPmzYFEUO1C4tj3VjaxM3v3t6T41y1LxZ99npDOAkEKfGo fuYePnUqmFHq/xLcbIMWjS0VIdx+CwfPjPb+vT5f8rAoz0b3t7qjT6cjD8n3mg== X-Gm-Gg: AR+sD133+TUUPzH5crjuZN9J/shGPJI801p5PvmQtboS7WEypPxf8bQ+vAIRGy8unT8 lY85RPgDEghcmHIF03kIXYMtO3+B03fG47oATWw1uVQqS/ff9kPCN99yF57o4nGmKGYPJJSoqxb nkDsj40PuaMqQMgl8qBBqT9PSpBL2Z6UnDZQEdUXT/nGdJEywoXPTESY0ZLVE2Fbo7nDr2+o5tf snCd9Q3W6r2ccevk31UUMGdQm4NNa64kciQ2LVfknrPF3HOm4SstQF2A1kgP6+xCzb8uaMr4I8q PsoiFso9FuXOVe3vCv5mbld2MyqeI1E2t+7culNHs514N1Pun/SVIZlm7swaxZOjXDdKbssa40r qFxCyeyLu0wE4ndy1Z4njlbBho9vL5vRFBFAJD2V+9i/bErYhZUPwjfcrU/MHHpCnEm4dZs56sN 3HP1BwPUV7SEezfO/ycdAKcVuG6s5TKryjVxuvIhKYC7X+X50AGCQLHDSPb8DijLJKadVtAI6JH f4GVQ== X-Received: by 2002:a17:90a:da90:b0:37c:6910:5758 with SMTP id 98e67ed59e1d1-39580a91ae0mr18944621a91.1.1787197668484; Wed, 19 Aug 2026 20:47:48 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 64/93] disas/riscv: Drop format from DECOMP insns Date: Thu, 20 Aug 2026 13:44:01 +1000 Message-ID: <20260820034430.1186695-65-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198366572158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson The format for these will never be used -- we will use the format from the decompressed insn. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-29-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 94 +++++++++++++++++++++++++-------------------------- 1 file changed, 47 insertions(+), 47 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index a359badab5..e0b3d22031 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1819,52 +1819,52 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1 }, { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1 }, - { "c.addi4spn", rv_codec_ciw_4spn, rv_fmt_rd_rs1_imm, DECOMP(rv_op_add= i) }, - { "c.fld", rv_codec_cl_ld, rv_fmt_frd_offset_rs1, DECOMP(rv_op_fld) }, - { "c.lw", rv_codec_cl_lw, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lw) }, - { "c.flw", rv_codec_cl_lw, rv_fmt_frd_offset_rs1, DECOMP(rv_op_flw) }, - { "c.fsd", rv_codec_cs_sd, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_fsd) }, - { "c.sw", rv_codec_cs_sw, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sw) }, - { "c.fsw", rv_codec_cs_sw, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_fsw) }, + { "c.addi4spn", rv_codec_ciw_4spn, NULL, DECOMP(rv_op_addi) }, + { "c.fld", rv_codec_cl_ld, NULL, DECOMP(rv_op_fld) }, + { "c.lw", rv_codec_cl_lw, NULL, DECOMP(rv_op_lw) }, + { "c.flw", rv_codec_cl_lw, NULL, DECOMP(rv_op_flw) }, + { "c.fsd", rv_codec_cs_sd, NULL, DECOMP(rv_op_fsd) }, + { "c.sw", rv_codec_cs_sw, NULL, DECOMP(rv_op_sw) }, + { "c.fsw", rv_codec_cs_sw, NULL, DECOMP(rv_op_fsw) }, { }, - { "c.addi", rv_codec_ci, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addi) }, - { "c.jal", rv_codec_cj_jal, rv_fmt_rd_offset, DECOMP(rv_op_jal) }, - { "c.li", rv_codec_ci_li, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addi) }, - { "c.addi16sp", rv_codec_ci_16sp, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addi= ) }, - { "c.lui", rv_codec_ci_lui, rv_fmt_rd_uimm, DECOMP(rv_op_lui) }, - { "c.srli", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, DECOMP(rv_op_srli) }, - { "c.srai", rv_codec_cb_sh6, rv_fmt_rd_rs1_imm, DECOMP(rv_op_srai) }, - { "c.andi", rv_codec_cb_imm, rv_fmt_rd_rs1_imm, DECOMP(rv_op_andi) }, - { "c.sub", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_sub) }, - { "c.xor", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_xor) }, - { "c.or", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_or) }, - { "c.and", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_and) }, - { "c.subw", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_subw) }, - { "c.addw", rv_codec_cs, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_addw) }, - { "c.j", rv_codec_cj, rv_fmt_rd_offset, DECOMP(rv_op_jal) }, - { "c.beqz", rv_codec_cb, rv_fmt_rs1_rs2_offset, DECOMP(rv_op_beq) }, - { "c.bnez", rv_codec_cb, rv_fmt_rs1_rs2_offset, DECOMP(rv_op_bne) }, - { "c.slli", rv_codec_ci_sh6, rv_fmt_rd_rs1_imm, DECOMP(rv_op_slli) }, - { "c.fldsp", rv_codec_ci_ldsp, rv_fmt_frd_offset_rs1, DECOMP(rv_op_fld= ) }, - { "c.lwsp", rv_codec_ci_lwsp, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lw) }, - { "c.flwsp", rv_codec_ci_lwsp, rv_fmt_frd_offset_rs1, DECOMP(rv_op_flw= ) }, - { "c.jr", rv_codec_cr_jr, rv_fmt_rd_rs1_offset, DECOMP(rv_op_jalr) }, - { "c.mv", rv_codec_cr_mv, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_addi) }, - { "c.ebreak", rv_codec_ci_none, rv_fmt_none, DECOMP(rv_op_ebreak) }, - { "c.jalr", rv_codec_cr_jalr, rv_fmt_rd_rs1_offset, DECOMP(rv_op_jalr)= }, - { "c.add", rv_codec_cr, rv_fmt_rd_rs1_rs2, DECOMP(rv_op_add) }, - { "c.fsdsp", rv_codec_css_sdsp, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_f= sd) }, - { "c.swsp", rv_codec_css_swsp, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sw)= }, - { "c.fswsp", rv_codec_css_swsp, rv_fmt_frs2_offset_rs1, DECOMP(rv_op_f= sw) }, - { "c.ld", rv_codec_cl_ld, rv_fmt_rd_offset_rs1, DECOMP(rv_op_ld) }, - { "c.sd", rv_codec_cs_sd, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sd) }, - { "c.addiw", rv_codec_ci, rv_fmt_rd_rs1_imm, DECOMP(rv_op_addiw) }, - { "c.ldsp", rv_codec_ci_ldsp, rv_fmt_rd_offset_rs1, DECOMP(rv_op_ld) }, - { "c.sdsp", rv_codec_css_sdsp, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sd)= }, - { "c.lq", rv_codec_cl_lq, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lq) }, - { "c.sq", rv_codec_cs_sq, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sq) }, - { "c.lqsp", rv_codec_ci_lqsp, rv_fmt_rd_offset_rs1, DECOMP(rv_op_lq) }, - { "c.sqsp", rv_codec_css_sqsp, rv_fmt_rs2_offset_rs1, DECOMP(rv_op_sq)= }, + { "c.addi", rv_codec_ci, NULL, DECOMP(rv_op_addi) }, + { "c.jal", rv_codec_cj_jal, NULL, DECOMP(rv_op_jal) }, + { "c.li", rv_codec_ci_li, NULL, DECOMP(rv_op_addi) }, + { "c.addi16sp", rv_codec_ci_16sp, NULL, DECOMP(rv_op_addi) }, + { "c.lui", rv_codec_ci_lui, NULL, DECOMP(rv_op_lui) }, + { "c.srli", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srli) }, + { "c.srai", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srai) }, + { "c.andi", rv_codec_cb_imm, NULL, DECOMP(rv_op_andi) }, + { "c.sub", rv_codec_cs, NULL, DECOMP(rv_op_sub) }, + { "c.xor", rv_codec_cs, NULL, DECOMP(rv_op_xor) }, + { "c.or", rv_codec_cs, NULL, DECOMP(rv_op_or) }, + { "c.and", rv_codec_cs, NULL, DECOMP(rv_op_and) }, + { "c.subw", rv_codec_cs, NULL, DECOMP(rv_op_subw) }, + { "c.addw", rv_codec_cs, NULL, DECOMP(rv_op_addw) }, + { "c.j", rv_codec_cj, NULL, DECOMP(rv_op_jal) }, + { "c.beqz", rv_codec_cb, NULL, DECOMP(rv_op_beq) }, + { "c.bnez", rv_codec_cb, NULL, DECOMP(rv_op_bne) }, + { "c.slli", rv_codec_ci_sh6, NULL, DECOMP(rv_op_slli) }, + { "c.fldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_fld) }, + { "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_lw) }, + { "c.flwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_flw) }, + { "c.jr", rv_codec_cr_jr, NULL, DECOMP(rv_op_jalr) }, + { "c.mv", rv_codec_cr_mv, NULL, DECOMP(rv_op_addi) }, + { "c.ebreak", rv_codec_ci_none, NULL, DECOMP(rv_op_ebreak) }, + { "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(rv_op_jalr) }, + { "c.add", rv_codec_cr, NULL, DECOMP(rv_op_add) }, + { "c.fsdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_fsd) }, + { "c.swsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_sw) }, + { "c.fswsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_fsw) }, + { "c.ld", rv_codec_cl_ld, NULL, DECOMP(rv_op_ld) }, + { "c.sd", rv_codec_cs_sd, NULL, DECOMP(rv_op_sd) }, + { "c.addiw", rv_codec_ci, NULL, DECOMP(rv_op_addiw) }, + { "c.ldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_ld) }, + { "c.sdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_sd) }, + { "c.lq", rv_codec_cl_lq, NULL, DECOMP(rv_op_lq) }, + { "c.sq", rv_codec_cs_sq, NULL, DECOMP(rv_op_sq) }, + { "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(rv_op_lq) }, + { "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(rv_op_sq) }, { "nop", rv_codec_i, rv_fmt_none }, { "mv", rv_codec_i, rv_fmt_rd_rs1 }, { "not", rv_codec_i, rv_fmt_rd_rs1 }, @@ -2546,8 +2546,8 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "ssrdp", rv_codec_r, rv_fmt_rd }, { "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, { "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "c.sspush", rv_codec_cmop_ss, rv_fmt_rs2, DECOMP(rv_op_sspush) }, - { "c.sspopchk", rv_codec_cmop_ss, rv_fmt_rs1, DECOMP(rv_op_sspopchk) }, + { "c.sspush", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspush) }, + { "c.sspopchk", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspopchk) }, { "cbo.inval", rv_codec_r, rv_fmt_rs1 }, { "cbo.clean", rv_codec_r, rv_fmt_rs1 }, { "cbo.flush", rv_codec_r, rv_fmt_rs1 }, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198250; cv=none; d=zohomail.com; s=zohoarc; b=eNmu/EFdufuka8vnE1GnSXQkABA8d1YpeHs6VYV0RCYDgen8lvCA5MSEW/6PGioqLOpafxiLIZxF437eHBsQlZwfVjXNVrr2BNW7GG9VmX6yAlW0In4C45syShplR5dKTPcwaof4sXVFw2liY4aVI4oTHn7PUEEF88gRrvb6Koo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198250; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=msTYxKrfEGozy/cQf2TaV3I4p9p1A05eh8KT3o9m9rM=; b=ThHn4Mkoxpuq0NndTUyZ7bOWOg8txKyE4I+L3Epc80/vSrjaBKlZsjq7Kzt2uPG8zKgHx1tEWiGER9TVe8j/dyb5ZFJxT7T09QlecslCdsoRtC4OerXC9Z8mpIvQnMw9NA9GJsfyXT3l9Xop7kUIAY3dbAWrXt3X2SjxdsRQaKc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198250968475.70828604259384; Wed, 19 Aug 2026 20:57:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkx-0005Wc-3s; Wed, 19 Aug 2026 23:47:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtkw-0005Ot-2X for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:54 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtku-0004II-EZ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:53 -0400 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-384930ca5e2so2214454a91.3 for ; Wed, 19 Aug 2026 20:47:52 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197671; x=1787802471; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=msTYxKrfEGozy/cQf2TaV3I4p9p1A05eh8KT3o9m9rM=; b=L08OjMTvBAhxBqfBK56J7RK7s+PGS3MoXs69ROv1GXievAp0A5MFnmVnE2Z0NlMsrc 5fhjNbHhx6bPkF4xXh97ikuqjen+v4CBKHrLHIUbSMmw39oOomGMUTbFF2Fbs/QS+k6j OmcJhPJ0vN1MJKjwsTkQIcVqc82iIUBTL+5OuQoFHPQ765JIc7l/UjTLoY2tyXLVFEom T4PESWdukXN19vIGZQ58WSeQRBLy4F3uXC5mGLoTNFMCKB0VBz93CQf3gq0W0rcp8+6v HVX8jtzx1ISfqDY47gdFxlqO+0+tpJhMfbJ9ZIiM3Q/TCEXFjOVCrouqq4RqfCz1FNeg Dj+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197671; x=1787802471; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=msTYxKrfEGozy/cQf2TaV3I4p9p1A05eh8KT3o9m9rM=; b=eMexpgN4wUEBQKoXHjsDqMgXyheLkMNbgChcV5ceNtB4r0n4OP40Oi6N1ufZSfLce8 2t1enVkckzscdU5nTPL5tJkQXtt9g7bCZ3Z5+QDP44ly0sKRaYOuyr774SpUaPD+NC+4 NNCRkREQTP0+qizmo2nQWmVF4ziqLBR0D+nW9cLTQsVU7eUdzJqR7lz5aez4agEwlwXV i1u0/7uK2GEvodgL/N0MhQDJ8nkVN1Jyln1NJi2RggPgoptACG2RxBmk9XXZVWZhESLc qKY9AC5Hv5VOtyJeXXXtkChSPYJMo2K2Cg4va4zhmSucbIwsXRYUlvKpsFT+XkhDdYK/ sNSA== X-Gm-Message-State: AFuF++nlwEme9qv57jvHHeVLMVZn2bWnXZZyMHbAdyyZEyk44zLv9KtC 57HDpYpdqUUZv3lFTIHBjDPvm3wPGSmAsauq9nwKfsQahFcC07NTYZMb1+wzhQ== X-Gm-Gg: AR+sD13hvVx5w3H6j5PIXBVXMxaJMOWptSsjxG8YVFjrPbnjAYBhRh+hxeOogQcg132 adI5yumHWV3ffctdM0MeICpNcmKa8b7o0820sjLlZIfMp4rObYkvDLZfKMQYDJgx/q5a68ZRXtu wbjHbCZc1h3zqAnvlOtdmu8cl+/CQU/DV/TYs9FkFIvveXFbMXc1UsRu/IYcBPmjgtsxc45gc+q NZffQsNq+3PB2PCPjQKKjPY8uj4YpRy5HKlJtrnSn4o09KFPMjSzENhwW7YS9Nua7t42Aa+foVv CQ1A4jok8mU2Wg+0/P8zVZzxlONsrGSdafN5gZ4RfhHimXatHcON6lQQLJX+PTK+a7dbTLJj6+j iRK8QZI5K4SsP4UUiCNXrdmbo57YGRfoMaEdsketlhKV7WOSSc6RrFX+1ri6mPXpkON6PIslXgO PZnkgob9FEfqGjs3yFuVGMNgmL/MvV3HcLPJaQTHMlbvWwtoB8xZa8YQUlVGttYrJBrVi7kaCwV p0TsA== X-Received: by 2002:a17:90b:1a8f:b0:38f:5801:dc0e with SMTP id 98e67ed59e1d1-3958125a864mr17530263a91.15.1787197671121; Wed, 19 Aug 2026 20:47:51 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 65/93] disas/riscv: Tidy rv_comp_data terminators Date: Thu, 20 Aug 2026 13:44:02 +1000 Message-ID: <20260820034430.1186695-66-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198252242158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use { } instead of two zeros. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-30-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 46 +++++++++++++++++++++++----------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index e0b3d22031..f3c9213fd1 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1072,123 +1072,123 @@ static const rvc_constraint rvcc_true[] =3D { rvc= _end }; static const rv_comp_data rvcp_jal[] =3D { { rv_op_j, rvcc_j }, { rv_op_jal_ra, rvcc_jal_ra }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_jalr[] =3D { { rv_op_ret, rvcc_ret }, { rv_op_jr, rvcc_jr }, { rv_op_jalr_ra, rvcc_jalr_ra }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_beq[] =3D { { rv_op_beqz, rvcc_beqz }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_bne[] =3D { { rv_op_bnez, rvcc_bnez }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_blt[] =3D { { rv_op_bltz, rvcc_bltz }, { rv_op_bgtz, rvcc_bgtz }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_bge[] =3D { { rv_op_blez, rvcc_blez }, { rv_op_bgez, rvcc_bgez }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_addi[] =3D { { rv_op_nop, rvcc_nop }, { rv_op_mv, rvcc_mv }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_sltiu[] =3D { { rv_op_seqz, rvcc_seqz }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_xori[] =3D { { rv_op_not, rvcc_not }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_sub[] =3D { { rv_op_neg, rvcc_neg }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_slt[] =3D { { rv_op_sltz, rvcc_sltz }, { rv_op_sgtz, rvcc_sgtz }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_sltu[] =3D { { rv_op_snez, rvcc_snez }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_addiw[] =3D { { rv_op_sext_w, rvcc_sext_w }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_subw[] =3D { { rv_op_negw, rvcc_negw }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnj_s[] =3D { { rv_op_fmv_s, rvcc_fmv_s }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnjn_s[] =3D { { rv_op_fneg_s, rvcc_fneg_s }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnjx_s[] =3D { { rv_op_fabs_s, rvcc_fabs_s }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnj_d[] =3D { { rv_op_fmv_d, rvcc_fmv_d }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnjn_d[] =3D { { rv_op_fneg_d, rvcc_fneg_d }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnjx_d[] =3D { { rv_op_fabs_d, rvcc_fabs_d }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnj_q[] =3D { { rv_op_fmv_q, rvcc_fmv_q }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnjn_q[] =3D { { rv_op_fneg_q, rvcc_fneg_q }, - { rv_op_illegal, NULL } + { }, }; =20 static const rv_comp_data rvcp_fsgnjx_q[] =3D { { rv_op_fabs_q, rvcc_fabs_q }, - { rv_op_illegal, NULL } + { }, }; =20 /* Convert compressed insns into normal insns via pseudo expansion. */ --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197701; cv=none; d=zohomail.com; s=zohoarc; b=e9DE7QGdItj1l58hqM9/xbAJgxQf97tiGGLXDlUWEKBmJHZfFkSKHiVm6r44M86nmlqj8GoBVHL3R92R8Xf+Cw0egj6EPGUpxvpl0wnmV/MmNO/RjOkFXL4e1QbiwtQzMLQunF9U5zNHNNRfSCiEbZXoJ5Qq2r7D4sfJHBpk/wY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197701; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=1FqkdWKLgfc+vRbBEL6zlKNDsJP//dgcnuZl45GUXZM=; b=X6xXvi2l5lahqBLj5EOg7+6pwRktEm9mR1WzDnGE2okNh9U1SbHekSYx2y9vwB9rPtlczB9ErWtaXxYxgmzIp3C13beRuL6bWdMg2J4PD89aVjkjqoPdOM7MXU92D5b0UG6J9HyB5CAZGDcqAq+EaO5IZlVzy35zseXnlH2GdLY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197701177349.3536361597693; Wed, 19 Aug 2026 20:48:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtkz-0005is-KV; Wed, 19 Aug 2026 23:47:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtky-0005e9-LF for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:56 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkx-0004KJ-19 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:56 -0400 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-2caea3f742bso25331655ad.0 for ; Wed, 19 Aug 2026 20:47:54 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197674; x=1787802474; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=1FqkdWKLgfc+vRbBEL6zlKNDsJP//dgcnuZl45GUXZM=; b=lDlj3GUMxUguDuFTqOjWn27IIIqWN/b683XHGK5x1qx/jgdL/5Xn4lM8UwsZRB0FMS WXKkIw48zlhitthyEbsYZFe+K5ygdZiiPsBtvaV/UnmoaPKqHSviDE370ONIGmdsep9k LKqNS0JR1wF/s6maWR7wETvIccsweicrf6kf0vW8htFmxQoQn5k7bbzZHNhAt0XkNxmq WhEH2DyBbWLC4YfaZ9g861mwmqZsqC3DUKRmKvxf6/TZfoF4cJXeh6EBl8bhxG8jiCrJ BWbsc9WkOrGcji4qfpoZWQjcjzQQhyoC5vWUG3fH//8aw13SC3Ls6mvokiQiaOYRCEqR Ew9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197674; x=1787802474; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=1FqkdWKLgfc+vRbBEL6zlKNDsJP//dgcnuZl45GUXZM=; b=HrlwiZROIKAKb0Ro8RPTDHitvCgdWs9HpTXcFgaszu6nDay/rBZhgr+zqO1Uy5AZGl 0YGr0Zm6/ln7jbjeRV78IfTzfqRSz/bCny4bnMpDMCLbsSHcQmsYMm3T4saVy2vMJVpS xHChdk8GsOq89K1fJ/KgYLkphwdp0WWgCT9xaeQTjeBLRhmu+Kt9+8ctgGfGixKaY+U9 MpvLSqzipHp730H9owni4fDw17kJFpwLvwuBzHAKTFrHrgD6HT7OVnnCZyAfkgIWYONC Iw/7ZQtaN+VCWFRBrcgyZWOajXXl6qAlsT1rCiGjmqH5zflo0gOnE7sR0C3HCg8uuTwD DPNQ== X-Gm-Message-State: AFuF++n2VPJcWjzkPcwoy/IS6OrWOUJJ/ZX6IzDMwCy9S8DSqtzmZAik 1IqHkMAruq72O8T5gzWz4jXwYTi7ZUauyNIXjASW2lMy5B+mFIB0Xh4vjPisVg== X-Gm-Gg: AR+sD12ubjoVKTMlcwXHxIiAX3E/xH0yqE1qKXYJTYABRDt50SztT9YVHHnYrrs51V3 8S+tz7OikQO8gx9Xs24BYZSJDXBMFIJwEKnFxfXct0RGG+W5iEPHFRpIBv/K9siBb3SGlliBsa1 BsTBB3Kx2cMtzwYs2icjPJPBclX0KD3AnuXn0XQdZO2OUXhLFOb7wMsAZhhxcaOE3VdQ8FEIAqs uDexLe5EOQyhI5RH/JSD/9m3Fta0sqMMWHKtM/la+ktXZ5m8Oaka/rIZhwIzEO2miVEyLLfgZ3J Xuk0+BHtR1ngdG0SY17RTu0BjJqie7cxD9p8sn+VwAbvGGHgkX8oYpaP3zoRnrWiB4cw5d+Shp+ TcVvpZWGs6xo+CisTkTfkiq6PpyE5aFjO1LW7V/bbuVtu6CqjVp8YvK9cimOf+wTbQmgIoNg17W ZlmKDgAwJMUL0XKEPwaebo5c835N1Fg7vPE64Nvsknhos0nosHXt8nLo4Mzu4pnG+nJgpzgB6sG VxcNQ== X-Received: by 2002:a17:90b:2f8b:b0:38f:57f0:1f5d with SMTP id 98e67ed59e1d1-395810d73e6mr18347587a91.15.1787197673755; Wed, 19 Aug 2026 20:47:53 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 66/93] disas/riscv: Chain "ret" pseudo off "jr" pseudo Date: Thu, 20 Aug 2026 13:44:03 +1000 Message-ID: <20260820034430.1186695-67-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=alistair23@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197702396158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson "jr" has already checked two conditions that apply to "ret". Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-31-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index f3c9213fd1..91f6d9e4af 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1061,8 +1061,7 @@ static const rvc_constraint rvcc_bgez[] =3D { rvc_rs2= _eq_x0, rvc_end }; static const rvc_constraint rvcc_bltz[] =3D { rvc_rs2_eq_x0, rvc_end }; static const rvc_constraint rvcc_bgtz[] =3D { rvc_rs1_eq_x0, rvc_end }; static const rvc_constraint rvcc_j[] =3D { rvc_rd_eq_x0, rvc_end }; -static const rvc_constraint rvcc_ret[] =3D { rvc_rd_eq_x0, rvc_rs1_eq_ra, - rvc_end }; +static const rvc_constraint rvcc_ret[] =3D { rvc_rs1_eq_ra, rvc_end }; static const rvc_constraint rvcc_jr[] =3D { rvc_rd_eq_x0, rvc_imm_eq_zero, rvc_end }; static const rvc_constraint rvcc_true[] =3D { rvc_end }; @@ -1076,12 +1075,16 @@ static const rv_comp_data rvcp_jal[] =3D { }; =20 static const rv_comp_data rvcp_jalr[] =3D { - { rv_op_ret, rvcc_ret }, { rv_op_jr, rvcc_jr }, { rv_op_jalr_ra, rvcc_jalr_ra }, { }, }; =20 +static const rv_comp_data rvcp_jr[] =3D { + { rv_op_ret, rvcc_ret }, + { }, +}; + static const rv_comp_data rvcp_beq[] =3D { { rv_op_beqz, rvcc_beqz }, { }, @@ -1896,7 +1899,7 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { }, { "j", rv_codec_uj, rv_fmt_offset }, { "ret", rv_codec_i, rv_fmt_none }, - { "jr", rv_codec_i, rv_fmt_rs1 }, + { "jr", rv_codec_i, rv_fmt_rs1, rvcp_jr }, { "rdcycle", rv_codec_i_csr, rv_fmt_rd }, { "rdtime", rv_codec_i_csr, rv_fmt_rd }, { "rdinstret", rv_codec_i_csr, rv_fmt_rd }, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197744; cv=none; d=zohomail.com; s=zohoarc; b=iLlyU/NNt2Nzg7z06kcWxwnOBQcTfbnm607HbTfKpJWBVoLmiMLS1IIjadz415yICZEpmqMhQrdOCD9leiWTfgIAqer2uXY2o3wdLETU0itfgKKx3gZI6RYblOJeDiAenSVVGlVgeluRJi2nfD34w1Yw1uZmpeLtYGLE0LvSLmY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197744; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Hk5GZbBPE9k/cD83hwQyRHgA+R2YMqa9HODNXp3uV+Q=; b=l9L2+XcoKFNCQzGyh84e/nJSfiM19pNEGqRvn28PpW7rZMUzbFa12OJLYsaaEAX1XhoKVfJlnscRBghUfyFRJJv6LJobDcTQyty/5VwWR1LZjB8t50iklqsxmwAyQamDduTtA1FT0nW/ST0f/+vIUir1QyCH9EtY6bqa2n6wvdU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197744884125.95631810269083; Wed, 19 Aug 2026 20:49:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtl2-0005rB-76; Wed, 19 Aug 2026 23:48:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtl1-0005ol-8k for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:59 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtkz-0004LX-LX for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:47:58 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-38de840f2f0so1562241a91.0 for ; Wed, 19 Aug 2026 20:47:57 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197676; x=1787802476; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Hk5GZbBPE9k/cD83hwQyRHgA+R2YMqa9HODNXp3uV+Q=; b=ZSY7lgOcMLE56jlMKONpiqc2SmhccSeTs8GB3FrrGvH2JTwXbk/91XIozXMcqqgD+m UZkZRD1y8R43jkpOtUCcArn9lJkW/DOrR41szsXmrv7QVnbgZ/TRqH9XUggBCB4UOhHU Ze9Z8dBns72kSYgEYi/XjWoevUsOOU8IlA2QcPY2PdkMqZLQcL8Lo1/yexB5bNRfnn46 m4fLpBgB3QU3+QTACns9KbDcFmVjlqr/dEVqY3+B+fGRdyUzmeCv3qF4DmReCV7RhpSD 39gZdKwIbnOmrl/Pi2lFB85FKRQfoQ5ry1r4kiG01c8D866/4NFOH3U3nLeMUYwnLsGE ZojA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197676; x=1787802476; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=Hk5GZbBPE9k/cD83hwQyRHgA+R2YMqa9HODNXp3uV+Q=; b=ssEPJvac7nqW+9tN4HCYHHDElyZRYmMPOjzoubGrTxMT64IFukGPzxX1jwNnAYn93P 3Toh66yL1hfv+OOYzYtV9hDqumxoIxRYNoZvXlkik9Lcu3729xwFVLq12iJGmfDSeowl /PEtvb29AO+JS69JxPh5eeVth5Tj2kKwdY8YIJl+SFaC/ksZWutkZ/sd+tP7JSvWsu67 jjNHjERiYRBc2gVWIbNXCMj4SAVzmgxCsdfUSx6kMQ1aJWYp1dfoWwY5QKODG/nqLQRJ 5BoPut+1X4l70HLd1Dx5yLdtVPi4r0EhCwAdJsmz8jus58vndSMVjglHWolTM3+BTueK i2Vg== X-Gm-Message-State: AFuF++mUORKlsM5zTf4gEGV9FnNmewQbDEqaJVmcrsejYRBkjRv7JimI oifw4hj8oFnQAgfNuHNFzZcdCu0av/vpV6YV58bepZ/DyFaExJAJaA5YmrZL6A== X-Gm-Gg: AR+sD12FIYi/7IR8ba+QjZaEb8u/y5msJX7S94hyHT3BkFrYp8bz9hT4+mctFXwWsr3 tEOvAzJsEKq5JzgkMvvKyCGlcpdNQL8Dmmk82kVG3BX8TF8xkUsNB272uldDN/q8NOkRU3RgX4M XIGSe7m9EJuNfyvTSoJJwBYDRZIVw4cOl56zx/PpdI8SYq1Og2WKY6t6Lf3z7/ExYi317zdQSxJ RSCg20aPEcxswY2i9uOa79xmvMiYoPXLlssSJ+Fm2MHRu5snSGUatYOZy24pZnCSK34TRCWDzPB 25ch6q+ytZKVM8dpjgYT7W1YmxTkQ0L2ovZRnFmbRZ8Jo5ge2DqSDtR8qU23LvoMlrJFYPCwsqX vpX3QRAXYYUaJBXdydyvQrnEC34yZWP++j/8OdlU0NOVJy41bumgPwvxg6WJOpUYraTcbnE2Hz3 HJXZNvUZ+IGARLbF9c6VagFN1Si63vEFd9JuQ/taSwbGbb5QOSGpfpAzblKhCyf0GCAGp0ebO6Q XWZBQ== X-Received: by 2002:a17:90b:2d05:b0:380:21b7:e727 with SMTP id 98e67ed59e1d1-39581470f03mr18247322a91.14.1787197676348; Wed, 19 Aug 2026 20:47:56 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 67/93] disas/riscv: Chain "nop" pseudo off "mv" pseudo Date: Thu, 20 Aug 2026 13:44:04 +1000 Message-ID: <20260820034430.1186695-68-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197746510158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson "mv" has already checked a condition that applies to "nop". Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-32-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 91f6d9e4af..7fa76b2d15 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1035,7 +1035,7 @@ static const rvc_constraint rvcc_jal_ra[] =3D { rvc_r= d_eq_ra, rvc_end }; static const rvc_constraint rvcc_jalr_ra[] =3D { rvc_rd_eq_ra, rvc_imm_eq_= zero, rvc_end }; static const rvc_constraint rvcc_nop[] =3D { rvc_rd_eq_x0, rvc_rs1_eq_x0, - rvc_imm_eq_zero, rvc_end }; + rvc_end }; static const rvc_constraint rvcc_mv[] =3D { rvc_imm_eq_zero, rvc_end }; static const rvc_constraint rvcc_not[] =3D { rvc_imm_eq_n1, rvc_end }; static const rvc_constraint rvcc_neg[] =3D { rvc_rs1_eq_x0, rvc_end }; @@ -1108,11 +1108,15 @@ static const rv_comp_data rvcp_bge[] =3D { }; =20 static const rv_comp_data rvcp_addi[] =3D { - { rv_op_nop, rvcc_nop }, { rv_op_mv, rvcc_mv }, { }, }; =20 +static const rv_comp_data rvcp_mv[] =3D { + { rv_op_nop, rvcc_nop }, + { }, +}; + static const rv_comp_data rvcp_sltiu[] =3D { { rv_op_seqz, rvcc_seqz }, { }, @@ -1869,7 +1873,7 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(rv_op_lq) }, { "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(rv_op_sq) }, { "nop", rv_codec_i, rv_fmt_none }, - { "mv", rv_codec_i, rv_fmt_rd_rs1 }, + { "mv", rv_codec_i, rv_fmt_rd_rs1, rvcp_mv }, { "not", rv_codec_i, rv_fmt_rd_rs1 }, { "neg", rv_codec_r, rv_fmt_rd_rs2 }, { "negw", rv_codec_r, rv_fmt_rd_rs2 }, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198318; cv=none; d=zohomail.com; s=zohoarc; b=D5HsMp2vFNhNQ5tfhDwEW8/Z26+it6bd8reW4332rxYXEPqbAiZJS2RLyNlCKOMD3EUfYrzRp9VXE4p96O33FeIkVnbudRMl8WdU8Ben8s/gA/WmN/Jnc1BKc5dva7hgcLF7g5o1KPPwji3PjliKyNw9+2icVfvfukOAmuj9siY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198318; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=jbYaKFBvGXXY2CnicUYZq7lQqnHJQFU/m+HVMKAtotE=; b=WsxwGyZAlBsoKU0JzOOXZ27bSnU+ujUd4QA4Iifgr7VmPlFXlxIZruuyzsmb+pJMxvUD7jOuLq61uhh9acyBrCkoKDNizBmSdNPXfklLKLJ8TJ0ypk7AtAqvj8XmzjXujFn9FK9BlaDih8mF3jfNz3PKldspQYPu2WgG7FzT5GU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198318241545.6075866555188; Wed, 19 Aug 2026 20:58:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtl6-000631-EV; Wed, 19 Aug 2026 23:48:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtl4-0005sg-Dw for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:02 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtl2-0004Ln-FA for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:02 -0400 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-38e7109321dso1197443a91.3 for ; Wed, 19 Aug 2026 20:48:00 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:47:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197679; x=1787802479; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=jbYaKFBvGXXY2CnicUYZq7lQqnHJQFU/m+HVMKAtotE=; b=MhSRqHLLeYwWT1S+8L6Kwgi7i1D7OHRp5ZoRqRYYAlT2Q96t8CycltJc2Uby+87oZA k0f0+uR+6ylIQfDqzNJHL6YR8K2vKo5SdMHCEmxv7qY5gALo+c4cG691nuQghSBzzv18 oinnI7xMK76AVFJ+P9nbHHfV6RwzVrDaHXMtoz4gCctUy1rF/QNX4GlvknhC8wVV7R2r 98VgsHlkE8s9FtxKotyIfSeuvrXcqx3Rj4NNmXW+RJAMGAbESAWUeIe4kkQ/2YsJnsB4 KfxM2qTkimCnL26A+12ignPrCDRqzj1UXr5eK7On0kYIPZiduiVwVytStyo4pES3oKGN J2SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197679; x=1787802479; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=jbYaKFBvGXXY2CnicUYZq7lQqnHJQFU/m+HVMKAtotE=; b=jJqlUBMI0QAfIdOPEqY5iML0AIWU/7LTwBd5RVj5mSVMUa8xDnjXJ6vK+zxDZvXAi7 x7byYuSquyhjWb9Tef+PhaGt/pY+hM7ZSaRQI6vu1yBpokhqDxcjdqho9fWDWSTX013f +9k8/eWFTW2li4ry9Xm8K+xBW4LmFOnN5LxmvFW//EA24O2l3XyeUG5iwSK2AYmqTg1s NMXxMraYKCLj4wRuSWMJwvh6NoLzAHp2vV2Kd7GaSEnu3JrCIN5QCbI3FZ6WdwFm7Ypb 249M3cFjp/qUrNhe6k3lWmLP5vhnLXBptyZEq8KdGeH1ib657yyInPH4rxsQTZ36mQTE hWmQ== X-Gm-Message-State: AFuF++kA202ZYHiEE1Yg4kpN382/lGE5L0u7kLELwF6krB+BeIUphxmx 675sAuSwLDnY5VNDgPCEU20ovs+9/m0cZrMRUTm+7gzjUasgvPbpbkuUnL/+lQ== X-Gm-Gg: AR+sD10rL6VvtWf4j+nzLBdvvSAc0xOKk/8kwCP2E0iio89b1x6gi6J4zK6hAqM8nfB OfI7xCB0J22k6iWIEHSSqdDO19TTzqVoL2ltOgqHy12Mqv9TfsL+HYXfbPQEIT/3thRlLJCqxC6 D92AuzrFKt6ofWe0a41PcB8YYL0Z5FxNAzOgyR1mco7N8prHtjTvhamG3ioQlOTfv1Ej8jSrTkz bB2otztlymqtgn4uOtnKznG5GEPJez0i7uE2dpHlhrMctKLHx/F54PSpWqnKVtOsV2FiJcKuQYj 0p+wG7LaZATTL50V9g/HVT8GDggzjIGwZ+tWtmaJ1QHch6JCYIN3UP46+qvpVnULmPJ6/jdY86t vwv5Vkeo3/0nSX2VrMsMgxMVRukZCMa3KXD8OaVYlT0v+5pJx0doLaNeBREC/4fUusrzU7xLpPy 7T98z8onVF74VwyBtKRqELFUncJIt72sTZGwjdav2eQDx69kQ4mDe16uhKMG8Rdlvl8LB4/IknA Cp75Q== X-Received: by 2002:a17:90b:6c6:b0:37f:b0a9:1a68 with SMTP id 98e67ed59e1d1-395812a8bd9mr18527812a91.7.1787197679065; Wed, 19 Aug 2026 20:47:59 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 68/93] disas/riscv: Use rv_codec_illegal for pseudos Date: Thu, 20 Aug 2026 13:44:05 +1000 Message-ID: <20260820034430.1186695-69-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198318408158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson The codec is never used, since we arrive into pseudos from a decoding of another opcode. Assert that rv_codec_illegal is never decoded. Use rv_codec_none for rv_op_illegal. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-33-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 68 +++++++++++++++++++++++++-------------------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 7fa76b2d15..dedd925077 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1599,7 +1599,7 @@ static uint32_t operand_lpl(rv_inst inst) /* instruction metadata */ =20 static const rv_opcode_data rvi_opcode_data[] =3D { - { "illegal", rv_codec_illegal, rv_fmt_none }, + { "illegal", rv_codec_none, rv_fmt_none }, { "lui", rv_codec_u, rv_fmt_rd_uimm }, { "auipc", rv_codec_u, rv_fmt_rd_uoffset }, { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal }, @@ -1872,38 +1872,38 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "c.sq", rv_codec_cs_sq, NULL, DECOMP(rv_op_sq) }, { "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(rv_op_lq) }, { "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(rv_op_sq) }, - { "nop", rv_codec_i, rv_fmt_none }, - { "mv", rv_codec_i, rv_fmt_rd_rs1, rvcp_mv }, - { "not", rv_codec_i, rv_fmt_rd_rs1 }, - { "neg", rv_codec_r, rv_fmt_rd_rs2 }, - { "negw", rv_codec_r, rv_fmt_rd_rs2 }, - { "sext.w", rv_codec_i, rv_fmt_rd_rs1 }, - { "seqz", rv_codec_i, rv_fmt_rd_rs1 }, - { "snez", rv_codec_r, rv_fmt_rd_rs2 }, - { "sltz", rv_codec_r, rv_fmt_rd_rs1 }, - { "sgtz", rv_codec_r, rv_fmt_rd_rs2 }, - { "fmv.s", rv_codec_r, rv_fmt_frd_frs1 }, - { "fabs.s", rv_codec_r, rv_fmt_frd_frs1 }, - { "fneg.s", rv_codec_r, rv_fmt_frd_frs1 }, - { "fmv.d", rv_codec_r, rv_fmt_frd_frs1 }, - { "fabs.d", rv_codec_r, rv_fmt_frd_frs1 }, - { "fneg.d", rv_codec_r, rv_fmt_frd_frs1 }, - { "fmv.q", rv_codec_r, rv_fmt_frd_frs1 }, - { "fabs.q", rv_codec_r, rv_fmt_frd_frs1 }, - { "fneg.q", rv_codec_r, rv_fmt_frd_frs1 }, - { "beqz", rv_codec_sb, rv_fmt_rs1_offset }, - { "bnez", rv_codec_sb, rv_fmt_rs1_offset }, - { "blez", rv_codec_sb, rv_fmt_rs2_offset }, - { "bgez", rv_codec_sb, rv_fmt_rs1_offset }, - { "bltz", rv_codec_sb, rv_fmt_rs1_offset }, - { "bgtz", rv_codec_sb, rv_fmt_rs2_offset }, - { "jal", rv_codec_none, rv_fmt_offset }, /* rv_op_jal_ra */ - { "jalr", rv_codec_none, rv_fmt_rs1 }, /* rv_op_jalr_ra */ + { "nop", rv_codec_illegal, rv_fmt_none }, + { "mv", rv_codec_illegal, rv_fmt_rd_rs1, rvcp_mv }, + { "not", rv_codec_illegal, rv_fmt_rd_rs1 }, + { "neg", rv_codec_illegal, rv_fmt_rd_rs2 }, + { "negw", rv_codec_illegal, rv_fmt_rd_rs2 }, + { "sext.w", rv_codec_illegal, rv_fmt_rd_rs1 }, + { "seqz", rv_codec_illegal, rv_fmt_rd_rs1 }, + { "snez", rv_codec_illegal, rv_fmt_rd_rs2 }, + { "sltz", rv_codec_illegal, rv_fmt_rd_rs1 }, + { "sgtz", rv_codec_illegal, rv_fmt_rd_rs2 }, + { "fmv.s", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fabs.s", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fneg.s", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fmv.d", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fabs.d", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fneg.d", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fmv.q", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fabs.q", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "fneg.q", rv_codec_illegal, rv_fmt_frd_frs1 }, + { "beqz", rv_codec_illegal, rv_fmt_rs1_offset }, + { "bnez", rv_codec_illegal, rv_fmt_rs1_offset }, + { "blez", rv_codec_illegal, rv_fmt_rs2_offset }, + { "bgez", rv_codec_illegal, rv_fmt_rs1_offset }, + { "bltz", rv_codec_illegal, rv_fmt_rs1_offset }, + { "bgtz", rv_codec_illegal, rv_fmt_rs2_offset }, + { "jal", rv_codec_illegal, rv_fmt_offset }, /* rv_op_jal_ra */ + { "jalr", rv_codec_illegal, rv_fmt_rs1 }, /* rv_op_jalr_ra */ { }, { }, - { "j", rv_codec_uj, rv_fmt_offset }, - { "ret", rv_codec_i, rv_fmt_none }, - { "jr", rv_codec_i, rv_fmt_rs1, rvcp_jr }, + { "j", rv_codec_illegal, rv_fmt_offset }, + { "ret", rv_codec_illegal, rv_fmt_none }, + { "jr", rv_codec_illegal, rv_fmt_rs1, rvcp_jr }, { "rdcycle", rv_codec_i_csr, rv_fmt_rd }, { "rdtime", rv_codec_i_csr, rv_fmt_rd }, { "rdinstret", rv_codec_i_csr, rv_fmt_rd }, @@ -4551,8 +4551,6 @@ static void decode_inst_operands(rv_decode *dec, rv_i= sa isa, rv_inst inst =3D dec->inst; =20 switch (op->codec) { - case rv_codec_illegal: - break; case rv_codec_none: dec->rd =3D dec->rs1 =3D dec->rs2 =3D rv_ireg_zero; dec->imm =3D 0; @@ -4946,7 +4944,9 @@ static void decode_inst_operands(rv_decode *dec, rv_i= sa isa, dec->rs1 =3D dec->rs2 =3D operand_crs1(inst); dec->imm =3D 0; break; - }; + default: + g_assert_not_reached(); + } } =20 /* check constraint */ --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198170; cv=none; d=zohomail.com; s=zohoarc; b=SksdfoW04DAy6Da5pAc6lknAzHDruy+ktGCaT0aq15nJ8OJbJsP0DAqJ5LnXCGS3UfHtw15RUbcX28AWEEfwyFFREGPG1T08MNZ5a5EdnV6z56hwtOoNuaaKmxT96LZ2fyaQTYH/6be3cbVlK1vQdQHowZI4YgaXlZw5MxCMORI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198170; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QT+NqtS29Jb8B76mVXI/GmUgsUgPIu04DUnpKcaegjs=; b=Zd+kPHi9TfrJSucs1cYQkpVAsCVwjsrw2W/SKoGQ0XMJZi9VurBMETRATTDWR2m1UI94sLJSpTRNAz8v6pyr8cmrX2+y7CTmRtlftjQv7tRKqldaAaDmQ9K2BHwZxz7R3yR2iot5SkoB+QAZdcajdRQUjmFRkgzee/f9rFKREKA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719817068166.50764512068758; Wed, 19 Aug 2026 20:56:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtl7-0006DP-UP; Wed, 19 Aug 2026 23:48:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtl6-00064A-Jn for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:04 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtl5-0004MC-2B for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:04 -0400 Received: by mail-pj1-x1033.google.com with SMTP id 98e67ed59e1d1-38511175ad3so1646343a91.2 for ; Wed, 19 Aug 2026 20:48:02 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.47.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197682; x=1787802482; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=QT+NqtS29Jb8B76mVXI/GmUgsUgPIu04DUnpKcaegjs=; b=CqgAp5mUb5lzOydlEJNd7QBtFNJrPXoJVnCr/kNENWptyFDnzbbwfAE2OkmqGAqQjb BDyx0x0MmgpstQFBOanWcyLJwjNRWo6QF2sfBaTUVABz5dA5aGcW48cPUjkhc5hwXzWL 9VmZo/P4q0grylWKsZnMVRPLgMm7ZpMwZA2uR+E8dGKz1fkGiHfddo9duXQv66ItJyuA Bdjdm+jIW42ltxRlwr9G9s4cddk1x8EsmDE8CHXsBPXorfyyCxr3Lj/X/Llp0fDvon1U bDM5enb/t7oabOkHTGvZTl69O9IuUhN5rmXyYd/0Buka5B+gF9VHJN49iDnudouT7Yv/ pF4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197682; x=1787802482; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=QT+NqtS29Jb8B76mVXI/GmUgsUgPIu04DUnpKcaegjs=; b=WL4ZDj2Lp7cv8wrBJkUjXhoNpAreSM4CZ0lXjOE6pxXgqePa1uMn8/n1SCwkLWMkpK mifbajmi/FQtL8P1c+w+d0fbykORe1pvBI/0/8DWzffS78+ZGcaofW3faMqn7gwo8HKH 1flAtiMCF4zyK+tWFzkqojuw7Pov4y80uE91J31gEY+DVdLxxI9SAX82KkqsGMsUlKnI OzdXvwbENpuPkAaLeUSwwyJe8zWqCE8hLn3vbvuk04h7e8AFm2hY8x/9A49+sPT3EAyp SEX900+PjeIOfQ5mjvOgWHWeecCXjqrhJRYHSAcGjmSg68y8BRWf+3w8DRJWzIMVR9uj 96vA== X-Gm-Message-State: AFuF++mMUDgjpD7YpDOti6vWLWv12gJQ4YH53JyXBG1OMyAwvNaD0ZJf w/OE38cwgh3GBxYiixZO2INanfNTuOloxPbiB7U0m2IgEQASrOB5X4XujzC0VA== X-Gm-Gg: AR+sD13ro3QPhRuIDZn/5f8A/gOgT3EmJ1lQW8xbEnwyNP9tMWkFP5zlCd4PBXahwrY xPLogJMJzqDuDVj8DVCxJxnfQnkKCGCQdCNThr6JFRTsRL/59SQkwWJfOt3BrVc544vUZXIOkcy dlMriPpJveuih3ePZQiJMjACf7eO647k/LyPdcu2+qe14cqUCvJvaDVbfFKxVyUUpECahlPjMFh X2gf+U/8VFWy8fvRhU0z15T4+yf7xmmrH3Gcujf9T565ZdEGoHyJJXbWGbjQc+lHXzHLD6+SgIP G0XAerwAmzMrN96ZdCNcbEp1tZ/StMtvP7yyocVk/FaQqHep1RNMluxS75baOC0ifMxPDGWSHtd vEH+7/f73T7vwufoBn4viad7hXPnyeXKPe3Ku6th85WNC4U0F9s7kXXc3WPjYT3TyVWHmVRHs5f 0xLESre27jqin5IxLh/40W5AVT03Qk3AMblGNUyVyPWLuH9/d8AQ/Gpiyb1wZL+qKTYFnnceSLW kGffaZEUwVzpmeW X-Received: by 2002:a17:90b:1e4a:b0:37f:c97a:939f with SMTP id 98e67ed59e1d1-39580ace5fcmr16860915a91.7.1787197681765; Wed, 19 Aug 2026 20:48:01 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 69/93] disas/riscv: Simplify some insn decompressions Date: Thu, 20 Aug 2026 13:44:06 +1000 Message-ID: <20260820034430.1186695-70-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198171909158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Route "c.j" to "j" instead of "jal", etc. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-34-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index dedd925077..342e2db3cc 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1848,15 +1848,15 @@ static const rv_opcode_data rvi_opcode_data[] =3D { { "c.and", rv_codec_cs, NULL, DECOMP(rv_op_and) }, { "c.subw", rv_codec_cs, NULL, DECOMP(rv_op_subw) }, { "c.addw", rv_codec_cs, NULL, DECOMP(rv_op_addw) }, - { "c.j", rv_codec_cj, NULL, DECOMP(rv_op_jal) }, - { "c.beqz", rv_codec_cb, NULL, DECOMP(rv_op_beq) }, - { "c.bnez", rv_codec_cb, NULL, DECOMP(rv_op_bne) }, + { "c.j", rv_codec_cj, NULL, DECOMP(rv_op_j) }, + { "c.beqz", rv_codec_cb, NULL, DECOMP(rv_op_beqz) }, + { "c.bnez", rv_codec_cb, NULL, DECOMP(rv_op_bnez) }, { "c.slli", rv_codec_ci_sh6, NULL, DECOMP(rv_op_slli) }, { "c.fldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_fld) }, { "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_lw) }, { "c.flwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_flw) }, - { "c.jr", rv_codec_cr_jr, NULL, DECOMP(rv_op_jalr) }, - { "c.mv", rv_codec_cr_mv, NULL, DECOMP(rv_op_addi) }, + { "c.jr", rv_codec_cr_jr, NULL, DECOMP(rv_op_jr) }, + { "c.mv", rv_codec_cr_mv, NULL, DECOMP(rv_op_mv) }, { "c.ebreak", rv_codec_ci_none, NULL, DECOMP(rv_op_ebreak) }, { "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(rv_op_jalr) }, { "c.add", rv_codec_cr, NULL, DECOMP(rv_op_add) }, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198146; cv=none; d=zohomail.com; s=zohoarc; b=V8XWycatLpnhDCQYUMul6oDbLH627FT3DqqeMltWkpIpO2yi76VeyzCoqhiEkzdD4drlJqVGYSJd4V/nOGMvXPgzyLVtXoNmtR80n/qZP/OEHhNeO+MAWFqFwZb9yviRTXqxo6hOop4sKwl9LCqowYmXKIFgqKnXl53A2Z2matA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198146; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=mS5lH+O6u6AC0cF1efiMr/IZgg9QvygUsI4yMDEJpC0=; b=mcOXpCyo8xxrrjbTXMYXvi6TRW7w4ZtTOgy8O2aubesL67dYkWbwhpw2ZoKsgKU8qHzu+79wjRLhyD+pxcU34OzVLH93DS2f3Ww5GKUAgrIMeAfArPNueKq+zjd+H3VHPV6jyY2uzIuQORik+BAHD+iFVNuvUEaLHAkEnwBVRPY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198146550679.0975995783649; Wed, 19 Aug 2026 20:55:46 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlB-0006WV-Ok; Wed, 19 Aug 2026 23:48:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtl9-0006Rg-K6 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:07 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtl7-0004Md-Qc for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:07 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-383cb94f742so1956980a91.3 for ; Wed, 19 Aug 2026 20:48:05 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197684; x=1787802484; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=mS5lH+O6u6AC0cF1efiMr/IZgg9QvygUsI4yMDEJpC0=; b=LxSTVHNhxWaNBsCMOBu16RH7EBi2Uh8U38Vyn3bUg9iXhb3cEWqoZtOARJSXM5IU/L 0ncQRk7/+zbPSkdvgO5TWPGQNS0lxtiiGAc2vgrTawrkVImY4NiR4JCnOgrxDgEujD5i QIGS/DSdBHpg4IaP6xR4g4f8hEEdEezKo2SIrZSMMfD3AzybWrevXOCJczS4tK2HfAbf bnZYYRMYhoS4MhQCtZ4CUnc3clkOcasXrHhhxCus4ueFofYbLQ9QS5UgpL2wqH/7baL7 YmyapMdsxsMDFyxvojj6Y+m6XDa7Zv5saVD8Y9MsAfA2+0X3qSJ1x+7D8wUAc/t+QJIj t3UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197684; x=1787802484; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=mS5lH+O6u6AC0cF1efiMr/IZgg9QvygUsI4yMDEJpC0=; b=bjPLuu64w6oPNqY1VjagFw9M6q7wL08MeTU3bttg92inYjd8/j1TulaxLRlhRenXwW /9gZn63dfOiyJb5acjzlpgQxFF/q9TLKzH76RoDWp+mn8XDTj/qcvL1KYogpWCRQXWuW oHVwpnjeJXY6LyZAUtGGg8KGX/ttZjpVstxcrNWncqrvCLGU0mEkxQUNU2au7J6Nqmq+ PXOkkRC4jIm4KHCWwhHqVwsoJ4tVM42MKmOqhGsj831RVusv9MOpWAgv5rPU/bNrMf0A 0j5EFANt06Zhm0+z9NPgxNxamZEc6Rw1Dv13k8l92yszI/m0yq+0U/zdfBVDRZdwjQcq 0B7g== X-Gm-Message-State: AFuF++mvBPP0y+lDnM5zZDQEDTgIQ96QNX6IQhxSf/I/FW0Hh4jC8gBg CGinFFrItjA11O4SmH4KRwZgSrqY3lJPJAO2yDw9jt1fW44DPbFv7p+IET+MCQ== X-Gm-Gg: AR+sD10lHThwWA3q3F4v1rdjzSanCBO69uIyzguYy1n5H6nzF/GtTNCElgrFPAACj11 4KPO8BRG8G5aJmtWwlKTaUK+PHxXpzgRsivXtmY9B4DNMWAq4uOp+NWJy5JGXeb7Fpek1gv8Rxk Wg204F8ptC7guPDKwLq+DJInwbiVpiSvIa6nz7/p4b+xjOF2FfGbNs1g7zXsYCJWMFT8+L9BTOG cPt8YUy86cN3vidQMiWKfwuuWe0Qiw/Q0n50mGlj/+rMnotwSI1nWmNFxdqulIm17pXWy/Yo/l0 SXseChbgaLjq6pEcO7byNrj/4caWoyakt1cQv3IeK9yrmFR5bXW/G/JVIeKX0KRK/TeKgtI2bCb 7S5YA9g1aZ4gHmUJ8izzMGgPM/ymn6hrsDAm21nQbCmSQ4/mOeYc/fFE/k0PcAModGE8VFaOY6P ElL+9RgpMTxiDNJPVaAZx4U7PyUgQgxYnOT4HVDmMrSIKmMXePhUIicfcFdCTDoZ+oESGGEth9J NGEC3/YUJg= X-Received: by 2002:a17:90a:d604:b0:38e:97f0:aa4b with SMTP id 98e67ed59e1d1-3958127a5aamr18332526a91.13.1787197684410; Wed, 19 Aug 2026 20:48:04 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 70/93] disas/riscv: Store op pointer in rv_comp_data Date: Thu, 20 Aug 2026 13:44:07 +1000 Message-ID: <20260820034430.1186695-71-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198147840158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Store a pointer instead of an array index. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-35-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 8 +++--- disas/riscv.c | 69 ++++++++++++++++++++++++++------------------------- 2 files changed, 40 insertions(+), 37 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index ea7141d3b5..ab62c0db94 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -164,17 +164,19 @@ typedef enum { =20 /* structures */ =20 +typedef struct rv_opcode_data rv_opcode_data; + typedef struct { - int op; + const rv_opcode_data *op; const rvc_constraint *constraints; } rv_comp_data; =20 -typedef struct { +struct rv_opcode_data { const char *name; rv_codec codec; const char *format; const rv_comp_data *pseudo; -} rv_opcode_data; +}; =20 typedef struct { const RISCVCPUConfig *cfg; diff --git a/disas/riscv.c b/disas/riscv.c index 342e2db3cc..9d05e86c09 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1068,138 +1068,140 @@ static const rvc_constraint rvcc_true[] =3D { rvc= _end }; =20 /* pseudo-instruction metadata */ =20 +static const rv_opcode_data rvi_opcode_data[]; + static const rv_comp_data rvcp_jal[] =3D { - { rv_op_j, rvcc_j }, - { rv_op_jal_ra, rvcc_jal_ra }, + { &rvi_opcode_data[rv_op_j], rvcc_j }, + { &rvi_opcode_data[rv_op_jal_ra], rvcc_jal_ra }, { }, }; =20 static const rv_comp_data rvcp_jalr[] =3D { - { rv_op_jr, rvcc_jr }, - { rv_op_jalr_ra, rvcc_jalr_ra }, + { &rvi_opcode_data[rv_op_jr], rvcc_jr }, + { &rvi_opcode_data[rv_op_jalr_ra], rvcc_jalr_ra }, { }, }; =20 static const rv_comp_data rvcp_jr[] =3D { - { rv_op_ret, rvcc_ret }, + { &rvi_opcode_data[rv_op_ret], rvcc_ret }, { }, }; =20 static const rv_comp_data rvcp_beq[] =3D { - { rv_op_beqz, rvcc_beqz }, + { &rvi_opcode_data[rv_op_beqz], rvcc_beqz }, { }, }; =20 static const rv_comp_data rvcp_bne[] =3D { - { rv_op_bnez, rvcc_bnez }, + { &rvi_opcode_data[rv_op_bnez], rvcc_bnez }, { }, }; =20 static const rv_comp_data rvcp_blt[] =3D { - { rv_op_bltz, rvcc_bltz }, - { rv_op_bgtz, rvcc_bgtz }, + { &rvi_opcode_data[rv_op_bltz], rvcc_bltz }, + { &rvi_opcode_data[rv_op_bgtz], rvcc_bgtz }, { }, }; =20 static const rv_comp_data rvcp_bge[] =3D { - { rv_op_blez, rvcc_blez }, - { rv_op_bgez, rvcc_bgez }, + { &rvi_opcode_data[rv_op_blez], rvcc_blez }, + { &rvi_opcode_data[rv_op_bgez], rvcc_bgez }, { }, }; =20 static const rv_comp_data rvcp_addi[] =3D { - { rv_op_mv, rvcc_mv }, + { &rvi_opcode_data[rv_op_mv], rvcc_mv }, { }, }; =20 static const rv_comp_data rvcp_mv[] =3D { - { rv_op_nop, rvcc_nop }, + { &rvi_opcode_data[rv_op_nop], rvcc_nop }, { }, }; =20 static const rv_comp_data rvcp_sltiu[] =3D { - { rv_op_seqz, rvcc_seqz }, + { &rvi_opcode_data[rv_op_seqz], rvcc_seqz }, { }, }; =20 static const rv_comp_data rvcp_xori[] =3D { - { rv_op_not, rvcc_not }, + { &rvi_opcode_data[rv_op_not], rvcc_not }, { }, }; =20 static const rv_comp_data rvcp_sub[] =3D { - { rv_op_neg, rvcc_neg }, + { &rvi_opcode_data[rv_op_neg], rvcc_neg }, { }, }; =20 static const rv_comp_data rvcp_slt[] =3D { - { rv_op_sltz, rvcc_sltz }, - { rv_op_sgtz, rvcc_sgtz }, + { &rvi_opcode_data[rv_op_sltz], rvcc_sltz }, + { &rvi_opcode_data[rv_op_sgtz], rvcc_sgtz }, { }, }; =20 static const rv_comp_data rvcp_sltu[] =3D { - { rv_op_snez, rvcc_snez }, + { &rvi_opcode_data[rv_op_snez], rvcc_snez }, { }, }; =20 static const rv_comp_data rvcp_addiw[] =3D { - { rv_op_sext_w, rvcc_sext_w }, + { &rvi_opcode_data[rv_op_sext_w], rvcc_sext_w }, { }, }; =20 static const rv_comp_data rvcp_subw[] =3D { - { rv_op_negw, rvcc_negw }, + { &rvi_opcode_data[rv_op_negw], rvcc_negw }, { }, }; =20 static const rv_comp_data rvcp_fsgnj_s[] =3D { - { rv_op_fmv_s, rvcc_fmv_s }, + { &rvi_opcode_data[rv_op_fmv_s], rvcc_fmv_s }, { }, }; =20 static const rv_comp_data rvcp_fsgnjn_s[] =3D { - { rv_op_fneg_s, rvcc_fneg_s }, + { &rvi_opcode_data[rv_op_fneg_s], rvcc_fneg_s }, { }, }; =20 static const rv_comp_data rvcp_fsgnjx_s[] =3D { - { rv_op_fabs_s, rvcc_fabs_s }, + { &rvi_opcode_data[rv_op_fabs_s], rvcc_fabs_s }, { }, }; =20 static const rv_comp_data rvcp_fsgnj_d[] =3D { - { rv_op_fmv_d, rvcc_fmv_d }, + { &rvi_opcode_data[rv_op_fmv_d], rvcc_fmv_d }, { }, }; =20 static const rv_comp_data rvcp_fsgnjn_d[] =3D { - { rv_op_fneg_d, rvcc_fneg_d }, + { &rvi_opcode_data[rv_op_fneg_d], rvcc_fneg_d }, { }, }; =20 static const rv_comp_data rvcp_fsgnjx_d[] =3D { - { rv_op_fabs_d, rvcc_fabs_d }, + { &rvi_opcode_data[rv_op_fabs_d], rvcc_fabs_d }, { }, }; =20 static const rv_comp_data rvcp_fsgnj_q[] =3D { - { rv_op_fmv_q, rvcc_fmv_q }, + { &rvi_opcode_data[rv_op_fmv_q], rvcc_fmv_q }, { }, }; =20 static const rv_comp_data rvcp_fsgnjn_q[] =3D { - { rv_op_fneg_q, rvcc_fneg_q }, + { &rvi_opcode_data[rv_op_fneg_q], rvcc_fneg_q }, { }, }; =20 static const rv_comp_data rvcp_fsgnjx_q[] =3D { - { rv_op_fabs_q, rvcc_fabs_q }, + { &rvi_opcode_data[rv_op_fabs_q], rvcc_fabs_q }, { }, }; =20 /* Convert compressed insns into normal insns via pseudo expansion. */ -#define DECOMP(X) &(const rv_comp_data){ X, rvcc_true } +#define DECOMP(X) &(const rv_comp_data){ &rvi_opcode_data[X], rvcc_true } =20 /* operand extractors */ =20 @@ -5270,9 +5272,8 @@ static const rv_opcode_data *decode_inst_lift_pseudo(= rv_decode *dec, if (comp_data) { while (comp_data->constraints) { if (check_constraints(dec, comp_data->constraints)) { - const rv_opcode_data *new_op =3D &dec->opcode_data[comp_da= ta->op]; - assert(new_op !=3D op); - return decode_inst_lift_pseudo(dec, new_op); + assert(op !=3D comp_data->op); + return decode_inst_lift_pseudo(dec, comp_data->op); } comp_data++; } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198358; cv=none; d=zohomail.com; s=zohoarc; b=cIfLhS6+0bpk0rl53qAmb/9IjWxCMd6GeA+yOZb8KIizIkn971rSblBt4XmcYU34FmARvRs3NCax0vmpx20jxan+Xk60Wbyrzw5unPLqGltlwZQMoRRGGoBhbQggxKRAif4roTKIm+PXZBK/oX19f6lxQ6SwLN+uFJCfEiAbCZk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198358; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=/WS1ThPg/b8x1LURw7MtOxUb9AQkwpijsnjQjcKpe2o=; b=nGsuOAItkTlikEKGFNVE0dk2k1jSF49WG9tj8ZLNt3Lrx1qHwSVzr1yfUrjNVf3zAW4uyLFUH5ZXTkV/PoQ2lMNhGf/tG/3hY9QFzjJv7qLoTO6FGPpZ9NT7hy9sacG7iwm5IFaoOtzsRqeaw7e7VmbDnCtGSr6eLhBY7x9+mI4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198358232995.1096367480383; Wed, 19 Aug 2026 20:59:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlE-0006Xj-GV; Wed, 19 Aug 2026 23:48:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlC-0006Wl-Pa for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:10 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlA-0004Mu-K5 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:10 -0400 Received: by mail-pj1-x1036.google.com with SMTP id 98e67ed59e1d1-38ea87caafeso1503804a91.3 for ; Wed, 19 Aug 2026 20:48:08 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197687; x=1787802487; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=/WS1ThPg/b8x1LURw7MtOxUb9AQkwpijsnjQjcKpe2o=; b=tHodWPZToHtdkCe964Y7y2RzVWHKXVmzBiQ96LL/zb60mlvjJkqKqhV7TAOcbA6UKI 2v50XKEbTgJ04gDZnBnnP6Je4BeMzQzLhTRLAtAWjCuVg4OAs8WWzq9WuJ+kXlcrGrFu JDV8XkJd9nQeq+LLG1USw0XrlxQQVBXE2WSv/mYDw3TG5HqU9kvSn7aWULzbnvcpdZg8 hVccPfoNawVru+1jKjnd7Masefe3tA3IqRyeZ1VV49yKmqa9eNXyUbxUhHZ8yiueuzvh TUcYAxks9Y0mezVJYG6sAyj2vlcY00BoWmoPBRYtwBZIvreXWRvhYGr/OYCRsL6YeUUB C/xA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197687; x=1787802487; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=/WS1ThPg/b8x1LURw7MtOxUb9AQkwpijsnjQjcKpe2o=; b=SuSfe1QCJjgue5RzgSYooGJVMHYZtTHx2XdLdEYVv9gPe9t9VMF8/Z3Z4w8gzl0R9T YVzSbK8yRkAy6NNfVxtLVM9Hv5hv+iDGUfvI5HG1+YrMdvdWy8LOhLXp3wZV2+IapLGl S8qgmQQtZvjtxJvHJPipgHnlnkWSLqb7vhgrGHS+sTXG2xvnrI5+lJQ1I2ao2ChXr4XR kJzkCIOhPary8cuE0Fj92Sk82IFip72/XZVjJpB+j8+Esk15ILcU9QOo57yBnqssDCSY S9WzX/noGs7jM6Vr72E/OFKo1kYzfNPZgQmmm65OPyz/1U45iPWu40gJXbgHlbOQy0xs dwPw== X-Gm-Message-State: AFuF++lx5aWdYO7Cx2Y+31mHZWFF3wqX+YMtvgIRUu6a2QGtOVOGNNRh hMB1WF5NsMPTf4BQi2MxYq8spIOBaPAgGHUgn7CjP44xvgvc83BTbNw26wYe4w== X-Gm-Gg: AR+sD101iWZ25ElcaI3SfpzuPR21idU+1LRe/ax1oUU4ipEo6W1XUUc6WoMxDekpvLI SoPCTnndpXTlCHWu8ER1qWlxqdRGh9Y1siO4r2vER+8bAYJqQ+UbtuNAKAjI9tPoFypJinfgykP S5xVA4C+USBJ04iAZS25P10Nni0EuYZmK7Xd74hI/72U9HOfkw791ntz2AV/JvbSVZkC9eFdFp4 ewBXMPCzjWPwxS4v+DmgZt1/FeFXsyVFzU4UINKfZ9So/t1mjEA0IK8stcDDeZ7C89Y0aDNz2l8 lKVxXTx/pK/t8FNvpq7yoSyZbHguOAIAeyJpfSarr1BhQUkDWSIrOqrwoKYD414IsrdIoq4UB6z EDQ32S+YoXWz+cXI4K4ncXYIxUZMlzVTZ3e7Uj79VnkaYiIjoGwoNFx84C8yi7RB0s0W4wbFwos LeI9jneyG/PM76uGTPOwqABrrNTRjcYi5uVuyAccECIrD+hbKdKpk8jdQS1USy+1/3+uwfxR92v wDpAA== X-Received: by 2002:a17:90b:258b:b0:38e:2e86:ed02 with SMTP id 98e67ed59e1d1-395810e9837mr18953010a91.14.1787197687177; Wed, 19 Aug 2026 20:48:07 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 71/93] disas/riscv: Return rv_opcode_data pointer from decoders Date: Thu, 20 Aug 2026 13:44:08 +1000 Message-ID: <20260820034430.1186695-72-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1036.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198358556158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Rather than putting array + index into rv_decode, return the pointer to the object directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-36-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-xlrbr.h | 2 +- disas/riscv-xthead.h | 22 ++++++++--------- disas/riscv-xventana.h | 2 +- disas/riscv.h | 2 -- disas/riscv-xlrbr.c | 5 ++-- disas/riscv-xthead.c | 55 +++++++++++++++++------------------------- disas/riscv-xventana.c | 5 ++-- disas/riscv.c | 23 +++++++----------- 8 files changed, 48 insertions(+), 68 deletions(-) diff --git a/disas/riscv-xlrbr.h b/disas/riscv-xlrbr.h index ebf3d4c133..da14f1b340 100644 --- a/disas/riscv-xlrbr.h +++ b/disas/riscv-xlrbr.h @@ -12,6 +12,6 @@ =20 #include "disas/riscv.h" =20 -void decode_xlrbr(rv_decode *, rv_isa); +const rv_opcode_data *decode_xlrbr(rv_decode *, rv_isa); =20 #endif /* DISAS_RISCV_XLRBR_H */ diff --git a/disas/riscv-xthead.h b/disas/riscv-xthead.h index 0c65c8e0af..f2160be8a4 100644 --- a/disas/riscv-xthead.h +++ b/disas/riscv-xthead.h @@ -11,16 +11,16 @@ =20 #include "disas/riscv.h" =20 -void decode_xtheadba(rv_decode *, rv_isa); -void decode_xtheadbb(rv_decode *, rv_isa); -void decode_xtheadbs(rv_decode *, rv_isa); -void decode_xtheadcmo(rv_decode *, rv_isa); -void decode_xtheadcondmov(rv_decode *, rv_isa); -void decode_xtheadfmemidx(rv_decode *, rv_isa); -void decode_xtheadfmv(rv_decode *, rv_isa); -void decode_xtheadmac(rv_decode *, rv_isa); -void decode_xtheadmemidx(rv_decode *, rv_isa); -void decode_xtheadmempair(rv_decode *, rv_isa); -void decode_xtheadsync(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadba(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadbb(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadbs(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadcmo(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadcondmov(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadfmemidx(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadfmv(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadmac(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadmemidx(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadmempair(rv_decode *, rv_isa); +const rv_opcode_data *decode_xtheadsync(rv_decode *, rv_isa); =20 #endif /* DISAS_RISCV_XTHEAD_H */ diff --git a/disas/riscv-xventana.h b/disas/riscv-xventana.h index 1006c3be00..d28e84c7e4 100644 --- a/disas/riscv-xventana.h +++ b/disas/riscv-xventana.h @@ -11,6 +11,6 @@ =20 #include "disas/riscv.h" =20 -void decode_xventanacondops(rv_decode*, rv_isa); +const rv_opcode_data *decode_xventanacondops(rv_decode*, rv_isa); =20 #endif /* DISAS_RISCV_XVENTANA_H */ diff --git a/disas/riscv.h b/disas/riscv.h index ab62c0db94..241dd47d7f 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -182,10 +182,8 @@ typedef struct { const RISCVCPUConfig *cfg; uint64_t pc; uint64_t inst; - const rv_opcode_data *opcode_data; int32_t imm; int32_t imm1; - uint16_t op; uint8_t rd; uint8_t rs1; uint8_t rs2; diff --git a/disas/riscv-xlrbr.c b/disas/riscv-xlrbr.c index d0092e9edd..b12916c9da 100644 --- a/disas/riscv-xlrbr.c +++ b/disas/riscv-xlrbr.c @@ -36,7 +36,7 @@ static const rv_opcode_data xlrbr_opcode_data[] =3D { { "crc32c.d", rv_codec_r, rv_fmt_rd_rs1 }, }; =20 -void decode_xlrbr(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xlrbr(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -76,6 +76,5 @@ void decode_xlrbr(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xlrbr_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xlrbr_opcode_data[op]; } diff --git a/disas/riscv-xthead.c b/disas/riscv-xthead.c index 757d6ff39f..428a6380e9 100644 --- a/disas/riscv-xthead.c +++ b/disas/riscv-xthead.c @@ -246,7 +246,7 @@ static const rv_opcode_data xthead_opcode_data[] =3D { { "th.sync.s", rv_codec_none, rv_fmt_none }, }; =20 -void decode_xtheadba(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadba(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -272,11 +272,10 @@ void decode_xtheadba(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadbb(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadbb(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -331,11 +330,10 @@ void decode_xtheadbb(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadbs(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadbs(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -358,11 +356,10 @@ void decode_xtheadbs(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadcmo(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadcmo(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -437,11 +434,10 @@ void decode_xtheadcmo(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadcondmov(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadcondmov(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -465,11 +461,10 @@ void decode_xtheadcondmov(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadfmemidx(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadfmemidx(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -503,11 +498,10 @@ void decode_xtheadfmemidx(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadfmv(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadfmv(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -539,11 +533,10 @@ void decode_xtheadfmv(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadmac(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadmac(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -571,11 +564,10 @@ void decode_xtheadmac(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadmemidx(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadmemidx(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -646,11 +638,10 @@ void decode_xtheadmemidx(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadmempair(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadmempair(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -681,11 +672,10 @@ void decode_xtheadmempair(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } =20 -void decode_xtheadsync(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xtheadsync(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -716,6 +706,5 @@ void decode_xtheadsync(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D xthead_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; } diff --git a/disas/riscv-xventana.c b/disas/riscv-xventana.c index 4fb9a29d0b..a4e59312d0 100644 --- a/disas/riscv-xventana.c +++ b/disas/riscv-xventana.c @@ -20,7 +20,7 @@ static const rv_opcode_data ventana_opcode_data[] =3D { { "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2 }, }; =20 -void decode_xventanacondops(rv_decode *dec, rv_isa isa) +const rv_opcode_data *decode_xventanacondops(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -38,6 +38,5 @@ void decode_xventanacondops(rv_decode *dec, rv_isa isa) break; } =20 - dec->opcode_data =3D ventana_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &ventana_opcode_data[op]; } diff --git a/disas/riscv.c b/disas/riscv.c index 9d05e86c09..bc86cb866a 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -2846,7 +2846,7 @@ static const char *csr_name(int csrno) =20 /* decode opcode */ =20 -static void decode_inst_opcode(rv_decode *dec, rv_isa isa) +static const rv_opcode_data *decode_inst_opcode(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; rv_opcode op =3D rv_op_illegal; @@ -4541,8 +4541,7 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa= isa) break; } =20 - dec->opcode_data =3D rvi_opcode_data; - dec->op =3D op; + return op =3D=3D rv_op_illegal ? NULL : &rvi_opcode_data[op]; } =20 /* decode operands */ @@ -5291,14 +5290,12 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc= , rv_inst inst, .inst =3D inst, .cfg =3D cfg, }; - const rv_opcode_data *op; + const rv_opcode_data *op =3D decode_inst_opcode(&dec, isa); =20 - decode_inst_opcode(&dec, isa); - - if (dec.op =3D=3D rv_op_illegal && cfg) { + if (!op && cfg) { static const struct { bool (*guard_func)(const RISCVCPUConfig *); - void (*decode_func)(rv_decode *, rv_isa); + const rv_opcode_data *(*decode_func)(rv_decode *, rv_isa); } decoders[] =3D { { has_xtheadba_p, decode_xtheadba }, { has_xtheadbb_p, decode_xtheadbb }, @@ -5317,19 +5314,17 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc= , rv_inst inst, =20 for (size_t i =3D 0; i < ARRAY_SIZE(decoders); i++) { if (decoders[i].guard_func(cfg)) { - decoders[i].decode_func(&dec, isa); - if (dec.op !=3D rv_op_illegal) { + op =3D decoders[i].decode_func(&dec, isa); + if (op) { break; } } } } - - if (dec.op =3D=3D rv_op_illegal) { - dec.opcode_data =3D rvi_opcode_data; + if (!op) { + op =3D &rvi_opcode_data[rv_op_illegal]; } =20 - op =3D &dec.opcode_data[dec.op]; decode_inst_operands(&dec, isa, op); op =3D decode_inst_lift_pseudo(&dec, op); return format_inst(24, &dec, op); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197760; cv=none; d=zohomail.com; s=zohoarc; b=VoI+JfnKw6ehdlut3T42nQb2fUnUrFXSIgJ2vi62yERujYTI5bBh+AfpL53Zsbs3rijR77TeW3Xmx5XZgg8pt1G+XGg72sYmxNTBjiGDcSUme2fPhHpcZ6kp1WZ7nyQsWl52HrIKf3dn1bw91AZhdYMX18BCFlTitFb3V4SR7ps= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197760; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=0l5cwjyhUZo0Z534C5ltswqTKfVTVx+zXnHGvUMI3ho=; b=jP5WT9hF8LU5HbFnmi6kD/QxLD6qieoMLegd3DfCBvKeu2s96TN9n1D6f3TbtcsCx4Z3iU/Hm7KAcN+ormsB1yH2rQSO/fxVmU6ubAhz64PsSgZLzNpgN9reYvdVJeO9Tziw24YN7d3pKNAaIE4/YCNFswN1vpYiZm6BT6bSTAM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197760184806.7888589320469; Wed, 19 Aug 2026 20:49:20 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlG-0006Y5-4L; Wed, 19 Aug 2026 23:48:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlE-0006Xi-En for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:12 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlD-0004N9-24 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:12 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-38ec1402b05so1522549a91.2 for ; Wed, 19 Aug 2026 20:48:10 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197690; x=1787802490; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=0l5cwjyhUZo0Z534C5ltswqTKfVTVx+zXnHGvUMI3ho=; b=oHqRuFbPzjcS1vV8N8tOXX7hktKhVJ+kuv+oyzH3bllZd234RgIjC1Hvsc+koXwt9i 346qWEmcM1zE4FTHhD55Xb4MlYctV3kB5R1JsmrxYrASXtQLzgk+xK2us3F8SDl0coAo E3FpoALwYzuxMQC/y3mZC8qIS0KNRZbAP0U3OEfLZz5tWtYRIEfKkEdcPUSsfSY7Uwtv ifJ1DOeQoITwg0H3h2GJusfB5Fd7hPwBzaOfULpXzFVA5J7EuqjRajZe9TzZlsdbSzRc Uw+Kx4xf/ThYh5VWzILeX6V316ZsZ3mb3n99w+fdVDtSYa7IvTpgN2Xv1YDUfET9OID/ +HhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197690; x=1787802490; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=0l5cwjyhUZo0Z534C5ltswqTKfVTVx+zXnHGvUMI3ho=; b=rhgtSucfwOF5WbAKmZI53D7nwaUfIK8CyaodLonBN65sxR2FHZqs7+aUwbenQ+yisS udM7FIhilD9UpOza7ADTSxo+jxvZ9qC+ZnijteUE8M7/notscC1fzekmEoAjRe9MbOAy UrpLuiEuhnefw8ozDLTB7H5NReHrFz/SDLflNvSKopYhtaPHwm6kRfHk0qNw9RNtoycz Jb7RH2H51lPT99tKPvXoTubP1tdTJoYgAYC8eLqffZy5/TUzF+EjPlWJ4iBlo6jt22y3 HiSvPdkGElDhe2goii30n/tFnblw4gMnb30RcuxjU3Alg32rqJhJnDvfprYSQci5/y/X vJMw== X-Gm-Message-State: AFuF++l+lSTgdtZb2Z61ZUUUv7zp1gS2uNhDybd7uIdk2rtTk5hKrcTb ghooltBlnZCyS62IgSYKMNs7yYGyMt5YbW7dvl20DFABUSAks2dSyTj0oL00eQ== X-Gm-Gg: AR+sD10LUbPmB16bDgWn5I9Jsko5jVY4sfccoDpqpp3iBLFb+goB3IxdDoCzkwUYFPH PMUy7SBCSdyguRKc9QbSImmUZSdWGSeX97tAJZ57jbL/0TEErtGlNvmaEDSZMerAEwwBPPc3aPg hGuU7qf6Gl+1WkPomNljUywznNXKGiTcs8ak5m7hawMCw3DBK4iE1b4Nf1NAxTlD9Q4nMCnJts+ P3yefm3Z1sHjmuDFpCQPcKUoGnagu095/csPY3mGNK6NiBXiRuyJEU8qN09e24jjtEVDC9a0PjO ylH6b30JGilgGoe59bu2mvu++Rjp6dZcMKQVDCYW4aMkSs9i5sxFB9xFgwJHFcBb8wJ2IINrfOk gUyXDBaupXmQka0X3F+He0kL9TNTdh9gsjmO1uTlifYLFbLM7HS9SB4BhGsMDK2SFAIcV6D9xZi T3XZJXSJ59tVN+slJOe2/bW9D5lsja2/S1b10O1zzbQlH3JxGZDSxCkUbZNpbyNhrI7FvrYKUFc cvv2A== X-Received: by 2002:a17:90b:5484:b0:380:f389:447b with SMTP id 98e67ed59e1d1-395810840ccmr18439829a91.11.1787197689762; Wed, 19 Aug 2026 20:48:09 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 72/93] disas/riscv: Skip post-processing of illegal insns Date: Thu, 20 Aug 2026 13:44:09 +1000 Message-ID: <20260820034430.1186695-73-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197760579158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis Message-ID: <20260812223142.349142-37-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index bc86cb866a..75c2fa11e6 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5321,12 +5321,14 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc= , rv_inst inst, } } } - if (!op) { + + if (op) { + decode_inst_operands(&dec, isa, op); + op =3D decode_inst_lift_pseudo(&dec, op); + } else { op =3D &rvi_opcode_data[rv_op_illegal]; } =20 - decode_inst_operands(&dec, isa, op); - op =3D decode_inst_lift_pseudo(&dec, op); return format_inst(24, &dec, op); } =20 --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197809; cv=none; d=zohomail.com; s=zohoarc; b=PjO0BihAZnP7SfFJeMsd2k8qawFRYTTcWI+HCz9XQkCq9PGYhd2S/xG7Z5WSsikmyWGCwTlCEvmsxSlwQdHL1qV582vdIBlu9AUwell4jjcnuzRejpWlqCmv8F0xt+tz9HzhH6mK1GO4nejoGKSSEsZbRg0CJMvrnzhSDxJvvyQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197809; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Yu4ELq3Ofd3UkpQaCSSE8x2tH1NrMj+tlGRK673tC1k=; b=letnLdVTr5Fh9FD4KEW6dfeJLvGJ7tPkKbRSqJZnSEm/FAhdVL/biMd8bANNiB+AVm9GQPBhNkMNXba9irCQex8zMwfc3NLZi+nbmZJLUMuG0cdieqhFlK91MJJiKnU7IyN85hXrDEyxDmLTftkEQ74ktPA4JbXlim6Li6wcAR8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719780914525.862463229626655; Wed, 19 Aug 2026 20:50:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlI-0006af-F3; Wed, 19 Aug 2026 23:48:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlH-0006YP-51 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:15 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlF-0004NV-Oq for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:14 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-38e58034d05so1490141a91.2 for ; Wed, 19 Aug 2026 20:48:13 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197692; x=1787802492; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Yu4ELq3Ofd3UkpQaCSSE8x2tH1NrMj+tlGRK673tC1k=; b=LK66okav7RUnYD/13gLrJOYcPDz5itPwIlvFKzkchCqVLo0FtWy2dtHitQbjx0Z16C AgrsCGceFoGmyibh/rC3dwl8hGOnbsWlC7rp+od3PpO8wZ0cSOgUxBQIwalSoBswc/UX sfaY/ms8vfpWfKrtvevvxHX/nQc35XaTTVw/6z/ayz8GtraQ72FfGrElQRcLBkwIgJl5 37I2G8lFqwdfkNXBL6WIfqr//tZyTqhFLojmS1ZaXljwCJh5nEzcEZzG/yVUp43HukAh MInnPgUMCCJI0L/kTap8829Xprqq6h3bgT5QZme4SxPGwtnX+yyr7hP1bgUnSGHe69mq 6E3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197692; x=1787802492; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=Yu4ELq3Ofd3UkpQaCSSE8x2tH1NrMj+tlGRK673tC1k=; b=B4/0KFJVe+qbF8ZJ1hEenAUtH0e5EGITjoyIeKGNU8o+WAGzr1ReGG24e2YXrfSzKC fe8eyJ7tmP7hNUXIj1xWLmFUZjKvkvmyGUnVr2E49Ox4fQYr9SCNDQvwDdg0zQVbifLQ +Z/XFlcSqeJHiC9JpbUnONRxvCBfrLETsWNaXteso0tTbv3gwclcpBqbG4dRjCasTODm Z5rbswYRJ9O71MX/kd5xzTvayK2MZqLizQI2trbi1dd34M8qVLCE+GmMrKgkXx8iYbtS sdp/ElDCwZ7dX8m1Wj1QHF+DUtl7y4F29FaD4msDgF4xrKcRq8HAuV7osCHr01cftlGU aKUw== X-Gm-Message-State: AFuF++lenddVi1cfXAS1V2kQYHsmPAgEa7GBzRjHa8U5rVsWgvrLBY8x U+DW6wKvFdSxStSLUc7wppl3veVNtWsnBkUv+7w9eHX6a0iCnaMDUZzXWbOViw== X-Gm-Gg: AR+sD13lD5fRmVPa/OPWTvT8fR6lct/ozSStTT02w14ZurQ8u/9ltkrqki+mG392mCf fDsXVxO9V0CfVWVxhHqWgo8uy6tarhGWqguCuWkyht0YIp25FvqyPKJJG8rYx2ET01Oz43b7aND Zg0lMogb/qkNF4tLNkTGIdU5t1n9Epvsb06mZ1Gu6o0a616bCiyc232/fAISTsOMWw9md9oJPIn qOUPtN1WdP5VMS5epNo3Iv+fHq50oKgKaJp4Tk19O/qkm1k939NeZAUzeaDKCgEv8ffti6tOu7V R4g5AO48GrJBDAn0BTPk6tnf9Rue1XYayOMxYSu5mt3lSdehiAAVwCJx3bQ/ZEGk3iiWY6cVuJi AK17h1ohE82kAbl5mVmvbaRHHy3Nb756abQpnpqjhMKl5vdgzZgk8b5USfUPzOVo/BeZ4KDtHzI PSXQBI1wdhU01OxVypCa8gHI2AKrFC5psGvCy8pBCSwh+PiPsp6cZ38e/uMh/LYXYh/YMrOCcq0 uvWBA== X-Received: by 2002:a17:90b:5624:b0:38e:e9b:ffa4 with SMTP id 98e67ed59e1d1-39580a7c3dbmr18960897a91.6.1787197692470; Wed, 19 Aug 2026 20:48:12 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 73/93] disas/riscv: Reject all of OP-32 and OP-IMM-32 for RV32 Date: Thu, 20 Aug 2026 13:44:10 +1000 Message-ID: <20260820034430.1186695-74-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197810734158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson These entire base opcodes are RV64. Reject them all at once rather than one at a time. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-38-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/disas/riscv.c b/disas/riscv.c index 75c2fa11e6..e650ad7688 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -3311,6 +3311,10 @@ static const rv_opcode_data *decode_inst_opcode(rv_d= ecode *dec, rv_isa isa) } break; case 6: + /* OP-IMM-32 */ + if (isa =3D=3D rv32) { + break; + } switch ((inst >> 12) & 0b111) { case 0: op =3D rv_op_addiw; break; case 1: @@ -3557,6 +3561,10 @@ static const rv_opcode_data *decode_inst_opcode(rv_d= ecode *dec, rv_isa isa) break; case 13: op =3D rv_op_lui; break; case 14: + /* OP-32 */ + if (isa =3D=3D rv32) { + break; + } switch (((inst >> 22) & 0b1111111000) | ((inst >> 12) & 0b0000000111)) { case 0: op =3D rv_op_addw; break; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198475; cv=none; d=zohomail.com; s=zohoarc; b=MZxo/SrTUzN0oeDVgBIHAHkDjZTSPayIDi49yUI9F7wBLDiSkYhP7YaC4/djWoSaluK0yB1dbRcua8R36/rLF4aJ83aidr4DFmDv3U1u6wJQosuTpluz94U69qpilprK58WTlDTSJbS9UNutPkHJfWpwNf1f+MdJlN0b6kMyxFY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198475; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=b2F4kXj+XlomzI5ywD3BSgCQbVAV2xTdDpSTO+oa8Tk=; b=LDLTWS6Imvh2RHVA+l4QDyP5aq+muJH11DCn/N/b6rJZ/dfFH7v291/F2bxvN/s0FvExCsGyd0XwcGrzvHe/rscUZKE03P/QgKeCK/lFo32PmnZsy3XCCLuluBTB/SGA2fJnopcFqv7sLf7/zERbhYzp0QxwxeJK8LWYx0TkvJk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198475511680.2815303761171; Wed, 19 Aug 2026 21:01:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlM-0006hg-HD; Wed, 19 Aug 2026 23:48:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlK-0006eL-8t for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:18 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlI-0004Nt-SM for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:18 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-38e041ea211so1773146a91.0 for ; Wed, 19 Aug 2026 20:48:16 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197696; x=1787802496; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=b2F4kXj+XlomzI5ywD3BSgCQbVAV2xTdDpSTO+oa8Tk=; b=Yxe98o5KsRJ4rlZ9BECARN/7weTDktktMsvmXxteLjVCLnhORwj8eXLW3vFu0Zxlzp NDUwJI4oEywPTiu8yGxNQsv0dRM5nW+2PA0Bkng8PfpNuWR6j9fdyKrshX2dyepFsCSu 86xW80/5I8j1PdqRgn67LiYY2ruOuVEn/+tDPX3UWvOBoAqeJIMd2VzeJNbbdBG/m7ax GF1l5hffWGm4jbsvDjZNwDmWJOFEqMMdbyO4Q2Aswc8tYTLb9sV2y0lHFDH9984f0EOA w7dusQdILKCYdE+iwURW+vYVa9FkfC9D9WMNyGP4cdSJHAgeYqExxlczrH60ds+Pmkpo ygRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197696; x=1787802496; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=b2F4kXj+XlomzI5ywD3BSgCQbVAV2xTdDpSTO+oa8Tk=; b=IdQF0shvUuaN1OquUUJw6uE6pnOEyy9W1jYTzCa9nEYRFiwoGp5xyIjvryU20h1V24 IHs4cFCXIVPFx+v1GoRd9I2+63m5+j3T3ZKwmOzYaJXWd38oWL+mLq5M7Y1s0YBiDxok 41Kk2KEZmqqIK8kB6FwmpiL/5WiccI/ogh4I3ml+PFsgHk/vyWSFUIsJCv1xuuJm8KTI WR2nyU5up3MiybTF5oIHzU6G0FEMIRmGgLm5GHRddpIL6UjEaCKQTF6gO28NdoyB7UOw bTKvzYPhHUIK3V+Dku/b1r8i+6cF6r9mvwfQ6rAWsS9Ny89aZNJb0MCbq46DNYjaVCVz KNJQ== X-Gm-Message-State: AFuF++lVbBWzKk1LMMiCtjgHFtHn9AaMIoS1FvyIhNoZyCFS7UK33cdt lwlLpGKXGRH9FGFRr8821E4ahIgh0TXLAfFAZGAFM/gYPFbS8/RSluz+CxbjdQ== X-Gm-Gg: AR+sD12mvCcd0yzrj0I8uM8vrgXkIWCj7d9ZAXewsPyA7v3SiqAoPdVm8ul/kDZ7oUs nP7J4T1SLJbcEYHU66SlZrgW5sFWuTGyZjYoiT11qs/V7p27UmbdxBuD4KAX8pGd2noasyXQut8 iI6Q2LOmozex0XZzmCRWmM9mMGRSu9ccqn+6wDsj8ygoPwRzmQR6Y2oZdDzdUO2hp8gzd/54x5O jEqHnZ7P/72vdPjuSzZNkQG1xJDHx6CVtHXrQ+1+VANsuTW6iN4KXhNEncGrgtaLU6MgAKtyHVf c+xM8iO4nkisS+aH3Gz0hvg20g30h4JvaoX43BUbupT96y0ze9Wa7tMOvT1jWY0DEy3TFmGuASw aOTT7omoZZ0V7RVVVFS4AIA0tFYwP5nWA0C290ntKGcZRcr7XhLIcqlAz9+OQk7pAcNfb3aXLsu Mt3I8s2VLlx3xtTJFEqunLpVxtsmL9/Z+C/53gIRZZP5lrMDB76aKAD4g2V3q1tdDeqGlS0Q5Y9 plmmh6/1zhfp4Dd X-Received: by 2002:a17:90b:37cb:b0:366:3517:1aa2 with SMTP id 98e67ed59e1d1-3958046ce9cmr17421043a91.0.1787197695640; Wed, 19 Aug 2026 20:48:15 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-stable@nongnu.org, Alistair Francis Subject: [PULL 74/93] disas/riscv: Fix rv32 encoding of zext.h Date: Thu, 20 Aug 2026 13:44:11 +1000 Message-ID: <20260820034430.1186695-75-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198477086158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson For rv64, pack with rs2 =3D 0 does not encode zext.h. Cc: qemu-stable@nongnu.org Fixes: 02c1b569a15 ("disas/riscv: Add Zb[abcs] instructions") Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-39-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index e650ad7688..5624e7f60a 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -3506,9 +3506,10 @@ static const rv_opcode_data *decode_inst_opcode(rv_d= ecode *dec, rv_isa isa) case 14: op =3D rv_op_rem; break; case 15: op =3D rv_op_remu; break; case 36: - switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_zext_h; break; - default: op =3D rv_op_pack; break; + if (isa =3D=3D rv32 && !((inst >> 20) & 0b11111)) { + op =3D rv_op_zext_h; + } else { + op =3D rv_op_pack; } break; case 39: op =3D rv_op_packh; break; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198341; cv=none; d=zohomail.com; s=zohoarc; b=fyX5p+m82+rYrSlGoHzhNm4UbJk1GGbx8QelR0GVl+FoobXPikAoHLwLe7ixMLPbaZkUcMEthhn6P9TygCIo2rhsNWfjBQB466BYQHK5+jkiaUmHFqCldc9QSNcn/wAvFBtgZCgSAFnPDwmxc/aZmPJ6TH1jqT65qSWwYpsAGWY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198341; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=HaltHBrD2Aw1tYNfzSMF6Xxi4/NnMEbI9K3tbX0694Y=; b=X357xMGgmp2+2AdOFE3EjBCW7CD/6oTYt+c89gEQQhwoRi7cDFMJErB+dt3zaHMu9PeOesO+cnZMcuDapSigGTntzUuA2JjKN3AL/hNhcLRdh1ynrUvG9MZuFQSDXLJx8PgDRgIi8TbD5Pa7pBTnGRjbPyaMzLOAjNdJtwK6A9c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198341191869.6585342924286; Wed, 19 Aug 2026 20:59:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlP-0006k5-AM; Wed, 19 Aug 2026 23:48:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlN-0006j1-Ng for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:21 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlM-0004OO-95 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:21 -0400 Received: by mail-pj1-x1033.google.com with SMTP id 98e67ed59e1d1-38dcbade417so1939436a91.1 for ; Wed, 19 Aug 2026 20:48:19 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197699; x=1787802499; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=HaltHBrD2Aw1tYNfzSMF6Xxi4/NnMEbI9K3tbX0694Y=; b=IVWLmagdZ2IKOnUld3UTPSnZ7ByQfeTer1ZdSGJKx/k5J7sDJFerWlGAsr4ht9Q+qq ND5jrPGYzn+lGfr9rqujttUh32MZtAC+1CM7LH0pY5dCjff9RB3AK1KRrDM2LWusc0uP BOVz3225rlDKl4YIwf3G4KW4xKhGoT7Vwk0cRBJYDWgg4PAaVnewrxAZ4gs0PH/OBOnP iClCIdXVk3EPcC//X5L0uM8/0elH0j1/JBZ8FdlwP7x9SaY51MF2mUTShiofiMl8Q4g8 HKC56ptyQXx13Q6miEDIGlJS5X0gEvtV1uSmi8kWKS2AhB3tQ0ubiKyGuWTzLiSiR2Yv 0ljg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197699; x=1787802499; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=HaltHBrD2Aw1tYNfzSMF6Xxi4/NnMEbI9K3tbX0694Y=; b=nNSXFaEIBVI6Juh57ncjBiEtZrIQg29onnnjcH7EBCvgsY8ThddAI7Jm9WuOgL6JZY dZ0xMHHd1U589buzo5Zh4xQdcgPGvSefstKCYUw6rCeFC1xkvDn/0V9JY37OxbYXe45R BAEB2WWda/hDo345wuxT6yGGHxIePsZd9EUGMx7+dZhjMFji+ZgYS38KRS0eRmRRUMJl RRjbwdQ4ukTYWaHd0Q+wUu23SHNqEMTdrOKJs638GF18JNxsQz66+rghxV7hL20ORF4d gfYBU85PraiwPelXFQGlpky4L7iSlh0rwWOqmlCVMkZOnYBj8DYIyL4abXfaUyV3lUK9 ATWg== X-Gm-Message-State: AFuF++mUo9qILAmApJ4PoQ3iGvUFI/i/qrF41wwj4+8y4bY9pHLNX+RE HmX8oCrjttl50acY82/tyzyUUzrQtbWaceZdldyR6HY+y19l4QvzeLs9PXeJdw== X-Gm-Gg: AR+sD11BzB3bqHb8CrECcY9S4wh+D6Wz28oyJICiz8T4gzQwiMag1NWZVUjlsieZXyr MkZ8eW+iE/3KTsKK2jGPtVmjeBGi2B4eBNmTZM7rfE78ARStiYQ/vhbPrgOtcMP5r9ElmIwP39y WjOEujsBB+6C0Lls2V0gInl5afvS5gfjlWaaegtM+deaDO/ulRHBB/RXMJMJCit2xgn8Mm4DMoV xMmoHMB6AXee+ujEryeFW6wx9LL/iazOdnSOEIb9kKHtFvJzZ1/Fd0BTMG/gvLEP71HoSgexQLc MKHxVv0eJrGrd5ZovdVOxEUyJe+SDIkVeRJInzB8qDfPJuoldHWMXglWBRVXNWJzJLsadQS/YLO BIrshQRkdl5zjTfn3X8s+Orn7VBrw3jBsytva8eS5jnMzsNuZ+Hy6hyg/T9oEGIX1LpErrZWO5z ChCvDwdvfJqnt96v3x702tDMPmcJwgYuJT2IlLglAu2jzr9MT6r3Tv1VSmjRdsu1h3GQlUzzNHA W1Bjg== X-Received: by 2002:a17:90b:5102:b0:392:b509:b1a5 with SMTP id 98e67ed59e1d1-395810caaf4mr5432259a91.14.1787197698856; Wed, 19 Aug 2026 20:48:18 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-stable@nongnu.org, Alistair Francis Subject: [PULL 75/93] disas/riscv: Fix isa decoding of rev8 Date: Thu, 20 Aug 2026 13:44:12 +1000 Message-ID: <20260820034430.1186695-76-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198342459158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson The encoding of rev8 is different for rv32 and rv64. Cc: qemu-stable@nongnu.org Fixes: 02c1b569a15 ("disas/riscv: Add Zb[abcs] instructions") Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-40-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 5624e7f60a..787340e811 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -3292,8 +3292,16 @@ static const rv_opcode_data *decode_inst_opcode(rv_d= ecode *dec, rv_isa isa) case 0b01100: op =3D rv_op_rori; break; case 0b01101: switch ((inst >> 20) & 0b1111111) { - case 0b0011000: op =3D rv_op_rev8; break; - case 0b0111000: op =3D rv_op_rev8; break; + case 0b0011000: + if (isa =3D=3D rv32) { + op =3D rv_op_rev8; + } + break; + case 0b0111000: + if (isa =3D=3D rv64) { + op =3D rv_op_rev8; + } + break; case 0b0000111: op =3D rv_op_brev8; break; } break; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198278; cv=none; d=zohomail.com; s=zohoarc; b=cKClkzGXyvMOk/5aAmYWkX+KXOhbBpji4He0VrKeahCToUeny2AvqEgwBly7GgVpuSXZb6vXskV+uK5PSWwBjiS9VtdfonaM2y7GdQWnUNDpBjE+db9VPUHd3zOytgQ3mQJpFS1X8/0I/pNujdejjs/JS4u7N2JoIeEx3tL6Uls= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198278; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=oZV9gDbx+A65MEMcmH9Ce0cuAUaddw6IKp5G5U1reZI=; b=FarrHykK/ElkR3wD2w8NYpsmD8BUCIYcji7TexSqkvWFlTUVqY7ZcLRDDNG+1eKkE7qtW0c6wvkvmZkN9qlvRM3MeHzASE4M7hPfkYvGnRxzNbfI3Im7xZzTsKSaivtJPtlwDAS5wyJdcsWidRk2iW+Ske/iYPOVTjGbQWv3298= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198278048832.5054148852828; Wed, 19 Aug 2026 20:57:58 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlS-0006nz-6u; Wed, 19 Aug 2026 23:48:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlQ-0006kK-JC for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:24 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlP-0004Op-7E for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:24 -0400 Received: by mail-pj1-x1034.google.com with SMTP id 98e67ed59e1d1-38f620399a0so1519963a91.2 for ; Wed, 19 Aug 2026 20:48:22 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197702; x=1787802502; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=oZV9gDbx+A65MEMcmH9Ce0cuAUaddw6IKp5G5U1reZI=; b=aEzMW5rJylZtcGkz9i/vjl8jsiFO9MMoWhtiVKrX8i/drtpk9qtGh3aKxq1v/twHVr HCgsd403U0QON072VGqvFZ7FqqfNb7Nf2zHrc2vMdplSgEIVw/dN8xvaL9Rblso6Pw4n TrpOTtyJcsxVUhFdSe+LwNZL8/bTmGtsKUH/BdIRELBMarx18a9siVxSofTAL+Lkuvg4 dD239440tNG+tvj0xG/H8gHhtME2JGPMEk4aY6xmYyWWhwMhJClqsOIK0ovooMU/hIiy Z8FGCED/CG+6iX4XlubaKW8yDU/TesrFC2FnBRx2QOmyf9NOw9EfYS3K0Ol3AVM19Ib9 JAgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197702; x=1787802502; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=oZV9gDbx+A65MEMcmH9Ce0cuAUaddw6IKp5G5U1reZI=; b=Y2eCQhJetlHG1hNjr5N+aeGHzKK88//NKRlTzTeq37FeK58vFGfhyomuRk0rKay9r+ GOjDSEvqYHQqnfTlPuN4qQIbXgDQJPXU7JTdn8dKVBNwGFQUIket7JYPYQDkBRkW6Klo S5tXVQDaxPii8GCzJS1aXb4C+ag1pT+r/IkDIMAAG4yKZswVlJ5+xb6IEqgGnEeqYUTv 9pUjlmWmqrlire4W4Et4cyRCs2vtfuFAfi4s2NHeKsdXK1wIxquKKf9fQPaZKoHM5+9e IJ9qrf/mU1gZtUPIXlDq+69VQPnKR32ZehIj554wIqAjxKLqsXFMGNTtGm1L+cYiETz5 VY8A== X-Gm-Message-State: AFuF++lMJWz8KPwPeVKkj1ne9MYsx33yXFngh/9Gu1n+FFOttu21hUdM HwqiPGqoRqYgjdNvC9UEK7+c1j92pHUKOE78egZo0IiE3tkioTCzIxXXL4wLPw== X-Gm-Gg: AR+sD10JOujtQwG/JOI8f+MKJE4FFwrkO2g6IcVBGctLsuWAwZ408Jat+8/dpNHKwAB wOi+FLEJXNmFsd9L1u7dYYT9sfbOducYmX8DuYXMEYsNfVJsLU57iz8t+aglyOiIY49CwF/DL2I 1pqs2zM8iBfqKQfM2mrkXfw5O/GUekN2JJJbc6s55eeS60U1gQ9NrlmA8ay4sTdEuQsPqFcGSnO N+dLG5aeKWMD5AzrR3igh8YMmNG5HsJrnchqvJ8MAWYqQ+p7U9YwlRwGbZ70EUJcfuUq8iTH4qk mOKjrK/QNYbx/FpeSs3s0jd9INdwRgGeMhLf0gN0/IQJ7cIvp2vfIDoR10HQU6H253PjO+X95wf rDUW+ExZYovsJF/SUQLhWgBDhi1vyS4kYgLpsCN4Jd6BkjKjr4Tm2uhlv/43ReQeuE/lcTVcMZa Zp/mqeXV8Nhg+7NSROY6J8Ta2jU8JYMc/H3XsMJKTvLuJc6r9b6RE7EeQUCHQJLRbiFUJo7uBU3 KjRTA== X-Received: by 2002:a17:90b:3910:b0:38e:4cb:51f with SMTP id 98e67ed59e1d1-39581088755mr18035634a91.11.1787197701844; Wed, 19 Aug 2026 20:48:21 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-stable@nongnu.org, Alistair Francis Subject: [PULL 76/93] disas/riscv: Fix typo in th.lbib format Date: Thu, 20 Aug 2026 13:44:13 +1000 Message-ID: <20260820034430.1186695-77-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198278282158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson th.lbib should format the same as th.lbia, and the other increment insns, with the address register in parenthesis. Cc: qemu-stable@nongnu.org Fixes: 318df7238b9 ("disas/riscv: Add support for XThead* instructions") Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-41-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-xthead.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/disas/riscv-xthead.c b/disas/riscv-xthead.c index 428a6380e9..fbc96631fd 100644 --- a/disas/riscv-xthead.c +++ b/disas/riscv-xthead.c @@ -189,7 +189,7 @@ static const rv_opcode_data xthead_opcode_data[] =3D { { "th.mulsh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, /* XTheadMemIdx */ { "th.lbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml }, + { "th.lbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, { "th.lbuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, { "th.lbuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, { "th.lhia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197853; cv=none; d=zohomail.com; s=zohoarc; b=a7hRDtQYaNZZ1YuOue6AR/QKEoq7uoOx7UCvgg69bNwI1FQKtKypCphM50f4L0UovoPK4uFbB9U28KzcGXna/PyThs3zSBHl8424aYVs+w7MqNB8rNKV5v1wjKdndDuTBGVFAFLqv1Er4VSdJFfbp4hswmSSTMXcP4AJtvk111E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197853; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=6cxpb598ZC5YQS9pQsz8M+jshSqMrf/FVzGuyNPyanY=; b=nnMjjNBR0IXE0GIrnKHzSX/kzYGvO2BkjeZQLboZE7yPTe0umJ4j/Vm73VHgnIULKbR1QHnU4S912hZanpI2VkUx9KbiwBvuQNXFJ8PLFNkc+4gpZEgki4lE+RnpxVIvDxDtYZZjC7xvARJesKg03w2auqKywIiizEfXLDb8f3Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197853537962.1724580862441; Wed, 19 Aug 2026 20:50:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlU-0006rZ-UT; Wed, 19 Aug 2026 23:48:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlT-0006qW-GJ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:27 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlR-0004PA-TQ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:27 -0400 Received: by mail-pj1-x102e.google.com with SMTP id 98e67ed59e1d1-38125cebfdaso2756909a91.1 for ; Wed, 19 Aug 2026 20:48:25 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197704; x=1787802504; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=6cxpb598ZC5YQS9pQsz8M+jshSqMrf/FVzGuyNPyanY=; b=eGOTKMBCRprhvggsvMnCOfsJYFNQyK9Ftz5RuINJr+IavvsuwKS5YHHiIrcky0mNGY avXt7WUYvRolo58U1t3jtFCPSeftYiogyWWvsi9IkCQM/0G9mEVr16b46hbtEEM84ubD quprMWat8FCEhp3LwddS+sveMm2dmVuX/Ak3EO7jKlqj2Rlq0GkAiTnrU5TSECmYxN2D raha8qqknQ5I5Hv7cdE/vINGfLISpr6Ltm3/uCg+PYjx8nFOE5YvJ3TEXxafQqA51W7H zkozE5vsBg5Sb4Yi2eIe3FVoxd4F0OSO7cl8HkgSHO+6haoWyKB76FbHzhhp1N56oLGJ /9Dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197704; x=1787802504; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=6cxpb598ZC5YQS9pQsz8M+jshSqMrf/FVzGuyNPyanY=; b=TZNkQpkNFE8rmSLVac6ZbC1R8K+g7HFAqWO8tr8H0iNQKYUbtFMYa0YhE9cMYT7bPm 5FqX/9Hgqx3ulWGjOwo7Bw7IwsP0n7HNspfkWnC00VjHt4NbOrOnMSkr0pZ23I2zJHl/ YMb3GDMvB9hqSBB+RaOUv4yb82YQhipumLe+xRbWxOPuIAABc8TerlDU5OxqUsa4k60q S05E6PyaDRTdT3nSRVH7hXAFchSYn9stEK+PEUAAuslPqqXuddkCO168Yxho9D+pGW+v +qPB5LuFJZMRRBdLFx2AP2F7kOVz3kv3/YxhMSBaPDl3Dn43KwCa7Dmx14m0eQOk4TfX N/FQ== X-Gm-Message-State: AFuF++kz/787q1KbE7R55DTSAiXVnU7Mktr3MEdsn+KwAWZhBS+B0LNl UGuscNqtlqO/tLUlf9k8O9Mp6f9bu7K7D+l/nHUcxP6/2bx3tk3qrj+0HP+nDg== X-Gm-Gg: AR+sD12jbqIZU8fBofY66gY6QoUOc1tCugcnXWmIYBw4uJyrU/k8YYSHLz0mwXnCd9y wODyueJ5HCLSFaILFVLRvknqWG2dwfrOtl/GZ+TMttUsibC3OE4DCff2x17IG38RHX1qa7b7zk+ YGeyShnWHqdLZHbyilsLjOP5qMRhvQS8i0aThPULCcH0sccssGiO2WPNWApV3kb/1CgcJZr6oPP UPZiBNxF8Kr8WPqNkZ6lGc5YZ6lGNWkqfP0/uxDatNowfvsiFOeS8IVkLhtUDrPwR2WViDR0Q0x YutZ48xZ2nKFWCuCVvS3/5ld1/dSL3bXMP5rTDgjk+CzWEuLBV7FRjWojn1YMLAR7WxFqXR80XI mC8JbOFT/XsN0H/4uZZvkVxC0OfZcLNpC16M53x/2o8W/LfY7R16DWsbYTyaAuSbr+79elqBmMp sB1ZH5f/8tc7Ic7SQGtogoMwHVeXdVnnI4e81hcHkTwTdNPnMM1ZgyyxAc4V3JIU10idNtU9fAJ kwhgw== X-Received: by 2002:a17:90b:4fd0:b0:390:b41a:b92b with SMTP id 98e67ed59e1d1-39580a53469mr18392116a91.4.1787197704400; Wed, 19 Aug 2026 20:48:24 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 77/93] disas/riscv: Split ventana_opcode_data Date: Thu, 20 Aug 2026 13:44:14 +1000 Message-ID: <20260820034430.1186695-78-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197854965158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Move the table to riscv-xventana-op.c.inc and massage the lines into OP() form. Drop vt.illegal as unused. Return pointers to objects directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-42-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-xventana.c | 21 ++++++--------------- disas/riscv-xventana-op.c.inc | 2 ++ 2 files changed, 8 insertions(+), 15 deletions(-) create mode 100644 disas/riscv-xventana-op.c.inc diff --git a/disas/riscv-xventana.c b/disas/riscv-xventana.c index a4e59312d0..5d2e07865f 100644 --- a/disas/riscv-xventana.c +++ b/disas/riscv-xventana.c @@ -8,35 +8,26 @@ #include "disas/riscv.h" #include "disas/riscv-xventana.h" =20 -typedef enum { - /* 0 is reserved for rv_op_illegal. */ - ventana_op_vt_maskc =3D 1, - ventana_op_vt_maskcn =3D 2, -} rv_ventana_op; - -static const rv_opcode_data ventana_opcode_data[] =3D { - { "vt.illegal", rv_codec_illegal, rv_fmt_none }, - { "vt.maskc", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2 }, -}; +#define OP(N, ...) static const rv_opcode_data op_##N =3D { __VA_ARGS__ }; +#include "riscv-xventana-op.c.inc" +#undef OP =20 const rv_opcode_data *decode_xventanacondops(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: switch (((inst >> 2) & 0b11111)) { case 30: switch (((inst >> 22) & 0b1111111000) | ((inst >> 12) & 0b0000= 000111)) { - case 6: op =3D ventana_op_vt_maskc; break; - case 7: op =3D ventana_op_vt_maskcn; break; + case 6: return &op_vt_maskc; + case 7: return &op_vt_maskcn; } break; } break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &ventana_opcode_data[op]; + return NULL; } diff --git a/disas/riscv-xventana-op.c.inc b/disas/riscv-xventana-op.c.inc new file mode 100644 index 0000000000..0fe4666aee --- /dev/null +++ b/disas/riscv-xventana-op.c.inc @@ -0,0 +1,2 @@ +OP(vt_maskc, "vt.maskc", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(vt_maskcn, "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787197809; cv=none; d=zohomail.com; s=zohoarc; b=ktLbbWgEwNctUcZ56KfZVRp1FC7eWfhCO3K6ondwd1EWKLbCYm8pKUibekQX0LQnI0+0gNg/vcCIfVkJZ/4tLAkS+rfUaCwlESks9e4R3PIUSpkVwvTq/OY/ddFPntqWmKfjkYPoTfEDqelnxNIUEQh1ODE6tcyuaVbtUBlrhK0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787197809; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=h2oaOCJCF/+kDDtd38kYag9b0rC6YDKI4au6Nbv4V2A=; b=iZlN5jic+8V7jTLmv2gGXN86tvTNsu0hgUbia0uH0ZN9cWJtEy7KGIHT9DJAWM1z5GGG4NIPrbp3cbSQ9HAk2TaQJ7BzdrsvuZutJWmNtLKJ4XhQX8tm+lIitleF4YMLG3AmSBE/4pOFyGZDHdyqSO0g6tO+5vN4Qjn3U493EIc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787197809178741.7172790010183; Wed, 19 Aug 2026 20:50:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlX-0006sL-Qk; Wed, 19 Aug 2026 23:48:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlW-0006rg-0b for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:30 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlU-0004PQ-Eb for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:29 -0400 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-2ceb096e675so20659905ad.0 for ; Wed, 19 Aug 2026 20:48:28 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197707; x=1787802507; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=h2oaOCJCF/+kDDtd38kYag9b0rC6YDKI4au6Nbv4V2A=; b=AuCaIFdgG/SEUhaWwKmYs0z33er+54mRDZaoHE2laXo6kEKlimzVMvBppd880d9dzw FJJNqZsq1jiA4uNa11fh0MjTx15JUqBIVcskY39M1oXkuLd+YaI02DnZW+ULucAcgXf/ Dh+MmzHPowb+2hpXJRjh/VhY7vkeOSctumfepmIA895Voqf4ngVB75gZQvytPb6zc9sE 0LpMsWK61usjMtG+yz646QYxCRb96eLtbKbrBdEVPw0vSKqzhKculjdKV/LnCXc3KmOh rm+FpAlIHVvlo6YwzSQoO1cJr3MfR9LQYB2R2J1bala6LA7bIzWwjB2hO3ACwojzqJka YxwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197707; x=1787802507; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=h2oaOCJCF/+kDDtd38kYag9b0rC6YDKI4au6Nbv4V2A=; b=FgEIviBoQCgCJ4lzDtvvFrVwu50lR4T/0MafAbx6VuecH1+ETYITnRyMBKC/v//uX9 ocwmVD4Kp/ETADJLV77COoWHbcMyHMZpj3rly2M6zpcDrpkI9E25B9vRmy3iufMoKpl8 xwckw00iT5KkFpfIs8tY8dJqttzE7+f8aAxiEgwE1OZTcesDuRWgfWdnQaYGCn0AtnGa rgt4YhTnm4kMjW1IS4HtCZDvMGOfv2jf0LO5iAYYgtNTrFsyBEBN5T0qNi2TM3ehPBiK kF40wTiiek1aw7zKJZ+7/a/KfgQOp6sX8LUiKVmt5t3CyTelF9yemyZOoDOf/5h21s4R fDnQ== X-Gm-Message-State: AFuF++mraq8KrXEQNXRjVGd2CBVTj9nojDAxiem7exLoWWdt++whqcrx 7kjFWdGFIelbERd8L8vUDYzoNEpsECO748T3TOwylDFevBdlGSz3mbgzVdq42g== X-Gm-Gg: AR+sD13Jm3RXc0GmgLq9CfJ5TVRN/b4lzqafeTAQRTutUQtLi8mT3b3y7dzmmKQDIU+ uJteytMjsiykrp/5FHnDhTK708ClAXlEZFE8+2BTjFT+FQO82EDPVd9+PKkxegnkHWkI5DNgnpn hSpDUkFRt/wnp/5TA0KW2asii6tV+XPTkEguhpUcFMtYAFJeHIVdmYXAMup/khyUYlTHOwH7QFW Rc47w2x53V6u/87pLztHw3D3mbMA2qpmMZRrSROy489ZrVFwuN9XYi87keP4hodTX/z7nibn/jq 08ubgSXcw8BM3mwUVpF1HOcgVZsfyKZ7inacwyQkw3VtSRnu4EeCbOwStBTE1gq9fzmo9LTLBFi 8gDqEvyGSPzWNGbrGCddsbFJr5PqR1uqVxmg3MsC1Or1G0z/CG8JlhjRnxojjQT7rMeTgV7P0QU UN+8I8VoepXczzWsUdxfzyb160tTSjqCqxMXQmuUe37kmNb/Qr3k6eAPr8fj8YYI9uTZBrx1Yd2 s+A3A== X-Received: by 2002:a17:90b:3945:b0:37f:eafd:3505 with SMTP id 98e67ed59e1d1-39580eafaa7mr19068358a91.6.1787197706998; Wed, 19 Aug 2026 20:48:26 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 78/93] disas/riscv: Split xlrbr_opcode_data Date: Thu, 20 Aug 2026 13:44:15 +1000 Message-ID: <20260820034430.1186695-79-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787197810770158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Move the table to riscv-xlrbr-op.c.inc and massage the lines into OP() form. Drop illegal as unused. Return pointers to objects directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-43-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-xlrbr.c | 54 +++++++++----------------------------- disas/riscv-xlrbr-op.c.inc | 8 ++++++ 2 files changed, 20 insertions(+), 42 deletions(-) create mode 100644 disas/riscv-xlrbr-op.c.inc diff --git a/disas/riscv-xlrbr.c b/disas/riscv-xlrbr.c index b12916c9da..b4229e5c83 100644 --- a/disas/riscv-xlrbr.c +++ b/disas/riscv-xlrbr.c @@ -8,38 +8,16 @@ */ =20 #include "qemu/osdep.h" - #include "disas/riscv.h" #include "disas/riscv-xlrbr.h" =20 -typedef enum { - /* 0 is reserved for rv_op_illegal. */ - rv_op_crc32_b =3D 1, - rv_op_crc32_h =3D 2, - rv_op_crc32_w =3D 3, - rv_op_crc32_d =3D 4, - rv_op_crc32c_b =3D 5, - rv_op_crc32c_h =3D 6, - rv_op_crc32c_w =3D 7, - rv_op_crc32c_d =3D 8, -} rv_xlrbr_op; - -static const rv_opcode_data xlrbr_opcode_data[] =3D { - { "illegal", rv_codec_illegal, rv_fmt_none }, - { "crc32.b", rv_codec_r, rv_fmt_rd_rs1 }, - { "crc32.h", rv_codec_r, rv_fmt_rd_rs1 }, - { "crc32.w", rv_codec_r, rv_fmt_rd_rs1 }, - { "crc32.d", rv_codec_r, rv_fmt_rd_rs1 }, - { "crc32c.b", rv_codec_r, rv_fmt_rd_rs1 }, - { "crc32c.h", rv_codec_r, rv_fmt_rd_rs1 }, - { "crc32c.w", rv_codec_r, rv_fmt_rd_rs1 }, - { "crc32c.d", rv_codec_r, rv_fmt_rd_rs1 }, -}; +#define OP(N, ...) static const rv_opcode_data op_##N =3D { __VA_ARGS__ }; +#include "riscv-xlrbr-op.c.inc" +#undef OP =20 const rv_opcode_data *decode_xlrbr(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch ((inst >> 0) & 0b1111111) { case 0b0010011: @@ -47,34 +25,26 @@ const rv_opcode_data *decode_xlrbr(rv_decode *dec, rv_i= sa isa) case 0b001: switch ((inst >> 20 & 0b111111111111)) { case 0b011000010000: - op =3D rv_op_crc32_b; - break; + return &op_crc32_b; case 0b011000010001: - op =3D rv_op_crc32_h; - break; + return &op_crc32_h; case 0b011000010010: - op =3D rv_op_crc32_w; - break; + return &op_crc32_w; case 0b011000010011: - op =3D rv_op_crc32_d; - break; + return &op_crc32_d; case 0b011000011000: - op =3D rv_op_crc32c_b; - break; + return &op_crc32c_b; case 0b011000011001: - op =3D rv_op_crc32c_h; - break; + return &op_crc32c_h; case 0b011000011010: - op =3D rv_op_crc32c_w; - break; + return &op_crc32c_w; case 0b011000011011: - op =3D rv_op_crc32c_d; - break; + return &op_crc32c_d; } break; } break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xlrbr_opcode_data[op]; + return NULL; } diff --git a/disas/riscv-xlrbr-op.c.inc b/disas/riscv-xlrbr-op.c.inc new file mode 100644 index 0000000000..57add37c24 --- /dev/null +++ b/disas/riscv-xlrbr-op.c.inc @@ -0,0 +1,8 @@ +OP(crc32_b, "crc32.b", rv_codec_r, rv_fmt_rd_rs1) +OP(crc32_h, "crc32.h", rv_codec_r, rv_fmt_rd_rs1) +OP(crc32_w, "crc32.w", rv_codec_r, rv_fmt_rd_rs1) +OP(crc32_d, "crc32.d", rv_codec_r, rv_fmt_rd_rs1) +OP(crc32c_b, "crc32c.b", rv_codec_r, rv_fmt_rd_rs1) +OP(crc32c_h, "crc32c.h", rv_codec_r, rv_fmt_rd_rs1) +OP(crc32c_w, "crc32c.w", rv_codec_r, rv_fmt_rd_rs1) +OP(crc32c_d, "crc32c.d", rv_codec_r, rv_fmt_rd_rs1) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198293; cv=none; d=zohomail.com; s=zohoarc; b=ix3Loy/gsrqkF28SN3X4zcEYfcOenJ2cQzlKlNgGQUiVNy2S1Zu1Y87IXuuDnx6MRqIa589/ZWifYBqBOCFfAITxuqfAvW4/IHTgAIeBhxNEnPvirwZ1wSlzhNy66vEnbp4eNLfBQslXocZ/oklTuXh38jlT913DQMxMpq+jhxo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198293; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hFTZ3kapZ8QJtr1bUBz2auegSsuYlFS9xaT6qtKR8oI=; b=bTlI9PuNS6Ys7bP5sOz7LkjopetVo+VPHIZJZUW6zL74qOJ7ImqGJsooQI5YWKMCZ84k0SONSlOem5HbE8KbVzbzVwS2PMpt4aFlBad0aCt0BzUJmYj42jfpIE6a9M0wlKXGYrrey4mB4Ez8sueNog8z34Spj42SeCsRAWDPs+Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198293460442.352313438445; Wed, 19 Aug 2026 20:58:13 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtld-000706-BF; Wed, 19 Aug 2026 23:48:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlb-0006uT-CU for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:35 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlX-0004Py-Hw for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:35 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-38dfe910e9dso2044301a91.3 for ; Wed, 19 Aug 2026 20:48:31 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197710; x=1787802510; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=hFTZ3kapZ8QJtr1bUBz2auegSsuYlFS9xaT6qtKR8oI=; b=hmkKyurDJP8gqZBrynD2UQ5MubiKUs9roIHKjl5vkJLwa3lRnewVziLTQMc49dAUW+ jlvrkkJnHbErabvLU339OXbbnn1jNG/TLONV0gswixwWJiFMi4EQU8+vN7NHO3PgkOfD 4C9eL7sCZVMymacnUAiOG1zLydrSueTNpH28k/JB4DKYS+JUjfr9+ey1YzmeXFD8UjiL RQzt/JuBto6zilGgha+eJUSdraivk+mfq3mVrwJSh6JwTw2EBH7jUZIZylTrMei3Pd/x uNwjccDfSXdkuKhWd211wYwn9EjvRdJIdptiJpngOUxXzbLdb+gkV+dziewdT2u2Vsxb AG1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197710; x=1787802510; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=hFTZ3kapZ8QJtr1bUBz2auegSsuYlFS9xaT6qtKR8oI=; b=VDkrwFOqZEwuXssFw7u7VbUMHCFOx8q0eA0Pdy5yZoNPOchHLZ0riDWm9V6Xzts2jo agRaLA431HL3MGFfKmER3WkWvYWSblgliPp6WhJnRbkw5GtxNBpaqX2ZHZTNSH+sW5OB EqOl42jShPUV0+Fe0xWcbSD6nx33ibfclXkLYHfuaQDXoPFNwnFVYDznxWXzOeAWkTap 1bECA+g06ma5G1ekpatmy3HPC/zVjmi2lNdRJuhjBVm1HMQi2dPSFIIryoMJzQoYwrQ8 M8Wmv5KnoEKH1HnaVI6xBC8zH2BV/qeOOfalNsq+cBK1MlEze8/vbKXrmgfHOfHB5dHm kOAg== X-Gm-Message-State: AFuF++m+TF3yDj0jLhyMsy7VYihmLb0NzbtfXNjgOSCObm6i9Njx/d6t zwyGhx6pEpEkzZTv8oM7LkjZMv7qDxb3R0z0KCrwS4/edVwHUKFIUN4IDAyhbw== X-Gm-Gg: AR+sD109cpAuMUp2Vg028MeS6LvcjSwh0FVybeueQcqfE8dqljVCSoN9jsI41cfPoPx ld+CLyYQNMtUsPy78rTbXof0wa7an55zUJZ9ZYjqmTGLbwqak6Xaqjhj1m/Re1EEkqkOZI+255J +klxPRmPcyIg31MdIHaud0A0Psy3qJOwa79CqCyVIUHPnKMcwGvMn2L5BEw17leO4cOw5j1KnJ5 kUS/OuXrR2uQcJlSt8AVkcTayU0YhvtsjZsS3lgybyR8wL5JT96CG+J27Gt9IJ4eFmAIzGqi9J6 ztskY6P+EXxyOKK3Nh1UpqO5Mj2TMInZml+8xy7OvfXA1Ze3xpRzPfWQiCAbl9tW0qYJstebN7Q Pw0s0Q47zp7Uu1vXSMmneU9jQO98KMj5Np4iNIzc4+MxYmVf500YofBuIklDCw3gUa5Yst9da7U jlZ7CSrPpCy9CyJamrYC3lAS0elqA4DEIydtGtu+F/mXntcRy85aYNt/PB/pn4zKFXcdWS8W3/R bO3Cw== X-Received: by 2002:a17:90b:4c8c:b0:38d:fda6:4873 with SMTP id 98e67ed59e1d1-3958108a4bbmr15623749a91.10.1787197710052; Wed, 19 Aug 2026 20:48:30 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 79/93] disas/riscv: Split xthead_opcode_data Date: Thu, 20 Aug 2026 13:44:16 +1000 Message-ID: <20260820034430.1186695-80-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198294513158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Move the table to riscv-xthead-op.c.inc and massage the lines into OP() form. Drop th.illegal as unused. Return pointers to objects directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-44-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-xthead.c | 481 +++++++++--------------------------- disas/riscv-xthead-op.c.inc | 125 ++++++++++ 2 files changed, 243 insertions(+), 363 deletions(-) create mode 100644 disas/riscv-xthead-op.c.inc diff --git a/disas/riscv-xthead.c b/disas/riscv-xthead.c index fbc96631fd..387c22c869 100644 --- a/disas/riscv-xthead.c +++ b/disas/riscv-xthead.c @@ -8,248 +8,13 @@ #include "disas/riscv.h" #include "disas/riscv-xthead.h" =20 -typedef enum { - /* 0 is reserved for rv_op_illegal. */ - /* XTheadBa */ - rv_op_th_addsl =3D 1, - /* XTheadBb */ - rv_op_th_srri, - rv_op_th_srriw, - rv_op_th_ext, - rv_op_th_extu, - rv_op_th_ff0, - rv_op_th_ff1, - rv_op_th_rev, - rv_op_th_revw, - rv_op_th_tstnbz, - /* XTheadBs */ - rv_op_th_tst, - /* XTheadCmo */ - rv_op_th_dcache_call, - rv_op_th_dcache_ciall, - rv_op_th_dcache_iall, - rv_op_th_dcache_cpa, - rv_op_th_dcache_cipa, - rv_op_th_dcache_ipa, - rv_op_th_dcache_cva, - rv_op_th_dcache_civa, - rv_op_th_dcache_iva, - rv_op_th_dcache_csw, - rv_op_th_dcache_cisw, - rv_op_th_dcache_isw, - rv_op_th_dcache_cpal1, - rv_op_th_dcache_cval1, - rv_op_th_icache_iall, - rv_op_th_icache_ialls, - rv_op_th_icache_ipa, - rv_op_th_icache_iva, - rv_op_th_l2cache_call, - rv_op_th_l2cache_ciall, - rv_op_th_l2cache_iall, - /* XTheadCondMov */ - rv_op_th_mveqz, - rv_op_th_mvnez, - /* XTheadFMemIdx */ - rv_op_th_flrd, - rv_op_th_flrw, - rv_op_th_flurd, - rv_op_th_flurw, - rv_op_th_fsrd, - rv_op_th_fsrw, - rv_op_th_fsurd, - rv_op_th_fsurw, - /* XTheadFmv */ - rv_op_th_fmv_hw_x, - rv_op_th_fmv_x_hw, - /* XTheadMac */ - rv_op_th_mula, - rv_op_th_mulah, - rv_op_th_mulaw, - rv_op_th_muls, - rv_op_th_mulsw, - rv_op_th_mulsh, - /* XTheadMemIdx */ - rv_op_th_lbia, - rv_op_th_lbib, - rv_op_th_lbuia, - rv_op_th_lbuib, - rv_op_th_lhia, - rv_op_th_lhib, - rv_op_th_lhuia, - rv_op_th_lhuib, - rv_op_th_lwia, - rv_op_th_lwib, - rv_op_th_lwuia, - rv_op_th_lwuib, - rv_op_th_ldia, - rv_op_th_ldib, - rv_op_th_sbia, - rv_op_th_sbib, - rv_op_th_shia, - rv_op_th_shib, - rv_op_th_swia, - rv_op_th_swib, - rv_op_th_sdia, - rv_op_th_sdib, - rv_op_th_lrb, - rv_op_th_lrbu, - rv_op_th_lrh, - rv_op_th_lrhu, - rv_op_th_lrw, - rv_op_th_lrwu, - rv_op_th_lrd, - rv_op_th_srb, - rv_op_th_srh, - rv_op_th_srw, - rv_op_th_srd, - rv_op_th_lurb, - rv_op_th_lurbu, - rv_op_th_lurh, - rv_op_th_lurhu, - rv_op_th_lurw, - rv_op_th_lurwu, - rv_op_th_lurd, - rv_op_th_surb, - rv_op_th_surh, - rv_op_th_surw, - rv_op_th_surd, - /* XTheadMemPair */ - rv_op_th_ldd, - rv_op_th_lwd, - rv_op_th_lwud, - rv_op_th_sdd, - rv_op_th_swd, - /* XTheadSync */ - rv_op_th_sfence_vmas, - rv_op_th_sync, - rv_op_th_sync_i, - rv_op_th_sync_is, - rv_op_th_sync_s, -} rv_xthead_op; - -static const rv_opcode_data xthead_opcode_data[] =3D { - { "th.illegal", rv_codec_illegal, rv_fmt_none }, - /* XTheadBa */ - { "th.addsl", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - /* XTheadBb */ - { "th.srri", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm }, - { "th.srriw", rv_codec_r2_imm5, rv_fmt_rd_rs1_imm }, - { "th.ext", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml }, - { "th.extu", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml }, - { "th.ff0", rv_codec_r2, rv_fmt_rd_rs1 }, - { "th.ff1", rv_codec_r2, rv_fmt_rd_rs1 }, - { "th.rev", rv_codec_r2, rv_fmt_rd_rs1 }, - { "th.revw", rv_codec_r2, rv_fmt_rd_rs1 }, - { "th.tstnbz", rv_codec_r2, rv_fmt_rd_rs1 }, - /* XTheadBs */ - { "th.tst", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm }, - /* XTheadCmo */ - { "th.dcache.call", rv_codec_none, rv_fmt_none }, - { "th.dcache.ciall", rv_codec_none, rv_fmt_none }, - { "th.dcache.iall", rv_codec_none, rv_fmt_none }, - { "th.dcache.cpa", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.cipa", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.ipa", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.cva", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.civa", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.iva", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.csw", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.cisw", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.isw", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.cpal1", rv_codec_r, rv_fmt_rs1 }, - { "th.dcache.cval1", rv_codec_r, rv_fmt_rs1 }, - { "th.icache.iall", rv_codec_none, rv_fmt_none }, - { "th.icache.ialls", rv_codec_none, rv_fmt_none }, - { "th.icache.ipa", rv_codec_r, rv_fmt_rs1 }, - { "th.icache.iva", rv_codec_r, rv_fmt_rs1 }, - { "th.l2cache.call", rv_codec_none, rv_fmt_none }, - { "th.l2cache.ciall", rv_codec_none, rv_fmt_none }, - { "th.l2cache.iall", rv_codec_none, rv_fmt_none }, - /* XTheadCondMov */ - { "th.mveqz", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "th.mvnez", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - /* XTheadFMemIdx */ - { "th.flrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - { "th.flrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - { "th.flurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - { "th.flurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - { "th.fsrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - { "th.fsrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - { "th.fsurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - { "th.fsurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm }, - /* XTheadFmv */ - { "th.fmv.hw.x", rv_codec_r, rv_fmt_rd_frs1 }, - { "th.fmv.x.hw", rv_codec_r, rv_fmt_rd_frs1 }, - /* XTheadMac */ - { "th.mula", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "th.mulaw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "th.mulah", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "th.muls", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "th.mulsw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "th.mulsh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - /* XTheadMemIdx */ - { "th.lbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lbuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lbuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lhia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lhib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lhuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lhuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lwia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lwib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lwuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lwuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.ldia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.ldib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.sbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.sbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.shia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.shib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.swia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.swib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.sdia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.sdib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr }, - { "th.lrb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lrbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lrh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lrhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lrw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lrwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lrd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.srb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.srh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.srw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.srd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lurb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lurbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lurh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lurhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lurw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lurwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.lurd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.surb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.surh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.surw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - { "th.surd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm }, - /* XTheadMemPair */ - { "th.ldd", rv_codec_r_imm2, rv_fmt_rd2_imm }, - { "th.lwd", rv_codec_r_imm2, rv_fmt_rd2_imm }, - { "th.lwud", rv_codec_r_imm2, rv_fmt_rd2_imm }, - { "th.sdd", rv_codec_r_imm2, rv_fmt_rd2_imm }, - { "th.swd", rv_codec_r_imm2, rv_fmt_rd2_imm }, - /* XTheadSync */ - { "th.sfence.vmas", rv_codec_r, rv_fmt_rs1_rs2 }, - { "th.sync", rv_codec_none, rv_fmt_none }, - { "th.sync.i", rv_codec_none, rv_fmt_none }, - { "th.sync.is", rv_codec_none, rv_fmt_none }, - { "th.sync.s", rv_codec_none, rv_fmt_none }, -}; +#define OP(N, ...) static const rv_opcode_data op_##N =3D { __VA_ARGS__ }; +#include "riscv-xthead-op.c.inc" +#undef OP =20 const rv_opcode_data *decode_xtheadba(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -262,7 +27,7 @@ const rv_opcode_data *decode_xtheadba(rv_decode *dec, rv= _isa isa) case 0b0000000: case 0b0000001: case 0b0000010: - case 0b0000011: op =3D rv_op_th_addsl; break; + case 0b0000011: return &op_th_addsl; } break; } @@ -272,13 +37,12 @@ const rv_opcode_data *decode_xtheadba(rv_decode *dec, = rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadbb(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -288,41 +52,41 @@ const rv_opcode_data *decode_xtheadbb(rv_decode *dec, = rv_isa isa) switch ((inst >> 12) & 0b111) { case 1: switch ((inst >> 25) & 0b1111111) { - case 0b0001010: op =3D rv_op_th_srriw; break; + case 0b0001010: return &op_th_srriw; case 0b1000000: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_tstnbz; + return &op_th_tstnbz; } break; case 0b1000001: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_rev; + return &op_th_rev; } break; case 0b1000010: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_ff0; + return &op_th_ff0; } break; case 0b1000011: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_ff1; + return &op_th_ff1; } break; case 0b1000100: case 0b1001000: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_revw; + return &op_th_revw; } break; case 0b0001000: case 0b0001001: - op =3D rv_op_th_srri; + return &op_th_srri; break; } break; - case 2: op =3D rv_op_th_ext; break; - case 3: op =3D rv_op_th_extu; break; + case 2: return &op_th_ext; + case 3: return &op_th_extu; } break; /* custom-0 */ @@ -330,13 +94,12 @@ const rv_opcode_data *decode_xtheadbb(rv_decode *dec, = rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadbs(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -346,7 +109,7 @@ const rv_opcode_data *decode_xtheadbs(rv_decode *dec, r= v_isa isa) switch ((inst >> 12) & 0b111) { case 1: switch ((inst >> 26) & 0b111111) { - case 0b100010: op =3D rv_op_th_tst; break; + case 0b100010: return &op_th_tst; } break; } @@ -356,13 +119,12 @@ const rv_opcode_data *decode_xtheadbs(rv_decode *dec,= rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadcmo(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -374,55 +136,55 @@ const rv_opcode_data *decode_xtheadcmo(rv_decode *dec= , rv_isa isa) switch ((inst >> 20 & 0b111111111111)) { case 0b000000000001: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_dcache_call; + return &op_th_dcache_call; } break; case 0b000000000011: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_dcache_ciall; + return &op_th_dcache_ciall; } break; case 0b000000000010: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_dcache_iall; + return &op_th_dcache_iall; } break; - case 0b000000101001: op =3D rv_op_th_dcache_cpa; break; - case 0b000000101011: op =3D rv_op_th_dcache_cipa; break; - case 0b000000101010: op =3D rv_op_th_dcache_ipa; break; - case 0b000000100101: op =3D rv_op_th_dcache_cva; break; - case 0b000000100111: op =3D rv_op_th_dcache_civa; break; - case 0b000000100110: op =3D rv_op_th_dcache_iva; break; - case 0b000000100001: op =3D rv_op_th_dcache_csw; break; - case 0b000000100011: op =3D rv_op_th_dcache_cisw; break; - case 0b000000100010: op =3D rv_op_th_dcache_isw; break; - case 0b000000101000: op =3D rv_op_th_dcache_cpal1; break; - case 0b000000100100: op =3D rv_op_th_dcache_cval1; break; + case 0b000000101001: return &op_th_dcache_cpa; + case 0b000000101011: return &op_th_dcache_cipa; + case 0b000000101010: return &op_th_dcache_ipa; + case 0b000000100101: return &op_th_dcache_cva; + case 0b000000100111: return &op_th_dcache_civa; + case 0b000000100110: return &op_th_dcache_iva; + case 0b000000100001: return &op_th_dcache_csw; + case 0b000000100011: return &op_th_dcache_cisw; + case 0b000000100010: return &op_th_dcache_isw; + case 0b000000101000: return &op_th_dcache_cpal1; + case 0b000000100100: return &op_th_dcache_cval1; case 0b000000010000: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_icache_iall; + return &op_th_icache_iall; } break; case 0b000000010001: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_icache_ialls; + return &op_th_icache_ialls; } break; - case 0b000000111000: op =3D rv_op_th_icache_ipa; break; - case 0b000000110000: op =3D rv_op_th_icache_iva; break; + case 0b000000111000: return &op_th_icache_ipa; + case 0b000000110000: return &op_th_icache_iva; case 0b000000010101: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_l2cache_call; + return &op_th_l2cache_call; } break; case 0b000000010111: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_l2cache_ciall; + return &op_th_l2cache_ciall; } break; case 0b000000010110: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_l2cache_iall; + return &op_th_l2cache_iall; } break; } @@ -434,13 +196,12 @@ const rv_opcode_data *decode_xtheadcmo(rv_decode *dec= , rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadcondmov(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -450,8 +211,8 @@ const rv_opcode_data *decode_xtheadcondmov(rv_decode *d= ec, rv_isa isa) switch ((inst >> 12) & 0b111) { case 1: switch ((inst >> 25) & 0b1111111) { - case 0b0100000: op =3D rv_op_th_mveqz; break; - case 0b0100001: op =3D rv_op_th_mvnez; break; + case 0b0100000: return &op_th_mveqz; + case 0b0100001: return &op_th_mvnez; } break; } @@ -461,13 +222,12 @@ const rv_opcode_data *decode_xtheadcondmov(rv_decode = *dec, rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadfmemidx(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -477,18 +237,18 @@ const rv_opcode_data *decode_xtheadfmemidx(rv_decode = *dec, rv_isa isa) switch ((inst >> 12) & 0b111) { case 6: switch ((inst >> 27) & 0b11111) { - case 8: op =3D rv_op_th_flrw; break; - case 10: op =3D rv_op_th_flurw; break; - case 12: op =3D rv_op_th_flrd; break; - case 14: op =3D rv_op_th_flurd; break; + case 8: return &op_th_flrw; + case 10: return &op_th_flurw; + case 12: return &op_th_flrd; + case 14: return &op_th_flurd; } break; case 7: switch ((inst >> 27) & 0b11111) { - case 8: op =3D rv_op_th_fsrw; break; - case 10: op =3D rv_op_th_fsurw; break; - case 12: op =3D rv_op_th_fsrd; break; - case 14: op =3D rv_op_th_fsurd; break; + case 8: return &op_th_fsrw; + case 10: return &op_th_fsurw; + case 12: return &op_th_fsrd; + case 14: return &op_th_fsurd; } break; } @@ -498,13 +258,12 @@ const rv_opcode_data *decode_xtheadfmemidx(rv_decode = *dec, rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadfmv(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -516,12 +275,12 @@ const rv_opcode_data *decode_xtheadfmv(rv_decode *dec= , rv_isa isa) switch ((inst >> 25) & 0b1111111) { case 0b1010000: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_fmv_hw_x; + return &op_th_fmv_hw_x; } break; case 0b1100000: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_th_fmv_x_hw; + return &op_th_fmv_x_hw; } break; } @@ -533,13 +292,12 @@ const rv_opcode_data *decode_xtheadfmv(rv_decode *dec= , rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadmac(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -549,12 +307,12 @@ const rv_opcode_data *decode_xtheadmac(rv_decode *dec= , rv_isa isa) switch ((inst >> 12) & 0b111) { case 1: switch ((inst >> 25) & 0b1111111) { - case 0b0010000: op =3D rv_op_th_mula; break; - case 0b0010001: op =3D rv_op_th_muls; break; - case 0b0010010: op =3D rv_op_th_mulaw; break; - case 0b0010011: op =3D rv_op_th_mulsw; break; - case 0b0010100: op =3D rv_op_th_mulah; break; - case 0b0010101: op =3D rv_op_th_mulsh; break; + case 0b0010000: return &op_th_mula; + case 0b0010001: return &op_th_muls; + case 0b0010010: return &op_th_mulaw; + case 0b0010011: return &op_th_mulsw; + case 0b0010100: return &op_th_mulah; + case 0b0010101: return &op_th_mulsh; } break; } @@ -564,13 +322,12 @@ const rv_opcode_data *decode_xtheadmac(rv_decode *dec= , rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadmemidx(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -580,54 +337,54 @@ const rv_opcode_data *decode_xtheadmemidx(rv_decode *= dec, rv_isa isa) switch ((inst >> 12) & 0b111) { case 4: switch ((inst >> 27) & 0b11111) { - case 0: op =3D rv_op_th_lrb; break; - case 1: op =3D rv_op_th_lbib; break; - case 2: op =3D rv_op_th_lurb; break; - case 3: op =3D rv_op_th_lbia; break; - case 4: op =3D rv_op_th_lrh; break; - case 5: op =3D rv_op_th_lhib; break; - case 6: op =3D rv_op_th_lurh; break; - case 7: op =3D rv_op_th_lhia; break; - case 8: op =3D rv_op_th_lrw; break; - case 9: op =3D rv_op_th_lwib; break; - case 10: op =3D rv_op_th_lurw; break; - case 11: op =3D rv_op_th_lwia; break; - case 12: op =3D rv_op_th_lrd; break; - case 13: op =3D rv_op_th_ldib; break; - case 14: op =3D rv_op_th_lurd; break; - case 15: op =3D rv_op_th_ldia; break; - case 16: op =3D rv_op_th_lrbu; break; - case 17: op =3D rv_op_th_lbuib; break; - case 18: op =3D rv_op_th_lurbu; break; - case 19: op =3D rv_op_th_lbuia; break; - case 20: op =3D rv_op_th_lrhu; break; - case 21: op =3D rv_op_th_lhuib; break; - case 22: op =3D rv_op_th_lurhu; break; - case 23: op =3D rv_op_th_lhuia; break; - case 24: op =3D rv_op_th_lrwu; break; - case 25: op =3D rv_op_th_lwuib; break; - case 26: op =3D rv_op_th_lurwu; break; - case 27: op =3D rv_op_th_lwuia; break; + case 0: return &op_th_lrb; + case 1: return &op_th_lbib; + case 2: return &op_th_lurb; + case 3: return &op_th_lbia; + case 4: return &op_th_lrh; + case 5: return &op_th_lhib; + case 6: return &op_th_lurh; + case 7: return &op_th_lhia; + case 8: return &op_th_lrw; + case 9: return &op_th_lwib; + case 10: return &op_th_lurw; + case 11: return &op_th_lwia; + case 12: return &op_th_lrd; + case 13: return &op_th_ldib; + case 14: return &op_th_lurd; + case 15: return &op_th_ldia; + case 16: return &op_th_lrbu; + case 17: return &op_th_lbuib; + case 18: return &op_th_lurbu; + case 19: return &op_th_lbuia; + case 20: return &op_th_lrhu; + case 21: return &op_th_lhuib; + case 22: return &op_th_lurhu; + case 23: return &op_th_lhuia; + case 24: return &op_th_lrwu; + case 25: return &op_th_lwuib; + case 26: return &op_th_lurwu; + case 27: return &op_th_lwuia; } break; case 5: switch ((inst >> 27) & 0b11111) { - case 0: op =3D rv_op_th_srb; break; - case 1: op =3D rv_op_th_sbib; break; - case 2: op =3D rv_op_th_surb; break; - case 3: op =3D rv_op_th_sbia; break; - case 4: op =3D rv_op_th_srh; break; - case 5: op =3D rv_op_th_shib; break; - case 6: op =3D rv_op_th_surh; break; - case 7: op =3D rv_op_th_shia; break; - case 8: op =3D rv_op_th_srw; break; - case 9: op =3D rv_op_th_swib; break; - case 10: op =3D rv_op_th_surw; break; - case 11: op =3D rv_op_th_swia; break; - case 12: op =3D rv_op_th_srd; break; - case 13: op =3D rv_op_th_sdib; break; - case 14: op =3D rv_op_th_surd; break; - case 15: op =3D rv_op_th_sdia; break; + case 0: return &op_th_srb; + case 1: return &op_th_sbib; + case 2: return &op_th_surb; + case 3: return &op_th_sbia; + case 4: return &op_th_srh; + case 5: return &op_th_shib; + case 6: return &op_th_surh; + case 7: return &op_th_shia; + case 8: return &op_th_srw; + case 9: return &op_th_swib; + case 10: return &op_th_surw; + case 11: return &op_th_swia; + case 12: return &op_th_srd; + case 13: return &op_th_sdib; + case 14: return &op_th_surd; + case 15: return &op_th_sdia; } break; break; @@ -638,13 +395,12 @@ const rv_opcode_data *decode_xtheadmemidx(rv_decode *= dec, rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadmempair(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -654,15 +410,15 @@ const rv_opcode_data *decode_xtheadmempair(rv_decode = *dec, rv_isa isa) switch ((inst >> 12) & 0b111) { case 4: switch ((inst >> 27) & 0b11111) { - case 28: op =3D rv_op_th_lwd; break; - case 30: op =3D rv_op_th_lwud; break; - case 31: op =3D rv_op_th_ldd; break; + case 28: return &op_th_lwd; + case 30: return &op_th_lwud; + case 31: return &op_th_ldd; } break; case 5: switch ((inst >> 27) & 0b11111) { - case 28: op =3D rv_op_th_swd; break; - case 31: op =3D rv_op_th_sdd; break; + case 28: return &op_th_swd; + case 31: return &op_th_sdd; } break; } @@ -672,13 +428,12 @@ const rv_opcode_data *decode_xtheadmempair(rv_decode = *dec, rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } =20 const rv_opcode_data *decode_xtheadsync(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch (((inst >> 0) & 0b11)) { case 3: @@ -688,13 +443,13 @@ const rv_opcode_data *decode_xtheadsync(rv_decode *de= c, rv_isa isa) switch ((inst >> 12) & 0b111) { case 0: switch ((inst >> 25) & 0b1111111) { - case 0b0000010: op =3D rv_op_th_sfence_vmas; break; + case 0b0000010: return &op_th_sfence_vmas; case 0b0000000: switch ((inst >> 20) & 0b11111) { - case 0b11000: op =3D rv_op_th_sync; break; - case 0b11010: op =3D rv_op_th_sync_i; break; - case 0b11011: op =3D rv_op_th_sync_is; break; - case 0b11001: op =3D rv_op_th_sync_s; break; + case 0b11000: return &op_th_sync; + case 0b11010: return &op_th_sync_i; + case 0b11011: return &op_th_sync_is; + case 0b11001: return &op_th_sync_s; } break; } @@ -706,5 +461,5 @@ const rv_opcode_data *decode_xtheadsync(rv_decode *dec,= rv_isa isa) break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &xthead_opcode_data[op]; + return NULL; } diff --git a/disas/riscv-xthead-op.c.inc b/disas/riscv-xthead-op.c.inc new file mode 100644 index 0000000000..1e4e0557cd --- /dev/null +++ b/disas/riscv-xthead-op.c.inc @@ -0,0 +1,125 @@ +/* XTheadBa */ +OP(th_addsl, "th.addsl", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) + +/* XTheadBb */ +OP(th_srri, "th.srri", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm) +OP(th_srriw, "th.srriw", rv_codec_r2_imm5, rv_fmt_rd_rs1_imm) +OP(th_ext, "th.ext", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml) +OP(th_extu, "th.extu", rv_codec_r2_immhl, rv_fmt_rd_rs1_immh_imml) +OP(th_ff0, "th.ff0", rv_codec_r2, rv_fmt_rd_rs1) +OP(th_ff1, "th.ff1", rv_codec_r2, rv_fmt_rd_rs1) +OP(th_rev, "th.rev", rv_codec_r2, rv_fmt_rd_rs1) +OP(th_revw, "th.revw", rv_codec_r2, rv_fmt_rd_rs1) +OP(th_tstnbz, "th.tstnbz", rv_codec_r2, rv_fmt_rd_rs1) + +/* XTheadBs */ +OP(th_tst, "th.tst", rv_codec_r2_imm6, rv_fmt_rd_rs1_imm) + +/* XTheadCmo */ +OP(th_dcache_call, "th.dcache.call", rv_codec_none, rv_fmt_none) +OP(th_dcache_ciall, "th.dcache.ciall", rv_codec_none, rv_fmt_none) +OP(th_dcache_iall, "th.dcache.iall", rv_codec_none, rv_fmt_none) +OP(th_dcache_cpa, "th.dcache.cpa", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_cipa, "th.dcache.cipa", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_ipa, "th.dcache.ipa", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_cva, "th.dcache.cva", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_civa, "th.dcache.civa", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_iva, "th.dcache.iva", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_csw, "th.dcache.csw", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_cisw, "th.dcache.cisw", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_isw, "th.dcache.isw", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_cpal1, "th.dcache.cpal1", rv_codec_r, rv_fmt_rs1) +OP(th_dcache_cval1, "th.dcache.cval1", rv_codec_r, rv_fmt_rs1) +OP(th_icache_iall, "th.icache.iall", rv_codec_none, rv_fmt_none) +OP(th_icache_ialls, "th.icache.ialls", rv_codec_none, rv_fmt_none) +OP(th_icache_ipa, "th.icache.ipa", rv_codec_r, rv_fmt_rs1) +OP(th_icache_iva, "th.icache.iva", rv_codec_r, rv_fmt_rs1) +OP(th_l2cache_call, "th.l2cache.call", rv_codec_none, rv_fmt_none) +OP(th_l2cache_ciall, "th.l2cache.ciall", rv_codec_none, rv_fmt_none) +OP(th_l2cache_iall, "th.l2cache.iall", rv_codec_none, rv_fmt_none) + +/* XTheadCondMov */ +OP(th_mveqz, "th.mveqz", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(th_mvnez, "th.mvnez", rv_codec_r, rv_fmt_rd_rs1_rs2) + +/* XTheadFMemIdx */ +OP(th_flrd, "th.flrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) +OP(th_flrw, "th.flrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) +OP(th_flurd, "th.flurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) +OP(th_flurw, "th.flurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) +OP(th_fsrd, "th.fsrd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) +OP(th_fsrw, "th.fsrw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) +OP(th_fsurd, "th.fsurd", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) +OP(th_fsurw, "th.fsurw", rv_codec_r_imm2, rv_fmt_frd_rs1_rs2_imm) + +/* XTheadFmv */ +OP(th_fmv_hw_x, "th.fmv.hw.x", rv_codec_r, rv_fmt_rd_frs1) +OP(th_fmv_x_hw, "th.fmv.x.hw", rv_codec_r, rv_fmt_rd_frs1) + +/* XTheadMac */ +OP(th_mula, "th.mula", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(th_mulaw, "th.mulaw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(th_mulah, "th.mulah", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(th_muls, "th.muls", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(th_mulsw, "th.mulsw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(th_mulsh, "th.mulsh", rv_codec_r, rv_fmt_rd_rs1_rs2) + +/* XTheadMemIdx */ +OP(th_lbia, "th.lbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_lbib, "th.lbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_lbuia, "th.lbuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_ad= dr) +OP(th_lbuib, "th.lbuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_ad= dr) +OP(th_lhia, "th.lhia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_lhib, "th.lhib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_lhuia, "th.lhuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_ad= dr) +OP(th_lhuib, "th.lhuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_ad= dr) +OP(th_lwia, "th.lwia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_lwib, "th.lwib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_lwuia, "th.lwuia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_ad= dr) +OP(th_lwuib, "th.lwuib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_ad= dr) +OP(th_ldia, "th.ldia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_ldib, "th.ldib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_sbia, "th.sbia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_sbib, "th.sbib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_shia, "th.shia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_shib, "th.shib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_swia, "th.swia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_swib, "th.swib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_sdia, "th.sdia", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_sdib, "th.sdib", rv_codec_r2_imm2_imm5, rv_fmt_rd_rs1_immh_imml_addr) +OP(th_lrb, "th.lrb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lrbu, "th.lrbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lrh, "th.lrh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lrhu, "th.lrhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lrw, "th.lrw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lrwu, "th.lrwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lrd, "th.lrd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_srb, "th.srb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_srh, "th.srh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_srw, "th.srw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_srd, "th.srd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lurb, "th.lurb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lurbu, "th.lurbu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lurh, "th.lurh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lurhu, "th.lurhu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lurw, "th.lurw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lurwu, "th.lurwu", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_lurd, "th.lurd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_surb, "th.surb", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_surh, "th.surh", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_surw, "th.surw", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) +OP(th_surd, "th.surd", rv_codec_r_imm2, rv_fmt_rd_rs1_rs2_imm) + +/* XTheadMemPair */ +OP(th_ldd, "th.ldd", rv_codec_r_imm2, rv_fmt_rd2_imm) +OP(th_lwd, "th.lwd", rv_codec_r_imm2, rv_fmt_rd2_imm) +OP(th_lwud, "th.lwud", rv_codec_r_imm2, rv_fmt_rd2_imm) +OP(th_sdd, "th.sdd", rv_codec_r_imm2, rv_fmt_rd2_imm) +OP(th_swd, "th.swd", rv_codec_r_imm2, rv_fmt_rd2_imm) + +/* XTheadSync */ +OP(th_sfence_vmas, "th.sfence.vmas", rv_codec_r, rv_fmt_rs1_rs2) +OP(th_sync, "th.sync", rv_codec_none, rv_fmt_none) +OP(th_sync_i, "th.sync.i", rv_codec_none, rv_fmt_none) +OP(th_sync_is, "th.sync.is", rv_codec_none, rv_fmt_none) +OP(th_sync_s, "th.sync.s", rv_codec_none, rv_fmt_none) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198304; cv=none; d=zohomail.com; s=zohoarc; b=Hl9l+5ZDB9OvnWbixZLEDi8yozy0jRzKfOREv4m7+U+L4kx5k8bpOI1dcJC32heHYouNMF/OsDEJ0CL1Qu83up68h++rqpJhEO/L2S3LejHD2pWWuEDAaKKzXDVK1yJFbVxmV2PotlGz/YnO/NNRUjDeOAy6PHK/IgfBxhwkvTA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198304; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ulC44i9a3xhjyvxxC0pEa6jbGi+BnZcRf4JICqyq4rw=; b=Y5GVGiG5Wz/y5L8xkWYQUWV5G2Iwqyv/CsBVWKXbjGTQ0DnVr+rlBBAry3Dw2OlFRRTUhlyTzUwD5ThONcmeNfayk8SFrSVoeMODLorAvcsh6ObiWiEaME3QJMrOkgmGwFpTNz9iGtiRMFPYZvEVZuXE2kUkDErqpBh1D0BwY44= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198304684709.2572016630089; Wed, 19 Aug 2026 20:58:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlc-0006v6-8g; Wed, 19 Aug 2026 23:48:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlb-0006uV-Dq for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:35 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtla-0004QA-0b for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:35 -0400 Received: by mail-pj1-x1034.google.com with SMTP id 98e67ed59e1d1-38e42560ebcso1543068a91.1 for ; Wed, 19 Aug 2026 20:48:33 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197713; x=1787802513; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=ulC44i9a3xhjyvxxC0pEa6jbGi+BnZcRf4JICqyq4rw=; b=gosLRZ0L3rH9wuHfgGciHIZO0Of0eEDm9ZqrQEgeVttsXiTdwRQReqSq/HbSlafn4k 7m2yA69Wfp9EhiQqCdoRhypCXdLzywr9TTXGwD8lxVxOSaJWP5NyGkIjkUagHHECBvzi hRFJQu3+mQ1lSEkbiLFIV8mz13jos50fgqv1x6vJyiKXDzPwUAvAZ9Gi0dOuHPewx0uT zTGdR0g22ksbqDPb7IMh2nLR9Oir03Rduw8UwNOp7ogT80Pkcb8GIVDiZbBKHcr5RPsw q6/cFT2nkd37o6Jz7rDzaggEdzlLvVApJ3MIuDFCvT99z8a2uA4Zk4pWflmhgH65KAiO U8FQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197713; x=1787802513; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=ulC44i9a3xhjyvxxC0pEa6jbGi+BnZcRf4JICqyq4rw=; b=e2AFXA5rD4nv4VeYCpHRDrR+bSeLRj8/I4VTuuVdcZ5/CqyFdyHDe6ntzZVe4helXD tm99mVKuPZ9bSWGpQOPT5rdrt+m9RMZcRBEarpn8wvNGgchlM7U5vtUdXI9DSmu+ll7U a0cNL3OTzd1TbhsLE3jbM1oBSGlpAdosuFP1aoMyW9cJjv/TUVHcbtVH41yLpKtP++KX aMwGNr16Yeu9ekv47n6qLGWROQb9CWTsRzzJSEEIC37Umg2Kx+fo5raN25QOUQNFfgry MnOx1peOe0JT21Zcbi8ki8vBXanRyNk+PkfTQuXFLz/Q6Yh7KAil+FzhoYqhyBKdKsIP YyTQ== X-Gm-Message-State: AFuF++lAxMfkANqgrk5ZU/1CkcPVs1yTeOABLMsAFAfXUVCmg7+FGRAq EwLLmVgOmbawIqMxhys1d7FlMBZk7n3oMr/SY9cEEnSjVGEiPx1k+jieLB+9ZQ== X-Gm-Gg: AR+sD10vve9BpAd4rEm7j0/NNKHpHtH1L6luBeuXfiFQaI4NiHROZ2EFKSWYYYtURog pO2e9K4H9jw4eNUdifTwPP0segMfd/TuF7an0U4Jt5hSHVz2AvCVuTTqDrZ02YQR+aOmJKUkVtM imc8TyGRK7kbuHl7wtrbSHOYLMiQnr4uc7jFwKv9zbNArBeqdtvxzF6S5BlBYXYUKz8xeoI/IK0 fbWPtsACCkmfFNYNNpYS1edGaes7trEHZeVYR3QOZFmvJCcnaM0USylePNy0h91+mA0C5W6w1Cd izPXsxFLcZhCAJeyDoiBa9MGA9eLG9kaG9ido9qLd7mxSLrguxkuit4LjffQ40wQxCSuIRPbF59 itLzf4aQXQqcGd63HR34FkBp3E2WSExPhZxVE3wcAq58sATqq8vhIrV5X9zBfAJ1lcSvPD9e+UT NNxJnkAoXHRKMEh6J5e3ge6q19Ic2mWwJfp1AqZNDd04xcZtcDRB+65NZRvkqiOE7BjLJlJKPY3 /ixyQ== X-Received: by 2002:a17:90b:6c6:b0:37f:b0a9:1a68 with SMTP id 98e67ed59e1d1-395812a8bd9mr18532756a91.7.1787197712716; Wed, 19 Aug 2026 20:48:32 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 80/93] disas/riscv: Move rv_op_illegal to riscv.c Date: Thu, 20 Aug 2026 13:44:17 +1000 Message-ID: <20260820034430.1186695-81-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198306345158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson illegal is no longer used in other files. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-45-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 4 ---- disas/riscv.c | 2 +- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 241dd47d7f..5ac8c41616 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -200,10 +200,6 @@ typedef struct { uint8_t rlist; } rv_decode; =20 -enum { - rv_op_illegal =3D 0 -}; - /* instruction formats */ =20 #define rv_fmt_none "O\t" diff --git a/disas/riscv.c b/disas/riscv.c index 787340e811..c3a8cde37d 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -29,7 +29,7 @@ #include "disas/riscv-xlrbr.h" =20 typedef enum { - /* 0 is reserved for rv_op_illegal. */ + rv_op_illegal =3D 0, rv_op_lui =3D 1, rv_op_auipc =3D 2, rv_op_jal =3D 3, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198391; cv=none; d=zohomail.com; s=zohoarc; b=gdiU8YgF//JcEMj6o/uy1bEWYldOxma625xb1Zo9MNlVWC+nxAxTKyAJw3UoYhewTq0Hixrltqbid8j6Sh3rF0fCzxhfd9cBjX/Aaa/k4RZLA2BlEviGMOWF2AM+fLTaGo+Hr6m4cumJs6/kWsg9bYZBNLbxzZ+ncL/OmSYWLdg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198391; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Dz35Ajw96jUke/LaXgW6+4pq0SOiz1onnhOikUVBcnw=; b=ah+n1YIVp4567IVnfWICKtoqvLcGV8fYRrcu5KLaBLWg2ykZ1eumjBfVfR4LjLewqXZFHovpDYnDAcZ8k+sly1LOw+h31/4CmfIiuTAcSZaKCjq2JRw3vZAPyXgnRky8goPuwWrx0giDMxOAhHS/Q0jgsi1ceTvad+g/Q7S5yR4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198391902315.9766502427135; Wed, 19 Aug 2026 20:59:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlp-0007EN-DY; Wed, 19 Aug 2026 23:48:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlk-0007Co-Br for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:44 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtle-0004Qg-TN for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:44 -0400 Received: by mail-pj1-x1036.google.com with SMTP id 98e67ed59e1d1-38e041ea211so1773327a91.0 for ; Wed, 19 Aug 2026 20:48:38 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197717; x=1787802517; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Dz35Ajw96jUke/LaXgW6+4pq0SOiz1onnhOikUVBcnw=; b=plsX9WW69+mEZFlUas/QFXHcGqgRxHXQliFXgChMRmz2loBS4xrYVlAQbkD7DAYuCU np8W/yAO30eGK8oIa5cChViqMoXgkjysxJxwNEWymGIIwvnbCAdkvxmn4AXSyGIiPCkD bkJp7et9crQc8LM23aW1nyg3VCO40d0MUUu0uWYKK70ydLnwS0NoAuK9BHQPBCe42NhC NiPL/6NaQVu9LCDwC947iaJ0nOtMcgRJ3HiDmv24UfLJH3vDbOBkAiOwbp47QZVie1zT OFu7VE9wjAeY767UK4JkortnijAfg9x0ujGZ2Isd1oUKZlDZudX09zVEyh+Wk5CpDsoP yGUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197717; x=1787802517; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=Dz35Ajw96jUke/LaXgW6+4pq0SOiz1onnhOikUVBcnw=; b=GgdlNEpYgEwGxhw4jK4LPg3auQRXb0wqwVbtYBqOqvXs/eGL8m1AgRsP1B1+3HZCFd stbngR1bZfqvD9H7eU+NJv+u8HRXxFEoFX55q57aoFp1KQAWa2yNDg4swDNq7nnRc+jl vB0GpERcbXLsUnhkunVx8ttEryT/7HxK7oxdIlwvMXQXrA1SpZss8tkaJWWX9Bk1LP9/ +ZVMCTVubYLtUtMJ2LsblodmFSoE4/wS8k0+VxCm+4soKvUEqDfryVQ7dPefeumWUnRw dVQfcIAWh2RlX6W/HDvxpU9rtVShBHgebjWTWUD8JXdkv7gifDlI0Dvic19vX6UW69WW 491w== X-Gm-Message-State: AFuF++nOPNUV5yY3jQhLeGomeRqD3ggRYolMJCihKSt95vs1rrPh5/3P Wxo26vN2EFETNdIe+L226QUUX0TvvXTlaxEt2a/QrEDl/+r1vW0MD3wOMZOCNA== X-Gm-Gg: AR+sD10XYQ35NJQ/uyQwdf7+B8YEP0jBC6VXilLdSlV2rP1G/aP4CZoCdWYzrq04OJO QjOYlCR0ye6gERcgWqdJGMIvY0O9cJPhGIpu4lYbB0x+PQyYth1iPbpc5tUFixLdkUmcQiiNDab K+QKDmbolFIEskOyBdRaPEp5Zs/vgzQgpQZqNkjxX+sRzpe2Wd7UguDYqcOZSqmPxhc/PDAwLGq 1SjUVOm3ZkeGRoYkKGm7XOtHdqUrtveZlJeVzSvj6FS2XX1vkXi81cm9CEm2rQ7v+wyenre07za DU/QuQ+Eb22uS5ic/gpWe4BHST8XeOS+kT2YqYbkUhA5VvH2OY7gGxQGQ7DR3Sutq7JIDzAxYsf Iv3q1nDvJfgOZf25Ii+4zM3fYh4d+RU+q2hytI96MiynAZwv8D4vlZ82zMuKXB0OeC6QJD14RQK boYpUoiw1ADnvg6tVaqPjThbYFbNnThkr+5TN5Urd9GkqOgSLHqeyh2+VpioRZWKhehCAhEy+ph LlJqQ== X-Received: by 2002:a17:90b:1dd0:b0:395:4e0d:bc60 with SMTP id 98e67ed59e1d1-39580f3bcffmr18380435a91.9.1787197716351; Wed, 19 Aug 2026 20:48:36 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 81/93] disas/riscv: Split out riscv-op.c.inc Date: Thu, 20 Aug 2026 13:44:18 +1000 Message-ID: <20260820034430.1186695-82-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1036.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198392675158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Move rvi_opcode_data to riscv-op.c.inc and massage the lines into OP() form. Unlike other files, keep the enumeration and the table intact for now, but build them both from the same source. Adjust the names of rv_*mop to include _op_ to match the general pattern. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-46-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 1931 +----------------------------------------- disas/riscv-op.c.inc | 958 +++++++++++++++++++++ 2 files changed, 967 insertions(+), 1922 deletions(-) create mode 100644 disas/riscv-op.c.inc diff --git a/disas/riscv.c b/disas/riscv.c index c3a8cde37d..8aaad96bf4 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -29,964 +29,9 @@ #include "disas/riscv-xlrbr.h" =20 typedef enum { - rv_op_illegal =3D 0, - rv_op_lui =3D 1, - rv_op_auipc =3D 2, - rv_op_jal =3D 3, - rv_op_jalr =3D 4, - rv_op_beq =3D 5, - rv_op_bne =3D 6, - rv_op_blt =3D 7, - rv_op_bge =3D 8, - rv_op_bltu =3D 9, - rv_op_bgeu =3D 10, - rv_op_lb =3D 11, - rv_op_lh =3D 12, - rv_op_lw =3D 13, - rv_op_lbu =3D 14, - rv_op_lhu =3D 15, - rv_op_sb =3D 16, - rv_op_sh =3D 17, - rv_op_sw =3D 18, - rv_op_addi =3D 19, - rv_op_slti =3D 20, - rv_op_sltiu =3D 21, - rv_op_xori =3D 22, - rv_op_ori =3D 23, - rv_op_andi =3D 24, - rv_op_slli =3D 25, - rv_op_srli =3D 26, - rv_op_srai =3D 27, - rv_op_add =3D 28, - rv_op_sub =3D 29, - rv_op_sll =3D 30, - rv_op_slt =3D 31, - rv_op_sltu =3D 32, - rv_op_xor =3D 33, - rv_op_srl =3D 34, - rv_op_sra =3D 35, - rv_op_or =3D 36, - rv_op_and =3D 37, - rv_op_fence =3D 38, - rv_op_fence_i =3D 39, - rv_op_lwu =3D 40, - rv_op_ld =3D 41, - rv_op_sd =3D 42, - rv_op_addiw =3D 43, - rv_op_slliw =3D 44, - rv_op_srliw =3D 45, - rv_op_sraiw =3D 46, - rv_op_addw =3D 47, - rv_op_subw =3D 48, - rv_op_sllw =3D 49, - rv_op_srlw =3D 50, - rv_op_sraw =3D 51, - rv_op_ldu =3D 52, - rv_op_lq =3D 53, - rv_op_sq =3D 54, - rv_op_addid =3D 55, - rv_op_sllid =3D 56, - rv_op_srlid =3D 57, - rv_op_sraid =3D 58, - rv_op_addd =3D 59, - rv_op_subd =3D 60, - rv_op_slld =3D 61, - rv_op_srld =3D 62, - rv_op_srad =3D 63, - rv_op_mul =3D 64, - rv_op_mulh =3D 65, - rv_op_mulhsu =3D 66, - rv_op_mulhu =3D 67, - rv_op_div =3D 68, - rv_op_divu =3D 69, - rv_op_rem =3D 70, - rv_op_remu =3D 71, - rv_op_mulw =3D 72, - rv_op_divw =3D 73, - rv_op_divuw =3D 74, - rv_op_remw =3D 75, - rv_op_remuw =3D 76, - rv_op_muld =3D 77, - rv_op_divd =3D 78, - rv_op_divud =3D 79, - rv_op_remd =3D 80, - rv_op_remud =3D 81, - rv_op_lr_w =3D 82, - rv_op_sc_w =3D 83, - rv_op_amoswap_w =3D 84, - rv_op_amoadd_w =3D 85, - rv_op_amoxor_w =3D 86, - rv_op_amoor_w =3D 87, - rv_op_amoand_w =3D 88, - rv_op_amomin_w =3D 89, - rv_op_amomax_w =3D 90, - rv_op_amominu_w =3D 91, - rv_op_amomaxu_w =3D 92, - rv_op_lr_d =3D 93, - rv_op_sc_d =3D 94, - rv_op_amoswap_d =3D 95, - rv_op_amoadd_d =3D 96, - rv_op_amoxor_d =3D 97, - rv_op_amoor_d =3D 98, - rv_op_amoand_d =3D 99, - rv_op_amomin_d =3D 100, - rv_op_amomax_d =3D 101, - rv_op_amominu_d =3D 102, - rv_op_amomaxu_d =3D 103, - rv_op_lr_q =3D 104, - rv_op_sc_q =3D 105, - rv_op_amoswap_q =3D 106, - rv_op_amoadd_q =3D 107, - rv_op_amoxor_q =3D 108, - rv_op_amoor_q =3D 109, - rv_op_amoand_q =3D 110, - rv_op_amomin_q =3D 111, - rv_op_amomax_q =3D 112, - rv_op_amominu_q =3D 113, - rv_op_amomaxu_q =3D 114, - rv_op_ecall =3D 115, - rv_op_ebreak =3D 116, - rv_op_uret =3D 117, - rv_op_sret =3D 118, - rv_op_hret =3D 119, - rv_op_mret =3D 120, - rv_op_dret =3D 121, - rv_op_sfence_vm =3D 122, - rv_op_sfence_vma =3D 123, - rv_op_wfi =3D 124, - rv_op_csrrw =3D 125, - rv_op_csrrs =3D 126, - rv_op_csrrc =3D 127, - rv_op_csrrwi =3D 128, - rv_op_csrrsi =3D 129, - rv_op_csrrci =3D 130, - rv_op_flw =3D 131, - rv_op_fsw =3D 132, - rv_op_fmadd_s =3D 133, - rv_op_fmsub_s =3D 134, - rv_op_fnmsub_s =3D 135, - rv_op_fnmadd_s =3D 136, - rv_op_fadd_s =3D 137, - rv_op_fsub_s =3D 138, - rv_op_fmul_s =3D 139, - rv_op_fdiv_s =3D 140, - rv_op_fsgnj_s =3D 141, - rv_op_fsgnjn_s =3D 142, - rv_op_fsgnjx_s =3D 143, - rv_op_fmin_s =3D 144, - rv_op_fmax_s =3D 145, - rv_op_fsqrt_s =3D 146, - rv_op_fle_s =3D 147, - rv_op_flt_s =3D 148, - rv_op_feq_s =3D 149, - rv_op_fcvt_w_s =3D 150, - rv_op_fcvt_wu_s =3D 151, - rv_op_fcvt_s_w =3D 152, - rv_op_fcvt_s_wu =3D 153, - rv_op_fmv_x_s =3D 154, - rv_op_fclass_s =3D 155, - rv_op_fmv_s_x =3D 156, - rv_op_fcvt_l_s =3D 157, - rv_op_fcvt_lu_s =3D 158, - rv_op_fcvt_s_l =3D 159, - rv_op_fcvt_s_lu =3D 160, - rv_op_fld =3D 161, - rv_op_fsd =3D 162, - rv_op_fmadd_d =3D 163, - rv_op_fmsub_d =3D 164, - rv_op_fnmsub_d =3D 165, - rv_op_fnmadd_d =3D 166, - rv_op_fadd_d =3D 167, - rv_op_fsub_d =3D 168, - rv_op_fmul_d =3D 169, - rv_op_fdiv_d =3D 170, - rv_op_fsgnj_d =3D 171, - rv_op_fsgnjn_d =3D 172, - rv_op_fsgnjx_d =3D 173, - rv_op_fmin_d =3D 174, - rv_op_fmax_d =3D 175, - rv_op_fcvt_s_d =3D 176, - rv_op_fcvt_d_s =3D 177, - rv_op_fsqrt_d =3D 178, - rv_op_fle_d =3D 179, - rv_op_flt_d =3D 180, - rv_op_feq_d =3D 181, - rv_op_fcvt_w_d =3D 182, - rv_op_fcvt_wu_d =3D 183, - rv_op_fcvt_d_w =3D 184, - rv_op_fcvt_d_wu =3D 185, - rv_op_fclass_d =3D 186, - rv_op_fcvt_l_d =3D 187, - rv_op_fcvt_lu_d =3D 188, - rv_op_fmv_x_d =3D 189, - rv_op_fcvt_d_l =3D 190, - rv_op_fcvt_d_lu =3D 191, - rv_op_fmv_d_x =3D 192, - rv_op_flq =3D 193, - rv_op_fsq =3D 194, - rv_op_fmadd_q =3D 195, - rv_op_fmsub_q =3D 196, - rv_op_fnmsub_q =3D 197, - rv_op_fnmadd_q =3D 198, - rv_op_fadd_q =3D 199, - rv_op_fsub_q =3D 200, - rv_op_fmul_q =3D 201, - rv_op_fdiv_q =3D 202, - rv_op_fsgnj_q =3D 203, - rv_op_fsgnjn_q =3D 204, - rv_op_fsgnjx_q =3D 205, - rv_op_fmin_q =3D 206, - rv_op_fmax_q =3D 207, - rv_op_fcvt_s_q =3D 208, - rv_op_fcvt_q_s =3D 209, - rv_op_fcvt_d_q =3D 210, - rv_op_fcvt_q_d =3D 211, - rv_op_fsqrt_q =3D 212, - rv_op_fle_q =3D 213, - rv_op_flt_q =3D 214, - rv_op_feq_q =3D 215, - rv_op_fcvt_w_q =3D 216, - rv_op_fcvt_wu_q =3D 217, - rv_op_fcvt_q_w =3D 218, - rv_op_fcvt_q_wu =3D 219, - rv_op_fclass_q =3D 220, - rv_op_fcvt_l_q =3D 221, - rv_op_fcvt_lu_q =3D 222, - rv_op_fcvt_q_l =3D 223, - rv_op_fcvt_q_lu =3D 224, - rv_op_fmv_x_q =3D 225, - rv_op_fmv_q_x =3D 226, - rv_op_c_addi4spn =3D 227, - rv_op_c_fld =3D 228, - rv_op_c_lw =3D 229, - rv_op_c_flw =3D 230, - rv_op_c_fsd =3D 231, - rv_op_c_sw =3D 232, - rv_op_c_fsw =3D 233, - rv_op_c_addi =3D 235, - rv_op_c_jal =3D 236, - rv_op_c_li =3D 237, - rv_op_c_addi16sp =3D 238, - rv_op_c_lui =3D 239, - rv_op_c_srli =3D 240, - rv_op_c_srai =3D 241, - rv_op_c_andi =3D 242, - rv_op_c_sub =3D 243, - rv_op_c_xor =3D 244, - rv_op_c_or =3D 245, - rv_op_c_and =3D 246, - rv_op_c_subw =3D 247, - rv_op_c_addw =3D 248, - rv_op_c_j =3D 249, - rv_op_c_beqz =3D 250, - rv_op_c_bnez =3D 251, - rv_op_c_slli =3D 252, - rv_op_c_fldsp =3D 253, - rv_op_c_lwsp =3D 254, - rv_op_c_flwsp =3D 255, - rv_op_c_jr =3D 256, - rv_op_c_mv =3D 257, - rv_op_c_ebreak =3D 258, - rv_op_c_jalr =3D 259, - rv_op_c_add =3D 260, - rv_op_c_fsdsp =3D 261, - rv_op_c_swsp =3D 262, - rv_op_c_fswsp =3D 263, - rv_op_c_ld =3D 264, - rv_op_c_sd =3D 265, - rv_op_c_addiw =3D 266, - rv_op_c_ldsp =3D 267, - rv_op_c_sdsp =3D 268, - rv_op_c_lq =3D 269, - rv_op_c_sq =3D 270, - rv_op_c_lqsp =3D 271, - rv_op_c_sqsp =3D 272, - rv_op_nop =3D 273, - rv_op_mv =3D 274, - rv_op_not =3D 275, - rv_op_neg =3D 276, - rv_op_negw =3D 277, - rv_op_sext_w =3D 278, - rv_op_seqz =3D 279, - rv_op_snez =3D 280, - rv_op_sltz =3D 281, - rv_op_sgtz =3D 282, - rv_op_fmv_s =3D 283, - rv_op_fabs_s =3D 284, - rv_op_fneg_s =3D 285, - rv_op_fmv_d =3D 286, - rv_op_fabs_d =3D 287, - rv_op_fneg_d =3D 288, - rv_op_fmv_q =3D 289, - rv_op_fabs_q =3D 290, - rv_op_fneg_q =3D 291, - rv_op_beqz =3D 292, - rv_op_bnez =3D 293, - rv_op_blez =3D 294, - rv_op_bgez =3D 295, - rv_op_bltz =3D 296, - rv_op_bgtz =3D 297, - rv_op_jal_ra =3D 298, - rv_op_jalr_ra =3D 299, - rv_op_j =3D 302, - rv_op_ret =3D 303, - rv_op_jr =3D 304, - rv_op_rdcycle =3D 305, - rv_op_rdtime =3D 306, - rv_op_rdinstret =3D 307, - rv_op_rdcycleh =3D 308, - rv_op_rdtimeh =3D 309, - rv_op_rdinstreth =3D 310, - rv_op_frcsr =3D 311, - rv_op_frrm =3D 312, - rv_op_frflags =3D 313, - rv_op_fscsr =3D 314, - rv_op_fsrm =3D 315, - rv_op_fsflags =3D 316, - rv_op_fsrmi =3D 317, - rv_op_fsflagsi =3D 318, - rv_op_bseti =3D 319, - rv_op_bclri =3D 320, - rv_op_binvi =3D 321, - rv_op_bexti =3D 322, - rv_op_rori =3D 323, - rv_op_clz =3D 324, - rv_op_ctz =3D 325, - rv_op_cpop =3D 326, - rv_op_sext_h =3D 327, - rv_op_sext_b =3D 328, - rv_op_xnor =3D 329, - rv_op_orn =3D 330, - rv_op_andn =3D 331, - rv_op_rol =3D 332, - rv_op_ror =3D 333, - rv_op_sh1add =3D 334, - rv_op_sh2add =3D 335, - rv_op_sh3add =3D 336, - rv_op_sh1add_uw =3D 337, - rv_op_sh2add_uw =3D 338, - rv_op_sh3add_uw =3D 339, - rv_op_clmul =3D 340, - rv_op_clmulr =3D 341, - rv_op_clmulh =3D 342, - rv_op_min =3D 343, - rv_op_minu =3D 344, - rv_op_max =3D 345, - rv_op_maxu =3D 346, - rv_op_clzw =3D 347, - rv_op_ctzw =3D 348, - rv_op_cpopw =3D 349, - rv_op_slli_uw =3D 350, - rv_op_add_uw =3D 351, - rv_op_rolw =3D 352, - rv_op_rorw =3D 353, - rv_op_rev8 =3D 354, - rv_op_zext_h =3D 355, - rv_op_roriw =3D 356, - rv_op_orc_b =3D 357, - rv_op_bset =3D 358, - rv_op_bclr =3D 359, - rv_op_binv =3D 360, - rv_op_bext =3D 361, - rv_op_aes32esmi =3D 362, - rv_op_aes32esi =3D 363, - rv_op_aes32dsmi =3D 364, - rv_op_aes32dsi =3D 365, - rv_op_aes64ks1i =3D 366, - rv_op_aes64ks2 =3D 367, - rv_op_aes64im =3D 368, - rv_op_aes64esm =3D 369, - rv_op_aes64es =3D 370, - rv_op_aes64dsm =3D 371, - rv_op_aes64ds =3D 372, - rv_op_sha256sig0 =3D 373, - rv_op_sha256sig1 =3D 374, - rv_op_sha256sum0 =3D 375, - rv_op_sha256sum1 =3D 376, - rv_op_sha512sig0 =3D 377, - rv_op_sha512sig1 =3D 378, - rv_op_sha512sum0 =3D 379, - rv_op_sha512sum1 =3D 380, - rv_op_sha512sum0r =3D 381, - rv_op_sha512sum1r =3D 382, - rv_op_sha512sig0l =3D 383, - rv_op_sha512sig0h =3D 384, - rv_op_sha512sig1l =3D 385, - rv_op_sha512sig1h =3D 386, - rv_op_sm3p0 =3D 387, - rv_op_sm3p1 =3D 388, - rv_op_sm4ed =3D 389, - rv_op_sm4ks =3D 390, - rv_op_brev8 =3D 391, - rv_op_pack =3D 392, - rv_op_packh =3D 393, - rv_op_packw =3D 394, - rv_op_unzip =3D 395, - rv_op_zip =3D 396, - rv_op_xperm4 =3D 397, - rv_op_xperm8 =3D 398, - rv_op_vle8_v =3D 399, - rv_op_vle16_v =3D 400, - rv_op_vle32_v =3D 401, - rv_op_vle64_v =3D 402, - rv_op_vse8_v =3D 403, - rv_op_vse16_v =3D 404, - rv_op_vse32_v =3D 405, - rv_op_vse64_v =3D 406, - rv_op_vlm_v =3D 407, - rv_op_vsm_v =3D 408, - rv_op_vlse8_v =3D 409, - rv_op_vlse16_v =3D 410, - rv_op_vlse32_v =3D 411, - rv_op_vlse64_v =3D 412, - rv_op_vsse8_v =3D 413, - rv_op_vsse16_v =3D 414, - rv_op_vsse32_v =3D 415, - rv_op_vsse64_v =3D 416, - rv_op_vluxei8_v =3D 417, - rv_op_vluxei16_v =3D 418, - rv_op_vluxei32_v =3D 419, - rv_op_vluxei64_v =3D 420, - rv_op_vloxei8_v =3D 421, - rv_op_vloxei16_v =3D 422, - rv_op_vloxei32_v =3D 423, - rv_op_vloxei64_v =3D 424, - rv_op_vsuxei8_v =3D 425, - rv_op_vsuxei16_v =3D 426, - rv_op_vsuxei32_v =3D 427, - rv_op_vsuxei64_v =3D 428, - rv_op_vsoxei8_v =3D 429, - rv_op_vsoxei16_v =3D 430, - rv_op_vsoxei32_v =3D 431, - rv_op_vsoxei64_v =3D 432, - rv_op_vle8ff_v =3D 433, - rv_op_vle16ff_v =3D 434, - rv_op_vle32ff_v =3D 435, - rv_op_vle64ff_v =3D 436, - rv_op_vl1re8_v =3D 437, - rv_op_vl1re16_v =3D 438, - rv_op_vl1re32_v =3D 439, - rv_op_vl1re64_v =3D 440, - rv_op_vl2re8_v =3D 441, - rv_op_vl2re16_v =3D 442, - rv_op_vl2re32_v =3D 443, - rv_op_vl2re64_v =3D 444, - rv_op_vl4re8_v =3D 445, - rv_op_vl4re16_v =3D 446, - rv_op_vl4re32_v =3D 447, - rv_op_vl4re64_v =3D 448, - rv_op_vl8re8_v =3D 449, - rv_op_vl8re16_v =3D 450, - rv_op_vl8re32_v =3D 451, - rv_op_vl8re64_v =3D 452, - rv_op_vs1r_v =3D 453, - rv_op_vs2r_v =3D 454, - rv_op_vs4r_v =3D 455, - rv_op_vs8r_v =3D 456, - rv_op_vadd_vv =3D 457, - rv_op_vadd_vx =3D 458, - rv_op_vadd_vi =3D 459, - rv_op_vsub_vv =3D 460, - rv_op_vsub_vx =3D 461, - rv_op_vrsub_vx =3D 462, - rv_op_vrsub_vi =3D 463, - rv_op_vwaddu_vv =3D 464, - rv_op_vwaddu_vx =3D 465, - rv_op_vwadd_vv =3D 466, - rv_op_vwadd_vx =3D 467, - rv_op_vwsubu_vv =3D 468, - rv_op_vwsubu_vx =3D 469, - rv_op_vwsub_vv =3D 470, - rv_op_vwsub_vx =3D 471, - rv_op_vwaddu_wv =3D 472, - rv_op_vwaddu_wx =3D 473, - rv_op_vwadd_wv =3D 474, - rv_op_vwadd_wx =3D 475, - rv_op_vwsubu_wv =3D 476, - rv_op_vwsubu_wx =3D 477, - rv_op_vwsub_wv =3D 478, - rv_op_vwsub_wx =3D 479, - rv_op_vadc_vvm =3D 480, - rv_op_vadc_vxm =3D 481, - rv_op_vadc_vim =3D 482, - rv_op_vmadc_vvm =3D 483, - rv_op_vmadc_vxm =3D 484, - rv_op_vmadc_vim =3D 485, - rv_op_vsbc_vvm =3D 486, - rv_op_vsbc_vxm =3D 487, - rv_op_vmsbc_vvm =3D 488, - rv_op_vmsbc_vxm =3D 489, - rv_op_vand_vv =3D 490, - rv_op_vand_vx =3D 491, - rv_op_vand_vi =3D 492, - rv_op_vor_vv =3D 493, - rv_op_vor_vx =3D 494, - rv_op_vor_vi =3D 495, - rv_op_vxor_vv =3D 496, - rv_op_vxor_vx =3D 497, - rv_op_vxor_vi =3D 498, - rv_op_vsll_vv =3D 499, - rv_op_vsll_vx =3D 500, - rv_op_vsll_vi =3D 501, - rv_op_vsrl_vv =3D 502, - rv_op_vsrl_vx =3D 503, - rv_op_vsrl_vi =3D 504, - rv_op_vsra_vv =3D 505, - rv_op_vsra_vx =3D 506, - rv_op_vsra_vi =3D 507, - rv_op_vnsrl_wv =3D 508, - rv_op_vnsrl_wx =3D 509, - rv_op_vnsrl_wi =3D 510, - rv_op_vnsra_wv =3D 511, - rv_op_vnsra_wx =3D 512, - rv_op_vnsra_wi =3D 513, - rv_op_vmseq_vv =3D 514, - rv_op_vmseq_vx =3D 515, - rv_op_vmseq_vi =3D 516, - rv_op_vmsne_vv =3D 517, - rv_op_vmsne_vx =3D 518, - rv_op_vmsne_vi =3D 519, - rv_op_vmsltu_vv =3D 520, - rv_op_vmsltu_vx =3D 521, - rv_op_vmslt_vv =3D 522, - rv_op_vmslt_vx =3D 523, - rv_op_vmsleu_vv =3D 524, - rv_op_vmsleu_vx =3D 525, - rv_op_vmsleu_vi =3D 526, - rv_op_vmsle_vv =3D 527, - rv_op_vmsle_vx =3D 528, - rv_op_vmsle_vi =3D 529, - rv_op_vmsgtu_vx =3D 530, - rv_op_vmsgtu_vi =3D 531, - rv_op_vmsgt_vx =3D 532, - rv_op_vmsgt_vi =3D 533, - rv_op_vminu_vv =3D 534, - rv_op_vminu_vx =3D 535, - rv_op_vmin_vv =3D 536, - rv_op_vmin_vx =3D 537, - rv_op_vmaxu_vv =3D 538, - rv_op_vmaxu_vx =3D 539, - rv_op_vmax_vv =3D 540, - rv_op_vmax_vx =3D 541, - rv_op_vmul_vv =3D 542, - rv_op_vmul_vx =3D 543, - rv_op_vmulh_vv =3D 544, - rv_op_vmulh_vx =3D 545, - rv_op_vmulhu_vv =3D 546, - rv_op_vmulhu_vx =3D 547, - rv_op_vmulhsu_vv =3D 548, - rv_op_vmulhsu_vx =3D 549, - rv_op_vdivu_vv =3D 550, - rv_op_vdivu_vx =3D 551, - rv_op_vdiv_vv =3D 552, - rv_op_vdiv_vx =3D 553, - rv_op_vremu_vv =3D 554, - rv_op_vremu_vx =3D 555, - rv_op_vrem_vv =3D 556, - rv_op_vrem_vx =3D 557, - rv_op_vwmulu_vv =3D 558, - rv_op_vwmulu_vx =3D 559, - rv_op_vwmulsu_vv =3D 560, - rv_op_vwmulsu_vx =3D 561, - rv_op_vwmul_vv =3D 562, - rv_op_vwmul_vx =3D 563, - rv_op_vmacc_vv =3D 564, - rv_op_vmacc_vx =3D 565, - rv_op_vnmsac_vv =3D 566, - rv_op_vnmsac_vx =3D 567, - rv_op_vmadd_vv =3D 568, - rv_op_vmadd_vx =3D 569, - rv_op_vnmsub_vv =3D 570, - rv_op_vnmsub_vx =3D 571, - rv_op_vwmaccu_vv =3D 572, - rv_op_vwmaccu_vx =3D 573, - rv_op_vwmacc_vv =3D 574, - rv_op_vwmacc_vx =3D 575, - rv_op_vwmaccsu_vv =3D 576, - rv_op_vwmaccsu_vx =3D 577, - rv_op_vwmaccus_vx =3D 578, - rv_op_vmv_v_v =3D 579, - rv_op_vmv_v_x =3D 580, - rv_op_vmv_v_i =3D 581, - rv_op_vmerge_vvm =3D 582, - rv_op_vmerge_vxm =3D 583, - rv_op_vmerge_vim =3D 584, - rv_op_vsaddu_vv =3D 585, - rv_op_vsaddu_vx =3D 586, - rv_op_vsaddu_vi =3D 587, - rv_op_vsadd_vv =3D 588, - rv_op_vsadd_vx =3D 589, - rv_op_vsadd_vi =3D 590, - rv_op_vssubu_vv =3D 591, - rv_op_vssubu_vx =3D 592, - rv_op_vssub_vv =3D 593, - rv_op_vssub_vx =3D 594, - rv_op_vaadd_vv =3D 595, - rv_op_vaadd_vx =3D 596, - rv_op_vaaddu_vv =3D 597, - rv_op_vaaddu_vx =3D 598, - rv_op_vasub_vv =3D 599, - rv_op_vasub_vx =3D 600, - rv_op_vasubu_vv =3D 601, - rv_op_vasubu_vx =3D 602, - rv_op_vsmul_vv =3D 603, - rv_op_vsmul_vx =3D 604, - rv_op_vssrl_vv =3D 605, - rv_op_vssrl_vx =3D 606, - rv_op_vssrl_vi =3D 607, - rv_op_vssra_vv =3D 608, - rv_op_vssra_vx =3D 609, - rv_op_vssra_vi =3D 610, - rv_op_vnclipu_wv =3D 611, - rv_op_vnclipu_wx =3D 612, - rv_op_vnclipu_wi =3D 613, - rv_op_vnclip_wv =3D 614, - rv_op_vnclip_wx =3D 615, - rv_op_vnclip_wi =3D 616, - rv_op_vfadd_vv =3D 617, - rv_op_vfadd_vf =3D 618, - rv_op_vfsub_vv =3D 619, - rv_op_vfsub_vf =3D 620, - rv_op_vfrsub_vf =3D 621, - rv_op_vfwadd_vv =3D 622, - rv_op_vfwadd_vf =3D 623, - rv_op_vfwadd_wv =3D 624, - rv_op_vfwadd_wf =3D 625, - rv_op_vfwsub_vv =3D 626, - rv_op_vfwsub_vf =3D 627, - rv_op_vfwsub_wv =3D 628, - rv_op_vfwsub_wf =3D 629, - rv_op_vfmul_vv =3D 630, - rv_op_vfmul_vf =3D 631, - rv_op_vfdiv_vv =3D 632, - rv_op_vfdiv_vf =3D 633, - rv_op_vfrdiv_vf =3D 634, - rv_op_vfwmul_vv =3D 635, - rv_op_vfwmul_vf =3D 636, - rv_op_vfmacc_vv =3D 637, - rv_op_vfmacc_vf =3D 638, - rv_op_vfnmacc_vv =3D 639, - rv_op_vfnmacc_vf =3D 640, - rv_op_vfmsac_vv =3D 641, - rv_op_vfmsac_vf =3D 642, - rv_op_vfnmsac_vv =3D 643, - rv_op_vfnmsac_vf =3D 644, - rv_op_vfmadd_vv =3D 645, - rv_op_vfmadd_vf =3D 646, - rv_op_vfnmadd_vv =3D 647, - rv_op_vfnmadd_vf =3D 648, - rv_op_vfmsub_vv =3D 649, - rv_op_vfmsub_vf =3D 650, - rv_op_vfnmsub_vv =3D 651, - rv_op_vfnmsub_vf =3D 652, - rv_op_vfwmacc_vv =3D 653, - rv_op_vfwmacc_vf =3D 654, - rv_op_vfwnmacc_vv =3D 655, - rv_op_vfwnmacc_vf =3D 656, - rv_op_vfwmsac_vv =3D 657, - rv_op_vfwmsac_vf =3D 658, - rv_op_vfwnmsac_vv =3D 659, - rv_op_vfwnmsac_vf =3D 660, - rv_op_vfsqrt_v =3D 661, - rv_op_vfrsqrt7_v =3D 662, - rv_op_vfrec7_v =3D 663, - rv_op_vfmin_vv =3D 664, - rv_op_vfmin_vf =3D 665, - rv_op_vfmax_vv =3D 666, - rv_op_vfmax_vf =3D 667, - rv_op_vfsgnj_vv =3D 668, - rv_op_vfsgnj_vf =3D 669, - rv_op_vfsgnjn_vv =3D 670, - rv_op_vfsgnjn_vf =3D 671, - rv_op_vfsgnjx_vv =3D 672, - rv_op_vfsgnjx_vf =3D 673, - rv_op_vfslide1up_vf =3D 674, - rv_op_vfslide1down_vf =3D 675, - rv_op_vmfeq_vv =3D 676, - rv_op_vmfeq_vf =3D 677, - rv_op_vmfne_vv =3D 678, - rv_op_vmfne_vf =3D 679, - rv_op_vmflt_vv =3D 680, - rv_op_vmflt_vf =3D 681, - rv_op_vmfle_vv =3D 682, - rv_op_vmfle_vf =3D 683, - rv_op_vmfgt_vf =3D 684, - rv_op_vmfge_vf =3D 685, - rv_op_vfclass_v =3D 686, - rv_op_vfmerge_vfm =3D 687, - rv_op_vfmv_v_f =3D 688, - rv_op_vfcvt_xu_f_v =3D 689, - rv_op_vfcvt_x_f_v =3D 690, - rv_op_vfcvt_f_xu_v =3D 691, - rv_op_vfcvt_f_x_v =3D 692, - rv_op_vfcvt_rtz_xu_f_v =3D 693, - rv_op_vfcvt_rtz_x_f_v =3D 694, - rv_op_vfwcvt_xu_f_v =3D 695, - rv_op_vfwcvt_x_f_v =3D 696, - rv_op_vfwcvt_f_xu_v =3D 697, - rv_op_vfwcvt_f_x_v =3D 698, - rv_op_vfwcvt_f_f_v =3D 699, - rv_op_vfwcvt_rtz_xu_f_v =3D 700, - rv_op_vfwcvt_rtz_x_f_v =3D 701, - rv_op_vfncvt_xu_f_w =3D 702, - rv_op_vfncvt_x_f_w =3D 703, - rv_op_vfncvt_f_xu_w =3D 704, - rv_op_vfncvt_f_x_w =3D 705, - rv_op_vfncvt_f_f_w =3D 706, - rv_op_vfncvt_rod_f_f_w =3D 707, - rv_op_vfncvt_rtz_xu_f_w =3D 708, - rv_op_vfncvt_rtz_x_f_w =3D 709, - rv_op_vredsum_vs =3D 710, - rv_op_vredand_vs =3D 711, - rv_op_vredor_vs =3D 712, - rv_op_vredxor_vs =3D 713, - rv_op_vredminu_vs =3D 714, - rv_op_vredmin_vs =3D 715, - rv_op_vredmaxu_vs =3D 716, - rv_op_vredmax_vs =3D 717, - rv_op_vwredsumu_vs =3D 718, - rv_op_vwredsum_vs =3D 719, - rv_op_vfredusum_vs =3D 720, - rv_op_vfredosum_vs =3D 721, - rv_op_vfredmin_vs =3D 722, - rv_op_vfredmax_vs =3D 723, - rv_op_vfwredusum_vs =3D 724, - rv_op_vfwredosum_vs =3D 725, - rv_op_vmand_mm =3D 726, - rv_op_vmnand_mm =3D 727, - rv_op_vmandn_mm =3D 728, - rv_op_vmxor_mm =3D 729, - rv_op_vmor_mm =3D 730, - rv_op_vmnor_mm =3D 731, - rv_op_vmorn_mm =3D 732, - rv_op_vmxnor_mm =3D 733, - rv_op_vcpop_m =3D 734, - rv_op_vfirst_m =3D 735, - rv_op_vmsbf_m =3D 736, - rv_op_vmsif_m =3D 737, - rv_op_vmsof_m =3D 738, - rv_op_viota_m =3D 739, - rv_op_vid_v =3D 740, - rv_op_vmv_x_s =3D 741, - rv_op_vmv_s_x =3D 742, - rv_op_vfmv_f_s =3D 743, - rv_op_vfmv_s_f =3D 744, - rv_op_vslideup_vx =3D 745, - rv_op_vslideup_vi =3D 746, - rv_op_vslide1up_vx =3D 747, - rv_op_vslidedown_vx =3D 748, - rv_op_vslidedown_vi =3D 749, - rv_op_vslide1down_vx =3D 750, - rv_op_vrgather_vv =3D 751, - rv_op_vrgatherei16_vv =3D 752, - rv_op_vrgather_vx =3D 753, - rv_op_vrgather_vi =3D 754, - rv_op_vcompress_vm =3D 755, - rv_op_vmv1r_v =3D 756, - rv_op_vmv2r_v =3D 757, - rv_op_vmv4r_v =3D 758, - rv_op_vmv8r_v =3D 759, - rv_op_vzext_vf2 =3D 760, - rv_op_vzext_vf4 =3D 761, - rv_op_vzext_vf8 =3D 762, - rv_op_vsext_vf2 =3D 763, - rv_op_vsext_vf4 =3D 764, - rv_op_vsext_vf8 =3D 765, - rv_op_vsetvli =3D 766, - rv_op_vsetivli =3D 767, - rv_op_vsetvl =3D 768, - rv_op_c_zext_b =3D 769, - rv_op_c_sext_b =3D 770, - rv_op_c_zext_h =3D 771, - rv_op_c_sext_h =3D 772, - rv_op_c_zext_w =3D 773, - rv_op_c_not =3D 774, - rv_op_c_mul =3D 775, - rv_op_c_lbu =3D 776, - rv_op_c_lhu =3D 777, - rv_op_c_lh =3D 778, - rv_op_c_sb =3D 779, - rv_op_c_sh =3D 780, - rv_op_cm_push =3D 781, - rv_op_cm_pop =3D 782, - rv_op_cm_popret =3D 783, - rv_op_cm_popretz =3D 784, - rv_op_cm_mva01s =3D 785, - rv_op_cm_mvsa01 =3D 786, - rv_op_cm_jt =3D 787, - rv_op_cm_jalt =3D 788, - rv_op_czero_eqz =3D 789, - rv_op_czero_nez =3D 790, - rv_op_fcvt_bf16_s =3D 791, - rv_op_fcvt_s_bf16 =3D 792, - rv_op_vfncvtbf16_f_f_w =3D 793, - rv_op_vfwcvtbf16_f_f_v =3D 794, - rv_op_vfwmaccbf16_vv =3D 795, - rv_op_vfwmaccbf16_vf =3D 796, - rv_op_flh =3D 797, - rv_op_fsh =3D 798, - rv_op_fmv_h_x =3D 799, - rv_op_fmv_x_h =3D 800, - rv_op_fli_s =3D 801, - rv_op_fli_d =3D 802, - rv_op_fli_q =3D 803, - rv_op_fli_h =3D 804, - rv_op_fminm_s =3D 805, - rv_op_fmaxm_s =3D 806, - rv_op_fminm_d =3D 807, - rv_op_fmaxm_d =3D 808, - rv_op_fminm_q =3D 809, - rv_op_fmaxm_q =3D 810, - rv_op_fminm_h =3D 811, - rv_op_fmaxm_h =3D 812, - rv_op_fround_s =3D 813, - rv_op_froundnx_s =3D 814, - rv_op_fround_d =3D 815, - rv_op_froundnx_d =3D 816, - rv_op_fround_q =3D 817, - rv_op_froundnx_q =3D 818, - rv_op_fround_h =3D 819, - rv_op_froundnx_h =3D 820, - rv_op_fcvtmod_w_d =3D 821, - rv_op_fmvh_x_d =3D 822, - rv_op_fmvp_d_x =3D 823, - rv_op_fmvh_x_q =3D 824, - rv_op_fmvp_q_x =3D 825, - rv_op_fleq_s =3D 826, - rv_op_fltq_s =3D 827, - rv_op_fleq_d =3D 828, - rv_op_fltq_d =3D 829, - rv_op_fleq_q =3D 830, - rv_op_fltq_q =3D 831, - rv_op_fleq_h =3D 832, - rv_op_fltq_h =3D 833, - rv_op_vaesdf_vv =3D 834, - rv_op_vaesdf_vs =3D 835, - rv_op_vaesdm_vv =3D 836, - rv_op_vaesdm_vs =3D 837, - rv_op_vaesef_vv =3D 838, - rv_op_vaesef_vs =3D 839, - rv_op_vaesem_vv =3D 840, - rv_op_vaesem_vs =3D 841, - rv_op_vaeskf1_vi =3D 842, - rv_op_vaeskf2_vi =3D 843, - rv_op_vaesz_vs =3D 844, - rv_op_vandn_vv =3D 845, - rv_op_vandn_vx =3D 846, - rv_op_vbrev_v =3D 847, - rv_op_vbrev8_v =3D 848, - rv_op_vclmul_vv =3D 849, - rv_op_vclmul_vx =3D 850, - rv_op_vclmulh_vv =3D 851, - rv_op_vclmulh_vx =3D 852, - rv_op_vclz_v =3D 853, - rv_op_vcpop_v =3D 854, - rv_op_vctz_v =3D 855, - rv_op_vghsh_vv =3D 856, - rv_op_vgmul_vv =3D 857, - rv_op_vrev8_v =3D 858, - rv_op_vrol_vv =3D 859, - rv_op_vrol_vx =3D 860, - rv_op_vror_vv =3D 861, - rv_op_vror_vx =3D 862, - rv_op_vror_vi =3D 863, - rv_op_vsha2ch_vv =3D 864, - rv_op_vsha2cl_vv =3D 865, - rv_op_vsha2ms_vv =3D 866, - rv_op_vsm3c_vi =3D 867, - rv_op_vsm3me_vv =3D 868, - rv_op_vsm4k_vi =3D 869, - rv_op_vsm4r_vv =3D 870, - rv_op_vsm4r_vs =3D 871, - rv_op_vwsll_vv =3D 872, - rv_op_vwsll_vx =3D 873, - rv_op_vwsll_vi =3D 874, - rv_op_amocas_w =3D 875, - rv_op_amocas_d =3D 876, - rv_op_amocas_q =3D 877, - rv_mop_r_0 =3D 878, - rv_mop_r_1 =3D 879, - rv_mop_r_2 =3D 880, - rv_mop_r_3 =3D 881, - rv_mop_r_4 =3D 882, - rv_mop_r_5 =3D 883, - rv_mop_r_6 =3D 884, - rv_mop_r_7 =3D 885, - rv_mop_r_8 =3D 886, - rv_mop_r_9 =3D 887, - rv_mop_r_10 =3D 888, - rv_mop_r_11 =3D 889, - rv_mop_r_12 =3D 890, - rv_mop_r_13 =3D 891, - rv_mop_r_14 =3D 892, - rv_mop_r_15 =3D 893, - rv_mop_r_16 =3D 894, - rv_mop_r_17 =3D 895, - rv_mop_r_18 =3D 896, - rv_mop_r_19 =3D 897, - rv_mop_r_20 =3D 898, - rv_mop_r_21 =3D 899, - rv_mop_r_22 =3D 900, - rv_mop_r_23 =3D 901, - rv_mop_r_24 =3D 902, - rv_mop_r_25 =3D 903, - rv_mop_r_26 =3D 904, - rv_mop_r_27 =3D 905, - rv_mop_r_28 =3D 906, - rv_mop_r_29 =3D 907, - rv_mop_r_30 =3D 908, - rv_mop_r_31 =3D 909, - rv_mop_rr_0 =3D 910, - rv_mop_rr_1 =3D 911, - rv_mop_rr_2 =3D 912, - rv_mop_rr_3 =3D 913, - rv_mop_rr_4 =3D 914, - rv_mop_rr_5 =3D 915, - rv_mop_rr_6 =3D 916, - rv_mop_rr_7 =3D 917, - rv_c_mop_1 =3D 918, - rv_c_mop_3 =3D 919, - rv_c_mop_5 =3D 920, - rv_c_mop_7 =3D 921, - rv_c_mop_9 =3D 922, - rv_c_mop_11 =3D 923, - rv_c_mop_13 =3D 924, - rv_c_mop_15 =3D 925, - rv_op_amoswap_b =3D 926, - rv_op_amoadd_b =3D 927, - rv_op_amoxor_b =3D 928, - rv_op_amoor_b =3D 929, - rv_op_amoand_b =3D 930, - rv_op_amomin_b =3D 931, - rv_op_amomax_b =3D 932, - rv_op_amominu_b =3D 933, - rv_op_amomaxu_b =3D 934, - rv_op_amoswap_h =3D 935, - rv_op_amoadd_h =3D 936, - rv_op_amoxor_h =3D 937, - rv_op_amoor_h =3D 938, - rv_op_amoand_h =3D 939, - rv_op_amomin_h =3D 940, - rv_op_amomax_h =3D 941, - rv_op_amominu_h =3D 942, - rv_op_amomaxu_h =3D 943, - rv_op_amocas_b =3D 944, - rv_op_amocas_h =3D 945, - rv_op_wrs_sto =3D 946, - rv_op_wrs_nto =3D 947, - rv_op_lpad =3D 948, - rv_op_sspush =3D 949, - rv_op_sspopchk =3D 950, - rv_op_ssrdp =3D 951, - rv_op_ssamoswap_w =3D 952, - rv_op_ssamoswap_d =3D 953, - rv_op_c_sspush =3D 954, - rv_op_c_sspopchk =3D 955, - rv_op_cbo_inval =3D 956, - rv_op_cbo_clean =3D 957, - rv_op_cbo_flush =3D 958, - rv_op_cbo_zero =3D 959, - rv_op_mnret =3D 960, +#define OP(N, ...) rv_op_##N, +#include "riscv-op.c.inc" +#undef OP } rv_op; =20 /* register names */ @@ -1601,967 +646,9 @@ static uint32_t operand_lpl(rv_inst inst) /* instruction metadata */ =20 static const rv_opcode_data rvi_opcode_data[] =3D { - { "illegal", rv_codec_none, rv_fmt_none }, - { "lui", rv_codec_u, rv_fmt_rd_uimm }, - { "auipc", rv_codec_u, rv_fmt_rd_uoffset }, - { "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal }, - { "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr }, - { "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq }, - { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne }, - { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt }, - { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge }, - { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset }, - { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset }, - { "lb", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "lh", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "lw", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "lbu", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "lhu", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "sb", rv_codec_s, rv_fmt_rs2_offset_rs1 }, - { "sh", rv_codec_s, rv_fmt_rs2_offset_rs1 }, - { "sw", rv_codec_s, rv_fmt_rs2_offset_rs1 }, - { "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi }, - { "slti", rv_codec_i, rv_fmt_rd_rs1_imm }, - { "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu }, - { "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori }, - { "ori", rv_codec_i, rv_fmt_rd_rs1_imm }, - { "andi", rv_codec_i, rv_fmt_rd_rs1_imm }, - { "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub }, - { "sll", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt }, - { "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu }, - { "xor", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "srl", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sra", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "or", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "and", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "fence", rv_codec_r_f, rv_fmt_pred_succ }, - { "fence.i", rv_codec_none, rv_fmt_none }, - { "lwu", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "ld", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "sd", rv_codec_s, rv_fmt_rs2_offset_rs1 }, - { "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw }, - { "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, - { "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, - { "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, - { "addw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw }, - { "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "ldu", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "lq", rv_codec_i, rv_fmt_rd_offset_rs1 }, - { "sq", rv_codec_s, rv_fmt_rs2_offset_rs1 }, - { "addid", rv_codec_i, rv_fmt_rd_rs1_imm }, - { "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, - { "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, - { "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, - { "addd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "subd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "slld", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "srld", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "srad", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mul", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "div", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "divu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "rem", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "remu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "divw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "remw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "muld", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "divd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "divud", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "remd", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "remud", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1 }, - { "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1 }, - { "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1 }, - { "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "ecall", rv_codec_none, rv_fmt_none }, - { "ebreak", rv_codec_none, rv_fmt_none }, - { "uret", rv_codec_none, rv_fmt_none }, - { "sret", rv_codec_none, rv_fmt_none }, - { "hret", rv_codec_none, rv_fmt_none }, - { "mret", rv_codec_none, rv_fmt_none }, - { "dret", rv_codec_none, rv_fmt_none }, - { "sfence.vm", rv_codec_r, rv_fmt_rs1 }, - { "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2 }, - { "wfi", rv_codec_none, rv_fmt_none }, - { "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, - { "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, - { "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1 }, - { "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, - { "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, - { "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm }, - { "flw", rv_codec_i, rv_fmt_frd_offset_rs1 }, - { "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1 }, - { "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s }, - { "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s }, - { "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s }, - { "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1 }, - { "fclass.s", rv_codec_r, rv_fmt_rd_frs1 }, - { "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1 }, - { "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fld", rv_codec_i, rv_fmt_frd_offset_rs1 }, - { "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1 }, - { "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d }, - { "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d }, - { "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d }, - { "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fclass.d", rv_codec_r, rv_fmt_rd_frs1 }, - { "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1 }, - { "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1 }, - { "flq", rv_codec_i, rv_fmt_frd_offset_rs1 }, - { "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1 }, - { "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3 }, - { "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2 }, - { "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q }, - { "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q }, - { "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q }, - { "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fclass.q", rv_codec_r, rv_fmt_rd_frs1 }, - { "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1 }, - { "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1 }, - { "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1 }, - { "c.addi4spn", rv_codec_ciw_4spn, NULL, DECOMP(rv_op_addi) }, - { "c.fld", rv_codec_cl_ld, NULL, DECOMP(rv_op_fld) }, - { "c.lw", rv_codec_cl_lw, NULL, DECOMP(rv_op_lw) }, - { "c.flw", rv_codec_cl_lw, NULL, DECOMP(rv_op_flw) }, - { "c.fsd", rv_codec_cs_sd, NULL, DECOMP(rv_op_fsd) }, - { "c.sw", rv_codec_cs_sw, NULL, DECOMP(rv_op_sw) }, - { "c.fsw", rv_codec_cs_sw, NULL, DECOMP(rv_op_fsw) }, - { }, - { "c.addi", rv_codec_ci, NULL, DECOMP(rv_op_addi) }, - { "c.jal", rv_codec_cj_jal, NULL, DECOMP(rv_op_jal) }, - { "c.li", rv_codec_ci_li, NULL, DECOMP(rv_op_addi) }, - { "c.addi16sp", rv_codec_ci_16sp, NULL, DECOMP(rv_op_addi) }, - { "c.lui", rv_codec_ci_lui, NULL, DECOMP(rv_op_lui) }, - { "c.srli", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srli) }, - { "c.srai", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srai) }, - { "c.andi", rv_codec_cb_imm, NULL, DECOMP(rv_op_andi) }, - { "c.sub", rv_codec_cs, NULL, DECOMP(rv_op_sub) }, - { "c.xor", rv_codec_cs, NULL, DECOMP(rv_op_xor) }, - { "c.or", rv_codec_cs, NULL, DECOMP(rv_op_or) }, - { "c.and", rv_codec_cs, NULL, DECOMP(rv_op_and) }, - { "c.subw", rv_codec_cs, NULL, DECOMP(rv_op_subw) }, - { "c.addw", rv_codec_cs, NULL, DECOMP(rv_op_addw) }, - { "c.j", rv_codec_cj, NULL, DECOMP(rv_op_j) }, - { "c.beqz", rv_codec_cb, NULL, DECOMP(rv_op_beqz) }, - { "c.bnez", rv_codec_cb, NULL, DECOMP(rv_op_bnez) }, - { "c.slli", rv_codec_ci_sh6, NULL, DECOMP(rv_op_slli) }, - { "c.fldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_fld) }, - { "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_lw) }, - { "c.flwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_flw) }, - { "c.jr", rv_codec_cr_jr, NULL, DECOMP(rv_op_jr) }, - { "c.mv", rv_codec_cr_mv, NULL, DECOMP(rv_op_mv) }, - { "c.ebreak", rv_codec_ci_none, NULL, DECOMP(rv_op_ebreak) }, - { "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(rv_op_jalr) }, - { "c.add", rv_codec_cr, NULL, DECOMP(rv_op_add) }, - { "c.fsdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_fsd) }, - { "c.swsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_sw) }, - { "c.fswsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_fsw) }, - { "c.ld", rv_codec_cl_ld, NULL, DECOMP(rv_op_ld) }, - { "c.sd", rv_codec_cs_sd, NULL, DECOMP(rv_op_sd) }, - { "c.addiw", rv_codec_ci, NULL, DECOMP(rv_op_addiw) }, - { "c.ldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_ld) }, - { "c.sdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_sd) }, - { "c.lq", rv_codec_cl_lq, NULL, DECOMP(rv_op_lq) }, - { "c.sq", rv_codec_cs_sq, NULL, DECOMP(rv_op_sq) }, - { "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(rv_op_lq) }, - { "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(rv_op_sq) }, - { "nop", rv_codec_illegal, rv_fmt_none }, - { "mv", rv_codec_illegal, rv_fmt_rd_rs1, rvcp_mv }, - { "not", rv_codec_illegal, rv_fmt_rd_rs1 }, - { "neg", rv_codec_illegal, rv_fmt_rd_rs2 }, - { "negw", rv_codec_illegal, rv_fmt_rd_rs2 }, - { "sext.w", rv_codec_illegal, rv_fmt_rd_rs1 }, - { "seqz", rv_codec_illegal, rv_fmt_rd_rs1 }, - { "snez", rv_codec_illegal, rv_fmt_rd_rs2 }, - { "sltz", rv_codec_illegal, rv_fmt_rd_rs1 }, - { "sgtz", rv_codec_illegal, rv_fmt_rd_rs2 }, - { "fmv.s", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fabs.s", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fneg.s", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fmv.d", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fabs.d", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fneg.d", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fmv.q", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fabs.q", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "fneg.q", rv_codec_illegal, rv_fmt_frd_frs1 }, - { "beqz", rv_codec_illegal, rv_fmt_rs1_offset }, - { "bnez", rv_codec_illegal, rv_fmt_rs1_offset }, - { "blez", rv_codec_illegal, rv_fmt_rs2_offset }, - { "bgez", rv_codec_illegal, rv_fmt_rs1_offset }, - { "bltz", rv_codec_illegal, rv_fmt_rs1_offset }, - { "bgtz", rv_codec_illegal, rv_fmt_rs2_offset }, - { "jal", rv_codec_illegal, rv_fmt_offset }, /* rv_op_jal_ra */ - { "jalr", rv_codec_illegal, rv_fmt_rs1 }, /* rv_op_jalr_ra */ - { }, - { }, - { "j", rv_codec_illegal, rv_fmt_offset }, - { "ret", rv_codec_illegal, rv_fmt_none }, - { "jr", rv_codec_illegal, rv_fmt_rs1, rvcp_jr }, - { "rdcycle", rv_codec_i_csr, rv_fmt_rd }, - { "rdtime", rv_codec_i_csr, rv_fmt_rd }, - { "rdinstret", rv_codec_i_csr, rv_fmt_rd }, - { "rdcycleh", rv_codec_i_csr, rv_fmt_rd }, - { "rdtimeh", rv_codec_i_csr, rv_fmt_rd }, - { "rdinstreth", rv_codec_i_csr, rv_fmt_rd }, - { "frcsr", rv_codec_i_csr, rv_fmt_rd }, - { "frrm", rv_codec_i_csr, rv_fmt_rd }, - { "frflags", rv_codec_i_csr, rv_fmt_rd }, - { "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1 }, - { "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1 }, - { "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1 }, - { "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm }, - { "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm }, - { "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm }, - { "clz", rv_codec_r, rv_fmt_rd_rs1 }, - { "ctz", rv_codec_r, rv_fmt_rd_rs1 }, - { "cpop", rv_codec_r, rv_fmt_rd_rs1 }, - { "sext.h", rv_codec_r, rv_fmt_rd_rs1 }, - { "sext.b", rv_codec_r, rv_fmt_rd_rs1 }, - { "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "orn", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "andn", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "rol", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "ror", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "min", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "minu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "max", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "clzw", rv_codec_r, rv_fmt_rd_rs1 }, - { "ctzw", rv_codec_r, rv_fmt_rd_rs1 }, - { "cpopw", rv_codec_r, rv_fmt_rd_rs1 }, - { "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm }, - { "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "rev8", rv_codec_r, rv_fmt_rd_rs1 }, - { "zext.h", rv_codec_r, rv_fmt_rd_rs1 }, - { "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm }, - { "orc.b", rv_codec_r, rv_fmt_rd_rs1 }, - { "bset", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "binv", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "bext", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, - { "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, - { "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, - { "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, - { "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum }, - { "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "aes64im", rv_codec_r, rv_fmt_rd_rs1 }, - { "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha256sig0", rv_codec_r, rv_fmt_rd_rs1 }, - { "sha256sig1", rv_codec_r, rv_fmt_rd_rs1 }, - { "sha256sum0", rv_codec_r, rv_fmt_rd_rs1 }, - { "sha256sum1", rv_codec_r, rv_fmt_rd_rs1 }, - { "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "sm3p0", rv_codec_r, rv_fmt_rd_rs1 }, - { "sm3p1", rv_codec_r, rv_fmt_rd_rs1 }, - { "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, - { "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs }, - { "brev8", rv_codec_r, rv_fmt_rd_rs1 }, - { "pack", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "packh", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "packw", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "unzip", rv_codec_r, rv_fmt_rd_rs1 }, - { "zip", rv_codec_r, rv_fmt_rd_rs1 }, - { "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "xperm8", rv_codec_r, rv_fmt_rd_rs1 }, - { "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm }, - { "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm }, - { "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm }, - { "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, - { "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, - { "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl }, - { "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, - { "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, - { "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl }, - { "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, - { "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, - { "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, - { "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, - { "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vsrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vsra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vnsrl.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vnsra.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm }, - { "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1 }, - { "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1 }, - { "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm }, - { "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl }, - { "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl }, - { "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl }, - { "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm }, - { "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vssrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vssra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vnclipu.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vnclip.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm }, - { "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl }, - { "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1 }, - { "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm }, - { "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm }, - { "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vid.v", rv_codec_v_r, rv_fmt_vd_vm }, - { "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2 }, - { "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1 }, - { "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2 }, - { "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1 }, - { "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vslideup.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vslidedown.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vrgather.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, - { "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli }, - { "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli }, - { "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd }, - { "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd }, - { "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd }, - { "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd }, - { "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd }, - { "c.not", rv_codec_zcb_ext, rv_fmt_rd }, - { "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2 }, - { "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst }, - { "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst }, - { "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst }, - { "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst }, - { "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst }, - { "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist }, - { "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist }, - { "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist }, - { "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist }, - { "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2 }, - { "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2 }, - { "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index }, - { "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index }, - { "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "fcvt.bf16.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fcvt.s.bf16", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm }, - { "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm }, - { "flh", rv_codec_i, rv_fmt_frd_offset_rs1 }, - { "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1 }, - { "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1 }, - { "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1 }, - { "fli.s", rv_codec_fli, rv_fmt_fli }, - { "fli.d", rv_codec_fli, rv_fmt_fli }, - { "fli.q", rv_codec_fli, rv_fmt_fli }, - { "fli.h", rv_codec_fli, rv_fmt_fli }, - { "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fmaxm.d", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fmaxm.q", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fminm.h", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2 }, - { "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1 }, - { "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1 }, - { "fmvh.x.d", rv_codec_r, rv_fmt_rd_frs1 }, - { "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2 }, - { "fmvh.x.q", rv_codec_r, rv_fmt_rd_frs1 }, - { "fmvp.q.x", rv_codec_r, rv_fmt_frd_rs1_rs2 }, - { "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2 }, - { "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaesdf.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaesdm.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vaeskf1.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, - { "vaeskf2.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, - { "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vbrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vclmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vclmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vclmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vclmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vclz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vcpop.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vctz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vghsh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, - { "vgmul.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm }, - { "vrol.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vrol.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vror.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vror.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm }, - { "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, - { "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, - { "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, - { "vsm3c.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, - { "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1 }, - { "vsm4k.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm }, - { "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2 }, - { "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm }, - { "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm }, - { "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm }, - { "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "mop.r.0", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.1", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.2", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.3", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.4", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.5", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.6", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.7", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.8", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.9", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.10", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.11", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.12", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.13", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.14", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.15", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.16", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.17", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.18", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.19", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.20", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.21", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.22", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.23", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.24", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.25", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.26", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.27", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.28", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.29", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.30", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.r.31", rv_codec_r, rv_fmt_rd_rs1 }, - { "mop.rr.0", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mop.rr.1", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mop.rr.2", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mop.rr.3", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mop.rr.4", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mop.rr.5", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mop.rr.6", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "mop.rr.7", rv_codec_r, rv_fmt_rd_rs1_rs2 }, - { "c.mop.1", rv_codec_ci_none, rv_fmt_none }, - { "c.mop.3", rv_codec_ci_none, rv_fmt_none }, - { "c.mop.5", rv_codec_ci_none, rv_fmt_none }, - { "c.mop.7", rv_codec_ci_none, rv_fmt_none }, - { "c.mop.9", rv_codec_ci_none, rv_fmt_none }, - { "c.mop.11", rv_codec_ci_none, rv_fmt_none }, - { "c.mop.13", rv_codec_ci_none, rv_fmt_none }, - { "c.mop.15", rv_codec_ci_none, rv_fmt_none }, - { "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoand.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomin.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomax.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amominu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomaxu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoswap.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoadd.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoxor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amoand.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomin.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomax.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amominu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "wrs.sto", rv_codec_none, rv_fmt_none }, - { "wrs.nto", rv_codec_none, rv_fmt_none }, - { "lpad", rv_codec_lp, rv_fmt_imm }, - { "sspush", rv_codec_r, rv_fmt_rs2 }, - { "sspopchk", rv_codec_r, rv_fmt_rs1 }, - { "ssrdp", rv_codec_r, rv_fmt_rd }, - { "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1 }, - { "c.sspush", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspush) }, - { "c.sspopchk", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspopchk) }, - { "cbo.inval", rv_codec_r, rv_fmt_rs1 }, - { "cbo.clean", rv_codec_r, rv_fmt_rs1 }, - { "cbo.flush", rv_codec_r, rv_fmt_rs1 }, - { "cbo.zero", rv_codec_r, rv_fmt_rs1 }, - { "mnret", rv_codec_none, rv_fmt_none }, +#define OP(N, ...) { __VA_ARGS__ }, +#include "riscv-op.c.inc" +#undef OP }; =20 /* CSR names */ @@ -2928,7 +1015,7 @@ static const rv_opcode_data *decode_inst_opcode(rv_de= code *dec, rv_isa isa) (((inst >> 11) & 0b11) =3D=3D 0b0)) { unsigned int cmop_code =3D 0; cmop_code =3D ((inst >> 8) & 0b111); - op =3D rv_c_mop_1 + cmop_code; + op =3D rv_op_c_mop_1 + cmop_code; if (dec->cfg->ext_zicfiss) { op =3D (cmop_code =3D=3D 0) ? rv_op_c_sspush : op; op =3D (cmop_code =3D=3D 2) ? rv_op_c_sspopchk : o= p; @@ -4459,7 +2546,7 @@ static const rv_opcode_data *decode_inst_opcode(rv_de= code *dec, rv_isa isa) 2, 2, extract32(inst, 26,= 2)), 4, 1, extract32(inst, 30, 1)); - op =3D rv_mop_r_0 + imm_mop5; + op =3D rv_op_mop_r_0 + imm_mop5; /* if zicfiss enabled and mop5 is shadow stack */ if (dec->cfg->ext_zicfiss && ((imm_mop5 & 0b11100) =3D=3D 0b11100)) { @@ -4478,7 +2565,7 @@ static const rv_opcode_data *decode_inst_opcode(rv_de= code *dec, rv_isa isa) =3D=3D 0b1000001) { imm_mop3 =3D deposit32(extract32(inst, 26, 2), 2, 1, extract32(inst, 30, 1)); - op =3D rv_mop_rr_0 + imm_mop3; + op =3D rv_op_mop_rr_0 + imm_mop3; /* if zicfiss enabled and mop3 is shadow stack */ if (dec->cfg->ext_zicfiss && ((imm_mop3 & 0b111) =3D=3D 0b111)) { diff --git a/disas/riscv-op.c.inc b/disas/riscv-op.c.inc new file mode 100644 index 0000000000..3fe934688e --- /dev/null +++ b/disas/riscv-op.c.inc @@ -0,0 +1,958 @@ +OP(illegal, "illegal", rv_codec_none, rv_fmt_none) +OP(lui, "lui", rv_codec_u, rv_fmt_rd_uimm) +OP(auipc, "auipc", rv_codec_u, rv_fmt_rd_uoffset) +OP(jal, "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal) +OP(jalr, "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr) +OP(beq, "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq) +OP(bne, "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne) +OP(blt, "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt) +OP(bge, "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge) +OP(bltu, "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset) +OP(bgeu, "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset) +OP(lb, "lb", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lh, "lh", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lw, "lw", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lbu, "lbu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lhu, "lhu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(sb, "sb", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(sh, "sh", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(sw, "sw", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(addi, "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi) +OP(slti, "slti", rv_codec_i, rv_fmt_rd_rs1_imm) +OP(sltiu, "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu) +OP(xori, "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori) +OP(ori, "ori", rv_codec_i, rv_fmt_rd_rs1_imm) +OP(andi, "andi", rv_codec_i, rv_fmt_rd_rs1_imm) +OP(slli, "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(srli, "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(srai, "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(add, "add", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sub, "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub) +OP(sll, "sll", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(slt, "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt) +OP(sltu, "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu) +OP(xor, "xor", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srl, "srl", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sra, "sra", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(or, "or", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(and, "and", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(fence, "fence", rv_codec_r_f, rv_fmt_pred_succ) +OP(fence_i, "fence.i", rv_codec_none, rv_fmt_none) +OP(lwu, "lwu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(ld, "ld", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(sd, "sd", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(addiw, "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw) +OP(slliw, "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(srliw, "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(sraiw, "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(addw, "addw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(subw, "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw) +OP(sllw, "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srlw, "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sraw, "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(ldu, "ldu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lq, "lq", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(sq, "sq", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(addid, "addid", rv_codec_i, rv_fmt_rd_rs1_imm) +OP(sllid, "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(srlid, "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(sraid, "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(addd, "addd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(subd, "subd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(slld, "slld", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srld, "srld", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srad, "srad", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mul, "mul", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulh, "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulhsu, "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulhu, "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(div, "div", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divu, "divu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rem, "rem", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remu, "remu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulw, "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divw, "divw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divuw, "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remw, "remw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remuw, "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(muld, "muld", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divd, "divd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divud, "divud", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remd, "remd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remud, "remud", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(lr_w, "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) +OP(sc_w, "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_w, "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_w, "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_w, "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_w, "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_w, "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_w, "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_w, "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_w, "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_w, "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(lr_d, "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) +OP(sc_d, "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_d, "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_d, "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_d, "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_d, "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_d, "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_d, "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_d, "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_d, "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_d, "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(lr_q, "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) +OP(sc_q, "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_q, "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_q, "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_q, "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_q, "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_q, "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_q, "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_q, "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_q, "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_q, "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(ecall, "ecall", rv_codec_none, rv_fmt_none) +OP(ebreak, "ebreak", rv_codec_none, rv_fmt_none) +OP(uret, "uret", rv_codec_none, rv_fmt_none) +OP(sret, "sret", rv_codec_none, rv_fmt_none) +OP(hret, "hret", rv_codec_none, rv_fmt_none) +OP(mret, "mret", rv_codec_none, rv_fmt_none) +OP(dret, "dret", rv_codec_none, rv_fmt_none) +OP(sfence_vm, "sfence.vm", rv_codec_r, rv_fmt_rs1) +OP(sfence_vma, "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2) +OP(wfi, "wfi", rv_codec_none, rv_fmt_none) +OP(csrrw, "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1) +OP(csrrs, "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1) +OP(csrrc, "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1) +OP(csrrwi, "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm) +OP(csrrsi, "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm) +OP(csrrci, "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm) +OP(flw, "flw", rv_codec_i, rv_fmt_frd_offset_rs1) +OP(fsw, "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(fmadd_s, "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmsub_s, "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmsub_s, "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmadd_s, "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fadd_s, "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsub_s, "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fmul_s, "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fdiv_s, "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsgnj_s, "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s) +OP(fsgnjn_s, "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s) +OP(fsgnjx_s, "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s) +OP(fmin_s, "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmax_s, "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fsqrt_s, "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fle_s, "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(flt_s, "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(feq_s, "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fcvt_w_s, "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_wu_s, "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_s_w, "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_s_wu, "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fmv_x_s, "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1) +OP(fclass_s, "fclass.s", rv_codec_r, rv_fmt_rd_frs1) +OP(fmv_s_x, "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1) +OP(fcvt_l_s, "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_lu_s, "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_s_l, "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_s_lu, "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fld, "fld", rv_codec_i, rv_fmt_frd_offset_rs1) +OP(fsd, "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(fmadd_d, "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmsub_d, "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmsub_d, "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmadd_d, "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fadd_d, "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsub_d, "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fmul_d, "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fdiv_d, "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsgnj_d, "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d) +OP(fsgnjn_d, "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d) +OP(fsgnjx_d, "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d) +OP(fmin_d, "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmax_d, "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fcvt_s_d, "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_d_s, "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fsqrt_d, "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fle_d, "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(flt_d, "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(feq_d, "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fcvt_w_d, "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_wu_d, "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_d_w, "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_d_wu, "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fclass_d, "fclass.d", rv_codec_r, rv_fmt_rd_frs1) +OP(fcvt_l_d, "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_lu_d, "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fmv_x_d, "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1) +OP(fcvt_d_l, "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_d_lu, "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fmv_d_x, "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1) +OP(flq, "flq", rv_codec_i, rv_fmt_frd_offset_rs1) +OP(fsq, "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(fmadd_q, "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmsub_q, "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmsub_q, "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmadd_q, "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fadd_q, "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsub_q, "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fmul_q, "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fdiv_q, "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsgnj_q, "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q) +OP(fsgnjn_q, "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q) +OP(fsgnjx_q, "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q) +OP(fmin_q, "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmax_q, "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fcvt_s_q, "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_q_s, "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_d_q, "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_q_d, "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fsqrt_q, "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fle_q, "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(flt_q, "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(feq_q, "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fcvt_w_q, "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_wu_q, "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_q_w, "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_q_wu, "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fclass_q, "fclass.q", rv_codec_r, rv_fmt_rd_frs1) +OP(fcvt_l_q, "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_lu_q, "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_q_l, "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_q_lu, "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fmv_x_q, "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1) +OP(fmv_q_x, "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1) +OP(c_addi4spn, "c.addi4spn", rv_codec_ciw_4spn, NULL, DECOMP(rv_op_addi)) +OP(c_fld, "c.fld", rv_codec_cl_ld, NULL, DECOMP(rv_op_fld)) +OP(c_lw, "c.lw", rv_codec_cl_lw, NULL, DECOMP(rv_op_lw)) +OP(c_flw, "c.flw", rv_codec_cl_lw, NULL, DECOMP(rv_op_flw)) +OP(c_fsd, "c.fsd", rv_codec_cs_sd, NULL, DECOMP(rv_op_fsd)) +OP(c_sw, "c.sw", rv_codec_cs_sw, NULL, DECOMP(rv_op_sw)) +OP(c_fsw, "c.fsw", rv_codec_cs_sw, NULL, DECOMP(rv_op_fsw)) +OP(c_addi, "c.addi", rv_codec_ci, NULL, DECOMP(rv_op_addi)) +OP(c_jal, "c.jal", rv_codec_cj_jal, NULL, DECOMP(rv_op_jal)) +OP(c_li, "c.li", rv_codec_ci_li, NULL, DECOMP(rv_op_addi)) +OP(c_addi16sp, "c.addi16sp", rv_codec_ci_16sp, NULL, DECOMP(rv_op_addi)) +OP(c_lui, "c.lui", rv_codec_ci_lui, NULL, DECOMP(rv_op_lui)) +OP(c_srli, "c.srli", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srli)) +OP(c_srai, "c.srai", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srai)) +OP(c_andi, "c.andi", rv_codec_cb_imm, NULL, DECOMP(rv_op_andi)) +OP(c_sub, "c.sub", rv_codec_cs, NULL, DECOMP(rv_op_sub)) +OP(c_xor, "c.xor", rv_codec_cs, NULL, DECOMP(rv_op_xor)) +OP(c_or, "c.or", rv_codec_cs, NULL, DECOMP(rv_op_or)) +OP(c_and, "c.and", rv_codec_cs, NULL, DECOMP(rv_op_and)) +OP(c_subw, "c.subw", rv_codec_cs, NULL, DECOMP(rv_op_subw)) +OP(c_addw, "c.addw", rv_codec_cs, NULL, DECOMP(rv_op_addw)) +OP(c_j, "c.j", rv_codec_cj, NULL, DECOMP(rv_op_j)) +OP(c_beqz, "c.beqz", rv_codec_cb, NULL, DECOMP(rv_op_beqz)) +OP(c_bnez, "c.bnez", rv_codec_cb, NULL, DECOMP(rv_op_bnez)) +OP(c_slli, "c.slli", rv_codec_ci_sh6, NULL, DECOMP(rv_op_slli)) +OP(c_fldsp, "c.fldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_fld)) +OP(c_lwsp, "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_lw)) +OP(c_flwsp, "c.flwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_flw)) +OP(c_jr, "c.jr", rv_codec_cr_jr, NULL, DECOMP(rv_op_jr)) +OP(c_mv, "c.mv", rv_codec_cr_mv, NULL, DECOMP(rv_op_mv)) +OP(c_ebreak, "c.ebreak", rv_codec_ci_none, NULL, DECOMP(rv_op_ebreak)) +OP(c_jalr, "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(rv_op_jalr)) +OP(c_add, "c.add", rv_codec_cr, NULL, DECOMP(rv_op_add)) +OP(c_fsdsp, "c.fsdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_fsd)) +OP(c_swsp, "c.swsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_sw)) +OP(c_fswsp, "c.fswsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_fsw)) +OP(c_ld, "c.ld", rv_codec_cl_ld, NULL, DECOMP(rv_op_ld)) +OP(c_sd, "c.sd", rv_codec_cs_sd, NULL, DECOMP(rv_op_sd)) +OP(c_addiw, "c.addiw", rv_codec_ci, NULL, DECOMP(rv_op_addiw)) +OP(c_ldsp, "c.ldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_ld)) +OP(c_sdsp, "c.sdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_sd)) +OP(c_lq, "c.lq", rv_codec_cl_lq, NULL, DECOMP(rv_op_lq)) +OP(c_sq, "c.sq", rv_codec_cs_sq, NULL, DECOMP(rv_op_sq)) +OP(c_lqsp, "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(rv_op_lq)) +OP(c_sqsp, "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(rv_op_sq)) +OP(nop, "nop", rv_codec_illegal, rv_fmt_none) +OP(mv, "mv", rv_codec_illegal, rv_fmt_rd_rs1, rvcp_mv) +OP(not, "not", rv_codec_illegal, rv_fmt_rd_rs1) +OP(neg, "neg", rv_codec_illegal, rv_fmt_rd_rs2) +OP(negw, "negw", rv_codec_illegal, rv_fmt_rd_rs2) +OP(sext_w, "sext.w", rv_codec_illegal, rv_fmt_rd_rs1) +OP(seqz, "seqz", rv_codec_illegal, rv_fmt_rd_rs1) +OP(snez, "snez", rv_codec_illegal, rv_fmt_rd_rs2) +OP(sltz, "sltz", rv_codec_illegal, rv_fmt_rd_rs1) +OP(sgtz, "sgtz", rv_codec_illegal, rv_fmt_rd_rs2) +OP(fmv_s, "fmv.s", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fabs_s, "fabs.s", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fneg_s, "fneg.s", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fmv_d, "fmv.d", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fabs_d, "fabs.d", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fneg_d, "fneg.d", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fmv_q, "fmv.q", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fabs_q, "fabs.q", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fneg_q, "fneg.q", rv_codec_illegal, rv_fmt_frd_frs1) +OP(beqz, "beqz", rv_codec_illegal, rv_fmt_rs1_offset) +OP(bnez, "bnez", rv_codec_illegal, rv_fmt_rs1_offset) +OP(blez, "blez", rv_codec_illegal, rv_fmt_rs2_offset) +OP(bgez, "bgez", rv_codec_illegal, rv_fmt_rs1_offset) +OP(bltz, "bltz", rv_codec_illegal, rv_fmt_rs1_offset) +OP(bgtz, "bgtz", rv_codec_illegal, rv_fmt_rs2_offset) +OP(jal_ra, "jal", rv_codec_illegal, rv_fmt_offset) +OP(jalr_ra, "jalr", rv_codec_illegal, rv_fmt_rs1) +OP(j, "j", rv_codec_illegal, rv_fmt_offset) +OP(ret, "ret", rv_codec_illegal, rv_fmt_none) +OP(jr, "jr", rv_codec_illegal, rv_fmt_rs1, rvcp_jr) +OP(rdcycle, "rdcycle", rv_codec_i_csr, rv_fmt_rd) +OP(rdtime, "rdtime", rv_codec_i_csr, rv_fmt_rd) +OP(rdinstret, "rdinstret", rv_codec_i_csr, rv_fmt_rd) +OP(rdcycleh, "rdcycleh", rv_codec_i_csr, rv_fmt_rd) +OP(rdtimeh, "rdtimeh", rv_codec_i_csr, rv_fmt_rd) +OP(rdinstreth, "rdinstreth", rv_codec_i_csr, rv_fmt_rd) +OP(frcsr, "frcsr", rv_codec_i_csr, rv_fmt_rd) +OP(frrm, "frrm", rv_codec_i_csr, rv_fmt_rd) +OP(frflags, "frflags", rv_codec_i_csr, rv_fmt_rd) +OP(fscsr, "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1) +OP(fsrm, "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1) +OP(fsflags, "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1) +OP(fsrmi, "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm) +OP(fsflagsi, "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm) +OP(bseti, "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(bclri, "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(binvi, "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(bexti, "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(rori, "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(clz, "clz", rv_codec_r, rv_fmt_rd_rs1) +OP(ctz, "ctz", rv_codec_r, rv_fmt_rd_rs1) +OP(cpop, "cpop", rv_codec_r, rv_fmt_rd_rs1) +OP(sext_h, "sext.h", rv_codec_r, rv_fmt_rd_rs1) +OP(sext_b, "sext.b", rv_codec_r, rv_fmt_rd_rs1) +OP(xnor, "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(orn, "orn", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(andn, "andn", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rol, "rol", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(ror, "ror", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh1add, "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh2add, "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh3add, "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh1add_uw, "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh2add_uw, "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh3add_uw, "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(clmul, "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(clmulr, "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(clmulh, "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(min, "min", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(minu, "minu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(max, "max", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(maxu, "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(clzw, "clzw", rv_codec_r, rv_fmt_rd_rs1) +OP(ctzw, "ctzw", rv_codec_r, rv_fmt_rd_rs1) +OP(cpopw, "cpopw", rv_codec_r, rv_fmt_rd_rs1) +OP(slli_uw, "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(add_uw, "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rolw, "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rorw, "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rev8, "rev8", rv_codec_r, rv_fmt_rd_rs1) +OP(zext_h, "zext.h", rv_codec_r, rv_fmt_rd_rs1) +OP(roriw, "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(orc_b, "orc.b", rv_codec_r, rv_fmt_rd_rs1) +OP(bset, "bset", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(bclr, "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(binv, "binv", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(bext, "bext", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes32esmi, "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes32esi, "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes32dsmi, "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes32dsi, "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes64ks1i, "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum) +OP(aes64ks2, "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64im, "aes64im", rv_codec_r, rv_fmt_rd_rs1) +OP(aes64esm, "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64es, "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64dsm, "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64ds, "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha256sig0, "sha256sig0", rv_codec_r, rv_fmt_rd_rs1) +OP(sha256sig1, "sha256sig1", rv_codec_r, rv_fmt_rd_rs1) +OP(sha256sum0, "sha256sum0", rv_codec_r, rv_fmt_rd_rs1) +OP(sha256sum1, "sha256sum1", rv_codec_r, rv_fmt_rd_rs1) +OP(sha512sig0, "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig1, "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum0, "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum1, "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum0r, "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum1r, "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig0l, "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig0h, "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig1l, "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig1h, "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sm3p0, "sm3p0", rv_codec_r, rv_fmt_rd_rs1) +OP(sm3p1, "sm3p1", rv_codec_r, rv_fmt_rd_rs1) +OP(sm4ed, "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(sm4ks, "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(brev8, "brev8", rv_codec_r, rv_fmt_rd_rs1) +OP(pack, "pack", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(packh, "packh", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(packw, "packw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(unzip, "unzip", rv_codec_r, rv_fmt_rd_rs1) +OP(zip, "zip", rv_codec_r, rv_fmt_rd_rs1) +OP(xperm4, "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(xperm8, "xperm8", rv_codec_r, rv_fmt_rd_rs1) +OP(vle8_v, "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle16_v, "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle32_v, "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle64_v, "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vse8_v, "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vse16_v, "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vse32_v, "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vse64_v, "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vlm_v, "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vsm_v, "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vlse8_v, "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vlse16_v, "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vlse32_v, "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vlse64_v, "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vsse8_v, "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vsse16_v, "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vsse32_v, "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vsse64_v, "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vluxei8_v, "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vluxei16_v, "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vluxei32_v, "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vluxei64_v, "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vloxei8_v, "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vloxei16_v, "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vloxei32_v, "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vloxei64_v, "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsuxei8_v, "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsuxei16_v, "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsuxei32_v, "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsuxei64_v, "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsoxei8_v, "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsoxei16_v, "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsoxei32_v, "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsoxei64_v, "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vle8ff_v, "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle16ff_v, "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle32ff_v, "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle64ff_v, "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl1re8_v, "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl1re16_v, "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl1re32_v, "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl1re64_v, "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re8_v, "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re16_v, "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re32_v, "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re64_v, "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re8_v, "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re16_v, "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re32_v, "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re64_v, "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re8_v, "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re16_v, "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re32_v, "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re64_v, "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vs1r_v, "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vs2r_v, "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vs4r_v, "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vs8r_v, "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vadd_vv, "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vadd_vx, "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vadd_vi, "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vsub_vv, "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsub_vx, "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vrsub_vx, "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vrsub_vi, "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vwaddu_vv, "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwaddu_vx, "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwadd_vv, "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwadd_vx, "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsubu_vv, "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsubu_vx, "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsub_vv, "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsub_vx, "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwaddu_wv, "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwaddu_wx, "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwadd_wv, "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwadd_wx, "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsubu_wv, "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsubu_wx, "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsub_wv, "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsub_wx, "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vadc_vvm, "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vadc_vxm, "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vadc_vim, "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) +OP(vmadc_vvm, "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vmadc_vxm, "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vmadc_vim, "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) +OP(vsbc_vvm, "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vsbc_vxm, "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vmsbc_vvm, "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vmsbc_vxm, "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vand_vv, "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vand_vx, "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vand_vi, "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vor_vv, "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vor_vx, "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vor_vi, "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vxor_vv, "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vxor_vx, "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vxor_vi, "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vsll_vv, "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsll_vx, "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsll_vi, "vsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vsrl_vv, "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsrl_vx, "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsrl_vi, "vsrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vsra_vv, "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsra_vx, "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsra_vi, "vsra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnsrl_wv, "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnsrl_wx, "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vnsrl_wi, "vnsrl.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnsra_wv, "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnsra_wx, "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vnsra_wi, "vnsra.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vmseq_vv, "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmseq_vx, "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmseq_vi, "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsne_vv, "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsne_vx, "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsne_vi, "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsltu_vv, "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsltu_vx, "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmslt_vv, "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmslt_vx, "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsleu_vv, "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsleu_vx, "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsleu_vi, "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsle_vv, "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsle_vx, "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsle_vi, "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsgtu_vx, "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsgtu_vi, "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsgt_vx, "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsgt_vi, "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vminu_vv, "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vminu_vx, "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmin_vv, "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmin_vx, "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmaxu_vv, "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmaxu_vx, "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmax_vv, "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmax_vx, "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmul_vv, "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmul_vx, "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmulh_vv, "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmulh_vx, "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmulhu_vv, "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmulhu_vx, "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmulhsu_vv, "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmulhsu_vx, "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vdivu_vv, "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vdivu_vx, "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vdiv_vv, "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vdiv_vx, "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vremu_vv, "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vremu_vx, "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vrem_vv, "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vrem_vx, "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwmulu_vv, "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwmulu_vx, "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwmulsu_vv, "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwmulsu_vx, "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwmul_vv, "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwmul_vx, "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmacc_vv, "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vmacc_vx, "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vnmsac_vv, "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vnmsac_vx, "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vmadd_vv, "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vmadd_vx, "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vnmsub_vv, "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vnmsub_vx, "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmaccu_vv, "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vwmaccu_vx, "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmacc_vv, "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vwmacc_vx, "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmaccsu_vv, "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vwmaccsu_vx, "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmaccus_vx, "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vmv_v_v, "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1) +OP(vmv_v_x, "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1) +OP(vmv_v_i, "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm) +OP(vmerge_vvm, "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vmerge_vxm, "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vmerge_vim, "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) +OP(vsaddu_vv, "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsaddu_vx, "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsaddu_vi, "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vsadd_vv, "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsadd_vx, "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsadd_vi, "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vssubu_vv, "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssubu_vx, "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vssub_vv, "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssub_vx, "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vaadd_vv, "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vaadd_vx, "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vaaddu_vv, "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vaaddu_vx, "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vasub_vv, "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vasub_vx, "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vasubu_vv, "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vasubu_vx, "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsmul_vv, "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsmul_vx, "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vssrl_vv, "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssrl_vx, "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vssrl_vi, "vssrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vssra_vv, "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssra_vx, "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vssra_vi, "vssra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnclipu_wv, "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnclipu_wx, "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vnclipu_wi, "vnclipu.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnclip_wv, "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnclip_wx, "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vnclip_wi, "vnclip.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vfadd_vv, "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfadd_vf, "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsub_vv, "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfsub_vf, "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfrsub_vf, "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwadd_vv, "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwadd_vf, "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwadd_wv, "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwadd_wf, "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwsub_vv, "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwsub_vf, "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwsub_wv, "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwsub_wf, "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfmul_vv, "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfmul_vf, "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfdiv_vv, "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfdiv_vf, "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfrdiv_vf, "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwmul_vv, "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwmul_vf, "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfmacc_vv, "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmacc_vf, "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmacc_vv, "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfnmacc_vf, "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfmsac_vv, "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmsac_vf, "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmsac_vv, "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfnmsac_vf, "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfmadd_vv, "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmadd_vf, "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmadd_vv, "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfnmadd_vf, "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfmsub_vv, "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmsub_vf, "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmsub_vv, "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfnmsub_vf, "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwmacc_vv, "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwmacc_vf, "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwnmacc_vv, "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwnmacc_vf, "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwmsac_vv, "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwmsac_vf, "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwnmsac_vv, "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwnmsac_vf, "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfsqrt_v, "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vfrsqrt7_v, "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vfrec7_v, "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vfmin_vv, "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfmin_vf, "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfmax_vv, "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfmax_vf, "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsgnj_vv, "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfsgnj_vf, "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsgnjn_vv, "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfsgnjn_vf, "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsgnjx_vv, "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfsgnjx_vf, "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfslide1up_vf, "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfslide1down_vf, "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfeq_vv, "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmfeq_vf, "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfne_vv, "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmfne_vf, "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmflt_vv, "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmflt_vf, "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfle_vv, "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmfle_vf, "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfgt_vf, "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfge_vf, "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfclass_v, "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfmerge_vfm, "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl) +OP(vfmv_v_f, "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1) +OP(vfcvt_xu_f_v, "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_x_f_v, "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_f_xu_v, "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_f_x_v, "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_rtz_xu_f_v, "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_rtz_x_f_v, "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_xu_f_v, "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_x_f_v, "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_f_xu_v, "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_f_x_v, "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_f_f_v, "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_rtz_xu_f_v, "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_rtz_x_f_v, "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_xu_f_w, "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_x_f_w, "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_f_xu_w, "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_f_x_w, "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_f_f_w, "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_rod_f_f_w, "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_rtz_xu_f_w, "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_rtz_x_f_w, "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vredsum_vs, "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredand_vs, "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredor_vs, "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredxor_vs, "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredminu_vs, "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredmin_vs, "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredmaxu_vs, "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredmax_vs, "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwredsumu_vs, "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwredsum_vs, "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfredusum_vs, "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfredosum_vs, "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfredmin_vs, "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfredmax_vs, "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwredusum_vs, "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwredosum_vs, "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmand_mm, "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmnand_mm, "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmandn_mm, "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmxor_mm, "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmor_mm, "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmnor_mm, "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmorn_mm, "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmxnor_mm, "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vcpop_m, "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm) +OP(vfirst_m, "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm) +OP(vmsbf_m, "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vmsif_m, "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vmsof_m, "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(viota_m, "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vid_v, "vid.v", rv_codec_v_r, rv_fmt_vd_vm) +OP(vmv_x_s, "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2) +OP(vmv_s_x, "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1) +OP(vfmv_f_s, "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2) +OP(vfmv_s_f, "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1) +OP(vslideup_vx, "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vslideup_vi, "vslideup.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vslide1up_vx, "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vslidedown_vx, "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vslidedown_vi, "vslidedown.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vslide1down_vx, "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vrgather_vv, "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vrgatherei16_vv, "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vrgather_vx, "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vrgather_vi, "vrgather.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vcompress_vm, "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vmv1r_v, "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vmv2r_v, "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vmv4r_v, "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vmv8r_v, "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vzext_vf2, "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vzext_vf4, "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vzext_vf8, "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vsext_vf2, "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vsext_vf4, "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vsext_vf8, "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vsetvli, "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli) +OP(vsetivli, "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli) +OP(vsetvl, "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(c_zext_b, "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_sext_b, "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_zext_h, "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_sext_h, "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_zext_w, "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_not, "c.not", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_mul, "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2) +OP(c_lbu, "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst) +OP(c_lhu, "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) +OP(c_lh, "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) +OP(c_sb, "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst) +OP(c_sh, "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) +OP(cm_push, "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist) +OP(cm_pop, "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) +OP(cm_popret, "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) +OP(cm_popretz, "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) +OP(cm_mva01s, "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2) +OP(cm_mvsa01, "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2) +OP(cm_jt, "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index) +OP(cm_jalt, "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index) +OP(czero_eqz, "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(czero_nez, "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(fcvt_bf16_s, "fcvt.bf16.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_s_bf16, "fcvt.s.bf16", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(vfncvtbf16_f_f_w, "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvtbf16_f_f_v, "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwmaccbf16_vv, "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwmaccbf16_vf, "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(flh, "flh", rv_codec_i, rv_fmt_frd_offset_rs1) +OP(fsh, "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(fmv_h_x, "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1) +OP(fmv_x_h, "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1) +OP(fli_s, "fli.s", rv_codec_fli, rv_fmt_fli) +OP(fli_d, "fli.d", rv_codec_fli, rv_fmt_fli) +OP(fli_q, "fli.q", rv_codec_fli, rv_fmt_fli) +OP(fli_h, "fli.h", rv_codec_fli, rv_fmt_fli) +OP(fminm_s, "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmaxm_s, "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fminm_d, "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmaxm_d, "fmaxm.d", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fminm_q, "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmaxm_q, "fmaxm.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fminm_h, "fminm.h", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmaxm_h, "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fround_s, "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_s, "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fround_d, "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_d, "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fround_q, "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_q, "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fround_h, "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_h, "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvtmod_w_d, "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fmvh_x_d, "fmvh.x.d", rv_codec_r, rv_fmt_rd_frs1) +OP(fmvp_d_x, "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2) +OP(fmvh_x_q, "fmvh.x.q", rv_codec_r, rv_fmt_rd_frs1) +OP(fmvp_q_x, "fmvp.q.x", rv_codec_r, rv_fmt_frd_rs1_rs2) +OP(fleq_s, "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_s, "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fleq_d, "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_d, "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fleq_q, "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_q, "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fleq_h, "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_h, "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(vaesdf_vv, "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesdf_vs, "vaesdf.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesdm_vv, "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesdm_vs, "vaesdm.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesef_vv, "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesef_vs, "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesem_vv, "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesem_vs, "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaeskf1_vi, "vaeskf1.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) +OP(vaeskf2_vi, "vaeskf2.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) +OP(vaesz_vs, "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vandn_vv, "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vandn_vx, "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vbrev_v, "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vbrev8_v, "vbrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vclmul_vv, "vclmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vclmul_vx, "vclmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vclmulh_vv, "vclmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vclmulh_vx, "vclmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vclz_v, "vclz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vcpop_v, "vcpop.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vctz_v, "vctz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vghsh_vv, "vghsh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vgmul_vv, "vgmul.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vrev8_v, "vrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vrol_vv, "vrol.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vrol_vx, "vrol.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vror_vv, "vror.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vror_vx, "vror.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vror_vi, "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm) +OP(vsha2ch_vv, "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vsha2cl_vv, "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vsha2ms_vv, "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vsm3c_vi, "vsm3c.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) +OP(vsm3me_vv, "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vsm4k_vi, "vsm4k.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) +OP(vsm4r_vv, "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vsm4r_vs, "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vwsll_vv, "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsll_vx, "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsll_vi, "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(amocas_w, "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_d, "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_q, "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(mop_r_0, "mop.r.0", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_1, "mop.r.1", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_2, "mop.r.2", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_3, "mop.r.3", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_4, "mop.r.4", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_5, "mop.r.5", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_6, "mop.r.6", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_7, "mop.r.7", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_8, "mop.r.8", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_9, "mop.r.9", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_10, "mop.r.10", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_11, "mop.r.11", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_12, "mop.r.12", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_13, "mop.r.13", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_14, "mop.r.14", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_15, "mop.r.15", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_16, "mop.r.16", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_17, "mop.r.17", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_18, "mop.r.18", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_19, "mop.r.19", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_20, "mop.r.20", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_21, "mop.r.21", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_22, "mop.r.22", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_23, "mop.r.23", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_24, "mop.r.24", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_25, "mop.r.25", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_26, "mop.r.26", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_27, "mop.r.27", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_28, "mop.r.28", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_29, "mop.r.29", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_30, "mop.r.30", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r_31, "mop.r.31", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_rr_0, "mop.rr.0", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr_1, "mop.rr.1", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr_2, "mop.rr.2", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr_3, "mop.rr.3", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr_4, "mop.rr.4", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr_5, "mop.rr.5", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr_6, "mop.rr.6", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr_7, "mop.rr.7", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(c_mop_1, "c.mop.1", rv_codec_ci_none, rv_fmt_none) +OP(c_mop_3, "c.mop.3", rv_codec_ci_none, rv_fmt_none) +OP(c_mop_5, "c.mop.5", rv_codec_ci_none, rv_fmt_none) +OP(c_mop_7, "c.mop.7", rv_codec_ci_none, rv_fmt_none) +OP(c_mop_9, "c.mop.9", rv_codec_ci_none, rv_fmt_none) +OP(c_mop_11, "c.mop.11", rv_codec_ci_none, rv_fmt_none) +OP(c_mop_13, "c.mop.13", rv_codec_ci_none, rv_fmt_none) +OP(c_mop_15, "c.mop.15", rv_codec_ci_none, rv_fmt_none) +OP(amoswap_b, "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_b, "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_b, "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_b, "amoor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_b, "amoand.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_b, "amomin.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_b, "amomax.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_b, "amominu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_b, "amomaxu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_h, "amoswap.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_h, "amoadd.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_h, "amoxor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_h, "amoor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_h, "amoand.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_h, "amomin.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_h, "amomax.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_h, "amominu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_h, "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_b, "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_h, "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(wrs_sto, "wrs.sto", rv_codec_none, rv_fmt_none) +OP(wrs_nto, "wrs.nto", rv_codec_none, rv_fmt_none) +OP(lpad, "lpad", rv_codec_lp, rv_fmt_imm) +OP(sspush, "sspush", rv_codec_r, rv_fmt_rs2) +OP(sspopchk, "sspopchk", rv_codec_r, rv_fmt_rs1) +OP(ssrdp, "ssrdp", rv_codec_r, rv_fmt_rd) +OP(ssamoswap_w, "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(ssamoswap_d, "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(c_sspush, "c.sspush", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspush)) +OP(c_sspopchk, "c.sspopchk", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspopchk= )) +OP(cbo_inval, "cbo.inval", rv_codec_r, rv_fmt_rs1) +OP(cbo_clean, "cbo.clean", rv_codec_r, rv_fmt_rs1) +OP(cbo_flush, "cbo.flush", rv_codec_r, rv_fmt_rs1) +OP(cbo_zero, "cbo.zero", rv_codec_r, rv_fmt_rs1) +OP(mnret, "mnret", rv_codec_none, rv_fmt_none) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198205; cv=none; d=zohomail.com; s=zohoarc; b=jAEoCBokwLnnmcki/t04j3jktYcRR1vdsZbB3FLihgDSJlW49J7lGIgy2LXgbDje/793jAbbx2d+osYvBEYchRQeLHcz2yG4YqrVsL58tqMXZ29kwetIgtSwTPOLaQmhdSadFOndZ6cAp4umv8IvSeCyPp0+dASLSvn1yDn3ujA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198205; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=72GARMzn2bUyBu7BeKAYGflCgKnwtbN6s6HTDCW9QrE=; b=keEMMz8ll3lrbiJLsTDVGQ8hvqudQ0QNPsZCJg0V1/Bgj4s5K2BQ72WwnYLB81FnDTDW+t+xHlzJo0f+E2xAs0dDIR1VeUQvc48QXLO8P1DTJvVMHxrNlfAXuKw7ngXWRjQ+V5Zz+YkwSDCiLYq9DtJNsCnNwdC26hhI0IknH0I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198205891294.9481482865865; Wed, 19 Aug 2026 20:56:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlj-0007Ci-Lk; Wed, 19 Aug 2026 23:48:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtli-0007CD-Lq for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:42 -0400 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlg-0004Qq-Q3 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:42 -0400 Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-2cacb8416a1so15079775ad.1 for ; Wed, 19 Aug 2026 20:48:40 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197719; x=1787802519; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=72GARMzn2bUyBu7BeKAYGflCgKnwtbN6s6HTDCW9QrE=; b=jkE0nxwRXmwl15ftA427Tazzgv2TReZXVkhCdF8T6RDsGJZ44JWW1IjxGH8V7H7gXc KUL8F1ZAOLsug59caLCwYhRiAb5z4koBiLXnzOCWX6BXY1EUS4ASvw9fakqqdep8eG5C CgwAsZgaBMZibtQI9Ranbz+x+bG/lz9VzyA/rjNS52A8uM7OLIiCkvKPWDGKkjRxbYu1 op7MXjOvHLOidLCp5V+YuNla8A+m5NLx8GORBnj09BB8ibZR1kOZsmpZj9tAhy8XKlD6 XgmlCqMd1Ft53cCdeYThNFcCLunezO1lwQBzmRW0LtD1YN4Ucjg9xBsc10TJK5jnjWq+ siOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197719; x=1787802519; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=72GARMzn2bUyBu7BeKAYGflCgKnwtbN6s6HTDCW9QrE=; b=Yg9eqr/vgbZY0UCLDNhfcM+K7AWOK9mUpClzlkSuTnFuN6fhuk72VFYvcwCDbzy6bF d7Cj3HzlYpPaszxXWjtuQ0wc1xGHFUu0Kh9+ZuJZCnM2s1w+/2PZsbGN5Uo751HoaApf zJu482X8DjVJuO7JbizyW7KtJdSwdPEIwZZ1RmP4xxB0uRVecQDE9zCUMTZCl2/ZVsav Dz+wPWjUkcCMNYSPPLsK1BORk1eqBnx2XQbluHvdrnR2A3OfJ+ZuXHezkLWRcgWfYbYy 3KoHHawpoABP3LqhuWwWLwTBz9GHHWoRq6piPWtM4Tm/tvsAg7fqTFrfJSnWYRYtagvO PyZw== X-Gm-Message-State: AFuF++lxbZwwXpAKet0QB7feUKFBe4SzyCRgMwgCwJNMhvJDz20e5Zq6 9vNSQy824Z9SBRUTdRk7FZa+28D/XU2ZsdjCyzB0fx8zy+ACaSKklXt8jQwQ2w== X-Gm-Gg: AR+sD13Rms4/+jJ3e8HHH/slnjHie0Eif3pe356hriiGT6VCATtmhWBzsaAGO2fRenW UpAfVYVSt0QJ2j54zqQ9yzF8UiXk67EP3xRBrb572JIunYFW9c7mnX34gv575IBrtBGITkfEAah wiTekmU1tqTuTlJQJPb13CkulXAvaSEf98pBJ9WKlU5z70n+fczIPZLamuk1jLtb5XCdUMsgSKy ZJFbU+UNKA4/VhyzKOrqcjQx41Eaht5+5OAIf0FWA6MvcKnHb3AQpNLtmcWUEq928eAJuSwNhYK fHziMeAglI8OkChpKXBXT+mNOcqPC4OtkWzE5LBNsUh4qSy+C8xXG+z8Jf+ys38XDRnt7ABfWqz bY8cSrFfBd4hJrjVXoc2K+07mvh2i9ucRYgfQFPxZlmO1oHapbmm2GvPNjbwG+GDZHK390Zbc/c tzViOGzYND8ZrIJW9WrD4q0JyT5CBYisc9lKHUH5PNvaPwRtSWNxJf+1m/4+f/VR6BvxuBwe7TZ 2aqwuB4vvs= X-Received: by 2002:a17:90b:2d05:b0:380:21b7:e727 with SMTP id 98e67ed59e1d1-39581470f03mr18254462a91.14.1787197719254; Wed, 19 Aug 2026 20:48:39 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 82/93] disas/riscv: Merge all mop.r.n to one pattern Date: Thu, 20 Aug 2026 13:44:19 +1000 Message-ID: <20260820034430.1186695-83-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=alistair23@gmail.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198206104158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Avoid performing arithmetic on rv_op_mop_r_0. Treat the 'n' as an immediate. Create a codec and format to match. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-47-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 2 ++ disas/riscv.c | 15 ++++++++++++++- disas/riscv-op.c.inc | 33 +-------------------------------- 3 files changed, 17 insertions(+), 33 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 5ac8c41616..b47a7f0150 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -160,6 +160,7 @@ typedef enum { rv_codec_fli, rv_codec_lp, rv_codec_cmop_ss, + rv_codec_mop_r, } rv_codec; =20 /* structures */ @@ -284,5 +285,6 @@ typedef struct { #define rv_fmt_rd_rs1_immh_imml_addr "O\t0,(1),i,j" #define rv_fmt_rd2_imm "O\t0,2,(1),i" #define rv_fmt_fli "O\t3,h" +#define rv_fmt_mop_r "O.i\t0,1" =20 #endif /* DISAS_RISCV_H */ diff --git a/disas/riscv.c b/disas/riscv.c index 8aaad96bf4..0751f1a841 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -643,6 +643,13 @@ static uint32_t operand_lpl(rv_inst inst) return extract32(inst, 12, 20); } =20 +static uint32_t operand_mop_r_imm(rv_inst inst) +{ + return (extract32(inst, 30, 1) << 4) | + (extract32(inst, 26, 2) << 2) | + extract32(inst, 20, 2); +} + /* instruction metadata */ =20 static const rv_opcode_data rvi_opcode_data[] =3D { @@ -2546,7 +2553,7 @@ static const rv_opcode_data *decode_inst_opcode(rv_de= code *dec, rv_isa isa) 2, 2, extract32(inst, 26,= 2)), 4, 1, extract32(inst, 30, 1)); - op =3D rv_op_mop_r_0 + imm_mop5; + op =3D rv_op_mop_r; /* if zicfiss enabled and mop5 is shadow stack */ if (dec->cfg->ext_zicfiss && ((imm_mop5 & 0b11100) =3D=3D 0b11100)) { @@ -3049,6 +3056,11 @@ static void decode_inst_operands(rv_decode *dec, rv_= isa isa, dec->rs1 =3D dec->rs2 =3D operand_crs1(inst); dec->imm =3D 0; break; + case rv_codec_mop_r: + dec->rd =3D operand_rd(inst); + dec->rs1 =3D operand_rs1(inst); + dec->imm =3D operand_mop_r_imm(inst); + break; default: g_assert_not_reached(); } @@ -3134,6 +3146,7 @@ static GString *format_inst(size_t tab, rv_decode *de= c, g_string_append(buf, op->name); break; case '(': + case '.': case ',': case ')': case '-': diff --git a/disas/riscv-op.c.inc b/disas/riscv-op.c.inc index 3fe934688e..222d249a70 100644 --- a/disas/riscv-op.c.inc +++ b/disas/riscv-op.c.inc @@ -873,38 +873,7 @@ OP(vwsll_vi, "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2= _uimm_vm) OP(amocas_w, "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amocas_d, "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amocas_q, "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(mop_r_0, "mop.r.0", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_1, "mop.r.1", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_2, "mop.r.2", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_3, "mop.r.3", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_4, "mop.r.4", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_5, "mop.r.5", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_6, "mop.r.6", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_7, "mop.r.7", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_8, "mop.r.8", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_9, "mop.r.9", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_10, "mop.r.10", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_11, "mop.r.11", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_12, "mop.r.12", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_13, "mop.r.13", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_14, "mop.r.14", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_15, "mop.r.15", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_16, "mop.r.16", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_17, "mop.r.17", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_18, "mop.r.18", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_19, "mop.r.19", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_20, "mop.r.20", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_21, "mop.r.21", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_22, "mop.r.22", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_23, "mop.r.23", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_24, "mop.r.24", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_25, "mop.r.25", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_26, "mop.r.26", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_27, "mop.r.27", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_28, "mop.r.28", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_29, "mop.r.29", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_30, "mop.r.30", rv_codec_r, rv_fmt_rd_rs1) -OP(mop_r_31, "mop.r.31", rv_codec_r, rv_fmt_rd_rs1) +OP(mop_r, "mop.r", rv_codec_mop_r, rv_fmt_mop_r) OP(mop_rr_0, "mop.rr.0", rv_codec_r, rv_fmt_rd_rs1_rs2) OP(mop_rr_1, "mop.rr.1", rv_codec_r, rv_fmt_rd_rs1_rs2) OP(mop_rr_2, "mop.rr.2", rv_codec_r, rv_fmt_rd_rs1_rs2) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198220; cv=none; d=zohomail.com; s=zohoarc; b=AUgAtEMyVUJctjTGeVSj3u1PZ9N+2320D769NEOLtx7OkK318kjiUPzNVzdVN8sD+E/zJy4UunVeVi9rRqKrdLxuzZozNbHkGxBESER2ZBl5gKg72SzIcM/+KVCLR0MuYwGFnK4MvqXCG7wlt2BVBxN3OLfAQG2mk8aQbizkHLM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198220; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=LfQohlZt640C5GwVV70FzQC1fZ1dLJnvxGCO8xDnz0w=; b=JDa6E+Vs0amkLcjo1uuTHJET0nkG/050Tdin1V1CliLPUHRkPgQmZFJTxEop9SLFEZlTCF8TQj1T781mRyTb+jGQeZmSlYZdoE/C1buqBz85sGhgTnfpNfN4qOedPdTFoJt7PTXmFtUnsnez0CDcP4lVGAtd1mPd2Za1FS+n6xI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198220840413.3884283416429; Wed, 19 Aug 2026 20:57:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtll-0007DX-Hk; Wed, 19 Aug 2026 23:48:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlk-0007D5-U6 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:44 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlj-0004R8-8P for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:44 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-3811f512167so2525135a91.3 for ; Wed, 19 Aug 2026 20:48:42 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197722; x=1787802522; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=LfQohlZt640C5GwVV70FzQC1fZ1dLJnvxGCO8xDnz0w=; b=JAfKJLTS4UyusjZcIDzn7G6xa9LKiW+vCSV7CoECCg3Z/4yF5Ad8jrc6G6tkWrp4tT 934SdjB9cnH/YtHzpsyzMRqntvevc6NMqR3dAg9UdXq5dtDK+4Mrz/OOhkXdRGIYgdXY RScBJysICrtZBxYZ1ZbjWP7WZQ4YD0qLG0QDn2DVjJ2NL+kkReK44U3vA9SBMh+OixzP iXzuauxA9IIDjp+JCOD6Rq1pL12XxTpXJD3Nkdm5C6QYOFvTYF/7PDEbQIT0HFBJWnpu 3MRHXjUNI5TMEyXRvMXyNaIGFFj7SrQcuhHNU+Dj/5CJm+srg6LZHiX4sGPv5xlySrt5 jWrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197722; x=1787802522; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=LfQohlZt640C5GwVV70FzQC1fZ1dLJnvxGCO8xDnz0w=; b=Z2EBgsSGHYo/1hBxbrMqAFwB89hDT94kYFqK3SUl7zOxuPmRaCKB3flf2cXyNoLCin I4T7w/hgJHSjOphUeRgMj8jSpgq2Is77gtEzvRXjziwapBdfVUatIMjOjf2KG+JPYpvZ LvHtxZ93MnSEF1b0imvvfM+rnwGHE48KoEIt8UWLRYLYJWLQlF0viD5NAv7rgcYlTGxc Fp7EpwE6PSvaQSuiwOjV+zvQAKGLUA8wLFkmYmFd4FwcSq08xbIP0u2tE4AcYpFmYArm JVfP+whD05RiweoSgMGnSQnZTjn4+DZ8Btnj+hojas6Jcl32pViRilOE7l1afhdQlyRX 1QFg== X-Gm-Message-State: AFuF++mdbsBZSvqN2zkfQrnGodhcZOcLhaykvh8R1HjVLYMGORqWFEE4 oUfjErde09CvUBmTUDo72XTAZMaj4nXmbauUAcyBfwJm5Z5KyAQFURaSGo1phw== X-Gm-Gg: AR+sD12hIujEHwt/Bnp86Y2vTVhgTq4Ifs4tbI1YLfOyDLypPL+2vvVPpjAofiAy8+A V/yyLU8Njud5JrVTymnCikBICj72S4i6fXUyR0tGQLIy7njzoMBcq8pCD/kohdfVRvp+vSywJeo TYN5vdBRyv3sB7rsM+dYg0QpjC6DYZTyms1JxAMFq1C2h1CDCGLRqll6xd7iGOyl8VSLY9L1+77 Q0udgleglEz7cb40jmxb+iL+Av0YSwWPI+Q8bN+NN1Azgjx1nRkOdFZbvu3cqL/xjXHlPMavBwI S7JLdsGGETvpxIzn6ZsQQwGKiA/Le/sLoPc4eRDtntODNcvA1o+weslqxc+gCp5h4KM1TbA0Ikp e0T5pslGPd7Nfexo1tZ6pl2uK3e2p2SeESHisZNckmRiWcsnEgABUJtrmQPrbEn31J8/c5KOvqa yG3ScydYhIGCfS8XdfQ9K5tqDboai9xCMnQvKilnUFa9rzADh7fRT9FJbK0s7eVZtg/nGCv+kYf 1/2ag== X-Received: by 2002:a17:90b:57e4:b0:383:5a16:bd70 with SMTP id 98e67ed59e1d1-395810f999amr18654315a91.16.1787197721979; Wed, 19 Aug 2026 20:48:41 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 83/93] disas/riscv: Merge all mop.rr.n to one pattern Date: Thu, 20 Aug 2026 13:44:20 +1000 Message-ID: <20260820034430.1186695-84-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198222223158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Avoid performing arithmetic on rv_op_mop_rr_0. Treat the 'n' as an immediate. Create a codec and format to match. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-48-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 2 ++ disas/riscv.c | 13 ++++++++++++- disas/riscv-op.c.inc | 9 +-------- 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index b47a7f0150..47647f750f 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -161,6 +161,7 @@ typedef enum { rv_codec_lp, rv_codec_cmop_ss, rv_codec_mop_r, + rv_codec_mop_rr, } rv_codec; =20 /* structures */ @@ -286,5 +287,6 @@ typedef struct { #define rv_fmt_rd2_imm "O\t0,2,(1),i" #define rv_fmt_fli "O\t3,h" #define rv_fmt_mop_r "O.i\t0,1" +#define rv_fmt_mop_rr "O.i\t0,1,2" =20 #endif /* DISAS_RISCV_H */ diff --git a/disas/riscv.c b/disas/riscv.c index 0751f1a841..22104638e1 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -650,6 +650,11 @@ static uint32_t operand_mop_r_imm(rv_inst inst) extract32(inst, 20, 2); } =20 +static uint32_t operand_mop_rr_imm(rv_inst inst) +{ + return (extract32(inst, 30, 1) << 2) | extract32(inst, 26, 2); +} + /* instruction metadata */ =20 static const rv_opcode_data rvi_opcode_data[] =3D { @@ -2572,7 +2577,7 @@ static const rv_opcode_data *decode_inst_opcode(rv_de= code *dec, rv_isa isa) =3D=3D 0b1000001) { imm_mop3 =3D deposit32(extract32(inst, 26, 2), 2, 1, extract32(inst, 30, 1)); - op =3D rv_op_mop_rr_0 + imm_mop3; + op =3D rv_op_mop_rr; /* if zicfiss enabled and mop3 is shadow stack */ if (dec->cfg->ext_zicfiss && ((imm_mop3 & 0b111) =3D=3D 0b111)) { @@ -3061,6 +3066,12 @@ static void decode_inst_operands(rv_decode *dec, rv_= isa isa, dec->rs1 =3D operand_rs1(inst); dec->imm =3D operand_mop_r_imm(inst); break; + case rv_codec_mop_rr: + dec->rd =3D operand_rd(inst); + dec->rs1 =3D operand_rs1(inst); + dec->rs2 =3D operand_rs2(inst); + dec->imm =3D operand_mop_rr_imm(inst); + break; default: g_assert_not_reached(); } diff --git a/disas/riscv-op.c.inc b/disas/riscv-op.c.inc index 222d249a70..2100e54475 100644 --- a/disas/riscv-op.c.inc +++ b/disas/riscv-op.c.inc @@ -874,14 +874,7 @@ OP(amocas_w, "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_= rs2_rs1) OP(amocas_d, "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amocas_q, "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(mop_r, "mop.r", rv_codec_mop_r, rv_fmt_mop_r) -OP(mop_rr_0, "mop.rr.0", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mop_rr_1, "mop.rr.1", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mop_rr_2, "mop.rr.2", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mop_rr_3, "mop.rr.3", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mop_rr_4, "mop.rr.4", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mop_rr_5, "mop.rr.5", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mop_rr_6, "mop.rr.6", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mop_rr_7, "mop.rr.7", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mop_rr, "mop.rr", rv_codec_mop_rr, rv_fmt_mop_rr) OP(c_mop_1, "c.mop.1", rv_codec_ci_none, rv_fmt_none) OP(c_mop_3, "c.mop.3", rv_codec_ci_none, rv_fmt_none) OP(c_mop_5, "c.mop.5", rv_codec_ci_none, rv_fmt_none) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198384; cv=none; d=zohomail.com; s=zohoarc; b=hzCsPu9GYdJN8g1jh+b+yX+3hJZSxa1pTE4xAIW6fJuB5oEEPbatvI2ICPdqxAPNFMFhbqpWXkAbBsduH4TH8fkNEdwaiD3C4M4ypUDAWfpQwwSdZPWtf6Yrir89N0s2ZWAj4BkbwWNFpM+fGvL/VpGlHS/7UCxDfaiFzXmNZBY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198384; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=82rer5v+mUlWOAXCYhpssgxoxfjq1dcBWXCAHZ6HX8I=; b=QnCixONh+zfsoYgV8I70vtiZptGVZmtStdWV3zTAPAORwEK/mqCE06BNm3qlTPML0agqkGUpljFCZ7cuNZtTPytEEkb4UF/x23jBY3PPQLGq6NQBkFJhv1qbXreoOdS0+N6NPLo1NUWaZzMB/oYmKIrgf+aHdELhRYSPHV8/gXw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198383948424.96058392594637; Wed, 19 Aug 2026 20:59:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlr-0007FT-46; Wed, 19 Aug 2026 23:48:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlo-0007EM-1N for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:49 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlm-0004RW-Bm for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:47 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-cbedda4c154so820518a12.1 for ; Wed, 19 Aug 2026 20:48:46 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197725; x=1787802525; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=82rer5v+mUlWOAXCYhpssgxoxfjq1dcBWXCAHZ6HX8I=; b=S0OkqLl+dorr3DX+IpDQ96y3kqvEOeLPZa+9n7gJRodtQ8eDwMmiZ9q29nigNDm+s6 7W6wCqEyqIM5je3xm4w9COPTLJqWfoddv25GzHI0qRy0L0FUUR78vExgOZMFNz8f/rd6 7laaXiHYyAJA29qax16FYbOwzptG8e9BQi8sWeL7rMq3f/McgUVzSxMOgV5I1h8uX9ZS TWPYQ3NyFCsvo26gLg1lU0aFiBGXFKjt74b7uW3I5Aa7e6BQaRsNJbfvp/iQdVJ8DZbM D4/ZvxL4zaIlFIZiR+5hj7oFP1OoWJch/BNnjTBZsMdL3o+zdEW4rV282/TPC/TLcOzK tAdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197725; x=1787802525; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=82rer5v+mUlWOAXCYhpssgxoxfjq1dcBWXCAHZ6HX8I=; b=nNty/m7Emkq25Qx2i1KWe/cNFJ0nxmppbjpN0U6MeVfI48V2+BcV5ClAyLFItIb97d EoeMa0KU4S1pB/j0x4eQ7wUQV20wMt7LDOldGNUWaXuIWfWGvTP0bJmQuZEqZeZ1RCPL rO1Q3EpEKa2FWflPZymn7aNCqI/r/mDyfWNx+wrIIjIdxG3ilmB+gnL9kaZ1XUCzyLJ2 JlWz1uq2r4Zr9b7ZQtM/RMky+FapkIyCcdlU9KI2iU4R8/06zOM7psjy4Eqk4nq8Zycu OkwlSWw+M3S2SsWSU3QhbuYXIb9+HM7YdqJttm1tdocYxlwCj1/jTjBMtT/E/T/phfL1 Y02w== X-Gm-Message-State: AOJu0YwDcdX+rBSlBgHH7DqkCx9WecSwa9Uv66l0Y/gGVwndHnzMH5Xd snA6NMmHS8Vt5mlw0Gtn21W8AjfAA/RuX1D9ybikkT8ztSjXacsqyTCVh6bvEg== X-Gm-Gg: AR+sD10uH4cFA3UxYB2KawZOppW9b0EhdT0e3BgonfztptiUQQ7yIMDbrSsW9pwhts7 DCiW5iEyR+5ZqSbQ9wEjOrMQ+z5cERU4KI4YDbUNpvFYkke/6i7KqByuyikrzjduf8wey6xLort ySD/32J5PDCveyqLrxRuqGsP1Yt06xBnkaQSf5FvSHGbIplbM0p8JHC4/tZV22ZXOuIlXVMMkQZ cMCc3WXXLrUAUs2oVV1ke6uvadkQtRp2Gi2TJBl36uhzl+lRkwcAzUlxFqnyj/SBk9PdeUaX91v INb6Ctd9cXy2PY4klf7B1MybEE8eLxcB11+Tqw1qVkDn90lO+GgC8K0KlChVl137Yhahk/wTt8E g5eWPTeOVZ4l7+Njgt+rrMZwcRdO/RZAOscaRpZ6q0J6A569dwiTX6iwPfnhZPVV6jc8N4FFEsO f8Lurlx+BX+XVDHVRN6Phgf+TvEJqEe9h2ZxkaUNYufu8ZKGVyNtwifNQpz5dOLcOSVqPdxpBma 13AiiTxfnVgZOvn X-Received: by 2002:a05:6a20:3ca1:b0:3c3:66c5:68d6 with SMTP id adf61e73a8af0-3cd00f77410mr17385415637.9.1787197724920; Wed, 19 Aug 2026 20:48:44 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 84/93] disas/riscv: Merge all c.mop.n to one pattern Date: Thu, 20 Aug 2026 13:44:21 +1000 Message-ID: <20260820034430.1186695-85-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198384639158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Avoid performing arithmetic on rv_op_c_mop_1. Treat the 'n' as an immediate. Create a codec and format to match. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-49-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.h | 2 ++ disas/riscv.c | 10 +++++++++- disas/riscv-op.c.inc | 9 +-------- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/disas/riscv.h b/disas/riscv.h index 47647f750f..b0269bb709 100644 --- a/disas/riscv.h +++ b/disas/riscv.h @@ -159,6 +159,7 @@ typedef enum { rv_codec_r2_imm2_imm5, rv_codec_fli, rv_codec_lp, + rv_codec_cmop, rv_codec_cmop_ss, rv_codec_mop_r, rv_codec_mop_rr, @@ -286,6 +287,7 @@ typedef struct { #define rv_fmt_rd_rs1_immh_imml_addr "O\t0,(1),i,j" #define rv_fmt_rd2_imm "O\t0,2,(1),i" #define rv_fmt_fli "O\t3,h" +#define rv_fmt_cmop "O.i" #define rv_fmt_mop_r "O.i\t0,1" #define rv_fmt_mop_rr "O.i\t0,1,2" =20 diff --git a/disas/riscv.c b/disas/riscv.c index 22104638e1..39235e5bc7 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -643,6 +643,11 @@ static uint32_t operand_lpl(rv_inst inst) return extract32(inst, 12, 20); } =20 +static uint32_t operand_cmop_imm(rv_inst inst) +{ + return extract32(inst, 8, 3) * 2 + 1; +} + static uint32_t operand_mop_r_imm(rv_inst inst) { return (extract32(inst, 30, 1) << 4) | @@ -1027,7 +1032,7 @@ static const rv_opcode_data *decode_inst_opcode(rv_de= code *dec, rv_isa isa) (((inst >> 11) & 0b11) =3D=3D 0b0)) { unsigned int cmop_code =3D 0; cmop_code =3D ((inst >> 8) & 0b111); - op =3D rv_op_c_mop_1 + cmop_code; + op =3D rv_op_c_mop; if (dec->cfg->ext_zicfiss) { op =3D (cmop_code =3D=3D 0) ? rv_op_c_sspush : op; op =3D (cmop_code =3D=3D 2) ? rv_op_c_sspopchk : o= p; @@ -3056,6 +3061,9 @@ static void decode_inst_operands(rv_decode *dec, rv_i= sa isa, case rv_codec_lp: dec->imm =3D operand_lpl(inst); break; + case rv_codec_cmop: + dec->imm =3D operand_cmop_imm(inst); + break; case rv_codec_cmop_ss: dec->rd =3D rv_ireg_zero; dec->rs1 =3D dec->rs2 =3D operand_crs1(inst); diff --git a/disas/riscv-op.c.inc b/disas/riscv-op.c.inc index 2100e54475..802a521bca 100644 --- a/disas/riscv-op.c.inc +++ b/disas/riscv-op.c.inc @@ -875,14 +875,7 @@ OP(amocas_d, "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_= rs2_rs1) OP(amocas_q, "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(mop_r, "mop.r", rv_codec_mop_r, rv_fmt_mop_r) OP(mop_rr, "mop.rr", rv_codec_mop_rr, rv_fmt_mop_rr) -OP(c_mop_1, "c.mop.1", rv_codec_ci_none, rv_fmt_none) -OP(c_mop_3, "c.mop.3", rv_codec_ci_none, rv_fmt_none) -OP(c_mop_5, "c.mop.5", rv_codec_ci_none, rv_fmt_none) -OP(c_mop_7, "c.mop.7", rv_codec_ci_none, rv_fmt_none) -OP(c_mop_9, "c.mop.9", rv_codec_ci_none, rv_fmt_none) -OP(c_mop_11, "c.mop.11", rv_codec_ci_none, rv_fmt_none) -OP(c_mop_13, "c.mop.13", rv_codec_ci_none, rv_fmt_none) -OP(c_mop_15, "c.mop.15", rv_codec_ci_none, rv_fmt_none) +OP(c_mop, "c.mop", rv_codec_cmop, rv_fmt_cmop) OP(amoswap_b, "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amoadd_b, "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amoxor_b, "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198523; cv=none; d=zohomail.com; s=zohoarc; b=KyvEDl4AwTthoNzE6lDRrPkGm5XH7NCD2vDNr6zoxid0G8ovsGX9FQKz/XNqHH0VORME+JYEmi+fhuqCumSpHAnhoC2UQopLUtedcIYPtilUfpZDf7oXcCU5Tkm1ps8PhP0SgZtmqXUXHRSF1RpcXrV3463B9tp5eQv87rQm/n4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198523; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=sVV9c8S04txxWkCEX8+hRViSARQ6uNL7zv3RnJ4UqLs=; b=OIgHRKvNaim/r8Q2DfWcCkSn2Jxf+dj4Q4T4iGwYdhg4xEFDPmPcus0NCYGs0n17kwZfFaSNq3XfNpwqwsgU25//IJh1VrY+oWBw32IydRo3+qpqzUpDTslXPRgTWaXHrtb+/avVLxLPSipm3rlaXiSME+24oVQE9Y2WMIPfMGI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198523923223.10491869575912; Wed, 19 Aug 2026 21:02:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtls-0007Fo-Vf; Wed, 19 Aug 2026 23:48:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlq-0007F4-J5 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:50 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlo-0004Rp-VG for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:50 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-38dfe910e9dso2044449a91.3 for ; Wed, 19 Aug 2026 20:48:48 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197728; x=1787802528; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=sVV9c8S04txxWkCEX8+hRViSARQ6uNL7zv3RnJ4UqLs=; b=h6o+31kM49y2pbqN0oITp/oIKX84EjnBV5veFL+PoCza0V9zVCz4/rikJqg+LJSM8v HFCgRGKAvSw2nE5tbIDkIqBUyBNY8pFKFSCfV3TqGAfgn1+2cbuxOsV2hngRPE6JyUAn Nykl4PqJodrkgpl+BGQLJ6QvkwiMp5A6habYOgsU9uAvKsSNu6AM79gwVEFlksw7KYju d5U8GqFbOgnJCwGs39G/wqcHpenlz1Wl/pLMbLABP8kGgrC6SXPKeA0tBrmyqO8Cp+bA JGRGQLXDlwHsugkK4Y2oac4jSDBdi2LTaI6ZMSL3BeX02L449Je/EAMuynGH0jIKU7+6 9c4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197728; x=1787802528; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=sVV9c8S04txxWkCEX8+hRViSARQ6uNL7zv3RnJ4UqLs=; b=rrRalfAB6MFHUH6dtXLFu/826JL+ZCkie0XBBTdRyFIuG/h2LRwYlBlnH/jVAoGYES 8rpu3816y+C20OON+TwdoVSKYHhCEWCiMppoffPggwDUQV4GvyBSVGmSqcg3vRoaMkXQ XAYPzGRe/mjo3U6BUzTHZBRn5Dkk29dl5HTk4cdOhK1QU7kYSdxI0ivf9ZGLpr7C6t7n ndzgNN5TAAW5m4OqUwyWxuYmTkXWluFrs1E40I7sic33joD0K+z5TXk72jJsbWw6o6/O 5xCltToWa1AxO3mbauEqCf4ZG9rvJoZGlveuXn5xRBOZEWytaEj2vu3iEnU+nyu8eJOh tcfA== X-Gm-Message-State: AFuF++nKwjdMBiY1NCnuH9Jzu8kAOF8jK4zHVRyo9DVaO+tQ7UAmbmVp Vr+Mw5XEWRjR8GEi2rljgeW92YP+vSKB/lT8ljZvpxCllJ71QF29s7iS31FZEw== X-Gm-Gg: AR+sD12hAa9w7kHrSSOoLb1IW7noQNIlY+wghTv3bbWskj7x8Ys4c+ZxnFXE3Kheeoi ySYnr/KqQbYPkl/u56fcDwd0FwGc+xUaP777ERaU/9knhYkdl/0otBBss1JCpqIYA7bZ6azeARR XeB8rvWsz2/xM/M6V0ByYEzKy0dO9cNSYBgl0Coa1vP2WoD7fjyUtQToms/0R3uEWTRm5OFntwd zR8U5eO7JJm/AwqDvfpgxytoAFpbRdJ4lBDg1xDFrBzeBCIDulyKq2BfG+XHFRRGFrBJggYM51b fJkAq5Kiynyt1GlJpEz9/tBAa7GIpTIE5YAstZrb8941fSx/fBcesr2+wJX+WbrWVaBGuAJLUBz WQFltnfqvPZ8ZgCDNkpi6u/3oyJQhYCYPWXppDamzssnfzHHtw6z590SKh9AVW/kk05HYlSfWmp CH7n4Wys3NZKlV1G8a++oja2OLrNuYjJV8cVjC0TBzU+1104QCTfuGYagde0P34Dm1fnrTogCj/ 6WTtQ== X-Received: by 2002:a17:90b:540b:b0:38f:837e:fc5d with SMTP id 98e67ed59e1d1-39580a8de4emr19574534a91.3.1787197727699; Wed, 19 Aug 2026 20:48:47 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 85/93] disas/riscv: Tidy decode of c.mop.n Date: Thu, 20 Aug 2026 13:44:22 +1000 Message-ID: <20260820034430.1186695-86-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198525270158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Merge nested if's. Reuse operand_cmop_imm for zicfiss decode. Return pointers directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-50-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 39235e5bc7..197eaa43b1 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1027,18 +1027,17 @@ static const rv_opcode_data *decode_inst_opcode(rv_= decode *dec, rv_isa isa) break; case 2: op =3D rv_op_c_li; break; case 3: - if (dec->cfg && dec->cfg->ext_zcmop) { - if ((((inst >> 2) & 0b111111) =3D=3D 0b100000) && - (((inst >> 11) & 0b11) =3D=3D 0b0)) { - unsigned int cmop_code =3D 0; - cmop_code =3D ((inst >> 8) & 0b111); - op =3D rv_op_c_mop; - if (dec->cfg->ext_zicfiss) { - op =3D (cmop_code =3D=3D 0) ? rv_op_c_sspush : op; - op =3D (cmop_code =3D=3D 2) ? rv_op_c_sspopchk : o= p; + if (dec->cfg + && dec->cfg->ext_zcmop + && ((inst >> 2) & 0b111111) =3D=3D 0b100000 + && ((inst >> 11) & 0b11) =3D=3D 0) { + if (dec->cfg->ext_zicfiss) { + switch (operand_cmop_imm(inst)) { + case 1: return &rvi_opcode_data[rv_op_c_sspush]; + case 5: return &rvi_opcode_data[rv_op_c_sspopchk]; } - break; } + return &rvi_opcode_data[rv_op_c_mop]; } if (inst & ((1 << 12) | (0x1f << 2))) { switch ((inst >> 7) & 0b11111) { --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198144; cv=none; d=zohomail.com; s=zohoarc; b=KQ/v4lw+OK+AZQSm//z7B0S8u5cDmkPeF4z9sg38XGeg3dgf8RfUFvdl4+8DIGkvCrz3xz+75f9SOllMidPeoJ940Hgu7Do1wEW+zoknXPUUryxuJVCfnct0X/2R9RbslQPTs+t/Z/MMOzM8Rq8KHaqOh785o1hC/Nt5NkgECK0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198144; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kp+RARhuhB9eCydGM0toopCbuCJCJESGSSluyzS3iH8=; b=NZX/UJfQ/kss2yOnpJX2MeJateN9tWusH1xEQqzhoy69xkzcGsIVmTlk88XzTO31wJver9RSxl286JnGXbKihq0Ogs/tYDQhTxGTpG6SSHLTSdnGSuF7HveK5QebBin+ds7fkLFpj+CZJMa5NJ0N5mWpem8nfl3ofzt5o7Yl2cc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198144734696.0821921708051; Wed, 19 Aug 2026 20:55:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtlw-0007TH-2U; Wed, 19 Aug 2026 23:48:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtlt-0007LG-92 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:53 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlr-0004S5-Ju for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:48:53 -0400 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-38f620399a0so1520201a91.2 for ; Wed, 19 Aug 2026 20:48:51 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197730; x=1787802530; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=kp+RARhuhB9eCydGM0toopCbuCJCJESGSSluyzS3iH8=; b=g8AQQa4QV9WbVpPZrqkE3BTZ5NZGSPhdjmT+zF6PHivl64M8VuNC9n+01rD9bdCAlU vjQ76kJ1OPQieV7+L3Xg47hQnV5mSC7ttqq3dpeqtgDS+e0qEIf952xZ9hWrjTFI0EW2 2zhY2PhJMITocyIFHTtKHGXgXYyA60zv2e1/58Rhz88SEsGJt/UJTHPQvWf3Y2hDTZv2 TxREhc53mkALHDIXD91jMb56xdIqMC3PutpKg+vmtDe2Erx05lKnSwn8OwyzWy0mvEp4 Y2mQ6gKo7NoiOiql95kgjmZLCCo7jerlanyplgPm/hdQ4pJZHdQBaX6FP4pjCxJm48sa hU6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197730; x=1787802530; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=kp+RARhuhB9eCydGM0toopCbuCJCJESGSSluyzS3iH8=; b=R1+2HkxbqSJr8gIcbskDXupAP87BdPt3glj/AFTCmiThAUigtxLbTjhnWeKiRhnaTP 9OcbUjCbN0YdMHrp+kSCpVqLqHFOAkabAWjqIC+kZazmSYyKwTWPJUOajjz505/YZjd4 ry9B8XbJ1gG3CMqPRDLfBM9oFjeHtzifsDeOMRyRTWgdu9YKasQtNVZCC9FaJqrycBZh +HdD7F59JBzJz+49hxAUt64p21OgYSXWsTNiS5gjNDWOPpgI/NE9BtYfGECvI0vUr6jm 4GIwca6/e1oKV3L22hpGrbPWlq5whO554+kPWTi3eo/DM3ZqZ1rSeNIm1Dt2itV4WjgW Nzyg== X-Gm-Message-State: AFuF++nQDcZ3IJbk4aDM6flh1hOZcJFaN9+qsbZzbMeH5XBpcoFOTTCN V2NKM7tQB4elyrT8lNLB5h6TYJDLRwEPVJcy3ROO3RTSWtXUPlc9a1fuIFxKwA== X-Gm-Gg: AR+sD10VyU1HMGjlt/X2dqIYc/ddqos2GkzCHmFq/zZQQ6jPoydjIaeWDv6rpkkXgdO 39yVaZ0B3ZeqGJBKlMLK8mkKQFP9MIf4WfdHYYWcavq8+WST3fzwDB+gVsmtCL3QrcvfIHAALha MJQOOxakIaEYX1SOWF1E6mnAkVdgmhAyQKdUwp1Hw7LX1hn8Oe6wN/E487N+UwfUqlTmLkZAvnJ gQU0QQCuLSkL3HO8o6u6vQUp6F6BBLefR6VX4ImEhkXEIya4TIIJu639/tgbSNCBncL2Olqpjjf l9wFFBYDN6gjY+5+kL+U0CZx1/mfN3FHdFhdRQgIIVzPhpYCPRKPBWkUpv3+8B2HRo7PC15fecZ ta9aCDPDYdomKBuarpyjy7FvVV0vwtOTzSODMGGYHgQY8Vz7XhLaXV9sVVTF5Oe8YAkORYyxYQn W1oYmHa2xheAyehjw5+IXXjmQjPAsKda2rukItK2pHB1SEU30CtO49Z1D+Cu1EuPAjjKKGZ8DvO u4+drvfBmrXuZhf X-Received: by 2002:a17:90b:1cc3:b0:381:6c5:3f63 with SMTP id 98e67ed59e1d1-39580ace560mr18261872a91.6.1787197730312; Wed, 19 Aug 2026 20:48:50 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 86/93] disas/riscv: Tidy decode of mop.r.n and mop.rr.n Date: Thu, 20 Aug 2026 13:44:23 +1000 Message-ID: <20260820034430.1186695-87-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198145878158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Merge nested if's. Reuse operand_mop_{r,rr}_imm for zicfiss decode. Return pointers directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-51-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 59 +++++++++++++++++++++------------------------------ 1 file changed, 24 insertions(+), 35 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 197eaa43b1..7ea65ba2e7 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -2555,44 +2555,33 @@ static const rv_opcode_data *decode_inst_opcode(rv_= decode *dec, rv_isa isa) case 3: op =3D rv_op_csrrc; break; case 4: if (dec->cfg && dec->cfg->ext_zimop) { - int imm_mop5, imm_mop3, reg_num; - if ((extract32(inst, 22, 10) & 0b1011001111) - =3D=3D 0b1000000111) { - imm_mop5 =3D deposit32(deposit32(extract32(inst, 2= 0, 2), - 2, 2, - extract32(inst, 26,= 2)), - 4, 1, extract32(inst, 30, 1)); - op =3D rv_op_mop_r; - /* if zicfiss enabled and mop5 is shadow stack */ - if (dec->cfg->ext_zicfiss && - ((imm_mop5 & 0b11100) =3D=3D 0b11100)) { - /* rs1=3D0 means ssrdp */ - if ((inst & (0b011111 << 15)) =3D=3D 0) { - op =3D rv_op_ssrdp; - } - /* rd=3D0 means sspopchk */ - reg_num =3D (inst >> 15) & 0b011111; - if (((inst & (0b011111 << 7)) =3D=3D 0) && - ((reg_num =3D=3D 1) || (reg_num =3D=3D= 5))) { - op =3D rv_op_sspopchk; + if (((inst >> 22) & 0b1011001111) =3D=3D 0b1000000111)= { + if (dec->cfg->ext_zicfiss + && operand_mop_r_imm(inst) =3D=3D 28) { + switch (operand_rs1(inst)) { + case 0: + return &rvi_opcode_data[rv_op_ssrdp]; + case 1: + case 5: + if (operand_rd(inst) =3D=3D 0) { + return &rvi_opcode_data[rv_op_sspopchk= ]; } + } } - } else if ((extract32(inst, 25, 7) & 0b1011001) - =3D=3D 0b1000001) { - imm_mop3 =3D deposit32(extract32(inst, 26, 2), - 2, 1, extract32(inst, 30, 1)); - op =3D rv_op_mop_rr; - /* if zicfiss enabled and mop3 is shadow stack */ - if (dec->cfg->ext_zicfiss && - ((imm_mop3 & 0b111) =3D=3D 0b111)) { - /* rs1=3D0 and rd=3D0 means sspush */ - reg_num =3D (inst >> 20) & 0b011111; - if (((inst & (0b011111 << 15)) =3D=3D 0) && - ((inst & (0b011111 << 7)) =3D=3D 0) && - ((reg_num =3D=3D 1) || (reg_num =3D=3D= 5))) { - op =3D rv_op_sspush; - } + return &rvi_opcode_data[rv_op_mop_r]; + } + if (((inst >> 25) & 0b1011001) =3D=3D 0b1000001) { + if (dec->cfg->ext_zicfiss + && operand_mop_rr_imm(inst) =3D=3D 7 + && operand_rd(inst) =3D=3D 0 + && operand_rs1(inst) =3D=3D 0) { + switch (operand_rs2(inst)) { + case 1: + case 5: + return &rvi_opcode_data[rv_op_sspush]; + } } + return &rvi_opcode_data[rv_op_mop_rr]; } } break; --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198334; cv=none; d=zohomail.com; s=zohoarc; b=aSD8dfUhrOIRRe1cQTS9M8Mg9qijgqzSdezVDb10VvkDR6+g5/xUlBToSptLNMWh4pcGmOJjufqHpAXSFXRrVyLi2uZDHnntfaE5GCl7r8/HNhnRsbOyMMVnjch/W6829+hRJsQ4sJu9zkOSxcv4EXpEtNlwuTrb8/Pyje//05Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198334; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=dNtbm0veFpAUUI11k9G62a1Arz3Nu9g0Jy+IoZP8f9Y=; b=gfQY0kuZ+xtOnsVFrImtXsKjdS2Rbg0cw+Ey31ZOlylHn7+dn85Po6X1LMS8DUPVfGWCWLVZYnEvlgmdORpUo0RJFKsH/J9kyfGDVHabIEBIcPp3lrzgBuJhzAhdgYOZnJPpFx4r3pEz+Fm92RJ0CeE0mrhZ8tAFyP68Mz72C0o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178719833417842.83326699465192; Wed, 19 Aug 2026 20:58:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtm2-0007XE-Fi; Wed, 19 Aug 2026 23:49:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtm0-0007W7-Hr for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:00 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlv-0004SW-Ux for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:00 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-384930ca5e2so2215033a91.3 for ; Wed, 19 Aug 2026 20:48:55 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197734; x=1787802534; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=dNtbm0veFpAUUI11k9G62a1Arz3Nu9g0Jy+IoZP8f9Y=; b=B6G1CJSOImVuzt+JV7fmK9XfyquQ3aSBdgwBEur7X8bVxm6+A9mXzEomd1l59oZaOV uO7iMdVehKKbxh0T3UthP2YDMUEsaUgGvDUMyj93IygXl+3KxagamoES0v2cnX+7Iucd MphzVeK5GqxU2n1lmVkem7kuWz0hBVvd+WdAgCNINZjPKiokbmy/k+83iutQcgg134yv wkr9ZfzqxL3jUOAdWW8ZBRP2zTLE5hj88PuwTr+fdlPsFAIJbR++wdjzDSgT5s63BqBz 8PXra2YXIV1+xSwQT/DGvdobp56nLooCfdhDif5MRV827VBEqH6ra8XDIOUFfNxpZE+x AORg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197734; x=1787802534; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=dNtbm0veFpAUUI11k9G62a1Arz3Nu9g0Jy+IoZP8f9Y=; b=L/gWwQqeO/jjaILgvLS+vPnSV/FKDlC+/CpGyxtKLHa2ruHfx3n0Z35R3YsJ3p6dnx 6VTpsJVWjDc9hav8vYa+pkzwEz3eAlOQGOxje+Q+rKy54oJ626gRzzCkC7q9cX0B7RWs ethjNw4xRQLqOJ8okGGUJj3Mg7s5v6eWHoMk2Psexx0pFA6Vypdffq6uQ+mxZ8Mx4NAq Hh8MhxizKQcxI9qP10MG8+xShUtHSBlMAOvQIOlmZsJB0fFoXZ7cPvyrBRpenoOlCizq izJ4CZjKvEKY1eIDSTWR2uGXl94S3Pt9nTGBmSm+dxj0oMliGXUUmjQaGmB0U3iUwogy Y+tw== X-Gm-Message-State: AFuF++l9gr9MXzHBfk09UA5sGqZrbarvtWho5cxpECaooyq4S1c3sol0 Qc9iIhk348/YZFJpVWY6pk4VMZQ3g4bkDjPlY9Axd+LJ6G51BZVZOAg+H9t5Ng== X-Gm-Gg: AR+sD119sTTiWnSv2D5mcGCdgj0SYEaTfRJSXvlUgNsequIEOQQvqn5BH4Sa+fKDtvG VF/6in8ulUr1Xa2ayd9JO44GKF2JhIl17GFReyJRE7uaU91fzBVMYFKe2sQw2Znb2zxFV5BTLrs JucDAk2no6zFmXAnNZGPgnjZIg+rjOkPMwoEKz/WYY7Bws1F5O3afZF547E5DTXKCr7ps1843vJ aqORSEX6SwLn1Fn22qIPXtppoe3C9YUSKLIfq3udcnB5NB3ehCVSelMbshPyMc/s0U2V7WL2Fm7 1982CZpFJeeTFMB5PiJyygNyh58tJKcNQZE/5YzHb9Tq3dWd+YkPfvdhaDIlat8rrnV+D+eMaJa V8tH2+UhlGG7mmsLfeudDOQr2prI5PH8p3Bt/rlMIpzYGzFfYiSL5cgbK3xz+59oKlYeVHafLLO H/qs6tBgyZmB8xlMDnv4eOLgGKA3tQ1JUacttOK5KJjwHfhARwZVIDLwgQ6DhoxfVxy3fYu1noc KHzjg== X-Received: by 2002:a17:90a:ec88:b0:38e:5964:97a8 with SMTP id 98e67ed59e1d1-3958128686dmr19031722a91.16.1787197733903; Wed, 19 Aug 2026 20:48:53 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis Subject: [PULL 87/93] disas/riscv: Split rvi_opcode_data Date: Thu, 20 Aug 2026 13:44:24 +1000 Message-ID: <20260820034430.1186695-88-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198334472158500 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Generate separate objects for OP() instead of collecting in a table. Return pointers to objects directly. Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-52-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv.c | 1981 +++++++++++++++++++++--------------------- disas/riscv-op.c.inc | 94 +- 2 files changed, 1048 insertions(+), 1027 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 7ea65ba2e7..b8099cbdf8 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -28,12 +28,6 @@ #include "disas/riscv-xventana.h" #include "disas/riscv-xlrbr.h" =20 -typedef enum { -#define OP(N, ...) rv_op_##N, -#include "riscv-op.c.inc" -#undef OP -} rv_op; - /* register names */ =20 static const char rv_ireg_name_sym[32][5] =3D { @@ -113,140 +107,143 @@ static const rvc_constraint rvcc_true[] =3D { rvc_e= nd }; =20 /* pseudo-instruction metadata */ =20 -static const rv_opcode_data rvi_opcode_data[]; +/* Forward declare the all the opcodes so that we may link them. */ +#define OP(N, ...) static const rv_opcode_data op_##N; +#include "riscv-op.c.inc" +#undef OP =20 static const rv_comp_data rvcp_jal[] =3D { - { &rvi_opcode_data[rv_op_j], rvcc_j }, - { &rvi_opcode_data[rv_op_jal_ra], rvcc_jal_ra }, + { &op_j, rvcc_j }, + { &op_jal_ra, rvcc_jal_ra }, { }, }; =20 static const rv_comp_data rvcp_jalr[] =3D { - { &rvi_opcode_data[rv_op_jr], rvcc_jr }, - { &rvi_opcode_data[rv_op_jalr_ra], rvcc_jalr_ra }, + { &op_jr, rvcc_jr }, + { &op_jalr_ra, rvcc_jalr_ra }, { }, }; =20 static const rv_comp_data rvcp_jr[] =3D { - { &rvi_opcode_data[rv_op_ret], rvcc_ret }, + { &op_ret, rvcc_ret }, { }, }; =20 static const rv_comp_data rvcp_beq[] =3D { - { &rvi_opcode_data[rv_op_beqz], rvcc_beqz }, + { &op_beqz, rvcc_beqz }, { }, }; =20 static const rv_comp_data rvcp_bne[] =3D { - { &rvi_opcode_data[rv_op_bnez], rvcc_bnez }, + { &op_bnez, rvcc_bnez }, { }, }; =20 static const rv_comp_data rvcp_blt[] =3D { - { &rvi_opcode_data[rv_op_bltz], rvcc_bltz }, - { &rvi_opcode_data[rv_op_bgtz], rvcc_bgtz }, + { &op_bltz, rvcc_bltz }, + { &op_bgtz, rvcc_bgtz }, { }, }; =20 static const rv_comp_data rvcp_bge[] =3D { - { &rvi_opcode_data[rv_op_blez], rvcc_blez }, - { &rvi_opcode_data[rv_op_bgez], rvcc_bgez }, + { &op_blez, rvcc_blez }, + { &op_bgez, rvcc_bgez }, { }, }; =20 static const rv_comp_data rvcp_addi[] =3D { - { &rvi_opcode_data[rv_op_mv], rvcc_mv }, + { &op_mv, rvcc_mv }, { }, }; =20 static const rv_comp_data rvcp_mv[] =3D { - { &rvi_opcode_data[rv_op_nop], rvcc_nop }, + { &op_nop, rvcc_nop }, { }, }; =20 static const rv_comp_data rvcp_sltiu[] =3D { - { &rvi_opcode_data[rv_op_seqz], rvcc_seqz }, + { &op_seqz, rvcc_seqz }, { }, }; =20 static const rv_comp_data rvcp_xori[] =3D { - { &rvi_opcode_data[rv_op_not], rvcc_not }, + { &op_not, rvcc_not }, { }, }; =20 static const rv_comp_data rvcp_sub[] =3D { - { &rvi_opcode_data[rv_op_neg], rvcc_neg }, + { &op_neg, rvcc_neg }, { }, }; =20 static const rv_comp_data rvcp_slt[] =3D { - { &rvi_opcode_data[rv_op_sltz], rvcc_sltz }, - { &rvi_opcode_data[rv_op_sgtz], rvcc_sgtz }, + { &op_sltz, rvcc_sltz }, + { &op_sgtz, rvcc_sgtz }, { }, }; =20 static const rv_comp_data rvcp_sltu[] =3D { - { &rvi_opcode_data[rv_op_snez], rvcc_snez }, + { &op_snez, rvcc_snez }, { }, }; =20 static const rv_comp_data rvcp_addiw[] =3D { - { &rvi_opcode_data[rv_op_sext_w], rvcc_sext_w }, + { &op_sext_w, rvcc_sext_w }, { }, }; =20 static const rv_comp_data rvcp_subw[] =3D { - { &rvi_opcode_data[rv_op_negw], rvcc_negw }, + { &op_negw, rvcc_negw }, { }, }; =20 static const rv_comp_data rvcp_fsgnj_s[] =3D { - { &rvi_opcode_data[rv_op_fmv_s], rvcc_fmv_s }, + { &op_fmv_s, rvcc_fmv_s }, { }, }; =20 static const rv_comp_data rvcp_fsgnjn_s[] =3D { - { &rvi_opcode_data[rv_op_fneg_s], rvcc_fneg_s }, + { &op_fneg_s, rvcc_fneg_s }, { }, }; =20 static const rv_comp_data rvcp_fsgnjx_s[] =3D { - { &rvi_opcode_data[rv_op_fabs_s], rvcc_fabs_s }, + { &op_fabs_s, rvcc_fabs_s }, { }, }; =20 static const rv_comp_data rvcp_fsgnj_d[] =3D { - { &rvi_opcode_data[rv_op_fmv_d], rvcc_fmv_d }, + { &op_fmv_d, rvcc_fmv_d }, { }, }; =20 static const rv_comp_data rvcp_fsgnjn_d[] =3D { - { &rvi_opcode_data[rv_op_fneg_d], rvcc_fneg_d }, + { &op_fneg_d, rvcc_fneg_d }, { }, }; =20 static const rv_comp_data rvcp_fsgnjx_d[] =3D { - { &rvi_opcode_data[rv_op_fabs_d], rvcc_fabs_d }, + { &op_fabs_d, rvcc_fabs_d }, { }, }; =20 static const rv_comp_data rvcp_fsgnj_q[] =3D { - { &rvi_opcode_data[rv_op_fmv_q], rvcc_fmv_q }, + { &op_fmv_q, rvcc_fmv_q }, { }, }; =20 static const rv_comp_data rvcp_fsgnjn_q[] =3D { - { &rvi_opcode_data[rv_op_fneg_q], rvcc_fneg_q }, + { &op_fneg_q, rvcc_fneg_q }, { }, }; =20 static const rv_comp_data rvcp_fsgnjx_q[] =3D { - { &rvi_opcode_data[rv_op_fabs_q], rvcc_fabs_q }, + { &op_fabs_q, rvcc_fabs_q }, { }, }; =20 /* Convert compressed insns into normal insns via pseudo expansion. */ -#define DECOMP(X) &(const rv_comp_data){ &rvi_opcode_data[X], rvcc_true } +#define DECOMP(X) &(const rv_comp_data){ &X, rvcc_true } =20 /* operand extractors */ =20 @@ -662,11 +659,9 @@ static uint32_t operand_mop_rr_imm(rv_inst inst) =20 /* instruction metadata */ =20 -static const rv_opcode_data rvi_opcode_data[] =3D { -#define OP(N, ...) { __VA_ARGS__ }, +#define OP(N, ...) static const rv_opcode_data op_##N =3D { __VA_ARGS__ }; #include "riscv-op.c.inc" #undef OP -}; =20 /* CSR names */ =20 @@ -953,79 +948,65 @@ static const char *csr_name(int csrno) static const rv_opcode_data *decode_inst_opcode(rv_decode *dec, rv_isa isa) { rv_inst inst =3D dec->inst; - rv_opcode op =3D rv_op_illegal; =20 switch ((inst >> 0) & 0b11) { case 0: switch ((inst >> 13) & 0b111) { case 0: if ((inst >> 5) & 0xff) { - op =3D rv_op_c_addi4spn; + return &op_c_addi4spn; } break; case 1: if (isa =3D=3D rv128) { - op =3D rv_op_c_lq; - } else { - op =3D rv_op_c_fld; + return &op_c_lq; } - break; - case 2: op =3D rv_op_c_lw; break; + return &op_c_fld; + case 2: return &op_c_lw; case 3: if (isa =3D=3D rv32) { - op =3D rv_op_c_flw; - } else { - op =3D rv_op_c_ld; + return &op_c_flw; } - break; + return &op_c_ld; case 4: switch ((inst >> 10) & 0b111) { - case 0: op =3D rv_op_c_lbu; break; + case 0: return &op_c_lbu; case 1: if (((inst >> 6) & 1) =3D=3D 0) { - op =3D rv_op_c_lhu; - } else { - op =3D rv_op_c_lh; + return &op_c_lhu; } - break; - case 2: op =3D rv_op_c_sb; break; + return &op_c_lh; + case 2: return &op_c_sb; case 3: if (((inst >> 6) & 1) =3D=3D 0) { - op =3D rv_op_c_sh; + return &op_c_sh; } break; } break; case 5: if (isa =3D=3D rv128) { - op =3D rv_op_c_sq; - } else { - op =3D rv_op_c_fsd; + return &op_c_sq; } - break; - case 6: op =3D rv_op_c_sw; break; + return &op_c_fsd; + case 6: return &op_c_sw; case 7: if (isa =3D=3D rv32) { - op =3D rv_op_c_fsw; - } else { - op =3D rv_op_c_sd; + return &op_c_fsw; } - break; + return &op_c_sd; } break; case 1: switch ((inst >> 13) & 0b111) { case 0: - op =3D rv_op_c_addi; /* or unspecified HINT */ - break; + return &op_c_addi; /* or unspecified HINT */ case 1: if (isa =3D=3D rv32) { - op =3D rv_op_c_jal; - } else { - op =3D rv_op_c_addiw; + return &op_c_jal; } - break; - case 2: op =3D rv_op_c_li; break; + return &op_c_addiw; + case 2: return &op_c_li; case 3: if (dec->cfg && dec->cfg->ext_zcmop @@ -1033,16 +1014,16 @@ static const rv_opcode_data *decode_inst_opcode(rv_= decode *dec, rv_isa isa) && ((inst >> 11) & 0b11) =3D=3D 0) { if (dec->cfg->ext_zicfiss) { switch (operand_cmop_imm(inst)) { - case 1: return &rvi_opcode_data[rv_op_c_sspush]; - case 5: return &rvi_opcode_data[rv_op_c_sspopchk]; + case 1: return &op_c_sspush; + case 5: return &op_c_sspopchk; } } - return &rvi_opcode_data[rv_op_c_mop]; + return &op_c_mop; } if (inst & ((1 << 12) | (0x1f << 2))) { switch ((inst >> 7) & 0b11111) { - case 2: op =3D rv_op_c_addi16sp; break; - default: op =3D rv_op_c_lui; break; + case 2: return &op_c_addi16sp; + default: return &op_c_lui; } } break; @@ -1051,261 +1032,252 @@ static const rv_opcode_data *decode_inst_opcode(r= v_decode *dec, rv_isa isa) case 0: /* For rv32, shamt[5]=3D1 is designated for custom extensi= ons. */ if (isa !=3D rv32 || (inst & 0x1000) =3D=3D 0) { - op =3D rv_op_c_srli; /* or unspecified HINT */ + return &op_c_srli; /* or unspecified HINT */ } break; case 1: /* For rv32, shamt[5]=3D1 is designated for custom extensi= ons. */ if (isa !=3D rv32 || (inst & 0x1000) =3D=3D 0) { - op =3D rv_op_c_srai; /* or unspecified HINT */ + return &op_c_srai; /* or unspecified HINT */ } break; - case 2: op =3D rv_op_c_andi; break; + case 2: return &op_c_andi; case 3: switch (((inst >> 10) & 0b100) | ((inst >> 5) & 0b011)) { - case 0: op =3D rv_op_c_sub; break; - case 1: op =3D rv_op_c_xor; break; - case 2: op =3D rv_op_c_or; break; - case 3: op =3D rv_op_c_and; break; + case 0: return &op_c_sub; + case 1: return &op_c_xor; + case 2: return &op_c_or; + case 3: return &op_c_and; case 4: if (isa !=3D rv32) { - op =3D rv_op_c_subw; + return &op_c_subw; } break; case 5: if (isa !=3D rv32) { - op =3D rv_op_c_addw; + return &op_c_addw; } break; - case 6: op =3D rv_op_c_mul; break; + case 6: return &op_c_mul; case 7: switch ((inst >> 2) & 0b111) { - case 0: op =3D rv_op_c_zext_b; break; - case 1: op =3D rv_op_c_sext_b; break; - case 2: op =3D rv_op_c_zext_h; break; - case 3: op =3D rv_op_c_sext_h; break; - case 4: op =3D rv_op_c_zext_w; break; - case 5: op =3D rv_op_c_not; break; + case 0: return &op_c_zext_b; + case 1: return &op_c_sext_b; + case 2: return &op_c_zext_h; + case 3: return &op_c_sext_h; + case 4: return &op_c_zext_w; + case 5: return &op_c_not; } break; } break; } break; - case 5: op =3D rv_op_c_j; break; - case 6: op =3D rv_op_c_beqz; break; - case 7: op =3D rv_op_c_bnez; break; + case 5: return &op_c_j; + case 6: return &op_c_beqz; + case 7: return &op_c_bnez; } break; case 2: switch ((inst >> 13) & 0b111) { case 0: if (isa !=3D rv32 || (inst & 0x1000) =3D=3D 0) { - op =3D rv_op_c_slli; /* or unspecified HINT */ + return &op_c_slli; /* or unspecified HINT */ } break; case 1: if (isa =3D=3D rv128) { - op =3D rv_op_c_lqsp; - } else { - op =3D rv_op_c_fldsp; + return &op_c_lqsp; } - break; - case 2: op =3D rv_op_c_lwsp; break; + return &op_c_fldsp; + case 2: return &op_c_lwsp; case 3: if (isa =3D=3D rv32) { - op =3D rv_op_c_flwsp; - } else { - op =3D rv_op_c_ldsp; + return &op_c_flwsp; } - break; + return &op_c_ldsp; case 4: switch ((inst >> 12) & 0b1) { case 0: switch ((inst >> 2) & 0b11111) { - case 0: op =3D rv_op_c_jr; break; - default: op =3D rv_op_c_mv; break; + case 0: return &op_c_jr; + default: return &op_c_mv; } break; case 1: switch ((inst >> 2) & 0b11111) { case 0: switch ((inst >> 7) & 0b11111) { - case 0: op =3D rv_op_c_ebreak; break; - default: op =3D rv_op_c_jalr; break; + case 0: return &op_c_ebreak; + default: return &op_c_jalr; } break; - default: op =3D rv_op_c_add; break; + default: return &op_c_add; } break; } break; case 5: if (isa =3D=3D rv128) { - op =3D rv_op_c_sqsp; - } else { - op =3D rv_op_c_fsdsp; - if (dec->cfg && dec->cfg->ext_zcmp && ((inst >> 12) & 0b01= )) { + return &op_c_sqsp; + } + if (dec->cfg) { + if (dec->cfg->ext_zcmp && ((inst >> 12) & 0b01)) { switch ((inst >> 8) & 0b01111) { case 8: if (((inst >> 4) & 0b01111) >=3D 4) { - op =3D rv_op_cm_push; + return &op_cm_push; } break; case 10: if (((inst >> 4) & 0b01111) >=3D 4) { - op =3D rv_op_cm_pop; + return &op_cm_pop; } break; case 12: if (((inst >> 4) & 0b01111) >=3D 4) { - op =3D rv_op_cm_popretz; + return &op_cm_popretz; } break; case 14: if (((inst >> 4) & 0b01111) >=3D 4) { - op =3D rv_op_cm_popret; + return &op_cm_popret; } break; } - } else { - switch ((inst >> 10) & 0b011) { - case 0: - if (dec->cfg && !dec->cfg->ext_zcmt) { - break; - } - if (((inst >> 2) & 0xFF) >=3D 32) { - op =3D rv_op_cm_jalt; - } else { - op =3D rv_op_cm_jt; - } + } + switch ((inst >> 10) & 0b011) { + case 0: + if (!dec->cfg->ext_zcmt) { break; - case 3: - if (dec->cfg && !dec->cfg->ext_zcmp) { - break; - } - switch ((inst >> 5) & 0b011) { - case 1: op =3D rv_op_cm_mvsa01; break; - case 3: op =3D rv_op_cm_mva01s; break; - } + } + if (((inst >> 2) & 0xFF) >=3D 32) { + return &op_cm_jalt; + } + return &op_cm_jt; + case 3: + if (!dec->cfg->ext_zcmp) { break; } + switch ((inst >> 5) & 0b011) { + case 1: return &op_cm_mvsa01; + case 3: return &op_cm_mva01s; + } + break; } } - break; - case 6: op =3D rv_op_c_swsp; break; + return &op_c_fsdsp; + case 6: return &op_c_swsp; case 7: if (isa =3D=3D rv32) { - op =3D rv_op_c_fswsp; - } else { - op =3D rv_op_c_sdsp; + return &op_c_fswsp; } - break; + return &op_c_sdsp; } break; case 3: switch ((inst >> 2) & 0b11111) { case 0: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_lb; break; - case 1: op =3D rv_op_lh; break; - case 2: op =3D rv_op_lw; break; - case 3: op =3D rv_op_ld; break; - case 4: op =3D rv_op_lbu; break; - case 5: op =3D rv_op_lhu; break; - case 6: op =3D rv_op_lwu; break; - case 7: op =3D rv_op_ldu; break; + case 0: return &op_lb; + case 1: return &op_lh; + case 2: return &op_lw; + case 3: return &op_ld; + case 4: return &op_lbu; + case 5: return &op_lhu; + case 6: return &op_lwu; + case 7: return &op_ldu; } break; case 1: switch ((inst >> 12) & 0b111) { case 0: switch ((inst >> 20) & 0b111111111111) { - case 40: op =3D rv_op_vl1re8_v; break; - case 552: op =3D rv_op_vl2re8_v; break; - case 1576: op =3D rv_op_vl4re8_v; break; - case 3624: op =3D rv_op_vl8re8_v; break; + case 40: return &op_vl1re8_v; + case 552: return &op_vl2re8_v; + case 1576: return &op_vl4re8_v; + case 3624: return &op_vl8re8_v; } switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vle8_v; break; - case 11: op =3D rv_op_vlm_v; break; - case 16: op =3D rv_op_vle8ff_v; break; + case 0: return &op_vle8_v; + case 11: return &op_vlm_v; + case 16: return &op_vle8ff_v; } break; - case 1: op =3D rv_op_vluxei8_v; break; - case 2: op =3D rv_op_vlse8_v; break; - case 3: op =3D rv_op_vloxei8_v; break; + case 1: return &op_vluxei8_v; + case 2: return &op_vlse8_v; + case 3: return &op_vloxei8_v; } break; - case 1: op =3D rv_op_flh; break; - case 2: op =3D rv_op_flw; break; - case 3: op =3D rv_op_fld; break; - case 4: op =3D rv_op_flq; break; + case 1: return &op_flh; + case 2: return &op_flw; + case 3: return &op_fld; + case 4: return &op_flq; case 5: switch ((inst >> 20) & 0b111111111111) { - case 40: op =3D rv_op_vl1re16_v; break; - case 552: op =3D rv_op_vl2re16_v; break; - case 1576: op =3D rv_op_vl4re16_v; break; - case 3624: op =3D rv_op_vl8re16_v; break; + case 40: return &op_vl1re16_v; + case 552: return &op_vl2re16_v; + case 1576: return &op_vl4re16_v; + case 3624: return &op_vl8re16_v; } switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vle16_v; break; - case 16: op =3D rv_op_vle16ff_v; break; + case 0: return &op_vle16_v; + case 16: return &op_vle16ff_v; } break; - case 1: op =3D rv_op_vluxei16_v; break; - case 2: op =3D rv_op_vlse16_v; break; - case 3: op =3D rv_op_vloxei16_v; break; + case 1: return &op_vluxei16_v; + case 2: return &op_vlse16_v; + case 3: return &op_vloxei16_v; } break; case 6: switch ((inst >> 20) & 0b111111111111) { - case 40: op =3D rv_op_vl1re32_v; break; - case 552: op =3D rv_op_vl2re32_v; break; - case 1576: op =3D rv_op_vl4re32_v; break; - case 3624: op =3D rv_op_vl8re32_v; break; + case 40: return &op_vl1re32_v; + case 552: return &op_vl2re32_v; + case 1576: return &op_vl4re32_v; + case 3624: return &op_vl8re32_v; } switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vle32_v; break; - case 16: op =3D rv_op_vle32ff_v; break; + case 0: return &op_vle32_v; + case 16: return &op_vle32ff_v; } break; - case 1: op =3D rv_op_vluxei32_v; break; - case 2: op =3D rv_op_vlse32_v; break; - case 3: op =3D rv_op_vloxei32_v; break; + case 1: return &op_vluxei32_v; + case 2: return &op_vlse32_v; + case 3: return &op_vloxei32_v; } break; case 7: switch ((inst >> 20) & 0b111111111111) { - case 40: op =3D rv_op_vl1re64_v; break; - case 552: op =3D rv_op_vl2re64_v; break; - case 1576: op =3D rv_op_vl4re64_v; break; - case 3624: op =3D rv_op_vl8re64_v; break; + case 40: return &op_vl1re64_v; + case 552: return &op_vl2re64_v; + case 1576: return &op_vl4re64_v; + case 3624: return &op_vl8re64_v; } switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vle64_v; break; - case 16: op =3D rv_op_vle64ff_v; break; + case 0: return &op_vle64_v; + case 16: return &op_vle64ff_v; } break; - case 1: op =3D rv_op_vluxei64_v; break; - case 2: op =3D rv_op_vlse64_v; break; - case 3: op =3D rv_op_vloxei64_v; break; + case 1: return &op_vluxei64_v; + case 2: return &op_vlse64_v; + case 3: return &op_vloxei64_v; } break; } break; case 3: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fence; break; - case 1: op =3D rv_op_fence_i; break; + case 0: return &op_fence; + case 1: return &op_fence_i; case 2: /* * 'lq' shares the "(...) 010 ..... 0001111" opcode space @@ -1320,204 +1292,203 @@ static const rv_opcode_data *decode_inst_opcode(r= v_decode *dec, rv_isa isa) * Anything that doesn't match these will default to 'lq'. */ switch ((inst >> 17) & 0b11111) { - case 0: op =3D rv_op_cbo_inval; break; - case 1: op =3D rv_op_cbo_clean; break; - case 2: op =3D rv_op_cbo_flush; break; - case 4: op =3D rv_op_cbo_zero; break; - default: op =3D rv_op_lq; break; + case 0: return &op_cbo_inval; + case 1: return &op_cbo_clean; + case 2: return &op_cbo_flush; + case 4: return &op_cbo_zero; + default: return &op_lq; } } break; case 4: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_addi; break; + case 0: return &op_addi; case 1: switch ((inst >> 27) & 0b11111) { - case 0b00000: op =3D rv_op_slli; break; + case 0b00000: return &op_slli; case 0b00001: switch ((inst >> 20) & 0b1111111) { - case 0b0001111: op =3D rv_op_zip; break; + case 0b0001111: return &op_zip; } break; case 0b00010: switch ((inst >> 20) & 0b1111111) { - case 0b0000000: op =3D rv_op_sha256sum0; break; - case 0b0000001: op =3D rv_op_sha256sum1; break; - case 0b0000010: op =3D rv_op_sha256sig0; break; - case 0b0000011: op =3D rv_op_sha256sig1; break; - case 0b0000100: op =3D rv_op_sha512sum0; break; - case 0b0000101: op =3D rv_op_sha512sum1; break; - case 0b0000110: op =3D rv_op_sha512sig0; break; - case 0b0000111: op =3D rv_op_sha512sig1; break; - case 0b0001000: op =3D rv_op_sm3p0; break; - case 0b0001001: op =3D rv_op_sm3p1; break; + case 0b0000000: return &op_sha256sum0; + case 0b0000001: return &op_sha256sum1; + case 0b0000010: return &op_sha256sig0; + case 0b0000011: return &op_sha256sig1; + case 0b0000100: return &op_sha512sum0; + case 0b0000101: return &op_sha512sum1; + case 0b0000110: return &op_sha512sig0; + case 0b0000111: return &op_sha512sig1; + case 0b0001000: return &op_sm3p0; + case 0b0001001: return &op_sm3p1; } break; - case 0b00101: op =3D rv_op_bseti; break; + case 0b00101: return &op_bseti; case 0b00110: switch ((inst >> 20) & 0b1111111) { - case 0b0000000: op =3D rv_op_aes64im; break; + case 0b0000000: return &op_aes64im; default: if (((inst >> 24) & 0b0111) =3D=3D 0b001) { - op =3D rv_op_aes64ks1i; + return &op_aes64ks1i; } break; } break; - case 0b01001: op =3D rv_op_bclri; break; - case 0b01101: op =3D rv_op_binvi; break; + case 0b01001: return &op_bclri; + case 0b01101: return &op_binvi; case 0b01100: switch ((inst >> 20) & 0b1111111) { - case 0b0000000: op =3D rv_op_clz; break; - case 0b0000001: op =3D rv_op_ctz; break; - case 0b0000010: op =3D rv_op_cpop; break; + case 0b0000000: return &op_clz; + case 0b0000001: return &op_ctz; + case 0b0000010: return &op_cpop; /* 0b0000011 */ - case 0b0000100: op =3D rv_op_sext_b; break; - case 0b0000101: op =3D rv_op_sext_h; break; + case 0b0000100: return &op_sext_b; + case 0b0000101: return &op_sext_h; } break; } break; - case 2: op =3D rv_op_slti; break; - case 3: op =3D rv_op_sltiu; break; - case 4: op =3D rv_op_xori; break; + case 2: return &op_slti; + case 3: return &op_sltiu; + case 4: return &op_xori; case 5: switch ((inst >> 27) & 0b11111) { - case 0b00000: op =3D rv_op_srli; break; + case 0b00000: return &op_srli; case 0b00001: switch ((inst >> 20) & 0b1111111) { - case 0b0001111: op =3D rv_op_unzip; break; + case 0b0001111: return &op_unzip; } break; - case 0b00101: op =3D rv_op_orc_b; break; - case 0b01000: op =3D rv_op_srai; break; - case 0b01001: op =3D rv_op_bexti; break; - case 0b01100: op =3D rv_op_rori; break; + case 0b00101: return &op_orc_b; + case 0b01000: return &op_srai; + case 0b01001: return &op_bexti; + case 0b01100: return &op_rori; case 0b01101: switch ((inst >> 20) & 0b1111111) { case 0b0011000: if (isa =3D=3D rv32) { - op =3D rv_op_rev8; + return &op_rev8; } break; case 0b0111000: if (isa =3D=3D rv64) { - op =3D rv_op_rev8; + return &op_rev8; } break; - case 0b0000111: op =3D rv_op_brev8; break; + case 0b0000111: return &op_brev8; } break; } break; - case 6: op =3D rv_op_ori; break; - case 7: op =3D rv_op_andi; break; + case 6: return &op_ori; + case 7: return &op_andi; } break; case 5: - op =3D rv_op_auipc; if (dec->cfg && dec->cfg->ext_zicfilp && (((inst >> 7) & 0b11111) =3D=3D 0b00000)) { - op =3D rv_op_lpad; + return &op_lpad; } - break; + return &op_auipc; case 6: /* OP-IMM-32 */ if (isa =3D=3D rv32) { break; } switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_addiw; break; + case 0: return &op_addiw; case 1: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_slliw; break; - case 2: op =3D rv_op_slli_uw; break; + case 0: return &op_slliw; + case 2: return &op_slli_uw; case 24: switch ((inst >> 20) & 0b11111) { - case 0b00000: op =3D rv_op_clzw; break; - case 0b00001: op =3D rv_op_ctzw; break; - case 0b00010: op =3D rv_op_cpopw; break; + case 0b00000: return &op_clzw; + case 0b00001: return &op_ctzw; + case 0b00010: return &op_cpopw; } break; } break; case 5: switch ((inst >> 25) & 0b1111111) { - case 0: op =3D rv_op_srliw; break; - case 32: op =3D rv_op_sraiw; break; - case 48: op =3D rv_op_roriw; break; + case 0: return &op_srliw; + case 32: return &op_sraiw; + case 48: return &op_roriw; } break; } break; case 8: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_sb; break; - case 1: op =3D rv_op_sh; break; - case 2: op =3D rv_op_sw; break; - case 3: op =3D rv_op_sd; break; - case 4: op =3D rv_op_sq; break; + case 0: return &op_sb; + case 1: return &op_sh; + case 2: return &op_sw; + case 3: return &op_sd; + case 4: return &op_sq; } break; case 9: switch ((inst >> 12) & 0b111) { case 0: switch ((inst >> 20) & 0b111111111111) { - case 40: op =3D rv_op_vs1r_v; break; - case 552: op =3D rv_op_vs2r_v; break; - case 1576: op =3D rv_op_vs4r_v; break; - case 3624: op =3D rv_op_vs8r_v; break; + case 40: return &op_vs1r_v; + case 552: return &op_vs2r_v; + case 1576: return &op_vs4r_v; + case 3624: return &op_vs8r_v; } switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vse8_v; break; - case 11: op =3D rv_op_vsm_v; break; + case 0: return &op_vse8_v; + case 11: return &op_vsm_v; } break; - case 1: op =3D rv_op_vsuxei8_v; break; - case 2: op =3D rv_op_vsse8_v; break; - case 3: op =3D rv_op_vsoxei8_v; break; + case 1: return &op_vsuxei8_v; + case 2: return &op_vsse8_v; + case 3: return &op_vsoxei8_v; } break; - case 1: op =3D rv_op_fsh; break; - case 2: op =3D rv_op_fsw; break; - case 3: op =3D rv_op_fsd; break; - case 4: op =3D rv_op_fsq; break; + case 1: return &op_fsh; + case 2: return &op_fsw; + case 3: return &op_fsd; + case 4: return &op_fsq; case 5: switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vse16_v; break; + case 0: return &op_vse16_v; } break; - case 1: op =3D rv_op_vsuxei16_v; break; - case 2: op =3D rv_op_vsse16_v; break; - case 3: op =3D rv_op_vsoxei16_v; break; + case 1: return &op_vsuxei16_v; + case 2: return &op_vsse16_v; + case 3: return &op_vsoxei16_v; } break; case 6: switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vse32_v; break; + case 0: return &op_vse32_v; } break; - case 1: op =3D rv_op_vsuxei32_v; break; - case 2: op =3D rv_op_vsse32_v; break; - case 3: op =3D rv_op_vsoxei32_v; break; + case 1: return &op_vsuxei32_v; + case 2: return &op_vsse32_v; + case 3: return &op_vsoxei32_v; } break; case 7: switch ((inst >> 26) & 0b111) { case 0: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_vse64_v; break; + case 0: return &op_vse64_v; } break; - case 1: op =3D rv_op_vsuxei64_v; break; - case 2: op =3D rv_op_vsse64_v; break; - case 3: op =3D rv_op_vsoxei64_v; break; + case 1: return &op_vsuxei64_v; + case 2: return &op_vsse64_v; + case 3: return &op_vsoxei64_v; } break; } @@ -1525,153 +1496,150 @@ static const rv_opcode_data *decode_inst_opcode(r= v_decode *dec, rv_isa isa) case 11: switch (((inst >> 24) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_amoadd_b; break; - case 1: op =3D rv_op_amoadd_h; break; - case 2: op =3D rv_op_amoadd_w; break; - case 3: op =3D rv_op_amoadd_d; break; - case 4: op =3D rv_op_amoadd_q; break; - case 8: op =3D rv_op_amoswap_b; break; - case 9: op =3D rv_op_amoswap_h; break; - case 10: op =3D rv_op_amoswap_w; break; - case 11: op =3D rv_op_amoswap_d; break; - case 12: op =3D rv_op_amoswap_q; break; + case 0: return &op_amoadd_b; + case 1: return &op_amoadd_h; + case 2: return &op_amoadd_w; + case 3: return &op_amoadd_d; + case 4: return &op_amoadd_q; + case 8: return &op_amoswap_b; + case 9: return &op_amoswap_h; + case 10: return &op_amoswap_w; + case 11: return &op_amoswap_d; + case 12: return &op_amoswap_q; case 18: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_lr_w; break; + case 0: return &op_lr_w; } break; case 19: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_lr_d; break; + case 0: return &op_lr_d; } break; case 20: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_lr_q; break; - } - break; - case 26: op =3D rv_op_sc_w; break; - case 27: op =3D rv_op_sc_d; break; - case 28: op =3D rv_op_sc_q; break; - case 32: op =3D rv_op_amoxor_b; break; - case 33: op =3D rv_op_amoxor_h; break; - case 34: op =3D rv_op_amoxor_w; break; - case 35: op =3D rv_op_amoxor_d; break; - case 36: op =3D rv_op_amoxor_q; break; - case 40: op =3D rv_op_amocas_b; break; - case 41: op =3D rv_op_amocas_h; break; - case 42: op =3D rv_op_amocas_w; break; - case 43: op =3D rv_op_amocas_d; break; - case 44: op =3D rv_op_amocas_q; break; - case 64: op =3D rv_op_amoor_b; break; - case 65: op =3D rv_op_amoor_h; break; - case 66: op =3D rv_op_amoor_w; break; - case 67: op =3D rv_op_amoor_d; break; - case 68: op =3D rv_op_amoor_q; break; - case 74: op =3D rv_op_ssamoswap_w; break; - case 75: op =3D rv_op_ssamoswap_d; break; - case 96: op =3D rv_op_amoand_b; break; - case 97: op =3D rv_op_amoand_h; break; - case 98: op =3D rv_op_amoand_w; break; - case 99: op =3D rv_op_amoand_d; break; - case 100: op =3D rv_op_amoand_q; break; - case 128: op =3D rv_op_amomin_b; break; - case 129: op =3D rv_op_amomin_h; break; - case 130: op =3D rv_op_amomin_w; break; - case 131: op =3D rv_op_amomin_d; break; - case 132: op =3D rv_op_amomin_q; break; - case 160: op =3D rv_op_amomax_b; break; - case 161: op =3D rv_op_amomax_h; break; - case 162: op =3D rv_op_amomax_w; break; - case 163: op =3D rv_op_amomax_d; break; - case 164: op =3D rv_op_amomax_q; break; - case 192: op =3D rv_op_amominu_b; break; - case 193: op =3D rv_op_amominu_h; break; - case 194: op =3D rv_op_amominu_w; break; - case 195: op =3D rv_op_amominu_d; break; - case 196: op =3D rv_op_amominu_q; break; - case 224: op =3D rv_op_amomaxu_b; break; - case 225: op =3D rv_op_amomaxu_h; break; - case 226: op =3D rv_op_amomaxu_w; break; - case 227: op =3D rv_op_amomaxu_d; break; - case 228: op =3D rv_op_amomaxu_q; break; + case 0: return &op_lr_q; + } + break; + case 26: return &op_sc_w; + case 27: return &op_sc_d; + case 28: return &op_sc_q; + case 32: return &op_amoxor_b; + case 33: return &op_amoxor_h; + case 34: return &op_amoxor_w; + case 35: return &op_amoxor_d; + case 36: return &op_amoxor_q; + case 40: return &op_amocas_b; + case 41: return &op_amocas_h; + case 42: return &op_amocas_w; + case 43: return &op_amocas_d; + case 44: return &op_amocas_q; + case 64: return &op_amoor_b; + case 65: return &op_amoor_h; + case 66: return &op_amoor_w; + case 67: return &op_amoor_d; + case 68: return &op_amoor_q; + case 74: return &op_ssamoswap_w; + case 75: return &op_ssamoswap_d; + case 96: return &op_amoand_b; + case 97: return &op_amoand_h; + case 98: return &op_amoand_w; + case 99: return &op_amoand_d; + case 100: return &op_amoand_q; + case 128: return &op_amomin_b; + case 129: return &op_amomin_h; + case 130: return &op_amomin_w; + case 131: return &op_amomin_d; + case 132: return &op_amomin_q; + case 160: return &op_amomax_b; + case 161: return &op_amomax_h; + case 162: return &op_amomax_w; + case 163: return &op_amomax_d; + case 164: return &op_amomax_q; + case 192: return &op_amominu_b; + case 193: return &op_amominu_h; + case 194: return &op_amominu_w; + case 195: return &op_amominu_d; + case 196: return &op_amominu_q; + case 224: return &op_amomaxu_b; + case 225: return &op_amomaxu_h; + case 226: return &op_amomaxu_w; + case 227: return &op_amomaxu_d; + case 228: return &op_amomaxu_q; } break; case 12: switch (((inst >> 22) & 0b1111111000) | ((inst >> 12) & 0b0000000111)) { - case 0: op =3D rv_op_add; break; - case 1: op =3D rv_op_sll; break; - case 2: op =3D rv_op_slt; break; - case 3: op =3D rv_op_sltu; break; - case 4: op =3D rv_op_xor; break; - case 5: op =3D rv_op_srl; break; - case 6: op =3D rv_op_or; break; - case 7: op =3D rv_op_and; break; - case 8: op =3D rv_op_mul; break; - case 9: op =3D rv_op_mulh; break; - case 10: op =3D rv_op_mulhsu; break; - case 11: op =3D rv_op_mulhu; break; - case 12: op =3D rv_op_div; break; - case 13: op =3D rv_op_divu; break; - case 14: op =3D rv_op_rem; break; - case 15: op =3D rv_op_remu; break; + case 0: return &op_add; + case 1: return &op_sll; + case 2: return &op_slt; + case 3: return &op_sltu; + case 4: return &op_xor; + case 5: return &op_srl; + case 6: return &op_or; + case 7: return &op_and; + case 8: return &op_mul; + case 9: return &op_mulh; + case 10: return &op_mulhsu; + case 11: return &op_mulhu; + case 12: return &op_div; + case 13: return &op_divu; + case 14: return &op_rem; + case 15: return &op_remu; case 36: if (isa =3D=3D rv32 && !((inst >> 20) & 0b11111)) { - op =3D rv_op_zext_h; - } else { - op =3D rv_op_pack; - } - break; - case 39: op =3D rv_op_packh; break; - - case 41: op =3D rv_op_clmul; break; - case 42: op =3D rv_op_clmulr; break; - case 43: op =3D rv_op_clmulh; break; - case 44: op =3D rv_op_min; break; - case 45: op =3D rv_op_minu; break; - case 46: op =3D rv_op_max; break; - case 47: op =3D rv_op_maxu; break; - case 075: op =3D rv_op_czero_eqz; break; - case 077: op =3D rv_op_czero_nez; break; - case 130: op =3D rv_op_sh1add; break; - case 132: op =3D rv_op_sh2add; break; - case 134: op =3D rv_op_sh3add; break; - case 161: op =3D rv_op_bset; break; - case 162: op =3D rv_op_xperm4; break; - case 164: op =3D rv_op_xperm8; break; - case 200: op =3D rv_op_aes64es; break; - case 216: op =3D rv_op_aes64esm; break; - case 232: op =3D rv_op_aes64ds; break; - case 248: op =3D rv_op_aes64dsm; break; - case 256: op =3D rv_op_sub; break; - case 260: op =3D rv_op_xnor; break; - case 261: op =3D rv_op_sra; break; - case 262: op =3D rv_op_orn; break; - case 263: op =3D rv_op_andn; break; - case 289: op =3D rv_op_bclr; break; - case 293: op =3D rv_op_bext; break; - case 320: op =3D rv_op_sha512sum0r; break; - case 328: op =3D rv_op_sha512sum1r; break; - case 336: op =3D rv_op_sha512sig0l; break; - case 344: op =3D rv_op_sha512sig1l; break; - case 368: op =3D rv_op_sha512sig0h; break; - case 376: op =3D rv_op_sha512sig1h; break; - case 385: op =3D rv_op_rol; break; - case 389: op =3D rv_op_ror; break; - case 417: op =3D rv_op_binv; break; - case 504: op =3D rv_op_aes64ks2; break; + return &op_zext_h; + } + return &op_pack; + case 39: return &op_packh; + case 41: return &op_clmul; + case 42: return &op_clmulr; + case 43: return &op_clmulh; + case 44: return &op_min; + case 45: return &op_minu; + case 46: return &op_max; + case 47: return &op_maxu; + case 075: return &op_czero_eqz; + case 077: return &op_czero_nez; + case 130: return &op_sh1add; + case 132: return &op_sh2add; + case 134: return &op_sh3add; + case 161: return &op_bset; + case 162: return &op_xperm4; + case 164: return &op_xperm8; + case 200: return &op_aes64es; + case 216: return &op_aes64esm; + case 232: return &op_aes64ds; + case 248: return &op_aes64dsm; + case 256: return &op_sub; + case 260: return &op_xnor; + case 261: return &op_sra; + case 262: return &op_orn; + case 263: return &op_andn; + case 289: return &op_bclr; + case 293: return &op_bext; + case 320: return &op_sha512sum0r; + case 328: return &op_sha512sum1r; + case 336: return &op_sha512sig0l; + case 344: return &op_sha512sig1l; + case 368: return &op_sha512sig0h; + case 376: return &op_sha512sig1h; + case 385: return &op_rol; + case 389: return &op_ror; + case 417: return &op_binv; + case 504: return &op_aes64ks2; } switch ((inst >> 25) & 0b0011111) { - case 17: op =3D rv_op_aes32esi; break; - case 19: op =3D rv_op_aes32esmi; break; - case 21: op =3D rv_op_aes32dsi; break; - case 23: op =3D rv_op_aes32dsmi; break; - case 24: op =3D rv_op_sm4ed; break; - case 26: op =3D rv_op_sm4ks; break; + case 17: return &op_aes32esi; + case 19: return &op_aes32esmi; + case 21: return &op_aes32dsi; + case 23: return &op_aes32dsmi; + case 24: return &op_sm4ed; + case 26: return &op_sm4ks; } break; - case 13: op =3D rv_op_lui; break; + case 13: return &op_lui; case 14: /* OP-32 */ if (isa =3D=3D rv32) { @@ -1679,317 +1647,317 @@ static const rv_opcode_data *decode_inst_opcode(r= v_decode *dec, rv_isa isa) } switch (((inst >> 22) & 0b1111111000) | ((inst >> 12) & 0b0000000111)) { - case 0: op =3D rv_op_addw; break; - case 1: op =3D rv_op_sllw; break; - case 5: op =3D rv_op_srlw; break; - case 8: op =3D rv_op_mulw; break; - case 12: op =3D rv_op_divw; break; - case 13: op =3D rv_op_divuw; break; - case 14: op =3D rv_op_remw; break; - case 15: op =3D rv_op_remuw; break; - case 32: op =3D rv_op_add_uw; break; + case 0: return &op_addw; + case 1: return &op_sllw; + case 5: return &op_srlw; + case 8: return &op_mulw; + case 12: return &op_divw; + case 13: return &op_divuw; + case 14: return &op_remw; + case 15: return &op_remuw; + case 32: return &op_add_uw; case 36: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_zext_h; break; - default: op =3D rv_op_packw; break; + case 0: return &op_zext_h; + default: return &op_packw; } break; - case 130: op =3D rv_op_sh1add_uw; break; - case 132: op =3D rv_op_sh2add_uw; break; - case 134: op =3D rv_op_sh3add_uw; break; - case 256: op =3D rv_op_subw; break; - case 261: op =3D rv_op_sraw; break; - case 385: op =3D rv_op_rolw; break; - case 389: op =3D rv_op_rorw; break; + case 130: return &op_sh1add_uw; + case 132: return &op_sh2add_uw; + case 134: return &op_sh3add_uw; + case 256: return &op_subw; + case 261: return &op_sraw; + case 385: return &op_rolw; + case 389: return &op_rorw; } break; case 16: switch ((inst >> 25) & 0b11) { - case 0: op =3D rv_op_fmadd_s; break; - case 1: op =3D rv_op_fmadd_d; break; - case 3: op =3D rv_op_fmadd_q; break; + case 0: return &op_fmadd_s; + case 1: return &op_fmadd_d; + case 3: return &op_fmadd_q; } break; case 17: switch ((inst >> 25) & 0b11) { - case 0: op =3D rv_op_fmsub_s; break; - case 1: op =3D rv_op_fmsub_d; break; - case 3: op =3D rv_op_fmsub_q; break; + case 0: return &op_fmsub_s; + case 1: return &op_fmsub_d; + case 3: return &op_fmsub_q; } break; case 18: switch ((inst >> 25) & 0b11) { - case 0: op =3D rv_op_fnmsub_s; break; - case 1: op =3D rv_op_fnmsub_d; break; - case 3: op =3D rv_op_fnmsub_q; break; + case 0: return &op_fnmsub_s; + case 1: return &op_fnmsub_d; + case 3: return &op_fnmsub_q; } break; case 19: switch ((inst >> 25) & 0b11) { - case 0: op =3D rv_op_fnmadd_s; break; - case 1: op =3D rv_op_fnmadd_d; break; - case 3: op =3D rv_op_fnmadd_q; break; + case 0: return &op_fnmadd_s; + case 1: return &op_fnmadd_d; + case 3: return &op_fnmadd_q; } break; case 20: switch ((inst >> 25) & 0b1111111) { - case 0: op =3D rv_op_fadd_s; break; - case 1: op =3D rv_op_fadd_d; break; - case 3: op =3D rv_op_fadd_q; break; - case 4: op =3D rv_op_fsub_s; break; - case 5: op =3D rv_op_fsub_d; break; - case 7: op =3D rv_op_fsub_q; break; - case 8: op =3D rv_op_fmul_s; break; - case 9: op =3D rv_op_fmul_d; break; - case 11: op =3D rv_op_fmul_q; break; - case 12: op =3D rv_op_fdiv_s; break; - case 13: op =3D rv_op_fdiv_d; break; - case 15: op =3D rv_op_fdiv_q; break; + case 0: return &op_fadd_s; + case 1: return &op_fadd_d; + case 3: return &op_fadd_q; + case 4: return &op_fsub_s; + case 5: return &op_fsub_d; + case 7: return &op_fsub_q; + case 8: return &op_fmul_s; + case 9: return &op_fmul_d; + case 11: return &op_fmul_q; + case 12: return &op_fdiv_s; + case 13: return &op_fdiv_d; + case 15: return &op_fdiv_q; case 16: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fsgnj_s; break; - case 1: op =3D rv_op_fsgnjn_s; break; - case 2: op =3D rv_op_fsgnjx_s; break; + case 0: return &op_fsgnj_s; + case 1: return &op_fsgnjn_s; + case 2: return &op_fsgnjx_s; } break; case 17: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fsgnj_d; break; - case 1: op =3D rv_op_fsgnjn_d; break; - case 2: op =3D rv_op_fsgnjx_d; break; + case 0: return &op_fsgnj_d; + case 1: return &op_fsgnjn_d; + case 2: return &op_fsgnjx_d; } break; case 19: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fsgnj_q; break; - case 1: op =3D rv_op_fsgnjn_q; break; - case 2: op =3D rv_op_fsgnjx_q; break; + case 0: return &op_fsgnj_q; + case 1: return &op_fsgnjn_q; + case 2: return &op_fsgnjx_q; } break; case 20: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fmin_s; break; - case 1: op =3D rv_op_fmax_s; break; - case 2: op =3D rv_op_fminm_s; break; - case 3: op =3D rv_op_fmaxm_s; break; + case 0: return &op_fmin_s; + case 1: return &op_fmax_s; + case 2: return &op_fminm_s; + case 3: return &op_fmaxm_s; } break; case 21: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fmin_d; break; - case 1: op =3D rv_op_fmax_d; break; - case 2: op =3D rv_op_fminm_d; break; - case 3: op =3D rv_op_fmaxm_d; break; + case 0: return &op_fmin_d; + case 1: return &op_fmax_d; + case 2: return &op_fminm_d; + case 3: return &op_fmaxm_d; } break; case 22: switch (((inst >> 12) & 0b111)) { - case 2: op =3D rv_op_fminm_h; break; - case 3: op =3D rv_op_fmaxm_h; break; + case 2: return &op_fminm_h; + case 3: return &op_fmaxm_h; } break; case 23: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fmin_q; break; - case 1: op =3D rv_op_fmax_q; break; - case 2: op =3D rv_op_fminm_q; break; - case 3: op =3D rv_op_fmaxm_q; break; + case 0: return &op_fmin_q; + case 1: return &op_fmax_q; + case 2: return &op_fminm_q; + case 3: return &op_fmaxm_q; } break; case 32: switch ((inst >> 20) & 0b11111) { - case 1: op =3D rv_op_fcvt_s_d; break; - case 3: op =3D rv_op_fcvt_s_q; break; - case 4: op =3D rv_op_fround_s; break; - case 5: op =3D rv_op_froundnx_s; break; - case 6: op =3D rv_op_fcvt_s_bf16; break; + case 1: return &op_fcvt_s_d; + case 3: return &op_fcvt_s_q; + case 4: return &op_fround_s; + case 5: return &op_froundnx_s; + case 6: return &op_fcvt_s_bf16; } break; case 33: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_d_s; break; - case 3: op =3D rv_op_fcvt_d_q; break; - case 4: op =3D rv_op_fround_d; break; - case 5: op =3D rv_op_froundnx_d; break; + case 0: return &op_fcvt_d_s; + case 3: return &op_fcvt_d_q; + case 4: return &op_fround_d; + case 5: return &op_froundnx_d; } break; case 34: switch (((inst >> 20) & 0b11111)) { - case 4: op =3D rv_op_fround_h; break; - case 5: op =3D rv_op_froundnx_h; break; - case 8: op =3D rv_op_fcvt_bf16_s; break; + case 4: return &op_fround_h; + case 5: return &op_froundnx_h; + case 8: return &op_fcvt_bf16_s; } break; case 35: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_q_s; break; - case 1: op =3D rv_op_fcvt_q_d; break; - case 4: op =3D rv_op_fround_q; break; - case 5: op =3D rv_op_froundnx_q; break; + case 0: return &op_fcvt_q_s; + case 1: return &op_fcvt_q_d; + case 4: return &op_fround_q; + case 5: return &op_froundnx_q; } break; case 44: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fsqrt_s; break; + case 0: return &op_fsqrt_s; } break; case 45: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fsqrt_d; break; + case 0: return &op_fsqrt_d; } break; case 47: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fsqrt_q; break; + case 0: return &op_fsqrt_q; } break; case 80: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fle_s; break; - case 1: op =3D rv_op_flt_s; break; - case 2: op =3D rv_op_feq_s; break; - case 4: op =3D rv_op_fleq_s; break; - case 5: op =3D rv_op_fltq_s; break; + case 0: return &op_fle_s; + case 1: return &op_flt_s; + case 2: return &op_feq_s; + case 4: return &op_fleq_s; + case 5: return &op_fltq_s; } break; case 81: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fle_d; break; - case 1: op =3D rv_op_flt_d; break; - case 2: op =3D rv_op_feq_d; break; - case 4: op =3D rv_op_fleq_d; break; - case 5: op =3D rv_op_fltq_d; break; + case 0: return &op_fle_d; + case 1: return &op_flt_d; + case 2: return &op_feq_d; + case 4: return &op_fleq_d; + case 5: return &op_fltq_d; } break; case 82: switch (((inst >> 12) & 0b111)) { - case 4: op =3D rv_op_fleq_h; break; - case 5: op =3D rv_op_fltq_h; break; + case 4: return &op_fleq_h; + case 5: return &op_fltq_h; } break; case 83: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_fle_q; break; - case 1: op =3D rv_op_flt_q; break; - case 2: op =3D rv_op_feq_q; break; - case 4: op =3D rv_op_fleq_q; break; - case 5: op =3D rv_op_fltq_q; break; + case 0: return &op_fle_q; + case 1: return &op_flt_q; + case 2: return &op_feq_q; + case 4: return &op_fleq_q; + case 5: return &op_fltq_q; } break; case 89: switch (((inst >> 12) & 0b111)) { - case 0: op =3D rv_op_fmvp_d_x; break; + case 0: return &op_fmvp_d_x; } break; case 91: switch (((inst >> 12) & 0b111)) { - case 0: op =3D rv_op_fmvp_q_x; break; + case 0: return &op_fmvp_q_x; } break; case 96: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_w_s; break; - case 1: op =3D rv_op_fcvt_wu_s; break; - case 2: op =3D rv_op_fcvt_l_s; break; - case 3: op =3D rv_op_fcvt_lu_s; break; + case 0: return &op_fcvt_w_s; + case 1: return &op_fcvt_wu_s; + case 2: return &op_fcvt_l_s; + case 3: return &op_fcvt_lu_s; } break; case 97: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_w_d; break; - case 1: op =3D rv_op_fcvt_wu_d; break; - case 2: op =3D rv_op_fcvt_l_d; break; - case 3: op =3D rv_op_fcvt_lu_d; break; - case 8: op =3D rv_op_fcvtmod_w_d; break; + case 0: return &op_fcvt_w_d; + case 1: return &op_fcvt_wu_d; + case 2: return &op_fcvt_l_d; + case 3: return &op_fcvt_lu_d; + case 8: return &op_fcvtmod_w_d; } break; case 99: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_w_q; break; - case 1: op =3D rv_op_fcvt_wu_q; break; - case 2: op =3D rv_op_fcvt_l_q; break; - case 3: op =3D rv_op_fcvt_lu_q; break; + case 0: return &op_fcvt_w_q; + case 1: return &op_fcvt_wu_q; + case 2: return &op_fcvt_l_q; + case 3: return &op_fcvt_lu_q; } break; case 104: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_s_w; break; - case 1: op =3D rv_op_fcvt_s_wu; break; - case 2: op =3D rv_op_fcvt_s_l; break; - case 3: op =3D rv_op_fcvt_s_lu; break; + case 0: return &op_fcvt_s_w; + case 1: return &op_fcvt_s_wu; + case 2: return &op_fcvt_s_l; + case 3: return &op_fcvt_s_lu; } break; case 105: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_d_w; break; - case 1: op =3D rv_op_fcvt_d_wu; break; - case 2: op =3D rv_op_fcvt_d_l; break; - case 3: op =3D rv_op_fcvt_d_lu; break; + case 0: return &op_fcvt_d_w; + case 1: return &op_fcvt_d_wu; + case 2: return &op_fcvt_d_l; + case 3: return &op_fcvt_d_lu; } break; case 107: switch ((inst >> 20) & 0b11111) { - case 0: op =3D rv_op_fcvt_q_w; break; - case 1: op =3D rv_op_fcvt_q_wu; break; - case 2: op =3D rv_op_fcvt_q_l; break; - case 3: op =3D rv_op_fcvt_q_lu; break; + case 0: return &op_fcvt_q_w; + case 1: return &op_fcvt_q_wu; + case 2: return &op_fcvt_q_l; + case 3: return &op_fcvt_q_lu; } break; case 112: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_x_s; break; - case 1: op =3D rv_op_fclass_s; break; + case 0: return &op_fmv_x_s; + case 1: return &op_fclass_s; } break; case 113: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_x_d; break; - case 1: op =3D rv_op_fclass_d; break; - case 8: op =3D rv_op_fmvh_x_d; break; + case 0: return &op_fmv_x_d; + case 1: return &op_fclass_d; + case 8: return &op_fmvh_x_d; } break; case 114: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_x_h; break; + case 0: return &op_fmv_x_h; } break; case 115: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_x_q; break; - case 1: op =3D rv_op_fclass_q; break; - case 8: op =3D rv_op_fmvh_x_q; break; + case 0: return &op_fmv_x_q; + case 1: return &op_fclass_q; + case 8: return &op_fmvh_x_q; } break; case 120: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_s_x; break; - case 8: op =3D rv_op_fli_s; break; + case 0: return &op_fmv_s_x; + case 8: return &op_fli_s; } break; case 121: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_d_x; break; - case 8: op =3D rv_op_fli_d; break; + case 0: return &op_fmv_d_x; + case 8: return &op_fli_d; } break; case 122: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_h_x; break; - case 8: op =3D rv_op_fli_h; break; + case 0: return &op_fmv_h_x; + case 8: return &op_fli_h; } break; case 123: switch (((inst >> 17) & 0b11111000) | ((inst >> 12) & 0b00000111)) { - case 0: op =3D rv_op_fmv_q_x; break; - case 8: op =3D rv_op_fli_q; break; + case 0: return &op_fmv_q_x; + case 8: return &op_fli_q; } break; } @@ -1998,484 +1966,537 @@ static const rv_opcode_data *decode_inst_opcode(r= v_decode *dec, rv_isa isa) switch ((inst >> 12) & 0b111) { case 0: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_vadd_vv; break; - case 1: op =3D rv_op_vandn_vv; break; - case 2: op =3D rv_op_vsub_vv; break; - case 4: op =3D rv_op_vminu_vv; break; - case 5: op =3D rv_op_vmin_vv; break; - case 6: op =3D rv_op_vmaxu_vv; break; - case 7: op =3D rv_op_vmax_vv; break; - case 9: op =3D rv_op_vand_vv; break; - case 10: op =3D rv_op_vor_vv; break; - case 11: op =3D rv_op_vxor_vv; break; - case 12: op =3D rv_op_vrgather_vv; break; - case 14: op =3D rv_op_vrgatherei16_vv; break; + case 0: return &op_vadd_vv; + case 1: return &op_vandn_vv; + case 2: return &op_vsub_vv; + case 4: return &op_vminu_vv; + case 5: return &op_vmin_vv; + case 6: return &op_vmaxu_vv; + case 7: return &op_vmax_vv; + case 9: return &op_vand_vv; + case 10: return &op_vor_vv; + case 11: return &op_vxor_vv; + case 12: return &op_vrgather_vv; + case 14: return &op_vrgatherei16_vv; case 16: if (((inst >> 25) & 1) =3D=3D 0) { - op =3D rv_op_vadc_vvm; + return &op_vadc_vvm; } break; - case 17: op =3D rv_op_vmadc_vvm; break; + case 17: return &op_vmadc_vvm; case 18: if (((inst >> 25) & 1) =3D=3D 0) { - op =3D rv_op_vsbc_vvm; + return &op_vsbc_vvm; } break; - case 19: op =3D rv_op_vmsbc_vvm; break; - case 20: op =3D rv_op_vror_vv; break; - case 21: op =3D rv_op_vrol_vv; break; + case 19: return &op_vmsbc_vvm; + case 20: return &op_vror_vv; + case 21: return &op_vrol_vv; case 23: - if (((inst >> 20) & 0b111111) =3D=3D 32) - op =3D rv_op_vmv_v_v; - else if (((inst >> 25) & 1) =3D=3D 0) - op =3D rv_op_vmerge_vvm; + if (((inst >> 20) & 0b111111) =3D=3D 32) { + return &op_vmv_v_v; + } else if (((inst >> 25) & 1) =3D=3D 0) { + return &op_vmerge_vvm; + } break; - case 24: op =3D rv_op_vmseq_vv; break; - case 25: op =3D rv_op_vmsne_vv; break; - case 26: op =3D rv_op_vmsltu_vv; break; - case 27: op =3D rv_op_vmslt_vv; break; - case 28: op =3D rv_op_vmsleu_vv; break; - case 29: op =3D rv_op_vmsle_vv; break; - case 32: op =3D rv_op_vsaddu_vv; break; - case 33: op =3D rv_op_vsadd_vv; break; - case 34: op =3D rv_op_vssubu_vv; break; - case 35: op =3D rv_op_vssub_vv; break; - case 37: op =3D rv_op_vsll_vv; break; - case 39: op =3D rv_op_vsmul_vv; break; - case 40: op =3D rv_op_vsrl_vv; break; - case 41: op =3D rv_op_vsra_vv; break; - case 42: op =3D rv_op_vssrl_vv; break; - case 43: op =3D rv_op_vssra_vv; break; - case 44: op =3D rv_op_vnsrl_wv; break; - case 45: op =3D rv_op_vnsra_wv; break; - case 46: op =3D rv_op_vnclipu_wv; break; - case 47: op =3D rv_op_vnclip_wv; break; - case 48: op =3D rv_op_vwredsumu_vs; break; - case 49: op =3D rv_op_vwredsum_vs; break; - case 53: op =3D rv_op_vwsll_vv; break; + case 24: return &op_vmseq_vv; + case 25: return &op_vmsne_vv; + case 26: return &op_vmsltu_vv; + case 27: return &op_vmslt_vv; + case 28: return &op_vmsleu_vv; + case 29: return &op_vmsle_vv; + case 32: return &op_vsaddu_vv; + case 33: return &op_vsadd_vv; + case 34: return &op_vssubu_vv; + case 35: return &op_vssub_vv; + case 37: return &op_vsll_vv; + case 39: return &op_vsmul_vv; + case 40: return &op_vsrl_vv; + case 41: return &op_vsra_vv; + case 42: return &op_vssrl_vv; + case 43: return &op_vssra_vv; + case 44: return &op_vnsrl_wv; + case 45: return &op_vnsra_wv; + case 46: return &op_vnclipu_wv; + case 47: return &op_vnclip_wv; + case 48: return &op_vwredsumu_vs; + case 49: return &op_vwredsum_vs; + case 53: return &op_vwsll_vv; } break; case 1: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_vfadd_vv; break; - case 1: op =3D rv_op_vfredusum_vs; break; - case 2: op =3D rv_op_vfsub_vv; break; - case 3: op =3D rv_op_vfredosum_vs; break; - case 4: op =3D rv_op_vfmin_vv; break; - case 5: op =3D rv_op_vfredmin_vs; break; - case 6: op =3D rv_op_vfmax_vv; break; - case 7: op =3D rv_op_vfredmax_vs; break; - case 8: op =3D rv_op_vfsgnj_vv; break; - case 9: op =3D rv_op_vfsgnjn_vv; break; - case 10: op =3D rv_op_vfsgnjx_vv; break; + case 0: return &op_vfadd_vv; + case 1: return &op_vfredusum_vs; + case 2: return &op_vfsub_vv; + case 3: return &op_vfredosum_vs; + case 4: return &op_vfmin_vv; + case 5: return &op_vfredmin_vs; + case 6: return &op_vfmax_vv; + case 7: return &op_vfredmax_vs; + case 8: return &op_vfsgnj_vv; + case 9: return &op_vfsgnjn_vv; + case 10: return &op_vfsgnjx_vv; case 16: switch ((inst >> 15) & 0b11111) { - case 0: if ((inst >> 25) & 1) op =3D rv_op_vfmv_f_s; b= reak; + case 0: + if ((inst >> 25) & 1) { + return &op_vfmv_f_s; + } } break; case 18: switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_vfcvt_xu_f_v; break; - case 1: op =3D rv_op_vfcvt_x_f_v; break; - case 2: op =3D rv_op_vfcvt_f_xu_v; break; - case 3: op =3D rv_op_vfcvt_f_x_v; break; - case 6: op =3D rv_op_vfcvt_rtz_xu_f_v; break; - case 7: op =3D rv_op_vfcvt_rtz_x_f_v; break; - case 8: op =3D rv_op_vfwcvt_xu_f_v; break; - case 9: op =3D rv_op_vfwcvt_x_f_v; break; - case 10: op =3D rv_op_vfwcvt_f_xu_v; break; - case 11: op =3D rv_op_vfwcvt_f_x_v; break; - case 12: op =3D rv_op_vfwcvt_f_f_v; break; - case 13: op =3D rv_op_vfwcvtbf16_f_f_v; break; - case 14: op =3D rv_op_vfwcvt_rtz_xu_f_v; break; - case 15: op =3D rv_op_vfwcvt_rtz_x_f_v; break; - case 16: op =3D rv_op_vfncvt_xu_f_w; break; - case 17: op =3D rv_op_vfncvt_x_f_w; break; - case 18: op =3D rv_op_vfncvt_f_xu_w; break; - case 19: op =3D rv_op_vfncvt_f_x_w; break; - case 20: op =3D rv_op_vfncvt_f_f_w; break; - case 21: op =3D rv_op_vfncvt_rod_f_f_w; break; - case 22: op =3D rv_op_vfncvt_rtz_xu_f_w; break; - case 23: op =3D rv_op_vfncvt_rtz_x_f_w; break; - case 29: op =3D rv_op_vfncvtbf16_f_f_w; break; + case 0: return &op_vfcvt_xu_f_v; + case 1: return &op_vfcvt_x_f_v; + case 2: return &op_vfcvt_f_xu_v; + case 3: return &op_vfcvt_f_x_v; + case 6: return &op_vfcvt_rtz_xu_f_v; + case 7: return &op_vfcvt_rtz_x_f_v; + case 8: return &op_vfwcvt_xu_f_v; + case 9: return &op_vfwcvt_x_f_v; + case 10: return &op_vfwcvt_f_xu_v; + case 11: return &op_vfwcvt_f_x_v; + case 12: return &op_vfwcvt_f_f_v; + case 13: return &op_vfwcvtbf16_f_f_v; + case 14: return &op_vfwcvt_rtz_xu_f_v; + case 15: return &op_vfwcvt_rtz_x_f_v; + case 16: return &op_vfncvt_xu_f_w; + case 17: return &op_vfncvt_x_f_w; + case 18: return &op_vfncvt_f_xu_w; + case 19: return &op_vfncvt_f_x_w; + case 20: return &op_vfncvt_f_f_w; + case 21: return &op_vfncvt_rod_f_f_w; + case 22: return &op_vfncvt_rtz_xu_f_w; + case 23: return &op_vfncvt_rtz_x_f_w; + case 29: return &op_vfncvtbf16_f_f_w; } break; case 19: switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_vfsqrt_v; break; - case 4: op =3D rv_op_vfrsqrt7_v; break; - case 5: op =3D rv_op_vfrec7_v; break; - case 16: op =3D rv_op_vfclass_v; break; + case 0: return &op_vfsqrt_v; + case 4: return &op_vfrsqrt7_v; + case 5: return &op_vfrec7_v; + case 16: return &op_vfclass_v; } break; - case 24: op =3D rv_op_vmfeq_vv; break; - case 25: op =3D rv_op_vmfle_vv; break; - case 27: op =3D rv_op_vmflt_vv; break; - case 28: op =3D rv_op_vmfne_vv; break; - case 32: op =3D rv_op_vfdiv_vv; break; - case 36: op =3D rv_op_vfmul_vv; break; - case 40: op =3D rv_op_vfmadd_vv; break; - case 41: op =3D rv_op_vfnmadd_vv; break; - case 42: op =3D rv_op_vfmsub_vv; break; - case 43: op =3D rv_op_vfnmsub_vv; break; - case 44: op =3D rv_op_vfmacc_vv; break; - case 45: op =3D rv_op_vfnmacc_vv; break; - case 46: op =3D rv_op_vfmsac_vv; break; - case 47: op =3D rv_op_vfnmsac_vv; break; - case 48: op =3D rv_op_vfwadd_vv; break; - case 49: op =3D rv_op_vfwredusum_vs; break; - case 50: op =3D rv_op_vfwsub_vv; break; - case 51: op =3D rv_op_vfwredosum_vs; break; - case 52: op =3D rv_op_vfwadd_wv; break; - case 54: op =3D rv_op_vfwsub_wv; break; - case 56: op =3D rv_op_vfwmul_vv; break; - case 59: op =3D rv_op_vfwmaccbf16_vv; break; - case 60: op =3D rv_op_vfwmacc_vv; break; - case 61: op =3D rv_op_vfwnmacc_vv; break; - case 62: op =3D rv_op_vfwmsac_vv; break; - case 63: op =3D rv_op_vfwnmsac_vv; break; + case 24: return &op_vmfeq_vv; + case 25: return &op_vmfle_vv; + case 27: return &op_vmflt_vv; + case 28: return &op_vmfne_vv; + case 32: return &op_vfdiv_vv; + case 36: return &op_vfmul_vv; + case 40: return &op_vfmadd_vv; + case 41: return &op_vfnmadd_vv; + case 42: return &op_vfmsub_vv; + case 43: return &op_vfnmsub_vv; + case 44: return &op_vfmacc_vv; + case 45: return &op_vfnmacc_vv; + case 46: return &op_vfmsac_vv; + case 47: return &op_vfnmsac_vv; + case 48: return &op_vfwadd_vv; + case 49: return &op_vfwredusum_vs; + case 50: return &op_vfwsub_vv; + case 51: return &op_vfwredosum_vs; + case 52: return &op_vfwadd_wv; + case 54: return &op_vfwsub_wv; + case 56: return &op_vfwmul_vv; + case 59: return &op_vfwmaccbf16_vv; + case 60: return &op_vfwmacc_vv; + case 61: return &op_vfwnmacc_vv; + case 62: return &op_vfwmsac_vv; + case 63: return &op_vfwnmsac_vv; } break; case 2: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_vredsum_vs; break; - case 1: op =3D rv_op_vredand_vs; break; - case 2: op =3D rv_op_vredor_vs; break; - case 3: op =3D rv_op_vredxor_vs; break; - case 4: op =3D rv_op_vredminu_vs; break; - case 5: op =3D rv_op_vredmin_vs; break; - case 6: op =3D rv_op_vredmaxu_vs; break; - case 7: op =3D rv_op_vredmax_vs; break; - case 8: op =3D rv_op_vaaddu_vv; break; - case 9: op =3D rv_op_vaadd_vv; break; - case 10: op =3D rv_op_vasubu_vv; break; - case 11: op =3D rv_op_vasub_vv; break; - case 12: op =3D rv_op_vclmul_vv; break; - case 13: op =3D rv_op_vclmulh_vv; break; + case 0: return &op_vredsum_vs; + case 1: return &op_vredand_vs; + case 2: return &op_vredor_vs; + case 3: return &op_vredxor_vs; + case 4: return &op_vredminu_vs; + case 5: return &op_vredmin_vs; + case 6: return &op_vredmaxu_vs; + case 7: return &op_vredmax_vs; + case 8: return &op_vaaddu_vv; + case 9: return &op_vaadd_vv; + case 10: return &op_vasubu_vv; + case 11: return &op_vasub_vv; + case 12: return &op_vclmul_vv; + case 13: return &op_vclmulh_vv; case 16: switch ((inst >> 15) & 0b11111) { - case 0: if ((inst >> 25) & 1) op =3D rv_op_vmv_x_s; br= eak; - case 16: op =3D rv_op_vcpop_m; break; - case 17: op =3D rv_op_vfirst_m; break; + case 0: + if ((inst >> 25) & 1) { + return &op_vmv_x_s; + } + break; + case 16: return &op_vcpop_m; + case 17: return &op_vfirst_m; } break; case 18: switch ((inst >> 15) & 0b11111) { - case 2: op =3D rv_op_vzext_vf8; break; - case 3: op =3D rv_op_vsext_vf8; break; - case 4: op =3D rv_op_vzext_vf4; break; - case 5: op =3D rv_op_vsext_vf4; break; - case 6: op =3D rv_op_vzext_vf2; break; - case 7: op =3D rv_op_vsext_vf2; break; - case 8: op =3D rv_op_vbrev8_v; break; - case 9: op =3D rv_op_vrev8_v; break; - case 10: op =3D rv_op_vbrev_v; break; - case 12: op =3D rv_op_vclz_v; break; - case 13: op =3D rv_op_vctz_v; break; - case 14: op =3D rv_op_vcpop_v; break; + case 2: return &op_vzext_vf8; + case 3: return &op_vsext_vf8; + case 4: return &op_vzext_vf4; + case 5: return &op_vsext_vf4; + case 6: return &op_vzext_vf2; + case 7: return &op_vsext_vf2; + case 8: return &op_vbrev8_v; + case 9: return &op_vrev8_v; + case 10: return &op_vbrev_v; + case 12: return &op_vclz_v; + case 13: return &op_vctz_v; + case 14: return &op_vcpop_v; } break; case 20: switch ((inst >> 15) & 0b11111) { - case 1: op =3D rv_op_vmsbf_m; break; - case 2: op =3D rv_op_vmsof_m; break; - case 3: op =3D rv_op_vmsif_m; break; - case 16: op =3D rv_op_viota_m; break; + case 1: return &op_vmsbf_m; break; + case 2: return &op_vmsof_m; + case 3: return &op_vmsif_m; + case 16: return &op_viota_m; case 17: if (((inst >> 20) & 0b11111) =3D=3D 0) { - op =3D rv_op_vid_v; + return &op_vid_v; } break; } break; - case 23: if ((inst >> 25) & 1) op =3D rv_op_vcompress_vm; = break; - case 24: if ((inst >> 25) & 1) op =3D rv_op_vmandn_mm; bre= ak; - case 25: if ((inst >> 25) & 1) op =3D rv_op_vmand_mm; brea= k; - case 26: if ((inst >> 25) & 1) op =3D rv_op_vmor_mm; break; - case 27: if ((inst >> 25) & 1) op =3D rv_op_vmxor_mm; brea= k; - case 28: if ((inst >> 25) & 1) op =3D rv_op_vmorn_mm; brea= k; - case 29: if ((inst >> 25) & 1) op =3D rv_op_vmnand_mm; bre= ak; - case 30: if ((inst >> 25) & 1) op =3D rv_op_vmnor_mm; brea= k; - case 31: if ((inst >> 25) & 1) op =3D rv_op_vmxnor_mm; bre= ak; - case 32: op =3D rv_op_vdivu_vv; break; - case 33: op =3D rv_op_vdiv_vv; break; - case 34: op =3D rv_op_vremu_vv; break; - case 35: op =3D rv_op_vrem_vv; break; - case 36: op =3D rv_op_vmulhu_vv; break; - case 37: op =3D rv_op_vmul_vv; break; - case 38: op =3D rv_op_vmulhsu_vv; break; - case 39: op =3D rv_op_vmulh_vv; break; - case 41: op =3D rv_op_vmadd_vv; break; - case 43: op =3D rv_op_vnmsub_vv; break; - case 45: op =3D rv_op_vmacc_vv; break; - case 47: op =3D rv_op_vnmsac_vv; break; - case 48: op =3D rv_op_vwaddu_vv; break; - case 49: op =3D rv_op_vwadd_vv; break; - case 50: op =3D rv_op_vwsubu_vv; break; - case 51: op =3D rv_op_vwsub_vv; break; - case 52: op =3D rv_op_vwaddu_wv; break; - case 53: op =3D rv_op_vwadd_wv; break; - case 54: op =3D rv_op_vwsubu_wv; break; - case 55: op =3D rv_op_vwsub_wv; break; - case 56: op =3D rv_op_vwmulu_vv; break; - case 58: op =3D rv_op_vwmulsu_vv; break; - case 59: op =3D rv_op_vwmul_vv; break; - case 60: op =3D rv_op_vwmaccu_vv; break; - case 61: op =3D rv_op_vwmacc_vv; break; - case 63: op =3D rv_op_vwmaccsu_vv; break; + case 23: + if ((inst >> 25) & 1) { + return &op_vcompress_vm; + } + break; + case 24: + if ((inst >> 25) & 1) { + return &op_vmandn_mm; + } + break; + case 25: + if ((inst >> 25) & 1) { + return &op_vmand_mm; + } + break; + case 26: + if ((inst >> 25) & 1) { + return &op_vmor_mm; + } + break; + case 27: + if ((inst >> 25) & 1) { + return &op_vmxor_mm; + } + break; + case 28: + if ((inst >> 25) & 1) { + return &op_vmorn_mm; + } + break; + case 29: + if ((inst >> 25) & 1) { + return &op_vmnand_mm; + } + break; + case 30: + if ((inst >> 25) & 1) { + return &op_vmnor_mm; + } + break; + case 31: + if ((inst >> 25) & 1) { + return &op_vmxnor_mm; + } + break; + case 32: return &op_vdivu_vv; + case 33: return &op_vdiv_vv; + case 34: return &op_vremu_vv; + case 35: return &op_vrem_vv; + case 36: return &op_vmulhu_vv; + case 37: return &op_vmul_vv; + case 38: return &op_vmulhsu_vv; + case 39: return &op_vmulh_vv; + case 41: return &op_vmadd_vv; + case 43: return &op_vnmsub_vv; + case 45: return &op_vmacc_vv; + case 47: return &op_vnmsac_vv; + case 48: return &op_vwaddu_vv; + case 49: return &op_vwadd_vv; + case 50: return &op_vwsubu_vv; + case 51: return &op_vwsub_vv; + case 52: return &op_vwaddu_wv; + case 53: return &op_vwadd_wv; + case 54: return &op_vwsubu_wv; + case 55: return &op_vwsub_wv; + case 56: return &op_vwmulu_vv; + case 58: return &op_vwmulsu_vv; + case 59: return &op_vwmul_vv; + case 60: return &op_vwmaccu_vv; + case 61: return &op_vwmacc_vv; + case 63: return &op_vwmaccsu_vv; } break; case 3: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_vadd_vi; break; - case 3: op =3D rv_op_vrsub_vi; break; - case 9: op =3D rv_op_vand_vi; break; - case 10: op =3D rv_op_vor_vi; break; - case 11: op =3D rv_op_vxor_vi; break; - case 12: op =3D rv_op_vrgather_vi; break; - case 14: op =3D rv_op_vslideup_vi; break; - case 15: op =3D rv_op_vslidedown_vi; break; + case 0: return &op_vadd_vi; + case 3: return &op_vrsub_vi; + case 9: return &op_vand_vi; + case 10: return &op_vor_vi; + case 11: return &op_vxor_vi; + case 12: return &op_vrgather_vi; + case 14: return &op_vslideup_vi; + case 15: return &op_vslidedown_vi; case 16: if (((inst >> 25) & 1) =3D=3D 0) { - op =3D rv_op_vadc_vim; + return &op_vadc_vim; } break; - case 17: op =3D rv_op_vmadc_vim; break; - case 20: case 21: op =3D rv_op_vror_vi; break; + case 17: return &op_vmadc_vim; + case 20: case 21: return &op_vror_vi; case 23: - if (((inst >> 20) & 0b111111) =3D=3D 32) - op =3D rv_op_vmv_v_i; - else if (((inst >> 25) & 1) =3D=3D 0) - op =3D rv_op_vmerge_vim; + if (((inst >> 20) & 0b111111) =3D=3D 32) { + return &op_vmv_v_i; + } else if (((inst >> 25) & 1) =3D=3D 0) { + return &op_vmerge_vim; + } break; - case 24: op =3D rv_op_vmseq_vi; break; - case 25: op =3D rv_op_vmsne_vi; break; - case 28: op =3D rv_op_vmsleu_vi; break; - case 29: op =3D rv_op_vmsle_vi; break; - case 30: op =3D rv_op_vmsgtu_vi; break; - case 31: op =3D rv_op_vmsgt_vi; break; - case 32: op =3D rv_op_vsaddu_vi; break; - case 33: op =3D rv_op_vsadd_vi; break; - case 37: op =3D rv_op_vsll_vi; break; + case 24: return &op_vmseq_vi; + case 25: return &op_vmsne_vi; + case 28: return &op_vmsleu_vi; + case 29: return &op_vmsle_vi; + case 30: return &op_vmsgtu_vi; + case 31: return &op_vmsgt_vi; + case 32: return &op_vsaddu_vi; + case 33: return &op_vsadd_vi; + case 37: return &op_vsll_vi; case 39: switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_vmv1r_v; break; - case 1: op =3D rv_op_vmv2r_v; break; - case 3: op =3D rv_op_vmv4r_v; break; - case 7: op =3D rv_op_vmv8r_v; break; + case 0: return &op_vmv1r_v; + case 1: return &op_vmv2r_v; + case 3: return &op_vmv4r_v; + case 7: return &op_vmv8r_v; } break; - case 40: op =3D rv_op_vsrl_vi; break; - case 41: op =3D rv_op_vsra_vi; break; - case 42: op =3D rv_op_vssrl_vi; break; - case 43: op =3D rv_op_vssra_vi; break; - case 44: op =3D rv_op_vnsrl_wi; break; - case 45: op =3D rv_op_vnsra_wi; break; - case 46: op =3D rv_op_vnclipu_wi; break; - case 47: op =3D rv_op_vnclip_wi; break; - case 53: op =3D rv_op_vwsll_vi; break; + case 40: return &op_vsrl_vi; + case 41: return &op_vsra_vi; + case 42: return &op_vssrl_vi; + case 43: return &op_vssra_vi; + case 44: return &op_vnsrl_wi; + case 45: return &op_vnsra_wi; + case 46: return &op_vnclipu_wi; + case 47: return &op_vnclip_wi; + case 53: return &op_vwsll_vi; } break; case 4: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_vadd_vx; break; - case 1: op =3D rv_op_vandn_vx; break; - case 2: op =3D rv_op_vsub_vx; break; - case 3: op =3D rv_op_vrsub_vx; break; - case 4: op =3D rv_op_vminu_vx; break; - case 5: op =3D rv_op_vmin_vx; break; - case 6: op =3D rv_op_vmaxu_vx; break; - case 7: op =3D rv_op_vmax_vx; break; - case 9: op =3D rv_op_vand_vx; break; - case 10: op =3D rv_op_vor_vx; break; - case 11: op =3D rv_op_vxor_vx; break; - case 12: op =3D rv_op_vrgather_vx; break; - case 14: op =3D rv_op_vslideup_vx; break; - case 15: op =3D rv_op_vslidedown_vx; break; + case 0: return &op_vadd_vx; + case 1: return &op_vandn_vx; + case 2: return &op_vsub_vx; + case 3: return &op_vrsub_vx; + case 4: return &op_vminu_vx; + case 5: return &op_vmin_vx; + case 6: return &op_vmaxu_vx; + case 7: return &op_vmax_vx; + case 9: return &op_vand_vx; + case 10: return &op_vor_vx; + case 11: return &op_vxor_vx; + case 12: return &op_vrgather_vx; + case 14: return &op_vslideup_vx; + case 15: return &op_vslidedown_vx; case 16: if (((inst >> 25) & 1) =3D=3D 0) { - op =3D rv_op_vadc_vxm; + return &op_vadc_vxm; } break; - case 17: op =3D rv_op_vmadc_vxm; break; + case 17: return &op_vmadc_vxm; case 18: if (((inst >> 25) & 1) =3D=3D 0) { - op =3D rv_op_vsbc_vxm; + return &op_vsbc_vxm; } break; - case 19: op =3D rv_op_vmsbc_vxm; break; - case 20: op =3D rv_op_vror_vx; break; - case 21: op =3D rv_op_vrol_vx; break; + case 19: return &op_vmsbc_vxm; + case 20: return &op_vror_vx; + case 21: return &op_vrol_vx; case 23: - if (((inst >> 20) & 0b111111) =3D=3D 32) - op =3D rv_op_vmv_v_x; - else if (((inst >> 25) & 1) =3D=3D 0) - op =3D rv_op_vmerge_vxm; + if (((inst >> 20) & 0b111111) =3D=3D 32) { + return &op_vmv_v_x; + } else if (((inst >> 25) & 1) =3D=3D 0) { + return &op_vmerge_vxm; + } break; - case 24: op =3D rv_op_vmseq_vx; break; - case 25: op =3D rv_op_vmsne_vx; break; - case 26: op =3D rv_op_vmsltu_vx; break; - case 27: op =3D rv_op_vmslt_vx; break; - case 28: op =3D rv_op_vmsleu_vx; break; - case 29: op =3D rv_op_vmsle_vx; break; - case 30: op =3D rv_op_vmsgtu_vx; break; - case 31: op =3D rv_op_vmsgt_vx; break; - case 32: op =3D rv_op_vsaddu_vx; break; - case 33: op =3D rv_op_vsadd_vx; break; - case 34: op =3D rv_op_vssubu_vx; break; - case 35: op =3D rv_op_vssub_vx; break; - case 37: op =3D rv_op_vsll_vx; break; - case 39: op =3D rv_op_vsmul_vx; break; - case 40: op =3D rv_op_vsrl_vx; break; - case 41: op =3D rv_op_vsra_vx; break; - case 42: op =3D rv_op_vssrl_vx; break; - case 43: op =3D rv_op_vssra_vx; break; - case 44: op =3D rv_op_vnsrl_wx; break; - case 45: op =3D rv_op_vnsra_wx; break; - case 46: op =3D rv_op_vnclipu_wx; break; - case 47: op =3D rv_op_vnclip_wx; break; - case 53: op =3D rv_op_vwsll_vx; break; + case 24: return &op_vmseq_vx; + case 25: return &op_vmsne_vx; + case 26: return &op_vmsltu_vx; + case 27: return &op_vmslt_vx; + case 28: return &op_vmsleu_vx; + case 29: return &op_vmsle_vx; + case 30: return &op_vmsgtu_vx; + case 31: return &op_vmsgt_vx; + case 32: return &op_vsaddu_vx; + case 33: return &op_vsadd_vx; + case 34: return &op_vssubu_vx; + case 35: return &op_vssub_vx; + case 37: return &op_vsll_vx; + case 39: return &op_vsmul_vx; + case 40: return &op_vsrl_vx; + case 41: return &op_vsra_vx; + case 42: return &op_vssrl_vx; + case 43: return &op_vssra_vx; + case 44: return &op_vnsrl_wx; + case 45: return &op_vnsra_wx; + case 46: return &op_vnclipu_wx; + case 47: return &op_vnclip_wx; + case 53: return &op_vwsll_vx; } break; case 5: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_vfadd_vf; break; - case 2: op =3D rv_op_vfsub_vf; break; - case 4: op =3D rv_op_vfmin_vf; break; - case 6: op =3D rv_op_vfmax_vf; break; - case 8: op =3D rv_op_vfsgnj_vf; break; - case 9: op =3D rv_op_vfsgnjn_vf; break; - case 10: op =3D rv_op_vfsgnjx_vf; break; - case 14: op =3D rv_op_vfslide1up_vf; break; - case 15: op =3D rv_op_vfslide1down_vf; break; + case 0: return &op_vfadd_vf; + case 2: return &op_vfsub_vf; + case 4: return &op_vfmin_vf; + case 6: return &op_vfmax_vf; + case 8: return &op_vfsgnj_vf; + case 9: return &op_vfsgnjn_vf; + case 10: return &op_vfsgnjx_vf; + case 14: return &op_vfslide1up_vf; + case 15: return &op_vfslide1down_vf; case 16: switch ((inst >> 20) & 0b11111) { - case 0: if ((inst >> 25) & 1) op =3D rv_op_vfmv_s_f; b= reak; + case 0: + if ((inst >> 25) & 1) { + return &op_vfmv_s_f; + } } break; case 23: - if (((inst >> 25) & 1) =3D=3D 0) - op =3D rv_op_vfmerge_vfm; - else if (((inst >> 20) & 0b111111) =3D=3D 32) - op =3D rv_op_vfmv_v_f; + if (((inst >> 25) & 1) =3D=3D 0) { + return &op_vfmerge_vfm; + } else if (((inst >> 20) & 0b111111) =3D=3D 32) { + return &op_vfmv_v_f; + } break; - case 24: op =3D rv_op_vmfeq_vf; break; - case 25: op =3D rv_op_vmfle_vf; break; - case 27: op =3D rv_op_vmflt_vf; break; - case 28: op =3D rv_op_vmfne_vf; break; - case 29: op =3D rv_op_vmfgt_vf; break; - case 31: op =3D rv_op_vmfge_vf; break; - case 32: op =3D rv_op_vfdiv_vf; break; - case 33: op =3D rv_op_vfrdiv_vf; break; - case 36: op =3D rv_op_vfmul_vf; break; - case 39: op =3D rv_op_vfrsub_vf; break; - case 40: op =3D rv_op_vfmadd_vf; break; - case 41: op =3D rv_op_vfnmadd_vf; break; - case 42: op =3D rv_op_vfmsub_vf; break; - case 43: op =3D rv_op_vfnmsub_vf; break; - case 44: op =3D rv_op_vfmacc_vf; break; - case 45: op =3D rv_op_vfnmacc_vf; break; - case 46: op =3D rv_op_vfmsac_vf; break; - case 47: op =3D rv_op_vfnmsac_vf; break; - case 48: op =3D rv_op_vfwadd_vf; break; - case 50: op =3D rv_op_vfwsub_vf; break; - case 52: op =3D rv_op_vfwadd_wf; break; - case 54: op =3D rv_op_vfwsub_wf; break; - case 56: op =3D rv_op_vfwmul_vf; break; - case 59: op =3D rv_op_vfwmaccbf16_vf; break; - case 60: op =3D rv_op_vfwmacc_vf; break; - case 61: op =3D rv_op_vfwnmacc_vf; break; - case 62: op =3D rv_op_vfwmsac_vf; break; - case 63: op =3D rv_op_vfwnmsac_vf; break; + case 24: return &op_vmfeq_vf; + case 25: return &op_vmfle_vf; + case 27: return &op_vmflt_vf; + case 28: return &op_vmfne_vf; + case 29: return &op_vmfgt_vf; + case 31: return &op_vmfge_vf; + case 32: return &op_vfdiv_vf; + case 33: return &op_vfrdiv_vf; + case 36: return &op_vfmul_vf; + case 39: return &op_vfrsub_vf; + case 40: return &op_vfmadd_vf; + case 41: return &op_vfnmadd_vf; + case 42: return &op_vfmsub_vf; + case 43: return &op_vfnmsub_vf; + case 44: return &op_vfmacc_vf; + case 45: return &op_vfnmacc_vf; + case 46: return &op_vfmsac_vf; + case 47: return &op_vfnmsac_vf; + case 48: return &op_vfwadd_vf; + case 50: return &op_vfwsub_vf; + case 52: return &op_vfwadd_wf; + case 54: return &op_vfwsub_wf; + case 56: return &op_vfwmul_vf; + case 59: return &op_vfwmaccbf16_vf; + case 60: return &op_vfwmacc_vf; + case 61: return &op_vfwnmacc_vf; + case 62: return &op_vfwmsac_vf; + case 63: return &op_vfwnmsac_vf; } break; case 6: switch ((inst >> 26) & 0b111111) { - case 8: op =3D rv_op_vaaddu_vx; break; - case 9: op =3D rv_op_vaadd_vx; break; - case 10: op =3D rv_op_vasubu_vx; break; - case 11: op =3D rv_op_vasub_vx; break; - case 12: op =3D rv_op_vclmul_vx; break; - case 13: op =3D rv_op_vclmulh_vx; break; - case 14: op =3D rv_op_vslide1up_vx; break; - case 15: op =3D rv_op_vslide1down_vx; break; + case 8: return &op_vaaddu_vx; + case 9: return &op_vaadd_vx; + case 10: return &op_vasubu_vx; + case 11: return &op_vasub_vx; + case 12: return &op_vclmul_vx; + case 13: return &op_vclmulh_vx; + case 14: return &op_vslide1up_vx; + case 15: return &op_vslide1down_vx; case 16: switch ((inst >> 20) & 0b11111) { - case 0: if ((inst >> 25) & 1) op =3D rv_op_vmv_s_x; br= eak; + case 0: + if ((inst >> 25) & 1) { + return &op_vmv_s_x; + } } break; - case 32: op =3D rv_op_vdivu_vx; break; - case 33: op =3D rv_op_vdiv_vx; break; - case 34: op =3D rv_op_vremu_vx; break; - case 35: op =3D rv_op_vrem_vx; break; - case 36: op =3D rv_op_vmulhu_vx; break; - case 37: op =3D rv_op_vmul_vx; break; - case 38: op =3D rv_op_vmulhsu_vx; break; - case 39: op =3D rv_op_vmulh_vx; break; - case 41: op =3D rv_op_vmadd_vx; break; - case 43: op =3D rv_op_vnmsub_vx; break; - case 45: op =3D rv_op_vmacc_vx; break; - case 47: op =3D rv_op_vnmsac_vx; break; - case 48: op =3D rv_op_vwaddu_vx; break; - case 49: op =3D rv_op_vwadd_vx; break; - case 50: op =3D rv_op_vwsubu_vx; break; - case 51: op =3D rv_op_vwsub_vx; break; - case 52: op =3D rv_op_vwaddu_wx; break; - case 53: op =3D rv_op_vwadd_wx; break; - case 54: op =3D rv_op_vwsubu_wx; break; - case 55: op =3D rv_op_vwsub_wx; break; - case 56: op =3D rv_op_vwmulu_vx; break; - case 58: op =3D rv_op_vwmulsu_vx; break; - case 59: op =3D rv_op_vwmul_vx; break; - case 60: op =3D rv_op_vwmaccu_vx; break; - case 61: op =3D rv_op_vwmacc_vx; break; - case 62: op =3D rv_op_vwmaccus_vx; break; - case 63: op =3D rv_op_vwmaccsu_vx; break; + case 32: return &op_vdivu_vx; + case 33: return &op_vdiv_vx; + case 34: return &op_vremu_vx; + case 35: return &op_vrem_vx; + case 36: return &op_vmulhu_vx; + case 37: return &op_vmul_vx; + case 38: return &op_vmulhsu_vx; + case 39: return &op_vmulh_vx; + case 41: return &op_vmadd_vx; + case 43: return &op_vnmsub_vx; + case 45: return &op_vmacc_vx; + case 47: return &op_vnmsac_vx; + case 48: return &op_vwaddu_vx; + case 49: return &op_vwadd_vx; + case 50: return &op_vwsubu_vx; + case 51: return &op_vwsub_vx; + case 52: return &op_vwaddu_wx; + case 53: return &op_vwadd_wx; + case 54: return &op_vwsubu_wx; + case 55: return &op_vwsub_wx; + case 56: return &op_vwmulu_vx; + case 58: return &op_vwmulsu_vx; + case 59: return &op_vwmul_vx; + case 60: return &op_vwmaccu_vx; + case 61: return &op_vwmacc_vx; + case 62: return &op_vwmaccus_vx; + case 63: return &op_vwmaccsu_vx; } break; case 7: if (((inst >> 31) & 1) =3D=3D 0) { - op =3D rv_op_vsetvli; + return &op_vsetvli; } else if ((inst >> 30) & 1) { - op =3D rv_op_vsetivli; + return &op_vsetivli; } else if (((inst >> 25) & 0b11111) =3D=3D 0) { - op =3D rv_op_vsetvl; + return &op_vsetvl; } break; } break; case 22: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_addid; break; + case 0: return &op_addid; case 1: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_sllid; break; + case 0: return &op_sllid; } break; case 5: switch ((inst >> 26) & 0b111111) { - case 0: op =3D rv_op_srlid; break; - case 16: op =3D rv_op_sraid; break; + case 0: return &op_srlid; + case 16: return &op_sraid; } break; } break; case 24: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_beq; break; - case 1: op =3D rv_op_bne; break; - case 4: op =3D rv_op_blt; break; - case 5: op =3D rv_op_bge; break; - case 6: op =3D rv_op_bltu; break; - case 7: op =3D rv_op_bgeu; break; + case 0: return &op_beq; + case 1: return &op_bne; + case 4: return &op_blt; + case 5: return &op_bge; + case 6: return &op_bltu; + case 7: return &op_bgeu; } break; case 25: switch ((inst >> 12) & 0b111) { - case 0: op =3D rv_op_jalr; break; + case 0: return &op_jalr; } break; - case 27: op =3D rv_op_jal; break; + case 27: return &op_jal; case 28: switch ((inst >> 12) & 0b111) { case 0: @@ -2483,76 +2504,76 @@ static const rv_opcode_data *decode_inst_opcode(rv_= decode *dec, rv_isa isa) ((inst >> 7) & 0b000000011111)) { case 0: switch ((inst >> 15) & 0b1111111111) { - case 0: op =3D rv_op_ecall; break; - case 32: op =3D rv_op_ebreak; break; - case 64: op =3D rv_op_uret; break; - case 416: op =3D rv_op_wrs_nto; break; - case 928: op =3D rv_op_wrs_sto; break; + case 0: return &op_ecall; + case 32: return &op_ebreak; + case 64: return &op_uret; + case 416: return &op_wrs_nto; + case 928: return &op_wrs_sto; } break; case 256: switch ((inst >> 20) & 0b11111) { case 2: switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_sret; break; + case 0: return &op_sret; } break; - case 4: op =3D rv_op_sfence_vm; break; + case 4: return &op_sfence_vm; case 5: switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_wfi; break; + case 0: return &op_wfi; } break; } break; - case 288: op =3D rv_op_sfence_vma; break; + case 288: return &op_sfence_vma; case 512: switch ((inst >> 15) & 0b1111111111) { - case 64: op =3D rv_op_hret; break; + case 64: return &op_hret; } break; case 768: switch ((inst >> 15) & 0b1111111111) { - case 64: op =3D rv_op_mret; break; + case 64: return &op_mret; } break; case 1792: switch ((inst >> 15) & 0b1111111111) { - case 64: op =3D rv_op_mnret; break; + case 64: return &op_mnret; } break; case 1952: switch ((inst >> 15) & 0b1111111111) { - case 576: op =3D rv_op_dret; break; + case 576: return &op_dret; } break; } break; case 1: switch (operand_csr12(inst)) { - case 1: op =3D rv_op_fsflags; break; - case 2: op =3D rv_op_fsrm; break; - case 3: op =3D rv_op_fscsr; break; - default: op =3D rv_op_csrrw; break; + case 1: return &op_fsflags; + case 2: return &op_fsrm; + case 3: return &op_fscsr; + default: return &op_csrrw; } break; case 2: - op =3D rv_op_csrrs; + return &op_csrrs; if (operand_rs1(inst) =3D=3D 0) { switch (operand_csr12(inst)) { - case 0x001: op =3D rv_op_frflags; break; - case 0x002: op =3D rv_op_frrm; break; - case 0x003: op =3D rv_op_frcsr; break; - case 0xc00: op =3D rv_op_rdcycle; break; - case 0xc01: op =3D rv_op_rdtime; break; - case 0xc02: op =3D rv_op_rdinstret; break; - case 0xc80: op =3D rv_op_rdcycleh; break; - case 0xc81: op =3D rv_op_rdtimeh; break; - case 0xc82: op =3D rv_op_rdinstreth; break; + case 0x001: return &op_frflags; + case 0x002: return &op_frrm; + case 0x003: return &op_frcsr; + case 0xc00: return &op_rdcycle; + case 0xc01: return &op_rdtime; + case 0xc02: return &op_rdinstret; + case 0xc80: return &op_rdcycleh; + case 0xc81: return &op_rdtimeh; + case 0xc82: return &op_rdinstreth; } } break; - case 3: op =3D rv_op_csrrc; break; + case 3: return &op_csrrc; case 4: if (dec->cfg && dec->cfg->ext_zimop) { if (((inst >> 22) & 0b1011001111) =3D=3D 0b1000000111)= { @@ -2560,15 +2581,15 @@ static const rv_opcode_data *decode_inst_opcode(rv_= decode *dec, rv_isa isa) && operand_mop_r_imm(inst) =3D=3D 28) { switch (operand_rs1(inst)) { case 0: - return &rvi_opcode_data[rv_op_ssrdp]; + return &op_ssrdp; case 1: case 5: if (operand_rd(inst) =3D=3D 0) { - return &rvi_opcode_data[rv_op_sspopchk= ]; + return &op_sspopchk; } } } - return &rvi_opcode_data[rv_op_mop_r]; + return &op_mop_r; } if (((inst >> 25) & 0b1011001) =3D=3D 0b1000001) { if (dec->cfg->ext_zicfiss @@ -2578,79 +2599,79 @@ static const rv_opcode_data *decode_inst_opcode(rv_= decode *dec, rv_isa isa) switch (operand_rs2(inst)) { case 1: case 5: - return &rvi_opcode_data[rv_op_sspush]; + return &op_sspush; } } - return &rvi_opcode_data[rv_op_mop_rr]; + return &op_mop_rr; } } break; case 5: switch (operand_csr12(inst)) { - case 1: op =3D rv_op_fsflagsi; break; - case 2: op =3D rv_op_fsrmi; break; - default: op =3D rv_op_csrrwi; break; + case 1: return &op_fsflagsi; + case 2: return &op_fsrmi; + default: return &op_csrrwi; } break; - case 6: op =3D rv_op_csrrsi; break; - case 7: op =3D rv_op_csrrci; break; + case 6: return &op_csrrsi; + case 7: return &op_csrrci; } break; case 29: if (((inst >> 25) & 1) =3D=3D 1 && ((inst >> 12) & 0b111) =3D= =3D 2) { switch ((inst >> 26) & 0b111111) { - case 32: op =3D rv_op_vsm3me_vv; break; - case 33: op =3D rv_op_vsm4k_vi; break; - case 34: op =3D rv_op_vaeskf1_vi; break; + case 32: return &op_vsm3me_vv; + case 33: return &op_vsm4k_vi; + case 34: return &op_vaeskf1_vi; case 40: switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_vaesdm_vv; break; - case 1: op =3D rv_op_vaesdf_vv; break; - case 2: op =3D rv_op_vaesem_vv; break; - case 3: op =3D rv_op_vaesef_vv; break; - case 16: op =3D rv_op_vsm4r_vv; break; - case 17: op =3D rv_op_vgmul_vv; break; + case 0: return &op_vaesdm_vv; + case 1: return &op_vaesdf_vv; + case 2: return &op_vaesem_vv; + case 3: return &op_vaesef_vv; + case 16: return &op_vsm4r_vv; + case 17: return &op_vgmul_vv; } break; case 41: switch ((inst >> 15) & 0b11111) { - case 0: op =3D rv_op_vaesdm_vs; break; - case 1: op =3D rv_op_vaesdf_vs; break; - case 2: op =3D rv_op_vaesem_vs; break; - case 3: op =3D rv_op_vaesef_vs; break; - case 7: op =3D rv_op_vaesz_vs; break; - case 16: op =3D rv_op_vsm4r_vs; break; + case 0: return &op_vaesdm_vs; + case 1: return &op_vaesdf_vs; + case 2: return &op_vaesem_vs; + case 3: return &op_vaesef_vs; + case 7: return &op_vaesz_vs; + case 16: return &op_vsm4r_vs; } break; - case 42: op =3D rv_op_vaeskf2_vi; break; - case 43: op =3D rv_op_vsm3c_vi; break; - case 44: op =3D rv_op_vghsh_vv; break; - case 45: op =3D rv_op_vsha2ms_vv; break; - case 46: op =3D rv_op_vsha2ch_vv; break; - case 47: op =3D rv_op_vsha2cl_vv; break; + case 42: return &op_vaeskf2_vi; + case 43: return &op_vsm3c_vi; + case 44: return &op_vghsh_vv; + case 45: return &op_vsha2ms_vv; + case 46: return &op_vsha2ch_vv; + case 47: return &op_vsha2cl_vv; } } break; case 30: switch (((inst >> 22) & 0b1111111000) | ((inst >> 12) & 0b0000000111)) { - case 0: op =3D rv_op_addd; break; - case 1: op =3D rv_op_slld; break; - case 5: op =3D rv_op_srld; break; - case 8: op =3D rv_op_muld; break; - case 12: op =3D rv_op_divd; break; - case 13: op =3D rv_op_divud; break; - case 14: op =3D rv_op_remd; break; - case 15: op =3D rv_op_remud; break; - case 256: op =3D rv_op_subd; break; - case 261: op =3D rv_op_srad; break; + case 0: return &op_addd; + case 1: return &op_slld; + case 5: return &op_srld; + case 8: return &op_muld; + case 12: return &op_divd; + case 13: return &op_divud; + case 14: return &op_remd; + case 15: return &op_remud; + case 256: return &op_subd; + case 261: return &op_srad; } break; } break; } =20 - return op =3D=3D rv_op_illegal ? NULL : &rvi_opcode_data[op]; + return NULL; } =20 /* decode operands */ @@ -3450,7 +3471,7 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, = rv_inst inst, decode_inst_operands(&dec, isa, op); op =3D decode_inst_lift_pseudo(&dec, op); } else { - op =3D &rvi_opcode_data[rv_op_illegal]; + op =3D &op_illegal; } =20 return format_inst(24, &dec, op); diff --git a/disas/riscv-op.c.inc b/disas/riscv-op.c.inc index 802a521bca..cc939f557f 100644 --- a/disas/riscv-op.c.inc +++ b/disas/riscv-op.c.inc @@ -225,51 +225,51 @@ OP(fcvt_q_l, "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_= rs1) OP(fcvt_q_lu, "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) OP(fmv_x_q, "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1) OP(fmv_q_x, "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1) -OP(c_addi4spn, "c.addi4spn", rv_codec_ciw_4spn, NULL, DECOMP(rv_op_addi)) -OP(c_fld, "c.fld", rv_codec_cl_ld, NULL, DECOMP(rv_op_fld)) -OP(c_lw, "c.lw", rv_codec_cl_lw, NULL, DECOMP(rv_op_lw)) -OP(c_flw, "c.flw", rv_codec_cl_lw, NULL, DECOMP(rv_op_flw)) -OP(c_fsd, "c.fsd", rv_codec_cs_sd, NULL, DECOMP(rv_op_fsd)) -OP(c_sw, "c.sw", rv_codec_cs_sw, NULL, DECOMP(rv_op_sw)) -OP(c_fsw, "c.fsw", rv_codec_cs_sw, NULL, DECOMP(rv_op_fsw)) -OP(c_addi, "c.addi", rv_codec_ci, NULL, DECOMP(rv_op_addi)) -OP(c_jal, "c.jal", rv_codec_cj_jal, NULL, DECOMP(rv_op_jal)) -OP(c_li, "c.li", rv_codec_ci_li, NULL, DECOMP(rv_op_addi)) -OP(c_addi16sp, "c.addi16sp", rv_codec_ci_16sp, NULL, DECOMP(rv_op_addi)) -OP(c_lui, "c.lui", rv_codec_ci_lui, NULL, DECOMP(rv_op_lui)) -OP(c_srli, "c.srli", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srli)) -OP(c_srai, "c.srai", rv_codec_cb_sh6, NULL, DECOMP(rv_op_srai)) -OP(c_andi, "c.andi", rv_codec_cb_imm, NULL, DECOMP(rv_op_andi)) -OP(c_sub, "c.sub", rv_codec_cs, NULL, DECOMP(rv_op_sub)) -OP(c_xor, "c.xor", rv_codec_cs, NULL, DECOMP(rv_op_xor)) -OP(c_or, "c.or", rv_codec_cs, NULL, DECOMP(rv_op_or)) -OP(c_and, "c.and", rv_codec_cs, NULL, DECOMP(rv_op_and)) -OP(c_subw, "c.subw", rv_codec_cs, NULL, DECOMP(rv_op_subw)) -OP(c_addw, "c.addw", rv_codec_cs, NULL, DECOMP(rv_op_addw)) -OP(c_j, "c.j", rv_codec_cj, NULL, DECOMP(rv_op_j)) -OP(c_beqz, "c.beqz", rv_codec_cb, NULL, DECOMP(rv_op_beqz)) -OP(c_bnez, "c.bnez", rv_codec_cb, NULL, DECOMP(rv_op_bnez)) -OP(c_slli, "c.slli", rv_codec_ci_sh6, NULL, DECOMP(rv_op_slli)) -OP(c_fldsp, "c.fldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_fld)) -OP(c_lwsp, "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_lw)) -OP(c_flwsp, "c.flwsp", rv_codec_ci_lwsp, NULL, DECOMP(rv_op_flw)) -OP(c_jr, "c.jr", rv_codec_cr_jr, NULL, DECOMP(rv_op_jr)) -OP(c_mv, "c.mv", rv_codec_cr_mv, NULL, DECOMP(rv_op_mv)) -OP(c_ebreak, "c.ebreak", rv_codec_ci_none, NULL, DECOMP(rv_op_ebreak)) -OP(c_jalr, "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(rv_op_jalr)) -OP(c_add, "c.add", rv_codec_cr, NULL, DECOMP(rv_op_add)) -OP(c_fsdsp, "c.fsdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_fsd)) -OP(c_swsp, "c.swsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_sw)) -OP(c_fswsp, "c.fswsp", rv_codec_css_swsp, NULL, DECOMP(rv_op_fsw)) -OP(c_ld, "c.ld", rv_codec_cl_ld, NULL, DECOMP(rv_op_ld)) -OP(c_sd, "c.sd", rv_codec_cs_sd, NULL, DECOMP(rv_op_sd)) -OP(c_addiw, "c.addiw", rv_codec_ci, NULL, DECOMP(rv_op_addiw)) -OP(c_ldsp, "c.ldsp", rv_codec_ci_ldsp, NULL, DECOMP(rv_op_ld)) -OP(c_sdsp, "c.sdsp", rv_codec_css_sdsp, NULL, DECOMP(rv_op_sd)) -OP(c_lq, "c.lq", rv_codec_cl_lq, NULL, DECOMP(rv_op_lq)) -OP(c_sq, "c.sq", rv_codec_cs_sq, NULL, DECOMP(rv_op_sq)) -OP(c_lqsp, "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(rv_op_lq)) -OP(c_sqsp, "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(rv_op_sq)) +OP(c_addi4spn, "c.addi4spn", rv_codec_ciw_4spn, NULL, DECOMP(op_addi)) +OP(c_fld, "c.fld", rv_codec_cl_ld, NULL, DECOMP(op_fld)) +OP(c_lw, "c.lw", rv_codec_cl_lw, NULL, DECOMP(op_lw)) +OP(c_flw, "c.flw", rv_codec_cl_lw, NULL, DECOMP(op_flw)) +OP(c_fsd, "c.fsd", rv_codec_cs_sd, NULL, DECOMP(op_fsd)) +OP(c_sw, "c.sw", rv_codec_cs_sw, NULL, DECOMP(op_sw)) +OP(c_fsw, "c.fsw", rv_codec_cs_sw, NULL, DECOMP(op_fsw)) +OP(c_addi, "c.addi", rv_codec_ci, NULL, DECOMP(op_addi)) +OP(c_jal, "c.jal", rv_codec_cj_jal, NULL, DECOMP(op_jal)) +OP(c_li, "c.li", rv_codec_ci_li, NULL, DECOMP(op_addi)) +OP(c_addi16sp, "c.addi16sp", rv_codec_ci_16sp, NULL, DECOMP(op_addi)) +OP(c_lui, "c.lui", rv_codec_ci_lui, NULL, DECOMP(op_lui)) +OP(c_srli, "c.srli", rv_codec_cb_sh6, NULL, DECOMP(op_srli)) +OP(c_srai, "c.srai", rv_codec_cb_sh6, NULL, DECOMP(op_srai)) +OP(c_andi, "c.andi", rv_codec_cb_imm, NULL, DECOMP(op_andi)) +OP(c_sub, "c.sub", rv_codec_cs, NULL, DECOMP(op_sub)) +OP(c_xor, "c.xor", rv_codec_cs, NULL, DECOMP(op_xor)) +OP(c_or, "c.or", rv_codec_cs, NULL, DECOMP(op_or)) +OP(c_and, "c.and", rv_codec_cs, NULL, DECOMP(op_and)) +OP(c_subw, "c.subw", rv_codec_cs, NULL, DECOMP(op_subw)) +OP(c_addw, "c.addw", rv_codec_cs, NULL, DECOMP(op_addw)) +OP(c_j, "c.j", rv_codec_cj, NULL, DECOMP(op_j)) +OP(c_beqz, "c.beqz", rv_codec_cb, NULL, DECOMP(op_beqz)) +OP(c_bnez, "c.bnez", rv_codec_cb, NULL, DECOMP(op_bnez)) +OP(c_slli, "c.slli", rv_codec_ci_sh6, NULL, DECOMP(op_slli)) +OP(c_fldsp, "c.fldsp", rv_codec_ci_ldsp, NULL, DECOMP(op_fld)) +OP(c_lwsp, "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(op_lw)) +OP(c_flwsp, "c.flwsp", rv_codec_ci_lwsp, NULL, DECOMP(op_flw)) +OP(c_jr, "c.jr", rv_codec_cr_jr, NULL, DECOMP(op_jr)) +OP(c_mv, "c.mv", rv_codec_cr_mv, NULL, DECOMP(op_mv)) +OP(c_ebreak, "c.ebreak", rv_codec_ci_none, NULL, DECOMP(op_ebreak)) +OP(c_jalr, "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(op_jalr)) +OP(c_add, "c.add", rv_codec_cr, NULL, DECOMP(op_add)) +OP(c_fsdsp, "c.fsdsp", rv_codec_css_sdsp, NULL, DECOMP(op_fsd)) +OP(c_swsp, "c.swsp", rv_codec_css_swsp, NULL, DECOMP(op_sw)) +OP(c_fswsp, "c.fswsp", rv_codec_css_swsp, NULL, DECOMP(op_fsw)) +OP(c_ld, "c.ld", rv_codec_cl_ld, NULL, DECOMP(op_ld)) +OP(c_sd, "c.sd", rv_codec_cs_sd, NULL, DECOMP(op_sd)) +OP(c_addiw, "c.addiw", rv_codec_ci, NULL, DECOMP(op_addiw)) +OP(c_ldsp, "c.ldsp", rv_codec_ci_ldsp, NULL, DECOMP(op_ld)) +OP(c_sdsp, "c.sdsp", rv_codec_css_sdsp, NULL, DECOMP(op_sd)) +OP(c_lq, "c.lq", rv_codec_cl_lq, NULL, DECOMP(op_lq)) +OP(c_sq, "c.sq", rv_codec_cs_sq, NULL, DECOMP(op_sq)) +OP(c_lqsp, "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(op_lq)) +OP(c_sqsp, "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(op_sq)) OP(nop, "nop", rv_codec_illegal, rv_fmt_none) OP(mv, "mv", rv_codec_illegal, rv_fmt_rd_rs1, rvcp_mv) OP(not, "not", rv_codec_illegal, rv_fmt_rd_rs1) @@ -904,8 +904,8 @@ OP(sspopchk, "sspopchk", rv_codec_r, rv_fmt_rs1) OP(ssrdp, "ssrdp", rv_codec_r, rv_fmt_rd) OP(ssamoswap_w, "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(ssamoswap_d, "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(c_sspush, "c.sspush", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspush)) -OP(c_sspopchk, "c.sspopchk", rv_codec_cmop_ss, NULL, DECOMP(rv_op_sspopchk= )) +OP(c_sspush, "c.sspush", rv_codec_cmop_ss, NULL, DECOMP(op_sspush)) +OP(c_sspopchk, "c.sspopchk", rv_codec_cmop_ss, NULL, DECOMP(op_sspopchk)) OP(cbo_inval, "cbo.inval", rv_codec_r, rv_fmt_rs1) OP(cbo_clean, "cbo.clean", rv_codec_r, rv_fmt_rs1) OP(cbo_flush, "cbo.flush", rv_codec_r, rv_fmt_rs1) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198145; cv=none; d=zohomail.com; s=zohoarc; b=UytaqD25CkgxNpSf1KhSSM2oBTozr3JpO50B2QhY2z080saL7Vdtr/HH3lzefL2jE8DnYninpBL0nh/oDlZgOJwJkY4GsMPWQX4yQ1noNRZC0XneRJIVIm25hQcAY71WHnJBeUmne2xudSVYBsCHignQi3jqR5eeAuTVcuPcXmg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198145; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ydOqS/4xymxm1DAzVx5O8ObQewA/wmkFbzQ9Qrwa5L0=; b=lPR2wDpJKQI/CbLzE6aQVvrknZNZRWs6D9qETcjIHQJF1TnNGQxu8n1yCjrjTcUX+7fKjDMQ7PPtnreihyKyEXrxX5kC0ocwdr3RFNSiIMEO9y5Rkb0imjFtvLgReNtfUdD0U+p0M8kb4mFlzFO6jAFdmlFAm6KYmv3YtN1ZdP0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198145123363.35582626041514; Wed, 19 Aug 2026 20:55:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtmJ-00081b-0s; Wed, 19 Aug 2026 23:49:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtm5-0007Za-8T for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:06 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtlz-0004Sn-QB for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:05 -0400 Received: by mail-pj1-x102e.google.com with SMTP id 98e67ed59e1d1-383b4a3755fso1712810a91.3 for ; Wed, 19 Aug 2026 20:48:59 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197738; x=1787802538; darn=nongnu.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=ydOqS/4xymxm1DAzVx5O8ObQewA/wmkFbzQ9Qrwa5L0=; b=D5aE7C+Ey9KKeP8YCnih0AnP5nDCDNxKe2Cd11UbJAUDpIOhWpPjWlCpHWF1OffQGd pJIzFO6ZQ4x31kDFfmQxhN6A/m7qH4Dz+b8UZ6V4psfkHBJDGFcerP2qaBBXCljOOYzF OV1zyzxhCNStxKD7JXjsgtVBgTC/itGOf/6tRsEmQRi+MAL1RooH3yMpHQOPzjP+Bh2o siDjot40US3qn5Fk+Hw+SBErICjxTn3J+pruk+9uxq5aNpdWT7IdHL7l69ZxEwqrI5qs rpRaDkt6INRN1uwy7e5NKVPHg6FvEIVZEoSkRijgJHstSufq8qNWwn9nAQ3o/NxuAHzZ 2Gbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197738; x=1787802538; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=ydOqS/4xymxm1DAzVx5O8ObQewA/wmkFbzQ9Qrwa5L0=; b=AfKgUXapuoTv8m7X0UffiG5EXH2UamG5o4z/0/DYE/Yxnu7lONUyE4Llp/ODIg5iFR Y/EEge4n8g1QX7ALzNtJIB4hxbM7NAN4eX/mcJp58MiMatNAKjrhfOpsK97TWziA9ycF VF3E0wogZSAkzkIsGl1CpYzCCGBDhKitIJJmhTdh0Td51y/Pp24cGGWYG+LRdz3PcDV1 v7Hn+TjuB5nI96A/nXFSI23vxPqjb0F7RLkF9xOV23tjwtA5vxDFHFD7HG5m9TjJkEQd hj02VsLDKEr2aXYt6WtJaISUONPtvDiWxhTrzrwSS2Up789sjjxeU+OvE2aglfRUQRwE B8iA== X-Gm-Message-State: AFuF++l4K3x7qc9C0zrEYRZw3PeeA58L8MbTf5V6w5GTbhiSaqec//jh 4XNChv32RejA/hr10e0JVwzUh3Xj3NOlJ270bVFHhbtgIEX7ZAiii2qjcqYU6w== X-Gm-Gg: AR+sD11nE67f/ssNKjwd78HsmEwpi3aKMiG13dLs6351A0skLQhWhIdsRk+epsLmgIv z9Uyns/gP1Nhcp5uaop+fTYMjU4FNMI0uWuVkki378rmLZC6TGAWvcMjq3nak3suGh90769GZhQ 5JtaN+zl12wbhgu+G5EdNUhHokOb+HKE7RYlWQfyQ05Cvs1JdCshCISg66SegW+glqsP8wVZz38 erOPMMRezdEw8UX111Z/yDQp/XU70p1To+VTH2hqj1YJxxIHkWG87iv291QLRO05UGAjF12GDPl 4rQhZdyqnAym+1gHhJqS/5gzq4tflKqGrBMG7Yuh5bA2sTBDvBuCq9kT5pzKsO3GqfXkjWqZs3k UrjHfecI8ntUAuvKbgCsLym/ZeEnDHaUZqSwI+r4Szz59YfJv4O1EWi4qLZ0JhCQRGZrhx21G/Q T1+ANGiGXkMTwhOEl9tm/7g6uzz15gUVtS2sdIei1e1oYKiMD2wGVUUR7n4C8WA6yXHr3r/SpWJ 6TRvQ== X-Received: by 2002:a17:90b:5606:b0:38e:49c0:75a7 with SMTP id 98e67ed59e1d1-39580aa7748mr18931624a91.8.1787197737450; Wed, 19 Aug 2026 20:48:57 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Richard Henderson , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 88/93] disas/riscv: Sort riscv-op.c.inc Date: Thu, 20 Aug 2026 13:44:25 +1000 Message-ID: <20260820034430.1186695-89-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198145895158500 From: Richard Henderson To date, opcodes had to be added to the end of the list, resulting in quite the disorder. Sort via 'LANG=3DC sort'. Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Message-ID: <20260812223142.349142-53-richard.henderson@linaro.org> Signed-off-by: Alistair Francis --- disas/riscv-op.c.inc | 1674 +++++++++++++++++++++--------------------- 1 file changed, 837 insertions(+), 837 deletions(-) diff --git a/disas/riscv-op.c.inc b/disas/riscv-op.c.inc index cc939f557f..1d334e4857 100644 --- a/disas/riscv-op.c.inc +++ b/disas/riscv-op.c.inc @@ -1,913 +1,913 @@ -OP(illegal, "illegal", rv_codec_none, rv_fmt_none) -OP(lui, "lui", rv_codec_u, rv_fmt_rd_uimm) -OP(auipc, "auipc", rv_codec_u, rv_fmt_rd_uoffset) -OP(jal, "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal) -OP(jalr, "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr) -OP(beq, "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq) -OP(bne, "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne) -OP(blt, "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt) -OP(bge, "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge) -OP(bltu, "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset) -OP(bgeu, "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset) -OP(lb, "lb", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(lh, "lh", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(lw, "lw", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(lbu, "lbu", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(lhu, "lhu", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(sb, "sb", rv_codec_s, rv_fmt_rs2_offset_rs1) -OP(sh, "sh", rv_codec_s, rv_fmt_rs2_offset_rs1) -OP(sw, "sw", rv_codec_s, rv_fmt_rs2_offset_rs1) -OP(addi, "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi) -OP(slti, "slti", rv_codec_i, rv_fmt_rd_rs1_imm) -OP(sltiu, "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu) -OP(xori, "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori) -OP(ori, "ori", rv_codec_i, rv_fmt_rd_rs1_imm) -OP(andi, "andi", rv_codec_i, rv_fmt_rd_rs1_imm) -OP(slli, "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) -OP(srli, "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) -OP(srai, "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) OP(add, "add", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sub, "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub) -OP(sll, "sll", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(slt, "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt) -OP(sltu, "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu) -OP(xor, "xor", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(srl, "srl", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sra, "sra", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(or, "or", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(and, "and", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(fence, "fence", rv_codec_r_f, rv_fmt_pred_succ) -OP(fence_i, "fence.i", rv_codec_none, rv_fmt_none) -OP(lwu, "lwu", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(ld, "ld", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(sd, "sd", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(add_uw, "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(addd, "addd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(addi, "addi", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addi) +OP(addid, "addid", rv_codec_i, rv_fmt_rd_rs1_imm) OP(addiw, "addiw", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_addiw) -OP(slliw, "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) -OP(srliw, "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) -OP(sraiw, "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) OP(addw, "addw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(subw, "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw) -OP(sllw, "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(srlw, "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sraw, "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(ldu, "ldu", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(lq, "lq", rv_codec_i, rv_fmt_rd_offset_rs1) -OP(sq, "sq", rv_codec_s, rv_fmt_rs2_offset_rs1) -OP(addid, "addid", rv_codec_i, rv_fmt_rd_rs1_imm) -OP(sllid, "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) -OP(srlid, "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) -OP(sraid, "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) -OP(addd, "addd", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(subd, "subd", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(slld, "slld", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(srld, "srld", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(srad, "srad", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mul, "mul", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mulh, "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mulhsu, "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mulhu, "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(div, "div", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(divu, "divu", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(rem, "rem", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(remu, "remu", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(mulw, "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(divw, "divw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(divuw, "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(remw, "remw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(remuw, "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(muld, "muld", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(divd, "divd", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(divud, "divud", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(remd, "remd", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(remud, "remud", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(lr_w, "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) -OP(sc_w, "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoswap_w, "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(aes32dsi, "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes32dsmi, "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes32esi, "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes32esmi, "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(aes64ds, "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64dsm, "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64es, "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64esm, "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(aes64im, "aes64im", rv_codec_r, rv_fmt_rd_rs1) +OP(aes64ks1i, "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum) +OP(aes64ks2, "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(amoadd_b, "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_d, "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_h, "amoadd.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoadd_q, "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amoadd_w, "amoadd.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoxor_w, "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoor_w, "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_b, "amoand.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_d, "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_h, "amoand.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoand_q, "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amoand_w, "amoand.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomin_w, "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_b, "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_d, "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_h, "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_q, "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amocas_w, "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_b, "amomax.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_d, "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_h, "amomax.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomax_q, "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amomax_w, "amomax.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amominu_w, "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_b, "amomaxu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_d, "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_h, "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomaxu_q, "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amomaxu_w, "amomaxu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(lr_d, "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) -OP(sc_d, "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoswap_d, "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoadd_d, "amoadd.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoxor_d, "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoor_d, "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoand_d, "amoand.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_b, "amomin.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amomin_d, "amomin.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomax_d, "amomax.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_h, "amomin.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_q, "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amomin_w, "amomin.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_b, "amominu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amominu_d, "amominu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomaxu_d, "amomaxu.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(lr_q, "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) -OP(sc_q, "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_h, "amominu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_q, "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amominu_w, "amominu.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_b, "amoor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_d, "amoor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_h, "amoor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_q, "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoor_w, "amoor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_b, "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_d, "amoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_h, "amoswap.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amoswap_q, "amoswap.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoadd_q, "amoadd.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoswap_w, "amoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_b, "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_d, "amoxor.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(amoxor_h, "amoxor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) OP(amoxor_q, "amoxor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoor_q, "amoor.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoand_q, "amoand.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomin_q, "amomin.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomax_q, "amomax.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amominu_q, "amominu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomaxu_q, "amomaxu.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(ecall, "ecall", rv_codec_none, rv_fmt_none) -OP(ebreak, "ebreak", rv_codec_none, rv_fmt_none) -OP(uret, "uret", rv_codec_none, rv_fmt_none) -OP(sret, "sret", rv_codec_none, rv_fmt_none) -OP(hret, "hret", rv_codec_none, rv_fmt_none) -OP(mret, "mret", rv_codec_none, rv_fmt_none) -OP(dret, "dret", rv_codec_none, rv_fmt_none) -OP(sfence_vm, "sfence.vm", rv_codec_r, rv_fmt_rs1) -OP(sfence_vma, "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2) -OP(wfi, "wfi", rv_codec_none, rv_fmt_none) -OP(csrrw, "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1) -OP(csrrs, "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1) -OP(csrrc, "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1) -OP(csrrwi, "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm) -OP(csrrsi, "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm) -OP(csrrci, "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm) -OP(flw, "flw", rv_codec_i, rv_fmt_frd_offset_rs1) -OP(fsw, "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1) -OP(fmadd_s, "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fmsub_s, "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fnmsub_s, "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fnmadd_s, "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fadd_s, "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fsub_s, "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fmul_s, "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fdiv_s, "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fsgnj_s, "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s) -OP(fsgnjn_s, "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s) -OP(fsgnjx_s, "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s) -OP(fmin_s, "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fmax_s, "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fsqrt_s, "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fle_s, "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(flt_s, "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(feq_s, "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fcvt_w_s, "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_wu_s, "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_s_w, "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fcvt_s_wu, "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fmv_x_s, "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1) -OP(fclass_s, "fclass.s", rv_codec_r, rv_fmt_rd_frs1) -OP(fmv_s_x, "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1) -OP(fcvt_l_s, "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_lu_s, "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_s_l, "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fcvt_s_lu, "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fld, "fld", rv_codec_i, rv_fmt_frd_offset_rs1) -OP(fsd, "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1) -OP(fmadd_d, "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fmsub_d, "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fnmsub_d, "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fnmadd_d, "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fadd_d, "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fsub_d, "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fmul_d, "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fdiv_d, "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fsgnj_d, "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d) -OP(fsgnjn_d, "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d) -OP(fsgnjx_d, "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d) -OP(fmin_d, "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fmax_d, "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fcvt_s_d, "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fcvt_d_s, "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fsqrt_d, "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fle_d, "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(flt_d, "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(feq_d, "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fcvt_w_d, "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_wu_d, "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_d_w, "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fcvt_d_wu, "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fclass_d, "fclass.d", rv_codec_r, rv_fmt_rd_frs1) -OP(fcvt_l_d, "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_lu_d, "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fmv_x_d, "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1) -OP(fcvt_d_l, "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fcvt_d_lu, "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fmv_d_x, "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1) -OP(flq, "flq", rv_codec_i, rv_fmt_frd_offset_rs1) -OP(fsq, "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1) -OP(fmadd_q, "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fmsub_q, "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fnmsub_q, "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fnmadd_q, "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) -OP(fadd_q, "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fsub_q, "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fmul_q, "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fdiv_q, "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) -OP(fsgnj_q, "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q) -OP(fsgnjn_q, "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q) -OP(fsgnjx_q, "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q) -OP(fmin_q, "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fmax_q, "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fcvt_s_q, "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fcvt_q_s, "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fcvt_d_q, "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fcvt_q_d, "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fsqrt_q, "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fle_q, "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(flt_q, "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(feq_q, "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fcvt_w_q, "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_wu_q, "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_q_w, "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fcvt_q_wu, "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fclass_q, "fclass.q", rv_codec_r, rv_fmt_rd_frs1) -OP(fcvt_l_q, "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_lu_q, "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) -OP(fcvt_q_l, "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fcvt_q_lu, "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) -OP(fmv_x_q, "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1) -OP(fmv_q_x, "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1) -OP(c_addi4spn, "c.addi4spn", rv_codec_ciw_4spn, NULL, DECOMP(op_addi)) -OP(c_fld, "c.fld", rv_codec_cl_ld, NULL, DECOMP(op_fld)) -OP(c_lw, "c.lw", rv_codec_cl_lw, NULL, DECOMP(op_lw)) -OP(c_flw, "c.flw", rv_codec_cl_lw, NULL, DECOMP(op_flw)) -OP(c_fsd, "c.fsd", rv_codec_cs_sd, NULL, DECOMP(op_fsd)) -OP(c_sw, "c.sw", rv_codec_cs_sw, NULL, DECOMP(op_sw)) -OP(c_fsw, "c.fsw", rv_codec_cs_sw, NULL, DECOMP(op_fsw)) +OP(amoxor_w, "amoxor.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(and, "and", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(andi, "andi", rv_codec_i, rv_fmt_rd_rs1_imm) +OP(andn, "andn", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(auipc, "auipc", rv_codec_u, rv_fmt_rd_uoffset) +OP(bclr, "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(bclri, "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(beq, "beq", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_beq) +OP(beqz, "beqz", rv_codec_illegal, rv_fmt_rs1_offset) +OP(bext, "bext", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(bexti, "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(bge, "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge) +OP(bgeu, "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset) +OP(bgez, "bgez", rv_codec_illegal, rv_fmt_rs1_offset) +OP(bgtz, "bgtz", rv_codec_illegal, rv_fmt_rs2_offset) +OP(binv, "binv", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(binvi, "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(blez, "blez", rv_codec_illegal, rv_fmt_rs2_offset) +OP(blt, "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt) +OP(bltu, "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset) +OP(bltz, "bltz", rv_codec_illegal, rv_fmt_rs1_offset) +OP(bne, "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne) +OP(bnez, "bnez", rv_codec_illegal, rv_fmt_rs1_offset) +OP(brev8, "brev8", rv_codec_r, rv_fmt_rd_rs1) +OP(bset, "bset", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(bseti, "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(c_add, "c.add", rv_codec_cr, NULL, DECOMP(op_add)) OP(c_addi, "c.addi", rv_codec_ci, NULL, DECOMP(op_addi)) -OP(c_jal, "c.jal", rv_codec_cj_jal, NULL, DECOMP(op_jal)) -OP(c_li, "c.li", rv_codec_ci_li, NULL, DECOMP(op_addi)) OP(c_addi16sp, "c.addi16sp", rv_codec_ci_16sp, NULL, DECOMP(op_addi)) -OP(c_lui, "c.lui", rv_codec_ci_lui, NULL, DECOMP(op_lui)) -OP(c_srli, "c.srli", rv_codec_cb_sh6, NULL, DECOMP(op_srli)) -OP(c_srai, "c.srai", rv_codec_cb_sh6, NULL, DECOMP(op_srai)) -OP(c_andi, "c.andi", rv_codec_cb_imm, NULL, DECOMP(op_andi)) -OP(c_sub, "c.sub", rv_codec_cs, NULL, DECOMP(op_sub)) -OP(c_xor, "c.xor", rv_codec_cs, NULL, DECOMP(op_xor)) -OP(c_or, "c.or", rv_codec_cs, NULL, DECOMP(op_or)) -OP(c_and, "c.and", rv_codec_cs, NULL, DECOMP(op_and)) -OP(c_subw, "c.subw", rv_codec_cs, NULL, DECOMP(op_subw)) +OP(c_addi4spn, "c.addi4spn", rv_codec_ciw_4spn, NULL, DECOMP(op_addi)) +OP(c_addiw, "c.addiw", rv_codec_ci, NULL, DECOMP(op_addiw)) OP(c_addw, "c.addw", rv_codec_cs, NULL, DECOMP(op_addw)) -OP(c_j, "c.j", rv_codec_cj, NULL, DECOMP(op_j)) +OP(c_and, "c.and", rv_codec_cs, NULL, DECOMP(op_and)) +OP(c_andi, "c.andi", rv_codec_cb_imm, NULL, DECOMP(op_andi)) OP(c_beqz, "c.beqz", rv_codec_cb, NULL, DECOMP(op_beqz)) OP(c_bnez, "c.bnez", rv_codec_cb, NULL, DECOMP(op_bnez)) -OP(c_slli, "c.slli", rv_codec_ci_sh6, NULL, DECOMP(op_slli)) +OP(c_ebreak, "c.ebreak", rv_codec_ci_none, NULL, DECOMP(op_ebreak)) +OP(c_fld, "c.fld", rv_codec_cl_ld, NULL, DECOMP(op_fld)) OP(c_fldsp, "c.fldsp", rv_codec_ci_ldsp, NULL, DECOMP(op_fld)) -OP(c_lwsp, "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(op_lw)) +OP(c_flw, "c.flw", rv_codec_cl_lw, NULL, DECOMP(op_flw)) OP(c_flwsp, "c.flwsp", rv_codec_ci_lwsp, NULL, DECOMP(op_flw)) -OP(c_jr, "c.jr", rv_codec_cr_jr, NULL, DECOMP(op_jr)) -OP(c_mv, "c.mv", rv_codec_cr_mv, NULL, DECOMP(op_mv)) -OP(c_ebreak, "c.ebreak", rv_codec_ci_none, NULL, DECOMP(op_ebreak)) -OP(c_jalr, "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(op_jalr)) -OP(c_add, "c.add", rv_codec_cr, NULL, DECOMP(op_add)) +OP(c_fsd, "c.fsd", rv_codec_cs_sd, NULL, DECOMP(op_fsd)) OP(c_fsdsp, "c.fsdsp", rv_codec_css_sdsp, NULL, DECOMP(op_fsd)) -OP(c_swsp, "c.swsp", rv_codec_css_swsp, NULL, DECOMP(op_sw)) +OP(c_fsw, "c.fsw", rv_codec_cs_sw, NULL, DECOMP(op_fsw)) OP(c_fswsp, "c.fswsp", rv_codec_css_swsp, NULL, DECOMP(op_fsw)) +OP(c_j, "c.j", rv_codec_cj, NULL, DECOMP(op_j)) +OP(c_jal, "c.jal", rv_codec_cj_jal, NULL, DECOMP(op_jal)) +OP(c_jalr, "c.jalr", rv_codec_cr_jalr, NULL, DECOMP(op_jalr)) +OP(c_jr, "c.jr", rv_codec_cr_jr, NULL, DECOMP(op_jr)) +OP(c_lbu, "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst) OP(c_ld, "c.ld", rv_codec_cl_ld, NULL, DECOMP(op_ld)) -OP(c_sd, "c.sd", rv_codec_cs_sd, NULL, DECOMP(op_sd)) -OP(c_addiw, "c.addiw", rv_codec_ci, NULL, DECOMP(op_addiw)) OP(c_ldsp, "c.ldsp", rv_codec_ci_ldsp, NULL, DECOMP(op_ld)) -OP(c_sdsp, "c.sdsp", rv_codec_css_sdsp, NULL, DECOMP(op_sd)) +OP(c_lh, "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) +OP(c_lhu, "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) +OP(c_li, "c.li", rv_codec_ci_li, NULL, DECOMP(op_addi)) OP(c_lq, "c.lq", rv_codec_cl_lq, NULL, DECOMP(op_lq)) -OP(c_sq, "c.sq", rv_codec_cs_sq, NULL, DECOMP(op_sq)) OP(c_lqsp, "c.lqsp", rv_codec_ci_lqsp, NULL, DECOMP(op_lq)) +OP(c_lui, "c.lui", rv_codec_ci_lui, NULL, DECOMP(op_lui)) +OP(c_lw, "c.lw", rv_codec_cl_lw, NULL, DECOMP(op_lw)) +OP(c_lwsp, "c.lwsp", rv_codec_ci_lwsp, NULL, DECOMP(op_lw)) +OP(c_mop, "c.mop", rv_codec_cmop, rv_fmt_cmop) +OP(c_mul, "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2) +OP(c_mv, "c.mv", rv_codec_cr_mv, NULL, DECOMP(op_mv)) +OP(c_not, "c.not", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_or, "c.or", rv_codec_cs, NULL, DECOMP(op_or)) +OP(c_sb, "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst) +OP(c_sd, "c.sd", rv_codec_cs_sd, NULL, DECOMP(op_sd)) +OP(c_sdsp, "c.sdsp", rv_codec_css_sdsp, NULL, DECOMP(op_sd)) +OP(c_sext_b, "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_sext_h, "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_sh, "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) +OP(c_slli, "c.slli", rv_codec_ci_sh6, NULL, DECOMP(op_slli)) +OP(c_sq, "c.sq", rv_codec_cs_sq, NULL, DECOMP(op_sq)) OP(c_sqsp, "c.sqsp", rv_codec_css_sqsp, NULL, DECOMP(op_sq)) -OP(nop, "nop", rv_codec_illegal, rv_fmt_none) -OP(mv, "mv", rv_codec_illegal, rv_fmt_rd_rs1, rvcp_mv) -OP(not, "not", rv_codec_illegal, rv_fmt_rd_rs1) -OP(neg, "neg", rv_codec_illegal, rv_fmt_rd_rs2) -OP(negw, "negw", rv_codec_illegal, rv_fmt_rd_rs2) -OP(sext_w, "sext.w", rv_codec_illegal, rv_fmt_rd_rs1) -OP(seqz, "seqz", rv_codec_illegal, rv_fmt_rd_rs1) -OP(snez, "snez", rv_codec_illegal, rv_fmt_rd_rs2) -OP(sltz, "sltz", rv_codec_illegal, rv_fmt_rd_rs1) -OP(sgtz, "sgtz", rv_codec_illegal, rv_fmt_rd_rs2) -OP(fmv_s, "fmv.s", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fabs_s, "fabs.s", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fneg_s, "fneg.s", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fmv_d, "fmv.d", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fabs_d, "fabs.d", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fneg_d, "fneg.d", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fmv_q, "fmv.q", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fabs_q, "fabs.q", rv_codec_illegal, rv_fmt_frd_frs1) -OP(fneg_q, "fneg.q", rv_codec_illegal, rv_fmt_frd_frs1) -OP(beqz, "beqz", rv_codec_illegal, rv_fmt_rs1_offset) -OP(bnez, "bnez", rv_codec_illegal, rv_fmt_rs1_offset) -OP(blez, "blez", rv_codec_illegal, rv_fmt_rs2_offset) -OP(bgez, "bgez", rv_codec_illegal, rv_fmt_rs1_offset) -OP(bltz, "bltz", rv_codec_illegal, rv_fmt_rs1_offset) -OP(bgtz, "bgtz", rv_codec_illegal, rv_fmt_rs2_offset) -OP(jal_ra, "jal", rv_codec_illegal, rv_fmt_offset) -OP(jalr_ra, "jalr", rv_codec_illegal, rv_fmt_rs1) -OP(j, "j", rv_codec_illegal, rv_fmt_offset) -OP(ret, "ret", rv_codec_illegal, rv_fmt_none) -OP(jr, "jr", rv_codec_illegal, rv_fmt_rs1, rvcp_jr) -OP(rdcycle, "rdcycle", rv_codec_i_csr, rv_fmt_rd) -OP(rdtime, "rdtime", rv_codec_i_csr, rv_fmt_rd) -OP(rdinstret, "rdinstret", rv_codec_i_csr, rv_fmt_rd) -OP(rdcycleh, "rdcycleh", rv_codec_i_csr, rv_fmt_rd) -OP(rdtimeh, "rdtimeh", rv_codec_i_csr, rv_fmt_rd) -OP(rdinstreth, "rdinstreth", rv_codec_i_csr, rv_fmt_rd) -OP(frcsr, "frcsr", rv_codec_i_csr, rv_fmt_rd) -OP(frrm, "frrm", rv_codec_i_csr, rv_fmt_rd) -OP(frflags, "frflags", rv_codec_i_csr, rv_fmt_rd) -OP(fscsr, "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1) -OP(fsrm, "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1) -OP(fsflags, "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1) -OP(fsrmi, "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm) -OP(fsflagsi, "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm) -OP(bseti, "bseti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) -OP(bclri, "bclri", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) -OP(binvi, "binvi", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) -OP(bexti, "bexti", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) -OP(rori, "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) -OP(clz, "clz", rv_codec_r, rv_fmt_rd_rs1) -OP(ctz, "ctz", rv_codec_r, rv_fmt_rd_rs1) -OP(cpop, "cpop", rv_codec_r, rv_fmt_rd_rs1) -OP(sext_h, "sext.h", rv_codec_r, rv_fmt_rd_rs1) -OP(sext_b, "sext.b", rv_codec_r, rv_fmt_rd_rs1) -OP(xnor, "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(orn, "orn", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(andn, "andn", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(rol, "rol", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(ror, "ror", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sh1add, "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sh2add, "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sh3add, "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sh1add_uw, "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sh2add_uw, "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sh3add_uw, "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(c_srai, "c.srai", rv_codec_cb_sh6, NULL, DECOMP(op_srai)) +OP(c_srli, "c.srli", rv_codec_cb_sh6, NULL, DECOMP(op_srli)) +OP(c_sspopchk, "c.sspopchk", rv_codec_cmop_ss, NULL, DECOMP(op_sspopchk)) +OP(c_sspush, "c.sspush", rv_codec_cmop_ss, NULL, DECOMP(op_sspush)) +OP(c_sub, "c.sub", rv_codec_cs, NULL, DECOMP(op_sub)) +OP(c_subw, "c.subw", rv_codec_cs, NULL, DECOMP(op_subw)) +OP(c_sw, "c.sw", rv_codec_cs_sw, NULL, DECOMP(op_sw)) +OP(c_swsp, "c.swsp", rv_codec_css_swsp, NULL, DECOMP(op_sw)) +OP(c_xor, "c.xor", rv_codec_cs, NULL, DECOMP(op_xor)) +OP(c_zext_b, "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_zext_h, "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd) +OP(c_zext_w, "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd) +OP(cbo_clean, "cbo.clean", rv_codec_r, rv_fmt_rs1) +OP(cbo_flush, "cbo.flush", rv_codec_r, rv_fmt_rs1) +OP(cbo_inval, "cbo.inval", rv_codec_r, rv_fmt_rs1) +OP(cbo_zero, "cbo.zero", rv_codec_r, rv_fmt_rs1) OP(clmul, "clmul", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(clmulr, "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2) OP(clmulh, "clmulh", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(min, "min", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(minu, "minu", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(max, "max", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(maxu, "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(clmulr, "clmulr", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(clz, "clz", rv_codec_r, rv_fmt_rd_rs1) OP(clzw, "clzw", rv_codec_r, rv_fmt_rd_rs1) -OP(ctzw, "ctzw", rv_codec_r, rv_fmt_rd_rs1) +OP(cm_jalt, "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index) +OP(cm_jt, "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index) +OP(cm_mva01s, "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2) +OP(cm_mvsa01, "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2) +OP(cm_pop, "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) +OP(cm_popret, "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) +OP(cm_popretz, "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) +OP(cm_push, "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist) +OP(cpop, "cpop", rv_codec_r, rv_fmt_rd_rs1) OP(cpopw, "cpopw", rv_codec_r, rv_fmt_rd_rs1) -OP(slli_uw, "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) -OP(add_uw, "add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(rolw, "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(rorw, "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(rev8, "rev8", rv_codec_r, rv_fmt_rd_rs1) -OP(zext_h, "zext.h", rv_codec_r, rv_fmt_rd_rs1) -OP(roriw, "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) -OP(orc_b, "orc.b", rv_codec_r, rv_fmt_rd_rs1) -OP(bset, "bset", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(bclr, "bclr", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(binv, "binv", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(bext, "bext", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(aes32esmi, "aes32esmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) -OP(aes32esi, "aes32esi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) -OP(aes32dsmi, "aes32dsmi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) -OP(aes32dsi, "aes32dsi", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) -OP(aes64ks1i, "aes64ks1i", rv_codec_k_rnum, rv_fmt_rd_rs1_rnum) -OP(aes64ks2, "aes64ks2", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(aes64im, "aes64im", rv_codec_r, rv_fmt_rd_rs1) -OP(aes64esm, "aes64esm", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(aes64es, "aes64es", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(aes64dsm, "aes64dsm", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(aes64ds, "aes64ds", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha256sig0, "sha256sig0", rv_codec_r, rv_fmt_rd_rs1) -OP(sha256sig1, "sha256sig1", rv_codec_r, rv_fmt_rd_rs1) -OP(sha256sum0, "sha256sum0", rv_codec_r, rv_fmt_rd_rs1) -OP(sha256sum1, "sha256sum1", rv_codec_r, rv_fmt_rd_rs1) -OP(sha512sig0, "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sig1, "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sum0, "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sum1, "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sum0r, "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sum1r, "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sig0l, "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sig0h, "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sig1l, "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sha512sig1h, "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(sm3p0, "sm3p0", rv_codec_r, rv_fmt_rd_rs1) -OP(sm3p1, "sm3p1", rv_codec_r, rv_fmt_rd_rs1) -OP(sm4ed, "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) -OP(sm4ks, "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) -OP(brev8, "brev8", rv_codec_r, rv_fmt_rd_rs1) -OP(pack, "pack", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(packh, "packh", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(packw, "packw", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(unzip, "unzip", rv_codec_r, rv_fmt_rd_rs1) -OP(zip, "zip", rv_codec_r, rv_fmt_rd_rs1) -OP(xperm4, "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(xperm8, "xperm8", rv_codec_r, rv_fmt_rd_rs1) -OP(vle8_v, "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vle16_v, "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vle32_v, "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vle64_v, "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vse8_v, "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vse16_v, "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vse32_v, "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vse64_v, "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vlm_v, "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vsm_v, "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vlse8_v, "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vlse16_v, "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vlse32_v, "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vlse64_v, "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vsse8_v, "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vsse16_v, "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vsse32_v, "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vsse64_v, "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) -OP(vluxei8_v, "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vluxei16_v, "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vluxei32_v, "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vluxei64_v, "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vloxei8_v, "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vloxei16_v, "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vloxei32_v, "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vloxei64_v, "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsuxei8_v, "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsuxei16_v, "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsuxei32_v, "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsuxei64_v, "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsoxei8_v, "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsoxei16_v, "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsoxei32_v, "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vsoxei64_v, "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) -OP(vle8ff_v, "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vle16ff_v, "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vle32ff_v, "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vle64ff_v, "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl1re8_v, "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl1re16_v, "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl1re32_v, "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl1re64_v, "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl2re8_v, "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl2re16_v, "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl2re32_v, "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl2re64_v, "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl4re8_v, "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl4re16_v, "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl4re32_v, "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl4re64_v, "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl8re8_v, "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl8re16_v, "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl8re32_v, "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vl8re64_v, "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vs1r_v, "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vs2r_v, "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vs4r_v, "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vs8r_v, "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) -OP(vadd_vv, "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vadd_vx, "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vadd_vi, "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vsub_vv, "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vsub_vx, "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vrsub_vx, "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vrsub_vi, "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vwaddu_vv, "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwaddu_vx, "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwadd_vv, "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwadd_vx, "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwsubu_vv, "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwsubu_vx, "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwsub_vv, "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwsub_vx, "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwaddu_wv, "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwaddu_wx, "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwadd_wv, "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwadd_wx, "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwsubu_wv, "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwsubu_wx, "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwsub_wv, "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwsub_wx, "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vadc_vvm, "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) -OP(vadc_vxm, "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) -OP(vadc_vim, "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) -OP(vmadc_vvm, "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) -OP(vmadc_vxm, "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) -OP(vmadc_vim, "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) -OP(vsbc_vvm, "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) -OP(vsbc_vxm, "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) -OP(vmsbc_vvm, "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) -OP(vmsbc_vxm, "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) -OP(vand_vv, "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vand_vx, "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vand_vi, "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vor_vv, "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vor_vx, "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vor_vi, "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vxor_vv, "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vxor_vx, "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vxor_vi, "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vsll_vv, "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vsll_vx, "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vsll_vi, "vsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vsrl_vv, "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vsrl_vx, "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vsrl_vi, "vsrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vsra_vv, "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vsra_vx, "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vsra_vi, "vsra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vnsrl_wv, "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vnsrl_wx, "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vnsrl_wi, "vnsrl.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vnsra_wv, "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vnsra_wx, "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vnsra_wi, "vnsra.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vmseq_vv, "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmseq_vx, "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmseq_vi, "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vmsne_vv, "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmsne_vx, "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmsne_vi, "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vmsltu_vv, "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmsltu_vx, "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmslt_vv, "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmslt_vx, "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmsleu_vv, "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmsleu_vx, "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmsleu_vi, "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vmsle_vv, "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmsle_vx, "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmsle_vi, "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vmsgtu_vx, "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmsgtu_vi, "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vmsgt_vx, "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmsgt_vi, "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vminu_vv, "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vminu_vx, "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmin_vv, "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmin_vx, "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmaxu_vv, "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmaxu_vx, "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmax_vv, "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmax_vx, "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmul_vv, "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmul_vx, "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmulh_vv, "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmulh_vx, "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmulhu_vv, "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmulhu_vx, "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmulhsu_vv, "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmulhsu_vx, "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vdivu_vv, "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vdivu_vx, "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vdiv_vv, "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vdiv_vx, "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vremu_vv, "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vremu_vx, "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vrem_vv, "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vrem_vx, "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwmulu_vv, "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwmulu_vx, "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwmulsu_vv, "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwmulsu_vx, "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwmul_vv, "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwmul_vx, "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vmacc_vv, "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vmacc_vx, "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vnmsac_vv, "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vnmsac_vx, "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vmadd_vv, "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vmadd_vx, "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vnmsub_vv, "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vnmsub_vx, "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vwmaccu_vv, "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vwmaccu_vx, "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vwmacc_vv, "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vwmacc_vx, "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vwmaccsu_vv, "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vwmaccsu_vx, "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vwmaccus_vx, "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) -OP(vmv_v_v, "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1) -OP(vmv_v_x, "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1) -OP(vmv_v_i, "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm) -OP(vmerge_vvm, "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) -OP(vmerge_vxm, "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) -OP(vmerge_vim, "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) -OP(vsaddu_vv, "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vsaddu_vx, "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vsaddu_vi, "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vsadd_vv, "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vsadd_vx, "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vsadd_vi, "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) -OP(vssubu_vv, "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vssubu_vx, "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vssub_vv, "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vssub_vx, "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vaadd_vv, "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vaadd_vx, "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vaaddu_vv, "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vaaddu_vx, "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vasub_vv, "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vasub_vx, "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vasubu_vv, "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vasubu_vx, "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vsmul_vv, "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vsmul_vx, "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vssrl_vv, "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vssrl_vx, "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vssrl_vi, "vssrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vssra_vv, "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vssra_vx, "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vssra_vi, "vssra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vnclipu_wv, "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vnclipu_wx, "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vnclipu_wi, "vnclipu.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vnclip_wv, "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vnclip_wx, "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vnclip_wi, "vnclip.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vfadd_vv, "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfadd_vf, "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfsub_vv, "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfsub_vf, "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfrsub_vf, "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfwadd_vv, "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfwadd_vf, "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfwadd_wv, "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfwadd_wf, "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfwsub_vv, "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfwsub_vf, "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfwsub_wv, "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfwsub_wf, "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfmul_vv, "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfmul_vf, "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfdiv_vv, "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfdiv_vf, "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfrdiv_vf, "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfwmul_vv, "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfwmul_vf, "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfmacc_vv, "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfmacc_vf, "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfnmacc_vv, "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfnmacc_vf, "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfmsac_vv, "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfmsac_vf, "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfnmsac_vv, "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfnmsac_vf, "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfmadd_vv, "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfmadd_vf, "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfnmadd_vv, "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfnmadd_vf, "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfmsub_vv, "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfmsub_vf, "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfnmsub_vv, "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfnmsub_vf, "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfwmacc_vv, "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfwmacc_vf, "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfwnmacc_vv, "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfwnmacc_vf, "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfwmsac_vv, "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfwmsac_vf, "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfwnmsac_vv, "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfwnmsac_vf, "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) -OP(vfsqrt_v, "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vfrsqrt7_v, "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vfrec7_v, "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vfmin_vv, "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfmin_vf, "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfmax_vv, "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfmax_vf, "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfsgnj_vv, "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfsgnj_vf, "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfsgnjn_vv, "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfsgnjn_vf, "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfsgnjx_vv, "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfsgnjx_vf, "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfslide1up_vf, "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfslide1down_vf, "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vmfeq_vv, "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmfeq_vf, "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vmfne_vv, "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmfne_vf, "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vmflt_vv, "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmflt_vf, "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vmfle_vv, "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmfle_vf, "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vmfgt_vf, "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vmfge_vf, "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) -OP(vfclass_v, "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfmerge_vfm, "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl) -OP(vfmv_v_f, "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1) -OP(vfcvt_xu_f_v, "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfcvt_x_f_v, "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfcvt_f_xu_v, "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfcvt_f_x_v, "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfcvt_rtz_xu_f_v, "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfcvt_rtz_x_f_v, "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvt_xu_f_v, "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvt_x_f_v, "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvt_f_xu_v, "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvt_f_x_v, "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvt_f_f_v, "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvt_rtz_xu_f_v, "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvt_rtz_x_f_v, "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_xu_f_w, "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_x_f_w, "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_f_xu_w, "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_f_x_w, "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_f_f_w, "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_rod_f_f_w, "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_rtz_xu_f_w, "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfncvt_rtz_x_f_w, "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vredsum_vs, "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vredand_vs, "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vredor_vs, "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vredxor_vs, "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vredminu_vs, "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vredmin_vs, "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vredmaxu_vs, "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vredmax_vs, "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwredsumu_vs, "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vwredsum_vs, "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfredusum_vs, "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfredosum_vs, "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfredmin_vs, "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfredmax_vs, "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfwredusum_vs, "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vfwredosum_vs, "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmand_mm, "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmnand_mm, "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmandn_mm, "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmxor_mm, "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmor_mm, "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmnor_mm, "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmorn_mm, "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vmxnor_mm, "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vcpop_m, "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm) -OP(vfirst_m, "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm) -OP(vmsbf_m, "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vmsif_m, "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vmsof_m, "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(viota_m, "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vid_v, "vid.v", rv_codec_v_r, rv_fmt_vd_vm) -OP(vmv_x_s, "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2) -OP(vmv_s_x, "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1) -OP(vfmv_f_s, "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2) -OP(vfmv_s_f, "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1) -OP(vslideup_vx, "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vslideup_vi, "vslideup.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vslide1up_vx, "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vslidedown_vx, "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vslidedown_vi, "vslidedown.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vslide1down_vx, "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vrgather_vv, "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vrgatherei16_vv, "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) -OP(vrgather_vx, "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vrgather_vi, "vrgather.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(vcompress_vm, "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1) -OP(vmv1r_v, "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vmv2r_v, "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vmv4r_v, "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vmv8r_v, "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vzext_vf2, "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vzext_vf4, "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vzext_vf8, "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vsext_vf2, "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vsext_vf4, "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vsext_vf8, "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vsetvli, "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli) -OP(vsetivli, "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli) -OP(vsetvl, "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2) -OP(c_zext_b, "c.zext.b", rv_codec_zcb_ext, rv_fmt_rd) -OP(c_sext_b, "c.sext.b", rv_codec_zcb_ext, rv_fmt_rd) -OP(c_zext_h, "c.zext.h", rv_codec_zcb_ext, rv_fmt_rd) -OP(c_sext_h, "c.sext.h", rv_codec_zcb_ext, rv_fmt_rd) -OP(c_zext_w, "c.zext.w", rv_codec_zcb_ext, rv_fmt_rd) -OP(c_not, "c.not", rv_codec_zcb_ext, rv_fmt_rd) -OP(c_mul, "c.mul", rv_codec_zcb_mul, rv_fmt_rd_rs2) -OP(c_lbu, "c.lbu", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst) -OP(c_lhu, "c.lhu", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) -OP(c_lh, "c.lh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) -OP(c_sb, "c.sb", rv_codec_zcb_lb, rv_fmt_rs1_rs2_zce_ldst) -OP(c_sh, "c.sh", rv_codec_zcb_lh, rv_fmt_rs1_rs2_zce_ldst) -OP(cm_push, "cm.push", rv_codec_zcmp_cm_pushpop, rv_fmt_push_rlist) -OP(cm_pop, "cm.pop", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) -OP(cm_popret, "cm.popret", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) -OP(cm_popretz, "cm.popretz", rv_codec_zcmp_cm_pushpop, rv_fmt_pop_rlist) -OP(cm_mva01s, "cm.mva01s", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2) -OP(cm_mvsa01, "cm.mvsa01", rv_codec_zcmp_cm_mv, rv_fmt_rd_rs2) -OP(cm_jt, "cm.jt", rv_codec_zcmt_jt, rv_fmt_zcmt_index) -OP(cm_jalt, "cm.jalt", rv_codec_zcmt_jt, rv_fmt_zcmt_index) +OP(csrrc, "csrrc", rv_codec_i_csr, rv_fmt_rd_csr_rs1) +OP(csrrci, "csrrci", rv_codec_i_csr, rv_fmt_rd_csr_zimm) +OP(csrrs, "csrrs", rv_codec_i_csr, rv_fmt_rd_csr_rs1) +OP(csrrsi, "csrrsi", rv_codec_i_csr, rv_fmt_rd_csr_zimm) +OP(csrrw, "csrrw", rv_codec_i_csr, rv_fmt_rd_csr_rs1) +OP(csrrwi, "csrrwi", rv_codec_i_csr, rv_fmt_rd_csr_zimm) +OP(ctz, "ctz", rv_codec_r, rv_fmt_rd_rs1) +OP(ctzw, "ctzw", rv_codec_r, rv_fmt_rd_rs1) OP(czero_eqz, "czero.eqz", rv_codec_r, rv_fmt_rd_rs1_rs2) OP(czero_nez, "czero.nez", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(div, "div", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divd, "divd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divu, "divu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divud, "divud", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divuw, "divuw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(divw, "divw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(dret, "dret", rv_codec_none, rv_fmt_none) +OP(ebreak, "ebreak", rv_codec_none, rv_fmt_none) +OP(ecall, "ecall", rv_codec_none, rv_fmt_none) +OP(fabs_d, "fabs.d", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fabs_q, "fabs.q", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fabs_s, "fabs.s", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fadd_d, "fadd.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fadd_q, "fadd.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fadd_s, "fadd.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fclass_d, "fclass.d", rv_codec_r, rv_fmt_rd_frs1) +OP(fclass_q, "fclass.q", rv_codec_r, rv_fmt_rd_frs1) +OP(fclass_s, "fclass.s", rv_codec_r, rv_fmt_rd_frs1) OP(fcvt_bf16_s, "fcvt.bf16.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_d_l, "fcvt.d.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_d_lu, "fcvt.d.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_d_q, "fcvt.d.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_d_s, "fcvt.d.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_d_w, "fcvt.d.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_d_wu, "fcvt.d.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_l_d, "fcvt.l.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_l_q, "fcvt.l.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_l_s, "fcvt.l.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_lu_d, "fcvt.lu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_lu_q, "fcvt.lu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_lu_s, "fcvt.lu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_q_d, "fcvt.q.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_q_l, "fcvt.q.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_q_lu, "fcvt.q.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_q_s, "fcvt.q.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_q_w, "fcvt.q.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_q_wu, "fcvt.q.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) OP(fcvt_s_bf16, "fcvt.s.bf16", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(vfncvtbf16_f_f_w, "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwcvtbf16_f_f_v, "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) -OP(vfwmaccbf16_vv, "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) -OP(vfwmaccbf16_vf, "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(fcvt_s_d, "fcvt.s.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_s_l, "fcvt.s.l", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_s_lu, "fcvt.s.lu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_s_q, "fcvt.s.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fcvt_s_w, "fcvt.s.w", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_s_wu, "fcvt.s.wu", rv_codec_r_m, rv_fmt_rm_frd_rs1) +OP(fcvt_w_d, "fcvt.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_w_q, "fcvt.w.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_w_s, "fcvt.w.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_wu_d, "fcvt.wu.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_wu_q, "fcvt.wu.q", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvt_wu_s, "fcvt.wu.s", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fcvtmod_w_d, "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fdiv_d, "fdiv.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fdiv_q, "fdiv.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fdiv_s, "fdiv.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fence, "fence", rv_codec_r_f, rv_fmt_pred_succ) +OP(fence_i, "fence.i", rv_codec_none, rv_fmt_none) +OP(feq_d, "feq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(feq_q, "feq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(feq_s, "feq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fld, "fld", rv_codec_i, rv_fmt_frd_offset_rs1) +OP(fle_d, "fle.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fle_q, "fle.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fle_s, "fle.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fleq_d, "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fleq_h, "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fleq_q, "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fleq_s, "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) OP(flh, "flh", rv_codec_i, rv_fmt_frd_offset_rs1) -OP(fsh, "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1) -OP(fmv_h_x, "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1) -OP(fmv_x_h, "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1) -OP(fli_s, "fli.s", rv_codec_fli, rv_fmt_fli) OP(fli_d, "fli.d", rv_codec_fli, rv_fmt_fli) -OP(fli_q, "fli.q", rv_codec_fli, rv_fmt_fli) OP(fli_h, "fli.h", rv_codec_fli, rv_fmt_fli) -OP(fminm_s, "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fmaxm_s, "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fminm_d, "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fli_q, "fli.q", rv_codec_fli, rv_fmt_fli) +OP(fli_s, "fli.s", rv_codec_fli, rv_fmt_fli) +OP(flq, "flq", rv_codec_i, rv_fmt_frd_offset_rs1) +OP(flt_d, "flt.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(flt_q, "flt.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(flt_s, "flt.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_d, "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_h, "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_q, "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(fltq_s, "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) +OP(flw, "flw", rv_codec_i, rv_fmt_frd_offset_rs1) +OP(fmadd_d, "fmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmadd_q, "fmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmadd_s, "fmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmax_d, "fmax.d", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmax_q, "fmax.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmax_s, "fmax.s", rv_codec_r, rv_fmt_frd_frs1_frs2) OP(fmaxm_d, "fmaxm.d", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fminm_q, "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmaxm_h, "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2) OP(fmaxm_q, "fmaxm.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmaxm_s, "fmaxm.s", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmin_d, "fmin.d", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmin_q, "fmin.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmin_s, "fmin.s", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fminm_d, "fminm.d", rv_codec_r, rv_fmt_frd_frs1_frs2) OP(fminm_h, "fminm.h", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fmaxm_h, "fmaxm.h", rv_codec_r, rv_fmt_frd_frs1_frs2) -OP(fround_s, "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(froundnx_s, "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fround_d, "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(froundnx_d, "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fround_q, "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(froundnx_q, "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fround_h, "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(froundnx_h, "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1) -OP(fcvtmod_w_d, "fcvtmod.w.d", rv_codec_r_m, rv_fmt_rm_rd_frs1) +OP(fminm_q, "fminm.q", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fminm_s, "fminm.s", rv_codec_r, rv_fmt_frd_frs1_frs2) +OP(fmsub_d, "fmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmsub_q, "fmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmsub_s, "fmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fmul_d, "fmul.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fmul_q, "fmul.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fmul_s, "fmul.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fmv_d, "fmv.d", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fmv_d_x, "fmv.d.x", rv_codec_r, rv_fmt_frd_rs1) +OP(fmv_h_x, "fmv.h.x", rv_codec_r, rv_fmt_frd_rs1) +OP(fmv_q, "fmv.q", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fmv_q_x, "fmv.q.x", rv_codec_r, rv_fmt_frd_rs1) +OP(fmv_s, "fmv.s", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fmv_s_x, "fmv.s.x", rv_codec_r, rv_fmt_frd_rs1) +OP(fmv_x_d, "fmv.x.d", rv_codec_r, rv_fmt_rd_frs1) +OP(fmv_x_h, "fmv.x.h", rv_codec_r, rv_fmt_rd_frs1) +OP(fmv_x_q, "fmv.x.q", rv_codec_r, rv_fmt_rd_frs1) +OP(fmv_x_s, "fmv.x.s", rv_codec_r, rv_fmt_rd_frs1) OP(fmvh_x_d, "fmvh.x.d", rv_codec_r, rv_fmt_rd_frs1) -OP(fmvp_d_x, "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2) OP(fmvh_x_q, "fmvh.x.q", rv_codec_r, rv_fmt_rd_frs1) +OP(fmvp_d_x, "fmvp.d.x", rv_codec_r, rv_fmt_frd_rs1_rs2) OP(fmvp_q_x, "fmvp.q.x", rv_codec_r, rv_fmt_frd_rs1_rs2) -OP(fleq_s, "fleq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fltq_s, "fltq.s", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fleq_d, "fleq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fltq_d, "fltq.d", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fleq_q, "fleq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fltq_q, "fltq.q", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fleq_h, "fleq.h", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(fltq_h, "fltq.h", rv_codec_r, rv_fmt_rd_frs1_frs2) -OP(vaesdf_vv, "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(fneg_d, "fneg.d", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fneg_q, "fneg.q", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fneg_s, "fneg.s", rv_codec_illegal, rv_fmt_frd_frs1) +OP(fnmadd_d, "fnmadd.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmadd_q, "fnmadd.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmadd_s, "fnmadd.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmsub_d, "fnmsub.d", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmsub_q, "fnmsub.q", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(fnmsub_s, "fnmsub.s", rv_codec_r4_m, rv_fmt_rm_frd_frs1_frs2_frs3) +OP(frcsr, "frcsr", rv_codec_i_csr, rv_fmt_rd) +OP(frflags, "frflags", rv_codec_i_csr, rv_fmt_rd) +OP(fround_d, "fround.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fround_h, "fround.h", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fround_q, "fround.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fround_s, "fround.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_d, "froundnx.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_h, "froundnx.h", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_q, "froundnx.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(froundnx_s, "froundnx.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(frrm, "frrm", rv_codec_i_csr, rv_fmt_rd) +OP(fscsr, "fscsr", rv_codec_i_csr, rv_fmt_rd_rs1) +OP(fsd, "fsd", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(fsflags, "fsflags", rv_codec_i_csr, rv_fmt_rd_rs1) +OP(fsflagsi, "fsflagsi", rv_codec_i_csr, rv_fmt_rd_zimm) +OP(fsgnj_d, "fsgnj.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_d) +OP(fsgnj_q, "fsgnj.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_q) +OP(fsgnj_s, "fsgnj.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnj_s) +OP(fsgnjn_d, "fsgnjn.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_d) +OP(fsgnjn_q, "fsgnjn.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_q) +OP(fsgnjn_s, "fsgnjn.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjn_s) +OP(fsgnjx_d, "fsgnjx.d", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_d) +OP(fsgnjx_q, "fsgnjx.q", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_q) +OP(fsgnjx_s, "fsgnjx.s", rv_codec_r, rv_fmt_frd_frs1_frs2, rvcp_fsgnjx_s) +OP(fsh, "fsh", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(fsq, "fsq", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(fsqrt_d, "fsqrt.d", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fsqrt_q, "fsqrt.q", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fsqrt_s, "fsqrt.s", rv_codec_r_m, rv_fmt_rm_frd_frs1) +OP(fsrm, "fsrm", rv_codec_i_csr, rv_fmt_rd_rs1) +OP(fsrmi, "fsrmi", rv_codec_i_csr, rv_fmt_rd_zimm) +OP(fsub_d, "fsub.d", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsub_q, "fsub.q", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsub_s, "fsub.s", rv_codec_r_m, rv_fmt_rm_frd_frs1_frs2) +OP(fsw, "fsw", rv_codec_s, rv_fmt_frs2_offset_rs1) +OP(hret, "hret", rv_codec_none, rv_fmt_none) +OP(illegal, "illegal", rv_codec_none, rv_fmt_none) +OP(j, "j", rv_codec_illegal, rv_fmt_offset) +OP(jal, "jal", rv_codec_uj, rv_fmt_rd_offset, rvcp_jal) +OP(jal_ra, "jal", rv_codec_illegal, rv_fmt_offset) +OP(jalr, "jalr", rv_codec_i, rv_fmt_rd_rs1_offset, rvcp_jalr) +OP(jalr_ra, "jalr", rv_codec_illegal, rv_fmt_rs1) +OP(jr, "jr", rv_codec_illegal, rv_fmt_rs1, rvcp_jr) +OP(lb, "lb", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lbu, "lbu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(ld, "ld", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(ldu, "ldu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lh, "lh", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lhu, "lhu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lpad, "lpad", rv_codec_lp, rv_fmt_imm) +OP(lq, "lq", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lr_d, "lr.d", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) +OP(lr_q, "lr.q", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) +OP(lr_w, "lr.w", rv_codec_r_l, rv_fmt_aqrl_rd_rs1) +OP(lui, "lui", rv_codec_u, rv_fmt_rd_uimm) +OP(lw, "lw", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(lwu, "lwu", rv_codec_i, rv_fmt_rd_offset_rs1) +OP(max, "max", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(maxu, "maxu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(min, "min", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(minu, "minu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mnret, "mnret", rv_codec_none, rv_fmt_none) +OP(mop_r, "mop.r", rv_codec_mop_r, rv_fmt_mop_r) +OP(mop_rr, "mop.rr", rv_codec_mop_rr, rv_fmt_mop_rr) +OP(mret, "mret", rv_codec_none, rv_fmt_none) +OP(mul, "mul", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(muld, "muld", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulh, "mulh", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulhsu, "mulhsu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulhu, "mulhu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mulw, "mulw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(mv, "mv", rv_codec_illegal, rv_fmt_rd_rs1, rvcp_mv) +OP(neg, "neg", rv_codec_illegal, rv_fmt_rd_rs2) +OP(negw, "negw", rv_codec_illegal, rv_fmt_rd_rs2) +OP(nop, "nop", rv_codec_illegal, rv_fmt_none) +OP(not, "not", rv_codec_illegal, rv_fmt_rd_rs1) +OP(or, "or", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(orc_b, "orc.b", rv_codec_r, rv_fmt_rd_rs1) +OP(ori, "ori", rv_codec_i, rv_fmt_rd_rs1_imm) +OP(orn, "orn", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(pack, "pack", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(packh, "packh", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(packw, "packw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rdcycle, "rdcycle", rv_codec_i_csr, rv_fmt_rd) +OP(rdcycleh, "rdcycleh", rv_codec_i_csr, rv_fmt_rd) +OP(rdinstret, "rdinstret", rv_codec_i_csr, rv_fmt_rd) +OP(rdinstreth, "rdinstreth", rv_codec_i_csr, rv_fmt_rd) +OP(rdtime, "rdtime", rv_codec_i_csr, rv_fmt_rd) +OP(rdtimeh, "rdtimeh", rv_codec_i_csr, rv_fmt_rd) +OP(rem, "rem", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remd, "remd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remu, "remu", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remud, "remud", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remuw, "remuw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(remw, "remw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(ret, "ret", rv_codec_illegal, rv_fmt_none) +OP(rev8, "rev8", rv_codec_r, rv_fmt_rd_rs1) +OP(rol, "rol", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rolw, "rolw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(ror, "ror", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(rori, "rori", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(roriw, "roriw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(rorw, "rorw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sb, "sb", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(sc_d, "sc.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(sc_q, "sc.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(sc_w, "sc.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(sd, "sd", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(seqz, "seqz", rv_codec_illegal, rv_fmt_rd_rs1) +OP(sext_b, "sext.b", rv_codec_r, rv_fmt_rd_rs1) +OP(sext_h, "sext.h", rv_codec_r, rv_fmt_rd_rs1) +OP(sext_w, "sext.w", rv_codec_illegal, rv_fmt_rd_rs1) +OP(sfence_vm, "sfence.vm", rv_codec_r, rv_fmt_rs1) +OP(sfence_vma, "sfence.vma", rv_codec_r, rv_fmt_rs1_rs2) +OP(sgtz, "sgtz", rv_codec_illegal, rv_fmt_rd_rs2) +OP(sh, "sh", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(sh1add, "sh1add", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh1add_uw, "sh1add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh2add, "sh2add", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh2add_uw, "sh2add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh3add, "sh3add", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sh3add_uw, "sh3add.uw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha256sig0, "sha256sig0", rv_codec_r, rv_fmt_rd_rs1) +OP(sha256sig1, "sha256sig1", rv_codec_r, rv_fmt_rd_rs1) +OP(sha256sum0, "sha256sum0", rv_codec_r, rv_fmt_rd_rs1) +OP(sha256sum1, "sha256sum1", rv_codec_r, rv_fmt_rd_rs1) +OP(sha512sig0, "sha512sig0", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig0h, "sha512sig0h", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig0l, "sha512sig0l", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig1, "sha512sig1", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig1h, "sha512sig1h", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sig1l, "sha512sig1l", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum0, "sha512sum0", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum0r, "sha512sum0r", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum1, "sha512sum1", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sha512sum1r, "sha512sum1r", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sll, "sll", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(slld, "slld", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(slli, "slli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(slli_uw, "slli.uw", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(sllid, "sllid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(slliw, "slliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(sllw, "sllw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(slt, "slt", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_slt) +OP(slti, "slti", rv_codec_i, rv_fmt_rd_rs1_imm) +OP(sltiu, "sltiu", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_sltiu) +OP(sltu, "sltu", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sltu) +OP(sltz, "sltz", rv_codec_illegal, rv_fmt_rd_rs1) +OP(sm3p0, "sm3p0", rv_codec_r, rv_fmt_rd_rs1) +OP(sm3p1, "sm3p1", rv_codec_r, rv_fmt_rd_rs1) +OP(sm4ed, "sm4ed", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(sm4ks, "sm4ks", rv_codec_k_bs, rv_fmt_rs1_rs2_bs) +OP(snez, "snez", rv_codec_illegal, rv_fmt_rd_rs2) +OP(sq, "sq", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(sra, "sra", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srad, "srad", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srai, "srai", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(sraid, "sraid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(sraiw, "sraiw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(sraw, "sraw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(sret, "sret", rv_codec_none, rv_fmt_none) +OP(srl, "srl", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srld, "srld", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(srli, "srli", rv_codec_i_sh7, rv_fmt_rd_rs1_imm) +OP(srlid, "srlid", rv_codec_i_sh6, rv_fmt_rd_rs1_imm) +OP(srliw, "srliw", rv_codec_i_sh5, rv_fmt_rd_rs1_imm) +OP(srlw, "srlw", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(ssamoswap_d, "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(ssamoswap_w, "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) +OP(sspopchk, "sspopchk", rv_codec_r, rv_fmt_rs1) +OP(sspush, "sspush", rv_codec_r, rv_fmt_rs2) +OP(ssrdp, "ssrdp", rv_codec_r, rv_fmt_rd) +OP(sub, "sub", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_sub) +OP(subd, "subd", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(subw, "subw", rv_codec_r, rv_fmt_rd_rs1_rs2, rvcp_subw) +OP(sw, "sw", rv_codec_s, rv_fmt_rs2_offset_rs1) +OP(unzip, "unzip", rv_codec_r, rv_fmt_rd_rs1) +OP(uret, "uret", rv_codec_none, rv_fmt_none) +OP(vaadd_vv, "vaadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vaadd_vx, "vaadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vaaddu_vv, "vaaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vaaddu_vx, "vaaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vadc_vim, "vadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) +OP(vadc_vvm, "vadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vadc_vxm, "vadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vadd_vi, "vadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vadd_vv, "vadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vadd_vx, "vadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) OP(vaesdf_vs, "vaesdf.vs", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vaesdm_vv, "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesdf_vv, "vaesdf.vv", rv_codec_v_r, rv_fmt_vd_vs2) OP(vaesdm_vs, "vaesdm.vs", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vaesef_vv, "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesdm_vv, "vaesdm.vv", rv_codec_v_r, rv_fmt_vd_vs2) OP(vaesef_vs, "vaesef.vs", rv_codec_v_r, rv_fmt_vd_vs2) -OP(vaesem_vv, "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesef_vv, "vaesef.vv", rv_codec_v_r, rv_fmt_vd_vs2) OP(vaesem_vs, "vaesem.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vaesem_vv, "vaesem.vv", rv_codec_v_r, rv_fmt_vd_vs2) OP(vaeskf1_vi, "vaeskf1.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) OP(vaeskf2_vi, "vaeskf2.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) OP(vaesz_vs, "vaesz.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vand_vi, "vand.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vand_vv, "vand.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vand_vx, "vand.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) OP(vandn_vv, "vandn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vandn_vx, "vandn.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vbrev_v, "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vasub_vv, "vasub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vasub_vx, "vasub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vasubu_vv, "vasubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vasubu_vx, "vasubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) OP(vbrev8_v, "vbrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vbrev_v, "vbrev.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) OP(vclmul_vv, "vclmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vclmul_vx, "vclmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) OP(vclmulh_vv, "vclmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vclmulh_vx, "vclmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) OP(vclz_v, "vclz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vcompress_vm, "vcompress.vm", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vcpop_m, "vcpop.m", rv_codec_v_r, rv_fmt_rd_vs2_vm) OP(vcpop_v, "vcpop.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) OP(vctz_v, "vctz.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vdiv_vv, "vdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vdiv_vx, "vdiv.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vdivu_vv, "vdivu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vdivu_vx, "vdivu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vfadd_vf, "vfadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfadd_vv, "vfadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfclass_v, "vfclass.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_f_x_v, "vfcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_f_xu_v, "vfcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_rtz_x_f_v, "vfcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_rtz_xu_f_v, "vfcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_x_f_v, "vfcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfcvt_xu_f_v, "vfcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfdiv_vf, "vfdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfdiv_vv, "vfdiv.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfirst_m, "vfirst.m", rv_codec_v_r, rv_fmt_rd_vs2_vm) +OP(vfmacc_vf, "vfmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfmacc_vv, "vfmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmadd_vf, "vfmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfmadd_vv, "vfmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmax_vf, "vfmax.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfmax_vv, "vfmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfmerge_vfm, "vfmerge.vfm", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vl) +OP(vfmin_vf, "vfmin.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfmin_vv, "vfmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfmsac_vf, "vfmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfmsac_vv, "vfmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmsub_vf, "vfmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfmsub_vv, "vfmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfmul_vf, "vfmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfmul_vv, "vfmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfmv_f_s, "vfmv.f.s", rv_codec_v_r, rv_fmt_fd_vs2) +OP(vfmv_s_f, "vfmv.s.f", rv_codec_v_r, rv_fmt_vd_fs1) +OP(vfmv_v_f, "vfmv.v.f", rv_codec_v_r, rv_fmt_vd_fs1) +OP(vfncvt_f_f_w, "vfncvt.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_f_x_w, "vfncvt.f.x.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_f_xu_w, "vfncvt.f.xu.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_rod_f_f_w, "vfncvt.rod.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_rtz_x_f_w, "vfncvt.rtz.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_rtz_xu_f_w, "vfncvt.rtz.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_x_f_w, "vfncvt.x.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvt_xu_f_w, "vfncvt.xu.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfncvtbf16_f_f_w, "vfncvtbf16.f.f.w", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfnmacc_vf, "vfnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmacc_vv, "vfnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfnmadd_vf, "vfnmadd.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmadd_vv, "vfnmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfnmsac_vf, "vfnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmsac_vv, "vfnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfnmsub_vf, "vfnmsub.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfnmsub_vv, "vfnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfrdiv_vf, "vfrdiv.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfrec7_v, "vfrec7.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vfredmax_vs, "vfredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfredmin_vs, "vfredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfredosum_vs, "vfredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfredusum_vs, "vfredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfrsqrt7_v, "vfrsqrt7.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vfrsub_vf, "vfrsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsgnj_vf, "vfsgnj.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsgnj_vv, "vfsgnj.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfsgnjn_vf, "vfsgnjn.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsgnjn_vv, "vfsgnjn.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfsgnjx_vf, "vfsgnjx.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsgnjx_vv, "vfsgnjx.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfslide1down_vf, "vfslide1down.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfslide1up_vf, "vfslide1up.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsqrt_v, "vfsqrt.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vfsub_vf, "vfsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfsub_vv, "vfsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwadd_vf, "vfwadd.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwadd_vv, "vfwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwadd_wf, "vfwadd.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwadd_wv, "vfwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwcvt_f_f_v, "vfwcvt.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_f_x_v, "vfwcvt.f.x.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_f_xu_v, "vfwcvt.f.xu.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_rtz_x_f_v, "vfwcvt.rtz.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_rtz_xu_f_v, "vfwcvt.rtz.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_x_f_v, "vfwcvt.x.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvt_xu_f_v, "vfwcvt.xu.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwcvtbf16_f_f_v, "vfwcvtbf16.f.f.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vfwmacc_vf, "vfwmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwmacc_vv, "vfwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwmaccbf16_vf, "vfwmaccbf16.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwmaccbf16_vv, "vfwmaccbf16.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwmsac_vf, "vfwmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwmsac_vv, "vfwmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwmul_vf, "vfwmul.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwmul_vv, "vfwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwnmacc_vf, "vfwnmacc.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwnmacc_vv, "vfwnmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwnmsac_vf, "vfwnmsac.vf", rv_codec_v_r, rv_fmt_vd_fs1_vs2_vm) +OP(vfwnmsac_vv, "vfwnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vfwredosum_vs, "vfwredosum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwredusum_vs, "vfwredusum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwsub_vf, "vfwsub.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwsub_vv, "vfwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vfwsub_wf, "vfwsub.wf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vfwsub_wv, "vfwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vghsh_vv, "vghsh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) OP(vgmul_vv, "vgmul.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vid_v, "vid.v", rv_codec_v_r, rv_fmt_vd_vm) +OP(viota_m, "viota.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vl1re16_v, "vl1re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl1re32_v, "vl1re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl1re64_v, "vl1re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl1re8_v, "vl1re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re16_v, "vl2re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re32_v, "vl2re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re64_v, "vl2re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl2re8_v, "vl2re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re16_v, "vl4re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re32_v, "vl4re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re64_v, "vl4re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl4re8_v, "vl4re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re16_v, "vl8re16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re32_v, "vl8re32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re64_v, "vl8re64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vl8re8_v, "vl8re8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle16_v, "vle16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle16ff_v, "vle16ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle32_v, "vle32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle32ff_v, "vle32ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle64_v, "vle64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle64ff_v, "vle64ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle8_v, "vle8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vle8ff_v, "vle8ff.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vlm_v, "vlm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vloxei16_v, "vloxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vloxei32_v, "vloxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vloxei64_v, "vloxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vloxei8_v, "vloxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vlse16_v, "vlse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vlse32_v, "vlse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vlse64_v, "vlse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vlse8_v, "vlse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vluxei16_v, "vluxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vluxei32_v, "vluxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vluxei64_v, "vluxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vluxei8_v, "vluxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vmacc_vv, "vmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vmacc_vx, "vmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vmadc_vim, "vmadc.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) +OP(vmadc_vvm, "vmadc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vmadc_vxm, "vmadc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vmadd_vv, "vmadd.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vmadd_vx, "vmadd.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vmand_mm, "vmand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmandn_mm, "vmandn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmax_vv, "vmax.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmax_vx, "vmax.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmaxu_vv, "vmaxu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmaxu_vx, "vmaxu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmerge_vim, "vmerge.vim", rv_codec_v_i, rv_fmt_vd_vs2_imm_vl) +OP(vmerge_vvm, "vmerge.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vmerge_vxm, "vmerge.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vmfeq_vf, "vmfeq.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfeq_vv, "vmfeq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmfge_vf, "vmfge.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfgt_vf, "vmfgt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfle_vf, "vmfle.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfle_vv, "vmfle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmflt_vf, "vmflt.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmflt_vv, "vmflt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmfne_vf, "vmfne.vf", rv_codec_v_r, rv_fmt_vd_vs2_fs1_vm) +OP(vmfne_vv, "vmfne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmin_vv, "vmin.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmin_vx, "vmin.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vminu_vv, "vminu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vminu_vx, "vminu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmnand_mm, "vmnand.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmnor_mm, "vmnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmor_mm, "vmor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmorn_mm, "vmorn.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsbc_vvm, "vmsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vmsbc_vxm, "vmsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vmsbf_m, "vmsbf.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vmseq_vi, "vmseq.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmseq_vv, "vmseq.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmseq_vx, "vmseq.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsgt_vi, "vmsgt.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsgt_vx, "vmsgt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsgtu_vi, "vmsgtu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsgtu_vx, "vmsgtu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsif_m, "vmsif.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vmsle_vi, "vmsle.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsle_vv, "vmsle.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsle_vx, "vmsle.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsleu_vi, "vmsleu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsleu_vv, "vmsleu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsleu_vx, "vmsleu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmslt_vv, "vmslt.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmslt_vx, "vmslt.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsltu_vv, "vmsltu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsltu_vx, "vmsltu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsne_vi, "vmsne.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vmsne_vv, "vmsne.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmsne_vx, "vmsne.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmsof_m, "vmsof.m", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vmul_vv, "vmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmul_vx, "vmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmulh_vv, "vmulh.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmulh_vx, "vmulh.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmulhsu_vv, "vmulhsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmulhsu_vx, "vmulhsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmulhu_vv, "vmulhu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmulhu_vx, "vmulhu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vmv1r_v, "vmv1r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vmv2r_v, "vmv2r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vmv4r_v, "vmv4r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vmv8r_v, "vmv8r.v", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vmv_s_x, "vmv.s.x", rv_codec_v_r, rv_fmt_vd_rs1) +OP(vmv_v_i, "vmv.v.i", rv_codec_v_i, rv_fmt_vd_imm) +OP(vmv_v_v, "vmv.v.v", rv_codec_v_r, rv_fmt_vd_vs1) +OP(vmv_v_x, "vmv.v.x", rv_codec_v_r, rv_fmt_vd_rs1) +OP(vmv_x_s, "vmv.x.s", rv_codec_v_r, rv_fmt_rd_vs2) +OP(vmxnor_mm, "vmxnor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vmxor_mm, "vmxor.mm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnclip_wi, "vnclip.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnclip_wv, "vnclip.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnclip_wx, "vnclip.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vnclipu_wi, "vnclipu.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnclipu_wv, "vnclipu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnclipu_wx, "vnclipu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vnmsac_vv, "vnmsac.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vnmsac_vx, "vnmsac.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vnmsub_vv, "vnmsub.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vnmsub_vx, "vnmsub.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vnsra_wi, "vnsra.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnsra_wv, "vnsra.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnsra_wx, "vnsra.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vnsrl_wi, "vnsrl.wi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vnsrl_wv, "vnsrl.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vnsrl_wx, "vnsrl.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vor_vi, "vor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vor_vv, "vor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vor_vx, "vor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vredand_vs, "vredand.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredmax_vs, "vredmax.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredmaxu_vs, "vredmaxu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredmin_vs, "vredmin.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredminu_vs, "vredminu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredor_vs, "vredor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredsum_vs, "vredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vredxor_vs, "vredxor.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vrem_vv, "vrem.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vrem_vx, "vrem.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vremu_vv, "vremu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vremu_vx, "vremu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) OP(vrev8_v, "vrev8.v", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vrgather_vi, "vrgather.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vrgather_vv, "vrgather.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vrgather_vx, "vrgather.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vrgatherei16_vv, "vrgatherei16.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vrol_vv, "vrol.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vrol_vx, "vrol.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vror_vi, "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm) OP(vror_vv, "vror.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vror_vx, "vror.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vror_vi, "vror.vi", rv_codec_vror_vi, rv_fmt_vd_vs2_uimm_vm) +OP(vrsub_vi, "vrsub.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vrsub_vx, "vrsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vs1r_v, "vs1r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vs2r_v, "vs2r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vs4r_v, "vs4r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vs8r_v, "vs8r.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vsadd_vi, "vsadd.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vsadd_vv, "vsadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsadd_vx, "vsadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsaddu_vi, "vsaddu.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vsaddu_vv, "vsaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsaddu_vx, "vsaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsbc_vvm, "vsbc.vvm", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vl) +OP(vsbc_vxm, "vsbc.vxm", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vl) +OP(vse16_v, "vse16.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vse32_v, "vse32.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vse64_v, "vse64.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vse8_v, "vse8.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vsetivli, "vsetivli", rv_codec_vsetivli, rv_fmt_vsetivli) +OP(vsetvl, "vsetvl", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(vsetvli, "vsetvli", rv_codec_vsetvli, rv_fmt_vsetvli) +OP(vsext_vf2, "vsext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vsext_vf4, "vsext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vsext_vf8, "vsext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm) OP(vsha2ch_vv, "vsha2ch.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) OP(vsha2cl_vv, "vsha2cl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) OP(vsha2ms_vv, "vsha2ms.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) +OP(vslide1down_vx, "vslide1down.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vslide1up_vx, "vslide1up.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vslidedown_vi, "vslidedown.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vslidedown_vx, "vslidedown.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vslideup_vi, "vslideup.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vslideup_vx, "vslideup.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsll_vi, "vsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vsll_vv, "vsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsll_vx, "vsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) OP(vsm3c_vi, "vsm3c.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) OP(vsm3me_vv, "vsm3me.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1) OP(vsm4k_vi, "vsm4k.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm) -OP(vsm4r_vv, "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2) OP(vsm4r_vs, "vsm4r.vs", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vsm4r_vv, "vsm4r.vv", rv_codec_v_r, rv_fmt_vd_vs2) +OP(vsm_v, "vsm.v", rv_codec_v_ldst, rv_fmt_ldst_vd_rs1_vm) +OP(vsmul_vv, "vsmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsmul_vx, "vsmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsoxei16_v, "vsoxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsoxei32_v, "vsoxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsoxei64_v, "vsoxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsoxei8_v, "vsoxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsra_vi, "vsra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vsra_vv, "vsra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsra_vx, "vsra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsrl_vi, "vsrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vsrl_vv, "vsrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsrl_vx, "vsrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsse16_v, "vsse16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vsse32_v, "vsse32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vsse64_v, "vsse64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vsse8_v, "vsse8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_rs2_vm) +OP(vssra_vi, "vssra.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vssra_vv, "vssra.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssra_vx, "vssra.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vssrl_vi, "vssrl.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) +OP(vssrl_vv, "vssrl.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssrl_vx, "vssrl.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vssub_vv, "vssub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssub_vx, "vssub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vssubu_vv, "vssubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vssubu_vx, "vssubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsub_vv, "vsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vsub_vx, "vsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vsuxei16_v, "vsuxei16.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsuxei32_v, "vsuxei32.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsuxei64_v, "vsuxei64.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vsuxei8_v, "vsuxei8.v", rv_codec_v_r, rv_fmt_ldst_vd_rs1_vs2_vm) +OP(vwadd_vv, "vwadd.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwadd_vx, "vwadd.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwadd_wv, "vwadd.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwadd_wx, "vwadd.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwaddu_vv, "vwaddu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwaddu_vx, "vwaddu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwaddu_wv, "vwaddu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwaddu_wx, "vwaddu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwmacc_vv, "vwmacc.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vwmacc_vx, "vwmacc.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmaccsu_vv, "vwmaccsu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vwmaccsu_vx, "vwmaccsu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmaccu_vv, "vwmaccu.vv", rv_codec_v_r, rv_fmt_vd_vs1_vs2_vm) +OP(vwmaccu_vx, "vwmaccu.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmaccus_vx, "vwmaccus.vx", rv_codec_v_r, rv_fmt_vd_rs1_vs2_vm) +OP(vwmul_vv, "vwmul.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwmul_vx, "vwmul.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwmulsu_vv, "vwmulsu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwmulsu_vx, "vwmulsu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwmulu_vv, "vwmulu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwmulu_vx, "vwmulu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwredsum_vs, "vwredsum.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwredsumu_vs, "vwredsumu.vs", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsll_vi, "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) OP(vwsll_vv, "vwsll.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) OP(vwsll_vx, "vwsll.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) -OP(vwsll_vi, "vwsll.vi", rv_codec_v_i_u, rv_fmt_vd_vs2_uimm_vm) -OP(amocas_w, "amocas.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amocas_d, "amocas.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amocas_q, "amocas.q", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(mop_r, "mop.r", rv_codec_mop_r, rv_fmt_mop_r) -OP(mop_rr, "mop.rr", rv_codec_mop_rr, rv_fmt_mop_rr) -OP(c_mop, "c.mop", rv_codec_cmop, rv_fmt_cmop) -OP(amoswap_b, "amoswap.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoadd_b, "amoadd.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoxor_b, "amoxor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoor_b, "amoor.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoand_b, "amoand.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomin_b, "amomin.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomax_b, "amomax.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amominu_b, "amominu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomaxu_b, "amomaxu.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoswap_h, "amoswap.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoadd_h, "amoadd.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoxor_h, "amoxor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoor_h, "amoor.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amoand_h, "amoand.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomin_h, "amomin.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomax_h, "amomax.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amominu_h, "amominu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amomaxu_h, "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amocas_b, "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(amocas_h, "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(wrs_sto, "wrs.sto", rv_codec_none, rv_fmt_none) +OP(vwsub_vv, "vwsub.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsub_vx, "vwsub.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsub_wv, "vwsub.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsub_wx, "vwsub.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsubu_vv, "vwsubu.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsubu_vx, "vwsubu.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vwsubu_wv, "vwsubu.wv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vwsubu_wx, "vwsubu.wx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vxor_vi, "vxor.vi", rv_codec_v_i, rv_fmt_vd_vs2_imm_vm) +OP(vxor_vv, "vxor.vv", rv_codec_v_r, rv_fmt_vd_vs2_vs1_vm) +OP(vxor_vx, "vxor.vx", rv_codec_v_r, rv_fmt_vd_vs2_rs1_vm) +OP(vzext_vf2, "vzext.vf2", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vzext_vf4, "vzext.vf4", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(vzext_vf8, "vzext.vf8", rv_codec_v_r, rv_fmt_vd_vs2_vm) +OP(wfi, "wfi", rv_codec_none, rv_fmt_none) OP(wrs_nto, "wrs.nto", rv_codec_none, rv_fmt_none) -OP(lpad, "lpad", rv_codec_lp, rv_fmt_imm) -OP(sspush, "sspush", rv_codec_r, rv_fmt_rs2) -OP(sspopchk, "sspopchk", rv_codec_r, rv_fmt_rs1) -OP(ssrdp, "ssrdp", rv_codec_r, rv_fmt_rd) -OP(ssamoswap_w, "ssamoswap.w", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(ssamoswap_d, "ssamoswap.d", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1) -OP(c_sspush, "c.sspush", rv_codec_cmop_ss, NULL, DECOMP(op_sspush)) -OP(c_sspopchk, "c.sspopchk", rv_codec_cmop_ss, NULL, DECOMP(op_sspopchk)) -OP(cbo_inval, "cbo.inval", rv_codec_r, rv_fmt_rs1) -OP(cbo_clean, "cbo.clean", rv_codec_r, rv_fmt_rs1) -OP(cbo_flush, "cbo.flush", rv_codec_r, rv_fmt_rs1) -OP(cbo_zero, "cbo.zero", rv_codec_r, rv_fmt_rs1) -OP(mnret, "mnret", rv_codec_none, rv_fmt_none) +OP(wrs_sto, "wrs.sto", rv_codec_none, rv_fmt_none) +OP(xnor, "xnor", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(xor, "xor", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(xori, "xori", rv_codec_i, rv_fmt_rd_rs1_imm, rvcp_xori) +OP(xperm4, "xperm4", rv_codec_r, rv_fmt_rd_rs1_rs2) +OP(xperm8, "xperm8", rv_codec_r, rv_fmt_rd_rs1) +OP(zext_h, "zext.h", rv_codec_r, rv_fmt_rd_rs1) +OP(zip, "zip", rv_codec_r, rv_fmt_rd_rs1) --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198257; cv=none; d=zohomail.com; s=zohoarc; b=Z/RHViJM1x7ONICoc9k7DmaQfHKiP2MqoRAaAdQHIHVRJbqsSbzScnlEwohqv1dzr2/5siMCdT+NIXi9tcGgyRs0kn2rtnvpxwXVUUPzJdst1DAzl1gDuvYX5pYAydBVEQ3OLbFxtg5qUPU5G0nFHnCSJl11L/Xvkz8gT0NQfGk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198257; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=SdRM7x1qzPNyHLcBH9MizyM4AFSQfbw/UNmU055a3dE=; b=itRdl3XbzDvI7LOh9IrgH+7NkmfxoZUBv59wyZ0YPYJpW3VjXW+WAVMTAZy4FC7eZu85POyU6pS2vAVYhv2t0hP5fwKEWHS5Q5JorysJu2hU66sinjLO7YzhN9Od+7IZAnx8VuQX0DP0BHKSYEcpIfJJ1IDxyCTmfEtumAmYZgk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198257000411.4153199140951; Wed, 19 Aug 2026 20:57:37 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtm8-0007aX-4Y; Wed, 19 Aug 2026 23:49:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtm3-0007Xi-Ah for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:03 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtm1-0004Sz-Fl for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:03 -0400 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-2cfbbdfa60bso13270245ad.3 for ; Wed, 19 Aug 2026 20:49:01 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.48.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:48:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197740; x=1787802540; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=SdRM7x1qzPNyHLcBH9MizyM4AFSQfbw/UNmU055a3dE=; b=kenkvhzRdyAUl+mfM8mydfX1BF4VET5fVBB323FlAUhMQ5deLGJ4Au7oH92yfR17Po knEQTLQfcZk/wu42hAZp8zlgedcqoQqVFgT7kTIxj8x4IkrfxuzzDFCER8fr9ygz6ny2 vENsasRLLTJH297jg3Zd+9PAI9GARqRBWwMqcKLoAZoFJKqiyJsLThPXGCs5vMDDZuo0 xk82rJ3v2pJ28gLOjedkWjHoaio4BFstRQ70AKNXrgYtL84Yjs6bBiLMH+/AByTeb5Yb CPOisJvg/jdE05BzOjUDvPGaZeFQSPxwGVjaU8c9DTd7xcbskvc6Fr0XtuF4Uy9i+7Oz /VLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197740; x=1787802540; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=SdRM7x1qzPNyHLcBH9MizyM4AFSQfbw/UNmU055a3dE=; b=soaQhNgXfbhtKysJRLrlBy4S0ribJMZIzxyrnEtTMoHov/baEFCUzuPnK4J5VPEGFG tMrIchYYmyXdbwGF9dvDFJr+78bouUwdO+mQwO9I/xHrYhPtqokUGgs4Kw+D6IImD/xx aR3VVnVuxooEW3QfTl3zULC/MBZ3sbAT6Me0p1S05V5UPD9ODrd7+Sqxx2cHVLUF7sN3 +DVG4BIkG1lmPkqvAlj4pK5iEqWXVd4SLztO++Ej8YHcvzfZfYK+SPfnzRcPzUBFBb0J gd2IUYQRnGAUVgSwq+NyIHOiNegQiKb/6EUj6azXd1qDK6K/MDxPghR2YfYY/uuF+5Ej m9Bw== X-Gm-Message-State: AFuF++l6DMWI/PKI3YoFlgboj2pHiJPMxLT0VAo3YnZwkl62aOWcwblF BZvELRXn4+utBS7ouCGoxexAAquTwv7siGDwsVVY/JzO+d+7znwNaxmJq/P4qQ== X-Gm-Gg: AR+sD12+XrD+rk1WRzymMIg2yxn5u57XhqE+JQqHQBS497ndZfNflIahkcVm6m66H4x 9yqLrdqw+H2OaVLi+aluCGbr5NtfywKrcrAibaPsVgMrv1hZUY/ihkirothCVgSiRw2Io66oN5Y em9GswczPbgBk3wRO0v9r6OKPCCe7ZK6VLrGTr18RbiR5deMCsPGE25j7dFJ0AWw1feRkONUpP0 P+tT2EtTka5iaC33VDKCVKwW+VGbRHerSuwQ62hjGbrPCZX6vAvzu7cqhBXVM1+a+FpmzUi7ja8 PyUlI7rRvDoG1gwDcvemuNoPyjF9BOBJlJWmXmxpriZIF+0On2+rrwCEX/MIJ7GDL+V1xW9cz6k 6pOf22AcSn3J2p4kWlPGML+v+2h79FwraQsh5/0SlahnXLLDkJggebBgwQ3Lu4mqSuEqxXwHj3O YGdYEsL/66eRbc3YWYepJin1BTpC4XRyCdp+85x/spLreotXmAaEWZntTbpV3d0YQ8wbZs9St/R PgHLA== X-Received: by 2002:a17:90a:d60d:b0:392:6638:2e6a with SMTP id 98e67ed59e1d1-3958146f387mr18207523a91.13.1787197739962; Wed, 19 Aug 2026 20:48:59 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: wangyang , Alistair Francis Subject: [PULL 89/93] target/riscv: honor zicbo* envcfg gating in linux-user mode Date: Thu, 20 Aug 2026 13:44:26 +1000 Message-ID: <20260820034430.1186695-90-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=alistair23@gmail.com; helo=mail-pl1-x635.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198258686158500 Content-Type: text/plain; charset="utf-8" From: wangyang In user-only builds check_zicbo_envcfg() skipped the envcfg check entirely (#if !defined(CONFIG_USER_ONLY)), so cbo.inval/cbo.flush/ cbo.zero retired unconditionally in linux-user even though the machine-level envcfg fields are never initialized. Give the user-mode build a senvcfg-based gate, and initialize SENVCFG_CBZE at reset when ext_zicboz is enabled so cbo.zero stays usable while cbo.inval/cbo.flush remain illegal, matching the user-mode view of a typical firmware/kernel setup. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4107 Reviewed-by: Alistair Francis Signed-off-by: wangyang Message-ID: <9b2f22fc402b48b8ba81f72be8ed04bc@wangyang25.otcaix.iscas.ac.cn> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 8 ++++++++ target/riscv/tcg/op_helper.c | 11 ++++++++++- 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d8f239e41d..79ddde419a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1062,6 +1062,14 @@ static void riscv_cpu_reset_hold(Object *obj, ResetT= ype type) #else env->priv =3D PRV_U; env->senvcfg =3D 0; + /* + * Match the user-mode view of a typical firmware/kernel setup where + * cbo.zero is enabled for user mode; the CBCFE/CBIE bits stay zero, + * so the cache-management operations remain illegal in user mode. + */ + if (riscv_cpu_cfg(env)->ext_zicboz) { + env->senvcfg |=3D SENVCFG_CBZE; + } env->menvcfg =3D 0; #endif /* !CONFIG_USER_ONLY */ =20 diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c index acdccd1a97..a7bd42d2c6 100644 --- a/target/riscv/tcg/op_helper.c +++ b/target/riscv/tcg/op_helper.c @@ -152,7 +152,16 @@ target_ulong helper_csrrw_i128(CPURISCVState *env, int= csr, static void check_zicbo_envcfg(CPURISCVState *env, target_ulong envbits, uintptr_t ra) { -#ifndef CONFIG_USER_ONLY +#if defined(CONFIG_USER_ONLY) + /* + * linux-user: the machine-level envcfg fields are not part of the + * user-mode environment; only the user-mode view of the enabling + * bits (senvcfg, as initialized for the guest) applies. + */ + if (!get_field(env->senvcfg, envbits)) { + riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, ra); + } +#else if ((env->priv < PRV_M) && !get_field(env->menvcfg, envbits)) { riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, ra); } --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198275; cv=none; d=zohomail.com; s=zohoarc; b=hKc8mpYTcOcEu42DuS8c8mDl4kFtd41DsCZximWNjWcODo6rS7Dccs+MYEdrEkRl0+DNLNkuGdKPsNPUlBSTBoXeNJkQRIki8t0JPyWWX/IMujr3o26iWl501M8hmsqz4HeSlJ47YywIFKZfsjjCm/qezV8hfFRjqpeH1rJyuk4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198275; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=v1HHSGb013dDgNPZxkNVb6ZLlCJeWWRoZwdE2wte10s=; b=LO0ilhTonGYxCoHzg1FdlcypyalJJq34VGCsLKjNtq4J89nhDoLBK8y9h3Cj5DlSwWA+WT5KaEdTmSxsMBWwCEgJPBxgCFoFvtVz7i4pieH8nFcMj83bg5jwPbHL4+/IuB/Y4v5OYjtOzJTeqvEu3haw/oB2D5syIOLQbEmOzCM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17871982757101007.8352918954014; Wed, 19 Aug 2026 20:57:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtmD-0007lA-Q6; Wed, 19 Aug 2026 23:49:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtm5-0007Zb-RZ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:06 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtm4-0004TI-6a for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:05 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-38ea87caafeso1504415a91.3 for ; Wed, 19 Aug 2026 20:49:03 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.49.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:49:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197743; x=1787802543; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=v1HHSGb013dDgNPZxkNVb6ZLlCJeWWRoZwdE2wte10s=; b=OdaH7noCcHyFaGp1i0FyyAkvaRrMx8+ChhAnDDbI1lH56EYmRm6nb96CglvdChnkws yllpRiPV4uiCIhM8iBhgusBmOAXed9dTBDk5WwAtr7r9mI2Odqvl8crhyZ2JJ1eD8OWC kG0oWyEvzFak2oMJvAeNpXZt3dAM3/CGrolWPZ7RQWJl7C71pmnO6Y1xPr68Ht6ty9jf f+hR5EnAu2J6mnzA+xYV70nb2s7Zh/W/t8GM7BQ0ZRz1xKKOcrD07CxxOsMBg9gDmofo GPbT1M7SPCpqtuRkcfnjG/mdnFyZXBZLQfe2H5a8EuDEETQBNkcbaptxMJW5M6XRyukT TadA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197743; x=1787802543; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=v1HHSGb013dDgNPZxkNVb6ZLlCJeWWRoZwdE2wte10s=; b=X1bTAQCxGdQ1Mb0OJtYpbYmiKh7XHeNCnm0qYEKc26BiK4Lcy11DZFMB2MZI2IUet7 LSIPZtHj0gFJJO7/6mhtxlyDsPRMYkgcSAllYbrx+dWQ+fu1uWMgalweLXS4Q4NtZ7sq FrmjOteptaofaIspLASthZXniTmAyvL/mYM+lHUhFFYC3fSpIKhwiRwEtcldDyY/qEGO a7nl+swcL8LZB41MIaUgj3kBsS5joMtqFDc4nlTxjGVxYXD2bhxW4XlSobD5gZa5LKUO xYa+knOgLbQ7MhBk7rNW+ZJgTJtiC3nKPbtaH7m3YCD8elAeX7VQB03T8WO5C+rLI8H8 XZ4A== X-Gm-Message-State: AFuF++n6m5drFtGmXOSAOXFks7yizSqRqucPL5+waoDmEHxv339quDnI A7tWtTbYu48VBiO8zGq0gDbvohu3Co3Z3oRMD9dlDB8jzQBKnOmnTy+u1X9TYA== X-Gm-Gg: AR+sD10pMEqEy9Jayf18/FT2lxZBLWpInK2xP+cNS9wdKE1/xqQtgiPTfwfDQG4+s+H nnf31288yoKeFekVJKQtJM73WEneq/572cbfdFvLy8/CbXnJ6b18R/Y6StzuzVX68pz3Wqm1Y2a Aliyh4iUUpx+vHTNiU/yIe8LjzvRxa9QJUmv2UrWRKaEgmpR6uzuJydH/ein3GGmxMoksbS3dtP cCE5Ei5yattmDCM2AIzfyb00aewBMRxuO/Pu66iRqT23EMyFFgVqwzvItPEiSFTPyf4ms+hir+q bARPKXYAFQZ/59x2WMvIb5HRyt/K3k3PYkQodXd9ggzkUjm6NEEbivAnI3g4BFl1g+4cg98tFCT iqBgrFNftEVLZKaVZ7upLkFC9yR/7ZgvYNOJiIpfTcNejlZffiLbPgdVWdR6EP3tmCQ9fPApJ71 XPMKkWCBPyA49hTAP2qZMoLvh5v7hQvFrotsYY0OLbf/WKE4gSUx6hDUmnSrxCL0KR1yW6rC7gu N1wJA== X-Received: by 2002:a17:90b:4fd0:b0:38e:5b59:c2ff with SMTP id 98e67ed59e1d1-39580a4d031mr18112202a91.3.1787197742705; Wed, 19 Aug 2026 20:49:02 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: wangyang , Alistair Francis Subject: [PULL 90/93] target/riscv: reject FMV.X.W/FMV.W.X under Zfinx Date: Thu, 20 Aug 2026 13:44:27 +1000 Message-ID: <20260820034430.1186695-91-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198276251158500 Content-Type: text/plain; charset="utf-8" From: wangyang Zfinx explicitly excludes the FMV transfer instructions, but trans_fmv_x_w/trans_fmv_w_x used REQUIRE_ZFINX_OR_F so a Zfinx-only CPU accepted them. Require RVF instead so the transfers trap with an illegal instruction when only Zfinx is present. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4108 Reviewed-by: Alistair Francis Signed-off-by: wangyang Message-ID: <36c7cfebd27b4b6e8bcdd00e09e9dda0@wangyang25.otcaix.iscas.ac.cn> Signed-off-by: Alistair Francis --- target/riscv/tcg/insn_trans/trans_rvf.c.inc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/riscv/tcg/insn_trans/trans_rvf.c.inc b/target/riscv/tcg= /insn_trans/trans_rvf.c.inc index 481f7282da..636dec1664 100644 --- a/target/riscv/tcg/insn_trans/trans_rvf.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvf.c.inc @@ -434,7 +434,8 @@ static bool trans_fmv_x_w(DisasContext *ctx, arg_fmv_x_= w *a) { /* NOTE: This was FMV.X.S in an earlier version of the ISA spec! */ REQUIRE_FPU; - REQUIRE_ZFINX_OR_F(ctx); + /* Zfinx explicitly excludes the FMV transfer instructions. */ + REQUIRE_EXT(ctx, RVF); =20 TCGv dest =3D dest_gpr(ctx, a->rd); TCGv_i64 src1 =3D get_fpr_hs(ctx, a->rs1); @@ -537,7 +538,8 @@ static bool trans_fmv_w_x(DisasContext *ctx, arg_fmv_w_= x *a) { /* NOTE: This was FMV.S.X in an earlier version of the ISA spec! */ REQUIRE_FPU; - REQUIRE_ZFINX_OR_F(ctx); + /* Zfinx explicitly excludes the FMV transfer instructions. */ + REQUIRE_EXT(ctx, RVF); =20 TCGv_i64 dest =3D dest_fpr(ctx, a->rd); TCGv src =3D get_gpr(ctx, a->rs1, EXT_ZERO); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198435; cv=none; d=zohomail.com; s=zohoarc; b=L/zUquRosygP7D1E7yv/TZwCj4whdNP+g63xS0ZKDiGZF++fsvpuLnjX6WBKcCc+f3rrmWOTPVrpt6T9AoLVk+08Fc0EVFQG7VKDrR6M9Az4gf1AIhCMsFaVIH3iyiSen1GxZbW5QdWRIJPQfYeKba5RTAxwkEQQdTVqXyZzeGc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198435; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=aHib+VBpVmiPANdQmekp+Cwzw4eMIzE03qptIJvCC3Q=; b=LB45sMY/k1sUlk38a0ChU7fBtdzYSIuBB/EpMKWEsqv8KjaAuM2u6C9ZuyALpiR9Q7zrkxThZ8auDKxOxHJQ+LTt9WwtL2NvVHl/LYCP0erzEq0+dyQCX2BMPl/wUDV2Sg62a9+mNBrx5Wu4n3ae2MptgPPxM9f4CQvtvsYxXKU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198435990820.852217128329; Wed, 19 Aug 2026 21:00:35 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtmF-0007nc-M6; Wed, 19 Aug 2026 23:49:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtm8-0007au-9u for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:09 -0400 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtm6-0004Tg-OR for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:08 -0400 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-2d58efc7356so19078255ad.1 for ; Wed, 19 Aug 2026 20:49:06 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.49.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:49:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197745; x=1787802545; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=aHib+VBpVmiPANdQmekp+Cwzw4eMIzE03qptIJvCC3Q=; b=Cr34xoez4Q1TGKJOaLvDIMhoITg8yRpJAvgEdsAjd1uob4abOqoPM5jb3UEbrX5r0O 6Cst8icnt8nfWWIM+JOtTLzhBU85cWf5ZapGUXWxmFkWNOgZkrAcwhcbUtpo6l+BDs18 Ia+TAQD1VKxvfKF36ZkiCIrj39hiG4N8ctYKsO1Di8zMEyJVmmua6zDP+0VEYpGKU0fR IacxBwMSlQs3+t9u6bq96GLqo6eIbjvw8KRHcI9+5wSvrUT6+puRHiZalC0LpIlWwCcJ 0QgAlozTAnBB5by2v2KEZ0x8YoJv4Zt40WHRwJ6ABteeeyaGQWS8UvCh/kHhcix3tzYF gH0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197745; x=1787802545; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=aHib+VBpVmiPANdQmekp+Cwzw4eMIzE03qptIJvCC3Q=; b=TTg/sVHlfCwgtqwQ8E/+lB+kg1HTxr2RuUSgdh8XPjaVlYPsu/TPD86EqbWpxljnIE CB6uesfKVqrO1ph3ldQVAKoZllQC6l4rXnPImfaGVbAPG3g+CMrRbVspmStff3hSMqir AYoiQhyT9A7DYOukDNUGogKlF7g0EeSTOuB44eqU2O8RL5Af0jgYt79oafbE6nfLh8Fw PpA0youP9ZVgzZgLhwM0359maDwxQWapIjbxTsP+KdGOnEYZeE47ZJVJFAZfdfNwCjuS rAi11d9mE9GTyvh4dCTTiph3Ws/+T2H4GbWlol47ELsqXnZmXZBzkQzrrI8xQ6v5B23k eo6g== X-Gm-Message-State: AFuF++lyL8ii23e9FIVsw3s7hTUdXz8NmZAAFaoltWIQWD/5jza952sE gV12J1MBmwB9qhc1pnU1Vd9P8vYDuukHrRf2P4H2dQgybP+Xhvz0EFTx95LZgQ== X-Gm-Gg: AR+sD11uKbzoj6eI5jD8uxYJ9+dx/Yx6wQYfcPT/yKX3808cigOmbWwWYVD5YbQyjcy C7ktCqlQfkm41rF4xRAi8DCg9nYVsb/0oZXXac7gPwWs0UHsHGczI59tnz9iRzeoi73z9v1yZF9 FSPXHZuuj35VNSWVR+FOkC8Ek6iit9TXlNDJ0F/sFy9aTPOZhFvacAvVbJzScxktWzyRG5oXgkZ RhsZ1UYM6u3qJTA2vaEry45q8FeLX1S2pVwfAI03zQeAwxZ9HHfVGAThayN7qqqyJa6Ra1FJuly WTSgaJ6jdtD6lXFk7+cItNca1DO4Km0I8f7x/0EvT1gKr9O4z+th548VgZxcGzY5kpnqvncanVr 1j5pjqJIa55y/BdbH7wxWTy8u7w27rRKhIZOrSrLeL7387hsKgfosWf+VJ7oNn4HusyLVNj5I56 MqMM+l9AIm4YkWCEfSppBSfgx02u4cb6hpJIofhcMf1w0H4OLtEJLoc0HmUUtaMCL/DCGbO+9TM 7XELvQ= X-Received: by 2002:a17:90b:5250:b0:381:9028:5945 with SMTP id 98e67ed59e1d1-3958125375amr19117255a91.14.1787197745310; Wed, 19 Aug 2026 20:49:05 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: wangyang , Alistair Francis Subject: [PULL 91/93] target/riscv: enforce even register constraints for Zdinx fcvt pairs Date: Thu, 20 Aug 2026 13:44:28 +1000 Message-ID: <20260820034430.1186695-92-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198437357158500 Content-Type: text/plain; charset="utf-8" From: wangyang fcvt.d.h and fcvt.h.d access a 64-bit double held in a register pair, so under Zdinx/Zhinxmin the odd-rd (fcvt.d.h) and odd-rs1 (fcvt.h.d) encodings are reserved. Add the missing REQUIRE_EVEN checks so those encodings raise an illegal-instruction exception instead of retiring. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4109 Reviewed-by: Alistair Francis Signed-off-by: wangyang Message-ID: Signed-off-by: Alistair Francis --- target/riscv/tcg/insn_trans/trans_rvzfh.c.inc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/riscv/tcg/insn_trans/trans_rvzfh.c.inc b/target/riscv/t= cg/insn_trans/trans_rvzfh.c.inc index 88711fb076..b17ef9541c 100644 --- a/target/riscv/tcg/insn_trans/trans_rvzfh.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvzfh.c.inc @@ -419,6 +419,7 @@ static bool trans_fcvt_d_h(DisasContext *ctx, arg_fcvt_= d_h *a) REQUIRE_FPU; REQUIRE_ZFHMIN_OR_ZHINXMIN(ctx); REQUIRE_ZDINX_OR_D(ctx); + REQUIRE_EVEN(ctx, a->rd); =20 TCGv_i64 dest =3D dest_fpr(ctx, a->rd); TCGv_i64 src1 =3D get_fpr_hs(ctx, a->rs1); @@ -453,6 +454,7 @@ static bool trans_fcvt_h_d(DisasContext *ctx, arg_fcvt_= h_d *a) REQUIRE_FPU; REQUIRE_ZFHMIN_OR_ZHINXMIN(ctx); REQUIRE_ZDINX_OR_D(ctx); + REQUIRE_EVEN(ctx, a->rs1); =20 TCGv_i64 dest =3D dest_fpr(ctx, a->rd); TCGv_i64 src1 =3D get_fpr_d(ctx, a->rs1); --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198205; cv=none; d=zohomail.com; s=zohoarc; b=AD7QW4zaLLNufAW0mQ41cP5WwY9UdfjKvWHynIwgqSOqKsjWWfbeIWcwX8bEwp5VYw52TrLv+If5jkbE3W+elKTOjcfaGZpXaP0xtPjCC+GRAQXrNh1oqlEE2SjFnEUtZvtFy4mVxix5QXMUqtEVb0NkgFzN1vrcM5uJ41OiFiA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198205; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2bo/j1CDuuQMd0oLr1kU7Y1aV/gYiZ5tDVaJf2ZCz7I=; b=HUJcJQ6m1Fgfc/JHyGAyAg7qt3G2iCcHTFdGyiYFcSrwMJ9Pn1a+GoujU+ELZPaWQ+PmoFgkBzKEHUHSM6uwWuDNPKowT8A8px0leLZZ9tdC2qLIBuDU0RZsybxQWT3sA3hJc2KHn09Z2klR+jDKf5dyqNjZDn1SWAB9dIK1mT0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198205621329.38470255536447; Wed, 19 Aug 2026 20:56:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtmH-0007tY-Pi; Wed, 19 Aug 2026 23:49:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtmC-0007lB-D6 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:13 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtm9-0004U8-IS for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:12 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-38dcbade417so1940071a91.1 for ; Wed, 19 Aug 2026 20:49:09 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:49:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197748; x=1787802548; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=2bo/j1CDuuQMd0oLr1kU7Y1aV/gYiZ5tDVaJf2ZCz7I=; b=Srlx1L099xsqB5VaGS1ReZYGgZ6ajKjQqtLwEkoHqHFSapLmwEKl7BgUPgjHKQHK0o D1meclTIQnppuiW7JvuyCZy+1Y07J90jHxDwP83pdbJ3w59PHumB0JUdndjW5M3N6CFD rZK9wFt/KrGKX/n7ODa4oE0mSn+ZNBC1Tgc/qDujDxKHS26Px3NB8QR1PRsHuKXP7/Hi a5XM9aHOmzewj8BqjpoBhlkt67aSNGzuVsifhrUpgoqhmMNuvb+NmkGuv/YjFH2vMtH4 gp90t71/4zYMgD03Qxbv5JouCqxtfhO7FTVAx3BM//NJkKdIWglLxs3RRUmSM0rqClW4 9w2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197748; x=1787802548; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=2bo/j1CDuuQMd0oLr1kU7Y1aV/gYiZ5tDVaJf2ZCz7I=; b=DdVFtOMwLCZUvah6xmWxoyJlgZleTGDvZ+Gpi0EsNTNLlvX9X21ULo0AWk2UxV8qtx Qx3N/ZqVZnR/tfljhW0eytN9d18lCPmXi/05MICtL+Wos0DiMDrM6JhP2viJzFSGKhcb yunRL7wXiGs8yVLj5MFmHqHEyZYJW7IZuLY9IqWrxLLkft/6irJYZMA7U3MEtVjdNabi 9Tohrt76o55rpCNjkvtvQK1fTE1BDY7tqhdOA7FBKExg3T68mcif4e5K3fhcjX0cfnIi Wfu0Lpbaslp+/5g/0KjATk6gxx08xvDm/HEpHt/YC1DLamPayhWy0n/RMQ1lgtzNurnD 3heg== X-Gm-Message-State: AFuF++nME8FGplNTajzbC+YiSm4PnBBRZ2UZJO3W2IpScH97t/2n1Y0b OYQFjX5IQT+sEejyvyWvimKJRT32x76sComRzwK4KneblqoqVSsOzHgsxEm3/w== X-Gm-Gg: AR+sD10oMYEs4fVAPGbuuw2X9okyF819LEoL1eu76IHSVXXw6wHKx702olb+3As3njo 1Ukbw+ELj3BQfguIBmPDqAoxkrshJHjYFj2tiUGQzFTj1Kp9nwqs6W0R3iQytmOWouR+kAw503X MGATt1iFhHe8jjICos4+k6ATbKG7WRTPnnlROqcY45b1IFHZBVV86jNI37l9nQ19OVJj8qj2cjI C/CZhfgYjE+dpuBQSVzCokLkLhP2OjeLVshVydiumnHMGprFMuk+da/7q0/hDiPwCxdLOaCTR6f I/RvuDfODr890x3wN18KQaIvgQo8JypM1HG0ttTi51dZd8PEwKfkAOoIylnqsOY+aUlblc7Ft94 wMJ3rA6zbvYZgFaiEgUDqmCBf3wG6gQImxWTe3JV4cs/uhIsQrWkN+qzmg6m/KUFCzyfaU78sNe y59t5jItsJ+4O2/bJTrWF3YrjdzKc9xypjplUXhwkoP20ISNClVAZNRj5kYUhL/U6hHshT07kfA ++HIA== X-Received: by 2002:a17:90b:2e90:b0:38e:c7b0:84ad with SMTP id 98e67ed59e1d1-395804993b6mr17404597a91.0.1787197748139; Wed, 19 Aug 2026 20:49:08 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Chao Liu , Bin Meng , Alistair Francis Subject: [PULL 92/93] tests/qtest: remove trace output from k230 watchdog test Date: Thu, 20 Aug 2026 13:44:29 +1000 Message-ID: <20260820034430.1186695-93-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198206080158500 Content-Type: text/plain; charset="utf-8" From: Chao Liu The interrupt mode test does not depend on trace output, but passes a trace file to QEMU. This makes startup fail when QEMU is built without the log or simple trace backend, so qtest cannot connect. Drop the unnecessary trace option. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4126 Signed-off-by: Chao Liu Reviewed-by: Bin Meng Message-ID: <20260813054329.35425-1-chao.liu@processmission.com> Signed-off-by: Alistair Francis --- tests/qtest/k230-wdt-test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qtest/k230-wdt-test.c b/tests/qtest/k230-wdt-test.c index c8eaeaf1ae..b1131f42e3 100644 --- a/tests/qtest/k230-wdt-test.c +++ b/tests/qtest/k230-wdt-test.c @@ -76,7 +76,7 @@ static void test_counter_restart(void) =20 static void test_interrupt_mode(void) { - QTestState *qts =3D qtest_init("-machine k230 --trace k230_*,file=3Dk2= 30.log"); + QTestState *qts =3D qtest_init("-machine k230"); =20 /* Set interrupt mode and enable watchdog */ qtest_writel(qts, WDT_BASE + K230_WDT_CR, --=20 2.54.0 From nobody Mon Sep 28 00:10:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787198433; cv=none; d=zohomail.com; s=zohoarc; b=aILiEmO+oDKNoqH7ZxlbByxSXGQLpvxljJdA23fJru76B8O+VD2fc/bcsJwHzsNZo9JteNe6XSAFH2UI4FY0jSKn/B1gtTtIsrGYa32c1ys8wvFhAWxN4yaiXgD1au2kGIko9c1mNUIhShKUZ3WzlzVNSjAm6ZMiJbldHdJR7Lc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787198433; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Xa78VJXkRTr/R10IbacHsImvODmXgVktvTMEhHcpiSY=; b=G/t1uwr4jSf8s/rSXnoCGCUOKcum+vBxEOaC0AePIW5OKeX2pKzwXywfmj6WdgOT30B0evei3Uv6YUp/jG1G9brkcq1MbNi6bWchmfeX8kwZMNPSEhr6v5bMkE/xJWXp4a0umiar0R/eNOKKy44lKogPne1HvyHkzmkmhNkQDM0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787198433132187.06608355263222; Wed, 19 Aug 2026 21:00:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwtmL-00088x-Ge; Wed, 19 Aug 2026 23:49:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwtmD-0007ni-Vn for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:14 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wwtmC-0004UV-ID for qemu-devel@nongnu.org; Wed, 19 Aug 2026 23:49:13 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-38e3efab7e0so400189a91.0 for ; Wed, 19 Aug 2026 20:49:12 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1416ad6060asm19506735c88.6.2026.08.19.20.49.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 20:49:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787197751; x=1787802551; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Xa78VJXkRTr/R10IbacHsImvODmXgVktvTMEhHcpiSY=; b=bE33lFj9IhPUwkEEoXmsq1ZPSmFXqER0BlnjxqRn9lV5MnA3HskVPL78GRs3rqWgIt JoVS0emB+qP7wzNGEpoiaZKHPU+Z5uXNtrVQwpikUy+1y846BXQM0gEFTWny7zjxEa0g iMQw1swKdUa+M9a1RT3s2n/nvowngRQ0Qt8WzFs1upiAChhfURRmfGUO95XlorauEzVw pvynLWgx464m5jgKOqMN9IL5W+a0urYunA39FDBhVdm2IUjDIaUugBnxyTRRShs05JFa 0OLhrzXxK5iBm22B12TQm2p3TosPoeRboVYsG0u89BrcWM39XWqJ4H5dbcXU+JdU9qSj a1bA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787197751; x=1787802551; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=Xa78VJXkRTr/R10IbacHsImvODmXgVktvTMEhHcpiSY=; b=DsJ1slwUT3SsPgY/Ls7upcXmkEQg8O21vAkONDZ7RTDxMeRjqZerlchrTYZ7VSdhkk uzpTW9TsGFjsuTrSA5RqRdujeN3hx7YaJuEnUQ4bP9JlXudB4yXJFxDZWKiugTQqE85P HEw+2iCOtOn9GOUSAxpy4aT0NmQGxAzEuM0mM5oEC95gSl5+TctlL/qfep8KHw41vsLg C3AdhI6XbJIT+QffA1cXQVsJaDw2MYH3M5scA0+h//XNobgxSvxc72UwBvTWSQOuF20H D50INIdpw4quZcmrwXLex8mTft7XIhDpd5446qxrjn8PLsbzoa/sux6Y7CMUfku583HU NIyw== X-Gm-Message-State: AFuF++mZ0RCN7hxYTyIPVvJjEY3B8dSx0VFd6wBGNuaf1FXNzRMfC/kx LKtX6REZ4n6fM8Tv+AsiBaYYYhhxySXrYJIAmFFvzSiRmMM6cmep1z2N9GgbCQ== X-Gm-Gg: AR+sD13Y0hg+/9bixhcQpScqY1r1Y1M/VKXA3jixOtDMGfLgdb7bvWfDuage1PiKNtS t3j7LD7b/8YE4t1VqEB2N5YI1NW0Uge5AyRbXMU/9CiUxUaCZjtaoy2JSaJ/J52U7b8q87g3MeP n0xZHjwkeT7ls0rMes0nMI5wc1bbsFY+/JzN69bGivRoc0rzPT8gKK6R+hHR5VXwP00hsgHnlLb K5gEzNMTLROhOqc//UDXdees0FS30cGed9kbXrKFt3VKXDqROgES+xZxy685Rrd8kn4dwLwqO+f Um8GLr/8OOkWgWz6eLXMh4Zo81Z51LG8yBVENVg+JYTH0ANhGxObiJH7wClbv+1CQYpRkQbcpsA uUNcvIu1CSP3UrIFt5NMQw4TS0pW7M6sWX0MvPeMaLEX3D0eK9XxJURzgFPMmktULqpgRKocDhY AVPIhOFhX260heXDxL93sieNHYsXX3DG14/5b6S0u+N0HccaSGKnAQgSOFWRH7DDSr2UsD3pZOl 11VfQ== X-Received: by 2002:a17:90a:d40e:b0:38f:a81:15b1 with SMTP id 98e67ed59e1d1-395a071b857mr4477453a91.19.1787197751368; Wed, 19 Aug 2026 20:49:11 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: Joel Stanley , Anton Johansson , Max Chou , Alistair Francis Subject: [PULL 93/93] target/riscv: Restore register dump zero padding Date: Thu, 20 Aug 2026 13:44:30 +1000 Message-ID: <20260820034430.1186695-94-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260820034430.1186695-1-alistair.francis@wdc.com> References: <20260820034430.1186695-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787198434966158500 Content-Type: text/plain; charset="utf-8" From: Joel Stanley The register values lost their leading zeroes when the underlying type was changed, resulting in mismatched padding and harder to read output. Print with a runtime field width based on MXL, so values are 16 hex digits on rv64 and 8 on rv32, matching the csr and fp dump. This avoids adding target_ulong back into the dump. Fixes: c4e6bc63853c ("target/riscv: Fix size of gpr and gprh") Signed-off-by: Joel Stanley Reviewed-by: Anton Johansson Reviewed-by: Max Chou Message-ID: <20260813032421.54438-1-joel@jms.id.au> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 79ddde419a..a13177b7b7 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -651,6 +651,9 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,= int flags) { RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; + bool rv32 =3D riscv_cpu_is_32bit(cpu); + int width =3D rv32 ? 8 : 16; + uint64_t mask =3D rv32 ? UINT32_MAX : UINT64_MAX; int i, j; uint8_t *p; =20 @@ -665,7 +668,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,= int flags) qemu_fprintf(f, " %-13s %d\n", "elp", env->elp); } #endif - qemu_fprintf(f, " %-13s %" PRIx64 "\n", "pc", env->pc); + qemu_fprintf(f, " %-13s %0*" PRIx64 "\n", "pc", width, env->pc & mask); #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) for (i =3D 0; i < ARRAY_SIZE(csr_ops); i++) { int csrno =3D i; @@ -692,8 +695,8 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,= int flags) #endif =20 for (i =3D 0; i < 32; i++) { - qemu_fprintf(f, " %-8s %" PRIx64, - riscv_int_regnames[i], env->gpr[i]); + qemu_fprintf(f, " %-8s %0*" PRIx64, + riscv_int_regnames[i], width, env->gpr[i] & mask); if ((i & 3) =3D=3D 3) { qemu_fprintf(f, "\n"); } --=20 2.54.0