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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151526448158500 Rename meaningless @ret or @r variables as @excp to directly denote the value is an exception. No logical changes, purely cosmetic/clarity improvement. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 24 ++++++++++++------------ accel/tcg/tcg-accel-ops-mttcg.c | 7 ++++--- accel/tcg/tcg-accel-ops-rr.c | 8 ++++---- accel/tcg/tcg-accel-ops.c | 7 ++++--- 4 files changed, 24 insertions(+), 22 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 257211235db..53d90c400d5 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -687,7 +687,7 @@ static inline void cpu_handle_debug_exception(CPUState = *cpu) } } =20 -static inline bool cpu_handle_exception(CPUState *cpu, int *ret) +static inline bool cpu_handle_exception(CPUState *cpu, int *excp) { if (cpu->exception_index < 0) { #ifndef CONFIG_USER_ONLY @@ -703,8 +703,8 @@ static inline bool cpu_handle_exception(CPUState *cpu, = int *ret) =20 if (cpu->exception_index >=3D EXCP_INTERRUPT) { /* exit request from the cpu execution loop */ - *ret =3D cpu->exception_index; - if (*ret =3D=3D EXCP_DEBUG) { + *excp =3D cpu->exception_index; + if (*excp =3D=3D EXCP_DEBUG) { cpu_handle_debug_exception(cpu); } cpu->exception_index =3D -1; @@ -720,7 +720,7 @@ static inline bool cpu_handle_exception(CPUState *cpu, = int *ret) if (tcg_ops->fake_user_interrupt) { tcg_ops->fake_user_interrupt(cpu); } - *ret =3D cpu->exception_index; + *excp =3D cpu->exception_index; cpu->exception_index =3D -1; return true; #else @@ -738,13 +738,13 @@ static inline bool cpu_handle_exception(CPUState *cpu= , int *ret) * raised when single-stepping so that GDB doesn't miss the * next instruction. */ - *ret =3D EXCP_DEBUG; + *excp =3D EXCP_DEBUG; cpu_handle_debug_exception(cpu); return true; } } else if (!replay_has_interrupt()) { /* give a chance to iothread in replay mode */ - *ret =3D EXCP_INTERRUPT; + *excp =3D EXCP_INTERRUPT; return true; } #endif @@ -935,10 +935,10 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, Tr= anslationBlock *tb, static int __attribute__((noinline)) cpu_exec_loop(CPUState *cpu, SyncClocks *sc) { - int ret; + int excp; =20 /* if an exception is pending, we execute it here */ - while (!cpu_handle_exception(cpu, &ret)) { + while (!cpu_handle_exception(cpu, &excp)) { TranslationBlock *last_tb =3D NULL; int tb_exit =3D 0; =20 @@ -1006,7 +1006,7 @@ cpu_exec_loop(CPUState *cpu, SyncClocks *sc) align_clocks(sc, cpu); } } - return ret; + return excp; } =20 static int cpu_exec_setjmp(CPUState *cpu, SyncClocks *sc) @@ -1021,7 +1021,7 @@ static int cpu_exec_setjmp(CPUState *cpu, SyncClocks = *sc) =20 int cpu_exec(CPUState *cpu) { - int ret; + int excp; SyncClocks sc =3D { 0 }; =20 /* replay_interrupt may need current_cpu */ @@ -1042,10 +1042,10 @@ int cpu_exec(CPUState *cpu) */ init_delay_params(&sc, cpu); =20 - ret =3D cpu_exec_setjmp(cpu, &sc); + excp =3D cpu_exec_setjmp(cpu, &sc); =20 cpu_exec_exit(cpu); - return ret; + return excp; } =20 bool tcg_exec_realizefn(CPUState *cpu, Error **errp) diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttc= g.c index 69560fdb9d8..e7edd1945f2 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -90,11 +90,12 @@ static void *mttcg_cpu_thread_fn(void *arg) qemu_process_cpu_events(cpu); =20 if (cpu_can_run(cpu)) { - int r; + int excp; + bql_unlock(); - r =3D tcg_cpu_exec(cpu); + excp =3D tcg_cpu_exec(cpu); bql_lock(); - switch (r) { + switch (excp) { case EXCP_DEBUG: cpu_handle_guest_debug(cpu); break; diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index cdaa3e11808..d6c2fc019c9 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -277,22 +277,22 @@ static void *rr_cpu_thread_fn(void *arg) (cpu->singlestep_flags & SSTEP_NOTIMER) =3D= =3D 0); =20 if (cpu_can_run(cpu)) { - int r; + int excp; =20 bql_unlock(); if (icount_enabled()) { icount_prepare_for_run(cpu, cpu_budget); } - r =3D tcg_cpu_exec(cpu); + excp =3D tcg_cpu_exec(cpu); if (icount_enabled()) { icount_process_data(cpu); } bql_lock(); =20 - if (r =3D=3D EXCP_DEBUG) { + if (excp =3D=3D EXCP_DEBUG) { cpu_handle_guest_debug(cpu); break; - } else if (r =3D=3D EXCP_ATOMIC) { + } else if (excp =3D=3D EXCP_ATOMIC) { bql_unlock(); cpu_exec_step_atomic(cpu); bql_lock(); diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 560fe2554ba..9c3d2214162 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -77,13 +77,14 @@ void tcg_cpu_destroy(CPUState *cpu) =20 int tcg_cpu_exec(CPUState *cpu) { - int ret; + int excp; + assert(tcg_enabled()); cpu_exec_start(cpu); - ret =3D cpu_exec(cpu); + excp =3D cpu_exec(cpu); cpu_exec_end(cpu); =20 - return ret; + return excp; } =20 static void tcg_cpu_reset_hold(CPUState *cpu) --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151470; cv=none; d=zohomail.com; s=zohoarc; b=jg1KFnvkCmGzphvQ5rJxzZp50EguI9xYIDOY7WFtsZvItGK+zHdKH0BGqMV2LypOtko6ITDu8PviPoxpp6m1oxWAPyrkdRLPPsCxKOw1FYeEjWTNor0DyxAd7/7h4mV9mD3B5az+n4a2NRjBPL4Y9KADhghMWXrJ8UyZhn8/8SM= ARC-Message-Signature: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151472639158500 EXCP_HALTED is defined and documented in "exec/cpu-common.h" as: #define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) = */ Since vCPUs can not be halted in user-mode emulation, guard the whole block within !CONFIG_USER_ONLY section. No logic changes. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 53d90c400d5..69207301d1d 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -653,9 +653,9 @@ static inline void tb_add_jump(TranslationBlock *tb, in= t n, qemu_spin_unlock(&tb_next->jmp_lock); } =20 +#ifndef CONFIG_USER_ONLY static inline bool cpu_handle_halt(CPUState *cpu) { -#ifndef CONFIG_USER_ONLY if (cpu->halted) { const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; bool leave_halt =3D tcg_ops->cpu_exec_halt(cpu); @@ -666,10 +666,10 @@ static inline bool cpu_handle_halt(CPUState *cpu) =20 cpu->halted =3D 0; } -#endif /* !CONFIG_USER_ONLY */ =20 return false; } +#endif /* !CONFIG_USER_ONLY */ =20 static inline void cpu_handle_debug_exception(CPUState *cpu) { @@ -1027,9 +1027,11 @@ int cpu_exec(CPUState *cpu) /* replay_interrupt may need current_cpu */ current_cpu =3D cpu; =20 +#ifndef CONFIG_USER_ONLY if (cpu_handle_halt(cpu)) { return EXCP_HALTED; } +#endif =20 RCU_READ_LOCK_GUARD(); cpu_exec_enter(cpu); --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151487; cv=none; d=zohomail.com; s=zohoarc; b=ZdWtgnJvSUwLmdqVOY3+VKNo/JtzWw+yBRdcvG3pMM5qj+PGJ7/+2YS9oiOSIw9NTqNcPiyq0iMWlqAXzF0d0xi9k1+lnrY43E1NQ9azVjffDScpWoi9BJ3QzMDLdAEts2iJBYksdiFUmUixRFTGIeiYZD5B5/KfYNtYS83LZQs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151487; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tIBdeUm/Geiqpku6GpbK+H1wz9UlnhN9i1p8xodXuro=; b=KArmxYGHftQWIlAj6bV4/y/uIMAqgcmA3Lk8EkPZzQL6NLrowxKQcLUIeukLSzP4s0wfDOS4gSvrcKE7BiH2ZYvwx8nt8VfxAT2qcHsdHrNPRuX8cmpEN7EwBfAEHoD1cK+1xuQz4Ya3sSgfMkwE20Z2sHbAajNAukO8/pMaPT0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151487629986.4556040119552; Wed, 19 Aug 2026 07:58:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhjb-00083W-CQ; Wed, 19 Aug 2026 10:57:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjA-0007w5-TJ for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:16 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhj9-0000Vi-Ff for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:16 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEbtG4909043 for ; Wed, 19 Aug 2026 14:57:14 GMT Received: from mail-qk1-f197.google.com (mail-qk1-f197.google.com [209.85.222.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfmbt54-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:57:13 +0000 (GMT) Received: by mail-qk1-f197.google.com with SMTP id af79cd13be357-92e5fc4c7e9so153320385a.3 for ; Wed, 19 Aug 2026 07:57:13 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151488324158500 In cpu_exec(), check CPUState::halted field early before calling cpu_handle_halt(). The logic is the same but allow to simplify the async event processing hooks that will be added in the next commit. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 69207301d1d..46b723cb734 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -656,17 +656,15 @@ static inline void tb_add_jump(TranslationBlock *tb, = int n, #ifndef CONFIG_USER_ONLY static inline bool cpu_handle_halt(CPUState *cpu) { - if (cpu->halted) { - const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; - bool leave_halt =3D tcg_ops->cpu_exec_halt(cpu); + const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; + bool leave_halt =3D tcg_ops->cpu_exec_halt(cpu); =20 - if (!leave_halt) { - return true; - } - - cpu->halted =3D 0; + if (!leave_halt) { + return true; } =20 + cpu->halted =3D 0; /* allow execution */ + return false; } #endif /* !CONFIG_USER_ONLY */ @@ -1028,8 +1026,11 @@ int cpu_exec(CPUState *cpu) current_cpu =3D cpu; =20 #ifndef CONFIG_USER_ONLY - if (cpu_handle_halt(cpu)) { - return EXCP_HALTED; + if (cpu->halted) { + if (cpu_handle_halt(cpu)) { + return EXCP_HALTED; + } + assert(!cpu->halted); } #endif =20 --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151487; cv=none; d=zohomail.com; s=zohoarc; b=gfCBIq8XYs7tWv6moT1mZIGG7rQA6KtgzHQT1iCK+nyLg6sGY9D1veEMbSI3liPnK/6gYXzfsLV48Il/UIn+I994nSZaKQUrQI1Zg8rKe7kTl+tgovROvK35fnZoIMKzYmeEnstCw+slthrHI9VkpCxAAwebyCwhw6YMgNEICgw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151487; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QgUysn3SMo2tJ02Sc8djy9h4bEXcPlT4sNQIBOYSXlQ=; b=nQWR96Y24gUX5NK67xAlJa3tkzDizIg8fVjW7ldiQW9O0X9t3Y9S7gVtqDk4QqjSoRod4xE3Dkh32PNTLjng16KP1S4GMcvnKrd3MuezCahLCUXhUx+7HNuKY90GtHfAJ7A0+DPQpuXXrx9G9Pr/2kogpG6wkruy3Bs3Ur0+J64= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151487633142.45801081231514; Wed, 19 Aug 2026 07:58:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhjg-00085B-8Y; Wed, 19 Aug 2026 10:57:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjN-00082C-98 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:31 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjJ-0000Wh-15 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:28 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEbo5h588414 for ; Wed, 19 Aug 2026 14:57:20 GMT Received: from mail-qk1-f197.google.com (mail-qk1-f197.google.com [209.85.222.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfkbuqv-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:57:20 +0000 (GMT) Received: by mail-qk1-f197.google.com with SMTP id af79cd13be357-936708f129aso100402885a.0 for ; Wed, 19 Aug 2026 07:57:20 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151488318158500 Invert cpu_handle_halt()'s logic to read in cpu_exec() as "if halted, try to process async events and find work; if no work, return". Rename as cpu_has_work_after_processing_async_events(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 46b723cb734..1a942664895 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -654,18 +654,18 @@ static inline void tb_add_jump(TranslationBlock *tb, = int n, } =20 #ifndef CONFIG_USER_ONLY -static inline bool cpu_handle_halt(CPUState *cpu) +static bool cpu_has_work_after_processing_async_events(CPUState *cpu) { const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; bool leave_halt =3D tcg_ops->cpu_exec_halt(cpu); =20 if (!leave_halt) { - return true; + return false; } =20 cpu->halted =3D 0; /* allow execution */ =20 - return false; + return true; } #endif /* !CONFIG_USER_ONLY */ =20 @@ -1027,7 +1027,7 @@ int cpu_exec(CPUState *cpu) =20 #ifndef CONFIG_USER_ONLY if (cpu->halted) { - if (cpu_handle_halt(cpu)) { + if (!cpu_has_work_after_processing_async_events(cpu)) { return EXCP_HALTED; } assert(!cpu->halted); --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151558; cv=none; d=zohomail.com; s=zohoarc; b=gxQrvwCzEmFddZsfl0HVc8h1B8YVAV3rUkdFYij978bqUGwo3y/f7mUwaRt6POlP0Kj4/LetBmpK6boqVrJJ911xsErMKswUDpvV9DpizPq4x+j+LbblrmH4TBGBfQUXtH5uOvH90uhMyrADRMlnc+Fu6pwUNl3XXWf5vjwWBxM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151558; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=k/dw9CAIDDIAnKODIG5Nq+u40gkHa9+e1vlUBVaUTiM=; b=eKnSfciiB+SVIY2M/dVsDfuSrpd2W6587A/oiuXbLrIYoHLZ9hFE0Dl9E5p+4lfkvrRRY55wbJXEAtmZNMFejwRumkNHGstLUyoFOzb43usYBg3x4YYIh1319dWn3F3k3ZJ8YGoY5ela6Kgwie8oPaOuywRxFCdjC7nXX8a9Iz4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151558281793.2966887700778; Wed, 19 Aug 2026 07:59:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhk6-0000Ef-6F; Wed, 19 Aug 2026 10:58:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjO-00082c-Mx for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:32 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjM-0000XR-L5 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:30 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEboTv588430 for ; Wed, 19 Aug 2026 14:57:27 GMT Received: from mail-qk1-f200.google.com (mail-qk1-f200.google.com [209.85.222.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfkburd-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:57:27 +0000 (GMT) Received: by mail-qk1-f200.google.com with SMTP id af79cd13be357-92e9a2b95b5so197247185a.2 for ; Wed, 19 Aug 2026 07:57:27 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151558658158500 Decompose the halt-to-execution transition into distinct steps: - process_async_events() called first to handle target-specific asynchronous events, - transition_halt_to_exec() called after a halted CPU has detected pending work and is about to resume execution. Either callback is optional; targets that don't implement them fall back to the existing cpu_exec_halt() callback for backward compatibility. cpu_has_work_after_processing_async_events() orchestrates these callbacks: process async events, check for work, transition from halt, and clear the halted flag. Inspired-by: Paolo Bonzini Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/accel/tcg/cpu-ops.h | 17 ++++++++++++++++- accel/tcg/cpu-exec.c | 21 +++++++++++++++++---- 2 files changed, 33 insertions(+), 5 deletions(-) diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index 3ff6e6810e0..16c19da997d 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -169,6 +169,20 @@ struct TCGCPUOps { */ vaddr (*untagged_addr)(CPUState *cs, vaddr addr); #else + /** + * @process_async_events: Process target-specific asynchronous CPU eve= nts. + * + * Called at the start of cpu_exec() to handle target-specific event + * processing before instruction execution begins. + */ + void (*process_async_events)(CPUState *cpu); + /** + * @transition_halt_to_exec: Prepare CPU state when exiting halt. + * + * Called after a halted CPU has detected pending work and is about to + * resume execution. Target-specific cleanup and state synchronization. + */ + void (*transition_halt_to_exec)(CPUState *cpu); /** @do_interrupt: Callback for interrupt handling. */ void (*do_interrupt)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exe= c */ @@ -185,7 +199,8 @@ struct TCGCPUOps { * if it should remain in the halted state. (This should generally * be the same value that cpu_has_work() would return.) * - * This method must be provided. If the target does not need to + * Either %transition_halt_to_exec() or this method must be provided. + * If the target does not need to * do anything special for halt, the same function used for its * SysemuCPUOps::has_work method can be used here, as they have the * same function signature. diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 1a942664895..54561ed31c1 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -48,6 +48,7 @@ #include "internal-common.h" #if !defined(CONFIG_USER_ONLY) #include "accel/tcg/iommu.h" +#include "hw/core/sysemu-cpu-ops.h" #endif =20 /* -icount align implementation. */ @@ -657,10 +658,22 @@ static inline void tb_add_jump(TranslationBlock *tb, = int n, static bool cpu_has_work_after_processing_async_events(CPUState *cpu) { const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; - bool leave_halt =3D tcg_ops->cpu_exec_halt(cpu); =20 - if (!leave_halt) { - return false; + if (tcg_ops->transition_halt_to_exec) { + assert(!tcg_ops->cpu_exec_halt); + if (tcg_ops->process_async_events) { + tcg_ops->process_async_events(cpu); + } + if (!cpu_has_work(cpu)) { + return false; + } + tcg_ops->transition_halt_to_exec(cpu); + } else { + assert(!tcg_ops->process_async_events); + assert(cpu->cc->sysemu_ops->has_work =3D=3D tcg_ops->cpu_exec_halt= ); + if (!tcg_ops->cpu_exec_halt(cpu)) { + return false; + } } =20 cpu->halted =3D 0; /* allow execution */ @@ -1059,7 +1072,7 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp) /* Check mandatory TCGCPUOps handlers */ const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; #ifndef CONFIG_USER_ONLY - assert(tcg_ops->cpu_exec_halt); + assert(tcg_ops->cpu_exec_halt || tcg_ops->transition_halt_to_exec); assert(tcg_ops->cpu_exec_interrupt); assert(tcg_ops->cpu_exec_reset); assert(tcg_ops->pointer_wrap); --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151558; cv=none; d=zohomail.com; s=zohoarc; b=JrWAlHvYKwSMSsOw6zc1VPc9WHoHVZx5MIsw5L8quSVy+sVe0PkjnO+f8o8RvLR5zOH3HzBLsuJnO36uCaYwa8vRpp/+stmQFo4cGoxH5t6wccSesYOvEczYtIvqsBLbm6TVZ3x9vZs+TmGUeSxT0rL0QdK3qgOBcObCqCsFDoQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151558; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=vEFHHeTIxEhuVUgrc9S1ujCq+0s2VQXIEqucZAX5rjQ=; b=lRC4aupghPo0ztCbRQ6iAX4SQHfP0fwsged0xoHzY21XGGqLbkgOaKx63sgYCRCKwDAuIYtbFKXqKXccN/7LKKg6uQpNbUjKsDamuKE+Kd8IEB23EuHyRaAjtU3B+vbXBeL4NtSdc9JVTF/w6BzbX5Ltx662LKnGHhtRq80Lud0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151558401298.9932885975753; Wed, 19 Aug 2026 07:59:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhk6-0000Ek-6g; Wed, 19 Aug 2026 10:58:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjY-00083o-Co for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:41 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjU-0000Yj-G2 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:38 -0400 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEboYD1117516 for ; Wed, 19 Aug 2026 14:57:35 GMT Received: from mail-qk1-f200.google.com (mail-qk1-f200.google.com [209.85.222.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfpus38-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:57:35 +0000 (GMT) Received: by mail-qk1-f200.google.com with SMTP id af79cd13be357-934963b2bc0so120222685a.3 for ; Wed, 19 Aug 2026 07:57:34 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151558630158500 Refactor the target-specific halt-to-execution transition logic (disable WFE/WFI timers, clear the halt_reason flag) into a separate arm_cpu_transition_halt_to_exec() function. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/cpu.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 77aa78f00e2..8e9b584559d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -870,18 +870,26 @@ static bool arm_cpu_internal_is_big_endian(CPUState *= cs) } =20 #ifdef CONFIG_TCG +static void arm_cpu_transition_halt_to_exec(CPUState *cs) +{ + ARMCPU *cpu =3D ARM_CPU(cs); + + assert(cpu_has_work(cs)); + + /* We're about to come out of WFI/WFE: disable the WFxT timer */ + if (cpu->wfxt_timer) { + timer_del(cpu->wfxt_timer); + } + /* clear the halt reason */ + cpu->env.halt_reason =3D NOT_HALTED; +} + bool arm_cpu_exec_halt(CPUState *cs) { bool leave_halt =3D cpu_has_work(cs); =20 if (leave_halt) { - /* We're about to come out of WFI/WFE: disable the WFxT timer */ - ARMCPU *cpu =3D ARM_CPU(cs); - if (cpu->wfxt_timer) { - timer_del(cpu->wfxt_timer); - } - /* clear the halt reason */ - cpu->env.halt_reason =3D NOT_HALTED; + arm_cpu_transition_halt_to_exec(cs); } return leave_halt; } --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151548; cv=none; d=zohomail.com; s=zohoarc; b=GZ2VOnRkX8RoWR+5Pg0vB7h7xEkOazEJZ6geMRsO+4htI63nR7Q0rGtCxyWi6Dv/aLtxMY5RX0LTr4X0cHvczr04SVXsZGpnjtuJemdABUChsNVJTXWP4schMl4D5Ej13BChpHkdYIIusSsdxg4Im/oaPeTJDoGon28vBvavWPY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151548; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FXITH5suvTv+icy2CdUplpix+DUoujxMoLKvSwrcVV8=; b=IVHhOQsal6vF3AYrD6+d+23R9ZWNUUcgOtdUivTHU7z99JOqNC6K+hlOtOvAkIrsY/lPQwA5CtzORhk+JxB3solvObp2ISkh7gJtoCy484MBn9OjlreFz46AcUTHFrSZ6YU82Rdo2kImjXOODz8fTFMaMr8Qtw8HYig2Oxt9rIU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151548381869.1753306645635; Wed, 19 Aug 2026 07:59:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhkW-0000ZU-71; Wed, 19 Aug 2026 10:58:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjc-000851-R1 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:46 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjb-0000ZU-6f for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:44 -0400 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEbv2Q483823 for ; Wed, 19 Aug 2026 14:57:42 GMT Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfnbstk-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:57:42 +0000 (GMT) Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-936d067836eso142189885a.0 for ; Wed, 19 Aug 2026 07:57:42 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151548586158500 arm_cpu_exec_halt() now merely checks cpu_has_work() and conditionally call arm_cpu_transition_halt_to_exec(), which is now the generic flow in cpu_has_work_after_processing_async_events(). Register the transition_halt_to_exec handler to use the generic target-agnostic flow and remove the arm_cpu_exec_halt() wrapper. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/internals.h | 3 --- target/arm/cpu.c | 12 +----------- target/arm/tcg/cpu-v7m.c | 1 - 3 files changed, 1 insertion(+), 15 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 4026f67579e..8a9ee04e72e 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -431,9 +431,6 @@ void arm_restore_state_to_opc(CPUState *cs, #ifdef CONFIG_TCG TCGTBCPUState arm_get_tb_cpu_state(CPUState *cs); void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb); - -/* Our implementation of TCGCPUOps::cpu_exec_halt */ -bool arm_cpu_exec_halt(CPUState *cs); int arm_cpu_mmu_index(CPUState *cs, bool ifetch); #endif /* CONFIG_TCG */ =20 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 8e9b584559d..22fae41125f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -883,16 +883,6 @@ static void arm_cpu_transition_halt_to_exec(CPUState *= cs) /* clear the halt reason */ cpu->env.halt_reason =3D NOT_HALTED; } - -bool arm_cpu_exec_halt(CPUState *cs) -{ - bool leave_halt =3D cpu_has_work(cs); - - if (leave_halt) { - arm_cpu_transition_halt_to_exec(cs); - } - return leave_halt; -} #endif =20 /* @@ -2612,7 +2602,7 @@ static const TCGCPUOps arm_tcg_ops =3D { .tlb_fill_align =3D arm_cpu_tlb_fill_align, .pointer_wrap =3D aprofile_pointer_wrap, .cpu_exec_interrupt =3D arm_cpu_exec_interrupt, - .cpu_exec_halt =3D arm_cpu_exec_halt, + .transition_halt_to_exec =3D arm_cpu_transition_halt_to_exec, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D arm_cpu_do_interrupt, .do_transaction_failed =3D arm_cpu_do_transaction_failed, diff --git a/target/arm/tcg/cpu-v7m.c b/target/arm/tcg/cpu-v7m.c index dc249ce1f14..e30eb8cc52a 100644 --- a/target/arm/tcg/cpu-v7m.c +++ b/target/arm/tcg/cpu-v7m.c @@ -257,7 +257,6 @@ static const TCGCPUOps arm_v7m_tcg_ops =3D { .tlb_fill_align =3D arm_cpu_tlb_fill_align, .pointer_wrap =3D cpu_pointer_wrap_uint32, .cpu_exec_interrupt =3D arm_v7m_cpu_exec_interrupt, - .cpu_exec_halt =3D arm_cpu_exec_halt, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D arm_v7m_cpu_do_interrupt, .do_transaction_failed =3D arm_cpu_do_transaction_failed, --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151558615158500 Refactor the target-specific async event processing logic (APIC polling) into a separate x86_cpu_process_async_events() function. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/i386/tcg/helper-tcg.h | 1 + target/i386/tcg/system/seg_helper.c | 11 +++++++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index f4b2ff740d5..cab197368b9 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -37,6 +37,7 @@ */ void x86_cpu_do_interrupt(CPUState *cpu); #ifndef CONFIG_USER_ONLY +void x86_cpu_process_async_events(CPUState *cpu); bool x86_cpu_exec_halt(CPUState *cpu); bool x86_need_replay_interrupt(int interrupt_request); bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); diff --git a/target/i386/tcg/system/seg_helper.c b/target/i386/tcg/system/s= eg_helper.c index 8c7856be81e..4856a6b3bab 100644 --- a/target/i386/tcg/system/seg_helper.c +++ b/target/i386/tcg/system/seg_helper.c @@ -128,10 +128,9 @@ void x86_cpu_do_interrupt(CPUState *cs) } } =20 -bool x86_cpu_exec_halt(CPUState *cpu) +void x86_cpu_process_async_events(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); - CPUX86State *env =3D &x86_cpu->env; =20 if (cpu_test_interrupt(cpu, CPU_INTERRUPT_POLL)) { bql_lock(); @@ -139,6 +138,14 @@ bool x86_cpu_exec_halt(CPUState *cpu) cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); bql_unlock(); } +} + +bool x86_cpu_exec_halt(CPUState *cpu) +{ + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + + x86_cpu_process_async_events(cpu); =20 if (!cpu_has_work(cpu)) { return false; --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151530; cv=none; d=zohomail.com; s=zohoarc; b=HLKh7omJCfaBf6bpPizulWYTJIOK0HKoubjgPQDI4p2CzFsZHQr3jQnQ3s4vyUW7MUDG8yWqLPTY+Ax6A9QFD9+J6pLYwnx4+bSpZAAybUmr5tJ1fBGmQQIdcXB6MkoACX7xLRb1HqukOz1haokMC9PGqp0f2nGq1bnQX9Msj2I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151530; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=5eZLFQazAYOlyhiQQKdSZi0/McKosAMWnrZPE0PQkkY=; b=Gf7/zcyWXIeL875RbwyYetAZPlusw25cmIwad4mf3cF1bOW+NtOeQAHGifEQziV8/eQBJTwGUnB/CuAPeatBUm6uIuSfq1zmEuSkKJ6jsoCnDPxTwtfSn+zaZ9zhsKRCEqYtW47Ofeqr+5Rn7oRzsIQtgZBTLuDwDYq+yRm+SkY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151530403199.6986785253672; Wed, 19 Aug 2026 07:58:50 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhkS-0000Yd-Kd; Wed, 19 Aug 2026 10:58:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjr-0008RM-N4 for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:58:00 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjq-0000bc-4z for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:57:59 -0400 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEbvYT135640 for ; Wed, 19 Aug 2026 14:57:56 GMT Received: from mail-qk1-f197.google.com (mail-qk1-f197.google.com [209.85.222.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfmbt2k-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:57:56 +0000 (GMT) Received: by mail-qk1-f197.google.com with SMTP id af79cd13be357-933023a5980so182854385a.3 for ; Wed, 19 Aug 2026 07:57:56 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151532635158500 Refactor the halt-to-execution target-specific transition logic (setting trap flag in debug register and injecting debug exceptions) into a separate x86_cpu_transition_halt_to_exec() function. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/i386/tcg/helper-tcg.h | 1 + target/i386/tcg/system/seg_helper.c | 20 +++++++++++++------- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index cab197368b9..65819670493 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -39,6 +39,7 @@ void x86_cpu_do_interrupt(CPUState *cpu); #ifndef CONFIG_USER_ONLY void x86_cpu_process_async_events(CPUState *cpu); bool x86_cpu_exec_halt(CPUState *cpu); +void x86_cpu_transition_halt_to_exec(CPUState *cpu); bool x86_need_replay_interrupt(int interrupt_request); bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); #endif diff --git a/target/i386/tcg/system/seg_helper.c b/target/i386/tcg/system/s= eg_helper.c index 4856a6b3bab..9b2adcca76c 100644 --- a/target/i386/tcg/system/seg_helper.c +++ b/target/i386/tcg/system/seg_helper.c @@ -140,22 +140,28 @@ void x86_cpu_process_async_events(CPUState *cpu) } } =20 -bool x86_cpu_exec_halt(CPUState *cpu) +void x86_cpu_transition_halt_to_exec(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); - CPUX86State *env =3D &x86_cpu->env; + CPUX86State *env =3D cpu_env(cpu); =20 - x86_cpu_process_async_events(cpu); - - if (!cpu_has_work(cpu)) { - return false; - } + assert(cpu_has_work(cpu)); =20 /* Complete HLT instruction. */ if (env->eflags & TF_MASK) { env->dr[6] |=3D DR6_BS; do_interrupt_all(x86_cpu, EXCP01_DB, 0, 0, env->eip, 0); } +} + +bool x86_cpu_exec_halt(CPUState *cpu) +{ + if (!cpu_has_work(cpu)) { + return false; + } + + x86_cpu_transition_halt_to_exec(cpu); + return true; } =20 --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151530; cv=none; d=zohomail.com; s=zohoarc; b=OLOf1KE9uKfeyqaGAPlorIIr1bKGbzP2S/B4Ej1f06iofdA0tDJLTEhQK262hC6Kq4oWofqFYpwAERJibiaZbdcFuFqgFSzT10WfUdDVOBKEAzqVkXOzvRKjDE3WLJexeyw0pAemjZIgXhB7ZkHuqtQJm6Z953RtXaVKQFsRHVw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151530; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=lf1AKkFbDPN5LN9GZ52Xje1+fKB6ZDsodR2xkXPemRU=; b=Tbe0aeTyMnFZixfUeagAfUyx39IDr6cTbI+nY6P0yCKYQpzL49iQPn8Fka6arqQQ6LZG8c9pXYDUa7OAwgdq+hucR8GUzuoFij3++5n0q2t3UgmEgX4pbyNl9JQu6bylx2xaZRMFZ+3CceupHs2p06maZN0HBbxUkb5+zC94SG8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151530148665.9799742038538; Wed, 19 Aug 2026 07:58:50 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhkD-0000PD-Ox; Wed, 19 Aug 2026 10:58:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjx-00007e-TV for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:58:07 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhjw-0000dH-Ax for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:58:05 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEboTx588430 for ; Wed, 19 Aug 2026 14:58:03 GMT Received: from mail-qk1-f200.google.com (mail-qk1-f200.google.com [209.85.222.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfkbutj-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:58:03 +0000 (GMT) Received: by mail-qk1-f200.google.com with SMTP id af79cd13be357-92e4f946461so124363185a.2 for ; Wed, 19 Aug 2026 07:58:03 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151530627158500 x86_cpu_exec_halt() now merely checks cpu_has_work() and conditionally call x86_cpu_transition_halt_to_exec(), which is now the generic flow in cpu_has_work_after_processing_async_events(). Register both process_async_events and transition_halt_to_exec handlers to use the generic target-agnostic flow, and remove the x86_cpu_exec_halt() wrapper. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/i386/tcg/helper-tcg.h | 1 - target/i386/tcg/system/seg_helper.c | 11 ----------- target/i386/tcg/tcg-cpu.c | 3 ++- 3 files changed, 2 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index 65819670493..d224cb3c1c7 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -38,7 +38,6 @@ void x86_cpu_do_interrupt(CPUState *cpu); #ifndef CONFIG_USER_ONLY void x86_cpu_process_async_events(CPUState *cpu); -bool x86_cpu_exec_halt(CPUState *cpu); void x86_cpu_transition_halt_to_exec(CPUState *cpu); bool x86_need_replay_interrupt(int interrupt_request); bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); diff --git a/target/i386/tcg/system/seg_helper.c b/target/i386/tcg/system/s= eg_helper.c index 9b2adcca76c..7a3f14a255e 100644 --- a/target/i386/tcg/system/seg_helper.c +++ b/target/i386/tcg/system/seg_helper.c @@ -154,17 +154,6 @@ void x86_cpu_transition_halt_to_exec(CPUState *cpu) } } =20 -bool x86_cpu_exec_halt(CPUState *cpu) -{ - if (!cpu_has_work(cpu)) { - return false; - } - - x86_cpu_transition_halt_to_exec(cpu); - - return true; -} - bool x86_need_replay_interrupt(int interrupt_request) { /* diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 6f5dc06b3b9..e4fc212aca5 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -180,7 +180,8 @@ const TCGCPUOps x86_tcg_ops =3D { .tlb_fill =3D x86_cpu_tlb_fill, .pointer_wrap =3D x86_pointer_wrap, .do_interrupt =3D x86_cpu_do_interrupt, - .cpu_exec_halt =3D x86_cpu_exec_halt, + .process_async_events =3D x86_cpu_process_async_events, + .transition_halt_to_exec =3D x86_cpu_transition_halt_to_exec, .cpu_exec_interrupt =3D x86_cpu_exec_interrupt, .cpu_exec_reset =3D x86_cpu_exec_reset, .do_unaligned_access =3D x86_cpu_do_unaligned_access, --=20 2.53.0 From nobody Mon Sep 28 00:10:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1787151558; cv=none; d=zohomail.com; s=zohoarc; b=Dq9p9U2jBQJC1/sy4raZiFDBiize8/IPMMZLkoBU1o1JmeJUN9pPQmsHgTrSuWEARqTEr5R/NKa7nA0S07/mJxUJphxE54V2P0jK825pErblNzi4TGxmE8DQh5+FQC8T5lAXTctJt73RtVuvobh0F+v4SNeHsedcFBp+4cCp14M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787151558; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fAMrmYSOA1vxbvpFqFNukNd1bA7aS0xkji6sTKzScfk=; b=F58FpqVZENLfXt0ZML/MNxxbz08N44YUWABgh4G3ir9fnLgxKHuCruabB62BoWTDT6WGECk1zBZLmUPOd/R0QLAea5z/eoDN7Rcl/1Ye2TSeEQF5JwN4I//S4x3MszzhYIxeDdXDNdH5DAe9ma+GXf6n9u0B8oOil6+eNB7ayHU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1787151558004101.35087470227302; Wed, 19 Aug 2026 07:59:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wwhkx-0001Tg-KE; Wed, 19 Aug 2026 10:59:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhk5-0000Ew-TW for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:58:14 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wwhk3-0000eE-Ik for qemu-devel@nongnu.org; Wed, 19 Aug 2026 10:58:13 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67JEbpMN588463 for ; Wed, 19 Aug 2026 14:58:10 GMT Received: from mail-qk1-f200.google.com (mail-qk1-f200.google.com [209.85.222.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g4yfkbuu6-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Aug 2026 14:58:10 +0000 (GMT) Received: by mail-qk1-f200.google.com with SMTP id af79cd13be357-9309af14fd7so132993285a.1 for ; Wed, 19 Aug 2026 07:58:10 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1787151558729158500 Every target setting the cpu_exec_halt callback alias it to their cpu_has_work() function, making the callback redundant. Call cpu_has_work() directly in accel/tcg/cpu-exec.c cpu_has_work_after_processing_async_events() and remove the boilerplate cpu_exec_halt hook registration. No functional impact expected. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/accel/tcg/cpu-ops.h | 17 ----------------- accel/tcg/cpu-exec.c | 23 ++++++++--------------- target/alpha/cpu.c | 1 - target/avr/cpu.c | 1 - target/hexagon/cpu.c | 1 - target/hppa/cpu.c | 1 - target/loongarch/tcg/tcg_cpu.c | 1 - target/m68k/cpu.c | 1 - target/microblaze/cpu.c | 1 - target/mips/cpu.c | 1 - target/or1k/cpu.c | 1 - target/ppc/cpu_init.c | 1 - target/riscv/tcg/tcg-cpu.c | 1 - target/rx/cpu.c | 1 - target/s390x/cpu.c | 1 - target/sh4/cpu.c | 1 - target/sparc/cpu.c | 1 - target/tricore/cpu.c | 1 - target/xtensa/cpu.c | 1 - 19 files changed, 8 insertions(+), 49 deletions(-) diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index 16c19da997d..a88cc4dc572 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -189,23 +189,6 @@ struct TCGCPUOps { bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); /** @cpu_exec_reset: Callback for reset in cpu_exec. */ void (*cpu_exec_reset)(CPUState *cpu); - /** - * @cpu_exec_halt: Callback for handling halt in cpu_exec. - * - * The target CPU should do any special processing here that it needs - * to do when the CPU is in the halted state. - * - * Return true to indicate that the CPU should now leave halt, false - * if it should remain in the halted state. (This should generally - * be the same value that cpu_has_work() would return.) - * - * Either %transition_halt_to_exec() or this method must be provided. - * If the target does not need to - * do anything special for halt, the same function used for its - * SysemuCPUOps::has_work method can be used here, as they have the - * same function signature. - */ - bool (*cpu_exec_halt)(CPUState *cpu); /** * @tlb_fill_align: Handle a softmmu tlb miss * @cpu: cpu context diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 54561ed31c1..bfdc42ab6a0 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -48,7 +48,6 @@ #include "internal-common.h" #if !defined(CONFIG_USER_ONLY) #include "accel/tcg/iommu.h" -#include "hw/core/sysemu-cpu-ops.h" #endif =20 /* -icount align implementation. */ @@ -659,21 +658,16 @@ static bool cpu_has_work_after_processing_async_event= s(CPUState *cpu) { const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; =20 + if (tcg_ops->process_async_events) { + tcg_ops->process_async_events(cpu); + } + + if (!cpu_has_work(cpu)) { + return false; + } + if (tcg_ops->transition_halt_to_exec) { - assert(!tcg_ops->cpu_exec_halt); - if (tcg_ops->process_async_events) { - tcg_ops->process_async_events(cpu); - } - if (!cpu_has_work(cpu)) { - return false; - } tcg_ops->transition_halt_to_exec(cpu); - } else { - assert(!tcg_ops->process_async_events); - assert(cpu->cc->sysemu_ops->has_work =3D=3D tcg_ops->cpu_exec_halt= ); - if (!tcg_ops->cpu_exec_halt(cpu)) { - return false; - } } =20 cpu->halted =3D 0; /* allow execution */ @@ -1072,7 +1066,6 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp) /* Check mandatory TCGCPUOps handlers */ const TCGCPUOps *tcg_ops =3D cpu->cc->tcg_ops; #ifndef CONFIG_USER_ONLY - assert(tcg_ops->cpu_exec_halt || tcg_ops->transition_halt_to_exec); assert(tcg_ops->cpu_exec_interrupt); assert(tcg_ops->cpu_exec_reset); assert(tcg_ops->pointer_wrap); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 12e86021663..7d1d036e1d3 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -265,7 +265,6 @@ static const TCGCPUOps alpha_tcg_ops =3D { .tlb_fill =3D alpha_cpu_tlb_fill, .pointer_wrap =3D cpu_pointer_wrap_notreached, .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt, - .cpu_exec_halt =3D alpha_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D alpha_cpu_do_interrupt, .do_transaction_failed =3D alpha_cpu_do_transaction_failed, diff --git a/target/avr/cpu.c b/target/avr/cpu.c index f8409f32ab9..a01e6fa4751 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -246,7 +246,6 @@ static const TCGCPUOps avr_tcg_ops =3D { .restore_state_to_opc =3D avr_restore_state_to_opc, .mmu_index =3D avr_cpu_mmu_index, .cpu_exec_interrupt =3D avr_cpu_exec_interrupt, - .cpu_exec_halt =3D avr_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .tlb_fill =3D avr_cpu_tlb_fill, .do_interrupt =3D avr_cpu_do_interrupt, diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 7067e5b70f7..9765716b516 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -768,7 +768,6 @@ static const TCGCPUOps hexagon_tcg_ops =3D { .cpu_exec_reset =3D cpu_reset, .tlb_fill =3D hexagon_tlb_fill, .do_unaligned_access =3D hexagon_cpu_do_unaligned_access, - .cpu_exec_halt =3D hexagon_cpu_has_work, .do_interrupt =3D hexagon_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ }; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 07b49e51326..7b1309a7c38 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -270,7 +270,6 @@ static const TCGCPUOps hppa_tcg_ops =3D { .tlb_fill_align =3D hppa_cpu_tlb_fill_align, .pointer_wrap =3D cpu_pointer_wrap_notreached, .cpu_exec_interrupt =3D hppa_cpu_exec_interrupt, - .cpu_exec_halt =3D hppa_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D hppa_cpu_do_interrupt, .do_unaligned_access =3D hppa_cpu_do_unaligned_access, diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index 4b1d44a1644..7ea2a1eb933 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -327,7 +327,6 @@ const TCGCPUOps loongarch_tcg_ops =3D { .tlb_fill =3D loongarch_cpu_tlb_fill, .pointer_wrap =3D loongarch_pointer_wrap, .cpu_exec_interrupt =3D loongarch_cpu_exec_interrupt, - .cpu_exec_halt =3D loongarch_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D loongarch_cpu_do_interrupt, .do_transaction_failed =3D loongarch_cpu_do_transaction_failed, diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index ce2707dee5a..f349013ad41 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -643,7 +643,6 @@ static const TCGCPUOps m68k_tcg_ops =3D { .tlb_fill =3D m68k_cpu_tlb_fill, .pointer_wrap =3D cpu_pointer_wrap_uint32, .cpu_exec_interrupt =3D m68k_cpu_exec_interrupt, - .cpu_exec_halt =3D m68k_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D m68k_cpu_do_interrupt, .do_transaction_failed =3D m68k_cpu_transaction_failed, diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 389a5124b12..6013a8def8e 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -448,7 +448,6 @@ static const TCGCPUOps mb_tcg_ops =3D { .tlb_fill =3D mb_cpu_tlb_fill, .pointer_wrap =3D cpu_pointer_wrap_uint32, .cpu_exec_interrupt =3D mb_cpu_exec_interrupt, - .cpu_exec_halt =3D mb_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D mb_cpu_do_interrupt, .do_transaction_failed =3D mb_cpu_transaction_failed, diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 669c7d99bb7..cebc2283599 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -664,7 +664,6 @@ static const TCGCPUOps mips_tcg_ops =3D { .tlb_fill =3D mips_cpu_tlb_fill, .pointer_wrap =3D mips_pointer_wrap, .cpu_exec_interrupt =3D mips_cpu_exec_interrupt, - .cpu_exec_halt =3D mips_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D mips_cpu_do_interrupt, .do_transaction_failed =3D mips_cpu_do_transaction_failed, diff --git a/target/or1k/cpu.c b/target/or1k/cpu.c index 66c00c0930c..42d9351b6d7 100644 --- a/target/or1k/cpu.c +++ b/target/or1k/cpu.c @@ -266,7 +266,6 @@ static const TCGCPUOps openrisc_tcg_ops =3D { .tlb_fill =3D openrisc_cpu_tlb_fill, .pointer_wrap =3D cpu_pointer_wrap_uint32, .cpu_exec_interrupt =3D openrisc_cpu_exec_interrupt, - .cpu_exec_halt =3D openrisc_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D openrisc_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index e3a1075aad3..85a91ff4bb6 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7498,7 +7498,6 @@ static const TCGCPUOps ppc_tcg_ops =3D { .tlb_fill =3D ppc_cpu_tlb_fill, .pointer_wrap =3D ppc_pointer_wrap, .cpu_exec_interrupt =3D ppc_cpu_exec_interrupt, - .cpu_exec_halt =3D ppc_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D ppc_cpu_do_interrupt, .cpu_exec_enter =3D ppc_cpu_exec_enter, diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 9e3cc87f8a3..cd303660f1f 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -287,7 +287,6 @@ const TCGCPUOps riscv_tcg_ops =3D { .tlb_fill =3D riscv_cpu_tlb_fill, .pointer_wrap =3D riscv_pointer_wrap, .cpu_exec_interrupt =3D riscv_cpu_exec_interrupt, - .cpu_exec_halt =3D riscv_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D riscv_cpu_do_interrupt, .do_transaction_failed =3D riscv_cpu_do_transaction_failed, diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 9b8473d71cf..69946928995 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -227,7 +227,6 @@ static const TCGCPUOps rx_tcg_ops =3D { .pointer_wrap =3D cpu_pointer_wrap_uint32, =20 .cpu_exec_interrupt =3D rx_cpu_exec_interrupt, - .cpu_exec_halt =3D rx_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D rx_cpu_do_interrupt, }; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 641ea96c8ea..efbfb072bbf 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -382,7 +382,6 @@ static const TCGCPUOps s390_tcg_ops =3D { .tlb_fill =3D s390_cpu_tlb_fill, .pointer_wrap =3D s390_pointer_wrap, .cpu_exec_interrupt =3D s390_cpu_exec_interrupt, - .cpu_exec_halt =3D s390_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D s390_cpu_do_interrupt, .debug_excp_handler =3D s390x_cpu_debug_excp_handler, diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index ad2ec28c1b7..8d53e11006d 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -298,7 +298,6 @@ static const TCGCPUOps superh_tcg_ops =3D { .tlb_fill =3D superh_cpu_tlb_fill, .pointer_wrap =3D cpu_pointer_wrap_notreached, .cpu_exec_interrupt =3D superh_cpu_exec_interrupt, - .cpu_exec_halt =3D superh_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D superh_cpu_do_interrupt, .do_unaligned_access =3D superh_cpu_do_unaligned_access, diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 1bc14b586bb..2baa5036871 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -1073,7 +1073,6 @@ static const TCGCPUOps sparc_tcg_ops =3D { .tlb_fill =3D sparc_cpu_tlb_fill, .pointer_wrap =3D sparc_pointer_wrap, .cpu_exec_interrupt =3D sparc_cpu_exec_interrupt, - .cpu_exec_halt =3D sparc_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D sparc_cpu_do_interrupt, .do_transaction_failed =3D sparc_cpu_do_transaction_failed, diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 96e2817dee7..f79d6fe5d5d 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -192,7 +192,6 @@ static const TCGCPUOps tricore_tcg_ops =3D { .tlb_fill =3D tricore_cpu_tlb_fill, .pointer_wrap =3D cpu_pointer_wrap_uint32, .cpu_exec_interrupt =3D tricore_cpu_exec_interrupt, - .cpu_exec_halt =3D tricore_cpu_has_work, .cpu_exec_reset =3D cpu_reset, }; =20 diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 7c25b9ab707..99c8bd4b5fb 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -325,7 +325,6 @@ static const TCGCPUOps xtensa_tcg_ops =3D { .tlb_fill =3D xtensa_cpu_tlb_fill, .pointer_wrap =3D cpu_pointer_wrap_uint32, .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt, - .cpu_exec_halt =3D xtensa_cpu_has_work, .cpu_exec_reset =3D cpu_reset, .do_interrupt =3D xtensa_cpu_do_interrupt, .do_transaction_failed =3D xtensa_cpu_do_transaction_failed, --=20 2.53.0