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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473282541158500 commit 0e86d7a71e8 ("cpus: Cache CPUClass early in instance_init() handler") renamed cpu_exec_realizefn() -> cpu_common_initfn(); update the comment. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/hw/core/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index b54035fb13b..c5064a5449b 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -60,7 +60,7 @@ typedef int (*WriteCoreDumpFunction)(const void *buf, siz= e_t size, * expensive given the eventual call to * object_class_dynamic_cast_assert(). Because of this the CPUState * has a cached value for the class in cs->cc which is set up in - * cpu_exec_realizefn() for use in hot code paths. + * cpu_common_initfn() for use in hot code paths. */ typedef struct CPUClass CPUClass; DECLARE_CLASS_CHECKERS(CPUClass, CPU, --=20 2.53.0 From nobody Wed Aug 26 07:24:39 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1786473329; cv=none; d=zohomail.com; s=zohoarc; b=mEOMBy6ESQgbesB2LwAuWt/HC7gH+W9HoXFxe8AuMDT1lIp2HWqTTF4D+vhKk/ohqLjTqIhUmzodw2oqcEGtp6bY19RRCwNHN/17sjw39iMGJY1xCEMceEheARRcLEAItG+EilCeVGOz0Pnh+abqWxtJ0WWI3KiIabXd78KZaBM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786473329; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=yx5DrvqoVG7WzFuC4QcI2wBJN4WlDhAJMkg2Y1RviQU=; b=BBqQej6ky63kYkiRSjudYNHIk/jeGLgyy7Eie4CrAN7G4gl4JvKM4kPXaK3XK/QNazPeBd7M99fAAm1Zr0K806zygt2xUyi5HdHtk5qlDon7zzAKvwxUOPKPwqt87effVY7V9G2MqGq+kdAlzU9UtVkXjcGw0voZmTo9z3/1GOc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1786473329390496.79925738892507; Tue, 11 Aug 2026 11:35:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wtrJ5-00073L-LP; Tue, 11 Aug 2026 14:34:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJ4-0006zZ-0D for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:34:34 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJ2-0002S1-G3 for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:34:33 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67BGOeEm1170783 for ; Tue, 11 Aug 2026 18:34:29 GMT Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g01nc23en-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 11 Aug 2026 18:34:29 +0000 (GMT) Received: by mail-qv1-f72.google.com with SMTP id 6a1803df08f44-8ef8249f871so1362366d6.0 for ; Tue, 11 Aug 2026 11:34:28 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473330512158500 From: Philippe Mathieu-Daud=C3=A9 cpu_common_realize() calls accel_cpu_common_realize(), itself declared in "qemu/accel.h". Include the latter, otherwise we get when refactoring unrelated headers: hw/core/cpu-common.c:233:10: error: implicit declaration of function =E2= =80=98accel_cpu_common_realize=E2=80=99 233 | if (!accel_cpu_common_realize(cpu, errp)) { | ^~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/core/cpu-common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index e314f916f84..8c9ff25e04a 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -23,6 +23,7 @@ #include "qapi/error.h" #include "hw/core/cpu.h" #include "system/hw_accel.h" +#include "qemu/accel.h" #include "qemu/log.h" #include "qemu/main-loop.h" #include "qemu/lockcnt.h" --=20 2.53.0 From nobody Wed Aug 26 07:24:39 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1786473347; cv=none; d=zohomail.com; s=zohoarc; b=F/nXfBPDebH/WZMKaDRChLEesYXxVe8zDU4xERWpmV2hgVFdB54rssvirH3NDa7iJtZQP+Puy3S3aLZ+EqVk4HxBLMtMVJ+u7XNAaBEGSHVfPmBZvx0WBqx3+Trr3xU8mT30dBqJ7oWbaSCdaI44wLDgSw2Jt0xFdNvkLmMJAkc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786473347; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=g/3XAp8gWD+xk92avLJ9ckLrbA+mG6c0lKgx8FjorAg=; b=R0hdvxkoCatLD2W7OvngOoeZfzspXTCZexOzBZrJ0ysDKdqikKGROFBqIaT9yXoBv/lxuRJn5ce/i+UC41ZdiGh+ogMhIdfXc6fjOxN+9wQtWoY0r4rEDvCeg3gnRY+YsfvmDf9F7MpLZmCtfhYBil1b8wQREEpZAiNUcv3Gwss= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1786473347824249.11030147451754; Tue, 11 Aug 2026 11:35:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wtrJD-0007A4-Dj; Tue, 11 Aug 2026 14:34:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJB-00077f-Qn for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:34:41 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJA-0002Vv-1d for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:34:41 -0400 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67BGNtpn407252 for ; Tue, 11 Aug 2026 18:34:36 GMT Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g049g1jch-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 11 Aug 2026 18:34:36 +0000 (GMT) Received: by mail-qt1-f200.google.com with SMTP id d75a77b69052e-51c1b4d961dso1798531cf.1 for ; Tue, 11 Aug 2026 11:34:36 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473348755158500 Some declarations are only used within hw/core/, in particular by the 3 cpu-{common,user,system}.c. Restrict the declarations scope by moving them to a new "cpu-internal.h" local header. Rename cpu_exec_initfn() -> cpu_exec_init() because we usually have the 'fn' suffix for handler, not API entry point methods. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/core/cpu-internal.h | 22 ++++++++++++++++++++++ include/hw/core/cpu.h | 6 ------ hw/core/cpu-common.c | 3 ++- hw/core/cpu-system.c | 3 ++- hw/core/cpu-user.c | 3 ++- 5 files changed, 28 insertions(+), 9 deletions(-) create mode 100644 hw/core/cpu-internal.h diff --git a/hw/core/cpu-internal.h b/hw/core/cpu-internal.h new file mode 100644 index 00000000000..ae6a31bca2d --- /dev/null +++ b/hw/core/cpu-internal.h @@ -0,0 +1,22 @@ +/* + * QEMU private CPU interface between user / system modes) + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_CORE_CPU_INTERNAL_H +#define HW_CORE_CPU_INTERNAL_H + +#include "hw/core/qdev.h" +#include "hw/core/cpu.h" + +void cpu_class_init_props(DeviceClass *dc); +void cpu_exec_class_post_init(CPUClass *cc); + +void cpu_exec_init(CPUState *cpu); + +void cpu_vmstate_register(CPUState *cpu); +void cpu_vmstate_unregister(CPUState *cpu); + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c5064a5449b..6490fb070f2 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1178,12 +1178,6 @@ G_NORETURN void cpu_abort(CPUState *cpu, const char = *fmt, ...) */ void qemu_process_cpu_events(CPUState *cpu); =20 -/* $(top_srcdir)/cpu.c */ -void cpu_class_init_props(DeviceClass *dc); -void cpu_exec_class_post_init(CPUClass *cc); -void cpu_exec_initfn(CPUState *cpu); -void cpu_vmstate_register(CPUState *cpu); -void cpu_vmstate_unregister(CPUState *cpu); bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); void cpu_exec_reset_hold(CPUState *cpu); diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 8c9ff25e04a..17d76580930 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -39,6 +39,7 @@ #ifdef CONFIG_PLUGIN #include "qemu/plugin.h" #endif +#include "cpu-internal.h" =20 CPUState *cpu_by_arch_id(int64_t id) { @@ -326,7 +327,7 @@ static void cpu_common_initfn(Object *obj) QTAILQ_INIT(&cpu->breakpoints); QTAILQ_INIT(&cpu->watchpoints); =20 - cpu_exec_initfn(cpu); + cpu_exec_init(cpu); =20 /* * Plugin initialization must wait until the cpu start executing diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 14eb4ed87f8..8a9f2fcea84 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -30,6 +30,7 @@ #include "hw/core/sysemu-cpu-ops.h" #include "migration/vmstate.h" #include "system/tcg.h" +#include "cpu-internal.h" =20 bool cpu_has_work(CPUState *cpu) { @@ -188,7 +189,7 @@ void cpu_exec_class_post_init(CPUClass *cc) g_assert(cc->sysemu_ops->has_work); } =20 -void cpu_exec_initfn(CPUState *cpu) +void cpu_exec_init(CPUState *cpu) { cpu->memory =3D get_system_memory(); object_ref(OBJECT(cpu->memory)); diff --git a/hw/core/cpu-user.c b/hw/core/cpu-user.c index 25aa25ad240..c2cb00a85d3 100644 --- a/hw/core/cpu-user.c +++ b/hw/core/cpu-user.c @@ -11,6 +11,7 @@ #include "hw/core/qdev-properties.h" #include "hw/core/cpu.h" #include "migration/vmstate.h" +#include "cpu-internal.h" =20 static const Property cpu_user_props[] =3D { /* @@ -32,7 +33,7 @@ void cpu_exec_class_post_init(CPUClass *cc) /* nothing to do */ } =20 -void cpu_exec_initfn(CPUState *cpu) +void cpu_exec_init(CPUState *cpu) { /* nothing to do */ } --=20 2.53.0 From nobody Wed Aug 26 07:24:39 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473364713158500 Keep cpu_common_*() pattern for publicly exposed common methods used by target code. Use cpu_exec_*() pattern for internal ones, mostly to distinct between system / user mode. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/core/cpu-common.c | 4 ++-- target/i386/kvm/kvm-cpu.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 17d76580930..33e349d4402 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -246,7 +246,7 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp) return true; } =20 -static void cpu_common_realizefn(DeviceState *dev, Error **errp) +static void cpu_exec_realize(DeviceState *dev, Error **errp) { CPUState *cpu =3D CPU(dev); Object *machine =3D qdev_get_machine(); @@ -379,7 +379,7 @@ static void cpu_common_class_init(ObjectClass *klass, c= onst void *data) k->gdb_read_register =3D cpu_common_gdb_read_register; k->gdb_write_register =3D cpu_common_gdb_write_register; set_bit(DEVICE_CATEGORY_CPU, dc->categories); - dc->realize =3D cpu_common_realizefn; + dc->realize =3D cpu_exec_realize; dc->unrealize =3D cpu_common_unrealizefn; rc->phases.hold =3D cpu_common_reset_hold; rc->phases.exit =3D cpu_common_reset_exit; diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index c34d9f15c7e..e164cef2036 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -63,7 +63,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * host_cpu_realizefn() * kvm_set_guest_phys_bits() * check/update ucode_rev, phys_bits, guest_phys_bits, mwait - * cpu_common_realizefn() (via xcc->parent_realize) + * cpu_exec_realize() (via xcc->parent_realize) */ if (xcc->max_features) { if (enable_cpu_pm) { --=20 2.53.0 From nobody Wed Aug 26 07:24:39 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1786473336; cv=none; d=zohomail.com; s=zohoarc; b=Qle185SmczkPa2e8OlFebDkDf2wUR9DD3ComNmn4bQbfDtXzKWv0nt0/Kmys/HvX75MiyYep7gIcreA4HX6HMXrx84qcmny1BgBs/iM29MMCsCRlzfDRSneL743w2AfjnJZuGrAeZcJtKOehnBInEt/86BU3yeA+dFo59HziDhc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786473336; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=5h3eobnHT1X8C7Hj3fqDLl59b1w5d8j9Pcc2IV1gHOo=; b=gGb4h6GhMsI9Nkj4/GZ8jMOdL0bZp77tYaU4pNx0D21EOb0Hk/2wN9KXH4XzkMN2FTIwWV55rZfLt44G17Nq05OI/TkOjKAVgPgIh0bPhUXkOnjhqmhlDxhNaLouEhcHVN8hPm61QCX3NkuielwEN+ckF3hfQgKuGfBmZhrZJvQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1786473336250542.9851341328824; Tue, 11 Aug 2026 11:35:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wtrJm-0007oT-UA; Tue, 11 Aug 2026 14:35:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJc-0007V7-AH for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:35:11 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJW-0002Yp-8r for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:35:08 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67BGO5461169712 for ; Tue, 11 Aug 2026 18:34:51 GMT Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g01nc23g5-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 11 Aug 2026 18:34:51 +0000 (GMT) Received: by mail-qt1-f200.google.com with SMTP id d75a77b69052e-52ce3c7cb2eso3235771cf.3 for ; Tue, 11 Aug 2026 11:34:51 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473336552158500 From: Philippe Mathieu-Daud=C3=A9 Keep cpu_common_*() pattern for publicly exposed common methods used by target code. Use cpu_exec_*() pattern for internal ones, mostly to distinct between system / user mode. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/hw/core/cpu.h | 3 ++- hw/core/cpu-common.c | 2 +- target/alpha/cpu.c | 2 +- target/arm/cpu.c | 2 +- target/avr/cpu.c | 2 +- target/hexagon/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/i386/cpu.c | 10 +++++----- target/i386/kvm/kvm-cpu.c | 2 +- target/loongarch/cpu.c | 2 +- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/cpu.c | 2 +- target/or1k/cpu.c | 2 +- target/ppc/cpu_init.c | 2 +- target/riscv/cpu.c | 2 +- target/riscv/kvm/kvm-cpu.c | 2 +- target/riscv/tcg/tcg-cpu.c | 2 +- target/rx/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sh4/cpu.c | 2 +- target/sparc/cpu.c | 2 +- target/tricore/cpu.c | 2 +- target/xtensa/cpu.c | 2 +- 24 files changed, 29 insertions(+), 28 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 6490fb070f2..7b7cf330cde 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1178,7 +1178,8 @@ G_NORETURN void cpu_abort(CPUState *cpu, const char *= fmt, ...) */ void qemu_process_cpu_events(CPUState *cpu); =20 -bool cpu_exec_realizefn(CPUState *cpu, Error **errp); +/** cpu_common_realize: CPU DeviceRealize common handler */ +bool cpu_common_realize(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); void cpu_exec_reset_hold(CPUState *cpu); =20 diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 33e349d4402..732e32fade2 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -230,7 +230,7 @@ const char *parse_cpu_option(const char *cpu_option) return cpu_type; } =20 -bool cpu_exec_realizefn(CPUState *cpu, Error **errp) +bool cpu_common_realize(CPUState *cpu, Error **errp) { if (!accel_cpu_common_realize(cpu, errp)) { return false; diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 0c35067b202..12e86021663 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -117,7 +117,7 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error= **errp) cs->tcg_cflags |=3D CF_PCREL; #endif =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 787e4dc7ab2..77aa78f00e2 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1891,7 +1891,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) } #endif =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 35912192126..f8409f32ab9 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -131,7 +131,7 @@ static void avr_cpu_realizefn(DeviceState *dev, Error *= *errp) AVRCPUClass *mcc =3D AVR_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 12d27ce1381..8e3b900e8d9 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -450,7 +450,7 @@ static void hexagon_cpu_realize(DeviceState *dev, Error= **errp) HexagonCPUClass *mcc =3D HEXAGON_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index a68152f9682..07b49e51326 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -181,7 +181,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error = **errp) HPPACPUClass *acc =3D HPPA_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5805d33ab92..9b2aa178062 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -10164,7 +10164,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Err= or **errp) * These may be set by the accel-specific code, * and the results are subsequently checked / assumed in this function. */ - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; @@ -10179,7 +10179,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Err= or **errp) if (cpu->guest_phys_bits =3D=3D -1) { /* * If it was not set by the user, or by the accelerator via - * cpu_exec_realizefn, clear. + * cpu_common_realize, clear. */ cpu->guest_phys_bits =3D 0; } @@ -10188,7 +10188,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Err= or **errp) /* * The default is the same as KVM's. Note that this check * needs to happen after the evenual setting of ucode_rev in - * accel-specific code in cpu_exec_realizefn. + * accel-specific code in cpu_common_realize. */ if (IS_AMD_CPU(env)) { cpu->ucode_rev =3D 0x01000065; @@ -10201,7 +10201,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Err= or **errp) * mwait extended info: needed for Core compatibility * We always wake on interrupt even if host does not have the capabili= ty. * - * requires the accel-specific code in cpu_exec_realizefn to + * requires the accel-specific code in cpu_common_realize to * have already acquired the CPUID data into cpu->mwait. */ cpu->mwait.ecx |=3D CPUID_MWAIT_EMX | CPUID_MWAIT_IBE; @@ -10230,7 +10230,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Err= or **errp) * Note that this code assumes features expansion has already been done * (as it checks for CPUID_EXT2_LM), and also assumes that potential * phys_bits adjustments to match the host have been already done in - * accel-specific code in cpu_exec_realizefn. + * accel-specific code in cpu_common_realize. */ if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { if (cpu->phys_bits && cpu->phys_bits < 32) { diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index e164cef2036..da8d77ade06 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -57,7 +57,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * * x86_cpu_realizefn(): * x86_cpu_expand_features() - * cpu_exec_realizefn(): + * cpu_common_realize(): * accel_cpu_common_realize() * kvm_cpu_realizefn() * host_cpu_realizefn() diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index fb03424ffa8..cb07f15110f 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -704,7 +704,7 @@ static void loongarch_cpu_realizefn(DeviceState *dev, E= rror **errp) LoongArchCPUClass *lacc =3D LOONGARCH_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 9ad3057d91c..ce2707dee5a 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -389,7 +389,7 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error = **errp) =20 register_m68k_insns(&cpu->env); =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index a97c92a7b68..389a5124b12 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -251,7 +251,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **= errp) int i =3D 0; Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index d72044aef61..669c7d99bb7 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -544,7 +544,7 @@ static void mips_cpu_realizefn(DeviceState *dev, Error = **errp) } mips_cp0_period_set(cpu); =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/or1k/cpu.c b/target/or1k/cpu.c index ea29b2e01fa..66c00c0930c 100644 --- a/target/or1k/cpu.c +++ b/target/or1k/cpu.c @@ -170,7 +170,7 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Er= ror **errp) OpenRISCCPUClass *occ =3D OPENRISC_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index f404c7e549d..b07e9c3ff9c 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6921,7 +6921,7 @@ static void ppc_cpu_realize(DeviceState *dev, Error *= *errp) PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 5a82e6563bf..23b5023dd37 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1226,7 +1226,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error= **errp) RISCVCPUClass *mcc =3D RISCV_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 495cb42dc89..97069bf597a 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -2006,7 +2006,7 @@ static void kvm_cpu_instance_init(CPUState *cs) * We'll get here via the following path: * * riscv_cpu_realize() - * -> cpu_exec_realizefn() + * -> cpu_common_realize() * -> kvm_cpu_realize() (via accel_cpu_common_realize()) */ static bool kvm_cpu_realize(CPUState *cs, Error **errp) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 4af5cd9c731..9e3cc87f8a3 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -1304,7 +1304,7 @@ static void riscv_cpu_set_profile(RISCVCPU *cpu, * We'll get here via the following path: * * riscv_cpu_realize() - * -> cpu_exec_realizefn() + * -> cpu_common_realize() * -> tcg_cpu_realize() (via accel_cpu_common_realize()) */ static bool riscv_tcg_cpu_realize(CPUState *cs, Error **errp) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 20b188c24cd..9b8473d71cf 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -147,7 +147,7 @@ static void rx_cpu_realize(DeviceState *dev, Error **er= rp) RXCPUClass *rcc =3D RX_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index c074e12ba2d..641ea96c8ea 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -249,7 +249,7 @@ static void s390_cpu_realizefn(DeviceState *dev, Error = **errp) } #endif =20 - cpu_exec_realizefn(cs, &err); + cpu_common_realize(cs, &err); if (err !=3D NULL) { goto out; } diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 763424695c6..ad2ec28c1b7 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -250,7 +250,7 @@ static void superh_cpu_realizefn(DeviceState *dev, Erro= r **errp) SuperHCPUClass *scc =3D SUPERH_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 13ebb122a38..1bc14b586bb 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -892,7 +892,7 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error= **errp) /* Default NaN value: sign bit clear, all frac bits set */ set_float_default_nan_pattern(0b01111111, &env->fp_status); =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 472c24ae32d..96e2817dee7 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -99,7 +99,7 @@ static void tricore_cpu_realizefn(DeviceState *dev, Error= **errp) CPUTriCoreState *env =3D &cpu->env; Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); return; diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 2015a4e3d0d..7c25b9ab707 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -257,7 +257,7 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Erro= r **errp) xtensa_irq_init(&XTENSA_CPU(dev)->env); #endif =20 - cpu_exec_realizefn(cs, &local_err); + cpu_common_realize(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473417674158500 Keep cpu_common_*() pattern for publicly exposed common methods used by target code. Use cpu_exec_*() pattern for internal ones, mostly to distinct between system / user mode. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/hw/core/cpu.h | 4 +++- hw/core/cpu-common.c | 4 ++-- target/ppc/cpu_init.c | 2 +- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 7b7cf330cde..81af7b9ee1a 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1180,7 +1180,9 @@ void qemu_process_cpu_events(CPUState *cpu); =20 /** cpu_common_realize: CPU DeviceRealize common handler */ bool cpu_common_realize(CPUState *cpu, Error **errp); -void cpu_exec_unrealizefn(CPUState *cpu); +/** cpu_common_realize: CPU DeviceUnrealize common handler */ +void cpu_common_unrealize(CPUState *cpu); + void cpu_exec_reset_hold(CPUState *cpu); =20 extern const VMStateDescription vmstate_cpu_common; diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 732e32fade2..59cd489b713 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -284,10 +284,10 @@ static void cpu_common_unrealizefn(DeviceState *dev) #endif =20 /* NOTE: latest generic point before the cpu is fully unrealized */ - cpu_exec_unrealizefn(cpu); + cpu_common_unrealize(cpu); } =20 -void cpu_exec_unrealizefn(CPUState *cpu) +void cpu_common_unrealize(CPUState *cpu) { cpu_vmstate_unregister(cpu); =20 diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index b07e9c3ff9c..e3a1075aad3 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6956,7 +6956,7 @@ static void ppc_cpu_realize(DeviceState *dev, Error *= *errp) return; =20 unrealize: - cpu_exec_unrealizefn(cs); + cpu_common_unrealize(cs); } =20 static void ppc_cpu_unrealize(DeviceState *dev) --=20 2.53.0 From nobody Wed Aug 26 07:24:39 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1786473422; cv=none; d=zohomail.com; s=zohoarc; b=Gn14a2OFJ1QXI+5POJtFE9g4b7pKd8PxDXXDhYpkgzfShs0QbHBF+ziWUO2xDViKKTdgbnyjjWaBJ6p/Dk4fXqwGve5357XmLo2VcTqceqDk/z9WRyxihUpJZpeYO2XhVaTQWn23dxfi4QGxWrGJ3b7l9M7weopKLjMPhgdQw30= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786473422; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=x6PMGt4n5YI3CyMrkjq/xqLMZCyo+mWskjfZ5KgT8eQ=; b=GysaLohYMHnqjkjWXSr6ZoIwbbp8L5NFmdDiCswW/B7M9trGqWK81Svi3HRuaQB0deRxJZERlbbnBYz6VXtDJQwC1Yn74HLVXMP/XQ6S9oPhJqybWPmQGVqdsqB9uj3uYaZlYWYDfem+opAf2WZ/Mzhemvmfh2XbjJ93wSV33NA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1786473422344801.5312028828636; Tue, 11 Aug 2026 11:37:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wtrJr-00086t-Fg; Tue, 11 Aug 2026 14:35:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJn-0007rO-Fj for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:35:19 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJl-0002c3-Nn for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:35:19 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67BGO54i1169665 for ; Tue, 11 Aug 2026 18:35:05 GMT Received: from mail-qv1-f70.google.com (mail-qv1-f70.google.com [209.85.219.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g01nc23hg-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 11 Aug 2026 18:35:05 +0000 (GMT) Received: by mail-qv1-f70.google.com with SMTP id 6a1803df08f44-8f39a46efd9so13214896d6.1 for ; Tue, 11 Aug 2026 11:35:05 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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Tue, 11 Aug 2026 11:35:04 -0700 (PDT) X-Received: by 2002:a05:622a:2505:b0:51b:f992:9e18 with SMTP id d75a77b69052e-52d601b392cmr30484861cf.2.1786473304627; Tue, 11 Aug 2026 11:35:04 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-ppc@nongnu.org, Pierrick Bouvier , qemu-arm@nongnu.org, qemu-s390x@nongnu.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org Subject: [PATCH 7/8] hw/cpu: Extract cpu_exec_realize() out of cpu_common_realizefn() Date: Tue, 11 Aug 2026 20:34:09 +0200 Message-ID: <20260811183410.22428-8-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260811183410.22428-1-philmd@oss.qualcomm.com> References: <20260811183410.22428-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Info: AW1haW4tMjYwODExMDE1NSBTYWx0ZWRfX2IB74Q0zoAJc FqviMk/O7nWjxH5qfq60vFQddQuJDnIxIs9/JL3Peg/QqAy1KQl3JSxgzQBY6Zau9e7tHpB9Sgb 1uEOULlRCiV5s1XZiNIzLsWz562WD9s= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODExMDE1NSBTYWx0ZWRfX2C5z6XyvrsFa /vpAhmcjJ397NkF+XKGiepaD2Ti3eRNauFtg4FnMAoURSQ46zXX7vpWBtaesfHdiP2LlNFJaKUw 9/O9LBe227mFdI37AAldfpQzs8YxwxlQSbW3/TaSL9QxF6jBwTp7yZ6rEaS0bPjPlUTqUw1uczr I1TNa0VB6vLlZOIlTtiHjI8PI7LIUCbMqy74y9oRKheCAlU955f8nwjWa4NK9f9m5T4AnNDp9ps HcbCgVTMqxajRoTRrdb1J7uQLTB2JYu4xtECDGWCNnP56SYQt6wIwTMIGnnnlqIVy0WBbel9Ebw +GBeOR4o/F61FZMyWO9Nc9nwmaAteZ0nvIVeZWq9lwfFLxXmeJ+cQeXOrRRxFn03s4CVeKH8Qfp 0tqmAk/QmiG+uaq7LsDGoyars3ScNmRv+XITikjrLhLHAU0gM14VSlM1gQdgvyLANm37znAKy61 vhkdFl1JZsEVzo6lvaQ== X-Authority-Analysis: v=2.4 cv=RY6gzVtv c=1 sm=1 tr=0 ts=6a7b6b59 cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=3ZqzEhZVOs4yraokUgkA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-ORIG-GUID: sEwSam9xDIJ-FKYv_WhB_HCq4XUoeirM X-Proofpoint-GUID: sEwSam9xDIJ-FKYv_WhB_HCq4XUoeirM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-11_04,2026-08-10_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 spamscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608110155 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473423042158500 cpu_common_realizefn() contains code only used by system mode emulation. Extract it to a new cpu_exec_realize() helper. In the next commit this helper will be moved to cpu-system.c where it belongs. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/core/cpu-common.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 59cd489b713..cd7c8763cf5 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -246,9 +246,8 @@ bool cpu_common_realize(CPUState *cpu, Error **errp) return true; } =20 -static void cpu_exec_realize(DeviceState *dev, Error **errp) +static void cpu_exec_realize(CPUState *cpu, Error **errp) { - CPUState *cpu =3D CPU(dev); Object *machine =3D qdev_get_machine(); =20 /* qdev_get_machine() can return something that's not TYPE_MACHINE @@ -264,10 +263,15 @@ static void cpu_exec_realize(DeviceState *dev, Error = **errp) } } =20 - if (dev->hotplugged) { + if (DEVICE(cpu)->hotplugged) { cpu_synchronize_post_init(cpu); cpu_resume(cpu); } +} + +static void cpu_common_realizefn(DeviceState *dev, Error **errp) +{ + cpu_exec_realize(CPU(dev), errp); =20 /* NOTE: latest generic point where the cpu is fully realized */ } @@ -379,7 +383,7 @@ static void cpu_common_class_init(ObjectClass *klass, c= onst void *data) k->gdb_read_register =3D cpu_common_gdb_read_register; k->gdb_write_register =3D cpu_common_gdb_write_register; set_bit(DEVICE_CATEGORY_CPU, dc->categories); - dc->realize =3D cpu_exec_realize; + dc->realize =3D cpu_common_realizefn; dc->unrealize =3D cpu_common_unrealizefn; rc->phases.hold =3D cpu_common_reset_hold; rc->phases.exit =3D cpu_common_reset_exit; --=20 2.53.0 From nobody Wed Aug 26 07:24:39 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1786473365; cv=none; d=zohomail.com; s=zohoarc; b=J3WKj9dlRzNiCBiu1rSrooJ0iSGvEcBk84bWiHU/Nt2GPtD/FX48ouLd4Yj0B1oMQN2hFQaRb2habP5rq3vI6zpS9pu+fsNzaggrT596Y3h0RIVbUfgtkLOV7UmgJUjM6xsAMxitnr86WEfck9Q6jM5kkw/CC/teAr8uRqwaGRQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786473365; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=5cKNYN1YVV/K1jHg9iJCW7yGQ3ybLzpVvQJS3M//mQs=; b=ZO6mS9ilDKw5ZDYXSAGOXfy4yne/+Invc7uGyCLrWWC4711Bk9T7WUjFZFQZq1RYbWlhb5g4vG6Shi4WxfQKmocX99apfDRE02MN5ag/mu+7FDOpUjtQo9ZvKEy2w/i/KSJna0ENvScFetMaRFHzz7rgenCJgfSW3bGxzQaxZS0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1786473365388476.7729421497586; Tue, 11 Aug 2026 11:36:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wtrJz-0008Tm-2V; Tue, 11 Aug 2026 14:35:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJx-0008M5-BJ for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:35:29 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wtrJt-0002pR-HQ for qemu-devel@nongnu.org; Tue, 11 Aug 2026 14:35:28 -0400 Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67BGOHx01094027 for ; Tue, 11 Aug 2026 18:35:13 GMT Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g049gsj96-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 11 Aug 2026 18:35:13 +0000 (GMT) Received: by mail-qt1-f199.google.com with SMTP id d75a77b69052e-52d28f8737eso3975301cf.2 for ; Tue, 11 Aug 2026 11:35:13 -0700 (PDT) Received: from localhost.localdomain (pmd666.hd.free.fr. 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Tue, 11 Aug 2026 11:35:12 -0700 (PDT) X-Received: by 2002:ac8:58ca:0:b0:50d:3e1e:7998 with SMTP id d75a77b69052e-52d586946b4mr43852861cf.37.1786473312462; Tue, 11 Aug 2026 11:35:12 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-ppc@nongnu.org, Pierrick Bouvier , qemu-arm@nongnu.org, qemu-s390x@nongnu.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org Subject: [PATCH 8/8] hw/cpu: Move system-specific cpu_exec_realize() to cpu-system.c Date: Tue, 11 Aug 2026 20:34:10 +0200 Message-ID: <20260811183410.22428-9-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260811183410.22428-1-philmd@oss.qualcomm.com> References: <20260811183410.22428-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Info: AW1haW4tMjYwODExMDE1NSBTYWx0ZWRfX8DU+1zSZeWDu 2qSyJrj1erO6TQ5HW1leCHSnVBagppOoQzShzfRQHeadgLunMo0R65malIK2M5kxctQJ1VdG0wH 9vwBOsmMqfHJJpodqD0lxB/RhfEavic= X-Proofpoint-ORIG-GUID: kUYQ07dhi4n7a8a0XV3F4PG72jRI1ldm X-Proofpoint-GUID: kUYQ07dhi4n7a8a0XV3F4PG72jRI1ldm X-Authority-Analysis: v=2.4 cv=cvarVV4i c=1 sm=1 tr=0 ts=6a7b6b61 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=pilchTG5AImVgDdFcq4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODExMDE1NSBTYWx0ZWRfX7VVLHQbhrUsU 0dtfikkfqZAdQ6TZI/F2E+st0s0GXws8FMCFpVriJ0cerxnRf+v+SLoEsC6zocx21mby+2CRkAl HNg4yoyZGcrDEg0SevVwfVS3nDjM9IP2p3nTMcr30TWGgcqrAPpxIMfls7JUcWvEea0MQwhWq3q VhtNsyl8IyuJHSXip93gCS0hVnQv9+TlMaTWUkAfDdTS/vUVibR56rqS3PoX0XVITZjyG5JWCwS +0lx4dUFDZaIVSrPqGooF2nFAxy1FpzBsw7myaBJdElUmaoOQJjDvgIoyaCsEodrC5Pa/dmRG2E cFMbEIzAwM8WqsoHv8PGfR91a/29PjLSn+WwdPi+E2xRiaxTGfhv0x+wk9gURhmWP9GOZtqc0Dv uf0aLO5/IuT35a+4YKmnK61y885PDUm92WDZY5w8YsaNaW1I4CzOjfosS3bjpxzlBApwGZGrL02 RyV0c68XMQnZwIDuf/Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-11_04,2026-08-10_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 lowpriorityscore=0 malwarescore=0 impostorscore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608110155 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1786473366742158500 Current cpu_exec_realize() body only contains system-mode related code. Move that method out of cpu-common.c to cpu-system.c, removing the system / machine mentions in this common file. Add an empty stub for user-mode. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/core/cpu-internal.h | 1 + hw/core/cpu-common.c | 24 ------------------------ hw/core/cpu-system.c | 26 ++++++++++++++++++++++++++ hw/core/cpu-user.c | 5 +++++ 4 files changed, 32 insertions(+), 24 deletions(-) diff --git a/hw/core/cpu-internal.h b/hw/core/cpu-internal.h index ae6a31bca2d..44715b44329 100644 --- a/hw/core/cpu-internal.h +++ b/hw/core/cpu-internal.h @@ -15,6 +15,7 @@ void cpu_class_init_props(DeviceClass *dc); void cpu_exec_class_post_init(CPUClass *cc); =20 void cpu_exec_init(CPUState *cpu); +void cpu_exec_realize(CPUState *cpu, Error **errp); =20 void cpu_vmstate_register(CPUState *cpu); void cpu_vmstate_unregister(CPUState *cpu); diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index cd7c8763cf5..4f4c87f33a0 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -33,7 +33,6 @@ #include "exec/log.h" #include "exec/gdbstub.h" #include "system/tcg.h" -#include "hw/core/boards.h" #include "hw/core/qdev-properties.h" #include "trace.h" #ifdef CONFIG_PLUGIN @@ -246,29 +245,6 @@ bool cpu_common_realize(CPUState *cpu, Error **errp) return true; } =20 -static void cpu_exec_realize(CPUState *cpu, Error **errp) -{ - Object *machine =3D qdev_get_machine(); - - /* qdev_get_machine() can return something that's not TYPE_MACHINE - * if this is one of the user-only emulators; in that case there's - * no need to check the ignore_memory_transaction_failures board flag. - */ - if (object_dynamic_cast(machine, TYPE_MACHINE)) { - MachineClass *mc =3D MACHINE_GET_CLASS(machine); - - if (mc) { - cpu->ignore_memory_transaction_failures =3D - mc->ignore_memory_transaction_failures; - } - } - - if (DEVICE(cpu)->hotplugged) { - cpu_synchronize_post_init(cpu); - cpu_resume(cpu); - } -} - static void cpu_common_realizefn(DeviceState *dev, Error **errp) { cpu_exec_realize(CPU(dev), errp); diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 8a9f2fcea84..feadfb5af00 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -25,10 +25,12 @@ #include "exec/target_page.h" #include "system/memory.h" #include "qemu/target-info.h" +#include "hw/core/boards.h" #include "hw/core/qdev.h" #include "hw/core/qdev-properties.h" #include "hw/core/sysemu-cpu-ops.h" #include "migration/vmstate.h" +#include "system/hw_accel.h" #include "system/tcg.h" #include "cpu-internal.h" =20 @@ -221,6 +223,30 @@ static int cpu_common_pre_load(void *opaque) return 0; } =20 +void cpu_exec_realize(CPUState *cpu, Error **errp) +{ + Object *machine =3D qdev_get_machine(); + + /* qdev_get_machine() can return something that's not TYPE_MACHINE + * if this is one of the user-only emulators; in that case there's + * no need to check the ignore_memory_transaction_failures board flag. + */ + if (object_dynamic_cast(machine, TYPE_MACHINE)) { + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + + if (mc) { + cpu->ignore_memory_transaction_failures =3D + mc->ignore_memory_transaction_failures; + } + } + + if (DEVICE(cpu)->hotplugged) { + cpu_synchronize_post_init(cpu); + cpu_resume(cpu); + } + +} + static bool cpu_common_exception_index_needed(void *opaque) { CPUState *cpu =3D opaque; diff --git a/hw/core/cpu-user.c b/hw/core/cpu-user.c index c2cb00a85d3..1e38c88f9bd 100644 --- a/hw/core/cpu-user.c +++ b/hw/core/cpu-user.c @@ -38,6 +38,11 @@ void cpu_exec_init(CPUState *cpu) /* nothing to do */ } =20 +void cpu_exec_realize(CPUState *cpu, Error **errp) +{ + /* nothing to do */ +} + void cpu_vmstate_register(CPUState *cpu) { assert(qdev_get_vmsd(DEVICE(cpu)) =3D=3D NULL || --=20 2.53.0