From nobody Mon Sep 28 02:05:45 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1785506601; cv=none; d=zohomail.com; s=zohoarc; b=NYxNjeMDJc6Uxn+xk5o/3SRBXDsNNcxXjNTk7mGUc83JaLrywwWYw+eUR7gZuTRkL1QRifASZdMvztosZvqyGLPQYW/4TVKARL297UiXEkKSFXxBqAsQjr+95LqitRE7kpFV4zc9btegEmCru5+SZrjlsq/IrY7Fhc2sl6iszVE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1785506601; h=Content-Transfer-Encoding:Date:Date:From:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=2RJCmAO4TKvr6ySLBrawdAk22w8hQj/etYWWKp9etIs=; b=QMStwRJELlK+pP/THRi+7CzN1sMZhGfhQSBjJqYG5aphyj8fgpNFfjTzEB3prYOmCeVl68wUeAyEdjUzjDgg5CDezfZp/O/C1wA7Bw/QF4DAbYnmk3ry5tF/I9GEGhuX9FZODJ7K0aLQ8pxLKi+BbDEWfjUSKkSAqVhOI6Ye6UA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1785506601164344.2427054990027; Fri, 31 Jul 2026 07:03:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wpnp0-0000Qr-UQ; Fri, 31 Jul 2026 10:02:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wpnoz-0000Pn-SW for qemu-devel@nongnu.org; Fri, 31 Jul 2026 10:02:46 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wpnoy-0008Hd-FE for qemu-devel@nongnu.org; Fri, 31 Jul 2026 10:02:45 -0400 Received: from mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-155-qGYtLPGkNGmju24gjS4fiQ-1; Fri, 31 Jul 2026 10:02:36 -0400 Received: from mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id D9D2319560B9; Fri, 31 Jul 2026 14:02:34 +0000 (UTC) Received: from thuth-p1g4.redhat.com (unknown [10.44.49.110]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 9AB7D1956089; Fri, 31 Jul 2026 14:02:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1785506562; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=2RJCmAO4TKvr6ySLBrawdAk22w8hQj/etYWWKp9etIs=; b=HHtMpDjgX+WqXICpQgpZPA7nAIednb5Ul5Ck95TDk7MvEVa9xW2rGorVvDCDVpM/fViZ7J YhtxmMmKdwjqHmSLqjaEISlbJAjlTqs9/CZq71si63DsdKADzh+NmuHoWS0WqMQjCtWOhy XlndHi8HLko7PYLViAnzOF0K8isMBh4= X-MC-Unique: qGYtLPGkNGmju24gjS4fiQ-1 X-Mimecast-MFC-AGG-ID: qGYtLPGkNGmju24gjS4fiQ_1785506555 From: Thomas Huth To: Alejandro Jimenez , Sairaj Kodilkar , "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , qemu-devel@nongnu.org Subject: [PATCH] hw/i386/amd_iommu: Avoid undefined behavior in amdvi_setevent_bits() Date: Fri, 31 Jul 2026 16:02:29 +0200 Message-ID: <20260731140229.259272-1-thuth@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.58, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1785506602479158500 Content-Type: text/plain; charset="utf-8" From: Thomas Huth The code in amdvi_encode_event() calls amdvi_setevent_bits() with start =3D 64: amdvi_setevent_bits(evt, addr, 64, 64); and amdvi_setevent_bits() then calculates: uint64_t mask =3D MAKE_64BIT_MASK(start, length); but this MAKE_64BIT_MASK() macro shifts a value left by "start" bit positions. Shifting left by more than 63 is undefined behavior and could have unexpected results with different compilers / architectures. Fix it by using "bitpos" instead, which was likely the original intended behavior anyway. (bitpos is calculated as bitpos =3D start % 64). Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3633 Signed-off-by: Thomas Huth Reviewed-by: Alejandro Jimenez --- hw/i386/amd_iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 90252c52af4..578c27ccbef 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -323,7 +323,7 @@ static void amdvi_setevent_bits(uint64_t *buffer, uint6= 4_t value, int start, int length) { int index =3D start / 64, bitpos =3D start % 64; - uint64_t mask =3D MAKE_64BIT_MASK(start, length); + uint64_t mask =3D MAKE_64BIT_MASK(bitpos, length); buffer[index] &=3D ~mask; buffer[index] |=3D (value << bitpos) & mask; } --=20 2.55.0