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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785758260158500 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260423170229.64655-8-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- system/cpus.c | 1 + 1 file changed, 1 insertion(+) diff --git a/system/cpus.c b/system/cpus.c index bded87feb1c..b4c7f94332d 100644 --- a/system/cpus.c +++ b/system/cpus.c @@ -621,6 +621,7 @@ void cpu_pause(CPUState *cpu) =20 void cpu_resume(CPUState *cpu) { + cpu->exception_index =3D -1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785758295158500 From: Philippe Mathieu-Daud=C3=A9 Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020359.18627-2-philmd@oss.qualcomm.com> --- include/system/memory.h | 3 ++- system/physmem.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/system/memory.h b/include/system/memory.h index 9cd17847ab0..3acaa309755 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2850,7 +2850,8 @@ static inline MemoryRegion *address_space_translate(A= ddressSpace *as, * @is_write: indicates the transfer direction * @attrs: memory attributes */ -bool address_space_access_valid(AddressSpace *as, hwaddr addr, hwaddr len, +bool address_space_access_valid(const AddressSpace *as, + hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs); =20 /** diff --git a/system/physmem.c b/system/physmem.c index 7bcbf875736..a0561177afd 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3646,7 +3646,7 @@ static bool flatview_access_valid(FlatView *fv, hwadd= r addr, hwaddr len, return true; } =20 -bool address_space_access_valid(AddressSpace *as, hwaddr addr, +bool address_space_access_valid(const AddressSpace *as, hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs) { --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785756; cv=none; d=zohomail.com; s=zohoarc; b=hz5CSy2S6f9VnmGnHcwB4EaXskJI62N1I8JZl0IqscaPzFdaKh+iGr/mpKwVgj0ACnKDC6EWWZ23Fw3SmGHYPezP0xm5H0YZpMPZIX3hHAJrwHTji3VyicwOY3KEtoGOJYhjD6LAhwnnYI4JRjjCjPrxg3Ro6qGaWH/ViQZDPsg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785756; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=82dFeWG41NySdoeq2EmNII48adA0h4g+cc+/YSVjXaw=; b=G+R22XmmcYZUm6qlRqDgvGuzvnmj6HddwcG21NTqcooPExAsNj0E9rtNJJ5U7iPdHQdfu/HyHItQDAdoXdGob9+dO1u+My7fjxsYXGvKUgfQjID3w5GM8A8GUwThTxp5FV+SF/jWGk0GLtb3PtesU6UTWTlq2zvdfAzPjix2RzY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785756818252.7673665824675; Thu, 18 Jun 2026 05:29:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBrd-0007zL-OS; Thu, 18 Jun 2026 08:28:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBrb-0007yp-DX for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:28:55 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBrZ-0007X1-QN for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:28:55 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArgTX1054960 for ; Thu, 18 Jun 2026 12:28:51 GMT Received: from mail-qv1-f69.google.com (mail-qv1-f69.google.com [209.85.219.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4eux2ccf8c-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:28:51 +0000 (GMT) Received: by mail-qv1-f69.google.com with SMTP id 6a1803df08f44-8cebec24b12so669096d6.3 for ; Thu, 18 Jun 2026 05:28:51 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785758302158500 From: Philippe Mathieu-Daud=C3=A9 Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020359.18627-3-philmd@oss.qualcomm.com> --- system/memory.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/system/memory.c b/system/memory.c index 28807cf0519..93c714104b2 100644 --- a/system/memory.c +++ b/system/memory.c @@ -889,7 +889,8 @@ static void address_space_update_ioeventfds(AddressSpac= e *as) * range `cmr'. Only the part that has intersection of the specified * FlatRange will be sent. */ -static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as, +static void flat_range_coalesced_io_notify(FlatRange *fr, + const AddressSpace *as, CoalescedMemoryRange *cmr, bool= add) { AddrRange tmp; @@ -913,7 +914,7 @@ static void flat_range_coalesced_io_notify(FlatRange *f= r, AddressSpace *as, } } =20 -static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as) +static void flat_range_coalesced_io_del(FlatRange *fr, const AddressSpace = *as) { CoalescedMemoryRange *cmr; =20 @@ -922,7 +923,7 @@ static void flat_range_coalesced_io_del(FlatRange *fr, = AddressSpace *as) } } =20 -static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as) +static void flat_range_coalesced_io_add(FlatRange *fr, const AddressSpace = *as) { MemoryRegion *mr =3D fr->mr; CoalescedMemoryRange *cmr; @@ -940,7 +941,8 @@ static void flat_range_coalesced_io_notify_listener_add_del(FlatRange *fr, MemoryRegionSection *mrs, MemoryListener *listener, - AddressSpace *as, bool add) + const AddressSpace *as, + bool add) { CoalescedMemoryRange *cmr; MemoryRegion *mr =3D fr->mr; --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785760; cv=none; d=zohomail.com; s=zohoarc; b=UuNGbOY0xtd43aVzQHy5mcNmvAYcgGj7pxabDaW4Q/cboky5ncsCNFLOwA41XHmKldjdzUSoXa7U6tklHjKj/qhQShz5TvoINCYNzJA1OhC5zgXobPZeMhk9CdWS3hEDQGkJlXU0iDrHo1YevQXBogKX9wlJTljJ85+nSEBT1m0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785760; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=HDXqqZ40gMOjetGP947qwpAyTFvS5rl4u1GZMvX9fQI=; b=SARWvivIoMDiymD9BPX9FUSwhufdCvaL/UMsOG/kQAH4ZbvxJI/gKRF9mZ9wIhNZ6K42MJcqIWkIcI7XAcI/j9HpXbPFma2t5xQiyC6zviowWTlPFZ5N8vHIgWmIdd8dn8Lk1VLEZJfteACIFVsIvKufMmChF5jCUrFUIb/US0Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785760812819.9487126891792; Thu, 18 Jun 2026 05:29:20 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBrn-0007zu-Oz; Thu, 18 Jun 2026 08:29:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBrm-0007zW-4o for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:06 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBrk-0007Xs-G5 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:05 -0400 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAriIq3763792 for ; Thu, 18 Jun 2026 12:28:58 GMT Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0vk3apu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:28:58 +0000 (GMT) Received: by mail-qv1-f72.google.com with SMTP id 6a1803df08f44-8ccd3213beaso913456d6.0 for ; Thu, 18 Jun 2026 05:28:58 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785761911158500 From: Philippe Mathieu-Daud=C3=A9 Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020359.18627-4-philmd@oss.qualcomm.com> --- include/system/memory.h | 2 +- system/memory.c | 6 +++--- system/physmem.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/system/memory.h b/include/system/memory.h index 3acaa309755..7ecad33130c 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2703,7 +2703,7 @@ void address_space_destroy_free(AddressSpace *as); * * @as: an initialized #AddressSpace */ -void address_space_remove_listeners(AddressSpace *as); +void address_space_remove_listeners(const AddressSpace *as); =20 /** * address_space_rw: read from or write to an address space. diff --git a/system/memory.c b/system/memory.c index 93c714104b2..8436668c181 100644 --- a/system/memory.c +++ b/system/memory.c @@ -3009,7 +3009,7 @@ void memory_global_dirty_log_stop(unsigned int flags) } =20 static void listener_add_address_space(MemoryListener *listener, - AddressSpace *as) + const AddressSpace *as) { unsigned i; FlatView *view; @@ -3074,7 +3074,7 @@ static void listener_add_address_space(MemoryListener= *listener, } =20 static void listener_del_address_space(MemoryListener *listener, - AddressSpace *as) + const AddressSpace *as) { unsigned i; FlatView *view; @@ -3179,7 +3179,7 @@ void memory_listener_unregister(MemoryListener *liste= ner) listener->address_space =3D NULL; } =20 -void address_space_remove_listeners(AddressSpace *as) +void address_space_remove_listeners(const AddressSpace *as) { while (!QTAILQ_EMPTY(&as->listeners)) { memory_listener_unregister(QTAILQ_FIRST(&as->listeners)); diff --git a/system/physmem.c b/system/physmem.c index a0561177afd..e8a2c438c7d 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3565,7 +3565,7 @@ address_space_unregister_map_client_do(AddressSpaceMa= pClient *client) g_free(client); } =20 -static void address_space_notify_map_clients_locked(AddressSpace *as) +static void address_space_notify_map_clients_locked(const AddressSpace *as) { AddressSpaceMapClient *client; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785801909158500 From: Philippe Mathieu-Daud=C3=A9 Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020359.18627-5-philmd@oss.qualcomm.com> --- include/system/memory_cached.h | 2 +- system/physmem.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h index 6eb6179140b..760ecb38c19 100644 --- a/include/system/memory_cached.h +++ b/include/system/memory_cached.h @@ -117,7 +117,7 @@ void address_space_stb_cached(MemoryRegionCache *cache, * are relative to @addr. */ int64_t address_space_cache_init(MemoryRegionCache *cache, - AddressSpace *as, + const AddressSpace *as, hwaddr addr, hwaddr len, bool is_write); diff --git a/system/physmem.c b/system/physmem.c index e8a2c438c7d..b33aa14ab64 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3829,7 +3829,7 @@ void cpu_physical_memory_unmap(void *buffer, hwaddr l= en, #include "memory_ldst.c.inc" =20 int64_t address_space_cache_init(MemoryRegionCache *cache, - AddressSpace *as, + const AddressSpace *as, hwaddr addr, hwaddr len, bool is_write) --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785821; cv=none; d=zohomail.com; s=zohoarc; b=I1hdUfLtRoJT3n3waPKWelEExXCgRFusetoK29VPuUT7z3UeOzOuHUq/ancoHtYJFLu7flIV032+yzhz1CRKtSyldpDdxaHDiorFAsppm5578ecZq5BOK0tLa45oE4GlP8ZlAvl1C5qw3X3zyPV4QIlJX/8aM7b31eOwm/taYHo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785821; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=QT+lpRDehsZI7hXyRu6vmgnawl7vsgjxkM6fKi7YS40=; b=oAg1wolF/Zz9mb9OxCU4w7EykAYmZc5gA58bYrKlPo3la0JH6dZCZWQKqjFH1oGU2MBA+zn5Puv17n9D07DQFXUTY+6tgzJqjdffg95rZshdAH1b8ieD1P1aaSNAiT7LOwYjJUYeenHqtvjml053rcjF7Qo9po6FCKqtH2vrSZs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785821915430.0846622799444; Thu, 18 Jun 2026 05:30:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBry-0008AW-6X; Thu, 18 Jun 2026 08:29:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBrw-00086e-A0 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:17 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBru-0007iK-AX for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:16 -0400 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArfBP936323 for ; Thu, 18 Jun 2026 12:29:13 GMT Received: from mail-ua1-f72.google.com (mail-ua1-f72.google.com [209.85.222.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4euxt5469f-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:29:12 +0000 (GMT) Received: by mail-ua1-f72.google.com with SMTP id a1e0cc1a2514c-963b0a0b727so154236241.1 for ; Thu, 18 Jun 2026 05:29:12 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785822356158500 From: Philippe Mathieu-Daud=C3=A9 Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020359.18627-6-philmd@oss.qualcomm.com> --- include/system/memory.h | 13 +++++++------ system/physmem.c | 14 ++++++++------ 2 files changed, 15 insertions(+), 12 deletions(-) diff --git a/include/system/memory.h b/include/system/memory.h index 7ecad33130c..e143c9c3f39 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2719,7 +2719,7 @@ void address_space_remove_listeners(const AddressSpac= e *as); * @len: the number of bytes to read or write * @is_write: indicates the transfer direction */ -MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, +MemTxResult address_space_rw(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len, bool is_write); =20 @@ -2736,7 +2736,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr= addr, * @buf: buffer with the data transferred * @len: the number of bytes to write */ -MemTxResult address_space_write(AddressSpace *as, hwaddr addr, +MemTxResult address_space_write(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, const void *buf, hwaddr len); =20 @@ -2799,7 +2799,8 @@ MemTxResult address_space_write_rom(AddressSpace *as,= hwaddr addr, #include "system/memory_ldst_phys.h.inc" #endif =20 -void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwadd= r len); +void address_space_flush_icache_range(AddressSpace *as, + hwaddr addr, hwaddr len); =20 /* address_space_get_iotlb_entry: translate an address into an IOTLB * entry. Should be called from an RCU critical section. @@ -2919,7 +2920,7 @@ void address_space_register_map_client(AddressSpace *= as, QEMUBH *bh); void address_space_unregister_map_client(AddressSpace *as, QEMUBH *bh); =20 /* Internal functions, part of the implementation of address_space_read. = */ -MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, +MemTxResult address_space_read_full(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr le= n); MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, void *buf, @@ -2974,7 +2975,7 @@ static inline bool memory_access_is_direct(const Memo= ryRegion *mr, * @len: length of the data transferred */ static inline __attribute__((__always_inline__)) -MemTxResult address_space_read(AddressSpace *as, hwaddr addr, +MemTxResult address_space_read(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len) { @@ -3017,7 +3018,7 @@ MemTxResult address_space_read(AddressSpace *as, hwad= dr addr, * @len: the number of bytes to fill with the constant byte * @attrs: memory transaction attributes */ -MemTxResult address_space_set(AddressSpace *as, hwaddr addr, +MemTxResult address_space_set(const AddressSpace *as, hwaddr addr, uint8_t c, hwaddr len, MemTxAttrs attrs); =20 /* Coalesced MMIO regions are areas where write operations can be reordere= d. diff --git a/system/physmem.c b/system/physmem.c index b33aa14ab64..7ea65395863 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3416,7 +3416,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr= addr, mr_addr, l, mr); } =20 -MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, +MemTxResult address_space_read_full(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr le= n) { MemTxResult result =3D MEMTX_OK; @@ -3431,7 +3431,7 @@ MemTxResult address_space_read_full(AddressSpace *as,= hwaddr addr, return result; } =20 -MemTxResult address_space_write(AddressSpace *as, hwaddr addr, +MemTxResult address_space_write(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, const void *buf, hwaddr len) { @@ -3447,8 +3447,9 @@ MemTxResult address_space_write(AddressSpace *as, hwa= ddr addr, return result; } =20 -MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs att= rs, - void *buf, hwaddr len, bool is_write) +MemTxResult address_space_rw(const AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, void *buf, + hwaddr len, bool is_write) { if (is_write) { return address_space_write(as, addr, attrs, buf, len); @@ -3457,7 +3458,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr= addr, MemTxAttrs attrs, } } =20 -MemTxResult address_space_set(AddressSpace *as, hwaddr addr, +MemTxResult address_space_set(const AddressSpace *as, hwaddr addr, uint8_t c, hwaddr len, MemTxAttrs attrs) { #define FILLBUF_SIZE 512 @@ -3514,7 +3515,8 @@ MemTxResult address_space_write_rom(AddressSpace *as,= hwaddr addr, return MEMTX_OK; } =20 -void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwadd= r len) +void address_space_flush_icache_range(AddressSpace *as, + hwaddr addr, hwaddr len) { /* * This function should do the same thing as an icache flush that was --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785800407158500 From: Philippe Mathieu-Daud=C3=A9 Mark the MemoryRegionCache structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020359.18627-7-philmd@oss.qualcomm.com> --- include/system/memory_cached.h | 18 +++++++++--------- include/system/memory_ldst_cached.h.inc | 15 +++++++++------ system/physmem.c | 10 +++++----- 3 files changed, 23 insertions(+), 20 deletions(-) diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h index 760ecb38c19..09d46821bec 100644 --- a/include/system/memory_cached.h +++ b/include/system/memory_cached.h @@ -51,12 +51,12 @@ struct MemoryRegionCache { =20 #define SUFFIX _cached_slow #define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache +#define ARG1_DECL const MemoryRegionCache *cache #include "system/memory_ldst.h.inc" =20 /* Inline fast path for direct RAM access. */ static inline -uint8_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr, +uint8_t address_space_ldub_cached(const MemoryRegionCache *cache, hwaddr a= ddr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len); @@ -68,7 +68,7 @@ uint8_t address_space_ldub_cached(MemoryRegionCache *cach= e, hwaddr addr, } =20 static inline -void address_space_stb_cached(MemoryRegionCache *cache, +void address_space_stb_cached(const MemoryRegionCache *cache, hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result) { @@ -93,7 +93,7 @@ void address_space_stb_cached(MemoryRegionCache *cache, =20 #define SUFFIX _cached #define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache +#define ARG1_DECL const MemoryRegionCache *cache #include "system/memory_ldst_phys.h.inc" =20 /** @@ -145,7 +145,7 @@ static inline void address_space_cache_init_empty(Memor= yRegionCache *cache) * address that was passed to @address_space_cache_init. * @access_len: The number of bytes that were written starting at @addr. */ -void address_space_cache_invalidate(MemoryRegionCache *cache, +void address_space_cache_invalidate(const MemoryRegionCache *cache, hwaddr addr, hwaddr access_len); =20 @@ -160,9 +160,9 @@ void address_space_cache_destroy(MemoryRegionCache *cac= he); * Internal functions, part of the implementation of address_space_read_ca= ched * and address_space_write_cached. */ -MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache, +MemTxResult address_space_read_cached_slow(const MemoryRegionCache *cache, hwaddr addr, void *buf, hwaddr = len); -MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache, +MemTxResult address_space_write_cached_slow(const MemoryRegionCache *cache, hwaddr addr, const void *buf, hwaddr len); =20 @@ -175,7 +175,7 @@ MemTxResult address_space_write_cached_slow(MemoryRegio= nCache *cache, * @len: length of the data transferred */ static inline MemTxResult -address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, +address_space_read_cached(const MemoryRegionCache *cache, hwaddr addr, void *buf, hwaddr len) { assert(addr < cache->len && len <=3D cache->len - addr); @@ -197,7 +197,7 @@ address_space_read_cached(MemoryRegionCache *cache, hwa= ddr addr, * @len: length of the data transferred */ static inline MemTxResult -address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, +address_space_write_cached(const MemoryRegionCache *cache, hwaddr addr, const void *buf, hwaddr len) { assert(addr < cache->len && len <=3D cache->len - addr); diff --git a/include/system/memory_ldst_cached.h.inc b/include/system/memor= y_ldst_cached.h.inc index d7834f852c4..b4c696bff1f 100644 --- a/include/system/memory_ldst_cached.h.inc +++ b/include/system/memory_ldst_cached.h.inc @@ -24,7 +24,8 @@ #define LD_P(size) \ glue(glue(ld, size), glue(ENDIANNESS, _p)) =20 -static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cach= e, +static inline +uint16_t ADDRESS_SPACE_LD_CACHED(uw)(const MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 2 <=3D cache->len - addr); @@ -36,7 +37,8 @@ static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(Memory= RegionCache *cache, } } =20 -static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache, +static inline +uint32_t ADDRESS_SPACE_LD_CACHED(l)(const MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 4 <=3D cache->len - addr); @@ -48,7 +50,8 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryR= egionCache *cache, } } =20 -static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache, +static inline +uint64_t ADDRESS_SPACE_LD_CACHED(q)(const MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 8 <=3D cache->len - addr); @@ -71,7 +74,7 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryR= egionCache *cache, #define ST_P(size) \ glue(glue(st, size), glue(ENDIANNESS, _p)) =20 -static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(w)(const MemoryRegionCache *cac= he, hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 2 <=3D cache->len - addr); @@ -82,7 +85,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegio= nCache *cache, } } =20 -static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(l)(const MemoryRegionCache *cac= he, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 4 <=3D cache->len - addr); @@ -93,7 +96,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegio= nCache *cache, } } =20 -static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(q)(const MemoryRegionCache *cac= he, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 8 <=3D cache->len - addr); diff --git a/system/physmem.c b/system/physmem.c index 7ea65395863..9b3f461b123 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3878,7 +3878,7 @@ int64_t address_space_cache_init(MemoryRegionCache *c= ache, return l; } =20 -void address_space_cache_invalidate(MemoryRegionCache *cache, +void address_space_cache_invalidate(const MemoryRegionCache *cache, hwaddr addr, hwaddr access_len) { @@ -3909,7 +3909,7 @@ void address_space_cache_destroy(MemoryRegionCache *c= ache) * address_space_cache_init. */ static inline MemoryRegion *address_space_translate_cached( - MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat, + const MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat, hwaddr *plen, bool is_write, MemTxAttrs attrs) { MemoryRegionSection section; @@ -3990,7 +3990,7 @@ static MemTxResult address_space_read_continue_cached= (MemTxAttrs attrs, * out of line function when the target is an MMIO or IOMMU region. */ MemTxResult -address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr, +address_space_read_cached_slow(const MemoryRegionCache *cache, hwaddr addr, void *buf, hwaddr len) { hwaddr mr_addr, l; @@ -4007,7 +4007,7 @@ address_space_read_cached_slow(MemoryRegionCache *cac= he, hwaddr addr, * out of line function when the target is an MMIO or IOMMU region. */ MemTxResult -address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, +address_space_write_cached_slow(const MemoryRegionCache *cache, hwaddr add= r, const void *buf, hwaddr len) { hwaddr mr_addr, l; @@ -4020,7 +4020,7 @@ address_space_write_cached_slow(MemoryRegionCache *ca= che, hwaddr addr, buf, len, mr_addr, l, mr); } =20 -#define ARG1_DECL MemoryRegionCache *cache +#define ARG1_DECL const MemoryRegionCache *cache #define ARG1 cache #define SUFFIX _cached_slow #define TRANSLATE(...) address_space_translate_cached(cache, __V= A_ARGS__) --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786098507158500 Document the following methods use the global address space and discard success/failure access information: - cpu_physical_memory_read() - cpu_physical_memory_write() - cpu_physical_memory_map() - cpu_physical_memory_unmap() Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020839.19104-2-philmd@oss.qualcomm.com> --- docs/devel/loads-stores.rst | 10 +++++---- include/exec/cpu-common.h | 41 +++++++++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+), 4 deletions(-) diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index c719241a7f5..f2c66e44454 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -443,15 +443,17 @@ Regexes for git grep: ~~~~~~~~~~~~~~~~~~~~~~~~~ =20 These are convenience functions which are identical to -``address_space_*`` but operate specifically on the system address space, -always pass a ``MEMTXATTRS_UNSPECIFIED`` set of memory attributes and -ignore whether the memory transaction succeeded or failed. -For new code they are better avoided: +``address_space_*`` but operate specifically on the legacy global +``&address_space_memory`` address space (which might not be used by all +machines), always pass a ``MEMTXATTRS_UNSPECIFIED`` set of memory attribut= es +and ignore whether the memory transaction succeeded or failed. Expected +users are hardware device models. For new code they are better avoided: =20 * there is likely to be behaviour you need to model correctly for a failed read or write operation * a device should usually perform operations on its own AddressSpace rather than using the system address space +* some machines do not use this global address space at all =20 ``cpu_physical_memory_read`` =20 diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 1eb28734601..9cd67d3ef9d 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -64,11 +64,52 @@ void cpu_address_space_init(CPUState *cpu, int asidx, */ void cpu_destroy_address_spaces(CPUState *cpu); =20 +/** + * cpu_physical_memory_read: Read from the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: length of the data transferred + */ void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len); +/** + * cpu_physical_memory_write: Write to the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: the number of bytes to write + */ void cpu_physical_memory_write(hwaddr addr, const void *buf, hwaddr len); +/** + * cpu_physical_memory_map: Map guest physical memory region into host vir= tual + * address. + * + * Map a memory region from the legacy global #address_space_memory address + * space. May return %NULL and set *@plen to zero(0), if resources needed = to + * perform the mapping are exhausted. + * + * @addr: address within that address space + * @len: pointer to length of buffer; updated on return + * @is_write: whether the translation operation is for write + */ void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, bool is_write); +/** + * cpu_physical_memory_unmap: Unmaps a memory region previously mapped by + * cpu_physical_memory_map() + * + * @buffer: host pointer as returned by cpu_physical_memory_map() + * @len: buffer length as returned by cpu_physical_memory_map() + * @is_write: whether the translation operation is for write + * @access_len: amount of data actually transferred + */ void cpu_physical_memory_unmap(void *buffer, hwaddr len, bool is_write, hwaddr access_len); =20 --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786082; cv=none; d=zohomail.com; s=zohoarc; b=nT5mZ4y4UYmnYV2xcqNWGxxMIDR7GnzzCTF3xKY+xdCKTK9nYriKgJKmHDt2ajhHkhAq/b+R63755fGcZxA4HSmZev/jkyt1wpFZTf3IRWA2wdK3+W2CWJZ1vKq/dZOg6VIkv8Vv4PRN7QZ/l8MgGNOLov47NCxuDM29uKP4oc0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786082; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=QDc9G4NZI17oouZZZEjmqpXO6MXFyShzuSiHshpuPIE=; b=HAVe6T7JSzcqz80Egm9tNrylV1ng5ofrIWX2fdcNIAsnu7ZpHgM+KZTM3ezRCc0xlmSl54RQHwLReCnKLcKk6NtBc6kLdQcNELc76MZlOTxyDosCfWlKA3XGaDRyc0p+kFH5rYQircQjJ24Os+LtC920cMOlNGsjGoTrcDw96aI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178178608221948.72083342396036; Thu, 18 Jun 2026 05:34:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBsO-0000RD-Em; Thu, 18 Jun 2026 08:29:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsK-000063-LJ for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:40 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsH-0007xZ-37 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:38 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAtbI51516173 for ; Thu, 18 Jun 2026 12:29:33 GMT Received: from mail-ua1-f71.google.com (mail-ua1-f71.google.com [209.85.222.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev19a3aej-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:29:33 +0000 (GMT) Received: by mail-ua1-f71.google.com with SMTP id a1e0cc1a2514c-966de053712so845717241.1 for ; Thu, 18 Jun 2026 05:29:33 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786084369158500 cpu_physical_memory_write() is legacy (see commit b7ecba0f6f6), replace it by address_space_write(). Both if() ladders only differ in the address space argument: rework to have a single address_space_write() call. No logical change intended. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Manos Pitsidianakis Reviewed-by: Richard Henderson Message-Id: <20260616020839.19104-3-philmd@oss.qualcomm.com> --- accel/kvm/kvm-all.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 96f90ebb240..f4f0e64fbd0 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -3178,16 +3178,12 @@ void kvm_flush_coalesced_mmio_buffer(void) struct kvm_coalesced_mmio_ring *ring =3D s->coalesced_mmio_ring; while (ring->first !=3D ring->last) { struct kvm_coalesced_mmio *ent; + const AddressSpace *as; =20 ent =3D &ring->coalesced_mmio[ring->first]; - - if (ent->pio =3D=3D 1) { - address_space_write(&address_space_io, ent->phys_addr, - MEMTXATTRS_UNSPECIFIED, ent->data, - ent->len); - } else { - cpu_physical_memory_write(ent->phys_addr, ent->data, ent->= len); - } + as =3D ent->pio =3D=3D 1 ? &address_space_io : &address_space_= memory; + address_space_write(as, ent->phys_addr, MEMTXATTRS_UNSPECIFIED, + ent->data, ent->len); smp_wmb(); ring->first =3D (ring->first + 1) % KVM_COALESCED_MMIO_MAX; } --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785859; cv=none; d=zohomail.com; s=zohoarc; b=cHSJPOUpEuOUsCOqvY0gR23TEz9TpkveyjLp+lKWwme2TWXgTXw5MRYKJLGgPsgz1Ld5i2gR1STM3KzO0+J+lmXXkZBQ6sPfxrPey6z3IMAKkBxjHBK7aC/FN52IocCYWeXCntvyqcSBgO9tO0+3/aeKJp8x5Z5pJJ5uroIkoVI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785859; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=muQZUEU4AwcP5d/jGNIHPLOvcJ9pAvbWRhOS23Ih6B4=; b=E0nV6pPAtcICc2r/16psiPVOMtDgX5C4DuBLTvvvU8JTU08BduSrCna3OeEelm9v86svCk8pniqU61Fx7T2IOBeiJZZgy4c3KGUsHHCkL/AsdO3tVVJ8V69FO7MKSjnoQHCbqBruu2KpzglWyxD+kR+yl+7o7/ujR30KkOl9qGg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785859517724.6798206651442; Thu, 18 Jun 2026 05:30:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBsP-0000YR-Ey; Thu, 18 Jun 2026 08:29:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsN-0000J0-Fh for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:43 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsL-00082T-OQ for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:43 -0400 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs9mR1536741 for ; Thu, 18 Jun 2026 12:29:40 GMT Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev12kkcsr-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:29:40 +0000 (GMT) Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-915757be497so198680985a.2 for ; Thu, 18 Jun 2026 05:29:40 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785860512158500 cpu_physical_memory_read() and cpu_physical_memory_write() are legacy (see commit b7ecba0f6f6), replace the two calls by a single one to address_space_rw(). So far there is no logical change, but stop ignoring these functions returned value and propagate it, respecting the *memory_rw_debug() family error path. Thus this is effectively a logical change. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020839.19104-4-philmd@oss.qualcomm.com> --- gdbstub/system.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/gdbstub/system.c b/gdbstub/system.c index e86c5870abc..2063b63b2f8 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -20,6 +20,7 @@ #include "exec/hwaddr.h" #include "accel/accel-ops.h" #include "accel/accel-cpu-ops.h" +#include "system/address-spaces.h" #include "system/cpus.h" #include "system/runstate.h" #include "system/replay.h" @@ -453,12 +454,10 @@ int gdb_target_memory_rw_debug(CPUState *cpu, hwaddr = addr, uint8_t *buf, int len, bool is_write) { if (phy_memory_mode) { - if (is_write) { - cpu_physical_memory_write(addr, buf, len); - } else { - cpu_physical_memory_read(addr, buf, len); - } - return 0; + MemTxResult res =3D address_space_rw(&address_space_memory, addr, + MEMTXATTRS_UNSPECIFIED, buf, le= n, + is_write); + return res =3D=3D MEMTX_OK ? 0 : -1; } =20 if (cpu->cc->memory_rw_debug) { --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785913; cv=none; d=zohomail.com; s=zohoarc; b=RlE3U8HLT+zp5VEYXz4YAtII9xWMGMDn4dPB8ZnbwndcB+4OgvmiVUX9ql68F8OMvwdkeOnATHBivAi2gwEfhr2ydR0YsPlH0SjyWY6RiGt0vQljh4tRaTl8bypF6oGh+yNLKYq5XAnevLSLD5i48yzuZwBey7wnqEqQqFVu1nM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785913; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=gK2TIMtKhAchzcc8U6UUXcqgB5x0P/ckIy6XJBVG+Ns=; b=cCd1bFIodPOYBZ9aihQFqV8Xhmzewn625KB2A4jaqYD8tw1DWdCwGs2zevGBCcq6mmZU421EV1E+zTTGPoPgRwC8DJST9pyWq4ocRwy7XO9i2H0ywnHF9hozPgDLNv2IGXTXaoPat1P1/0U66HpeUiaPl9HbnpfTBYZU+fQ3IlA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785913460181.10053709693193; Thu, 18 Jun 2026 05:31:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBsW-00011D-Rj; Thu, 18 Jun 2026 08:29:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsV-0000uU-9v for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:51 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsS-0008LQ-I3 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:49 -0400 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArtiI1536470 for ; Thu, 18 Jun 2026 12:29:47 GMT Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev12kkctb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:29:47 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-9181f3cc5ecso413494285a.1 for ; Thu, 18 Jun 2026 05:29:47 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785915018158502 From: Philippe Mathieu-Daud=C3=A9 Prevent duplication factoring common helpers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Jared Rossi Message-Id: <20260616020839.19104-5-philmd@oss.qualcomm.com> --- target/s390x/diag.c | 41 +++++++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/target/s390x/diag.c b/target/s390x/diag.c index da44b0133ed..bc1791067d8 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -73,11 +73,30 @@ static int diag308_parm_check(CPUS390XState *env, uint6= 4_t r1, uint64_t addr, return 0; } =20 +static void s390_ipl_read(CPUS390XState *env, uint64_t addr, + IplParameterBlock *iplb, size_t size) +{ + if (s390_is_pv()) { + s390_cpu_pv_mem_read(env_archcpu(env), 0, iplb, size); + } else { + cpu_physical_memory_read(addr, iplb, size); + } +} + +static void s390_ipl_write(CPUS390XState *env, uint64_t addr, + IplParameterBlock *iplb, size_t size) +{ + if (s390_is_pv()) { + s390_cpu_pv_mem_write(env_archcpu(env), 0, iplb, size); + } else { + cpu_physical_memory_write(addr, iplb, size); + } +} + void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr= _t ra) { bool valid; CPUState *cs =3D env_cpu(env); - S390CPU *cpu =3D env_archcpu(env); uint64_t addr =3D env->regs[r1]; uint64_t subcode =3D env->regs[r3]; IplParameterBlock *iplb; @@ -114,22 +133,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1,= uint64_t r3, uintptr_t ra) return; } iplb =3D g_new0(IplParameterBlock, 1); - if (!s390_is_pv()) { - cpu_physical_memory_read(addr, iplb, sizeof(iplb->len)); - } else { - s390_cpu_pv_mem_read(cpu, 0, iplb, sizeof(iplb->len)); - } - + s390_ipl_read(env, addr, iplb, sizeof(iplb->len)); if (!iplb_valid_len(iplb)) { env->regs[r1 + 1] =3D DIAG_308_RC_INVALID; goto out; } - - if (!s390_is_pv()) { - cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len)); - } else { - s390_cpu_pv_mem_read(cpu, 0, iplb, be32_to_cpu(iplb->len)); - } + s390_ipl_read(env, addr, iplb, be32_to_cpu(iplb->len)); =20 valid =3D subcode =3D=3D DIAG308_PV_SET ? iplb_valid_pv(iplb) : ip= lb_valid(iplb); if (!valid) { @@ -164,11 +173,7 @@ out: return; } =20 - if (!s390_is_pv()) { - cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len)); - } else { - s390_cpu_pv_mem_write(cpu, 0, iplb, be32_to_cpu(iplb->len)); - } + s390_ipl_write(env, addr, iplb, be32_to_cpu(iplb->len)); env->regs[r1 + 1] =3D DIAG_308_RC_OK; return; case DIAG308_PV_START: --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785833; cv=none; d=zohomail.com; s=zohoarc; b=nKB6BSm5GP6pOeVzoxnMkWXsstWkTXOGpJ+C64/4UQDmP3+4MKOeuWDxjuI8hapOjk1wsLxLgc4R6s9qr1XJrXdAQn17tyQAVosg1zxw+47xJmeqcE8ecffl3KqCF1KEj0j36+u1l7JSreHtF+25lJImW04yD6uD5ZkokJb6X+A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785833; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=folBNXbevySmXHtrond4cw+ToVzfXcMoQlHL48CLkxs=; b=XG5w/lVMqTflz2dM1sGQm4gRTz9v+tQneDLqtc08/GWoT//VKxeZ4GPad3TTX94LpAPNK24AMmKT+XKuuK4mWilRTxSzkxuBiTzQbUtlE0r31EcTV9DVgvkxVSoMktmNHThSDbycS50tMuuXCpPG7UXepI2nSH0Pi6WC7bVDhSA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785833671689.5205574937997; Thu, 18 Jun 2026 05:30:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBsd-0001MH-0t; Thu, 18 Jun 2026 08:29:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsb-0001Gh-DC for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:57 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsZ-0008NZ-U5 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:29:57 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAtU2B1516066 for ; Thu, 18 Jun 2026 12:29:55 GMT Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev19a3afs-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:29:54 +0000 (GMT) Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-918622c3c7bso254011685a.3 for ; Thu, 18 Jun 2026 05:29:54 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785834552158500 From: Philippe Mathieu-Daud=C3=A9 cpu_physical_memory_read() and cpu_physical_memory_write() are legacy (see commit b7ecba0f6f6), replace by address_space_read() and address_space_write() respectively, accessing the per-vCPU address space instead of the global &address_space_memory one. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Jared Rossi Message-Id: <20260616020839.19104-6-philmd@oss.qualcomm.com> --- target/s390x/diag.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/s390x/diag.c b/target/s390x/diag.c index bc1791067d8..01cc802eaed 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -79,7 +79,8 @@ static void s390_ipl_read(CPUS390XState *env, uint64_t ad= dr, if (s390_is_pv()) { s390_cpu_pv_mem_read(env_archcpu(env), 0, iplb, size); } else { - cpu_physical_memory_read(addr, iplb, size); + address_space_read(cpu_get_address_space(env_cpu(env), 0), addr, + MEMTXATTRS_UNSPECIFIED, iplb, size); } } =20 @@ -89,7 +90,8 @@ static void s390_ipl_write(CPUS390XState *env, uint64_t a= ddr, if (s390_is_pv()) { s390_cpu_pv_mem_write(env_archcpu(env), 0, iplb, size); } else { - cpu_physical_memory_write(addr, iplb, size); + address_space_write(cpu_get_address_space(env_cpu(env), 0), addr, + MEMTXATTRS_UNSPECIFIED, iplb, size); } } =20 --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786078; cv=none; d=zohomail.com; s=zohoarc; b=kSeHl/3xHyF/RauTpcS5dR4GLh24JWdYYb58UxLe7218kXOWowQXJ42gwE0Sl7CXzXdCXiieRz94hJtABI5AvrODNM8iYHtX9VK4R6T7yPD84QnqoWdadeewJLDZt8GDvzuxdy7mVwKAHqUelg8JPRFhae4uUYCHTKdK2h7D+lI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786078; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=b3a0/16lXe7heUewTZESYQYX9VS8oIZOc63KeJ5pe/E=; b=UGtznEzNlIKl4EgH11Z1NXCR1utkAWIkpqeDr3hwxBwe1F+jleeaLX6i5jiLyAm2BTylOurVvqd1226frDy56kIKpZpfl3yJm/uqMvTPgC/ztOuIKhZ3FXPHQnVX9gmPjRRwlhoTaujZ7igysk8lk+uzeBIZKeaAq79ihl3bYjY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786078249723.8570629448383; Thu, 18 Jun 2026 05:34:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBsr-0001mV-En; Thu, 18 Jun 2026 08:30:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsp-0001ky-OT for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:11 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBsj-0000AL-JR for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:11 -0400 Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAsm8F1372893 for ; Thu, 18 Jun 2026 12:30:04 GMT Received: from mail-ua1-f69.google.com (mail-ua1-f69.google.com [209.85.222.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev1rtu6qg-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:30:04 +0000 (GMT) Received: by mail-ua1-f69.google.com with SMTP id a1e0cc1a2514c-963d24c3886so896070241.0 for ; Thu, 18 Jun 2026 05:30:04 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786080476158500 The following cpu_physical_memory_*() methods do not involve any vCPU but only access physical memory: - cpu_physical_memory_read() - cpu_physical_memory_write() - cpu_physical_memory_map() - cpu_physical_memory_unmap() Rename them removing the 'cpu_' prefix, and move then to the "system/physmem.h" header with the other methods involved in global physical address space. Mechanical change using sed, then adding missing headers manually. No logical change intended. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616020839.19104-7-philmd@oss.qualcomm.com> --- docs/devel/loads-stores.rst | 8 ++--- scripts/coccinelle/exec_rw_const.cocci | 16 ++++----- hw/xtensa/bootparam.h | 6 ++-- include/exec/cpu-common.h | 50 -------------------------- include/system/physmem.h | 50 ++++++++++++++++++++++++++ dump/dump.c | 3 +- dump/win_dump-x86.c | 5 +-- hw/acpi/ghes.c | 24 ++++++------- hw/acpi/nvdimm.c | 13 +++---- hw/acpi/vmgenid.c | 3 +- hw/audio/marvell_88w8618.c | 3 +- hw/char/riscv_htif.c | 5 +-- hw/display/exynos4210_fimd.c | 7 ++-- hw/display/omap_lcdc.c | 5 +-- hw/display/ramfb.c | 7 ++-- hw/dma/i8257.c | 9 ++--- hw/dma/omap_dma.c | 6 ++-- hw/dma/rc4030.c | 3 +- hw/dma/sifive_pdma.c | 9 ++--- hw/hyperv/hyperv.c | 25 ++++++------- hw/hyperv/syndbg.c | 13 +++---- hw/hyperv/vmbus.c | 9 ++--- hw/i386/kvm/clock.c | 3 +- hw/i386/vapic.c | 21 +++++------ hw/intc/apic.c | 3 +- hw/intc/xive2.c | 3 +- hw/m68k/next-cube.c | 3 +- hw/microblaze/boot.c | 3 +- hw/misc/pc-testdev.c | 5 +-- hw/net/fsl_etsec/rings.c | 13 +++---- hw/net/mcf_fec.c | 11 +++--- hw/net/opencores_eth.c | 9 ++--- hw/nvram/spapr_nvram.c | 9 ++--- hw/ppc/amigaone.c | 5 +-- hw/ppc/e500.c | 3 +- hw/ppc/pegasos.c | 11 +++--- hw/ppc/pnv.c | 5 +-- hw/ppc/ppc440_uc.c | 9 ++--- hw/ppc/spapr.c | 3 +- hw/ppc/spapr_drc.c | 3 +- hw/ppc/spapr_events.c | 9 ++--- hw/ppc/spapr_hcall.c | 17 ++++----- hw/ppc/spapr_rtas.c | 5 +-- hw/ppc/spapr_tpm_proxy.c | 5 +-- hw/ppc/virtex_ml507.c | 3 +- hw/s390x/css.c | 5 +-- hw/s390x/ipl.c | 9 ++--- hw/s390x/s390-pci-bus.c | 5 +-- hw/s390x/virtio-ccw.c | 5 +-- hw/scsi/vmw_pvscsi.c | 12 +++---- hw/xen/xen_pt_graphics.c | 4 +-- hw/xtensa/xtfpga.c | 5 +-- system/cpus.c | 3 +- system/physmem.c | 12 +++---- 54 files changed, 270 insertions(+), 230 deletions(-) diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index f2c66e44454..3aeb8bbe8ba 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -439,7 +439,7 @@ Regexes for git grep: - ``\`` - ``\`` =20 -``cpu_physical_memory_*`` +``physical_memory_*`` ~~~~~~~~~~~~~~~~~~~~~~~~~ =20 These are convenience functions which are identical to @@ -455,12 +455,12 @@ users are hardware device models. For new code they a= re better avoided: rather than using the system address space * some machines do not use this global address space at all =20 -``cpu_physical_memory_read`` +``physical_memory_read`` =20 -``cpu_physical_memory_write`` +``physical_memory_write`` =20 Regexes for git grep: - - ``\`` + - ``\`` =20 ``cpu_memory_rw_debug`` ~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/ex= ec_rw_const.cocci index 4c02c94e04e..6d16db6aa4e 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -21,11 +21,11 @@ expression E1, E2, E3, E4, E5; + address_space_rw(E1, E2, E3, E4, E5, true) | =20 -- cpu_physical_memory_map(E1, E2, 0) -+ cpu_physical_memory_map(E1, E2, false) +- physical_memory_map(E1, E2, 0) ++ physical_memory_map(E1, E2, false) | -- cpu_physical_memory_map(E1, E2, 1) -+ cpu_physical_memory_map(E1, E2, true) +- physical_memory_map(E1, E2, 1) ++ physical_memory_map(E1, E2, true) ) =20 // Use address_space_write instead of casting to non-const @@ -74,11 +74,11 @@ type T; + address_space_write_rom(E1, E2, E3, E4, E5) | =20 -- cpu_physical_memory_read(E1, (T *)(E2), E3) -+ cpu_physical_memory_read(E1, E2, E3) +- physical_memory_read(E1, (T *)(E2), E3) ++ physical_memory_read(E1, E2, E3) | -- cpu_physical_memory_write(E1, (T *)(E2), E3) -+ cpu_physical_memory_write(E1, E2, E3) +- physical_memory_write(E1, (T *)(E2), E3) ++ physical_memory_write(E1, E2, E3) | =20 - dma_memory_read(E1, E2, (T *)(E3), E4) diff --git a/hw/xtensa/bootparam.h b/hw/xtensa/bootparam.h index 4418c78d5bb..1eb741c909d 100644 --- a/hw/xtensa/bootparam.h +++ b/hw/xtensa/bootparam.h @@ -1,8 +1,8 @@ #ifndef HW_XTENSA_BOOTPARAM_H #define HW_XTENSA_BOOTPARAM_H =20 -#include "exec/cpu-common.h" #include "exec/tswap.h" +#include "system/physmem.h" =20 #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated stri= ng)*/ #define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_memin= fo) */ @@ -41,9 +41,9 @@ static inline ram_addr_t put_tag(ram_addr_t addr, uint16_= t tag, .size =3D tswap16((size + 3) & ~3), }; =20 - cpu_physical_memory_write(addr, &bp_tag, sizeof(bp_tag)); + physical_memory_write(addr, &bp_tag, sizeof(bp_tag)); addr +=3D sizeof(bp_tag); - cpu_physical_memory_write(addr, data, size); + physical_memory_write(addr, data, size); addr +=3D (size + 3) & ~3; =20 return addr; diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 9cd67d3ef9d..830e57dc5fc 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -9,7 +9,6 @@ #define CPU_COMMON_H =20 #include "exec/vaddr.h" -#include "exec/hwaddr.h" #include "hw/core/cpu.h" #include "tcg/debug-assert.h" #include "exec/page-protection.h" @@ -64,55 +63,6 @@ void cpu_address_space_init(CPUState *cpu, int asidx, */ void cpu_destroy_address_spaces(CPUState *cpu); =20 -/** - * cpu_physical_memory_read: Read from the legacy global address space. - * - * This function access the legacy global #address_space_memory address - * space and does not say whether the operation succeeded or failed. - * - * @addr: address within the legacy global address space - * @buf: buffer with the data transferred - * @len: length of the data transferred - */ -void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len); -/** - * cpu_physical_memory_write: Write to the legacy global address space. - * - * This function access the legacy global #address_space_memory address - * space and does not say whether the operation succeeded or failed. - * - * @addr: address within the legacy global address space - * @buf: buffer with the data transferred - * @len: the number of bytes to write - */ -void cpu_physical_memory_write(hwaddr addr, const void *buf, hwaddr len); -/** - * cpu_physical_memory_map: Map guest physical memory region into host vir= tual - * address. - * - * Map a memory region from the legacy global #address_space_memory address - * space. May return %NULL and set *@plen to zero(0), if resources needed = to - * perform the mapping are exhausted. - * - * @addr: address within that address space - * @len: pointer to length of buffer; updated on return - * @is_write: whether the translation operation is for write - */ -void *cpu_physical_memory_map(hwaddr addr, - hwaddr *plen, - bool is_write); -/** - * cpu_physical_memory_unmap: Unmaps a memory region previously mapped by - * cpu_physical_memory_map() - * - * @buffer: host pointer as returned by cpu_physical_memory_map() - * @len: buffer length as returned by cpu_physical_memory_map() - * @is_write: whether the translation operation is for write - * @access_len: amount of data actually transferred - */ -void cpu_physical_memory_unmap(void *buffer, hwaddr len, - bool is_write, hwaddr access_len); - /* vl.c */ void list_cpus(void); =20 diff --git a/include/system/physmem.h b/include/system/physmem.h index da91b77bd9b..c47b378025c 100644 --- a/include/system/physmem.h +++ b/include/system/physmem.h @@ -11,6 +11,56 @@ #include "exec/hwaddr.h" #include "system/ramlist.h" =20 +/** + * physical_memory_map: Map guest physical memory region into host virtual + * address. + * + * Map a memory region from the legacy global #address_space_memory address + * space. May return %NULL and set *@plen to zero(0), if resources needed = to + * perform the mapping are exhausted. + * + * @addr: address within that address space + * @len: pointer to length of buffer; updated on return + * @is_write: whether the translation operation is for write + */ +void *physical_memory_map(hwaddr addr, hwaddr *plen, bool is_write); + +/** + * physical_memory_unmap: Unmaps a memory region previously mapped by + * physical_memory_map() + * + * @buffer: host pointer as returned by physical_memory_map() + * @len: buffer length as returned by physical_memory_map() + * @is_write: whether the translation operation is for write + * @access_len: amount of data actually transferred + */ +void physical_memory_unmap(void *buffer, hwaddr len, + bool is_write, hwaddr access_len); + +/** + * physical_memory_read: Read from the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: length of the data transferred + */ +void physical_memory_read(hwaddr addr, void *buf, hwaddr len); + +/** + * physical_memory_write: Write to the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: the number of bytes to write + */ +void physical_memory_write(hwaddr addr, const void *buf, hwaddr len); + #define DIRTY_CLIENTS_ALL ((1 << DIRTY_MEMORY_NUM) - 1) #define DIRTY_CLIENTS_NOCODE (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_COD= E)) =20 diff --git a/dump/dump.c b/dump/dump.c index 1f216e74f5f..eb2ee1c10df 100644 --- a/dump/dump.c +++ b/dump/dump.c @@ -21,6 +21,7 @@ #include "system/dump.h" #include "system/runstate.h" #include "system/cpus.h" +#include "system/physmem.h" #include "qapi/error.h" #include "qapi/qapi-commands-dump.h" #include "qapi/qapi-events-dump.h" @@ -1892,7 +1893,7 @@ static void dump_init(DumpState *s, int fd, bool has_= format, warn_report("guest note format is unsupported: %" PRIu16, gues= t_format); } else { s->guest_note =3D g_malloc(size + 1); /* +1 for adding \0 */ - cpu_physical_memory_read(addr, s->guest_note, size); + physical_memory_read(addr, s->guest_note, size); =20 get_note_sizes(s, s->guest_note, NULL, &name_size, &desc_size); s->guest_note_size =3D ELF_NOTE_SIZE(note_head_size, name_size, diff --git a/dump/win_dump-x86.c b/dump/win_dump-x86.c index d893dea7f19..8848c8bfca3 100644 --- a/dump/win_dump-x86.c +++ b/dump/win_dump-x86.c @@ -10,6 +10,7 @@ =20 #include "qemu/osdep.h" #include "system/dump.h" +#include "system/physmem.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "exec/cpu-defs.h" @@ -55,7 +56,7 @@ static size_t write_run(uint64_t base_page, uint64_t page= _count, while (size) { len =3D size; =20 - buf =3D cpu_physical_memory_map(addr, &len, false); + buf =3D physical_memory_map(addr, &len, false); if (!buf) { error_setg(errp, "win-dump: failed to map physical range" " 0x%016" PRIx64 "-0x%016" PRIx64, addr, addr= + size - 1); @@ -64,7 +65,7 @@ static size_t write_run(uint64_t base_page, uint64_t page= _count, =20 l =3D qemu_write_full(fd, buf, len); eno =3D errno; - cpu_physical_memory_unmap(buf, addr, false, len); + physical_memory_unmap(buf, addr, false, len); if (l !=3D len) { error_setg_errno(errp, eno, "win-dump: failed to save memory"); return 0; diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index c42f1721c42..b2d5e349932 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -28,6 +28,7 @@ #include "hw/nvram/fw_cfg.h" #include "qemu/uuid.h" #include "exec/cpu-common.h" +#include "system/physmem.h" =20 #define ACPI_HW_ERROR_FW_CFG_FILE "etc/hardware_errors" #define ACPI_HW_ERROR_ADDR_FW_CFG_FILE "etc/hardware_errors_addr" @@ -432,9 +433,7 @@ static void get_hw_error_offsets(uint64_t ghes_addr, * the source ID, as it is stored inside the HEST table. */ =20 - cpu_physical_memory_read(ghes_addr, cper_addr, - sizeof(*cper_addr)); - + physical_memory_read(ghes_addr, cper_addr, sizeof(*cper_addr)); *cper_addr =3D le64_to_cpu(*cper_addr); =20 /* @@ -456,8 +455,7 @@ static bool get_ghes_source_offsets(uint16_t source_id, =20 hest_addr +=3D ACPI_DESC_HEADER_OFFSET; =20 - cpu_physical_memory_read(hest_addr, &num_sources, - sizeof(num_sources)); + physical_memory_read(hest_addr, &num_sources, sizeof(num_sources)); num_sources =3D le32_to_cpu(num_sources); =20 err_source_entry =3D hest_addr + sizeof(num_sources); @@ -469,7 +467,7 @@ static bool get_ghes_source_offsets(uint16_t source_id, uint64_t addr =3D err_source_entry; uint16_t type, src_id; =20 - cpu_physical_memory_read(addr, &type, sizeof(type)); + physical_memory_read(addr, &type, sizeof(type)); type =3D le16_to_cpu(type); =20 /* For now, we only know the size of GHESv2 table */ @@ -480,7 +478,7 @@ static bool get_ghes_source_offsets(uint16_t source_id, =20 /* Compare CPER source ID at the GHESv2 structure */ addr +=3D sizeof(type); - cpu_physical_memory_read(addr, &src_id, sizeof(src_id)); + physical_memory_read(addr, &src_id, sizeof(src_id)); if (le16_to_cpu(src_id) =3D=3D source_id) { break; } @@ -496,17 +494,17 @@ static bool get_ghes_source_offsets(uint16_t source_i= d, hest_err_block_addr =3D err_source_entry + GHES_ERR_STATUS_ADDR_OFF + GAS_ADDR_OFFSET; =20 - cpu_physical_memory_read(hest_err_block_addr, &error_block_addr, + physical_memory_read(hest_err_block_addr, &error_block_addr, sizeof(error_block_addr)); error_block_addr =3D le64_to_cpu(error_block_addr); =20 - cpu_physical_memory_read(error_block_addr, cper_addr, + physical_memory_read(error_block_addr, cper_addr, sizeof(*cper_addr)); *cper_addr =3D le64_to_cpu(*cper_addr); =20 hest_read_ack_addr =3D err_source_entry + GHES_READ_ACK_ADDR_OFF + GAS_ADDR_OFFSET; - cpu_physical_memory_read(hest_read_ack_addr, read_ack_start_addr, + physical_memory_read(hest_read_ack_addr, read_ack_start_addr, sizeof(*read_ack_start_addr)); *read_ack_start_addr =3D le64_to_cpu(*read_ack_start_addr); =20 @@ -535,7 +533,7 @@ bool ghes_record_cper_errors(AcpiGhesState *ags, const = void *cper, size_t len, return false; } =20 - cpu_physical_memory_read(read_ack_register_addr, + physical_memory_read(read_ack_register_addr, &read_ack_register, sizeof(read_ack_register)= ); =20 /* zero means OSPM does not acknowledge the error */ @@ -551,11 +549,11 @@ bool ghes_record_cper_errors(AcpiGhesState *ags, cons= t void *cper, size_t len, * Clear the Read Ack Register, OSPM will write 1 to this register when * it acknowledges the error. */ - cpu_physical_memory_write(read_ack_register_addr, + physical_memory_write(read_ack_register_addr, &read_ack_register, sizeof(uint64_t)); =20 /* Write the generic error data entry into guest memory */ - cpu_physical_memory_write(cper_addr, cper, len); + physical_memory_write(cper_addr, cper, len); =20 notifier_list_notify(&acpi_generic_error_notifiers, &source_id); =20 diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index eb4b4770765..703e854951e 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -35,6 +35,7 @@ #include "hw/nvram/fw_cfg.h" #include "hw/mem/nvdimm.h" #include "qemu/nvdimm-utils.h" +#include "system/physmem.h" #include "trace.h" #include "exec/cpu-common.h" =20 @@ -515,7 +516,7 @@ nvdimm_dsm_function0(uint32_t supported_func, hwaddr ds= m_mem_addr) .len =3D cpu_to_le32(sizeof(func0)), .supported_func =3D cpu_to_le32(supported_func), }; - cpu_physical_memory_write(dsm_mem_addr, &func0, sizeof(func0)); + physical_memory_write(dsm_mem_addr, &func0, sizeof(func0)); } =20 static void @@ -525,7 +526,7 @@ nvdimm_dsm_no_payload(uint32_t func_ret_status, hwaddr = dsm_mem_addr) .len =3D cpu_to_le32(sizeof(out)), .func_ret_status =3D cpu_to_le32(func_ret_status), }; - cpu_physical_memory_write(dsm_mem_addr, &out, sizeof(out)); + physical_memory_write(dsm_mem_addr, &out, sizeof(out)); } =20 #define NVDIMM_DSM_RET_STATUS_SUCCESS 0 /* Success */ @@ -580,7 +581,7 @@ exit: read_fit_out->func_ret_status =3D cpu_to_le32(func_ret_status); memcpy(read_fit_out->fit, fit->data + read_fit->offset, read_len); =20 - cpu_physical_memory_write(dsm_mem_addr, read_fit_out, size); + physical_memory_write(dsm_mem_addr, read_fit_out, size); =20 g_free(read_fit_out); } @@ -666,7 +667,7 @@ static void nvdimm_dsm_label_size(NVDIMMDevice *nvdimm,= hwaddr dsm_mem_addr) label_size_out.label_size =3D cpu_to_le32(label_size); label_size_out.max_xfer =3D cpu_to_le32(mxfer); =20 - cpu_physical_memory_write(dsm_mem_addr, &label_size_out, + physical_memory_write(dsm_mem_addr, &label_size_out, sizeof(label_size_out)); } =20 @@ -735,7 +736,7 @@ static void nvdimm_dsm_get_label_data(NVDIMMDevice *nvd= imm, NvdimmDsmIn *in, nvc->read_label_data(nvdimm, get_label_data_out->out_buf, get_label_data->length, get_label_data->offset); =20 - cpu_physical_memory_write(dsm_mem_addr, get_label_data_out, size); + physical_memory_write(dsm_mem_addr, get_label_data_out, size); g_free(get_label_data_out); } =20 @@ -845,7 +846,7 @@ nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t va= l, unsigned size) * this by copying DSM memory to QEMU local memory. */ in =3D g_new(NvdimmDsmIn, 1); - cpu_physical_memory_read(dsm_mem_addr, in, sizeof(*in)); + physical_memory_read(dsm_mem_addr, in, sizeof(*in)); =20 in->revision =3D le32_to_cpu(in->revision); in->function =3D le32_to_cpu(in->function); diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c index 70ad029057b..27cc0128d11 100644 --- a/hw/acpi/vmgenid.c +++ b/hw/acpi/vmgenid.c @@ -20,6 +20,7 @@ #include "hw/core/qdev-properties.h" #include "hw/core/qdev-properties-system.h" #include "migration/vmstate.h" +#include "system/physmem.h" #include "system/reset.h" #include "exec/cpu-common.h" =20 @@ -156,7 +157,7 @@ static void vmgenid_update_guest(VmGenIdState *vms) * in order to implement the "OVMF SDT Header probe suppressor" * see docs/specs/vmgenid.rst for more details. */ - cpu_physical_memory_write(vmgenid_addr, guid_le.data, + physical_memory_write(vmgenid_addr, guid_le.data, sizeof(guid_le.data)); /* Send _GPE.E05 event */ acpi_send_event(DEVICE(obj), ACPI_VMGENID_CHANGE_STATUS); diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index 4ad4a220a98..061d076dade 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -21,6 +21,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "qom/object.h" +#include "system/physmem.h" =20 #define MP_AUDIO_SIZE 0x00001000 =20 @@ -87,7 +88,7 @@ static void mv88w8618_audio_callback(void *opaque, int fr= ee_out, int free_in) if (block_size > 4096) { return; } - cpu_physical_memory_read(s->target_buffer + s->play_pos, buf, block_si= ze); + physical_memory_read(s->target_buffer + s->play_pos, buf, block_size); mem_buffer =3D buf; if (s->playback_mode & MP_AUDIO_16BIT_SAMPLE) { if (s->playback_mode & MP_AUDIO_MONO) { diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c index a53d2ace020..488f938d98d 100644 --- a/hw/char/riscv_htif.c +++ b/hw/char/riscv_htif.c @@ -30,6 +30,7 @@ #include "qemu/error-report.h" #include "system/address-spaces.h" #include "system/dma.h" +#include "system/physmem.h" #include "system/runstate.h" #include "exec/cpu-common.h" #include "trace.h" @@ -209,12 +210,12 @@ static void htif_handle_tohost_write(HTIFState *s, ui= nt64_t val_written) return; } else { uint64_t syscall[8]; - cpu_physical_memory_read(payload, syscall, sizeof(syscall)= ); + physical_memory_read(payload, syscall, sizeof(syscall)); if (le64_to_cpu(syscall[0]) =3D=3D PK_SYS_WRITE && le64_to_cpu(syscall[1]) =3D=3D HTIF_DEV_CONSOLE && le64_to_cpu(syscall[3]) =3D=3D HTIF_CONSOLE_CMD_PUTC) { uint8_t ch; - cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch,= 1); + physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1); /* * XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index e715183ad54..7507e4fd3ca 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -28,6 +28,7 @@ #include "hw/core/sysbus.h" #include "exec/cpu-common.h" #include "migration/vmstate.h" +#include "system/physmem.h" #include "ui/console.h" #include "ui/pixel_ops.h" #include "qemu/bswap.h" @@ -1076,7 +1077,7 @@ static void fimd_update_memory_section(Exynos4210fimd= State *s, unsigned win) } =20 if (w->host_fb_addr) { - cpu_physical_memory_unmap(w->host_fb_addr, w->fb_len, 0, 0); + physical_memory_unmap(w->host_fb_addr, w->fb_len, 0, 0); w->host_fb_addr =3D NULL; w->fb_len =3D 0; } @@ -1115,7 +1116,7 @@ static void fimd_update_memory_section(Exynos4210fimd= State *s, unsigned win) goto error_return; } =20 - w->host_fb_addr =3D cpu_physical_memory_map(fb_start_addr, &fb_mapped_= len, + w->host_fb_addr =3D physical_memory_map(fb_start_addr, &fb_mapped_len, false); if (!w->host_fb_addr) { qemu_log_mask(LOG_GUEST_ERROR, @@ -1127,7 +1128,7 @@ static void fimd_update_memory_section(Exynos4210fimd= State *s, unsigned win) qemu_log_mask(LOG_GUEST_ERROR, "FIMD: Window %u mapped framebuffer length is less t= han " "expected\n", win); - cpu_physical_memory_unmap(w->host_fb_addr, fb_mapped_len, 0, 0); + physical_memory_unmap(w->host_fb_addr, fb_mapped_len, 0, 0); goto error_return; } memory_region_set_log(w->mem_section.mr, true, DIRTY_MEMORY_VGA); diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c index 2a8d5ffdd57..b88ea5f2f19 100644 --- a/hw/display/omap_lcdc.c +++ b/hw/display/omap_lcdc.c @@ -24,6 +24,7 @@ #include "framebuffer.h" #include "ui/pixel_ops.h" #include "exec/cpu-common.h" +#include "system/physmem.h" =20 struct omap_lcd_panel_s { MemoryRegion *sysmem; @@ -217,7 +218,7 @@ static bool omap_update_display(void *opaque) =20 frame_offset =3D 0; if (omap_lcd->plm !=3D 2) { - cpu_physical_memory_read( + physical_memory_read( omap_lcd->dma->phys_framebuffer[omap_lcd->dma->current_fra= me], omap_lcd->palette, 0x200); switch (omap_lcd->palette[0] >> 12 & 7) { @@ -371,7 +372,7 @@ static void omap_lcd_update(struct omap_lcd_panel_s *s)= { s->dma->phys_framebuffer[1] =3D s->dma->src_f2_top; =20 if (s->plm !=3D 2 && !s->palette_done) { - cpu_physical_memory_read( + physical_memory_read( s->dma->phys_framebuffer[s->dma->current_frame= ], s->palette, 0x200); s->palette_done =3D 1; diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c index 7a88f934e11..f477bdcc218 100644 --- a/hw/display/ramfb.c +++ b/hw/display/ramfb.c @@ -17,6 +17,7 @@ #include "hw/display/ramfb.h" #include "hw/display/bochs-vbe.h" /* for limits */ #include "ui/console.h" +#include "system/physmem.h" #include "system/reset.h" #include "exec/cpu-common.h" =20 @@ -42,7 +43,7 @@ static void ramfb_unmap_display_surface(pixman_image_t *i= mage, void *unused) void *data =3D pixman_image_get_data(image); uint32_t size =3D pixman_image_get_stride(image) * pixman_image_get_height(image); - cpu_physical_memory_unmap(data, size, 0, 0); + physical_memory_unmap(data, size, 0, 0); } =20 static DisplaySurface *ramfb_create_display_surface(int width, int height, @@ -64,9 +65,9 @@ static DisplaySurface *ramfb_create_display_surface(int w= idth, int height, } =20 mapsize =3D size =3D stride * (height - 1) + linesize; - data =3D cpu_physical_memory_map(addr, &mapsize, false); + data =3D physical_memory_map(addr, &mapsize, false); if (size !=3D mapsize) { - cpu_physical_memory_unmap(data, mapsize, 0, 0); + physical_memory_unmap(data, mapsize, 0, 0); return NULL; } =20 diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index 3637d8f82d7..7d7e5434275 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -28,6 +28,7 @@ #include "migration/vmstate.h" #include "hw/dma/i8257.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "qapi/error.h" #include "qemu/main-loop.h" #include "qemu/module.h" @@ -414,7 +415,7 @@ static int i8257_dma_read_memory(IsaDma *obj, int nchan= , void *buf, int pos, int i; uint8_t *p =3D buf; =20 - cpu_physical_memory_read (addr - pos - len, buf, len); + physical_memory_read(addr - pos - len, buf, len); /* What about 16bit transfers? */ for (i =3D 0; i < len >> 1; i++) { uint8_t b =3D p[len - i - 1]; @@ -422,7 +423,7 @@ static int i8257_dma_read_memory(IsaDma *obj, int nchan= , void *buf, int pos, } } else - cpu_physical_memory_read (addr + pos, buf, len); + physical_memory_read(addr + pos, buf, len); =20 return len; } @@ -442,7 +443,7 @@ static int i8257_dma_write_memory(IsaDma *obj, int ncha= n, void *buf, int pos, int i; uint8_t *p =3D buf; =20 - cpu_physical_memory_write (addr - pos - len, buf, len); + physical_memory_write(addr - pos - len, buf, len); /* What about 16bit transfers? */ for (i =3D 0; i < len; i++) { uint8_t b =3D p[len - i - 1]; @@ -450,7 +451,7 @@ static int i8257_dma_write_memory(IsaDma *obj, int ncha= n, void *buf, int pos, } } else - cpu_physical_memory_write (addr + pos, buf, len); + physical_memory_write(addr + pos, buf, len); =20 return len; } diff --git a/hw/dma/omap_dma.c b/hw/dma/omap_dma.c index 668fc490548..77f14414989 100644 --- a/hw/dma/omap_dma.c +++ b/hw/dma/omap_dma.c @@ -23,7 +23,7 @@ #include "hw/arm/omap.h" #include "hw/core/irq.h" #include "hw/arm/soc_dma.h" -#include "exec/cpu-common.h" +#include "system/physmem.h" =20 struct omap_dma_channel_s { /* transfer data */ @@ -348,12 +348,12 @@ static void omap_dma_transfer_generic(struct soc_dma_= ch_s *dma) /* Transfer a single element */ /* FIXME: check the endianness */ if (!ch->constant_fill) - cpu_physical_memory_read(a->src, value, ch->data_type); + physical_memory_read(a->src, value, ch->data_type); else *(uint32_t *) value =3D ch->color; =20 if (!ch->transparent_copy || *(uint32_t *) value !=3D ch->color) - cpu_physical_memory_write(a->dest, value, ch->data_type); + physical_memory_write(a->dest, value, ch->data_type); =20 a->src +=3D a->elem_delta[0]; a->dest +=3D a->elem_delta[1]; diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 159d0173913..546ff67908a 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -34,6 +34,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "system/address-spaces.h" +#include "system/physmem.h" #include "trace.h" #include "qom/object.h" =20 @@ -303,7 +304,7 @@ static void rc4030_write(void *opaque, hwaddr addr, uin= t64_t data, if (s->cache_ltag =3D=3D 0x80000001 && s->cache_bmask =3D=3D 0xf0f= 0f0f) { hwaddr dest =3D s->cache_ptag & ~0x1; dest +=3D (s->cache_maint & 0x3) << 3; - cpu_physical_memory_write(dest, &val, 4); + physical_memory_write(dest, &val, 4); } break; /* Remote Speed Registers */ diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c index 7b22e514923..c4d2c77beac 100644 --- a/hw/dma/sifive_pdma.c +++ b/hw/dma/sifive_pdma.c @@ -30,6 +30,7 @@ #include "exec/cpu-common.h" #include "migration/vmstate.h" #include "system/dma.h" +#include "system/physmem.h" #include "hw/dma/sifive_pdma.h" =20 #define DMA_CONTROL 0x000 @@ -121,16 +122,16 @@ static void sifive_pdma_run(SiFivePDMAState *s, int c= h) s->chan[ch].exec_src =3D src; =20 for (n =3D 0; n < bytes / size; n++) { - cpu_physical_memory_read(s->chan[ch].exec_src, buf, size); - cpu_physical_memory_write(s->chan[ch].exec_dst, buf, size); + physical_memory_read(s->chan[ch].exec_src, buf, size); + physical_memory_write(s->chan[ch].exec_dst, buf, size); s->chan[ch].exec_src +=3D size; s->chan[ch].exec_dst +=3D size; s->chan[ch].exec_bytes -=3D size; } =20 if (remainder) { - cpu_physical_memory_read(s->chan[ch].exec_src, buf, remainder); - cpu_physical_memory_write(s->chan[ch].exec_dst, buf, remainder); + physical_memory_read(s->chan[ch].exec_src, buf, remainder); + physical_memory_write(s->chan[ch].exec_dst, buf, remainder); s->chan[ch].exec_src +=3D remainder; s->chan[ch].exec_dst +=3D remainder; s->chan[ch].exec_bytes -=3D remainder; diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index a854a4927a0..4d900327857 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -17,6 +17,7 @@ #include "exec/cpu-common.h" #include "linux/kvm.h" #include "system/kvm.h" +#include "system/physmem.h" #include "qemu/bitops.h" #include "qemu/error-report.h" #include "qemu/lockable.h" @@ -622,7 +623,7 @@ uint16_t hyperv_hcall_post_message(uint64_t param, bool= fast) } =20 len =3D sizeof(*msg); - msg =3D cpu_physical_memory_map(param, &len, 0); + msg =3D physical_memory_map(param, &len, 0); if (len < sizeof(*msg)) { ret =3D HV_STATUS_INSUFFICIENT_MEMORY; goto unmap; @@ -643,7 +644,7 @@ uint16_t hyperv_hcall_post_message(uint64_t param, bool= fast) } =20 unmap: - cpu_physical_memory_unmap(msg, len, 0, 0); + physical_memory_unmap(msg, len, 0, 0); return ret; } =20 @@ -766,7 +767,7 @@ uint16_t hyperv_hcall_reset_dbg_session(uint64_t outgpa) } =20 len =3D sizeof(*reset_dbg_session); - reset_dbg_session =3D cpu_physical_memory_map(outgpa, &len, 1); + reset_dbg_session =3D physical_memory_map(outgpa, &len, 1); if (!reset_dbg_session || len < sizeof(*reset_dbg_session)) { ret =3D HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -789,7 +790,7 @@ uint16_t hyperv_hcall_reset_dbg_session(uint64_t outgpa) sizeof(reset_dbg_session->target_mac)); cleanup: if (reset_dbg_session) { - cpu_physical_memory_unmap(reset_dbg_session, + physical_memory_unmap(reset_dbg_session, sizeof(*reset_dbg_session), 1, len); } =20 @@ -811,14 +812,14 @@ uint16_t hyperv_hcall_retreive_dbg_data(uint64_t ingp= a, uint64_t outgpa, } =20 in_len =3D sizeof(*debug_data_in); - debug_data_in =3D cpu_physical_memory_map(ingpa, &in_len, 0); + debug_data_in =3D physical_memory_map(ingpa, &in_len, 0); if (!debug_data_in || in_len < sizeof(*debug_data_in)) { ret =3D HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; } =20 out_len =3D sizeof(*debug_data_out); - debug_data_out =3D cpu_physical_memory_map(outgpa, &out_len, 1); + debug_data_out =3D physical_memory_map(outgpa, &out_len, 1); if (!debug_data_out || out_len < sizeof(*debug_data_out)) { ret =3D HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -844,12 +845,12 @@ uint16_t hyperv_hcall_retreive_dbg_data(uint64_t ingp= a, uint64_t outgpa, debug_data_in->count - msg.u.recv.retrieved_count; cleanup: if (debug_data_out) { - cpu_physical_memory_unmap(debug_data_out, sizeof(*debug_data_out),= 1, + physical_memory_unmap(debug_data_out, sizeof(*debug_data_out), 1, out_len); } =20 if (debug_data_in) { - cpu_physical_memory_unmap(debug_data_in, sizeof(*debug_data_in), 0, + physical_memory_unmap(debug_data_in, sizeof(*debug_data_in), 0, in_len); } =20 @@ -870,7 +871,7 @@ uint16_t hyperv_hcall_post_dbg_data(uint64_t ingpa, uin= t64_t outgpa, bool fast) } =20 in_len =3D sizeof(*post_data_in); - post_data_in =3D cpu_physical_memory_map(ingpa, &in_len, 0); + post_data_in =3D physical_memory_map(ingpa, &in_len, 0); if (!post_data_in || in_len < sizeof(*post_data_in)) { ret =3D HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -882,7 +883,7 @@ uint16_t hyperv_hcall_post_dbg_data(uint64_t ingpa, uin= t64_t outgpa, bool fast) } =20 out_len =3D sizeof(*post_data_out); - post_data_out =3D cpu_physical_memory_map(outgpa, &out_len, 1); + post_data_out =3D physical_memory_map(outgpa, &out_len, 1); if (!post_data_out || out_len < sizeof(*post_data_out)) { ret =3D HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -902,12 +903,12 @@ uint16_t hyperv_hcall_post_dbg_data(uint64_t ingpa, u= int64_t outgpa, bool fast) HV_STATUS_SUCCESS; cleanup: if (post_data_out) { - cpu_physical_memory_unmap(post_data_out, + physical_memory_unmap(post_data_out, sizeof(*post_data_out), 1, out_len); } =20 if (post_data_in) { - cpu_physical_memory_unmap(post_data_in, + physical_memory_unmap(post_data_in, sizeof(*post_data_in), 0, in_len); } =20 diff --git a/hw/hyperv/syndbg.c b/hw/hyperv/syndbg.c index 10171b19e8f..e0057bb3990 100644 --- a/hw/hyperv/syndbg.c +++ b/hw/hyperv/syndbg.c @@ -20,6 +20,7 @@ #include "hw/hyperv/vmbus-bridge.h" #include "hw/hyperv/hyperv-proto.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "net/net.h" #include "net/eth.h" #include "net/checksum.h" @@ -62,10 +63,10 @@ static void set_pending_state(HvSynDbg *syndbg, bool ha= s_pending) } =20 out_len =3D 1; - out_data =3D cpu_physical_memory_map(syndbg->pending_page_gpa, &out_le= n, 1); + out_data =3D physical_memory_map(syndbg->pending_page_gpa, &out_len, 1= ); if (out_data) { *(uint8_t *)out_data =3D !!has_pending; - cpu_physical_memory_unmap(out_data, out_len, 1, out_len); + physical_memory_unmap(out_data, out_len, 1, out_len); } } =20 @@ -110,7 +111,7 @@ static uint16_t handle_send_msg(HvSynDbg *syndbg, uint6= 4_t ingpa, int sent_count; =20 data_len =3D count; - debug_data =3D cpu_physical_memory_map(ingpa, &data_len, 0); + debug_data =3D physical_memory_map(ingpa, &data_len, 0); if (!debug_data || data_len < count) { ret =3D HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -135,7 +136,7 @@ static uint16_t handle_send_msg(HvSynDbg *syndbg, uint6= 4_t ingpa, ret =3D HV_STATUS_SUCCESS; cleanup: if (debug_data) { - cpu_physical_memory_unmap(debug_data, count, 0, data_len); + physical_memory_unmap(debug_data, count, 0, data_len); } =20 return ret; @@ -224,7 +225,7 @@ static uint16_t handle_recv_msg(HvSynDbg *syndbg, uint6= 4_t outgpa, out_len +=3D UDP_PKT_HEADER_SIZE; } out_requested_len =3D out_len; - out_data =3D cpu_physical_memory_map(outgpa, &out_len, 1); + out_data =3D physical_memory_map(outgpa, &out_len, 1); ret =3D HV_STATUS_INSUFFICIENT_MEMORY; if (!out_data || out_len < out_requested_len) { goto cleanup_out_data; @@ -243,7 +244,7 @@ static uint16_t handle_recv_msg(HvSynDbg *syndbg, uint6= 4_t outgpa, =20 cleanup_out_data: if (out_data) { - cpu_physical_memory_unmap(out_data, out_len, 1, out_len); + physical_memory_unmap(out_data, out_len, 1, out_len); } return ret; } diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c index dcfce700052..c5259d1a764 100644 --- a/hw/hyperv/vmbus.c +++ b/hw/hyperv/vmbus.c @@ -21,6 +21,7 @@ #include "hw/core/sysbus.h" #include "exec/cpu-common.h" #include "system/kvm.h" +#include "system/physmem.h" #include "trace.h" =20 enum { @@ -750,7 +751,7 @@ static int vmbus_channel_notify_guest(VMBusChannel *cha= n) return hyperv_set_event_flag(chan->notify_route, chan->id); } =20 - int_map =3D cpu_physical_memory_map(addr, &len, 1); + int_map =3D physical_memory_map(addr, &len, 1); if (len !=3D TARGET_PAGE_SIZE / 2) { res =3D -ENXIO; goto unmap; @@ -764,7 +765,7 @@ static int vmbus_channel_notify_guest(VMBusChannel *cha= n) } =20 unmap: - cpu_physical_memory_unmap(int_map, len, 1, dirty); + physical_memory_unmap(int_map, len, 1, dirty); return res; } =20 @@ -2249,7 +2250,7 @@ static void vmbus_signal_event(EventNotifier *e) =20 addr =3D vmbus->int_page_gpa + TARGET_PAGE_SIZE / 2; len =3D TARGET_PAGE_SIZE / 2; - int_map =3D cpu_physical_memory_map(addr, &len, 1); + int_map =3D physical_memory_map(addr, &len, 1); if (len !=3D TARGET_PAGE_SIZE / 2) { goto unmap; } @@ -2265,7 +2266,7 @@ static void vmbus_signal_event(EventNotifier *e) } =20 unmap: - cpu_physical_memory_unmap(int_map, len, 1, is_dirty); + physical_memory_unmap(int_map, len, 1, is_dirty); } =20 static void vmbus_dev_realize(DeviceState *dev, Error **errp) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 7d167c8b006..e3dad136d31 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -19,6 +19,7 @@ #include "system/kvm.h" #include "system/runstate.h" #include "system/hw_accel.h" +#include "system/physmem.h" #include "kvm/kvm_i386.h" #include "migration/vmstate.h" #include "hw/core/sysbus.h" @@ -85,7 +86,7 @@ static uint64_t kvmclock_current_nsec(KVMClockState *s) } =20 kvmclock_struct_pa =3D env->system_time_msr & ~1ULL; - cpu_physical_memory_read(kvmclock_struct_pa, &time, sizeof(time)); + physical_memory_read(kvmclock_struct_pa, &time, sizeof(time)); =20 assert(time.tsc_timestamp <=3D migration_tsc); delta =3D migration_tsc - time.tsc_timestamp; diff --git a/hw/i386/vapic.c b/hw/i386/vapic.c index 781bf2a7fa5..8dd9188d96f 100644 --- a/hw/i386/vapic.c +++ b/hw/i386/vapic.c @@ -19,6 +19,7 @@ #include "system/whpx.h" #include "system/runstate.h" #include "system/address-spaces.h" +#include "system/physmem.h" #include "hw/i386/apic_internal.h" #include "hw/core/sysbus.h" #include "hw/core/boards.h" @@ -138,13 +139,13 @@ static const TPRInstruction tpr_instr[] =3D { =20 static void read_guest_rom_state(VAPICROMState *s) { - cpu_physical_memory_read(s->rom_state_paddr, &s->rom_state, + physical_memory_read(s->rom_state_paddr, &s->rom_state, sizeof(GuestROMState)); } =20 static void write_guest_rom_state(VAPICROMState *s) { - cpu_physical_memory_write(s->rom_state_paddr, &s->rom_state, + physical_memory_write(s->rom_state_paddr, &s->rom_state, sizeof(GuestROMState)); } =20 @@ -327,14 +328,14 @@ static int update_rom_mapping(VAPICROMState *s, CPUX8= 6State *env, target_ulong i for (pos =3D le32_to_cpu(s->rom_state.fixup_start); pos < le32_to_cpu(s->rom_state.fixup_end); pos +=3D 4) { - cpu_physical_memory_read(paddr + pos - s->rom_state.vaddr, + physical_memory_read(paddr + pos - s->rom_state.vaddr, &offset, sizeof(offset)); offset =3D le32_to_cpu(offset); - cpu_physical_memory_read(paddr + offset, &patch, sizeof(patch)); + physical_memory_read(paddr + offset, &patch, sizeof(patch)); patch =3D le32_to_cpu(patch); patch +=3D rom_state_vaddr - le32_to_cpu(s->rom_state.vaddr); patch =3D cpu_to_le32(patch); - cpu_physical_memory_write(paddr + offset, &patch, sizeof(patch)); + physical_memory_write(paddr + offset, &patch, sizeof(patch)); } read_guest_rom_state(s); s->vapic_paddr =3D paddr + le32_to_cpu(s->rom_state.vapic_vaddr) - @@ -378,7 +379,7 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu) } vapic_paddr =3D s->vapic_paddr + (((hwaddr)cpu_number) << VAPIC_CPU_SHIFT); - cpu_physical_memory_write(vapic_paddr + offsetof(VAPICState, enabled), + physical_memory_write(vapic_paddr + offsetof(VAPICState, enabled), &enabled, sizeof(enabled)); apic_enable_vapic(cpu->apic_state, vapic_paddr); =20 @@ -549,7 +550,7 @@ static int patch_hypercalls(VAPICROMState *s) uint8_t *rom; =20 rom =3D g_malloc(s->rom_size); - cpu_physical_memory_read(rom_paddr, rom, s->rom_size); + physical_memory_read(rom_paddr, rom, s->rom_size); =20 for (pos =3D 0; pos < s->rom_size - sizeof(vmcall_pattern); pos++) { if (kvm_enabled() && kvm_irqchip_in_kernel()) { @@ -565,7 +566,7 @@ static int patch_hypercalls(VAPICROMState *s) } if (memcmp(rom + pos, pattern, 7) =3D=3D 0 && (rom[pos + 7] =3D=3D alternates[0] || rom[pos + 7] =3D=3D alte= rnates[1])) { - cpu_physical_memory_write(rom_paddr + pos + 5, patch, 3); + physical_memory_write(rom_paddr + pos + 5, patch, 3); /* * Don't flush the tb here. Under ordinary conditions, the pat= ched * calls are miles away from the current IP. Under malicious @@ -755,7 +756,7 @@ static void do_vapic_enable(CPUState *cs, run_on_cpu_da= ta data) X86CPU *cpu =3D X86_CPU(cs); =20 static const uint8_t enabled =3D 1; - cpu_physical_memory_write(s->vapic_paddr + offsetof(VAPICState, enable= d), + physical_memory_write(s->vapic_paddr + offsetof(VAPICState, enabled), &enabled, sizeof(enabled)); apic_enable_vapic(cpu->apic_state, s->vapic_paddr); s->state =3D VAPIC_ACTIVE; @@ -776,7 +777,7 @@ static void vapic_vm_state_change(void *opaque, bool ru= nning, RunState state) run_on_cpu(first_cpu, do_vapic_enable, RUN_ON_CPU_HOST_PTR(s)); } else { zero =3D g_malloc0(s->rom_state.vapic_size); - cpu_physical_memory_write(s->vapic_paddr, zero, + physical_memory_write(s->vapic_paddr, zero, s->rom_state.vapic_size); g_free(zero); } diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 0e8932005fa..74e25c60a80 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -28,6 +28,7 @@ #include "qemu/host-utils.h" #include "system/kvm.h" #include "system/mshv.h" +#include "system/physmem.h" #include "trace.h" #include "hw/i386/apic-msidef.h" #include "exec/cpu-common.h" @@ -107,7 +108,7 @@ static void apic_sync_vapic(APICCommonState *s, int syn= c_type) return; } if (sync_type & SYNC_FROM_VAPIC) { - cpu_physical_memory_read(s->vapic_paddr, &vapic_state, + physical_memory_read(s->vapic_paddr, &vapic_state, sizeof(vapic_state)); s->tpr =3D vapic_state.tpr; } diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index d353391208e..5def5a6b733 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -13,6 +13,7 @@ #include "target/ppc/cpu.h" #include "system/cpus.h" #include "system/dma.h" +#include "system/physmem.h" #include "hw/core/qdev-properties.h" #include "hw/ppc/xive.h" #include "hw/ppc/xive2.h" @@ -1170,7 +1171,7 @@ static void xive2_tctx_accept_el(XivePresenter *xptr,= XiveTCTX *tctx, report_data[0] =3D (rd >> 8) & 0xff; report_data[1] =3D rd & 0xff; } - cpu_physical_memory_write(phys_addr, report_data, REPORT_LINE_GEN1_SIZ= E); + physical_memory_write(phys_addr, report_data, REPORT_LINE_GEN1_SIZE); } =20 void xive2_tm_ack_os_el(XivePresenter *xptr, XiveTCTX *tctx, diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 4bfe5bcf569..9a0a57c0cc4 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -14,6 +14,7 @@ #include "exec/hwaddr.h" #include "exec/cpu-common.h" #include "exec/cpu-interrupt.h" +#include "system/physmem.h" #include "system/system.h" #include "system/qtest.h" #include "hw/core/irq.h" @@ -585,7 +586,7 @@ static void nextdma_write(void *opaque, uint8_t *buf, i= nt size, int type) base_addr =3D next_state->dma[type].next_initbuf; } =20 - cpu_physical_memory_write(base_addr, buf, size); + physical_memory_write(base_addr, buf, size); =20 next_state->dma[type].next_initbuf =3D 0; =20 diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c index a93b68e1e48..c9c813d0d8b 100644 --- a/hw/microblaze/boot.c +++ b/hw/microblaze/boot.c @@ -32,6 +32,7 @@ #include "qemu/error-report.h" #include "qemu/guest-random.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/reset.h" #include "exec/cpu-common.h" #include "hw/core/boards.h" @@ -106,7 +107,7 @@ static int microblaze_load_dtb(hwaddr addr, initrd_end); } =20 - cpu_physical_memory_write(addr, fdt, fdt_size); + physical_memory_write(addr, fdt, fdt_size); g_free(fdt); return fdt_size; } diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c index 228012e772f..7f2753320fa 100644 --- a/hw/misc/pc-testdev.c +++ b/hw/misc/pc-testdev.c @@ -40,6 +40,7 @@ #include "hw/core/irq.h" #include "hw/isa/isa.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "qom/object.h" =20 #define IOMEM_LEN 0x10000 @@ -126,7 +127,7 @@ static void test_flush_page_write(void *opaque, hwaddr = addr, uint64_t data, unsigned len) { hwaddr page =3D 4096; - void *a =3D cpu_physical_memory_map(data & ~0xffful, &page, false); + void *a =3D physical_memory_map(data & ~0xffful, &page, false); =20 /* We might not be able to get the full page, only mprotect what we ac= tually have mapped */ @@ -134,7 +135,7 @@ static void test_flush_page_write(void *opaque, hwaddr = addr, uint64_t data, mprotect(a, page, PROT_NONE); mprotect(a, page, PROT_READ|PROT_WRITE); #endif - cpu_physical_memory_unmap(a, page, 0, 0); + physical_memory_unmap(a, page, 0, 0); } =20 static const MemoryRegionOps test_flush_ops =3D { diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c index 22660c32b84..6d2bf71b52f 100644 --- a/hw/net/fsl_etsec/rings.c +++ b/hw/net/fsl_etsec/rings.c @@ -26,6 +26,7 @@ #include "qemu/log.h" #include "etsec.h" #include "registers.h" +#include "system/physmem.h" #include "exec/cpu-common.h" =20 /* #define ETSEC_RING_DEBUG */ @@ -111,7 +112,7 @@ static void read_buffer_descriptor(eTSEC *etsec, assert(bd !=3D NULL); =20 RING_DEBUG("READ Buffer Descriptor @ 0x" HWADDR_FMT_plx"\n", addr); - cpu_physical_memory_read(addr, + physical_memory_read(addr, bd, sizeof(eTSEC_rxtx_bd)); =20 @@ -143,7 +144,7 @@ static void write_buffer_descriptor(eTSEC *etse= c, } =20 RING_DEBUG("Write Buffer Descriptor @ 0x" HWADDR_FMT_plx"\n", addr); - cpu_physical_memory_write(addr, + physical_memory_write(addr, bd, sizeof(eTSEC_rxtx_bd)); } @@ -240,7 +241,7 @@ static void process_tx_bd(eTSEC *etsec, etsec->tx_buffer =3D g_realloc(etsec->tx_buffer, etsec->tx_buffer_len + bd->length); tmp_buff =3D etsec->tx_buffer + etsec->tx_buffer_len; - cpu_physical_memory_read(bd->bufptr + tbdbth, tmp_buff, bd->length); + physical_memory_read(bd->bufptr + tbdbth, tmp_buff, bd->length); =20 /* Update buffer length */ etsec->tx_buffer_len +=3D bd->length; @@ -401,7 +402,7 @@ static void fill_rx_bd(eTSEC *etsec, /* This operation will only write FCB */ if (etsec->rx_fcb_size !=3D 0) { =20 - cpu_physical_memory_write(bufptr, etsec->rx_fcb, etsec->rx_fcb_siz= e); + physical_memory_write(bufptr, etsec->rx_fcb, etsec->rx_fcb_size); =20 bufptr +=3D etsec->rx_fcb_size; bd->length +=3D etsec->rx_fcb_size; @@ -417,7 +418,7 @@ static void fill_rx_bd(eTSEC *etsec, =20 /* This operation can only write packet data and no padding */ if (to_write > 0) { - cpu_physical_memory_write(bufptr, *buf, to_write); + physical_memory_write(bufptr, *buf, to_write); =20 *buf +=3D to_write; bufptr +=3D to_write; @@ -439,7 +440,7 @@ static void fill_rx_bd(eTSEC *etsec, etsec->rx_padding -=3D rem; *size -=3D rem; bd->length +=3D rem; - cpu_physical_memory_write(bufptr, padd, rem); + physical_memory_write(bufptr, padd, rem); } } } diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c index 79a5c4385c6..9df359eae87 100644 --- a/hw/net/mcf_fec.c +++ b/hw/net/mcf_fec.c @@ -8,6 +8,7 @@ =20 #include "qemu/osdep.h" #include "qemu/log.h" +#include "system/physmem.h" #include "hw/core/irq.h" #include "net/net.h" #include "qemu/module.h" @@ -175,7 +176,7 @@ typedef struct { =20 static void mcf_fec_read_bd(mcf_fec_bd *bd, uint32_t addr) { - cpu_physical_memory_read(addr, bd, sizeof(*bd)); + physical_memory_read(addr, bd, sizeof(*bd)); be16_to_cpus(&bd->flags); be16_to_cpus(&bd->length); be32_to_cpus(&bd->data); @@ -187,7 +188,7 @@ static void mcf_fec_write_bd(mcf_fec_bd *bd, uint32_t a= ddr) tmp.flags =3D cpu_to_be16(bd->flags); tmp.length =3D cpu_to_be16(bd->length); tmp.data =3D cpu_to_be32(bd->data); - cpu_physical_memory_write(addr, &tmp, sizeof(tmp)); + physical_memory_write(addr, &tmp, sizeof(tmp)); } =20 static void mcf_fec_update(mcf_fec_state *s) @@ -260,7 +261,7 @@ static void mcf_fec_do_tx(mcf_fec_state *s) len =3D FEC_MAX_FRAME_SIZE - frame_size; s->eir |=3D FEC_INT_BABT; } - cpu_physical_memory_read(bd.data, ptr, len); + physical_memory_read(bd.data, ptr, len); ptr +=3D len; frame_size +=3D len; if (bd.flags & FEC_BD_L) { @@ -596,10 +597,10 @@ static ssize_t mcf_fec_receive(NetClientState *nc, co= nst uint8_t *buf, size_t si if (size < 4) buf_len +=3D size - 4; buf_addr =3D bd.data; - cpu_physical_memory_write(buf_addr, buf, buf_len); + physical_memory_write(buf_addr, buf, buf_len); buf +=3D buf_len; if (size < 4) { - cpu_physical_memory_write(buf_addr + buf_len, crc_ptr, 4 - siz= e); + physical_memory_write(buf_addr + buf_len, crc_ptr, 4 - size); crc_ptr +=3D 4 - size; } bd.flags &=3D ~FEC_BD_E; diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index a25f8eccff3..5a07bcde09d 100644 --- a/hw/net/opencores_eth.c +++ b/hw/net/opencores_eth.c @@ -32,6 +32,7 @@ */ =20 #include "qemu/osdep.h" +#include "system/physmem.h" #include "hw/core/irq.h" #include "hw/net/mii.h" #include "hw/core/qdev-properties.h" @@ -431,7 +432,7 @@ static ssize_t open_eth_receive(NetClientState *nc, } #endif =20 - cpu_physical_memory_write(desc->buf_ptr, buf, copy_size); + physical_memory_write(desc->buf_ptr, buf, copy_size); =20 if (GET_REGBIT(s, MODER, PAD) && copy_size < minfl) { if (minfl - copy_size > fcsl) { @@ -443,7 +444,7 @@ static ssize_t open_eth_receive(NetClientState *nc, size_t zero_sz =3D minfl - copy_size < sizeof(zero) ? minfl - copy_size : sizeof(zero); =20 - cpu_physical_memory_write(desc->buf_ptr + copy_size, + physical_memory_write(desc->buf_ptr + copy_size, zero, zero_sz); copy_size +=3D zero_sz; } @@ -453,7 +454,7 @@ static ssize_t open_eth_receive(NetClientState *nc, * Don't do it if the frame is cut at the MAXFL or padded with 4 or * more bytes to the MINFL. */ - cpu_physical_memory_write(desc->buf_ptr + copy_size, zero, fcsl); + physical_memory_write(desc->buf_ptr + copy_size, zero, fcsl); copy_size +=3D fcsl; =20 SET_FIELD(desc->len_flags, RXD_LEN, copy_size); @@ -509,7 +510,7 @@ static void open_eth_start_xmit(OpenEthState *s, desc *= tx) if (len > tx_len) { len =3D tx_len; } - cpu_physical_memory_read(tx->buf_ptr, buf, len); + physical_memory_read(tx->buf_ptr, buf, len); if (tx_len > len) { memset(buf + len, 0, tx_len - len); } diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c index 3af7e6ecbec..b0f9fe8633f 100644 --- a/hw/nvram/spapr_nvram.c +++ b/hw/nvram/spapr_nvram.c @@ -30,6 +30,7 @@ =20 #include "system/block-backend.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/system.h" #include "system/runstate.h" #include "migration/vmstate.h" @@ -89,9 +90,9 @@ static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachin= eState *spapr, =20 assert(nvram->buf); =20 - membuf =3D cpu_physical_memory_map(buffer, &len, true); + membuf =3D physical_memory_map(buffer, &len, true); memcpy(membuf, nvram->buf + offset, len); - cpu_physical_memory_unmap(membuf, len, 1, len); + physical_memory_unmap(membuf, len, 1, len); =20 rtas_st(rets, 0, RTAS_OUT_SUCCESS); rtas_st(rets, 1, len); @@ -127,7 +128,7 @@ static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMach= ineState *spapr, return; } =20 - membuf =3D cpu_physical_memory_map(buffer, &len, false); + membuf =3D physical_memory_map(buffer, &len, false); =20 ret =3D 0; if (nvram->blk) { @@ -137,7 +138,7 @@ static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMach= ineState *spapr, assert(nvram->buf); memcpy(nvram->buf + offset, membuf, len); =20 - cpu_physical_memory_unmap(membuf, len, 0, len); + physical_memory_unmap(membuf, len, 0, len); =20 rtas_st(rets, 0, (ret < 0) ? RTAS_OUT_HW_ERROR : RTAS_OUT_SUCCESS); rtas_st(rets, 1, (ret < 0) ? 0 : len); diff --git a/hw/ppc/amigaone.c b/hw/ppc/amigaone.c index 9fba5ca03a6..2e94e80b569 100644 --- a/hw/ppc/amigaone.c +++ b/hw/ppc/amigaone.c @@ -22,6 +22,7 @@ #include "hw/i2c/smbus_eeprom.h" #include "exec/cpu-common.h" #include "system/block-backend.h" +#include "system/physmem.h" #include "system/qtest.h" #include "system/reset.h" #include "kvm_ppc.h" @@ -231,7 +232,7 @@ static void create_bd_info(hwaddr addr, ram_addr_t ram_= size) bd->bi_busfreq =3D cpu_to_be32(BUS_FREQ_HZ); bd->bi_baudrate =3D cpu_to_be32(115200); =20 - cpu_physical_memory_write(addr, bd, sizeof(*bd)); + physical_memory_write(addr, bd, sizeof(*bd)); } =20 static void amigaone_cpu_reset(void *opaque) @@ -386,7 +387,7 @@ static void amigaone_init(MachineState *machine) size_t len =3D strlen(machine->kernel_cmdline); =20 loadaddr =3D bi->bd_info + 1 * MiB; - cpu_physical_memory_write(loadaddr, machine->kernel_cmdline, len += 1); + physical_memory_write(loadaddr, machine->kernel_cmdline, len + 1); bi->cmdline_start =3D loadaddr; bi->cmdline_end =3D loadaddr + len + 1; /* including terminating '= \0' */ } diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 5be2f2095f6..1876882a040 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -29,6 +29,7 @@ #include "hw/char/serial-mm.h" #include "hw/pci/pci.h" #include "system/block-backend-io.h" +#include "system/physmem.h" #include "system/system.h" #include "system/kvm.h" #include "system/reset.h" @@ -661,7 +662,7 @@ static int ppce500_load_device_tree(PPCE500MachineState= *pms, =20 done: if (!dry_run) { - cpu_physical_memory_write(addr, fdt, fdt_size); + physical_memory_write(addr, fdt, fdt_size); =20 /* Set machine->fdt for 'dumpdtb' QMP/HMP command */ g_free(machine->fdt); diff --git a/hw/ppc/pegasos.c b/hw/ppc/pegasos.c index ac9fc5a6542..9d7e279123b 100644 --- a/hw/ppc/pegasos.c +++ b/hw/ppc/pegasos.c @@ -21,6 +21,7 @@ #include "hw/ide/pci.h" #include "hw/i2c/smbus_eeprom.h" #include "hw/core/qdev-properties.h" +#include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" #include "system/qtest.h" @@ -314,22 +315,22 @@ static void pegasos_init(MachineState *machine) =20 static void pegasos_superio_write(uint8_t addr, uint8_t val) { - cpu_physical_memory_write(0xfe0003f0, &addr, 1); - cpu_physical_memory_write(0xfe0003f1, &val, 1); + physical_memory_write(0xfe0003f0, &addr, 1); + physical_memory_write(0xfe0003f1, &val, 1); } =20 static void pegasos1_pci_config_write(PegasosMachineState *pm, int bus, uint32_t addr, uint32_t len, uint32_= t val) { addr |=3D BIT(31); - cpu_physical_memory_write(0xfec00cf8, &addr, 4); - cpu_physical_memory_write(0xfee00cfc, &val, len); + physical_memory_write(0xfec00cf8, &addr, 4); + physical_memory_write(0xfee00cfc, &val, len); } =20 static void pegasos1_chipset_reset(PegasosMachineState *pm) { uint8_t elcr =3D 0x2e; - cpu_physical_memory_write(0xfe0004d1, &elcr, sizeof(elcr)); + physical_memory_write(0xfe0004d1, &elcr, sizeof(elcr)); =20 pegasos1_pci_config_write(pm, 0, PCI_COMMAND, 2, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 8df697da94c..62812f22f8c 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -25,6 +25,7 @@ #include "qemu/units.h" #include "qemu/cutils.h" #include "qapi/error.h" +#include "system/physmem.h" #include "system/qtest.h" #include "system/system.h" #include "system/numa.h" @@ -843,11 +844,11 @@ static void pnv_reset(MachineState *machine, ResetTyp= e type) .thread_size =3D cpu_to_be32(sizeof(MpiplPreservedCPUState)), }; =20 - cpu_physical_memory_write(PROC_DUMP_AREA_OFF, &proc_area, + physical_memory_write(PROC_DUMP_AREA_OFF, &proc_area, sizeof(proc_area)); } =20 - cpu_physical_memory_write(PNV_FDT_ADDR, fdt, fdt_totalsize(fdt)); + physical_memory_write(PNV_FDT_ADDR, fdt, fdt_totalsize(fdt)); =20 /* Free previous device tree set by pnv_init/reset/machine_init_done */ g_free(machine->fdt); diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 634046506e8..016c756c19e 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -18,6 +18,7 @@ #include "hw/core/qdev-properties.h" #include "hw/pci/pci.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "system/reset.h" #include "target/ppc/cpu.h" #include "ppc440.h" @@ -606,9 +607,9 @@ static void dcr_write_dma(void *opaque, int dcrn, uint3= 2_t val) width =3D 1 << ((val & DMA0_CR_PW) >> 25); xferlen =3D count * width; wlen =3D rlen =3D xferlen; - rptr =3D cpu_physical_memory_map(dma->ch[chnl].sa, &rl= en, + rptr =3D physical_memory_map(dma->ch[chnl].sa, &rlen, false); - wptr =3D cpu_physical_memory_map(dma->ch[chnl].da, &wl= en, + wptr =3D physical_memory_map(dma->ch[chnl].da, &wlen, true); if (rptr && rlen =3D=3D xferlen && wptr && wlen =3D=3D= xferlen) { if (!(val & DMA0_CR_DEC) && @@ -631,10 +632,10 @@ static void dcr_write_dma(void *opaque, int dcrn, uin= t32_t val) } } if (wptr) { - cpu_physical_memory_unmap(wptr, wlen, 1, didx); + physical_memory_unmap(wptr, wlen, 1, didx); } if (rptr) { - cpu_physical_memory_unmap(rptr, rlen, 0, sidx); + physical_memory_unmap(rptr, rlen, 0, sidx); } } } diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index f0e99bb5be7..b79828b4e90 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -38,6 +38,7 @@ #include "system/system.h" #include "system/hostmem.h" #include "system/numa.h" +#include "system/physmem.h" #include "system/tcg.h" #include "system/qtest.h" #include "system/reset.h" @@ -1858,7 +1859,7 @@ static void spapr_machine_reset(MachineState *machine= , ResetType type) =20 spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, 0, fdt_addr, 0); - cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); + physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); } =20 g_free(spapr->fdt_blob); diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c index 9bc65c760ea..5c2150b71c8 100644 --- a/hw/ppc/spapr_drc.c +++ b/hw/ppc/spapr_drc.c @@ -25,6 +25,7 @@ #include "hw/ppc/spapr_nvdimm.h" #include "exec/cpu-common.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/reset.h" #include "trace.h" =20 @@ -1150,7 +1151,7 @@ out: static void configure_connector_st(target_ulong addr, target_ulong offset, const void *buf, size_t len) { - cpu_physical_memory_write(ppc64_phys_to_real(addr + offset), + physical_memory_write(ppc64_phys_to_real(addr + offset), buf, MIN(len, CC_WA_LEN - offset)); } =20 diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index ab23e3f477b..eb4d360122a 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/runstate.h" =20 #include "hw/ppc/fdt.h" @@ -855,9 +856,9 @@ static void spapr_mce_dispatch_elog(SpaprMachineState *= spapr, PowerPCCPU *cpu, =20 stq_be_phys(&address_space_memory, rtas_addr + RTAS_ERROR_LOG_OFFSET, env->gpr[3]); - cpu_physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + + physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + sizeof(env->gpr[3]), &log, sizeof(log)); - cpu_physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + + physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + sizeof(env->gpr[3]) + sizeof(log), ext_elog, sizeof(*ext_elog)); g_free(ext_elog); @@ -964,8 +965,8 @@ static void check_exception(PowerPCCPU *cpu, SpaprMachi= neState *spapr, =20 header.summary =3D cpu_to_be32(event->summary); header.extended_length =3D cpu_to_be32(event->extended_length); - cpu_physical_memory_write(buf, &header, sizeof(header)); - cpu_physical_memory_write(buf + sizeof(header), event->extended_log, + physical_memory_write(buf, &header, sizeof(header)); + physical_memory_write(buf + sizeof(header), event->extended_log, event->extended_length); rtas_st(rets, 0, RTAS_OUT_SUCCESS); g_free(event->extended_log); diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 60ba215e861..23bcd788daf 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -2,6 +2,7 @@ #include "qemu/cutils.h" #include "qapi/error.h" #include "system/hw_accel.h" +#include "system/physmem.h" #include "system/runstate.h" #include "system/tcg.h" #include "qemu/log.h" @@ -273,7 +274,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprM= achineState *spapr, if (!is_ram_address(spapr, dst) || (dst & ~TARGET_PAGE_MASK) !=3D 0) { return H_PARAMETER; } - pdst =3D cpu_physical_memory_map(dst, &len, true); + pdst =3D physical_memory_map(dst, &len, true); if (!pdst || len !=3D TARGET_PAGE_SIZE) { return H_PARAMETER; } @@ -284,13 +285,13 @@ static target_ulong h_page_init(PowerPCCPU *cpu, Spap= rMachineState *spapr, ret =3D H_PARAMETER; goto unmap_out; } - psrc =3D cpu_physical_memory_map(src, &len, false); + psrc =3D physical_memory_map(src, &len, false); if (!psrc || len !=3D TARGET_PAGE_SIZE) { ret =3D H_PARAMETER; goto unmap_out; } memcpy(pdst, psrc, len); - cpu_physical_memory_unmap(psrc, len, 0, len); + physical_memory_unmap(psrc, len, 0, len); } else if (flags & H_ZERO_PAGE) { memset(pdst, 0, len); /* Just clear the destination page = */ } @@ -309,7 +310,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprM= achineState *spapr, } =20 unmap_out: - cpu_physical_memory_unmap(pdst, TARGET_PAGE_SIZE, 1, len); + physical_memory_unmap(pdst, TARGET_PAGE_SIZE, 1, len); return ret; } =20 @@ -1382,8 +1383,8 @@ static target_ulong h_client_architecture_support(Pow= erPCCPU *cpu, spapr->fdt_size =3D fdt_totalsize(spapr->fdt_blob); spapr->fdt_initial_size =3D spapr->fdt_size; =20 - cpu_physical_memory_write(fdt_buf, &hdr, sizeof(hdr)); - cpu_physical_memory_write(fdt_buf + sizeof(hdr), spapr->fdt_blob, + physical_memory_write(fdt_buf, &hdr, sizeof(hdr)); + physical_memory_write(fdt_buf + sizeof(hdr), spapr->fdt_blob, spapr->fdt_size); trace_spapr_cas_continue(spapr->fdt_size + sizeof(hdr)); } @@ -1487,7 +1488,7 @@ static target_ulong h_update_dt(PowerPCCPU *cpu, Spap= rMachineState *spapr, unsigned cb; void *fdt; =20 - cpu_physical_memory_read(dt, &hdr, sizeof(hdr)); + physical_memory_read(dt, &hdr, sizeof(hdr)); cb =3D fdt32_to_cpu(hdr.totalsize); =20 /* Check that the fdt did not grow out of proportion */ @@ -1498,7 +1499,7 @@ static target_ulong h_update_dt(PowerPCCPU *cpu, Spap= rMachineState *spapr, } =20 fdt =3D g_malloc0(cb); - cpu_physical_memory_read(dt, fdt, cb); + physical_memory_read(dt, fdt, cb); =20 /* Check the fdt consistency */ if (fdt_check_full(fdt, cb)) { diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 0871425237e..328fc27c400 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -32,6 +32,7 @@ #include "system/device_tree.h" #include "system/cpus.h" #include "system/hw_accel.h" +#include "system/physmem.h" #include "system/runstate.h" #include "system/qtest.h" #include "kvm_ppc.h" @@ -279,7 +280,7 @@ static inline int sysparm_st(target_ulong addr, target_= ulong len, return RTAS_OUT_SYSPARM_PARAM_ERROR; } stw_be_phys(&address_space_memory, phys, vallen); - cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); + physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); return RTAS_OUT_SUCCESS; } =20 @@ -441,7 +442,7 @@ static void rtas_ibm_os_term(PowerPCCPU *cpu, return trigger_fadump_boot(spapr, rets); } =20 - cpu_physical_memory_read(msgaddr, msg, sizeof(msg) - 1); + physical_memory_read(msgaddr, msg, sizeof(msg) - 1); msg[sizeof(msg) - 1] =3D 0; =20 error_report("OS terminated: %s", msg); diff --git a/hw/ppc/spapr_tpm_proxy.c b/hw/ppc/spapr_tpm_proxy.c index 361a3dc817d..19889e80bc1 100644 --- a/hw/ppc/spapr_tpm_proxy.c +++ b/hw/ppc/spapr_tpm_proxy.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/error-report.h" +#include "system/physmem.h" #include "system/reset.h" #include "hw/ppc/spapr.h" #include "hw/core/qdev-properties.h" @@ -69,7 +70,7 @@ static ssize_t tpm_execute(SpaprTpmProxy *tpm_proxy, targ= et_ulong *args) } } =20 - cpu_physical_memory_read(data_in, buf_in, data_in_size); + physical_memory_read(data_in, buf_in, data_in_size); =20 do { ret =3D write(tpm_proxy->host_fd, buf_in, data_in_size); @@ -94,7 +95,7 @@ static ssize_t tpm_execute(SpaprTpmProxy *tpm_proxy, targ= et_ulong *args) return H_RESOURCE; } =20 - cpu_physical_memory_write(data_out, buf_out, ret); + physical_memory_write(data_out, buf_out, ret); args[0] =3D ret; =20 return H_SUCCESS; diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index d10d9135890..09686360e16 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -30,6 +30,7 @@ #include "hw/core/sysbus.h" #include "hw/char/serial-mm.h" #include "hw/block/flash.h" +#include "system/physmem.h" #include "system/system.h" #include "system/reset.h" #include "hw/core/boards.h" @@ -174,7 +175,7 @@ static int xilinx_load_device_tree(MachineState *machin= e, machine->kernel_cmdline); if (r < 0) fprintf(stderr, "couldn't set /chosen/bootargs\n"); - cpu_physical_memory_write(addr, fdt, fdt_size); + physical_memory_write(addr, fdt, fdt_size); =20 /* Set machine->fdt for 'dumpdtb' QMP/HMP command */ machine->fdt =3D fdt; diff --git a/hw/s390x/css.c b/hw/s390x/css.c index ecd28fed5c3..96d5378f3c1 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -15,6 +15,7 @@ #include "qemu/bitops.h" #include "qemu/error-report.h" #include "system/address-spaces.h" +#include "system/physmem.h" #include "hw/s390x/ioinst.h" #include "hw/core/qdev-properties.h" #include "hw/s390x/css.h" @@ -755,13 +756,13 @@ static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt= 1) CCW1 ret; =20 if (fmt1) { - cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1)); + physical_memory_read(addr, &tmp1, sizeof(tmp1)); ret.cmd_code =3D tmp1.cmd_code; ret.flags =3D tmp1.flags; ret.count =3D be16_to_cpu(tmp1.count); ret.cda =3D be32_to_cpu(tmp1.cda); } else { - cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0)); + physical_memory_read(addr, &tmp0, sizeof(tmp0)); if ((tmp0.cmd_code & 0x0f) =3D=3D CCW_CMD_TIC) { ret.cmd_code =3D CCW_CMD_TIC; ret.flags =3D 0; diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 1babcd2b7dd..fa50749a7d3 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -15,6 +15,7 @@ #include "qemu/osdep.h" #include "qemu/datadir.h" #include "qapi/error.h" +#include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" #include "system/tcg.h" @@ -431,7 +432,7 @@ static uint64_t s390_ipl_map_iplb_chain(IplParameterBlo= ck *iplb_chain) uint64_t len =3D sizeof(IplParameterBlock) * count; uint64_t chain_addr =3D find_iplb_chain_addr(ipl->bios_start_addr, cou= nt); =20 - cpu_physical_memory_write(chain_addr, iplb_chain, len); + physical_memory_write(chain_addr, iplb_chain, len); return chain_addr; } =20 @@ -722,13 +723,13 @@ static void s390_ipl_prepare_qipl(S390CPU *cpu) uint8_t *addr; uint64_t len =3D 4096; =20 - addr =3D cpu_physical_memory_map(cpu->env.psa, &len, true); + addr =3D physical_memory_map(cpu->env.psa, &len, true); if (!addr || len < QIPL_ADDRESS + sizeof(QemuIplParameters)) { error_report("Cannot set QEMU IPL parameters"); return; } memcpy(addr + QIPL_ADDRESS, &ipl->qipl, sizeof(QemuIplParameters)); - cpu_physical_memory_unmap(addr, len, 1, len); + physical_memory_unmap(addr, len, 1, len); } =20 int s390_ipl_prepare_pv_header(struct S390PVResponse *pv_resp, Error **err= p) @@ -738,7 +739,7 @@ int s390_ipl_prepare_pv_header(struct S390PVResponse *p= v_resp, Error **errp) void *hdr =3D g_malloc(ipib_pv->pv_header_len); int rc; =20 - cpu_physical_memory_read(ipib_pv->pv_header_addr, hdr, + physical_memory_read(ipib_pv->pv_header_addr, hdr, ipib_pv->pv_header_len); rc =3D s390_pv_set_sec_parms((uintptr_t)hdr, ipib_pv->pv_header_len, pv_resp, errp); diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index eb2b6185db0..eff980fdfe9 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -28,6 +28,7 @@ #include "exec/cpu-common.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" =20 @@ -668,7 +669,7 @@ static bool set_ind_bit_atomic(uint64_t ind_loc, uint8_= t to_be_set) /* avoid multiple fetches */ uint8_t volatile *ind_addr; =20 - ind_addr =3D cpu_physical_memory_map(ind_loc, &len, true); + ind_addr =3D physical_memory_map(ind_loc, &len, true); if (!ind_addr) { s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); return false; @@ -678,7 +679,7 @@ static bool set_ind_bit_atomic(uint64_t ind_loc, uint8_= t to_be_set) expected =3D actual; actual =3D qatomic_cmpxchg(ind_addr, expected, expected | to_be_se= t); } while (actual !=3D expected); - cpu_physical_memory_unmap((void *)ind_addr, len, 1, len); + physical_memory_unmap((void *)ind_addr, len, 1, len); =20 return (actual & to_be_set) ? false : true; } diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index cdad862ec23..d82874ed27e 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -14,6 +14,7 @@ #include "qapi/error.h" #include "system/address-spaces.h" #include "system/kvm.h" +#include "system/physmem.h" #include "net/net.h" #include "hw/virtio/virtio.h" #include "migration/qemu-file-types.h" @@ -834,7 +835,7 @@ static uint8_t virtio_set_ind_atomic(SubchDev *sch, uin= t64_t ind_loc, /* avoid multiple fetches */ uint8_t volatile *ind_addr; =20 - ind_addr =3D cpu_physical_memory_map(ind_loc, &len, true); + ind_addr =3D physical_memory_map(ind_loc, &len, true); if (!ind_addr) { error_report("%s(%x.%x.%04x): unable to access indicator", __func__, sch->cssid, sch->ssid, sch->schid); @@ -846,7 +847,7 @@ static uint8_t virtio_set_ind_atomic(SubchDev *sch, uin= t64_t ind_loc, actual =3D qatomic_cmpxchg(ind_addr, expected, expected | to_be_se= t); } while (actual !=3D expected); trace_virtio_ccw_set_ind(ind_loc, actual, actual | to_be_set); - cpu_physical_memory_unmap((void *)ind_addr, len, 1, len); + physical_memory_unmap((void *)ind_addr, len, 1, len); =20 return actual; } diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index 11ae6b9b747..4398aa54990 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -34,7 +34,7 @@ #include "scsi/constants.h" #include "hw/pci/msi.h" #include "hw/core/qdev-properties.h" -#include "exec/cpu-common.h" +#include "system/physmem.h" #include "vmw_pvscsi.h" #include "trace.h" #include "qom/object.h" @@ -395,7 +395,7 @@ pvscsi_cmp_ring_put(PVSCSIState *s, struct PVSCSIRingCm= pDesc *cmp_desc) =20 cmp_descr_pa =3D pvscsi_ring_pop_cmp_descr(&s->rings); trace_pvscsi_cmp_ring_put(cmp_descr_pa); - cpu_physical_memory_write(cmp_descr_pa, cmp_desc, sizeof(*cmp_desc)); + physical_memory_write(cmp_descr_pa, cmp_desc, sizeof(*cmp_desc)); } =20 static void @@ -405,7 +405,7 @@ pvscsi_msg_ring_put(PVSCSIState *s, struct PVSCSIRingMs= gDesc *msg_desc) =20 msg_descr_pa =3D pvscsi_ring_pop_msg_descr(&s->rings); trace_pvscsi_msg_ring_put(msg_descr_pa); - cpu_physical_memory_write(msg_descr_pa, msg_desc, sizeof(*msg_desc)); + physical_memory_write(msg_descr_pa, msg_desc, sizeof(*msg_desc)); } =20 static void @@ -480,7 +480,7 @@ pvscsi_get_next_sg_elem(PVSCSISGState *sg) { struct PVSCSISGElement elem; =20 - cpu_physical_memory_read(sg->elemAddr, &elem, sizeof(elem)); + physical_memory_read(sg->elemAddr, &elem, sizeof(elem)); if ((elem.flags & ~PVSCSI_KNOWN_FLAGS) !=3D 0) { /* * There is PVSCSI_SGE_FLAG_CHAIN_ELEMENT flag described in @@ -501,7 +501,7 @@ pvscsi_write_sense(PVSCSIRequest *r, uint8_t *sense, in= t len) { r->cmp.senseLen =3D MIN(r->req.senseLen, len); r->sense_key =3D sense[(sense[0] & 2) ? 1 : 2]; - cpu_physical_memory_write(r->req.senseAddr, sense, r->cmp.senseLen); + physical_memory_write(r->req.senseAddr, sense, r->cmp.senseLen); } =20 static void @@ -758,7 +758,7 @@ pvscsi_process_io(PVSCSIState *s) smp_rmb(); =20 trace_pvscsi_process_io(next_descr_pa); - cpu_physical_memory_read(next_descr_pa, &descr, sizeof(descr)); + physical_memory_read(next_descr_pa, &descr, sizeof(descr)); pvscsi_process_request_descriptor(s, &descr); } =20 diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c index 445f33e1726..7df93445002 100644 --- a/hw/xen/xen_pt_graphics.c +++ b/hw/xen/xen_pt_graphics.c @@ -5,8 +5,8 @@ #include "qapi/error.h" #include "hw/xen/xen_pt.h" #include "hw/xen/xen_igd.h" -#include "exec/cpu-common.h" #include "xen-host-pci-device.h" +#include "system/physmem.h" =20 static unsigned long igd_guest_opregion; static unsigned long igd_host_opregion; @@ -223,7 +223,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHos= tPCIDevice *dev, } =20 /* Currently we fixed this address as a primary for legacy BIOS. */ - cpu_physical_memory_write(0xc0000, bios, bios_size); + physical_memory_write(0xc0000, bios, bios_size); } =20 uint32_t igd_read_opregion(XenPCIPassthroughState *s) diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 33a2d9485cf..8f85fc8ddb4 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -35,6 +35,7 @@ #include "hw/core/qdev-properties.h" #include "elf.h" #include "system/memory.h" +#include "system/physmem.h" #include "exec/tswap.h" #include "hw/char/serial-mm.h" #include "net/net.h" @@ -370,7 +371,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, M= achineState *machine) exit(EXIT_FAILURE); } =20 - cpu_physical_memory_write(cur_lowmem, fdt, fdt_size); + physical_memory_write(cur_lowmem, fdt, fdt_size); cur_tagptr =3D put_tag(cur_tagptr, BP_TAG_FDT, sizeof(dtb_addr), &dtb_addr); cur_lowmem =3D QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4 * KiB); @@ -449,7 +450,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, M= achineState *machine) =20 memcpy(boot + 4, &entry_pc, sizeof(entry_pc)); memcpy(boot + 8, &entry_a2, sizeof(entry_a2)); - cpu_physical_memory_write(env->pc, boot, boot_sz); + physical_memory_write(env->pc, boot, boot_sz); } } else { if (flash) { diff --git a/system/cpus.c b/system/cpus.c index b4c7f94332d..49f6daec3cd 100644 --- a/system/cpus.c +++ b/system/cpus.c @@ -40,6 +40,7 @@ #include "system/cpus.h" #include "qemu/guest-random.h" #include "hw/core/nmi.h" +#include "system/physmem.h" #include "system/replay.h" #include "system/runstate.h" #include "system/cpu-timers.h" @@ -898,7 +899,7 @@ void qmp_pmemsave(uint64_t addr, uint64_t size, const c= har *filename, l =3D sizeof(buf); if (l > size) l =3D size; - cpu_physical_memory_read(addr, buf, l); + physical_memory_read(addr, buf, l); if (fwrite(buf, 1, l, f) !=3D l) { error_setg(errp, "writing memory to '%s' failed", filename); diff --git a/system/physmem.c b/system/physmem.c index 9b3f461b123..883ac0f314b 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3477,13 +3477,13 @@ MemTxResult address_space_set(const AddressSpace *a= s, hwaddr addr, return error; } =20 -void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len) +void physical_memory_read(hwaddr addr, void *buf, hwaddr len) { address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, buf, len); } =20 -void cpu_physical_memory_write(hwaddr addr, const void *buf, hwaddr len) +void physical_memory_write(hwaddr addr, const void *buf, hwaddr len) { address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, buf, len); @@ -3808,16 +3808,14 @@ void address_space_unmap(AddressSpace *as, void *bu= ffer, hwaddr len, address_space_notify_map_clients(as); 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785923308158500 We mandate a compiler supporting C99 since 2019-01-17 in commit 7be41675f7c ("configure: Force the C standard to gnu99"), thus supporting flexible array members [*]. Remove what is now dead code. [*] https://www.gnu.org/software/c-intro-and-ref/manual/html_node/Flexible-= Array-Fields.html Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260615091308.4458-2-philmd@oss.qualcomm.com> --- include/hw/xen/interface/physdev.h | 2 +- include/hw/xen/interface/version.h | 5 ++--- include/hw/xen/interface/xen-compat.h | 2 -- include/hw/xen/interface/xen.h | 14 -------------- 4 files changed, 3 insertions(+), 20 deletions(-) diff --git a/include/hw/xen/interface/physdev.h b/include/hw/xen/interface/= physdev.h index f0c0d4727c0..ca2bcbfd159 100644 --- a/include/hw/xen/interface/physdev.h +++ b/include/hw/xen/interface/physdev.h @@ -283,7 +283,7 @@ struct physdev_pci_device_add { * First element ([0]) is PXM domain associated with the device (if * XEN_PCI_DEV_PXM is set) */ - uint32_t optarr[XEN_FLEX_ARRAY_DIM]; + uint32_t optarr[]; }; typedef struct physdev_pci_device_add physdev_pci_device_add_t; DEFINE_XEN_GUEST_HANDLE(physdev_pci_device_add_t); diff --git a/include/hw/xen/interface/version.h b/include/hw/xen/interface/= version.h index 9c78b4f3b6a..2f183c3efd4 100644 --- a/include/hw/xen/interface/version.h +++ b/include/hw/xen/interface/version.h @@ -77,9 +77,8 @@ typedef char xen_commandline_t[1024]; */ #define XENVER_build_id 10 struct xen_build_id { - uint32_t len; /* IN: size of buf[]. */ - unsigned char buf[XEN_FLEX_ARRAY_DIM]; - /* OUT: Variable length buffer with build_id.= */ + uint32_t len; /* IN: size of buf[]. */ + unsigned char buf[]; /* OUT: Variable length buffer with build_= id. */ }; typedef struct xen_build_id xen_build_id_t; =20 diff --git a/include/hw/xen/interface/xen-compat.h b/include/hw/xen/interfa= ce/xen-compat.h index 97fe6984989..582c0182367 100644 --- a/include/hw/xen/interface/xen-compat.h +++ b/include/hw/xen/interface/xen-compat.h @@ -24,6 +24,4 @@ #error "These header files do not support the requested interface version." #endif =20 -#define COMPAT_FLEX_ARRAY_DIM XEN_FLEX_ARRAY_DIM - #endif /* __XEN_PUBLIC_XEN_COMPAT_H__ */ diff --git a/include/hw/xen/interface/xen.h b/include/hw/xen/interface/xen.h index 920567e0062..a6f4aa61993 100644 --- a/include/hw/xen/interface/xen.h +++ b/include/hw/xen/interface/xen.h @@ -36,15 +36,6 @@ DEFINE_XEN_GUEST_HANDLE(uint64_t); DEFINE_XEN_GUEST_HANDLE(xen_pfn_t); DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); =20 -/* Define a variable length array (depends on compiler). */ -#if defined(__STDC_VERSION__) && __STDC_VERSION__ >=3D 199901L -#define XEN_FLEX_ARRAY_DIM -#elif defined(__GNUC__) -#define XEN_FLEX_ARRAY_DIM 0 -#else -#define XEN_FLEX_ARRAY_DIM 1 /* variable size */ -#endif - /* Turn a plain number into a C unsigned (long (long)) constant. */ #define __xen_mk_uint(x) x ## U #define __xen_mk_ulong(x) x ## UL @@ -986,13 +977,8 @@ typedef struct { ((d) >> 8) & 0xFF, ((d) >> 0) & 0xFF, \ e1, e2, e3, e4, e5, e6}} =20 -#if defined(__STDC_VERSION__) ? __STDC_VERSION__ >=3D 199901L : defined(__= GNUC__) #define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ ((xen_uuid_t)XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6)) -#else -#define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ - XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) -#endif /* __STDC_VERSION__ / __GNUC__ */ =20 #endif /* !__ASSEMBLY__ */ =20 --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785863; cv=none; d=zohomail.com; s=zohoarc; b=Fac2VAOPIwOfBtdo8P4E+YBrFgv+HIbgtuJOmCm15LqB90sP8e1R1g63Kw9de/hu0o1a95w4OMIlN2kqHYJODf/c7g0fVw8wuwCExMjcbayEJlSn+Ez8z5nvHSo0Dk7H7GW9Pg62SeH2Sa/D6h0c2rWGBdw7JV6aUn71F4NmgYY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785863; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=hBkxem0L7DWiKia5psfTtA2lXWcjA6cr5QosUow+Nfg=; b=ev+PoPwz3FvWWa4TnDheYb1zJNk4l4746hRGtPYC/+GvaKUIfhh3c/vGpjWBPdxtuS5dVFR2hB7jzxv43xcGqBqX5K7yGmTbLBkzd00cPMT/L8CYLw8JJA9gU0DxyCK9TZMN8LWcHcuaAInYgm4euROrK1swm3Fmp2d8aCBvPgU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785863043523.8394265638674; Thu, 18 Jun 2026 05:31:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBtA-0002Iu-Lc; Thu, 18 Jun 2026 08:30:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBt8-0002Df-Bp for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:31 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBt6-0000QU-RB for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:30 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs4Hp1334240 for ; Thu, 18 Jun 2026 12:30:28 GMT Received: from mail-ua1-f70.google.com (mail-ua1-f70.google.com [209.85.222.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev1wc340m-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:30:27 +0000 (GMT) Received: by mail-ua1-f70.google.com with SMTP id a1e0cc1a2514c-9661acbf65cso1144508241.2 for ; Thu, 18 Jun 2026 05:30:27 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785864528158500 We mandate a compiler supporting C11 since 2021-06-15 in commit d22797ce36a ("configure: Use -std=3Dgnu11"), thus the max_align_t type definition exists. Remove what is now dead code. Note, C11 provides aligned_alloc(). Using it is left as a future cleanup step. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Markus Armbruster Reviewed-by: Richard Henderson Message-Id: <20260615091308.4458-3-philmd@oss.qualcomm.com> --- qom/object.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/qom/object.c b/qom/object.c index 0ac201de4c1..f79b2cf3618 100644 --- a/qom/object.c +++ b/qom/object.c @@ -675,18 +675,6 @@ static void object_finalize(void *data) } } =20 -/* Find the minimum alignment guaranteed by the system malloc. */ -#if __STDC_VERSION__ >=3D 201112L -typedef max_align_t qemu_max_align_t; -#else -typedef union { - long l; - void *p; - double d; - long double ld; -} qemu_max_align_t; -#endif - static Object *object_new_with_type(Type type) { Object *obj; @@ -703,7 +691,7 @@ static Object *object_new_with_type(Type type) * Do not use qemu_memalign unless required. Depending on the * implementation, extra alignment implies extra overhead. */ - if (likely(align <=3D __alignof__(qemu_max_align_t))) { + if (likely(align <=3D __alignof__(max_align_t))) { obj =3D g_malloc(size); obj_free =3D g_free; } else { --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785848; cv=none; d=zohomail.com; s=zohoarc; b=l7eop7bhpQW9XfmDBE0SPqcuezG+dJM/29ijXiNaMI+Qs91aZabCExILbBLXlYPifFMq3ptlwvUCnH2wXwv2dgz5bDzD5L3z9O1R2YKPT0fFaHQN0Dp8vC6kEY/4u+FrUXIx37Zxw2zKvTjjBlT+OCQ5frenOYHxx981R3yio8c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785848; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=DkmJmDittXAYBnHFpAqmuE7kPMztE7vBYCLNl4CmZaw=; b=hgLywylfpWyIgEpOQpzyD91K8T3ZbabGYJyzn8qR7b9jVt7F35hxS0QGPCa7VDUeO75SM42cqjzsPd+gy5iL9UiGb/DoTQ3jMI54Zh0qKl52/dQADfuwcYkY/PoHyFOb5R0HD/fEFgxMoHGZfvca68+jd9jLgL0SPkU6PVacS9k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785848255861.9489784038007; Thu, 18 Jun 2026 05:30:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBt9-0002Fm-Ms; Thu, 18 Jun 2026 08:30:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBt6-0002CI-Nr for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:28 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBt5-0000Q8-8J for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:28 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArv9s1609171 for ; Thu, 18 Jun 2026 12:30:26 GMT Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0g7kjub-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:30:26 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-915b6b63056so198552285a.1 for ; Thu, 18 Jun 2026 05:30:26 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785850404158500 Include the missing 'qemu/bitops.h' header to avoid when refactoring unrelated headers: In file included from target/arm/internals.h:34: include/tcg/tcg-gvec-desc.h:48:12: error: call to undeclared function 'ex= tract32' 48 | return extract32(desc, SIMD_MAXSZ_SHIFT, SIMD_MAXSZ_BITS) * 8= + 8; | ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616153432.92939-2-philmd@oss.qualcomm.com> --- include/tcg/tcg-gvec-desc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/tcg/tcg-gvec-desc.h b/include/tcg/tcg-gvec-desc.h index 704bd864549..94c7d14b264 100644 --- a/include/tcg/tcg-gvec-desc.h +++ b/include/tcg/tcg-gvec-desc.h @@ -20,6 +20,8 @@ #ifndef TCG_TCG_GVEC_DESC_H #define TCG_TCG_GVEC_DESC_H =20 +#include "qemu/bitops.h" + /* * This configuration allows MAXSZ to represent 2048 bytes, and * OPRSZ to match MAXSZ, or represent the smaller values 8, 16, or 32. --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785977472158500 From: Philippe Mathieu-Daud=C3=A9 HVF should be able to handle task priority register accesses. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Zhao Liu Message-Id: <20250616090632.55214-1-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/helper.c b/target/i386/helper.c index 30f1fa41b32..c3cba04e142 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -566,7 +566,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess = access) X86CPU *cpu =3D env_archcpu(env); CPUState *cs =3D env_cpu(env); =20 - if (kvm_enabled() || whpx_enabled() || nvmm_enabled()) { + if (kvm_enabled() || whpx_enabled() || nvmm_enabled() || hvf_enabled()= ) { env->tpr_access_type =3D access; =20 cpu_interrupt(cs, CPU_INTERRUPT_TPR); --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785859; cv=none; d=zohomail.com; s=zohoarc; b=kxgKJbN2bZd1Al0HJrN+NSX2oY80MSAGc97CzqApCnLDlbqS73RR2ROAB+DMSk+M7+zVWbTCQ4nIbcNANSG8Dk1+BfY0WBoUkpJdr0cX/iNYGIHKVyXz1jGKku2xCdNRYlGk7rVzKcLstFEFFqnQxWgfeDWSueiCHX3Cdj/za/g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785859; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=UDPDfIWhoce2Ph4ljd90ZnLHH2Z1R5VRHULjQr4fJbg=; b=AlmQxuLpjNdPkBmFNCcKZJW+hrKaHnYzSRZsAkG4lTmeHNAH2JQ0ANMWQT2XyS8dY7nIXiDsq0ttBk6gtUDu+bAQcRKAEkXHtt3cButNHowsiQW8N72WK6iTLm32qrX58no2Yl0GoR6EvOBmkj2pybF3SIG7kqmZRjmIfs0zk8M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785859539452.70103242373; Thu, 18 Jun 2026 05:30:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBtL-0002hF-SY; Thu, 18 Jun 2026 08:30:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtK-0002aT-9s for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:42 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtI-0000WI-Pe for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:42 -0400 Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAtNCO1374287 for ; Thu, 18 Jun 2026 12:30:39 GMT Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev1rtu6s2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:30:39 +0000 (GMT) Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-918622c3c7bso254189785a.3 for ; Thu, 18 Jun 2026 05:30:39 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785860496158500 From: Philippe Mathieu-Daud=C3=A9 Commit 34c45d53026 ("target-arm: kvm - re-inject guest debug exceptions") removed CPU_INTERRUPT_EXITTB from KVM, but it also appears on HVF. Better to restrict it to TCG. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Pierrick Bouvier Message-Id: <20250630130937.3487-2-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 22e71a28042..a234aa031c0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9633,7 +9633,7 @@ void arm_cpu_do_interrupt(CPUState *cs) =20 arm_call_el_change_hook(cpu); =20 - if (!kvm_enabled()) { + if (tcg_enabled()) { cpu_set_interrupt(cs, CPU_INTERRUPT_EXITTB); } =20 --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785892; cv=none; d=zohomail.com; s=zohoarc; b=F2d8UVsmm9T9sVKCcNdiru5x+rCjryZpiB6Y9HB3XHa0w1qydwVSJwhQvNIbs8IyFv/djVC00nxH+uBkxDhtEYxWhJQk5VnJla2ZeME8hgxnfKOKus5k2ZzlYLUqNHfAatz16rpIAAJsiHvQKAw1YG4Kw08FhcMk3jg4pVOXgaQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785892; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=EA8ekpIUt39iaM+Gippsl80etLpcd761bN6C4P7iDyo=; b=goonQz3JaVwtoEmLQaAmKzWVvoYPWM1Iey4NNgaMPI//IfWcy0IcjsNgEWJspQt8Ae5se1OGPOoWWKgICs1H/UxVMaieKxjlydDNs2S72fh4wrc0NZ017qhC5xqm//Ro40q54RGLyUPGZogq++chfhXKoJwx4cx7oUifsjcozV4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178178589213775.44720140458469; Thu, 18 Jun 2026 05:31:32 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBtU-00034T-40; Thu, 18 Jun 2026 08:30:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtS-0002wC-35 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:50 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtQ-0000XG-0P for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:49 -0400 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65ICT23c1808409 for ; Thu, 18 Jun 2026 12:30:47 GMT Received: from mail-vs1-f69.google.com (mail-vs1-f69.google.com [209.85.217.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4eux2jvfsq-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:30:46 +0000 (GMT) Received: by mail-vs1-f69.google.com with SMTP id ada2fe7eead31-6cfd2462acbso1147766137.2 for ; Thu, 18 Jun 2026 05:30:46 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785894847158500 From: Philippe Mathieu-Daud=C3=A9 Commit 2a425aae0b5 ("target/arm: ensure PSCI register updates are flushed") manually sets %vcpu_dirty in hvf_handle_exception(), but these calls follow calls to cpu_synchronize_state() which itself sets %vcpu_dirty. Better have the generic CPU API handle this, but add a pair of assertions when serializing the accelerator state to be safe. Suggested-by: Alex Benn=C3=A9e Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-ID: <20260423170229.64655-13-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/hvf/hvf.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index d88cbe7c82a..a5b30b9ef0d 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -794,6 +794,8 @@ int hvf_arch_get_registers(CPUState *cpu) hv_simd_fp_uchar16_t fpval; int i, n; =20 + assert(!cpu->vcpu_dirty); + for (i =3D 0; i < ARRAY_SIZE(hvf_reg_match); i++) { ret =3D hv_vcpu_get_reg(cpu->accel->fd, hvf_reg_match[i].reg, &val= ); *(uint64_t *)((void *)env + hvf_reg_match[i].offset) =3D val; @@ -945,6 +947,8 @@ int hvf_arch_put_registers(CPUState *cpu) hv_simd_fp_uchar16_t fpval; int i, n; =20 + assert(cpu->vcpu_dirty); + /* * Set SVCR first because changing it will zero out Z/P (including NEO= N) * regs @@ -2498,7 +2502,6 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcp= u_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call ret= urns -1 */ env->xregs[0] =3D -1; } - cpu->vcpu_dirty =3D true; } else { trace_hvf_unknown_hvc(env->pc, env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); @@ -2515,7 +2518,6 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcp= u_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call ret= urns -1 */ env->xregs[0] =3D -1; } - cpu->vcpu_dirty =3D true; } else { trace_hvf_unknown_smc(env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785965; cv=none; d=zohomail.com; s=zohoarc; b=A5ISTmaDPXJal6kRhvziADLOnLLXsTENsZr0CbPm2E5yFzn+n9DEExmvkTOAcaoya+ycymCfvJnLmrlZ1+psXZZlKx1LSXN5f3nIixdFsnENelyHSXDkGEdqMjUVfh50QgLloFVcWB8Ra6Qvpu3H73kaoX/1EccuPRSwZB4HyEE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785965; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=eJM2CZYWBUadH5T6cRMc/LxptkPrHYD4Q8ouoHguk+Q=; b=XwjeMmz0AnMwIWMQfY6Ikfl8SNNsyWO7IRbVYOSbzZrKm0B5iDZ7ij5t/pMp4BY1xjko/yWidMCXqN2gGVAEZV/ygT3BpNBHIj+dCnetSdRVk+XWmJy39t5OprlaBihZl8wZ0cxZP+H3WIGvy8z0AycVWIu6prQ5+OkKYF8D1O4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785965863707.3401443481488; Thu, 18 Jun 2026 05:32:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBta-00038x-K1; Thu, 18 Jun 2026 08:30:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtZ-00038Y-Ic for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:57 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtX-0000cB-Vx for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:30:57 -0400 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArfpB3763670 for ; Thu, 18 Jun 2026 12:30:54 GMT Received: from mail-vs1-f70.google.com (mail-vs1-f70.google.com [209.85.217.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0vk3aw6-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:30:54 +0000 (GMT) Received: by mail-vs1-f70.google.com with SMTP id ada2fe7eead31-728f9ecd022so741269137.1 for ; Thu, 18 Jun 2026 05:30:54 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785967448158500 From: Philippe Mathieu-Daud=C3=A9 PMU is supported by TCG / HVF but not KVM. Make it explicit rewriting '!KVM' as 'TCG || HVF' (ignoring QTest, because vCPUs are not available there). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20251028054238.14949-57-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/cpu.c | 2 +- target/arm/machine.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 419e0b3ed41..86aae36ae55 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2183,7 +2183,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) if (arm_feature(env, ARM_FEATURE_PMU)) { pmu_init(cpu); =20 - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { arm_register_pre_el_change_hook(cpu, &pmu_pre_el_change, 0); arm_register_el_change_hook(cpu, &pmu_post_el_change, 0); } diff --git a/target/arm/machine.c b/target/arm/machine.c index fde3b3e8d75..89127e5d83c 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -3,7 +3,7 @@ #include "cpregs.h" #include "trace.h" #include "qemu/error-report.h" -#include "system/kvm.h" +#include "system/hvf.h" #include "system/tcg.h" #include "kvm_arm.h" #include "internals.h" @@ -983,7 +983,7 @@ static int cpu_pre_save(void *opaque) { ARMCPU *cpu =3D opaque; =20 - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_start(&cpu->env); } =20 @@ -1021,7 +1021,7 @@ static void cpu_post_save(void *opaque) { ARMCPU *cpu =3D opaque; =20 - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_finish(&cpu->env); } =20 @@ -1055,7 +1055,7 @@ static int cpu_pre_load(void *opaque) */ env->irq_line_state =3D UINT32_MAX; =20 - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_start(env); } =20 @@ -1234,7 +1234,7 @@ static int cpu_post_load(void *opaque, int version_id) } } =20 - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_finish(env); } =20 --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785986; cv=none; d=zohomail.com; s=zohoarc; b=dq0kTi+3XITHyzx1fCv1o/3ne51w5oEETd1H7p0bqagynhSI3o0qosQptp7em2bVQBjSUYTycOwD5FDfmJSDVdZVrRtY2G0YOVX0fuT7OOq3WyUD7XT2djNKBIN7jPyQhVaUvGxsdQO1GzzAn0sDd2voOCbtGnRr+pOc0Ct3HpA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785986; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=SkWy2cCfro5fILwyqdNmMjKTti2o3MLCOXnHNIeSWv8=; b=MSN2czmYWHwsr0pSEx0LbxGw0oVG1QZ2n3yA8tpUYL+4dywdZuhKyjvLNseZw8mf0TKwwY0jrUOe6o/6cVFczddD3+AYE61Rk3ww83B4xlp1AqhsJH8+1ddZEN4FgWLOvdaEHB5+bxmn+OL3BD9rNOxHzcwNk6i6Z3AEv8MW3w4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785986108533.4270428335188; Thu, 18 Jun 2026 05:33:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBth-0003W3-Az; Thu, 18 Jun 2026 08:31:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtg-0003UJ-0J for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:04 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBte-0000jO-IL for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:03 -0400 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArtA61536484 for ; Thu, 18 Jun 2026 12:31:01 GMT Received: from mail-vs1-f70.google.com (mail-vs1-f70.google.com [209.85.217.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev12kkcya-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:01 +0000 (GMT) Received: by mail-vs1-f70.google.com with SMTP id ada2fe7eead31-6cfd2462acbso1147930137.2 for ; Thu, 18 Jun 2026 05:31:01 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell Message-Id: <20260616153432.92939-3-philmd@oss.qualcomm.com> --- target/arm/ptw.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 8b54018c988..1470de30108 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -13,11 +13,13 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" +#ifdef CONFIG_TCG #include "accel/tcg/probe.h" +#include "target/arm/tcg/idau.h" +#endif #include "cpu.h" #include "internals.h" #include "cpu-features.h" -#include "target/arm/tcg/idau.h" =20 typedef struct S1Translate { /* @@ -2818,6 +2820,8 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, return (ptw->in_prot_check & ~result->f.prot) =3D=3D 0; } =20 +#ifdef CONFIG_TCG + static uint32_t *regime_rbar(CPUARMState *env, ARMMMUIdx mmu_idx, uint32_t secure) { @@ -3247,6 +3251,20 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, return ret; } =20 +#else /* !CONFIG_TCG */ + +static bool get_phys_addr_pmsav8(CPUARMState *env, + S1Translate *ptw, + uint32_t address, + MMUAccessType access_type, + GetPhysAddrResult *result, + ARMMMUFaultInfo *fi) +{ + g_assert_not_reached(); +} + +#endif /* !CONFIG_TCG */ + /* * Translate from the 4-bit stage 2 representation of * memory attributes (without cache-allocation hints) to --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786041; cv=none; d=zohomail.com; s=zohoarc; b=m/qz3D1HVEwLc9i5TmF9R+OFO16W8naY1CJk1QiFGcgj6IT+pBqPwk/X4i4dxT+g2H2bgytQL3/z1jcE3Vv8yqVVDSoUzP8cKZhoGRMehMOTUfKP2TJctAdQpMQ8lvUbiyFiXmf9S+pflqWiUAkXkovYWZgNCYFpHTvpESIxBos= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786041; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=EeSr3oYrmG5Eoy2J+HNce5ikm8sCvazxJLiAOdvyrBg=; b=B9clpXkeXnnznuZF+f/omzAmRupTbPx40mZoziuRi96TBG0wlQr5LZ1P07qW1Q/jiALg7ixtjy9YbjOxcykZ6bzHJ2b8BS7GZ625mEeexUCVWeMfyQni1PlsggGvFvqjKAlPFfFmDO5SdpkPJkHFBWGamw1q9VwA6F8BnvgeqlM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786041657340.4530563102111; Thu, 18 Jun 2026 05:34:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBtq-0003di-NG; Thu, 18 Jun 2026 08:31:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtp-0003cH-94 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:13 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtn-0000lc-Jl for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:13 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArbsJ1054864 for ; Thu, 18 Jun 2026 12:31:10 GMT Received: from mail-oi1-f197.google.com (mail-oi1-f197.google.com [209.85.167.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4eux2ccfg4-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:09 +0000 (GMT) Received: by mail-oi1-f197.google.com with SMTP id 5614622812f47-486a2a910efso1769130b6e.2 for ; Thu, 18 Jun 2026 05:31:09 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786042098158500 Avoid including TCG-specific headers in non-TCG builds. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-2-philmd@oss.qualcomm.com> --- target/arm/internals.h | 4 +++- target/arm/cpu-irq.c | 3 ++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index f7a57d3ea70..fcce3804f34 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -29,9 +29,11 @@ #include "exec/vaddr.h" #include "exec/breakpoint.h" #include "exec/memop.h" +#ifdef CONFIG_TCG #include "accel/tcg/tb-cpu-state.h" -#include "hw/core/registerfields.h" #include "tcg/tcg-gvec-desc.h" +#endif +#include "hw/core/registerfields.h" #include "system/memory.h" #include "syndrome.h" #include "cpu-features.h" diff --git a/target/arm/cpu-irq.c b/target/arm/cpu-irq.c index fe514cc93af..883e8a176c3 100644 --- a/target/arm/cpu-irq.c +++ b/target/arm/cpu-irq.c @@ -8,10 +8,11 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "accel/tcg/cpu-ops.h" #include "internals.h" =20 #ifdef CONFIG_TCG +#include "accel/tcg/cpu-ops.h" + static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, unsigned int target_el, unsigned int cur_el, bool secure, --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785914; cv=none; d=zohomail.com; s=zohoarc; b=jv7QwIVe3Jhtf+Xb6Qtq0QOXtiBySVWsiMMjvYzHnKI4s5XtRfceLDKImLKtrjNYcvki3tp9HIhEkDh9tjrqU6UaMX4C4+c7Tki4K25k7uCrDXhdWQwl1sYQawe9JQi1qmdjvrzsG+m3TYQVPHucXAjlaYAWO5Lnt+FvPx0hfLM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785914; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=3tRm5b2v+F9s6iDGpxMlcdbb4IGu9fnQ71UD6xkJ5nE=; b=Lvko1zT+HFLC/GHSa/uJLO9Av/dLmC15sVQABqiowvJvobaUTO/d7IcS28xBcEzmBH+3obFf1HBKFNoQqRVxLKPGXHmDy8DuH2VCapFanX2fFG9WFTYoqCTG3X8OqpZcfBJiTy7cHJj/s1WLIjRhV7iQ5r9iDvP4KLAT4pVgpL0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785914517839.9864504497626; Thu, 18 Jun 2026 05:31:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBtx-0003oj-7T; Thu, 18 Jun 2026 08:31:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtv-0003k8-Qo for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:19 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBtu-0000mp-1w for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:19 -0400 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs2jM1030554 for ; Thu, 18 Jun 2026 12:31:16 GMT Received: from mail-oi1-f199.google.com (mail-oi1-f199.google.com [209.85.167.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0vm3cpc-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:16 +0000 (GMT) Received: by mail-oi1-f199.google.com with SMTP id 5614622812f47-48687df43c4so1917514b6e.0 for ; Thu, 18 Jun 2026 05:31:16 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785914993158500 TCGTBCPUState is a structure used during TCG translation, therefore not needed when TCG is not available. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616153432.92939-4-philmd@oss.qualcomm.com> --- target/ppc/internal.h | 5 ++++- target/ppc/helper_regs.c | 3 ++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index dda23b66096..a3bb12afd93 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -22,7 +22,6 @@ #include "exec/memop.h" #include "hw/core/registerfields.h" #include "exec/page-protection.h" -#include "accel/tcg/tb-cpu-state.h" =20 static inline bool ppc_env_is_little_endian(const CPUPPCState *env) { @@ -326,6 +325,10 @@ static inline int ger_pack_masks(int pmsk, int ymsk, i= nt xmsk) return msk; } =20 +#ifdef CONFIG_TCG +#include "accel/tcg/tb-cpu-state.h" + TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs); +#endif =20 #endif /* PPC_INTERNAL_H */ diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index a07e6a7b7b6..acf74c543a1 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -27,7 +27,6 @@ #include "power8-pmu.h" #include "cpu-models.h" #include "spr_common.h" -#include "accel/tcg/cpu-ops.h" #include "internal.h" =20 /* Swap temporary saved registers with GPRs */ @@ -261,6 +260,7 @@ void hreg_update_pmu_hflags(CPUPPCState *env) env->hflags |=3D hreg_compute_pmu_hflags_value(env); } =20 +#ifdef CONFIG_TCG TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs) { CPUPPCState *env =3D cpu_env(cs); @@ -277,6 +277,7 @@ TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs) =20 return (TCGTBCPUState){ .pc =3D env->nip, .flags =3D hflags_current }; } +#endif /* CONFIG_TCG */ =20 #ifndef CONFIG_USER_ONLY void cpu_interrupt_exittb(CPUState *cs) --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786073; cv=none; d=zohomail.com; s=zohoarc; b=MUOf1nyXS6CvPy2Of7mhUVZBM5ACebYv11UkfW/LXel6IHU0PpghE7KwKDC3g0m+9tGzcVFtxdB0RqbSylHntQsJW1QiPPMw6vJ2wAlyuIDG4U4mWdbJfjPZ845LoeYbwV6MEQ0gyJkqBQ6oZ5jRqCIZ4qV1ZipZlXsYh3iAA+Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786073; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=NdsW1j1wKQLo32DitEH+xMO+jVfidrCgWPVRECyXD5Y=; b=bzozobO0KnK34xkt2CXGr5c1bMfBg1xaaXWdDc6l3DD08vIh52VrGiH2Ju3+xTSY9X1/qtxvork+zfyIQmfoU/W8VRPGlWS76dFW7wFZx2xXPk8qvWhe6t4wPVzWHdVuMLMk+dBXuxXND/y+aSC44ujvaX5KWcCNLp+Gh1kBL0g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786073142799.3194902742889; Thu, 18 Jun 2026 05:34:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBu4-0003tB-Tw; Thu, 18 Jun 2026 08:31:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBu3-0003sh-7u for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:27 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBu1-0000sH-Op for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:26 -0400 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs1M61030415 for ; Thu, 18 Jun 2026 12:31:24 GMT Received: from mail-ua1-f71.google.com (mail-ua1-f71.google.com [209.85.222.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0vm3cq2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:24 +0000 (GMT) Received: by mail-ua1-f71.google.com with SMTP id a1e0cc1a2514c-966cf5e2a48so217486241.3 for ; Thu, 18 Jun 2026 05:31:24 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786074261158500 From: Philippe Mathieu-Daud=C3=A9 "accel/accel-cpu-target.h" is to register accelerator target specific hooks via TypeInfo::ACCEL_CPU_NAME(), which LoongArch TCG frontend does not. Remove as unused header. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20260529194940.97143-2-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/loongarch/tcg/tcg_cpu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index 66b3f458077..f556234d9d2 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -9,7 +9,6 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/plugin.h" -#include "accel/accel-cpu-target.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786028; cv=none; d=zohomail.com; s=zohoarc; b=JpRSTfUqb5zr6u/5z5HfC/ZsnTWEvxTV0JpkiY5+ebvwQ9xuCzIo/OVzll+Z2U9Psq4gqVZ2MnSlyp6W8ntjDIrEPrUuZqo/+y75XPgZGEBC3SyfZDmfTxhXKH6isu2KnVUGu8LsJsqdtCA6pWRaXqQCBd8FudyNu/glkniHM5s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786028; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=o387TdhFT0x3T0ROAYi1UdAOL9quvqZVAslX4OJWGj8=; b=Wonl1ZBjWPBrzvUHzxGO7DEomhsYEz44we4TuDza89UAmON1I8mi7KOufOrBMNgr9Va+48fg1rjXUL3DVPUZbryFwiGIv5iAA6vd1cRfkmkHaUwXytzabxCtwikoep15iEnw3TXCcu3vbX3P0TaIkV+qt+k3L6a1FBebBbSAN2E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786028176585.7218615192882; Thu, 18 Jun 2026 05:33:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBuB-0004aw-UG; Thu, 18 Jun 2026 08:31:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuA-0004Ws-99 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:34 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBu8-0000t7-MW for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:33 -0400 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAraC9981280 for ; Thu, 18 Jun 2026 12:31:31 GMT Received: from mail-vs1-f72.google.com (mail-vs1-f72.google.com [209.85.217.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4evdn40p0b-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:31 +0000 (GMT) Received: by mail-vs1-f72.google.com with SMTP id ada2fe7eead31-728f9ecd022so741881137.1 for ; Thu, 18 Jun 2026 05:31:31 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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While this header is currently included indirectly, make the inclusion explicit to avoid issue when refactoring unrelated headers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617160426.64461-2-philmd@oss.qualcomm.com> --- target/sparc/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 3df199ada7b..13ebb122a38 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -23,6 +23,7 @@ #include "qemu/module.h" #include "qemu/qemu-print.h" #include "accel/tcg/cpu-mmu-index.h" +#include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" #include "hw/core/qdev-properties.h" #include "qapi/visitor.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785973; cv=none; d=zohomail.com; s=zohoarc; b=loghkjbm2guHUdnsk27mfu2vXmrJZ7Sj+27PA+DvueMtcV/13yXXYucMyi0zV3qm3jmVq+OLD3PCS7Wx6Q+Y71fcrt4QZ3dB0LJGLydDBYQRihGYaFzIJnT2m2xuLDyq3X7nQ+F8dKI1/pYG3Hq2dDk6ZzX54sf5LXN7gJ3miB8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785973; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=7l7FYzI46s6RU3OR/MsObUKNXlWa6v5TcmIIElGjxpk=; b=e6UfnVKdPrTchhXtEsn8lbw8MsGU5QbfoZkfomCvHfCBHrCAi7y59wDRmPnlE5hvmauT9nTYfrfai5xHzbd+m2Qn+C8sEHvltS/g/BuPNyDErSpPanyIKJtjR80dw+bDszk8BzqBH7AlYBGhPpnFqLSITkFiKcmEQedlhWCtJW8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785973648202.1785600206356; Thu, 18 Jun 2026 05:32:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBuJ-0004cV-BL; Thu, 18 Jun 2026 08:31:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuH-0004c7-MI for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:41 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuF-0000tx-Sy for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:41 -0400 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs0fo1030370 for ; Thu, 18 Jun 2026 12:31:38 GMT Received: from mail-ua1-f70.google.com (mail-ua1-f70.google.com [209.85.222.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0vm3cqx-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:38 +0000 (GMT) Received: by mail-ua1-f70.google.com with SMTP id a1e0cc1a2514c-9646997241cso215939241.3 for ; Thu, 18 Jun 2026 05:31:38 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Thu, 18 Jun 2026 05:31:37 -0700 (PDT) X-Received: by 2002:a05:6102:f09:b0:6ef:f691:7044 with SMTP id ada2fe7eead31-729274da8aemr676383137.1.1781785896804; Thu, 18 Jun 2026 05:31:36 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 26/48] accel/hvf: fix double hv_vcpu_destroy() causing teardown error on ARM Date: Thu, 18 Jun 2026 14:28:03 +0200 Message-ID: <20260618122825.90331-27-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260618122825.90331-1-philmd@oss.qualcomm.com> References: <20260618122825.90331-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE4MDExNiBTYWx0ZWRfXz48yaDcQhURz DzLOy7VxJSBOK/mGJ+xZpn6kjpwLGiSkfv+5IO/zVfXB+RAlkzcFCtHmlA0zGuUo3WjFmAtelEX imKVKZ4LxRG+6U3TfwWxGEKZIbD++L8I+iTuIhBWXNPg3Tvhshce1LfTn9TI+VrkgxeqU0M5g9E Ll3qh8AlWzVg8gI4eYcFBermH3+t3dtjTh0ij82JUOiKJbtkYuI35vW+30h4OOfcPx4KdFTnFyI +lmiFQOA/KPg2XT1TZ/Sq8ofLkWxlsTqNZoEKZGq4EcVyWWVLJ959XvFAgc2VgfdNjdbqEfKlR4 mFyUTB63FAMK7fNu/SSRAHi8o/4eszZo4kSXDHc0riqwFh7qCldVdu11fHsJjrVQbcsEQlqSER9 L8t/HOL35mH5UiYMHwSP/oXv3LIdXoErm+XFVUv9wYvhTT0wcJqi0yIb8hAnoxmXl1PJAq3QMsE ZLTf2P/gEfxWEuv2Wvg== X-Proofpoint-ORIG-GUID: dbB-Uwo6uewz9O-NeXLsiAUoKRoxE1J_ X-Authority-Analysis: v=2.4 cv=UrRT8ewB c=1 sm=1 tr=0 ts=6a33e52a cx=c_pps a=R6oCqFB+Yf/t2GF8e0/dFg==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=0vMvDItshvRoZSfmwLMA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=TD8TdBvy0hsOASGTdmB-:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: dbB-Uwo6uewz9O-NeXLsiAUoKRoxE1J_ X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE4MDExNiBTYWx0ZWRfX+V+mXcIxunnZ YWz71S7+ZgXrKJzVud1IRMQKljIMyQ1xHKfUH2Hq5DkfjFLjiJyC3BagFP05JHCjmCYxTezkFG/ XleH8K65JKNW/uXylIsDlryNcV7usCQ= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-18_01,2026-06-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 spamscore=0 suspectscore=0 adultscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606180116 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785975497158500 From: Matheus Tavares Bernardino The following callstack causes hv_vcpu_destroy() to be called twice, producing HV_BAD_ARGUMENT on the already-destroyed handler: hvf_vcpu_destroy | |_ hv_vcpu_destroy | |_ hvf_arch_vcpu_destroy | |_ hv_vcpu_destroy The first hv_vcpu_destroy call covers both x86 and arm. Let's remove the second one, as it is redundant. This reverts commit feee55d36a1c5d494ee73812d279b439bb05137c. Signed-off-by: Matheus Tavares Bernardino Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/hvf/hvf.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index a5b30b9ef0d..8b902c68829 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1301,15 +1301,10 @@ void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu) =20 void hvf_arch_vcpu_destroy(CPUState *cpu) { - hv_return_t ret; - if (!hvf_irqchip_in_kernel()) { timer_free(cpu->accel->wfi_timer); cpu->accel->wfi_timer =3D NULL; } - - ret =3D hv_vcpu_destroy(cpu->accel->fd); - assert_hvf_ok(ret); } =20 static bool hvf_arm_el2_supported(void) --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785915; cv=none; d=zohomail.com; s=zohoarc; b=MzTpQREoge8ec0zaoT/IVr/gseWoeyv/uo8GvScAkaYTrNJDYjXYVWMC4FyeH7pAPWtDHUKlz8dcmiOH9cAfSulmetdglgE466ZnOarRRZg+WcCUm6nx8gsFjWaAnuGp8o77bHNBEwkPHsE6AI8YfIVNTtVmBXRh8CX2ENwOhiY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785915; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=/jfoVKGuOODJyy20PzW4CsV+7Ec7TEdfFD78Oy4EhyI=; b=UEWAn1gmQBaZBhgR8kXFBck/YBXnmo1kRhFWc5B3lEGnwOG9h/gAxkPUGcPYDz8WOehRtz9+0vvR+uMzjVnVtty6lYrfVLYaYM0Br5IPyyqmyc5r043P4zCCPa2zzKRNPZQ5dQNxR4zMi+z4U7fBSokAz5DySBH9/ytaDyYMK1w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785915840211.67667386395783; Thu, 18 Jun 2026 05:31:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBuQ-0004pe-Lw; Thu, 18 Jun 2026 08:31:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuO-0004oD-4o for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:48 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuM-0000uj-Hh for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:47 -0400 Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs3s12612695 for ; Thu, 18 Jun 2026 12:31:45 GMT Received: from mail-oi1-f200.google.com (mail-oi1-f200.google.com [209.85.167.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4euw9vmupb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:45 +0000 (GMT) Received: by mail-oi1-f200.google.com with SMTP id 5614622812f47-486660d2abaso1316868b6e.2 for ; Thu, 18 Jun 2026 05:31:45 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785917019158500 hvf_kernel_irqchip_override is only used within the accel/hvf/hvf-all.c file, no need to expose the symbol. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mohamed Mediouni Message-Id: <20260613145356.88410-1-philmd@oss.qualcomm.com> --- include/system/hvf_int.h | 1 - accel/hvf/hvf-all.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index d5eaf26dda8..58fb865ebae 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -113,5 +113,4 @@ bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp); uint32_t hvf_arch_get_default_ipa_bit_size(void); uint32_t hvf_arch_get_max_ipa_bit_size(void); =20 -extern bool hvf_kernel_irqchip_override; #endif diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c index 946dbca59d0..21b9b71a6df 100644 --- a/accel/hvf/hvf-all.c +++ b/accel/hvf/hvf-all.c @@ -25,7 +25,7 @@ bool hvf_allowed; bool hvf_kernel_irqchip; bool hvf_nested_virt; -bool hvf_kernel_irqchip_override; +static bool hvf_kernel_irqchip_override; =20 void hvf_nested_virt_enable(bool nested_virt) { --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785992; cv=none; d=zohomail.com; s=zohoarc; b=T/phUjI/V0BYsPFiO+H0WYo7+8IZPtaz3lPEcV9FjgcMEf5nsOUNZ/WXj5Q1gtFCbj81cLR2B9oEqOC8Vm17tfADf5JZOWKhTktb/vd7r6Dj1GChXup/DvLC35CzYp/UMjuVAl5FIy6P5XlMXep14qtHAXFCKEi5DJMylOO5luU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785992; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=gkBD2YCCxoHay6OYcmuXR+L+LWtB3tbSLQVDSyTyi1M=; b=TjzVkXnfZLMeJxSo54rsB3Kw56JUrgtRRdZfk0BWPSN3pPhlScLqLfEwNtyiuAertAXP+HQNKNKysmVrkoGEmbV4dQfn1nXWN27m81UFD4vUYBiBujIaS/lF/v2zerK5MVDJuPGBl2tRFKL3HjauRodZ9v7uZY2fZuFc/pTnQIg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178178599264784.26942254082485; Thu, 18 Jun 2026 05:33:12 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBuX-000538-06; Thu, 18 Jun 2026 08:31:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuV-00051N-LB for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:55 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuU-0000xA-2o for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:31:55 -0400 Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArhCN2611760 for ; Thu, 18 Jun 2026 12:31:52 GMT Received: from mail-ot1-f71.google.com (mail-ot1-f71.google.com [209.85.210.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4euw9vmupu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:31:52 +0000 (GMT) Received: by mail-ot1-f71.google.com with SMTP id 46e09a7af769-7e6d439842bso1263418a34.0 for ; Thu, 18 Jun 2026 05:31:52 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785993646158500 From: Osama Abdelkader tb-internal.h is included twice Signed-off-by: Osama Abdelkader Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20251126214322.64855-1-osama.abdelkader@gmail.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- accel/tcg/cputlb.c | 1 - accel/tcg/tb-maint.c | 1 - accel/tcg/translate-all.c | 1 - 3 files changed, 3 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index d6115bbb0a4..b4239ed5be2 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -44,7 +44,6 @@ #include "tb-internal.h" #include "trace.h" #include "tb-hash.h" -#include "tb-internal.h" #include "tlb-bounds.h" #include "internal-common.h" #ifdef CONFIG_PLUGIN diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 0c7ac5a72c0..7a29a349110 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -32,7 +32,6 @@ #include "tcg/tcg.h" #include "tb-hash.h" #include "tb-context.h" -#include "tb-internal.h" #include "internal-common.h" #ifdef CONFIG_USER_ONLY #include "user/page-protection.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 05d9ce512a4..5235c73bc26 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -33,7 +33,6 @@ #include "tb-jmp-cache.h" #include "tb-hash.h" #include "tb-context.h" -#include "tb-internal.h" #include "internal-common.h" #include "tcg/perf.h" #include "tcg/insn-start-words.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785989611158500 Move the two TCG-specific IOMMU method declarations from the generic "exec/cpu-common.h" header to "accel/tcg/iommu.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616153633.93267-1-philmd@oss.qualcomm.com> --- include/accel/tcg/iommu.h | 7 +++++++ include/exec/cpu-common.h | 3 --- accel/tcg/cpu-exec.c | 4 +++- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/include/accel/tcg/iommu.h b/include/accel/tcg/iommu.h index 547f8ea0ef0..a4032a292e5 100644 --- a/include/accel/tcg/iommu.h +++ b/include/accel/tcg/iommu.h @@ -7,6 +7,10 @@ #ifndef ACCEL_TCG_IOMMU_H #define ACCEL_TCG_IOMMU_H =20 +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #ifdef CONFIG_USER_ONLY #error Cannot include accel/tcg/iommu.h from user emulation #endif @@ -14,6 +18,9 @@ #include "exec/hwaddr.h" #include "exec/memattrs.h" =20 +void tcg_iommu_init_notifier_list(CPUState *cpu); +void tcg_iommu_free_notifier_list(CPUState *cpu); + MemoryRegionSection *address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 830e57dc5fc..74337d84640 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -34,9 +34,6 @@ unsigned int cpu_list_generation_id_get(void); =20 int cpu_get_free_index(void); =20 -void tcg_iommu_init_notifier_list(CPUState *cpu); -void tcg_iommu_free_notifier_list(CPUState *cpu); - /** * cpu_address_space_init: * @cpu: CPU to add this address space to diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index ad94f96b252..7292ff15060 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -26,7 +26,6 @@ #include "accel/tcg/helper-retaddr.h" #include "trace.h" #include "disas/disas.h" -#include "exec/cpu-common.h" #include "exec/cpu-interrupt.h" #include "exec/page-protection.h" #include "exec/mmap-lock.h" @@ -46,6 +45,9 @@ #include "tb-context.h" #include "tb-internal.h" #include "internal-common.h" +#if !defined(CONFIG_USER_ONLY) +#include "accel/tcg/iommu.h" +#endif =20 /* -icount align implementation. */ =20 --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785958; cv=none; d=zohomail.com; s=zohoarc; b=IRMDyblQ07aHyy2waSmHo14SYAtONeD0FuUXsW8wzBN63buWyq05CxyZrl1hpwfcdp00rclFMhNmgLj/7kBsfLzQuiR21KEpxsW1EUrmmIilCnfJxNzUkUpPOlviaTQvDaw/Bez6Dofmgm20NQsrD3v3tzqPmP+cz2CexL8URUE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785958; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=ZdyaSBbvLPmSp7HfiXGcFIEbJtGLxY0IAt+PrsSrPc8=; b=AtGhOxqpCsEQRCCdRO7zvEro2a9FofU7VqBxV6mXBsRxJz27mOKSD0xWG/YLWM99KRWawG9ZEKqDnTiuaEXhYQL6lINKgGNMYMNIuvCCN1P6MJ0n5IAoz5HgVUOOye8mZ+T5hhaKqdYxWTkGPqVz9FE53kQ5+CLbuBHMJkonpUY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785958353769.3178013004722; Thu, 18 Jun 2026 05:32:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBul-0005ob-8D; Thu, 18 Jun 2026 08:32:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuk-0005iz-19 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:10 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBui-000188-Eu for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:09 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs2CL1334113 for ; Thu, 18 Jun 2026 12:32:07 GMT Received: from mail-oi1-f199.google.com (mail-oi1-f199.google.com [209.85.167.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev1wc345t-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:32:07 +0000 (GMT) Received: by mail-oi1-f199.google.com with SMTP id 5614622812f47-486db2bf46eso1116237b6e.3 for ; Thu, 18 Jun 2026 05:32:07 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786011789158500 From: Matt Jacobson 3220b38a8d had the side effect of making the individual target link steps use objc_LINKER on macOS, because `coreaudio.m` became visible to Meson as a source file. (The preexisting presence of `cocoa.m` is masked by the fact that it gets built into libsystem and then extracted back out as an object file.) `configure` correctly passes `$EXTRA_LDFLAGS` to the "C linker" and "C++ linker", but it neglected to do so for the "Objective-C linker". Fix that. Signed-off-by: Matt Jacobson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20260615045547.23422-1-mhjacobson@me.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- configure | 1 + 1 file changed, 1 insertion(+) diff --git a/configure b/configure index d786d3a7c9b..d773c3c46a0 100755 --- a/configure +++ b/configure @@ -1849,6 +1849,7 @@ if test "$skip_meson" =3D no; then test -n "$objcc" && echo "objc_args =3D [$(meson_quote $OBJCFLAGS $EXTRA= _OBJCFLAGS)]" >> $cross echo "c_link_args =3D [$(meson_quote $CFLAGS $LDFLAGS $EXTRA_CFLAGS $EXT= RA_LDFLAGS)]" >> $cross echo "cpp_link_args =3D [$(meson_quote $CXXFLAGS $LDFLAGS $EXTRA_CXXFLAG= S $EXTRA_LDFLAGS)]" >> $cross + test -n "$objcc" && echo "objc_link_args =3D [$(meson_quote $OBJCFLAGS $= LDFLAGS $EXTRA_OBJCFLAGS $EXTRA_LDFLAGS)]" >> $cross =20 # Only enable by default for git builds and on select OSes echo "# environment defaults, can still be overridden on " >> $cross --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785982; cv=none; d=zohomail.com; s=zohoarc; b=PwGc9R7xBLDLPW/XzMZ9DtGm7Tjq9UnhlTuhmzAfhTLB1d6+wq1SEbfc/EAkXbL6Y2wpgWolhxFL3NbodlV3x7dO5o2T54h5Q4IvMC0kOJAfkfo16oQqD2u9NXHWYK7qtw8EOwtRzbUbgKh+nYdScB5YyXwrtmVSkmC/HzqFbtw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785982; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=ZLd8YVfy9awyQdAa594INoAeCEgmcGu7zFRRGOcoeXA=; b=NYq30Y54Nu6S/+ILnaNeXrnJGeibHP6Fa4v+8pROHtrFjhqX+bW94Xs27I6FNTZk67Sq9P/KowkhNMvdyzjYpmB9oLDuS/h948GfO289Xy6y8MbsZ3JFiia8gkuIZAZI4jTT6N/+3/mC2MS6HxJ3THg5IT8oWcWDPC/kY783BYQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785982627244.3537615816408; Thu, 18 Jun 2026 05:33:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBv2-0006RM-UB; Thu, 18 Jun 2026 08:32:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBuz-0006Mo-B4 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:26 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBux-0001AK-5a for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:24 -0400 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArtAS1536484 for ; Thu, 18 Jun 2026 12:32:22 GMT Received: from mail-oi1-f200.google.com (mail-oi1-f200.google.com [209.85.167.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev12kkd3u-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:32:22 +0000 (GMT) Received: by mail-oi1-f200.google.com with SMTP id 5614622812f47-48687e7f161so1882448b6e.2 for ; Thu, 18 Jun 2026 05:32:22 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785983592158500 From: Bin Guo There are only three call sites, and strnlen() is available on all supported platforms (POSIX.1-2008, Windows via UCRT, MinGW). Remove the hand-rolled wrapper and use the standard function directly. While here, align bsd-user/uaccess.c to use size_t for max_len/len, matching linux-user/uaccess.c and eliminating a signed/unsigned mismatch. Also remove the stale qemu_strnlen() entry from docs/devel/style.rst. Suggested-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Bin Guo Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Warner Losh Message-ID: <20260530062816.59206-1-guobin@linux.alibaba.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- docs/devel/style.rst | 1 - include/qemu/cutils.h | 17 +---------------- bsd-user/uaccess.c | 4 ++-- linux-user/uaccess.c | 2 +- util/cutils.c | 15 +-------------- 5 files changed, 5 insertions(+), 34 deletions(-) diff --git a/docs/devel/style.rst b/docs/devel/style.rst index f4da16a0e83..6c5f94cc509 100644 --- a/docs/devel/style.rst +++ b/docs/devel/style.rst @@ -519,7 +519,6 @@ QEMU provides other useful string functions: =20 int strstart(const char *str, const char *val, const char **ptr) int stristart(const char *str, const char *val, const char **ptr) - int qemu_strnlen(const char *s, int max_len) =20 There are also replacement character processing macros for isxyz and toxyz, so instead of e.g. isalnum you should use qemu_isalnum. diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h index 36c68ce86c5..d249f226766 100644 --- a/include/qemu/cutils.h +++ b/include/qemu/cutils.h @@ -101,22 +101,7 @@ int strstart(const char *str, const char *val, const c= har **ptr); * false otherwise. */ int stristart(const char *str, const char *val, const char **ptr); -/** - * qemu_strnlen: - * @s: string - * @max_len: maximum number of bytes in @s to scan - * - * Return the length of the string @s, like strlen(), but do not - * examine more than @max_len bytes of the memory pointed to by @s. - * If no NUL terminator is found within @max_len bytes, then return - * @max_len instead. - * - * This function has the same behaviour as the POSIX strnlen() - * function. - * - * Returns: length of @s in bytes, or @max_len, whichever is smaller. - */ -int qemu_strnlen(const char *s, int max_len); + /** * qemu_strsep: * @input: pointer to string to parse diff --git a/bsd-user/uaccess.c b/bsd-user/uaccess.c index 89163257f4a..7ad4b580f44 100644 --- a/bsd-user/uaccess.c +++ b/bsd-user/uaccess.c @@ -43,7 +43,7 @@ abi_long target_strlen(abi_ulong guest_addr1) { uint8_t *ptr; abi_ulong guest_addr; - int max_len, len; + size_t max_len, len; =20 guest_addr =3D guest_addr1; for (;;) { @@ -51,7 +51,7 @@ abi_long target_strlen(abi_ulong guest_addr1) ptr =3D lock_user(VERIFY_READ, guest_addr, max_len, 1); if (!ptr) return -TARGET_EFAULT; - len =3D qemu_strnlen((const char *)ptr, max_len); + len =3D strnlen((const char *)ptr, max_len); unlock_user(ptr, guest_addr, 0); guest_addr +=3D len; /* we don't allow wrapping or integer overflow */ diff --git a/linux-user/uaccess.c b/linux-user/uaccess.c index 27e841e6510..f9bd713edd7 100644 --- a/linux-user/uaccess.c +++ b/linux-user/uaccess.c @@ -99,7 +99,7 @@ ssize_t target_strlen(abi_ulong guest_addr1) ptr =3D lock_user(VERIFY_READ, guest_addr, max_len, 1); if (!ptr) return -TARGET_EFAULT; - len =3D qemu_strnlen((const char *)ptr, max_len); + len =3D strnlen((const char *)ptr, max_len); unlock_user(ptr, guest_addr, 0); guest_addr +=3D len; /* we don't allow wrapping or integer overflow */ diff --git a/util/cutils.c b/util/cutils.c index 76a94420859..96c80d4d429 100644 --- a/util/cutils.c +++ b/util/cutils.c @@ -54,7 +54,7 @@ =20 void strpadcpy(char *buf, int buf_size, const char *str, char pad) { - int len =3D qemu_strnlen(str, buf_size); + size_t len =3D strnlen(str, buf_size); memcpy(buf, str, len); memset(buf + len, pad, buf_size - len); } @@ -118,19 +118,6 @@ int stristart(const char *str, const char *val, const = char **ptr) return 1; } =20 -/* XXX: use host strnlen if available ? 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786019919158501 From: Akihiko Odaki ui/cocoa used to have a conversion table from macOS keycode to Linux key code. It is an unnecessary redundancy as ui/input-keymap.c already has such a table. Worse, I added an incorrect mapping of kVK_JIS_Eisu and kVK_JIS_Kana with commit 708b72557ff5 ("ui/cocoa: Support unique keys of JIS keyboards"). According to the following documentations, the definitions in ui/keycodemapdb/keymaps.csv, which ui/input-keymap.c uses, are correct: https://developer.apple.com/documentation/uikit/uikeyboardhidusage/uikeyboa= rdhidusagekeyboardlang1?language=3Dobjc https://developer.apple.com/documentation/uikit/uikeyboardhidusage/uikeyboa= rdhidusagekeyboardlang2?language=3Dobjc https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelin= es/keyboard-japan-ime Use qemu_input_map_osx_to_linux to eliminate the redundancy and incorrect mappings. Fixes: 708b72557ff5 ("ui/cocoa: Support unique keys of JIS keyboards") Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20260604-osx-v3-1-453b4ee0e072@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- ui/cocoa.m | 131 ++--------------------------------------------------- 1 file changed, 3 insertions(+), 128 deletions(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index c5e639ab98d..e157ad01d85 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -141,138 +141,13 @@ static bool bool_with_bql(BoolCodeBlock block) return val; } =20 -// Mac to Linux conversion -static const unsigned int mac_to_linux_map[] =3D { - [kVK_ANSI_A] =3D KEY_A, - [kVK_ANSI_B] =3D KEY_B, - [kVK_ANSI_C] =3D KEY_C, - [kVK_ANSI_D] =3D KEY_D, - [kVK_ANSI_E] =3D KEY_E, - [kVK_ANSI_F] =3D KEY_F, - [kVK_ANSI_G] =3D KEY_G, - [kVK_ANSI_H] =3D KEY_H, - [kVK_ANSI_I] =3D KEY_I, - [kVK_ANSI_J] =3D KEY_J, - [kVK_ANSI_K] =3D KEY_K, - [kVK_ANSI_L] =3D KEY_L, - [kVK_ANSI_M] =3D KEY_M, - [kVK_ANSI_N] =3D KEY_N, - [kVK_ANSI_O] =3D KEY_O, - [kVK_ANSI_P] =3D KEY_P, - [kVK_ANSI_Q] =3D KEY_Q, - [kVK_ANSI_R] =3D KEY_R, - [kVK_ANSI_S] =3D KEY_S, - [kVK_ANSI_T] =3D KEY_T, - [kVK_ANSI_U] =3D KEY_U, - [kVK_ANSI_V] =3D KEY_V, - [kVK_ANSI_W] =3D KEY_W, - [kVK_ANSI_X] =3D KEY_X, - [kVK_ANSI_Y] =3D KEY_Y, - [kVK_ANSI_Z] =3D KEY_Z, - - [kVK_ANSI_0] =3D KEY_0, - [kVK_ANSI_1] =3D KEY_1, - [kVK_ANSI_2] =3D KEY_2, - [kVK_ANSI_3] =3D KEY_3, - [kVK_ANSI_4] =3D KEY_4, - [kVK_ANSI_5] =3D KEY_5, - [kVK_ANSI_6] =3D KEY_6, - [kVK_ANSI_7] =3D KEY_7, - [kVK_ANSI_8] =3D KEY_8, - [kVK_ANSI_9] =3D KEY_9, - - [kVK_ANSI_Grave] =3D KEY_GRAVE, - [kVK_ANSI_Minus] =3D KEY_MINUS, - [kVK_ANSI_Equal] =3D KEY_EQUAL, - [kVK_Delete] =3D KEY_BACKSPACE, - [kVK_CapsLock] =3D KEY_CAPSLOCK, - [kVK_Tab] =3D KEY_TAB, - [kVK_Return] =3D KEY_ENTER, - [kVK_ANSI_LeftBracket] =3D KEY_LEFTBRACE, - [kVK_ANSI_RightBracket] =3D KEY_RIGHTBRACE, - [kVK_ANSI_Backslash] =3D KEY_BACKSLASH, - [kVK_ANSI_Semicolon] =3D KEY_SEMICOLON, - [kVK_ANSI_Quote] =3D KEY_APOSTROPHE, - [kVK_ANSI_Comma] =3D KEY_COMMA, - [kVK_ANSI_Period] =3D KEY_DOT, - [kVK_ANSI_Slash] =3D KEY_SLASH, - [kVK_Space] =3D KEY_SPACE, - - [kVK_ANSI_Keypad0] =3D KEY_KP0, - [kVK_ANSI_Keypad1] =3D KEY_KP1, - [kVK_ANSI_Keypad2] =3D KEY_KP2, - [kVK_ANSI_Keypad3] =3D KEY_KP3, - [kVK_ANSI_Keypad4] =3D KEY_KP4, - [kVK_ANSI_Keypad5] =3D KEY_KP5, - [kVK_ANSI_Keypad6] =3D KEY_KP6, - [kVK_ANSI_Keypad7] =3D KEY_KP7, - [kVK_ANSI_Keypad8] =3D KEY_KP8, - [kVK_ANSI_Keypad9] =3D KEY_KP9, - [kVK_ANSI_KeypadDecimal] =3D KEY_KPDOT, - [kVK_ANSI_KeypadEnter] =3D KEY_KPENTER, - [kVK_ANSI_KeypadPlus] =3D KEY_KPPLUS, - [kVK_ANSI_KeypadMinus] =3D KEY_KPMINUS, - [kVK_ANSI_KeypadMultiply] =3D KEY_KPASTERISK, - [kVK_ANSI_KeypadDivide] =3D KEY_KPSLASH, - [kVK_ANSI_KeypadEquals] =3D KEY_KPEQUAL, - [kVK_ANSI_KeypadClear] =3D KEY_NUMLOCK, - - [kVK_UpArrow] =3D KEY_UP, - [kVK_DownArrow] =3D KEY_DOWN, - [kVK_LeftArrow] =3D KEY_LEFT, - [kVK_RightArrow] =3D KEY_RIGHT, - - [kVK_Help] =3D KEY_INSERT, - [kVK_Home] =3D KEY_HOME, - [kVK_PageUp] =3D KEY_PAGEUP, - [kVK_PageDown] =3D KEY_PAGEDOWN, - [kVK_End] =3D KEY_END, - [kVK_ForwardDelete] =3D KEY_DELETE, - - [kVK_Escape] =3D KEY_ESC, - - /* The Power key can't be used directly because the operating system u= ses - * it. This key can be emulated by using it in place of another key su= ch as - * F1. Don't forget to disable the real key binding. - */ - /* [kVK_F1] =3D KEY_POWER, */ - - [kVK_F1] =3D KEY_F1, - [kVK_F2] =3D KEY_F2, - [kVK_F3] =3D KEY_F3, - [kVK_F4] =3D KEY_F4, - [kVK_F5] =3D KEY_F5, - [kVK_F6] =3D KEY_F6, - [kVK_F7] =3D KEY_F7, - [kVK_F8] =3D KEY_F8, - [kVK_F9] =3D KEY_F9, - [kVK_F10] =3D KEY_F10, - [kVK_F11] =3D KEY_F11, - [kVK_F12] =3D KEY_F12, - [kVK_F13] =3D KEY_SYSRQ, - [kVK_F14] =3D KEY_SCROLLLOCK, - [kVK_F15] =3D KEY_PAUSE, - - // JIS keyboards only - [kVK_JIS_Yen] =3D KEY_YEN, - [kVK_JIS_Underscore] =3D KEY_RO, - [kVK_JIS_KeypadComma] =3D KEY_KPCOMMA, - [kVK_JIS_Eisu] =3D KEY_MUHENKAN, - [kVK_JIS_Kana] =3D KEY_HENKAN, - - /* - * The eject and volume keys can't be used here because they are handl= ed at - * a lower level than what an Application can see. - */ -}; - -static unsigned int cocoa_keycode_to_linux(int keycode) +static int cocoa_keycode_to_linux(int keycode) { - if (ARRAY_SIZE(mac_to_linux_map) <=3D keycode) { + if (qemu_input_map_osx_to_linux_len <=3D keycode) { error_report("(cocoa) warning unknown keycode 0x%x", keycode); return 0; } - return mac_to_linux_map[keycode]; + return qemu_input_map_osx_to_linux[keycode]; } =20 /* Displays an alert dialog box with the specified message */ --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785975; cv=none; d=zohomail.com; s=zohoarc; b=OzSVeUg/SaTnOwBqJRooYf7GwR7Yq+Yfm/jUHmteeUaoZxNkmwVoNeTCU/7XBnKxCB/2H4kVOQiRl7AQ/Hitc5ZZG7H02hkE/HbutHY2tibZC+nYVfDJrBRqPD/D+dgZC6zTM1rVheQEtwohyNeZCyS3D6L1kIMIo2jqn4jnpnw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785975; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=De66LsRwg5NCn74KfPCcd8Su6NLJVp7+yfcDMyL91sk=; b=dPLFiLBCYBq0uObuaW0vzeKudYQ11SL25oj+VmrqKpztMSiUop7Gx6UG/V9yw6pnX3PoKFWbsyB9DJ+hhpcE8/KmSs34g/qU8T1EIHbnar6qwaR9MWJUmdBSWGceofwhs3OuTrrw6IeoGHB3E+KeAJ6qRVkQb5DoZygkQcC7EI4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785975871336.593835909821; Thu, 18 Jun 2026 05:32:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBvI-0006zt-As; Thu, 18 Jun 2026 08:32:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvD-0006rE-Oc for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:39 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvB-0001EP-Gm for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:38 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAtVon1516072 for ; Thu, 18 Jun 2026 12:32:36 GMT Received: from mail-qv1-f69.google.com (mail-qv1-f69.google.com [209.85.219.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev19a3arj-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:32:36 +0000 (GMT) Received: by mail-qv1-f69.google.com with SMTP id 6a1803df08f44-8cecb6dee57so37631056d6.1 for ; Thu, 18 Jun 2026 05:32:36 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785977489158500 Unfortunately we need to include "qemu/thread.h" -- which is currently indirectly pulled in -- to get the QemuMutex type definition: extern QemuMutex qemu_cpu_list_lock; Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617160426.64461-3-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 74337d84640..8cddd32ca8b 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -8,6 +8,7 @@ #ifndef CPU_COMMON_H #define CPU_COMMON_H =20 +#include "qemu/thread.h" #include "exec/vaddr.h" #include "hw/core/cpu.h" #include "tcg/debug-assert.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785990; cv=none; d=zohomail.com; s=zohoarc; b=VVd+cvvQyuBlBacolWiKNzevyf7Yf9yATZ3jE+DsZBKsxkx9h7SW+M7z6ld1owpK1GMFOojMP1QSwf8s9NOk0jxSIhkvvOsOiFr5S3+GaT6SipjNiuDhKhiqndOk/CTKun2eEaCTjDG8gVC555nuRJGNogCE14cLEQGtRo5NgRI= ARC-Message-Signature: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785991583158500 We neglected to remove the "exec/vaddr.h" header when moving cpu_memory_rw_debug() around in commit e9048f099b3 ("exec/cpu: Declare cpu_memory_rw_debug() in 'hw/core/cpu.h' and document"). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617160426.64461-4-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 8cddd32ca8b..7dc8cab3263 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -9,7 +9,6 @@ #define CPU_COMMON_H =20 #include "qemu/thread.h" -#include "exec/vaddr.h" #include "hw/core/cpu.h" #include "tcg/debug-assert.h" #include "exec/page-protection.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781785994; cv=none; d=zohomail.com; s=zohoarc; b=Q7Cltlb20GIgKj65938/DOm6KEltdgX8GEVWD5QXJyzDfPL5QLJiKb/j1+No6r6EE2/vtiedNCY2fphEoeSIZs8ndggJmMFswy4/SUgAkPywbZ6IijJI9vw4YbM5FZohZHNYgjc/Xdhnt20xdhEj0SLRaUEUmdAo3x+a5qeKVvw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781785994; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=gynoFaTDRgadZxzy2S/i16dtH2vqDTS+uWrxte7QDqo=; b=IQanEZZ7o9y0oMxvGmHeW0S/J2jGFmcgYbOZ20mvkqwZz/La8d1xOqaEIFOoaQystHilkQgISG98FXJOKvzJlUogMY4FOJCH4QeNcqgMtoKhfyzBsHuztJB7cOLMP0bi4pZ0qywemTmcbSk5jLAH3ZtRa2sONsd0BPkxX7l6gTc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781785994722879.9109721639087; Thu, 18 Jun 2026 05:33:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBvU-0007ui-0M; Thu, 18 Jun 2026 08:32:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvS-0007iv-7z for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:54 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvQ-0001JL-Ha for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:32:53 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs1Rp1055622 for ; Thu, 18 Jun 2026 12:32:51 GMT Received: from mail-ua1-f71.google.com (mail-ua1-f71.google.com [209.85.222.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4eux2ccfny-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:32:51 +0000 (GMT) Received: by mail-ua1-f71.google.com with SMTP id a1e0cc1a2514c-966d2fd33b1so152485241.2 for ; Thu, 18 Jun 2026 05:32:51 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781785995645158500 Since commit efe25c260cd ("include/exec: Split out accel/tcg/cpu-mmu-index.h") the "exec/cpu-common.h" isn't using anything defined in "tcg/debug-assert.h". Include it in target/loongarch/tcg/tcg_cpu.c however, where it is required but included indirectly, otherwise we'd get: target/loongarch/tcg/tcg_cpu.c:291:5: error: call to undeclared function = 'tcg_debug_assert' 291 | tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); | ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617160426.64461-5-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - target/loongarch/tcg/tcg_cpu.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 7dc8cab3263..d1a04025363 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -10,7 +10,6 @@ =20 #include "qemu/thread.h" #include "hw/core/cpu.h" -#include "tcg/debug-assert.h" #include "exec/page-protection.h" =20 #define EXCP_INTERRUPT 0x10000 /* async interruption */ diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index f556234d9d2..83291c22c2a 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -13,6 +13,7 @@ #include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" #include "exec/target_page.h" +#include "tcg/debug-assert.h" #include "tcg_loongarch.h" #include "internals.h" =20 --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786018; cv=none; d=zohomail.com; s=zohoarc; b=KXoqPhoCFmKmu5gGcoMWqPrKdtp2R4gp2x9nR4D+l3c28ewlK5PHg7L/d0JAuSX3SQAKx3wzadcnV3KjUmrR5QbENdp3xXd2pTCj7O1fnVbtQlmKSmtoIjxl8la8ycr6b7T49C8Sls8fotTqjaipAjntMxYLxIagl0rXfTI0QOk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786018; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=vUQPzZ/J+oQ2/ytcVfR8rbnQ6dB73FWmxgUq4+klSOI=; b=EgKgSoux7g9V/HNr4o8zhrX/YztFJkvfLTyzRVwaXFHLX/b/WX+q29KtsBN1XmYWQL9xp0Qrv7vT4QkMrlK6Ql4vhlUWaxbZ3bqm/wxMsZmFjK4bpyKtdmIreMZlbhDt8wSUOvE5ZbJl8gko8qx2NMe5CJXdZOl1N7PbCuyZ1tM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786018412675.8379734478486; Thu, 18 Jun 2026 05:33:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBve-0000CK-3T; Thu, 18 Jun 2026 08:33:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvb-0008Tm-Pe for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:04 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvZ-0001KQ-Jb for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:03 -0400 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAsMA6982637 for ; Thu, 18 Jun 2026 12:33:00 GMT Received: from mail-vs1-f69.google.com (mail-vs1-f69.google.com [209.85.217.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4evdn40p5b-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:33:00 +0000 (GMT) Received: by mail-vs1-f69.google.com with SMTP id ada2fe7eead31-6c89de84f33so1384404137.0 for ; Thu, 18 Jun 2026 05:32:59 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786019932158500 Since commit e74781c0888e ("exec/cpu: Extract page-protection definitions to page-protection.h") the "exec/cpu-common.h" isn't using anything defined in "exec/page-protection.h"; remove it. Include it in few files where it is currently pulled in indirectly, otherwise we'd get: linux-user/qemu.h:182:22: error: =E2=80=98PAGE_READ=E2=80=99 undeclared 182 | #define VERIFY_READ PAGE_READ | ^~~~~~~~~ target/loongarch/cpu_helper.c:329:25: error: use of undeclared identifier= 'PAGE_READ' 329 | context->prot =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; | ^ target/loongarch/cpu_helper.c:329:37: error: use of undeclared identifier= 'PAGE_WRITE' 329 | context->prot =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; | ^ target/loongarch/cpu_helper.c:329:50: error: use of undeclared identifier= 'PAGE_EXEC' 329 | context->prot =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; | ^ target/ppc/mmu-hash32.h:98:20: error: use of undeclared identifier 'PAGE_= READ' 98 | prot =3D PAGE_READ | PAGE_WRITE; | ^ target/ppc/mmu-hash32.h:98:32: error: use of undeclared identifier 'PAGE_= WRITE' 98 | prot =3D PAGE_READ | PAGE_WRITE; | ^ hw/ppc/ppc_booke.c:39:17: error: use of undeclared identifier 'PAGE_RWX' 39 | tlb->prot =3D PAGE_RWX << 4 | PAGE_VALID; | ^ hw/ppc/ppc_booke.c:39:33: error: use of undeclared identifier 'PAGE_VALID' 39 | tlb->prot =3D PAGE_RWX << 4 | PAGE_VALID; | ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617160426.64461-6-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - linux-user/qemu.h | 1 + target/ppc/mmu-hash32.h | 1 + hw/ppc/ppc_booke.c | 1 + linux-user/arm/elfload.c | 1 + linux-user/hppa/elfload.c | 1 + linux-user/x86_64/elfload.c | 1 + target/arm/tcg/cpregs-at.c | 1 + target/loongarch/cpu_helper.c | 1 + target/ppc/cpu_init.c | 1 + 10 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index d1a04025363..7eb45a95b6c 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -10,7 +10,6 @@ =20 #include "qemu/thread.h" #include "hw/core/cpu.h" -#include "exec/page-protection.h" =20 #define EXCP_INTERRUPT 0x10000 /* async interruption */ #define EXCP_HLT 0x10001 /* hlt instruction reached */ diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 07fe8016282..fc5d7973021 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -6,6 +6,7 @@ =20 #include "user/abitypes.h" #include "user/page-protection.h" +#include "exec/page-protection.h" =20 #include "syscall_defs.h" #include "target_syscall.h" diff --git a/target/ppc/mmu-hash32.h b/target/ppc/mmu-hash32.h index bfea03ea872..c6e2c60db19 100644 --- a/target/ppc/mmu-hash32.h +++ b/target/ppc/mmu-hash32.h @@ -3,6 +3,7 @@ =20 #ifndef CONFIG_USER_ONLY =20 +#include "exec/page-protection.h" #include "system/memory.h" =20 bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_t= ype, diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c index 052c8c931ae..6f0cad1c752 100644 --- a/hw/ppc/ppc_booke.c +++ b/hw/ppc/ppc_booke.c @@ -24,6 +24,7 @@ =20 #include "qemu/osdep.h" #include "target/ppc/cpu.h" +#include "exec/page-protection.h" #include "exec/target_page.h" #include "hw/ppc/ppc.h" #include "qemu/timer.h" diff --git a/linux-user/arm/elfload.c b/linux-user/arm/elfload.c index fef61022a3d..13b589ea2c5 100644 --- a/linux-user/arm/elfload.c +++ b/linux-user/arm/elfload.c @@ -2,6 +2,7 @@ =20 #include "qemu/osdep.h" #include "qemu.h" +#include "exec/page-protection.h" #include "loader.h" #include "user-internals.h" #include "target_elf.h" diff --git a/linux-user/hppa/elfload.c b/linux-user/hppa/elfload.c index 3354e1b840d..2ebb9924f19 100644 --- a/linux-user/hppa/elfload.c +++ b/linux-user/hppa/elfload.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ =20 #include "qemu/osdep.h" +#include "exec/page-protection.h" #include "qemu.h" #include "loader.h" #include "target_elf.h" diff --git a/linux-user/x86_64/elfload.c b/linux-user/x86_64/elfload.c index 5914f76e833..49a6f6180e0 100644 --- a/linux-user/x86_64/elfload.c +++ b/linux-user/x86_64/elfload.c @@ -2,6 +2,7 @@ =20 #include "qemu/osdep.h" #include "qemu/error-report.h" +#include "exec/page-protection.h" #include "qemu.h" #include "loader.h" #include "target_elf.h" diff --git a/target/arm/tcg/cpregs-at.c b/target/arm/tcg/cpregs-at.c index 1c819c1cdb2..d6d5b73430a 100644 --- a/target/arm/tcg/cpregs-at.c +++ b/target/arm/tcg/cpregs-at.c @@ -4,6 +4,7 @@ */ =20 #include "qemu/osdep.h" +#include "exec/page-protection.h" #include "cpu.h" #include "cpu-features.h" #include "internals.h" diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c index 7f0e64a8739..123cad3d930 100644 --- a/target/loongarch/cpu_helper.c +++ b/target/loongarch/cpu_helper.c @@ -11,6 +11,7 @@ #include "system/tcg.h" #include "cpu.h" #include "accel/tcg/cpu-mmu-index.h" +#include "exec/page-protection.h" #include "exec/target_page.h" #include "internals.h" #include "cpu-csr.h" diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index d25f69f13ba..a02187ce5af 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -40,6 +40,7 @@ #include "qemu/cutils.h" #include "disas/capstone.h" #include "fpu/softfloat.h" +#include "exec/page-protection.h" #include "exec/watchpoint.h" #include "helper_regs.h" #include "internal.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786017853158500 This header is only used when building system units, checking for CONFIG_USER_ONLY is pointless. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616153754.93545-2-philmd@oss.qualcomm.com> --- system/memory-internal.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/system/memory-internal.h b/system/memory-internal.h index 0066ffdffb6..c7573a68b5e 100644 --- a/system/memory-internal.h +++ b/system/memory-internal.h @@ -14,7 +14,6 @@ #ifndef MEMORY_INTERNAL_H #define MEMORY_INTERNAL_H =20 -#ifndef CONFIG_USER_ONLY static inline AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv) { return fv->dispatch; @@ -57,4 +56,3 @@ static inline MemOp devend_memop(enum device_endian end) } =20 #endif -#endif --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786063; cv=none; d=zohomail.com; s=zohoarc; b=B4ckSWmX7d/UAT/579t2OKLSYmMqtAOyEgGxML8Ms/jwhYfMEdn0YfN5MxWKPUHtu8U0GH+RxwBl/ANxYPV81KXn/yuq2CC58PeAkeqr+5RKhgLvNMNmDpQ9jN0JaaBlefZYHOhAkp7c4lIrqSZmCANkbxQ2XXUQXoBMOzmCwT4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786063; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=5yHXzaYJvyUjrT32bfQgx2x8sTz0bFal6uJwPNkFygU=; b=W2axd0FZQPzmWr83cQHqi5X4dA7JD2B7rN3endun6ulpTMdgFO/j7RSUgv3jq5rsx5HJl+Bsh9LJzRbhMI5KbgHLFzcJeco58USZZ/kg7EY0U3yHRqF/tpAv9MS/6NZlaa3PZO9vKAcp5Xut+9aPQ5GZKOFc9i+49gRkPgng9S8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786063932640.3930976774684; Thu, 18 Jun 2026 05:34:23 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBvr-00013K-S5; Thu, 18 Jun 2026 08:33:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvp-0000oY-I4 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:17 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvn-0001Ll-SR for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:17 -0400 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAs0Nc1030375 for ; Thu, 18 Jun 2026 12:33:14 GMT Received: from mail-ua1-f71.google.com (mail-ua1-f71.google.com [209.85.222.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0vm3cwc-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:33:14 +0000 (GMT) Received: by mail-ua1-f71.google.com with SMTP id a1e0cc1a2514c-966a61478ceso274608241.2 for ; Thu, 18 Jun 2026 05:33:14 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Thu, 18 Jun 2026 05:33:13 -0700 (PDT) X-Received: by 2002:a05:6102:2b98:b0:71e:1c56:e792 with SMTP id ada2fe7eead31-727c4cbd51dmr2076736137.8.1781785992929; Thu, 18 Jun 2026 05:33:12 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 39/48] system/memory: Rename cpu_exec_init_all() -> machine_memory_init() Date: Thu, 18 Jun 2026 14:28:16 +0200 Message-ID: <20260618122825.90331-40-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260618122825.90331-1-philmd@oss.qualcomm.com> References: <20260618122825.90331-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE4MDExNiBTYWx0ZWRfXxrL78xruSBZE TAgKtKtnr9/MpxZAHxZ555JGqQzH/aIzPjrR1wNICJ1s6CwsVMecm6vEPf9LoocxqDSRl9fIwNK r4qgo08HnhX3vXOWCvMzdJ5K1V0Zdnrg2hB+a2eoGMJuJPsrbvXbyAVxlhODOjjUtk3L2SIPf/s PJKi3lfTisLil4M6pSVjsUJIelThpN5d1FghsiVY237MZwnQORd1kIwi04ZgPC3HvX6QzRVEI8m A5HJnLOzeuyP+91cMRCQIjzbF1XmKS/T+O+KmxdSksJiM+FdiC77gcJ68gFlhdODyoC7h/6l7tS 2SJ0AcfWW1zdfh2Mcvq56zZpq9s8EQHDtfEHOSMUmxUQARMoltfsGsao7QyNfYQp8Xnh0P+quml X5Py7+9NQyW+qTwUP1qMfV+YZxSpWTzlZTCDFJHafOBvGbdlM5XdMQcRVaEjDibzl58gYxAcT2j g8o4FCjJarWkAbXROhg== X-Proofpoint-ORIG-GUID: 7Xif4O_jKvxirBHl8MVT-owSfXecmcz_ X-Authority-Analysis: v=2.4 cv=UrRT8ewB c=1 sm=1 tr=0 ts=6a33e58a cx=c_pps a=KB4UBwrhAZV1kjiGHFQexw==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=4N88G4Qxp0CkUPUmdhAA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=o1xkdb1NAhiiM49bd1HK:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: 7Xif4O_jKvxirBHl8MVT-owSfXecmcz_ X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE4MDExNiBTYWx0ZWRfX6z1bs2kzL3O2 bwRIVrS4JwM6jpJPb0sMjykqD8vRws2ijUxtRU+gLJRuql19XSr3Q1yWVu4DG8LYG2uHy3KMlJp 818m+Gcf0QElJoLC9RKZVwDjCh8iwhk= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-18_01,2026-06-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 spamscore=0 suspectscore=0 adultscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606180116 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786064531158501 cpu_exec_init_all() is system specific: it initializes globals for the memory subsystem. Rename it as machine_memory_init() and restrict its declaration to 'system/' namespace. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260616153754.93545-3-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - system/memory-internal.h | 2 ++ system/physmem.c | 2 +- system/vl.c | 3 ++- 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 7eb45a95b6c..a781dba770b 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -18,7 +18,6 @@ #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another= */ #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ =20 -void cpu_exec_init_all(void); void cpu_exec_step_atomic(CPUState *cpu); =20 #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_si= ze()) diff --git a/system/memory-internal.h b/system/memory-internal.h index c7573a68b5e..b2b9b5b0c5e 100644 --- a/system/memory-internal.h +++ b/system/memory-internal.h @@ -14,6 +14,8 @@ #ifndef MEMORY_INTERNAL_H #define MEMORY_INTERNAL_H =20 +void machine_memory_init(void); + static inline AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv) { return fv->dispatch; diff --git a/system/physmem.c b/system/physmem.c index 883ac0f314b..9e5b50c5b1c 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3592,7 +3592,7 @@ void address_space_register_map_client(AddressSpace *= as, QEMUBH *bh) } } =20 -void cpu_exec_init_all(void) +void machine_memory_init(void) { qemu_mutex_init(&ram_list.mutex); /* The data structures we set up here depend on knowing the page size, diff --git a/system/vl.c b/system/vl.c index dbdd4f22572..1c0da7df293 100644 --- a/system/vl.c +++ b/system/vl.c @@ -143,6 +143,7 @@ #include "system/iothread.h" #include "qemu/guest-random.h" #include "qemu/keyval.h" +#include "memory-internal.h" =20 #define MAX_VIRTIO_CONSOLES 1 =20 @@ -2217,7 +2218,7 @@ static void qemu_create_machine(QDict *qdict) } } =20 - cpu_exec_init_all(); + machine_memory_init(); =20 /* * Get the default machine options from the machine if it is not alrea= dy --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786028; cv=none; d=zohomail.com; s=zohoarc; b=KJG5+tfU+R+oz46PyhkZepmvqdly9ZAgyAV0IzwS92acNoFgy8M1Kf5LiB13bq8KGHFojkDtaL+g2bkdWQgD12M/tdC+KWHnxCeSEUmMK+CcQ++uwabjBIWdutpz4wzeVVrwLzG24TGz7KaUtFufQqdop+kgYRwJcWPYgUmMQwM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786028; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=njrORuK0p64AYtYneoocEnb959WwMM16V4FhFR/1im4=; b=MujJ6b9IxfWKlWZJnXg2mXZ3WUXWbmBUJpEgAAQFp4CpFDRYXmYrw88ZMkEkRYBwQ0y4ERB36GLEyOzBW/AlQf/q5/I5qlNxkPHBJoX4npKM+oRoqGD38HeUMdnXqF9KaJeB3uqrEUc5bSF/1YJt4f+C76R019y4NUXH+jl+2Aw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786028401506.30394663808283; Thu, 18 Jun 2026 05:33:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBvz-0001un-61; Thu, 18 Jun 2026 08:33:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvx-0001m5-JV for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:25 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBvv-0001Nu-KY for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:25 -0400 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAreZZ3763657 for ; Thu, 18 Jun 2026 12:33:22 GMT Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0vk3b6f-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:33:22 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-9157f1be083so195101885a.3 for ; Thu, 18 Jun 2026 05:33:22 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786030015158500 Rather than calling a TCG specific method in s390_ipl_reset_request(), have handle_diag_308() return whether a vCPU reset is pending, and use that in the TCG DIAG helper to return to the main loop. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Jared Rossi Message-Id: <20260617164035.70788-4-philmd@oss.qualcomm.com> --- target/s390x/s390x-internal.h | 3 ++- hw/s390x/ipl.c | 5 ----- target/s390x/diag.c | 32 ++++++++++++++++---------------- target/s390x/tcg/misc_helper.c | 5 ++++- 4 files changed, 22 insertions(+), 23 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index e7e4f2b45d4..35d1e34ef4d 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -385,7 +385,8 @@ int mmu_translate_real(CPUS390XState *env, hwaddr raddr= , int rw, =20 /* misc_helper.c */ int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3); -void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, +/* Return whether a CPU reset is pending */ +bool handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra); =20 =20 diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index fa50749a7d3..4cca21c6217 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -18,7 +18,6 @@ #include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" -#include "system/tcg.h" #include "elf.h" #include "hw/core/loader.h" #include "hw/core/qdev-properties.h" @@ -690,10 +689,6 @@ void s390_ipl_reset_request(CPUState *cs, enum s390_re= set reset_type) } else { qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); } - /* as this is triggered by a CPU, make sure to exit the loop */ - if (tcg_enabled()) { - cpu_loop_exit(cs); - } } =20 void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type) diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 01cc802eaed..80f09584789 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -95,7 +95,7 @@ static void s390_ipl_write(CPUS390XState *env, uint64_t a= ddr, } } =20 -void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr= _t ra) +bool handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr= _t ra) { bool valid; CPUState *cs =3D env_cpu(env); @@ -105,34 +105,34 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1,= uint64_t r3, uintptr_t ra) =20 if (env->psw.mask & PSW_MASK_PSTATE) { s390_program_interrupt(env, PGM_PRIVILEGED, ra); - return; + return false; } =20 if (subcode & ~0x0ffffULL) { s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return; + return false; } =20 if (subcode >=3D DIAG308_PV_SET && !s390_has_feat(S390_FEAT_UNPACK)) { s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return; + return false; } =20 switch (subcode) { case DIAG308_RESET_MOD_CLR: s390_ipl_reset_request(cs, S390_RESET_MODIFIED_CLEAR); - break; + return true; case DIAG308_RESET_LOAD_NORM: s390_ipl_reset_request(cs, S390_RESET_LOAD_NORMAL); - break; + return true; case DIAG308_LOAD_CLEAR: /* Well we still lack the clearing bit... */ s390_ipl_reset_request(cs, S390_RESET_REIPL); - break; + return true; case DIAG308_SET: case DIAG308_PV_SET: if (diag308_parm_check(env, r1, addr, ra, false)) { - return; + return false; } iplb =3D g_new0(IplParameterBlock, 1); s390_ipl_read(env, addr, iplb, sizeof(iplb->len)); @@ -159,11 +159,11 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1,= uint64_t r3, uintptr_t ra) env->regs[r1 + 1] =3D DIAG_308_RC_OK; out: g_free(iplb); - return; + return false; case DIAG308_STORE: case DIAG308_PV_STORE: if (diag308_parm_check(env, r1, addr, ra, true)) { - return; + return false; } if (subcode =3D=3D DIAG308_PV_STORE) { iplb =3D s390_ipl_get_iplb_pv(); @@ -172,30 +172,30 @@ out: } if (!iplb) { env->regs[r1 + 1] =3D DIAG_308_RC_NO_CONF; - return; + return false; } =20 s390_ipl_write(env, addr, iplb, be32_to_cpu(iplb->len)); env->regs[r1 + 1] =3D DIAG_308_RC_OK; - return; + return false; case DIAG308_PV_START: iplb =3D s390_ipl_get_iplb_pv(); if (!iplb) { env->regs[r1 + 1] =3D DIAG_308_RC_NO_PV_CONF; - return; + return false; } =20 if (kvm_enabled() && kvm_s390_get_hpage_1m()) { error_report("Protected VMs can currently not be backed with " "huge pages"); env->regs[r1 + 1] =3D DIAG_308_RC_INVAL_FOR_PV; - return; + return false; } =20 s390_ipl_reset_request(cs, S390_RESET_PV); - break; + return true; default: s390_program_interrupt(env, PGM_SPECIFICATION, ra); - break; + return false; } } diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index 3d13c8bd8ea..036be93fb32 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -135,7 +135,10 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uin= t32_t r3, uint32_t num) case 0x308: /* ipl */ bql_lock(); - handle_diag_308(env, r1, r3, GETPC()); + if (handle_diag_308(env, r1, r3, GETPC())) { + /* As reset is triggered by the CPU, make sure to exit the loo= p */ + cpu_loop_exit(CPU(env_archcpu(env))); + } bql_unlock(); r =3D 0; break; --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786019; cv=none; d=zohomail.com; s=zohoarc; b=fMmqHDSx0Ju9FKmS9I6iNaA+b2MuSvQoDavXkko/XQDGimHuN5cD+p7FbYPaC40EO1ucoZL/8+WkcDlUhmlL6G/nrHWkZaN5o0mUIkSyJR3RkMzmGDZqhyepTchnImCjXkshDXpYaWGFJqo8S4QnRqk2iRNGgqQBG1WUHYPkeFo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786019; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786019861158500 Last commit removed the last non-TCG use of cpu_loop_exit(). This method is now only called within TCG files, so we can remove its stub for non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-4-philmd@oss.qualcomm.com> --- accel/stubs/tcg-stub.c | 19 ------------------- accel/stubs/meson.build | 1 - 2 files changed, 20 deletions(-) delete mode 100644 accel/stubs/tcg-stub.c diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c deleted file mode 100644 index 77055e39644..00000000000 --- a/accel/stubs/tcg-stub.c +++ /dev/null @@ -1,19 +0,0 @@ -/* - * QEMU TCG accelerator stub - * - * Copyright Red Hat, Inc. 2013 - * - * Author: Paolo Bonzini - * - * This work is licensed under the terms of the GNU GPL, version 2 or late= r. - * See the COPYING file in the top-level directory. - * - */ - -#include "qemu/osdep.h" -#include "exec/cpu-common.h" - -G_NORETURN void cpu_loop_exit(CPUState *cpu) -{ - g_assert_not_reached(); -} diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build index ccad583e647..7c6d7ad9432 100644 --- a/accel/stubs/meson.build +++ b/accel/stubs/meson.build @@ -4,7 +4,6 @@ stub_ss.add(files( 'nitro-stub.c', 'mshv-stub.c', 'nvmm-stub.c', - 'tcg-stub.c', 'whpx-stub.c', 'xen-stub.c', )) --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786025; cv=none; d=zohomail.com; s=zohoarc; b=Me1h15yMvYb6GHS90XLc1hzPBAVtkXb0Tmwr3E2wWO4c4VLNdwrwWB209fO0WYYRHsEXLh4vaTLRqx3s+ip1qo0mTG5kijx13hajtXBvfjdktBEsCD2DtombmnxyJfGdsDMenRmrZSdg/+uVgU5GiMQu7exiL6cFYDKU4GzAgiw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786025; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=OtiPS78G+VPXO7O3XPuKRCNU39oloyqSTIkwRcGKQwM=; b=ENq07yaxGQn1BM3nSBZwMN5sYOPxQXdRs4PnU0VMS3RcbviYrlp+z1aUL01WiPhSlUiv8Eoc0nKpJbzyyGWcLmwW9jaKC1GMWPbLy0iQK7CxcsMKte5P3zWBt3xHlJT3hk6JSB0dYq8zCE5KrW0vLUHy9H473pTn8Q4NaSsI5dg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786025687435.1179384054369; Thu, 18 Jun 2026 05:33:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBwD-0002bj-1u; Thu, 18 Jun 2026 08:33:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwB-0002Xr-O5 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:39 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwA-0001U8-1F for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:39 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArkdE1608939 for ; Thu, 18 Jun 2026 12:33:36 GMT Received: from mail-vs1-f72.google.com (mail-vs1-f72.google.com [209.85.217.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ev0g7kk7j-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:33:35 +0000 (GMT) Received: by mail-vs1-f72.google.com with SMTP id ada2fe7eead31-6c554284973so1094791137.2 for ; Thu, 18 Jun 2026 05:33:35 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786025955158500 In order to keep TCG-specific functions under a TCG API namespace, add the "accel/tcg/cpu-loop.h" header and move cpu_exec() declaration to it. Add a bit of documentation. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-5-philmd@oss.qualcomm.com> --- bsd-user/freebsd/os-proc.h | 1 + include/accel/tcg/cpu-loop.h | 21 +++++++++++++++++++++ include/exec/cpu-common.h | 3 --- include/user/cpu_loop.h | 2 +- accel/tcg/cpu-exec.c | 1 + accel/tcg/tcg-accel-ops.c | 1 + bsd-user/main.c | 1 + 7 files changed, 26 insertions(+), 4 deletions(-) create mode 100644 include/accel/tcg/cpu-loop.h diff --git a/bsd-user/freebsd/os-proc.h b/bsd-user/freebsd/os-proc.h index 72ccf23e17e..1cf3c43de34 100644 --- a/bsd-user/freebsd/os-proc.h +++ b/bsd-user/freebsd/os-proc.h @@ -14,6 +14,7 @@ #include #include =20 +#include "accel/tcg/cpu-loop.h" #include "target_arch_cpu.h" =20 pid_t safe_wait4(pid_t wpid, int *status, int options, struct rusage *rusa= ge); diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h new file mode 100644 index 00000000000..6a3c8ed48b2 --- /dev/null +++ b/include/accel/tcg/cpu-loop.h @@ -0,0 +1,21 @@ +/* + * QEMU TCG CPU loop API + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef ACCEL_TCG_CPU_LOOP_COMMON_H +#define ACCEL_TCG_CPU_LOOP_COMMON_H + +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + +/** + * cpu_exec: + * @cpu: the cpu context + * + * Returns one of the EXCP_* definitions (see "exec/cpu-common.h"). + */ +int cpu_exec(CPUState *cpu); + +#endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index a781dba770b..09915dc4c44 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -111,9 +111,6 @@ G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, ui= ntptr_t pc); #endif /* CONFIG_TCG */ G_NORETURN void cpu_loop_exit(CPUState *cpu); =20 -/* accel/tcg/cpu-exec.c */ -int cpu_exec(CPUState *cpu); - /** * env_archcpu(env) * @env: The architecture environment diff --git a/include/user/cpu_loop.h b/include/user/cpu_loop.h index 346e37ede8b..c9d49398f01 100644 --- a/include/user/cpu_loop.h +++ b/include/user/cpu_loop.h @@ -22,7 +22,7 @@ =20 #include "exec/vaddr.h" #include "exec/mmu-access-type.h" - +#include "accel/tcg/cpu-loop.h" =20 /** * adjust_signal_pc: diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 7292ff15060..9c754b03656 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -22,6 +22,7 @@ #include "qapi/error.h" #include "qapi/type-helpers.h" #include "hw/core/cpu.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "accel/tcg/helper-retaddr.h" #include "trace.h" diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 3bd98005042..c179cd4adeb 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "accel/accel-ops.h" #include "accel/accel-cpu-ops.h" +#include "accel/tcg/cpu-loop.h" #include "system/tcg.h" #include "system/replay.h" #include "exec/icount.h" diff --git a/bsd-user/main.c b/bsd-user/main.c index 73aae8c3274..4f1544342eb 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -39,6 +39,7 @@ #include "user/guest-base.h" #include "user/page-protection.h" #include "accel/accel-ops.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/startup.h" #include "qemu/timer.h" #include "qemu/envlist.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786092459158500 Move the TCG-specific cpu_exec_step_atomic() declaration out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-6-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 2 ++ include/exec/cpu-common.h | 2 -- accel/tcg/tcg-accel-ops-mttcg.c | 1 + accel/tcg/tcg-accel-ops-rr.c | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index 6a3c8ed48b2..94e91eb9a36 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -18,4 +18,6 @@ */ int cpu_exec(CPUState *cpu); =20 +void cpu_exec_step_atomic(CPUState *cpu); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 09915dc4c44..a97bb6faf42 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -18,8 +18,6 @@ #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another= */ #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ =20 -void cpu_exec_step_atomic(CPUState *cpu); - #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_si= ze()) =20 /* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */ diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttc= g.c index 4160e2ba947..69560fdb9d8 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -32,6 +32,7 @@ #include "qemu/notify.h" #include "qemu/guest-random.h" #include "hw/core/boards.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/startup.h" #include "tcg-accel-ops.h" #include "tcg-accel-ops-mttcg.h" diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index f84342e0449..5b132d3d5d8 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -32,6 +32,7 @@ #include "qemu/notify.h" #include "qemu/guest-random.h" #include "exec/cpu-common.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/startup.h" #include "tcg-accel-ops.h" #include "tcg-accel-ops-rr.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786064; cv=none; d=zohomail.com; s=zohoarc; b=NgLCzN+9Y9cfdhmofNWxtT7lx+t+PdDGr4or5jvUXFgvWulO1CJGRxytvc0klMgZl06j32UXGFR3ifxViwCk3hpn5OkKi1iLSb+p6IEoCAvvdw9vFyGU1YPplFRedNqzcjICmJtyg0AqF4+eOcNlz87eH2DuCCWgZ+zp0e5MqMM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786064; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=DC3BSaFtFB6SAIxW6IFL5cbKK0McN8PDE54PlOkMhbk=; b=L3LDKSP6hgDaUiMAMs+OS76ObdLTOtXfaz3qSGvgIbEC03oB7JLhcwYIwEvQ7gh1Fih5wVGIvtMIUcYPhvywZO3s7SQPEl0Q4BXOTVCT2hEjh4dab09IPgUXwrTQNziIegDpEdpVFa5mxza47F8lBErnUeXN9n0CuSnXRQysdrg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786064116416.16818593586345; Thu, 18 Jun 2026 05:34:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBwT-0003ox-HB; Thu, 18 Jun 2026 08:33:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwR-0003j0-PN for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:55 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwP-0001as-Sb for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:33:55 -0400 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IArhpT936405 for ; Thu, 18 Jun 2026 12:33:52 GMT Received: from mail-qk1-f200.google.com (mail-qk1-f200.google.com [209.85.222.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4euxt546qf-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:33:52 +0000 (GMT) Received: by mail-qk1-f200.google.com with SMTP id af79cd13be357-9181f3cc5ecso414189985a.1 for ; Thu, 18 Jun 2026 05:33:52 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786066334158501 Move the TCG-specific cpu_unwind_state_data() declaration out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-7-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 13 +++++++++++++ include/exec/cpu-common.h | 13 ------------- accel/tcg/translate-all.c | 1 + target/i386/helper.c | 1 + target/or1k/sys_helper.c | 1 + target/riscv/csr.c | 1 + 6 files changed, 17 insertions(+), 13 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index 94e91eb9a36..88333d39200 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -20,4 +20,17 @@ int cpu_exec(CPUState *cpu); =20 void cpu_exec_step_atomic(CPUState *cpu); =20 +/** + * cpu_unwind_state_data: + * @cpu: the cpu context + * @host_pc: the host pc within the translation + * @data: output data + * + * Attempt to load the unwind state for a host pc occurring in + * translated code. If @host_pc is not in translated code, the + * function returns false; otherwise @data is loaded. + * This is the same unwind info as given to restore_state_to_opc. + */ +bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *dat= a); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index a97bb6faf42..7c9631efb06 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -61,19 +61,6 @@ void list_cpus(void); #ifdef CONFIG_TCG #include "qemu/atomic.h" =20 -/** - * cpu_unwind_state_data: - * @cpu: the cpu context - * @host_pc: the host pc within the translation - * @data: output data - * - * Attempt to load the unwind state for a host pc occurring in - * translated code. If @host_pc is not in translated code, the - * function returns false; otherwise @data is loaded. - * This is the same unwind info as given to restore_state_to_opc. - */ -bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *dat= a); - /** * cpu_restore_state: * @cpu: the cpu context diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 5235c73bc26..3f1a3a28438 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -29,6 +29,7 @@ #include "qemu/target-info.h" #include "exec/log.h" #include "exec/icount.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "tb-jmp-cache.h" #include "tb-hash.h" diff --git a/target/i386/helper.c b/target/i386/helper.c index c3cba04e142..68362141621 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -32,6 +32,7 @@ #endif #include "qemu/log.h" #ifdef CONFIG_TCG +#include "accel/tcg/cpu-loop.h" #include "tcg/insn-start-words.h" #endif =20 diff --git a/target/or1k/sys_helper.c b/target/or1k/sys_helper.c index ca627bd7194..8ffa31b84fd 100644 --- a/target/or1k/sys_helper.c +++ b/target/or1k/sys_helper.c @@ -23,6 +23,7 @@ #include "exec/cputlb.h" #include "exec/target_page.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "exception.h" #ifndef CONFIG_USER_ONLY #include "hw/core/boards.h" diff --git a/target/riscv/csr.c b/target/riscv/csr.c index ec931a8c3dd..dd9726fcf4c 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -27,6 +27,7 @@ #include "time_helper.h" #include "exec/cputlb.h" #include "exec/icount.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/getpc.h" #include "qemu/guest-random.h" #include "qapi/error.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786064; cv=none; d=zohomail.com; s=zohoarc; b=QXxU4bfewnRrVDwdmLJXGyJZSqvDNiI1AxN6HyYBWXUu7hLSNXpCobBjOCq3sDwlHZ3UXd9g53VYNo29Hkr70tj6LbSYtm7kfWBfs4saQ5oI3lXFnbJlELTnCxbtM8jqX0b8BvPgk1svEU1WbaO1UmCzuW/L4UbFyrZqVwa7Ghw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786064; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=zRs2KHSv5nfUnAHny9bbk2EinZ1jGbA966yOSVNvExc=; b=GujcDuuAN7kNIC3P2IBW7wrzSrhyfCyZTbfXoQvkdsfmRzH1oUHHsBCXbsjGKBTWMH/tKyWZ37hT2haQAUI7tEL7rmwhh5QtFoapuERwTBaPpvAEpLj2XXsowfd8+TYwonL7gz5ieF1vZs37FnJwxWAtqg/DlStLatgxOHXgAPw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786064531282.7494073531934; Thu, 18 Jun 2026 05:34:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBwf-0004KV-0d; Thu, 18 Jun 2026 08:34:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwY-0004DH-QV for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:34:04 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwW-0001cA-HJ for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:34:02 -0400 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65ICK7rA1789186 for ; Thu, 18 Jun 2026 12:33:59 GMT Received: from mail-vs1-f72.google.com (mail-vs1-f72.google.com [209.85.217.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4eux2jvg6f-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:33:59 +0000 (GMT) Received: by mail-vs1-f72.google.com with SMTP id ada2fe7eead31-6c33d75153dso491496137.0 for ; Thu, 18 Jun 2026 05:33:59 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786066418158500 Move the TCG-specific cpu_restore_state() declaration out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-8-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 12 ++++++++++++ include/exec/cpu-common.h | 12 ------------ accel/tcg/cpu-exec-common.c | 1 + accel/tcg/user-exec.c | 1 + target/alpha/helper.c | 1 + target/alpha/mem_helper.c | 1 + target/arm/tcg/op_helper.c | 1 + target/arm/tcg/tlb_helper.c | 1 + target/hppa/cpu.c | 1 + target/hppa/mem_helper.c | 1 + target/hppa/op_helper.c | 1 + target/i386/tcg/system/svm_helper.c | 1 + target/m68k/op_helper.c | 1 + target/microblaze/helper.c | 1 + target/ppc/tcg-excp_helper.c | 1 + target/s390x/tcg/excp_helper.c | 1 + target/sh4/op_helper.c | 1 + target/tricore/op_helper.c | 1 + target/xtensa/helper.c | 1 + 19 files changed, 29 insertions(+), 12 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index 88333d39200..d98a8a2e0cd 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -33,4 +33,16 @@ void cpu_exec_step_atomic(CPUState *cpu); */ bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *dat= a); =20 +/** + * cpu_restore_state: + * @cpu: the cpu context + * @host_pc: the host pc within the translation + * @return: true if state was restored, false otherwise + * + * Attempt to restore the state for a fault occurring in translated + * code. If @host_pc is not in translated code no state is + * restored and the function returns false. + */ +bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 7c9631efb06..db67c7bb864 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -61,18 +61,6 @@ void list_cpus(void); #ifdef CONFIG_TCG #include "qemu/atomic.h" =20 -/** - * cpu_restore_state: - * @cpu: the cpu context - * @host_pc: the host pc within the translation - * @return: true if state was restored, false otherwise - * - * Attempt to restore the state for a fault occurring in translated - * code. If @host_pc is not in translated code no state is - * restored and the function returns false. - */ -bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); - /** * cpu_loop_exit_requested: * @cpu: The CPU state to be tested diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c index c5c513f1e4a..e48ea31373f 100644 --- a/accel/tcg/cpu-exec-common.c +++ b/accel/tcg/cpu-exec-common.c @@ -21,6 +21,7 @@ #include "exec/log.h" #include "system/tcg.h" #include "qemu/plugin.h" +#include "accel/tcg/cpu-loop.h" #include "internal-common.h" =20 bool tcg_allowed; diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index d283d3cc724..7704e4017dd 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -25,6 +25,7 @@ #include "qemu/bitops.h" #include "qemu/rcu.h" #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/helper-retaddr.h" #include "accel/tcg/probe.h" #include "user/cpu_loop.h" diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 2abf07c1919..c3614ecafda 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -28,6 +28,7 @@ #include "exec/helper-proto.h" #include "qemu/qemu-print.h" #include "system/memory.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/plugin.h" =20 =20 diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c index 572ea9cb418..b3988417e4b 100644 --- a/target/alpha/mem_helper.c +++ b/target/alpha/mem_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" =20 static void do_unaligned_access(CPUAlphaState *env, vaddr addr, uintptr_t = retaddr) { diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index 504526153a6..9f9ea39be5a 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -23,6 +23,7 @@ #include "helper.h" #include "internals.h" #include "cpu-features.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "cpregs.h" =20 diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c index cbef9cb03ef..4c3f16dc2aa 100644 --- a/target/arm/tcg/tlb_helper.c +++ b/target/arm/tcg/tlb_helper.c @@ -8,6 +8,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "helper.h" +#include "accel/tcg/cpu-loop.h" #include "internals.h" #include "cpu-features.h" #include "hw/intc/armv7m_nvic.h" diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 6443122cf1a..a68152f9682 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -29,6 +29,7 @@ #include "fpu/softfloat.h" #include "tcg/tcg.h" #include "hw/hppa/hppa_hardware.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" =20 static void hppa_cpu_set_pc(CPUState *cs, vaddr value) diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index f5076492264..01e6149c811 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "accel/tcg/probe.h" #include "exec/page-protection.h" diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index f961046e4c5..76a8d8a0d34 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "qemu/timer.h" #include "trace.h" diff --git a/target/i386/tcg/system/svm_helper.c b/target/i386/tcg/system/s= vm_helper.c index d5ffabc2f4d..52a234e7fac 100644 --- a/target/i386/tcg/system/svm_helper.c +++ b/target/i386/tcg/system/svm_helper.c @@ -23,6 +23,7 @@ #include "exec/helper-proto.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/helper-tcg.h" =20 /* Secure Virtual Machine helpers */ diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 8148a8852e7..38f7a689814 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "semihosting/semihost.h" #include "qemu/plugin.h" =20 diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index 6a982c18c0f..05a90f5ecb2 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index 5e6c1e326d4..b04f07a6377 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "target/ppc/cpu.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "exec/helper-proto.h" #include "system/runstate.h" =20 diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index 05e448d3f20..d952bb20cf1 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "exec/cputlb.h" #include "exec/target_page.h" +#include "accel/tcg/cpu-loop.h" #include "s390x-internal.h" #include "tcg_s390x.h" #ifndef CONFIG_USER_ONLY diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index cf0f80e4a54..90c065b217b 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -20,6 +20,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "fpu/softfloat.h" =20 #ifndef CONFIG_USER_ONLY diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c index 3cff5000c73..46b17da2bc6 100644 --- a/target/tricore/op_helper.c +++ b/target/tricore/op_helper.c @@ -19,6 +19,7 @@ #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/plugin.h" #include /* for crc32 */ =20 diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index 2d93b45036d..5a0e8655146 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -32,6 +32,7 @@ #include "exec/target_page.h" #include "gdbstub/helpers.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "qemu/host-utils.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786078287158500 Since the CPUState argument is simply read-only accessed, make it const. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-9-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index db67c7bb864..919ba41a013 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -73,7 +73,7 @@ void list_cpus(void); * call can be used to check if it makes sense to return to the main loop * or to continue executing the interruptible instruction. */ -static inline bool cpu_loop_exit_requested(CPUState *cpu) +static inline bool cpu_loop_exit_requested(const CPUState *cpu) { return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; } --=20 2.53.0 From nobody Sun Jul 26 12:38:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1781786073; cv=none; d=zohomail.com; s=zohoarc; b=YEN0fQqR3MI+fApHak6UNtMR7YHg/3B60EWYJphHP2cv4nRm5YO4NGq5LzbyLKFQOXPKmdrJ14XedmTitBp2pQQQcGK6ZfKxD+VMnZ///roi9GX7ItGtuSL6QUEyl0SMYAV65fj/bGHDFCbBIcFx/nalA3Iu8hia6lkIGcLEUJ8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781786073; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=vPD/hpFSecT/OcP+5XQ8I+k6Vjm59cK7pVSQSEx/AGg=; b=RrSwILqsWL7Vu5NJnw/eli7YlfSWiG+be6LNIsyFOrdBEhLMOt28r0JvhUOT/sFDUFIg0OkuOKTL6uxDqbnBGLG6vT9c0TyG7HESwarnCOXhd/tj7Wr9hN0Wa/Fp2cRIJd3aN6Ox3prCMsmNHwKcVMnk9h3irSIeA4PHw0/SZXs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781786073180365.7849172576607; Thu, 18 Jun 2026 05:34:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1waBwq-00051s-Qf; Thu, 18 Jun 2026 08:34:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwo-0004kW-L1 for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:34:18 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1waBwl-0001nQ-KU for qemu-devel@nongnu.org; Thu, 18 Jun 2026 08:34:18 -0400 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65IAraCW981280 for ; Thu, 18 Jun 2026 12:34:14 GMT Received: from mail-vs1-f69.google.com (mail-vs1-f69.google.com [209.85.217.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4evdn40pak-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 18 Jun 2026 12:34:14 +0000 (GMT) Received: by mail-vs1-f69.google.com with SMTP id ada2fe7eead31-6c554284973so1095470137.2 for ; Thu, 18 Jun 2026 05:34:13 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786074471158500 Move the following TCG-specific cpu_loop_exit_*() declarations out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one, documenting them: - cpu_loop_exit_noexc() - cpu_loop_exit_atomic() - cpu_loop_exit_restore() - cpu_loop_exit() Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-11-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 28 ++++++++++++++++++++++++++++ include/exec/cpu-common.h | 5 ----- accel/tcg/cputlb.c | 1 + accel/tcg/tb-maint.c | 1 + accel/tcg/tcg-runtime.c | 1 + accel/tcg/watchpoint.c | 1 + hw/misc/mips_itu.c | 1 + plugins/api.c | 1 + semihosting/console.c | 1 + target/arm/tcg/helper-a64.c | 1 + target/avr/helper.c | 1 + target/hexagon/op_helper.c | 1 + target/i386/tcg/excp_helper.c | 1 + target/i386/tcg/misc_helper.c | 1 + target/i386/tcg/system/bpt_helper.c | 1 + target/i386/tcg/system/misc_helper.c | 1 + target/i386/tcg/user/excp_helper.c | 1 + target/i386/tcg/user/seg_helper.c | 1 + target/loongarch/tcg/tcg_cpu.c | 1 + target/loongarch/tcg/tlb_helper.c | 1 + target/m68k/helper.c | 1 + target/microblaze/op_helper.c | 1 + target/mips/tcg/exception.c | 1 + target/mips/tcg/system/tlb_helper.c | 1 + target/or1k/exception.c | 1 + target/or1k/exception_helper.c | 1 + target/or1k/fpu_helper.c | 1 + target/or1k/mmu.c | 1 + target/ppc/user_only_helper.c | 1 + target/riscv/cpu_helper.c | 1 + target/riscv/op_helper.c | 1 + target/rx/op_helper.c | 1 + target/s390x/mmu_helper.c | 3 +++ target/s390x/tcg/cc_helper.c | 1 + target/s390x/tcg/debug.c | 1 + target/s390x/tcg/mem_helper.c | 1 + target/s390x/tcg/misc_helper.c | 1 + target/sh4/helper.c | 1 + target/sparc/helper.c | 1 + target/sparc/mmu_helper.c | 1 + target/tricore/helper.c | 1 + target/xtensa/exc_helper.c | 1 + 42 files changed, 70 insertions(+), 5 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index d98a8a2e0cd..f4d38bc2bca 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -45,4 +45,32 @@ bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host= _pc, uint64_t *data); */ bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); =20 +/** + * cpu_loop_exit_noexc: + * @cpu: the cpu context + * + * Exit the current TB, but without causing any exception to be raised. + */ +G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); + +/** + * cpu_loop_exit_restore: + * @cpu: the cpu context + * @host_pc: the host pc within the translation + * + * Attempt to restore the state for a fault occurring in translated + * code. If @host_pc is not in translated code no state is + * restored. Finally, exit the current TB. + */ +G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t host_pc); +G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t host_pc); + +/** + * cpu_loop_exit: + * @cpu: the cpu context + * + * Exit the current TB. + */ +G_NORETURN void cpu_loop_exit(CPUState *cpu); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 919ba41a013..6594f7fa1be 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -77,12 +77,7 @@ static inline bool cpu_loop_exit_requested(const CPUStat= e *cpu) { return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; } - -G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); -G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); -G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); #endif /* CONFIG_TCG */ -G_NORETURN void cpu_loop_exit(CPUState *cpu); =20 /** * env_archcpu(env) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index b4239ed5be2..6e66f3c6e93 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "qemu/target-info.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "accel/tcg/iommu.h" #include "accel/tcg/probe.h" diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 7a29a349110..c33dbf65e7f 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -26,6 +26,7 @@ #include "exec/mmap-lock.h" #include "exec/tb-flush.h" #include "exec/target_page.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "tb-internal.h" #include "system/tcg.h" diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index f483c9c2ba2..7c0aab98a80 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -25,6 +25,7 @@ #include "qemu/host-utils.h" #include "exec/cpu-common.h" #include "exec/helper-proto-common.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/getpc.h" =20 #define HELPER_H "accel/tcg/tcg-runtime.h" diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c index cfb37a49e72..c75ed278459 100644 --- a/accel/tcg/watchpoint.c +++ b/accel/tcg/watchpoint.c @@ -25,6 +25,7 @@ #include "exec/translation-block.h" #include "system/tcg.h" #include "system/replay.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "hw/core/cpu.h" #include "internal-common.h" diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 82c0a90f704..c20eca28a1e 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -25,6 +25,7 @@ #include "hw/core/cpu.h" #include "hw/misc/mips_itu.h" #include "hw/core/qdev-properties.h" +#include "accel/tcg/cpu-loop.h" #include "target/mips/cpu.h" =20 #define ITC_TAG_ADDRSPACE_SZ (ITC_ADDRESSMAP_NUM * 8) diff --git a/plugins/api.c b/plugins/api.c index 0038da6d706..eb982f9aad7 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -40,6 +40,7 @@ #include "qemu/plugin.h" #include "qemu/log.h" #include "system/memory.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/tcg.h" #include "exec/cpu-common.h" #include "exec/gdbstub.h" diff --git a/semihosting/console.c b/semihosting/console.c index a4db8d8e76d..91e5d50d502 100644 --- a/semihosting/console.c +++ b/semihosting/console.c @@ -18,6 +18,7 @@ #include "qemu/osdep.h" #include "semihosting/semihost.h" #include "semihosting/console.h" +#include "accel/tcg/cpu-loop.h" #include "exec/cpu-common.h" #include "exec/gdbstub.h" #include "qemu/log.h" diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index a0f9215f1c9..05ab9ab6d31 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -31,6 +31,7 @@ #include "qemu/crc32c.h" #include "exec/cpu-common.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/helper-retaddr.h" #include "accel/tcg/probe.h" #include "exec/target_page.h" diff --git a/target/avr/helper.c b/target/avr/helper.c index f3be8483b27..f452c9d9040 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -23,6 +23,7 @@ #include "qemu/error-report.h" #include "cpu.h" #include "accel/tcg/cpu-ops.h" +#include "accel/tcg/cpu-loop.h" #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 368391bb846..0a946433644 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -18,6 +18,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" diff --git a/target/i386/tcg/excp_helper.c b/target/i386/tcg/excp_helper.c index 32f2784e923..1eaa602c91d 100644 --- a/target/i386/tcg/excp_helper.c +++ b/target/i386/tcg/excp_helper.c @@ -18,6 +18,7 @@ */ =20 #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "qemu/log.h" #include "system/runstate.h" diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c index 2b5f092a23f..f7342871ded 100644 --- a/target/i386/tcg/misc_helper.c +++ b/target/i386/tcg/misc_helper.c @@ -19,6 +19,7 @@ =20 #include "qemu/osdep.h" #include "qemu/log.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "exec/cputlb.h" diff --git a/target/i386/tcg/system/bpt_helper.c b/target/i386/tcg/system/b= pt_helper.c index aebb5caac37..2feea69c8a1 100644 --- a/target/i386/tcg/system/bpt_helper.c +++ b/target/i386/tcg/system/bpt_helper.c @@ -18,6 +18,7 @@ */ =20 #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "exec/watchpoint.h" diff --git a/target/i386/tcg/system/misc_helper.c b/target/i386/tcg/system/= misc_helper.c index bb79d4e470e..2998b1aae75 100644 --- a/target/i386/tcg/system/misc_helper.c +++ b/target/i386/tcg/system/misc_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "system/address-spaces.h" #include "system/memory.h" #include "exec/cputlb.h" diff --git a/target/i386/tcg/user/excp_helper.c b/target/i386/tcg/user/excp= _helper.c index 6c5df5e0e88..0957ad2e9ec 100644 --- a/target/i386/tcg/user/excp_helper.c +++ b/target/i386/tcg/user/excp_helper.c @@ -18,6 +18,7 @@ */ =20 #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "tcg/helper-tcg.h" =20 diff --git a/target/i386/tcg/user/seg_helper.c b/target/i386/tcg/user/seg_h= elper.c index 28bbef1bbae..3a4a6d5a745 100644 --- a/target/i386/tcg/user/seg_helper.c +++ b/target/i386/tcg/user/seg_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/helper-tcg.h" #include "tcg/seg_helper.h" =20 diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index 83291c22c2a..4b1d44a1644 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -10,6 +10,7 @@ #include "qemu/log.h" #include "qemu/plugin.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" #include "exec/target_page.h" diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_h= elper.c index 7623f4f9bdb..a4b90beca65 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -17,6 +17,7 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "exec/log.h" #include "cpu-csr.h" #include "tcg/tcg_loongarch.h" diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 2dd9ec1bdcb..5f91d206f59 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -25,6 +25,7 @@ #include "exec/target_page.h" #include "exec/gdbstub.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "system/memory.h" #include "gdbstub/helpers.h" #include "fpu/softfloat.h" diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 84c60c2636e..3da0c68da39 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "fpu/softfloat.h" =20 void helper_put(uint32_t id, uint32_t ctrl, uint32_t data) diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index d32bcebf469..630b8b809fa 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -24,6 +24,7 @@ #include "internal.h" #include "exec/helper-proto.h" #include "exec/translation-block.h" +#include "accel/tcg/cpu-loop.h" =20 target_ulong exception_resume_pc(CPUMIPSState *env) { diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/t= lb_helper.c index c850ddd9650..4398c6f80b4 100644 --- a/target/mips/tcg/system/tlb_helper.c +++ b/target/mips/tcg/system/tlb_helper.c @@ -26,6 +26,7 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "exec/log.h" #include "exec/helper-proto.h" =20 diff --git a/target/or1k/exception.c b/target/or1k/exception.c index e213be36b6b..0479a069592 100644 --- a/target/or1k/exception.c +++ b/target/or1k/exception.c @@ -18,6 +18,7 @@ */ =20 #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exception.h" =20 diff --git a/target/or1k/exception_helper.c b/target/or1k/exception_helper.c index c2c9d136528..3bd82b29719 100644 --- a/target/or1k/exception_helper.c +++ b/target/or1k/exception_helper.c @@ -19,6 +19,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" +#include "accel/tcg/cpu-loop.h" #include "exec/helper-proto.h" #include "exception.h" =20 diff --git a/target/or1k/fpu_helper.c b/target/or1k/fpu_helper.c index 39b6195dd7d..e680606d4da 100644 --- a/target/or1k/fpu_helper.c +++ b/target/or1k/fpu_helper.c @@ -19,6 +19,7 @@ */ =20 #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" diff --git a/target/or1k/mmu.c b/target/or1k/mmu.c index 3ff288a1f94..3fc56e1b771 100644 --- a/target/or1k/mmu.c +++ b/target/or1k/mmu.c @@ -24,6 +24,7 @@ #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/target_page.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/host-utils.h" #include "hw/core/loader.h" =20 diff --git a/target/ppc/user_only_helper.c b/target/ppc/user_only_helper.c index ae210eb8474..cc6d7ee88aa 100644 --- a/target/ppc/user_only_helper.c +++ b/target/ppc/user_only_helper.c @@ -19,6 +19,7 @@ */ =20 #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "internal.h" =20 diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index e5653a57302..59edcdd3704 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -29,6 +29,7 @@ #include "system/memory.h" #include "instmap.h" #include "tcg/tcg-op.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "trace.h" #include "semihosting/common-semi.h" diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 3dc8c4f6b3b..6d4849b135e 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -24,6 +24,7 @@ #include "internals.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "exec/tlb-flags.h" diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index ca3e9e85fc7..36df7d377e5 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "fpu/softfloat.h" #include "tcg/debug-assert.h" =20 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 255271b9d34..2f886d424a1 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -24,6 +24,9 @@ #include "system/kvm.h" #include "system/tcg.h" #include "system/memory.h" +#ifdef CONFIG_TCG +#include "accel/tcg/cpu-loop.h" +#endif #include "exec/page-protection.h" #include "exec/target_page.h" #include "hw/core/hw-error.h" diff --git a/target/s390x/tcg/cc_helper.c b/target/s390x/tcg/cc_helper.c index 6595ac763c3..e538a75d713 100644 --- a/target/s390x/tcg/cc_helper.c +++ b/target/s390x/tcg/cc_helper.c @@ -20,6 +20,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" +#include "accel/tcg/cpu-loop.h" #include "s390x-internal.h" #include "tcg_s390x.h" #include "exec/helper-proto.h" diff --git a/target/s390x/tcg/debug.c b/target/s390x/tcg/debug.c index 50d2853d443..99140b1ac9a 100644 --- a/target/s390x/tcg/debug.c +++ b/target/s390x/tcg/debug.c @@ -7,6 +7,7 @@ #include "qemu/osdep.h" #include "exec/breakpoint.h" #include "exec/watchpoint.h" +#include "accel/tcg/cpu-loop.h" #include "target/s390x/cpu.h" #include "target/s390x/s390x-internal.h" #include "tcg_s390x.h" diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 8474a694110..414e6838c87 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -28,6 +28,7 @@ #include "exec/cputlb.h" #include "exec/page-protection.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index 036be93fb32..09a45e58a5d 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -28,6 +28,7 @@ #include "qemu/timer.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/target_page.h" #include "qapi/error.h" diff --git a/target/sh4/helper.c b/target/sh4/helper.c index b3ec7ce64d0..b6b057f104b 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -24,6 +24,7 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/log.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/plugin.h" =20 #if !defined(CONFIG_USER_ONLY) diff --git a/target/sparc/helper.c b/target/sparc/helper.c index c5d88de37c9..8de261b0e30 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "qemu/timer.h" #include "qemu/host-utils.h" +#include "accel/tcg/cpu-loop.h" #include "exec/cpu-common.h" #include "exec/helper-proto.h" =20 diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index e441ffb8f7e..07ba25dfcea 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/tricore/helper.c b/target/tricore/helper.c index ce1693622b7..273713a1473 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -20,6 +20,7 @@ #include "hw/core/registerfields.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index fdc522698dc..7cb67d179a8 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu/main-loop.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" --=20 2.53.0 From nobody Sun Jul 26 12:38:42 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781786098495158500 Forbid including TCG-specific headers in non-TCG builds. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20260617171438.75914-12-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-mmu-index.h | 4 ++++ include/accel/tcg/cpu-ops.h | 4 ++++ include/accel/tcg/getpc.h | 4 ++++ include/accel/tcg/helper-retaddr.h | 4 ++++ include/accel/tcg/probe.h | 4 ++++ include/accel/tcg/tb-cpu-state.h | 4 ++++ 6 files changed, 24 insertions(+) diff --git a/include/accel/tcg/cpu-mmu-index.h b/include/accel/tcg/cpu-mmu-= index.h index e681a90844c..e0fb6ef91c8 100644 --- a/include/accel/tcg/cpu-mmu-index.h +++ b/include/accel/tcg/cpu-mmu-index.h @@ -9,6 +9,10 @@ #ifndef ACCEL_TCG_CPU_MMU_INDEX_H #define ACCEL_TCG_CPU_MMU_INDEX_H =20 +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "hw/core/cpu.h" #include "accel/tcg/cpu-ops.h" #include "tcg/debug-assert.h" diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index 5950cdcaab1..710da12b828 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -10,6 +10,10 @@ #ifndef TCG_CPU_OPS_H #define TCG_CPU_OPS_H =20 +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/breakpoint.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" diff --git a/include/accel/tcg/getpc.h b/include/accel/tcg/getpc.h index 0fc08addcf3..8a97ce34e76 100644 --- a/include/accel/tcg/getpc.h +++ b/include/accel/tcg/getpc.h @@ -8,6 +8,10 @@ #ifndef ACCEL_TCG_GETPC_H #define ACCEL_TCG_GETPC_H =20 +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + /* GETPC is the true target of the return instruction that we'll execute. = */ #ifdef CONFIG_TCG_INTERPRETER extern __thread uintptr_t tci_tb_ptr; diff --git a/include/accel/tcg/helper-retaddr.h b/include/accel/tcg/helper-= retaddr.h index 037fda2b83d..ebdc8b378d4 100644 --- a/include/accel/tcg/helper-retaddr.h +++ b/include/accel/tcg/helper-retaddr.h @@ -6,6 +6,10 @@ #ifndef ACCEL_TCG_HELPER_RETADDR_H #define ACCEL_TCG_HELPER_RETADDR_H =20 +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + /* * For user-only, helpers that use guest to host address translation * must protect the actual host memory access by recording 'retaddr' diff --git a/include/accel/tcg/probe.h b/include/accel/tcg/probe.h index dd9ecbbdf11..0b788901ba0 100644 --- a/include/accel/tcg/probe.h +++ b/include/accel/tcg/probe.h @@ -7,6 +7,10 @@ #ifndef ACCEL_TCG_PROBE_H #define ACCEL_TCG_PROBE_H =20 +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/mmu-access-type.h" #include "exec/vaddr.h" =20 diff --git a/include/accel/tcg/tb-cpu-state.h b/include/accel/tcg/tb-cpu-st= ate.h index 8f912900ca6..1903af4c2a2 100644 --- a/include/accel/tcg/tb-cpu-state.h +++ b/include/accel/tcg/tb-cpu-state.h @@ -6,6 +6,10 @@ #ifndef EXEC_TB_CPU_STATE_H #define EXEC_TB_CPU_STATE_H =20 +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/vaddr.h" =20 typedef struct TCGTBCPUState { --=20 2.53.0