From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606131; cv=none; d=zohomail.com; s=zohoarc; b=nNctkdSQDZw2EZAp1WAU/nVDkd7YgKsl4WvA586YEqvzfqWO1dn6PP3eJU05jqIA29LVHfRCnU0l3Lwv0zBYwWr6Qz6JzbWDutPkCoidxwIxiCr5kVUIFyQdXQ9xJkZHmN2pjJPrWJBTCIE9vSFs+YP+4VS4Am5qhR69pcxOw0s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606131; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=579fDnycKwEIquqyh6afxaytmurovCPt44b3Wi782Bs=; b=bPJb39rJrfJM4zARq+ZQP7KcVHxeqCM3sYZXThKfag2vJolnRCnibMjqAfigC5LS+OerqNJh7wlZFKpMUR72CuOONFkZFJ1cHrLJOox1+q4UUL8BBowc08BilzrADGaow6/slky9r92P8IXqvyOalY3TKW3WS3VnS71n/59P0/I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606131055226.48727325167374; Tue, 16 Jun 2026 03:35:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQfx-000534-4d; Tue, 16 Jun 2026 06:05:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQfu-00052P-SA for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:42 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQft-000309-7n for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:42 -0400 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-c858dc05ee3so2614311a12.2 for ; Tue, 16 Jun 2026 03:05:40 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.05.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:05:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604339; x=1782209139; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=579fDnycKwEIquqyh6afxaytmurovCPt44b3Wi782Bs=; b=LDr3tRLdnfkYe6RWJmqYrqV4gLHj+FW73NtqB45OnxkGVaxafC6QJYUyUEJ+A4Dcen U9wt0XRwvXiqd12Wvsp2rxMBQIGE+0tyT/+OQvxG4P6Nl5OJ2svug4TfOX0ggzGUHoCc /3vLmehcCRh+Yf4PkbZbgwk93J/Vd0KJPxY9CvIK4UXvmxiyEscJOSptjoowKtn8zrsu KarSet/s7NRgaSSR938mc3yDv9B9QFfLk7UxBWUCEPUnebNi5adjYAFYOel9nQAUHSO9 MjnvoRr7sNjebFbUrUym9nof32ITzZC+6sqD3Kip8aDZuZfTB6qIe0Ux7UuiE81Y/SGf n0tg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604339; x=1782209139; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=579fDnycKwEIquqyh6afxaytmurovCPt44b3Wi782Bs=; b=KfvkKk8s5zvXW0gGiqN+NgRCsHnJgP4X7DKeykWXLj7YOU/tJsTPKZlDjaMVsWTepU +Y4/Wgl9WtUIx3D/LzgmtgeOYDV8QzLvH1SE9wRjBn6Nzbb+47aKaYKS8BS1ude6Ww0G g+aQ0YjMSj1o7rYH2v9kXAFR/F0jAEoKIpXZb0fRDfBmQTrL5w2uObEKgHKJqn2cRe+U +RGKsrV8suqUTXdYY6EjFzgp7i2J0RjWx7JXmPcOj9+gt0sh4aDEdWaXx10FYe31cwGy mm5Zs30QpM88hMrAMA2DGjn/eNxZYd3i9U/wubNbv7Tve/7QPBZ4e3S/4fNuCqEcpviY x1YQ== X-Gm-Message-State: AOJu0Yxd0lMbRHQr3wjAN4FJqJgbRY4VjWZy1qU+Bs74kA8OlUefShtN 5rjOsLEqWguzHQPuBv3CefcC/LRp5jTzRTSgQ3sIP+HB06EnkHp7NRkNuLo9g/sD X-Gm-Gg: Acq92OFLDtjQeRAYnXu5SGIyxRC1rrYx1fTUIVARLtg5dr8kKZLQxKTy75/Gd4b1Ov4 DvJuGk14GZuWWRLwPuOPkIRKm8udoHGjCD9wWS6BH89ucCb9djto8Ra0qZk+Vuhyw7nwVh2n8Sv AnWic8KS0giGeN+yQv3K//iWcqP5fsvbyxeYZQ5Rs5oxt5exPT5gfsdIX29EnwIkV8v7ITqe5co dr+vsDfnLJCOquDcCwppEElf4576tBDeiI6587VDX6FW2bFUXYuTJD5vrrRvk32ye49LJ9PP/cM GS1ltnpNuB9lUuK4WrqUPvd9be+azX55BX1l8UOuyk4/iDHRoZ5pXY8R/kJYi6gOczBRZwd/7zq ydBEAaAqzK/ygCtyY7urFC2gPYmnmNl2w3nnXG+g5RfY8S3jGFiwPQZe0PBAN8UCbigK94CC1tL A6RfodI7NQACP2Fj/B3gWasHw/GCqFrdt1LfGg6wMM X-Received: by 2002:a05:6a20:ef18:b0:3b7:d8d5:232b with SMTP id adf61e73a8af0-3b7d8d53111mr5205188637.8.1781604339517; Tue, 16 Jun 2026 03:05:39 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Chao Liu , Alistair Francis Subject: [PULL 01/83] target/riscv/tcg: disable svpbmt if satp_mode < sv39 Date: Tue, 16 Jun 2026 20:04:04 +1000 Message-ID: <20260616100527.1939565-2-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=alistair23@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606131472158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Priv spec chapter "Svpbmt Extension for Page-Based Memory Types, Version 1.0" mentions that "The Svpbmt extension depends on the Sv39 extension.". We're not doing any satp checks when enabling svpbmt. This causes problems with the riscv32 'max' CPU that happens to be enabling svpbmt even though it doesn't support the required satp mode. In fact all rv32 CPUs are allowing menvcfg.PBMTE writes, which doesn't make sense for them in any circunstance since svpbmt is not possible for rv32 at this moment [1]. This also impacts rv64 CPUs that are running in satp 'bare' mode and are reporting svpbmt in the riscv,isa. All these problems can be solved by disabling svpbmt if satp_mode is not at least sv39. The problem reported in [1] goes away because we'll never enable MENVCFG_PBMTE write mask in write_menvcfgh(). We're also become consistent with how svpbmt is enabled for rv64. In case the user enables svpbmt in the command line using an invalid setup, not just disable svpbmt but also throw a warning: $ ./build/qemu-system-riscv64 -M virt,dumpdtb=3Dfdt.dtb \ -cpu max,sv39=3Doff,sv48=3Doff,sv57=3Doff,sv64=3Doff,svpbmt=3Don qemu-system-riscv64: warning: svpbmt requires at least satp sv39, current s= atp mode: none [1] https://gitlab.com/qemu-project/qemu/-/work_items/3473 Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3473 Signed-off-by: Daniel Henrique Barboza Reviewed-by: Chao Liu Message-ID: <20260519114858.316532-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/tcg-cpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 3e22e7ed53..f8b2f04a94 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -837,6 +837,17 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) return; } =20 +#ifndef CONFIG_USER_ONLY + if (cpu->cfg.ext_svpbmt && cpu->cfg.max_satp_mode < VM_1_10_SV39) { + cpu->cfg.ext_svpbmt =3D false; + if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_svpbmt))) { + warn_report("svpbmt requires at least satp sv39, " + "current satp mode: %s", + satp_mode_str(cpu->cfg.max_satp_mode, + riscv_cpu_is_32bit(cpu))); + } + } +#endif /* * Disable isa extensions based on priv spec after we * validated and set everything we need. --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781604390; cv=none; d=zohomail.com; s=zohoarc; b=BWxCyzejaeTcFeuXQdIWKC29n8CEYTc4AJEpYD/v99HiGCiwgd+tKBJ0b/yu9Nyu2MEAzf7Jqy2FLC8em2TR6v2w+t3ZLrnZQAYM7zLF07TMa7icyEwiDD7ak+9Aoro2/sjt0h+Th+f4r+zPBtINUvbA6brSVw/oBGfMFhfXY3U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781604390; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uj7+crvaZbvdM+fFWGaMWIFUrfucfAhCYwxhtK+khng=; b=U9yxswwQyQop1KnJm41VVHYm6Nx/++BvAyNO4yTthEZ7NshnB1PVtm7plQ4VkrF4DfSzpLS4j5t81b7PagyKUI3Cz+v4nEmGjb411/N+SwkvjiOg9xm6ca6DRDwU33yDVuCMAdpzaoqMGQqwhkY8cTO9hfyi3pQPUGehNPgpY0Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781604390327144.900712423679; Tue, 16 Jun 2026 03:06:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQfz-00053E-Bo; Tue, 16 Jun 2026 06:05:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQfy-000536-NB for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:46 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQfx-00031J-4Z for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:46 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c85893bce34so1812272a12.1 for ; Tue, 16 Jun 2026 03:05:44 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.05.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:05:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604344; x=1782209144; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uj7+crvaZbvdM+fFWGaMWIFUrfucfAhCYwxhtK+khng=; b=XOFOsIz3NaWufyemKJdE/9IzkspSclO9EMZNk3wlVdp4b/1p8OhEv46lBXR/rgqQeI LLpQvcIo4yC5jkeBdxHQzho4+Nz/RlhX0ULEXxmoCCl/KQAq3OvKy6I9jONgYTp/Tyhw vJfXNKiCP4f8Ab6ZNUsfsxti8fl+Z+IeMGn+Ak3rHtcqknsTFCipWVj3v4ZXUNJnEx1l ZSZM3YZe5Bq1rtW66MbnT3526I3XWUuQbB7bg8Dvg68leZzZ8VgYEs2zx7T++NzyIOEa iEFald6R2GO3z2lK2WPXmHa488VanRJlzaeGEVyyJZ1OosqiTEk6akmug8SFPNkug7MU UUog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604344; x=1782209144; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=uj7+crvaZbvdM+fFWGaMWIFUrfucfAhCYwxhtK+khng=; b=UzyXViH95xWPrdLcpKcGmHejxVW1TRAWD5Bf217KOxDUgvmv/nm6DWQaL71kl4XIFh Jl95P89Y/lsW4Z+6g9JfhJ4EIdDDic+p1zpYDMNfRtF1mf6+gEWaVqHeFQqsV5mFSQsI I7QnrDiqflLEofji1EBQiiFqiUDw04s5CbTPHv8bBnbHr1PM7ZUWwD0FbKluY1DqTF00 hdDHRUVDIUMHDT2a6RJXFHvKbntmdJ5R1+gDyY4+sFpraJd1NFEObBkc8DCetdAig34s JEdfB9jy+Dp9g6LbuOF5ljssFtv4iFDLUbpxcuSISK8xn6IsmyO64oK5/8NiPor9zmos E6MQ== X-Gm-Message-State: AOJu0YybJjlsfNOqmXr56z8/a7t73CQCTo3Y3n7RMu/Lg9qtR4DzHE1E e7oeYhlmkODF2wX6IrE/Cw5eJsLx1M/AIFB4v1TV1VS0y/q0icuafuM2+9v1kf02 X-Gm-Gg: Acq92OGU0nU3kt6sNIj1/7iiosnQrIfqDQMVnSlcjyjQU2JTmCPLqHHEv/GLvx9/VLE thPAgx1wcypYK8Zcu2GL3Ijzz0ARPTV5wIGCPGHC6ePkCG+1/6BuxwMQIHzQF5gG/zPIJH8z4VE qpVzjIpH0F+Kyg25mwXQDCkKmr5H/Z3fxvPQmf/ua+ZUXRt5LDQfXZbcAls4yPKvbSMVRejv5ni LAqItWxRZhTS+CXbpahaPAOSuL0kfYOzfL4wiLJbzlWR2iFz26PFO2GvLCbiVtqYUigkeAfofpT cq7lGOMrZ2FUFicj4d8NPWRtu+a2hk6Azg+GuL6Ull2UjVWKb+0LMtzKSR4Wx0Zb78/6dzzxP4A wRWB9RMk6yBzm7irWQtfF8dj3BPttoBSIGsQ52VwRiZc7QnIPd34lCs4jHHXz580VzjrlMccMug GO3g6vDbUDGDkk02MtO+9lnDmMLXmfzU/euP30+Han X-Received: by 2002:a05:6a20:e68e:b0:3b4:e4f6:4f15 with SMTP id adf61e73a8af0-3b7962509fdmr16705914637.5.1781604343506; Tue, 16 Jun 2026 03:05:43 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Jay Chang , Frank Chang , Daniel Henrique Barboza , Chao Liu , Alistair Francis Subject: [PULL 02/83] target/riscv: Align pmp size to pmp-granularity Date: Tue, 16 Jun 2026 20:04:05 +1000 Message-ID: <20260616100527.1939565-3-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781604392389158500 Content-Type: text/plain; charset="utf-8" From: Jay Chang When configuring pmpcfg (TOR, NA4, or NAPOT) and pmpaddr, if the value is smaller than the PMP granularity, it needs to be aligned to the PMP granularity. Signed-off-by: Jay Chang Reviewed-by: Frank Chang Reviewed-by: Daniel Henrique Barboza Reviewed-by: Chao Liu Message-ID: <20260520063606.36600-2-jay.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/pmp.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index a71091a316..8adf7c9719 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -179,11 +179,12 @@ static bool pmp_write_cfg(CPURISCVState *env, uint32_= t pmp_index, uint8_t val) } /* * When granularity g >=3D 1 (i.e., granularity > 4 bytes), - * the NA4 (Naturally Aligned 4-byte) mode is not selectable + * the NA4 (Naturally Aligned 4-byte) mode is not selectable. + * In this case, an NA4 setting is reinterpreted as a NAPOT mo= de. */ if ((riscv_cpu_cfg(env)->pmp_granularity > MIN_RISCV_PMP_GRANULARITY) && (a_field =3D=3D PMP_AMATCH_N= A4)) { - return false; + val |=3D PMP_AMATCH; } env->pmp_state.pmp[pmp_index].cfg_reg =3D val; pmp_update_rule_addr(env, pmp_index); @@ -263,6 +264,11 @@ void pmp_update_rule_addr(CPURISCVState *env, uint32_t= pmp_index) break; =20 case PMP_AMATCH_NAPOT: + /* Bits [g-2:0] need to be all one to align pmp granularity */ + if (g >=3D 2) { + this_addr =3D deposit64(this_addr, 0, g - 1, -1ULL); + } + pmp_decode_napot(this_addr, &sa, &ea); break; =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605523; cv=none; d=zohomail.com; s=zohoarc; b=LHQhb9S10fLotYeDIK/HwZhAWxzwZcgWCbCcQ/UVsRSPxZhWHzpvZ2kkj79yiLB+39HG9jAZXUg/a9Cuw07RP8MPv3K5u9seywpvJVI6NCsDe85C23RTtQWguurNHNZl3dIeDBj7oMrbTdfYgsqSQh528KSXvRpJejA2/aqwRlo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605523; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=X4B+aHlqcdcQ0gYgRNV2P70NiclZXv+GhgRjLV9/FOQ=; b=jednZHrQvNLPEXUeQcl6ErIS7wUXhivZnhwQnC1wY0tGYEkPLfYOM6xbT4va5TRggrFlGp8l5GfwLZkgUbhfcOWQnJQRQswtj0fRH6dWq2tqHEGl4Q95Y+TZkGKeMaP1jMtnd8ngngblqFWoMrPxiZLf9b26cGlmWAXRxKniOQg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605523245623.185042144565; Tue, 16 Jun 2026 03:25:23 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQg2-00053w-Ls; Tue, 16 Jun 2026 06:05:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQg1-00053l-LC for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:49 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQg0-00031g-7G for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:49 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c8857a27041so1310858a12.1 for ; Tue, 16 Jun 2026 03:05:47 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.05.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:05:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604347; x=1782209147; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X4B+aHlqcdcQ0gYgRNV2P70NiclZXv+GhgRjLV9/FOQ=; b=S4eXBup+ua40ZgjmUnqfrqPBoPyecEsxk1mN/dIuVowkWIJD9AThVf1jgxZe+oLC85 KnBGTnttcVSzBQsRLGKe3CZKt/mrCtaHsWvJaIIdY2mWCJuKD/w/ZFnALp0uVjCSpjd1 GFuGWznWPjYfNWCkLMQoZq+9QdlA71UcdyUMt/cmDV9ZKb09Wm/gr/8Ei64FZf+NpR3g jvzQC+C1SkO7fHwl87KhYFu/xGVgiW/Gxi3E+y3iTPq84B9OPJ/aMbjmAh1iuDV2X2sW fd6TuRzl5jrohs7gQgLci5viRX41BucxzvxeCuGoaAwO5Efx2Slnyqa/ILUSxhc0SHIE yi2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604347; x=1782209147; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=X4B+aHlqcdcQ0gYgRNV2P70NiclZXv+GhgRjLV9/FOQ=; b=OjyqPFjrUz5Nx3DYjmSoNknOMS5yJsKZTKCYM4YNjbo3lXmpDqhMLsQGYZKKsWHbWV hU8h+w73TzeHeCHcSKrFcYU5mNemr/88esvQoM/JzTDelsk/NQ3uLCC0YasiHFpMGJ1r zX/M1h6GBs/5s4WG6WJkmzCSj7J/rzPtOfpRkspyJsErJJ7pqx3g4AbJtm03mxQYlTVB dVwZJ6yMp5sRbbgRniXVRBLOBZy7O+vFSh9V9BTS8QUwc0f78U1dZFWrGbuQga3RPQgB tVDVm1PxTzR3lCjrA6D/UX7W0p2PqcwGCwoG24wXay+TMy9HRu4ByZ8mFJfRzPGXXZ7l XO8w== X-Gm-Message-State: AOJu0YzQnu7eblGXVb8pcayPy5iBdlvmm1JMBoHRd8xfVidgMM9MTkSw Xz4XKjffCS3VQXUOUzFRHoahMPeBD4antGhypQPlDniAgsYF6qMnaiQ1WBYbuSBE X-Gm-Gg: Acq92OG7eoMcmtJL/6Fmsii+1TEh//OBMGrF5tbeUt4Rs7dVEQhdKfGCN0krP3cyYeS U9YY+0gltJLcDWKICNvhgz72rL5nbGJAWiwfy9ts6iBvlDvrTlTWAgDmPpQOfK1pRw3xtpNCXAC b3j6cJ8YRlFN5pbpJgQ09UyhMvo/VtcM6LR1autCzFuq4R8MP/xGsrD3PKa77zrTLc6WhqfiW8o lcNxF716uSDBjA27dSpIy1uwcx4BMslpe8ij4mzWmXHcOWagi5VI3R27Bo/TWbDeY2oD2OlV0YG Xaxo3djO+I40pboR7GeMsUJ5MeJKBobDtwUdR7nUPLYVqV7ZVTwdpwoUVzX4nRVG31biwnRRrRD e32ZVuoDbd7qIaHt+T024AzbmDlvBglxjar+0Xu6DEOlPbRhxijKY5kYYsx4fLp/W4Dv655IiDL NM+ijpQIvWoy/uTjyvyekisDxo4VMviaPfxoaRry2M X-Received: by 2002:a05:6a20:734a:b0:3b1:884a:c3d5 with SMTP id adf61e73a8af0-3b79637d3c3mr16273420637.24.1781604346770; Tue, 16 Jun 2026 03:05:46 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Jay Chang , Chao Liu , Alistair Francis Subject: [PULL 03/83] target/riscv: Improve PMP address alignment readability Date: Tue, 16 Jun 2026 20:04:06 +1000 Message-ID: <20260616100527.1939565-4-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605523459158500 Content-Type: text/plain; charset="utf-8" From: Jay Chang Replace manual bit manipulation for better readability: - TOR: Use ROUND_DOWN() to clear lower bits - NAPOT: Use deposit64() to set lower bits Signed-off-by: Jay Chang Reviewed-by: Chao Liu Message-ID: <20260520063606.36600-3-jay.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/pmp.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 8adf7c9719..58a8923d0d 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -247,8 +247,9 @@ void pmp_update_rule_addr(CPURISCVState *env, uint32_t = pmp_index) case PMP_AMATCH_TOR: /* Bits pmpaddr[G-1:0] do not affect the TOR address-matching logi= c. */ if (g >=3D 1) { - prev_addr &=3D ~((1ULL << g) - 1ULL); - this_addr &=3D ~((1ULL << g) - 1ULL); + uint64_t granule =3D 1ULL << g; + prev_addr =3D ROUND_DOWN(prev_addr, granule); + this_addr =3D ROUND_DOWN(this_addr, granule); } if (prev_addr >=3D this_addr) { sa =3D ea =3D 0u; @@ -641,13 +642,14 @@ target_ulong pmpaddr_csr_read(CPURISCVState *env, uin= t32_t addr_index) case PMP_AMATCH_TOR: /* Bit [g-1:0] read all zero */ if (g >=3D 1 && g < TARGET_LONG_BITS) { - val &=3D ~((1ULL << g) - 1ULL); + uint64_t granule =3D 1ULL << g; + val =3D ROUND_DOWN(val, granule); } break; case PMP_AMATCH_NAPOT: /* Bit [g-2:0] read all one */ if (g >=3D 2 && g < TARGET_LONG_BITS) { - val |=3D ((1ULL << (g - 1)) - 1ULL); + val =3D deposit64(val, 0, g - 1, -1ULL); } break; default: --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781604390; cv=none; d=zohomail.com; s=zohoarc; b=J+kTxIspzpioh8h02d7wfwIR0o0nq2iyMuEFQ1tTPXKT2nv8FLMS04dn5ukVse3V53JTld/OKxdNc48XPFsCSjPVa5TffxgWO4qvZ880A+NpGNGPY9B0LV7dMY60+Dvg+4EYog05QRstg52mqBV6n+r5VwUgWReJEeGtXld6dd4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781604390; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hlNApQvq+hxRElznEGdr32LHf8f5Yc0YPosDc+WuXao=; b=dKa11y7xB9W0KlXOfjnRXPDm+ktebw6pqVbcAhvRvM1vh4bc091kdJdiSyVz7qcfiki+YEzWWAP48R1WPSqWwN93COy3ihMHTPvSM99WzyTouL9tdxH+uGmDjehqnBXHh4L2HMaXyqgb974HXIxYKOgh0zTLehb0e6P+8FnM9Fg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781604390371305.70171846918356; Tue, 16 Jun 2026 03:06:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQg6-00054U-LA; Tue, 16 Jun 2026 06:05:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQg4-00054E-KY for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:52 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQg3-00031t-6Y for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:52 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-c86484d35d1so1502490a12.3 for ; Tue, 16 Jun 2026 03:05:50 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.05.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:05:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604350; x=1782209150; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hlNApQvq+hxRElznEGdr32LHf8f5Yc0YPosDc+WuXao=; b=Ik/WtS7+f2rJF1U1/50CkvKhe/Tn6O2hSPMnI/4QGn4yDeeDvh2YsDrzCEjIfGarf0 hJHPYXn5jJypIVcq5Di2ve5vvPq9BbKouxZ0ij7LjkrmSBB9qQF9+X2l7DFzTzmYaAtD h1oMUSHppDRG5yiMRRwFiJgM/LelMp3feAhTbFUGEB61r58Le0JBMLcixB5o59y4qoqV bWyLaKYNcqAO2JSrVtOoPQfp6u9arIkSIRrZTyne90yfFfPFZY/KpFLVSTPtDhTVLGsh rS9XOedKanD7e6ojkdVnn6uUKnzH+10rVMv0VlMzEIOCSIwU2wMa7uwikSl5oYD3DHkQ ylRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604350; x=1782209150; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=hlNApQvq+hxRElznEGdr32LHf8f5Yc0YPosDc+WuXao=; b=n8ROWzHHtJms54dR2udpKAzYTdH3Buo4g7MLN+z9lmIM2N0xu5n0vV/szDryCtQqme jeFnM6T419QO+UAzTiNX3XzzqCLDvRxivZDNGmwAsAhfqFnAUIPgq1Gct7Lo5nfrTa/u +t54DPe77X7kEJwJM3PBMUrdddMP/bzruh7N+BQCFXYAWKtC36txMGnRfdmgsbYCo43R V7HvhgJPtP0RKlfg/IePnekBfjgXuTzqDYyjCSUtLHmmY9PTzAtaNU4Z+2p/333h34wA 6pTjxcpXag0WXWBP4J0UJINmcInE+88KbeAvnn+QltNMkFTgbtovgiA21gKIFUa2WXds Bykw== X-Gm-Message-State: AOJu0YwpQoo5WLc+xoQs0DmHd58G7sp2dG6kolLSZcFW8geym1Z0lpmR XEt/GQhw2vFC8LtEkQktS/GKpaR4+J4jR9ZOIPD4TTecQXVqs8V1xuES8uLIuaBD X-Gm-Gg: Acq92OHxUM5K4p5IHx88OrWvIs+pjXG5iEXyUPRvLNDgq9Br7Fs4hSF2AKjrZWJfNRM gao8RKGAL7RweXkviNPh/y/VPZveWFWVsThm3CL4vINbgjSb2Xrweyf1PU+PMHGuiIMlpH21XLk KKGXXflU3fzrJcnyOH9lbWS4xt0o1EP5eM4NHnw6WvmU0HpEdZEqKoTj1EBn6fQmTKLCU71fcSP IObpv1hZa3avfG17BRbXkzhrIe4ejzQQvaK4mBZW3OBQJT/iPVjnq12eOvzBHva1YjWmfpu/27e 1Aq6tgAa66WMwaUxCJAYRBXnKmjLFKdcoN3mENgfeQA2VJjRm6g6VuqhgNqqVMCAsHbW6bgGZcq Qd1Inql7s68eeqBiV/N3Q8AXdSt4mtMxM1e52zmwGvjKlWXwStIWXGDApqkc5fhPwoBFCgaVOKQ 18HAXUwyZS1zGWoLePKuLEmqgOSvPlAWimGvnfq23J X-Received: by 2002:a05:6a20:d52a:b0:3b4:913c:296a with SMTP id adf61e73a8af0-3b79637c208mr17023031637.21.1781604349716; Tue, 16 Jun 2026 03:05:49 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 04/83] target/riscv/csr.c: do not allow mstatus MPV/GVA writes Date: Tue, 16 Jun 2026 20:04:07 +1000 Message-ID: <20260616100527.1939565-5-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=alistair23@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781604392380158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza The priv spec states the following about mstatus.MPV: "The MPV bit (Machine Previous Virtualization Mode) is written by the implementation whenever a trap is taken into M-mode." And, about mstatus.GVA: "Field GVA (Guest Virtual Address) is written by the implementation whenever a trap is taken into M-mode." Both are written during riscv_cpu_do_interrupt(). They're not supposed to be written by userspace. As far as write_mstatus goes these fields are read only. The same applies for mstatush.MPV/mstatush.GVA. Fixes: 03dd405dd5 ("target/riscv: Support MSTATUS.MPV/GVA only when RVH is = enabled") Signed-off-by: Daniel Henrique Barboza Acked-by: Alistair Francis Message-ID: <20260514194537.2416243-2-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/csr.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 5514e0f455..83ca354bf0 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -2044,9 +2044,6 @@ static RISCVException write_mstatus(CPURISCVState *en= v, int csrno, } =20 if (xl !=3D MXL_RV32 || env->debugger) { - if (riscv_has_ext(env, RVH)) { - mask |=3D MSTATUS_MPV | MSTATUS_GVA; - } if ((val & MSTATUS64_UXL) !=3D 0) { mask |=3D MSTATUS64_UXL; } @@ -2083,7 +2080,7 @@ static RISCVException write_mstatush(CPURISCVState *e= nv, int csrno, target_ulong val, uintptr_t ra) { uint64_t valh =3D (uint64_t)val << 32; - uint64_t mask =3D riscv_has_ext(env, RVH) ? MSTATUS_MPV | MSTATUS_GVA = : 0; + uint64_t mask =3D 0; =20 if (riscv_cpu_cfg(env)->ext_smdbltrp) { mask |=3D MSTATUS_MDT; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781604363; cv=none; d=zohomail.com; s=zohoarc; b=IB6yPCw0yd/yoPhBvoFxZW4M3bryf9gCxEjXyhRzFuOqpCioxcjUZESQh0hBHmKpexiXAhEb2Vo0MD7qlTG1XXhwy343MzW2DvdFkdxSoCQ3A5eK6gJLy/5YubHQfYepXSeUz7mB6MuPtLkDdOP4ayxbYeztN4vfwvTdw4dk6UY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781604363; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KX7LKRUEmaPWFdqNenUETTxw3hyG38BE2t7qHLxi9u8=; b=TOoeB+HI0HSMvHquAiy16dN9e8fBeI2e+s09E46HdwnULkg1FAhpv7ImfD1gVzfkJSdLJbR3fl3+vsBQn6fuf98Y1Fkrldpv+zbgDLD0PgGRHdvA0hwk/zIeiRufBvl51PRss3Wi0CFeBuvyRzyPiKhqzhWuCVaq9q8FSHADdDQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781604363405970.8904592568125; Tue, 16 Jun 2026 03:06:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQg9-000553-OJ; Tue, 16 Jun 2026 06:05:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQg7-00054h-Vn for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:55 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQg6-00033P-Hz for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:55 -0400 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-36d98b9aa9aso3623111a91.3 for ; Tue, 16 Jun 2026 03:05:54 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.05.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:05:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604353; x=1782209153; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KX7LKRUEmaPWFdqNenUETTxw3hyG38BE2t7qHLxi9u8=; b=hMbgnAU6LDg3sa/eFfztUZnkdwjnB2qfpOxkJawkCDAozGL+B8UCCUu4oJqV/ERHCx KdwBZbBsPcL03xXp7PobQ/cxGbE1XSapu8CgeE/FdVha7uVkGEB+GiiZmKs2Hv7e/zJu tTzFRV/of4M3Fvv4FZTJaxOsXGWp+pGXuApr8jQepdHd2e6L9f9kGHHtwhB2qQSAHFWn Bvd0e6HvOJ6c0iqiBZ2Ktt96Xs/SFDXH98ygC2pUOiPKB6ckOjBVKhttkzaOLnKbd7iE HzGv0yTnHwwugD6Nvwrl00FzRNS8RgvKcAwcEJZuxejQbvozJBfwDXN+J/ZavIK/MHe8 G/GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604353; x=1782209153; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=KX7LKRUEmaPWFdqNenUETTxw3hyG38BE2t7qHLxi9u8=; b=fZ/+RgqBrgmToUxQ1bPcKCb3mRP6p3+LcJNpU3khV3upfPEoE/BF/ENTM9/SzFjwMh LbY6L/B27MbJn/pxK5ob9PsbkzVqNBCduWaBWcq29ZHNbweF40toaRAo6qcekQ4gkMZ9 QY0KtiUPjJq7LRLBhhthoymjd53nS7G6kRwDBNk9zBlewBp86ZwzzK6mX+vJYrsiiL1B sWfbKXobD9KCHjcWTD8PTg8CEUDIb3N2poV1B31O0eGPBhSLUBpb7U0LzkrnMXbwXh2J tms0zqSXqwvPxxcPlTOJzVjsJHfFC8oCI2NAWxYBU4Ue3ePQNuscS2iCsVdE3zIAzfGW TZ3g== X-Gm-Message-State: AOJu0YyyoKCgPwtcUZbooDVbmFsnWFeURxbChFSQv1TlZot2VOJqKQYO GJZ6UFvdtLmgKGHmfYKrN+Q5xscraHURtQc9puU0RPlE2DSrUuxaNcbokhOet43V X-Gm-Gg: Acq92OHAAeIQjfnB5qamlZdnBQ4bZ7zqoIhke8PATxVWo/EgQHEK0LFNCksZkiWx3SY 6UWr5EbM+sckEJ0jOQ7bfBe78f6aWKrPNUypmYi17qoDPIV4T3DEYWJMWnwYiu8nZw8CMKptSke kPdJPl24r4tMKoDDQdhO3Ic4/oTXDS13UfnjxTJtwm0bu+h6yRjwopNrvB10xQ2LnZWnAvwwEbL 5DidWcAEKKRDOHHZ11F8TYoCpCs2QgAK2TnIx4i0jMtKSgBxLaY1+B5MebQyJQZwxDhi13/uYv9 //OXnUj8N45Lsz/oKXqRT573AscPaGmWbTHmM3stRSZhO8kRglCn7iMtbfJSdCYls1UHEvG5Dr/ biOBLQ+/eTELj1sH9a3Ju7wDBhIzMRJTOeavHkdAt/9zi185bDhWbKxxgOvGffqxL6AVDV+u3ut 4K9GUJLmHY5xEwPL77iDSRxgsB1dkGUA5DPmXbTXpd X-Received: by 2002:a05:6a21:9217:b0:3b4:931c:3c7c with SMTP id adf61e73a8af0-3b78420cc3bmr19493874637.44.1781604352784; Tue, 16 Jun 2026 03:05:52 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 05/83] target/riscv/csr.c: fix mstatus.UXL reserved value Date: Tue, 16 Jun 2026 20:04:08 +1000 Message-ID: <20260616100527.1939565-6-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781604364418158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza By the priv spec the value "3" is marked as 'Reserved' for mstatus.UXL. Handle a mstatus.UXL =3D 3 write by writing the current 'xl' instead. Fixes: https://gitlab.com/qemu-project/qemu/-/work_items/3367 Signed-off-by: Daniel Henrique Barboza Acked-by: Alistair Francis Message-ID: <20260514194537.2416243-3-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/csr.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 83ca354bf0..d004a4bfb4 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -2045,7 +2045,17 @@ static RISCVException write_mstatus(CPURISCVState *e= nv, int csrno, =20 if (xl !=3D MXL_RV32 || env->debugger) { if ((val & MSTATUS64_UXL) !=3D 0) { + uint64_t uxl =3D val & MSTATUS64_UXL >> 32; mask |=3D MSTATUS64_UXL; + + /* + * uxl =3D 3 is reserved so write the current xl instead. + * In case xl =3D MXL_RV128 (3) write MXL_RV64. + */ + if (uxl =3D=3D 3) { + uxl =3D xl =3D=3D MXL_RV128 ? MXL_RV64 : xl; + val =3D deposit64(val, 32, 2, uxl); + } } } =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606481; cv=none; d=zohomail.com; s=zohoarc; b=gHuHRlm39J6RhuN72n0kb1ii/cwdIkywbEiCVIvKr+6Fh6HYvxKzC75ORGcXAIKW8s+oGtH3Z4dCNJ71awJgJeOmqbp8xxa3oY3BglZMbR7uhJv2tuEElaaDg9ok79kuGXxvJ4KxqJAXZk0KOsnGurGIyT0nb5iuViAGQ2AaFiM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606481; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=RRf/OCA5n4oLQ6t53w/gBNFvqFD+L9t5JUJVVGr/W3M=; b=LjhYtIOlOyHgMvVUbnh/W1zGzWagmHSlE8FwWcHUf0JgE/qnFR/PFQCr8bg4PIjI+h916w8LdqXdZJ9Lz3ROBGN7rHdjvZHQ5nL/75S0XN0BUrsXaykok4BpKC/AWukQrg40jYtaFBISNGrqHYbwSy57xNOdZjz9kTtK85GUlPM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160648163143.19373718722193; Tue, 16 Jun 2026 03:41:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgD-00055S-9P; Tue, 16 Jun 2026 06:06:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgB-00055A-Rh for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:59 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgA-00033i-3z for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:05:59 -0400 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-36ba3ea5c46so2530871a91.1 for ; Tue, 16 Jun 2026 03:05:57 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.05.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:05:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604356; x=1782209156; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RRf/OCA5n4oLQ6t53w/gBNFvqFD+L9t5JUJVVGr/W3M=; b=YDjt5y0fOW5gf5RWiEJxPO5Fq5PHzdAkYK13xvnZC8B2S5SgvEGxCUmmvNuffGIa06 vQ+IiYoBN6NUn0zMZ2RZ8655MexspALCoeYYxeMfmensXDlwjf9ycNi8yIYjDZXwspXD MdlvHR96dTK4uKCvvUROwgt+MJsKFjhZn9kmJmiOJTDNbbqYEM4+NuD1BlckjlbMB+cj NJCZUrrBtalb/5FVfKHU2L36lNX5kSuPlNYelfu9bLKQuTEeoT3fZFeEDUwvJ463Vh8v LV6uexcaojhYLDSjTs9EJCnJm7PSMBmrxfVxtJLT1H5zqR8HS6Houp8FJUzlBhlvOm7R WiuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604356; x=1782209156; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=RRf/OCA5n4oLQ6t53w/gBNFvqFD+L9t5JUJVVGr/W3M=; b=JUNusc6B/QdzhZwJ8gVJ0Ahgq1N7KxvTI6J1XMlkIFDL9XACWUtW8Di76vGheEIOoR tXMFvQD9+m388TiF+EgOYYofwDK/WFjDsaCZh5SYX8V7iKvmqJJSYjL9PsLFwsNQwLqX MkepZEN4v0HulCF+s1tZpTcs03iQiEQ5VyNsKOfBZhyJCYj9KQTlRczQlIVvPvzwAm18 W6Zux0yjuyXe/HuGI3kzvx/FoStTnk+eIWgbWgSNJ2xd3t2ul3fjBmpMrr5Ellc19akr utZUlF4/g/X2U4WuOGGiOAG0nnr5WvwK1fXX/1EM8j16lMM/T48jrITvdFoFlctN0s3R 0NIw== X-Gm-Message-State: AOJu0Yycc7/sl941Xav9YXNLdYCH6AZkvAZ1t5SFiV87Oa9Az/QUq3Sv RmmuK2Hx9bhVqbpGAxMiZIZxiQFS3uBGxsgb0A5w3s5enIGgcbfCz5L9KuJxIMyJ X-Gm-Gg: Acq92OGIp19JbMuvUAQhmIyx/fMHnicUSbhG2U3oovVQYiydJ5iWcfA3dyNCrVMOQWH WpEdEUOwo11wpRalnAC/J5APJX5Sf9IraFPMGnbcD/vuWIUOaRr/hlagcQhtboGp+djBd1TK0DX vVIvy7sF0JsBedGq0ESPzZMqBiDPkVZQeWxL5gmnSWfIwqgfNQ8LN08at+SSAwfTHmH1Igj2fYX ti7scq0bj8w+98JJDfjJ7eTyRf3pTO7ZL5jofPnaFT3wy5y7cTMUb9eP2wTmlbRmw1aZAXXeaMu KRzGWGUC9TAu8TSsnX7AXsAEdBIx5iT9CygFB6zZlJz/Hgk4ZhiMyOjPnDP7VCGBq4zmeHAJvZQ 4kiY/k5RUe+OO/fbmRjN2YC1N+VvttP9b/Np5jfcxPMYrptBKjANI15+pEuV43JreKfyGPxsyU4 XVOmYhMEGcXrRLjsNhC2CSVLOblO+W7iutLJw0vHXV X-Received: by 2002:a17:90b:17c7:b0:35f:b647:d98a with SMTP id 98e67ed59e1d1-37a01e2e21fmr18424160a91.5.1781604356414; Tue, 16 Jun 2026 03:05:56 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Chao Liu , Richard Henderson , Alistair Francis Subject: [PULL 06/83] disas/riscv.c: add 'cbo' insns to disassembler Date: Tue, 16 Jun 2026 20:04:09 +1000 Message-ID: <20260616100527.1939565-7-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606482738158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza We forgot to add 'cbo' insns to disas/riscv.c. The result is that the disassembler recognizes all of them as 'lq', an insn that happens to share the same opcode space. While we're at it reorder cbo_* entries in insn32.decode using opcode order instead of insn name. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3480 Signed-off-by: Daniel Henrique Barboza Reviewed-by: Chao Liu Reviewed-by: Richard Henderson Message-ID: <20260519204714.1376551-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/insn32.decode | 2 +- disas/riscv.c | 29 ++++++++++++++++++++++++++++- 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 6e35c4b1e6..21272fdb50 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -207,9 +207,9 @@ ldu ............ ..... 111 ..... 0000011 @i { [ # *** RV32 Zicbom Standard Extension *** + cbo_inval 0000000 00000 ..... 010 00000 0001111 @sfence_vm cbo_clean 0000000 00001 ..... 010 00000 0001111 @sfence_vm cbo_flush 0000000 00010 ..... 010 00000 0001111 @sfence_vm - cbo_inval 0000000 00000 ..... 010 00000 0001111 @sfence_vm =20 # *** RV32 Zicboz Standard Extension *** cbo_zero 0000000 00100 ..... 010 00000 0001111 @sfence_vm diff --git a/disas/riscv.c b/disas/riscv.c index d416a4d6b3..36609efdf5 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -985,6 +985,10 @@ typedef enum { rv_op_ssamoswap_d =3D 953, rv_op_c_sspush =3D 954, rv_op_c_sspopchk =3D 955, + rv_op_cbo_inval =3D 956, + rv_op_cbo_clean =3D 957, + rv_op_cbo_flush =3D 958, + rv_op_cbo_zero =3D 959, } rv_op; =20 /* register names */ @@ -2255,6 +2259,10 @@ const rv_opcode_data rvi_opcode_data[] =3D { rv_op_sspush, 0 }, { "c.sspopchk", rv_codec_cmop_ss, rv_fmt_rs1, NULL, rv_op_sspopchk, rv_op_sspopchk, 0 }, + { "cbo.inval", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, + { "cbo.clean", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, + { "cbo.flush", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, + { "cbo.zero", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, }; =20 /* CSR names */ @@ -2876,7 +2884,26 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) switch ((inst >> 12) & 0b111) { case 0: op =3D rv_op_fence; break; case 1: op =3D rv_op_fence_i; break; - case 2: op =3D rv_op_lq; break; + case 2: + /* + * 'lq' shares the "(...) 010 ..... 0001111" opcode space + * with 'cbo' insns. Check the next 5 bits to select + * what we want: + * + * cbo_inval 0000000 00000 ..... 010 00000 0001111 + * cbo_clean 0000000 00001 ..... 010 00000 0001111 + * cbo_flush 0000000 00010 ..... 010 00000 0001111 + * cbo_zero 0000000 00100 ..... 010 00000 0001111 + * + * Anything that doesn't match these will default to 'lq'. + */ + switch ((inst >> 17) & 0b11111) { + case 0: op =3D rv_op_cbo_inval; break; + case 1: op =3D rv_op_cbo_clean; break; + case 2: op =3D rv_op_cbo_flush; break; + case 4: op =3D rv_op_cbo_zero; break; + default: op =3D rv_op_lq; break; + } } break; case 4: --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606107; cv=none; d=zohomail.com; s=zohoarc; b=MZ6fK53cvAH8WUj/XEFG4DW/KaoB2WUNH0XE+BABvxNZM6yhvfyELznxslfxKVXKjBieqhmJSoJs/a5+IsyzRbANVx8Zz5Rv4K4vQq5oJVbXfdIEUFrc+BVqtSI9ycrDONHIgDgVsXP8xMWbQJm2jztCB5vQoYPSfL8A3Z+q0L0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606107; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=W5pd4s8M+D8lyoy8burkmKdta0a2rE+rkKlyPaexZRo=; b=dfIvRMfelv7U9/x7mwLR2xVvkPW6Hckx/ADR1ZmsRvV3FpsiIAKfR9Aj2kLHo1SuG3tzcqwBRV17vxrQGiV8jRtuFFMvSUVFp3iSniLDOkNPBlZ6B0YPH+euZhLcA5SFNf0X16Num9K8Tt5+AxIWybvk4bT1MOfaqFCpOAp//as= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606107197861.2580285468455; Tue, 16 Jun 2026 03:35:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgG-00058e-7D; Tue, 16 Jun 2026 06:06:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgE-00055u-L7 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:02 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgD-00035b-1F for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:02 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c85d4b4245aso3171087a12.1 for ; Tue, 16 Jun 2026 03:06:00 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.05.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:05:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604360; x=1782209160; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W5pd4s8M+D8lyoy8burkmKdta0a2rE+rkKlyPaexZRo=; b=lFWUMYsFtfC2NT3BhXTAzb6xJjDQ4xCqpDyG93zDyofPFgDxP0NvRz82P2/DumBxs4 KkwE251BQMbGV3oHnXvzZMsO0W3Sfg5PCqAt+TDqXWFbRrX7gkAjHRQr/QyG4t1tecZV yZv3e7MohY55IY6ivMpAfhqcZuof1BAR6WWwBNRMymj8p2AfRLY4j2t+Ou7T3OHP7/cD Ga0z8Y2VuYGSctbfcjSsC5OHumLiMe4hIqkGFYgvoUyR8upwiY+KBjFwX+O+bS8FTfln WwOrg18UHV7MW3L7smU4IbxZvnzUenoQ2EeTIJhiwlO0HfyGWt6Pr9KvHeJ/O+/wwGE5 5esQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604360; x=1782209160; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=W5pd4s8M+D8lyoy8burkmKdta0a2rE+rkKlyPaexZRo=; b=U0eb32uDGtjBL+jOviWe0ZJwJsXG7zMgbKTcnFYbnRgXUjb9DM7U44QYBZ8oefHCJ2 I45IEeYjadNHHAjjNuVpsqckUBD7EWCz18CM7rINKNf19qzXD4nL+96CuiTB3MNypDp8 80K9i9bDU4jkLcMnOpKTFWKF4SyODIFDBAjKCLaKLiPxnwfph27Q3Wq9/4x41nWJ6T/m QbGOEuybO+rqChVs9Iqu/38WZqGR/xt2RqMAq8hhF5Cpvd/fJRScv46i1kc98Mh4oFJ0 IerJItzVO0rV4JIJ72oPuAsPvjH/Gr5exxaeoaMrQCzJao4MDxSVlNoRoC3k5EGlyb6S ehUg== X-Gm-Message-State: AOJu0YzSicinfWa/jERP/BwN8e+OuT1hsaFvd9NsB5G5zcOBTASkp1Kb FDEjypvB2lMhJ/8m4iYuA+vOjPElklAiO+TPfsUCIhGRKIeBzd9k6iQholspCeNf X-Gm-Gg: Acq92OGw1U9zHLd/kT+295vc17dl+4NukcEY9EAtJUJmsSUw49BsjNqqlaSmUy3J3FB ugWuaLRJFC8YjK7obem6TnfsgyqyYCbRwwQSRnyStxO3soxdhWVgMlY3hGwFMET1hrm/4cm7cpf rogd1YfgQ3cGnuqmYyXy8hhE2mRGDq+e/VgbowmW99Fz0TF84XQCCp/2Ng8MyHZze9b2Ti/pRPg Npt/43y7AtnasuSw5nDw16ZuQrfk9oprSphW1E2S680dJHo1tLaHlodhjzlPR0ii6MM7SWIgvSY qgd+ruGxHXpPUMx2i819KfnmH1ZZqWJrGbgXtjj0sFyt2nhyyIL+T07R0UCmohBbVUAz5FJdL81 EM1T4Dz86zsZt/hm4MXgh5rZA9nQ9N8YHug/+vTM/xpJSUH+Bd7BSPAa0R6P4Q4KOj5vn4zeqEy vu7/9gPoOaz6foJ0GvxLJTjpIfJgVhTX0ZRXmk21NAduz7TcH8yg4= X-Received: by 2002:a05:6a20:d52d:b0:398:7ed3:a001 with SMTP id adf61e73a8af0-3b7961e7d9bmr17464899637.2.1781604359653; Tue, 16 Jun 2026 03:05:59 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Zephyr Li , Alistair Francis , Chao Liu Subject: [PULL 07/83] target/riscv: Do not hide Sstc CSRs from gdbstub Date: Tue, 16 Jun 2026 20:04:10 +1000 Message-ID: <20260616100527.1939565-8-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606109643158500 Content-Type: text/plain; charset="utf-8" From: Zephyr Li The Sstc predicate currently checks both ext_sstc and rdtime_fn. This causes the gdbstub CSR XML generation to skip Sstc CSRs when rdtime_fn has not been initialized yet, even if the CPU supports Sstc. As a result, GDB reports $stimecmp as void with a CPU that exposes the sstc extension. Only use ext_sstc for the early existence check, and keep the rdtime_fn check for non-debugger accesses. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3496 Signed-off-by: Zephyr Li Reviewed-by: Alistair Francis Reviewed-by: Chao Liu Message-ID: <20260525024220.39027-1-fritchleybohrer@gmail.com> Signed-off-by: Alistair Francis --- target/riscv/csr.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index d004a4bfb4..2e81221b1d 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -590,7 +590,7 @@ static RISCVException sstc(CPURISCVState *env, int csrn= o) { bool hmode_check =3D false; =20 - if (!riscv_cpu_cfg(env)->ext_sstc || !env->rdtime_fn) { + if (!riscv_cpu_cfg(env)->ext_sstc) { return RISCV_EXCP_ILLEGAL_INST; } =20 @@ -607,6 +607,10 @@ static RISCVException sstc(CPURISCVState *env, int csr= no) return RISCV_EXCP_NONE; } =20 + if (!env->rdtime_fn) { + return RISCV_EXCP_ILLEGAL_INST; + } + if (env->priv =3D=3D PRV_M) { return RISCV_EXCP_NONE; } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607143; cv=none; d=zohomail.com; s=zohoarc; b=MZZEKFfoUoIoIcYxInQblY19pwN+rH7YCNG+LE7sHXCPpZ8uPiZ/LRxBZ7xPzxjGmtjcDPD7/Y3skOf9EtevqNHMyizuUOLM77O5JjtoCtfTzwKOBp+miFfHc1Ijz4nDC4cInTPSvMJrkW5Or1h1ru7pKyyl3WwqhIOIq/AR7S4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607143; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=lB+WlnNjt8V9VEvbROguMWjIM5FXQ266hkkEQLIspm0=; b=KM48eOsVcTcE7ZanfwVtbALg9y4RffRGpY0RLxioANCYpMw/CyYwv4L7xRGWeqntIVakd3uo5cCsIVOUFmfygiEo78tTri5IC3tW5UvqZ6knfX6TFyrG28P+XwFN8Pt6YKhWL/RxGus6uixfS6LOOQ71H6ldIqDM4xuMAQl6sSE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607143183670.3695352523032; Tue, 16 Jun 2026 03:52:23 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgL-0005Bx-1t; Tue, 16 Jun 2026 06:06:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgI-0005BZ-Ed for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:06 -0400 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgG-000366-PM for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:06 -0400 Received: by mail-pj1-x102b.google.com with SMTP id 98e67ed59e1d1-36ba3ea5c46so2530926a91.1 for ; Tue, 16 Jun 2026 03:06:04 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604363; x=1782209163; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lB+WlnNjt8V9VEvbROguMWjIM5FXQ266hkkEQLIspm0=; b=QEg/qhwXHevjhdEz2+Wr6Q2tIxu1yqU/57CZEvi8amok4UW3yclr3Y3sNINfKbkt/Z monP2Eh1V2MUTBs8/MAvC73kluXCetE36/B22Whq0UfK/71MsKcL/cB2qloSQkQ5Y2w6 KE/UB79bZczw4mF0ncM4guZxng/w3fqxV7BICL+2RIsxK/ADdSokpiTs0QF0nAOj9GpV 2jTh0zpbmjWyiAxrGiZUijXM8vdAz31t8PFIP+MjPyfRhdh6mc9iB8LWRvE6Dk+8ubhR ZDJMMaktVS7I7Pj+9eVSAVfr61B/XRqvVduMPxX/8bG5Qy9WIblvQHjhrSXsQQtfPE74 DLbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604363; x=1782209163; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=lB+WlnNjt8V9VEvbROguMWjIM5FXQ266hkkEQLIspm0=; b=bnU88eCCb25QoSi6l5z/JXca9+jHAHqs03sy/UgAPfSZnInRbQUKk4/p4griktZRR2 ws06NFqUtUiJfNXJYBaaLPfXzZfF6KaxEifqQ+hXRMQnfi5ht76+y5h/pcJL1nKlsWJ6 Rsvcfo6SblB6kGfS06UXJddkpWeCJUIKAN6dLGMS3bSk56qMlTXnCy/H7N9O4UwxA4E2 y/Qhx8O3ZECixoVS/vqYJBpTOzueIZI8/QJsC78GmCIOF4j2tkVrBx5maJ+zKLizlPos vGXZOpucsXmnoH3W2E46R9fcJD7z/759Rn/dEk8RwrdxSgtqoamyxMgt4/2pd4qJnmzI v2Cw== X-Gm-Message-State: AOJu0Yz1ncLoPY0U6Rle5hXJv5qutVqWtFYhAody5ZOEdrp9fDvbl/QS 27+rrHaXP3G5U9GpPn8Zuzkyb1P5E/c103jSVX20oSEz9egcifHuitiTA9J3eCfW X-Gm-Gg: Acq92OF/L8wjg6G0+4ZLK2YkU4tknBd3WSRkFTVZjRV/g2r9gsaGsksAYLzZLDlJQeh iAuSuUgICbPN6SXwAJ/IdNPKec0lY/smZ1D+DFUeBAoHS/zOzNhlIwiEPUNUIYuibDhCz/cjc7o cZyIgY4VUytdCTyVM+m0UeDRj0b57TRLyWvX/9465yFFWDON9lfJshufXJMpO6ss4zzMUOtlO4T XqYAQHNx4cZnJPIyleSCnnvbPCxYpWJ1hrCmCyZN0rXghAC3Jh8B85iI0Xb5ZrtPeiT+HtjxNjn 2pUym3YNEqJ9GcsYIVT5Zwgiu83ViiTZ77VFogVGTBpK3YhDLREv8ZTugwxM1jq7XLWeM7myTQf oklc06GrSE7az3Irj/hJ2nJorW9LoFjt7og5oWTrbYiz2IyWLB19LzmADsgNww8hLbAAe37NEMU V5la/vz/QHXd478FD4UAvKTysGicVgSKj/izVOix86 X-Received: by 2002:a17:90b:4c11:b0:36d:7d99:5316 with SMTP id 98e67ed59e1d1-37a03ec10demr18632881a91.17.1781604363241; Tue, 16 Jun 2026 03:06:03 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Zephyr Li , Daniel Henrique Barboza , Alistair Francis , Chao Liu Subject: [PULL 08/83] target/riscv: Reject Svinval instructions in U-mode Date: Tue, 16 Jun 2026 20:04:11 +1000 Message-ID: <20260616100527.1939565-9-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607144880158500 Content-Type: text/plain; charset="utf-8" From: Zephyr Li The RISC-V privileged specification requires SFENCE.W.INVAL and SFENCE.INVAL.IR to raise an illegal instruction exception when executed in U-mode. Check the current privilege mode during translation and reject t= hese instructions in U-mode, so they are reported as illegal instructions. Add a helper to reject these instructions in U-mode during translation. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3493 Suggested-by: Daniel Henrique Barboza Signed-off-by: Zephyr Li Reviewed-by: Alistair Francis Reviewed-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Message-ID: <20260522033145.17850-1-fritchleybohrer@gmail.com> Signed-off-by: Alistair Francis --- target/riscv/insn_trans/trans_svinval.c.inc | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/riscv/insn_trans/trans_svinval.c.inc b/target/riscv/ins= n_trans/trans_svinval.c.inc index a06c3b214f..4614c1489c 100644 --- a/target/riscv/insn_trans/trans_svinval.c.inc +++ b/target/riscv/insn_trans/trans_svinval.c.inc @@ -22,11 +22,19 @@ } \ } while (0) =20 +/* Test if priv level is M or S. */ +#define REQUIRE_PRIV_MS(ctx) do { \ + if (ctx->priv =3D=3D PRV_U) { \ + return false; \ + } \ +} while (0) + static bool trans_sinval_vma(DisasContext *ctx, arg_sinval_vma *a) { REQUIRE_SVINVAL(ctx); /* Do the same as sfence.vma currently */ REQUIRE_EXT(ctx, RVS); + REQUIRE_PRIV_MS(ctx); #ifndef CONFIG_USER_ONLY decode_save_opc(ctx, 0); gen_helper_tlb_flush(tcg_env); @@ -39,6 +47,7 @@ static bool trans_sfence_w_inval(DisasContext *ctx, arg_s= fence_w_inval *a) { REQUIRE_SVINVAL(ctx); REQUIRE_EXT(ctx, RVS); + REQUIRE_PRIV_MS(ctx); /* Do nothing currently */ return true; } @@ -47,6 +56,7 @@ static bool trans_sfence_inval_ir(DisasContext *ctx, arg_= sfence_inval_ir *a) { REQUIRE_SVINVAL(ctx); REQUIRE_EXT(ctx, RVS); + REQUIRE_PRIV_MS(ctx); /* Do nothing currently */ return true; } @@ -56,6 +66,7 @@ static bool trans_hinval_vvma(DisasContext *ctx, arg_hinv= al_vvma *a) REQUIRE_SVINVAL(ctx); /* Do the same as hfence.vvma currently */ REQUIRE_EXT(ctx, RVH); + REQUIRE_PRIV_MS(ctx); #ifndef CONFIG_USER_ONLY decode_save_opc(ctx, 0); gen_helper_hyp_tlb_flush(tcg_env); @@ -69,6 +80,7 @@ static bool trans_hinval_gvma(DisasContext *ctx, arg_hinv= al_gvma *a) REQUIRE_SVINVAL(ctx); /* Do the same as hfence.gvma currently */ REQUIRE_EXT(ctx, RVH); + REQUIRE_PRIV_MS(ctx); #ifndef CONFIG_USER_ONLY decode_save_opc(ctx, 0); gen_helper_hyp_gvma_tlb_flush(tcg_env); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781610123; cv=none; d=zohomail.com; s=zohoarc; b=n/X/vtVJj0jyEaTbUT+FXLtWsX7Pa4X2jfx1A4Mdm/K/W4lHMQnFcyHMRr94nKecHpc7HgtX9LabwmxeIZpi0UtmaYsDfL1PhDfaEzPJD1/S4beyX60lciSS0X6RkOeIYhPjPL9dSVJAzulaaCPqhmzgfB4Frw6d+tQoc/hVv9s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781610123; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=MSc9axaPT/La+j42KDU1GrRJuTBvMeNI5owh5Ul0ye0=; b=IIhcZzYCeugadfQnzvAWfqriCizuKGk3/p4llsCSOGh0hqhWoEb/aUJDoEyxKyoypCa2C7bvlGeHo7kdLzjq2qWPCx1TmCd9KwFw7IuCA1GBhtEHAyNoNzoEo/N8TDnE6Go1bchVeroWFHS+r2qzAu7N6hNh5W9q0SCyVt7r33g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178161012349685.56094450106741; Tue, 16 Jun 2026 04:42:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgP-0005DC-5h; Tue, 16 Jun 2026 06:06:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgL-0005CH-Lr for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:10 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgJ-00036L-R0 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:09 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-c855599a77aso2142096a12.0 for ; Tue, 16 Jun 2026 03:06:07 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604366; x=1782209166; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MSc9axaPT/La+j42KDU1GrRJuTBvMeNI5owh5Ul0ye0=; b=HdiggKge4C4uwgc3wKvm65bHu0oLYOp1v3c4/PQaz83j6H8Zn61DayEeXQgd8K07MC sG/WhK5MZYOfkUibtgR+12cgNy/02ghB/NJJvvSWEDEp0QNl4/zq3XdTnJcILHDO3zli 4B49PZTeqL2LZJNgnuuOmM/4o/UG7gwn0xV29xEIe+r46UE0TGpKj97ObOAiueiOhYeD UPTMYINB/yYRxO/qY0S+bpE8KAyOjguNIQ4Pz6jZ5TQjSLqfMc5c4JJkTo+HKx964SnD tbzKhzuTrXNmKpbiYiRctWTEmbayKr1y9Bb6R+XyI0oEjbrSrJZccLYzapsNqLDImXC3 8RxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604366; x=1782209166; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=MSc9axaPT/La+j42KDU1GrRJuTBvMeNI5owh5Ul0ye0=; b=GLsWEZlcuaNNNI3BXckND4EOCEQPtSdIWm5DA/yZjyQdux1t659pC2n6Wrs/f/TKl9 ftup/Zk9t9W4pEhwSKvJQj/twNMuLasAPBus7MOJo2vSWCPm9CYL1WK7UGxphCt5bKqO 6EvoXI6Rh9goQxAvP4kv8Gdhl6FDBkJ1bYSRXZ8DgpJDHKxqUD7R1yiDHEvajP6jvCgD 9H+2gJ6GPrKoiyMPeivAlfw7XW60GIaKnSDE2P3ZuMtnR+Qq+GENcR/y0MrGrFRIUXPd Y8F2t/+OxScHekws2ossbSU1wJ6iKptgpQcgNqRjqRuu3AaqYZ2OOB/ljm2uGnROG2Ex 4YDQ== X-Gm-Message-State: AOJu0YyIl4qBMb5FkcR1KE7IWkONescdNn8Opbh8Q51XzPguYR9hKROR wtq9/FN+loPhYD862lM6Xz4kjeiO31xfPTzS+I8RP66K1sFSSjWn5tW3M59eWDO2 X-Gm-Gg: Acq92OGiQmIlzYUE1w7OmeBvPw8HFAWPy5gpm0/N9S2N5mhj14GaZFEpGz8Rm4CueVL gS3aoXUpPQysREfpRj4clNvAU2Fues+GEKViXVyhYgq1dzCOk0se4ESI32/ZyvKih4/KYk17TXQ B/iH/aD2RGzPbj9TjsG39fkdXuzwKcFrOnKzzEkNmGDV15rN14Yyhvb8rOSzBNI7JHJDBVL5jO7 5R2Q6S3uhi9TYTOpD3GwJLasRI79qBJylFZmop/FFm93wkWaYV4CVD0iW5Lyy1gSVP7Sq0dbnu1 R6suaHqEWl4MVPHw2wEZUh7HCr4m+NFKc6rgPD43CYTN1j5X9Vh+qipZkWowN4z8SPH/U6Ex5ap AYKv1eMcv+8RBbZLfeUkUR+lQZ5g+DPcX/Y7lY3nVrLjD+raid8mFdDcoqgDBoT+kl/C3xr2Spu BexwksBsBIhSSRXSdS8UZ+Ai8pNJloUzRByyX4fDcR X-Received: by 2002:a05:6a20:3c89:b0:3b3:241f:66c6 with SMTP id adf61e73a8af0-3b7e4cf86b3mr3343464637.26.1781604366394; Tue, 16 Jun 2026 03:06:06 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 09/83] target/riscv/insn_trans/trans_rvzicbo.c.inc: save opcode before helpers Date: Tue, 16 Jun 2026 20:04:12 +1000 Message-ID: <20260616100527.1939565-10-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=alistair23@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781610124187158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza All helpers from this file can trigger ILLEGAL_INSN exceptions via check_zicbo_envcfg() directly, bypassing the usual exception code from translate.c. If we don't save the opcode before each helper, riscv_raise_exception() is triggered and env->bins won't be unwind during cpu_loop_exit_restore() (code path cpu_restore_state -> cpu_restore_state_from_tb() -> restore_state_to_opc()). And finally, in riscv_cpu_do_interrupt(), we will set (m)tval =3D 0 when we= can, instead, set it to the cbo opcode that generated the exception. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3380 Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260520214704.1943652-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/insn_trans/trans_rvzicbo.c.inc | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/riscv/insn_trans/trans_rvzicbo.c.inc b/target/riscv/ins= n_trans/trans_rvzicbo.c.inc index 15711c3140..096f7dde27 100644 --- a/target/riscv/insn_trans/trans_rvzicbo.c.inc +++ b/target/riscv/insn_trans/trans_rvzicbo.c.inc @@ -33,6 +33,8 @@ static bool trans_cbo_clean(DisasContext *ctx, arg_cbo_cl= ean *a) REQUIRE_ZICBOM(ctx); TCGv src =3D get_address(ctx, a->rs1, 0); =20 + /* The helper may raise ILLEGAL_INSN -- record binv for unwind. */ + decode_save_opc(ctx, 0); gen_helper_cbo_clean_flush(tcg_env, src); return true; } @@ -42,6 +44,8 @@ static bool trans_cbo_flush(DisasContext *ctx, arg_cbo_fl= ush *a) REQUIRE_ZICBOM(ctx); TCGv src =3D get_address(ctx, a->rs1, 0); =20 + /* The helper may raise ILLEGAL_INSN -- record binv for unwind. */ + decode_save_opc(ctx, 0); gen_helper_cbo_clean_flush(tcg_env, src); return true; } @@ -51,6 +55,8 @@ static bool trans_cbo_inval(DisasContext *ctx, arg_cbo_in= val *a) REQUIRE_ZICBOM(ctx); TCGv src =3D get_address(ctx, a->rs1, 0); =20 + /* The helper may raise ILLEGAL_INSN -- record binv for unwind. */ + decode_save_opc(ctx, 0); gen_helper_cbo_inval(tcg_env, src); return true; } @@ -60,6 +66,8 @@ static bool trans_cbo_zero(DisasContext *ctx, arg_cbo_zer= o *a) REQUIRE_ZICBOZ(ctx); TCGv src =3D get_address(ctx, a->rs1, 0); =20 + /* The helper may raise ILLEGAL_INSN -- record binv for unwind. */ + decode_save_opc(ctx, 0); gen_helper_cbo_zero(tcg_env, src); return true; } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605791; cv=none; d=zohomail.com; s=zohoarc; b=fXyZk2Xaf2AEzmsIWvZhPMBQPT+4xPWvyIgsHfzzSweikD1KeCCb+1rm0SmZS0am4nz5Bz1Ue+waglAwyYipwzoiGjCWZuwQex6gZmVwx3BsiuiSBgquODFtzExIih3WoY8FnRDy7d5YKMpTwanWjIzkcnMVaWkoExLtiIwNjH0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605791; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2ug30j1QvZy8RVzOFBrm89mLtJIT67kIt1gXjNG6aqQ=; b=Xz0qSY/2jq57rs6rs4tBLieLpcFxOmBqEFtR7j7P0FC4EWLHTNkeeYxPK8nGFxux59OU7t952ununp169JJapEF3AwdpoEFAnKWg3JnzWngqH34HApdUlAcvhMcznlDWYzoivpAazw4ew9OVc0YwYJZRYnvqR+rTu5PBTjs/6lM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605791145446.5809118665346; Tue, 16 Jun 2026 03:29:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgZ-0005NB-Ad; Tue, 16 Jun 2026 06:06:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgR-0005HR-H9 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:16 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgM-00036c-DJ for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:15 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c8584e80bd9so1645149a12.3 for ; Tue, 16 Jun 2026 03:06:10 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604369; x=1782209169; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2ug30j1QvZy8RVzOFBrm89mLtJIT67kIt1gXjNG6aqQ=; b=owMFGCbP/bSBrIeVlFVdQPAS2yP20rQtIO+vgmsTGrMwwUEzkabsHQVbNwbeQ3WQJ9 enxxP3aiEVaH417i3v5E7LJPKkOd2drwjkcomhw0XwcVbOsX+72afOp2CDW1foxwmfVX EOwCeesNTXNozthV1Hl9haUCMzMG/TLu7eyYGwcYG06dfzS2fLtDk3vIRck7s/KGMvJN /0HvRZ+owvu0vKDWvnv4iL/Mi4/ZF/aK9NUc3YZssOue5vhyD6/Hqw+iQb2pXt5Mt0yn GAc3JEyiNf8fGs0qy0ISBbjXCutArX+Ik59tAZFNEUgDGErNtb4T9hsUIheb3knEvIfw IcAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604369; x=1782209169; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=2ug30j1QvZy8RVzOFBrm89mLtJIT67kIt1gXjNG6aqQ=; b=lFhCpTep7kQmGd5Vf6Z2IKGXUDcPOWaAD0XD8sDdaD8EU/0AMcpKMAw+kg2AczTdS4 trdxoR1QF5c7pjqOo7UoKDnXGxz4ILJDaUWytjXNiRj7ugJhNZ0LQoKevBt3GHZ/dptg 8aaqh4LesqvVDTvYO/maeLl13DMhRXankcB8Dxwu3TN+fdT2buC5aX8UJg+2EAOrBYpv bQMJYMDV0tPK0nPe1bN+DJ3E72RuniPZQ6U2d2ti/rf7uhxZoGqJgod/vHr1ypfQUPJk KsNTW5FBkmBzT3UHF8xBiSx/UtpdLn+FsRRBnrwoh1SzudXr68uJ3Uo5o5ePfnt1i0g7 Wkxw== X-Gm-Message-State: AOJu0YzwcF4rgUuvi9JfUaCxMOdN5eTOsZH0OJrjUlqd6Ki7DY+WaI+x MMreD9wNtkEsbzM2CVQy2OmicRqgE58NeUsIYTmp4hDanU1dZVUm0ne6o5OIxdYB X-Gm-Gg: Acq92OF66cQ+EskKVHOSvIMLgxly/XVjG+2U9Rs/Cb9lAIqy0iCrlGeK+IAV8llXMDz ZOhUj/t5OBvgjKYbcVkjXViY8Pkz8yIA7qlQ6Ian8J9m07S6yYhWXOuuS2F25MUkgjsI7g6dFRW 8AP3JUAV0D8o/J4AGOdux8T7fyAM5QVNtt/5Zsa15OTPszrTXHaIFGzwqbkIZ/DOTlywg8A1xCA AORr57j9Kh01q/TPJ4IIp23UGeC1CBxJtEhCJghlKfJ41MwNCjC1zJjWl100C1Sl8oFG1qfTt8d Z6f+ENmjAoxCJJeM0bWlNj2SvIoV4vgzdyTepNPhIMFW+AkyfWQq6N8YMdZpda7AZzsbYL/r4YE XD90lMP/4q1RVl9GBzHB2yF8wa+JzFeJJUN4UQ52zfQal6Pjg6mdknk36YQysY4G8JijNPx8+Vc Ii39upHCSeV+6oK80QWPnRzY85y/egMdC3vjSs3gcX X-Received: by 2002:a05:6a20:db0c:b0:3b4:b24e:27a2 with SMTP id adf61e73a8af0-3b7e4d4dc3emr3315796637.31.1781604369200; Tue, 16 Jun 2026 03:06:09 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 10/83] target/riscv/cpu_helper.c: fault with reserved PTE.PBMT val Date: Tue, 16 Jun 2026 20:04:13 +1000 Message-ID: <20260616100527.1939565-11-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605793102158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza We need to fault during any access done while PTE bits 62-61 are both set, according to the RISC-V priv spec. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3494 Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260521130727.2311629-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 17305e1bb7..bc63713ddf 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1446,6 +1446,25 @@ static int get_physical_address(CPURISCVState *env, = hwaddr *physical, return TRANSLATE_FAIL; } =20 + /* + * priv spec, "Svpbmt" chapter: + * "For non-leaf PTEs, bits 62-61 are reserved for future + * standard use. Until their use is defined by a standard + * extension, they must be cleared by software for forward + * compatibility, or else a page-fault exception is raised." + * + * For leaf PTEs the same bits are also reserved but in that + * case the page-fault is mandatory. Make both cases consiste= nt + * by also page faulting here. + */ + if ((pte & PTE_PBMT) =3D=3D PTE_PBMT) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: PBMT bits 62 and 61 ar= e " + "reserved but are set in PTE: " + "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "= \n", + __func__, pte_addr, pte); + return TRANSLATE_FAIL; + } + if (!riscv_cpu_cfg(env)->ext_svnapot && (pte & PTE_N)) { /* Reserved without Svnapot extension */ qemu_log_mask(LOG_GUEST_ERROR, "%s: N bit set in PTE, " @@ -1498,6 +1517,23 @@ static int get_physical_address(CPURISCVState *env, = hwaddr *physical, return TRANSLATE_FAIL; } =20 + /* + * priv spec, "Svpbmt" chapter: + * "For leaf PTEs, setting bits 62-61 to the value 3 is reserved + * for future standard use. Until this value is defined by a + * standard extension, using this reserved value in a leaf PTE + * raises a page-fault exception. " + * + * Raise a fault if 62-61 (i.e. PTE_PBMT) are set. + */ + if ((pte & PTE_PBMT) =3D=3D PTE_PBMT) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: PBMT bits 62 and 61 are " + "reserved but are set in leaf PTE: " + "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "\n= ", + __func__, pte_addr, pte); + return TRANSLATE_FAIL; + } + target_ulong rwx =3D pte & (PTE_R | PTE_W | PTE_X); /* Check for reserved combinations of RWX flags. */ switch (rwx) { --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605984; cv=none; d=zohomail.com; s=zohoarc; b=DCPltdzGAm4HEVW7sZ1uzvH1JGWGkpktJMpPidfNFml7Hp4a040edW4fCqijRMTODyOIUmFycVJBlAQrqK8WS8XabDG/zH5FS6JgooetcNZkP2hFP3SbCHzyLXyAbemoErWAKHzz23Oj/ospi4SuT4kxPfPz1mTIZaZqWeKmPT8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605984; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=GECOZnyQvu/vqvqIW80YSRWKUQ0v7g3ixtrhK3igHzw=; b=NlFWXpj69sVRMCgBPaCsF2hlkGfpbQZ+dH1FHVUqfus8edyefPkxUNqRKkis5VQtLwFcsDJNpcz8+OiSAakED2B4HoX7LnYju34goYxapXHvfbxtG7tyf6zZFk2958UV3GISFOmD4OZSsDTXV6ij2b/TIATNRFsoBl89VMQemg0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605984408158.677159661568; Tue, 16 Jun 2026 03:33:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQga-0005VQ-GH; Tue, 16 Jun 2026 06:06:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgS-0005Hd-HH for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:17 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgQ-00036r-W7 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:16 -0400 Received: by mail-pg1-x529.google.com with SMTP id 41be03b00d2f7-c8583b8fd89so2608550a12.0 for ; Tue, 16 Jun 2026 03:06:14 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604373; x=1782209173; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GECOZnyQvu/vqvqIW80YSRWKUQ0v7g3ixtrhK3igHzw=; b=pgzULMuLhOL11/9XjPcbWDGYYK3bLbVUMHkNq/FHxz7PHKHSRx8iurLYAZ9hgzLhy4 Q1HLb9+4dl8jviA3ghuIgoe+pSoZYCRq3UMkXHWUrz6IJKSJOyRs4dPKsS6guNgBWkTg stKSDbAHSH4uwPVB72O0t4q3wWMP39HdssnbdmA7z4TTavoNv48FMVg7xfaVnTcR+sec D5+3fL3/aO7dyWWeBHo1bpTmPD6myf7qy/HGl6/w4ynn7dMNEuAAp73TYP/ni3+FWnlK UnOZ9RpA1H9AY57tagPQPaJqHNKAHLomjs8UcwVV1uCJwYCoB4NJmdZn3YmJcSD4Msmq 4zaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604373; x=1782209173; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=GECOZnyQvu/vqvqIW80YSRWKUQ0v7g3ixtrhK3igHzw=; b=Q0wCqawnHa2KcgUprpL4zwe/9066p/oHhNu04Kprm/apG3mDX1kOhfhBkZCOzX2KNQ UdywD1LD1Gbhe2ewY9zxFLqt4laEsWjGjgRBitR7kvtDGf5GD3vXNamryzGdFMXb3qg0 gsADPTZj1UIpoYvAclZN98ZU/qlPvtJr0JzsSG2Vo4Ddi6VCeQrMBcAxZ4IUbpgzTWnL Y07YaBdmq+i3chTDGc8J1tdqgauK92Vsq5RMsNsyvqrG289Nl7NKGNGUWRAHUyR+SRjD Ge5T8swXtzmLqWXqSjV9xRRzwEyBU77g/YXsn7Ekownfte04N/CFsOYWvjKNwr5iu9uh JbHQ== X-Gm-Message-State: AOJu0Yw7NoYtXf8x/0WnoWqghdVAV+wl+UMt6wWQEDKdHjz0gA4F9MqI kzykCOp41ljueRtZyDOj0axnNOKhXKsGRZPWlii4ma7f6mOzDQJPFfrTxfBvD1bi X-Gm-Gg: Acq92OHHObeJSH8hvyd378vQ6uFxljyDSfJKKldRc0G7KPSd0ZT1qMAmZuTcaNcgTGY Tv84nwvojP/Rq/5WBWjFPsUY3Ti+B2aGz9dZbKOutpuQPczDaPRin1nrm4S6rwUqRDQgqweZffb zxxIzV5QO+lS62TK35Cw3Xc0sfgNoHzksNHfLDulKYj0bEzdnoimp/XgRuea4Z1jAbU0PGKunFZ KIRhmbskmgMaZMY+R68VV92InIg78faRahmoxMNDa7hUwx8HplY6qJHPYsAFIZuAar65RyaHC9Q LsyLweC8rSS6sKjO0t69O6xnp5B0n/yrRIXyVphuDy8RLo/ZixjGcHs3/ctUVIz2kr0YPdPEIKN rQx+7L6NjxCC0ETBEjhzqBSEGgRtFFnCeS2nG7NDjlcLhCis/h5J42GkQSa9ZOuWyOGzgq2zCi0 uvQ9GrEN2Y8Mfhecj48kJg3+lNtkznqMRHv6uRTQ6uqT9adBAt8Vc= X-Received: by 2002:a05:6a20:2443:b0:3b4:b276:a789 with SMTP id adf61e73a8af0-3b7841ab01dmr20761532637.36.1781604373134; Tue, 16 Jun 2026 03:06:13 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , qemu-stable@nongnu.org, Alistair Francis , Chao Liu Subject: [PULL 11/83] target/riscv/cpu_helper.c: allow LOAD_ADDR_MIS promotion to AMO fault Date: Tue, 16 Jun 2026 20:04:14 +1000 Message-ID: <20260616100527.1939565-12-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=alistair23@gmail.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605984570158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza promote_load_fault() is missing the promotion of misaligned AMO load addresses, i.e. RISCV_EXCP_LOAD_ADDR_MIS should be promoted to RISCV_EXCP_STORE_AMO_ADDR_MIS when RISCV_UW2_ALWAYS_STORE_AMO (i.e. always_storeamo is true). All other load AMO faults are already being covered. Cc: qemu-stable@nongnu.org Fixes: 98f21c30f5 ("target/riscv: AMO operations always raise store/AMO fau= lt") Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3503 Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: Chao Liu Message-ID: <20260522181353.429782-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index bc63713ddf..c3745cee19 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -2210,6 +2210,9 @@ static target_ulong promote_load_fault(target_ulong o= rig_cause) =20 case RISCV_EXCP_LOAD_PAGE_FAULT: return RISCV_EXCP_STORE_PAGE_FAULT; + + case RISCV_EXCP_LOAD_ADDR_MIS: + return RISCV_EXCP_STORE_AMO_ADDR_MIS; } =20 /* if no promotion, return original cause */ --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607162; cv=none; d=zohomail.com; s=zohoarc; b=BSXI6K8xOgRgRcBMCvLYwRXVfuZMbOthLwFvaixqophO1WacgdVnVQku5HCJyl1oD1j+/aHYaGt+zBHToOCSQPU+MkVjHzY7aM9lTHrnIA6/1xqGkgPZyIcvqCs0AC7WqXKrYubivZlFRub7o8/U/ToW1Cnf7USlv3mKtM17+4E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607162; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ZsXPmccwUkq4P2yZLnV0pu8qbIMKOYnwmYV+wIhyJA8=; b=a2h7y2hshVnI7zN9A4uLWLIaLH+Z52LWSldIoJy6Cz3RnLpX22OrNS+2JrnjRPMV8ekKN+UUdr2Qzf9juyalP7Wu0TW1b67sbcUYmHZi1wLmhCN2i8g92wUBUO8ULeTEfVqQ1ZOhkTvRhUxleJardb1Dyd4PGNg3E8/2wjfBww0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607162352879.7883742992652; Tue, 16 Jun 2026 03:52:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgc-0005Z3-16; Tue, 16 Jun 2026 06:06:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgX-0005Mx-7P for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:23 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgU-00037a-Kj for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:20 -0400 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-c858014845aso1730300a12.1 for ; Tue, 16 Jun 2026 03:06:17 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604376; x=1782209176; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZsXPmccwUkq4P2yZLnV0pu8qbIMKOYnwmYV+wIhyJA8=; b=sgHa7st5mlNSNmG6JxUYK94d8o4PwUliXVJ8BQbBPxPSxkLKe9hiUAUzT/R0fTnKey h0rEMY3fGIJMeIry6QkAyhmUKgSnhhPtbqmbp7PiqVDhN85joaJgRwj+uXqChsGuRPOF 8KFTwiJDd534xf6q7MGtS0mhoctYF6VPcx+KdlwruUmauWU14YL3Q7qDOTP9t9ScpE53 TGqz+8T0vLrzLbR8MPZu/jh0oDgDM4hGW5bsvZKxumwckvPLdq9Ay7s1f4t3uMW+F40H 4hkww7TamVyz3aY5qKq+g782Gnh7IAfxB88tgDSSEU8+48TkpNtREuWuOO8Gsbgp3z25 0RAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604376; x=1782209176; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ZsXPmccwUkq4P2yZLnV0pu8qbIMKOYnwmYV+wIhyJA8=; b=PKBcRvfyrBAd2yrRyacTmd5uKMXfmj5xMeaiCU+HGCKBPw7UurZnh6N86cuXm3O+rS yxw+34RiulS89ZhtxLU7yT10mXIU/Wb/RjxrrvKuTA+nq2w0kEePsLNUZYquI5bODaKk HebibIlP5PzZRxu+l1S9tIrtBkPZ470aKlX3dz0NSoQXg48uJz0u/v3RHXCuG080vaOh 6fx2a2fU7wzRCDaSK6eaQOpOXBSYLdAeMt0shFY6/zpjJUyOqzdqtKC6YmoJ+Xlhe7OK lAo5nH6RuURK3YIMZ5YEjUTV9sgOvyFC4KNU3sfDUpH828N4+90Mo3f+a1aEfeazZwJP 9i5w== X-Gm-Message-State: AOJu0YzrRKcfXo+3OWawhLL+33GmzMACPnLPBqKcZZyv6r9SnA9ycIfx qI6qR9LlgD3fWFdqqeFE/eovEIDYp4rEbOmCPvsZmfyEn9/e3ey1JLHuah0yqJ3f X-Gm-Gg: Acq92OFMAJea4td1P0DDo7ILkcehujLu6E5/ubYrzj81VGqlhvGyJZl2M0PAScMiQ42 mp+XXoH7elSm5uUoujIh7zndAu6wcwQkoOZmJUwmaWMh5B+HbRsZ8ibIA9fG46FM2dbuLaREB4u BbUNvj5JvsVOMzwrOKgV2XwCYV67PoBwjsBbfOtmq898vfg49GykfYTvD9JfvxXrw0r1XeMO2pO bQZv62GPKwZSfZNpTAbu7F6gltMjM7SuBLYEKI21+yCtG+vWPwmvb6Ui2odtYCxsCmoxx9Ut3X/ nTyYB+CW66shHIVJe8mSEoIAqHw1ielGtJ7BUhfdqIv0F7Uiv+yXkX9YNbG3yMYE5EAfEADppmp uiqfKgnvKuH5mPtRF9GuLg+0nqA4wZfnD47bH7xiWpW0oxxtEeTxCcMXzxMV2yFWj+nV2KWlp8P 0TFsBqzlOQ6eHmWn+QUylsy+qQJ2Hk4LLxDAnGJuq/ X-Received: by 2002:a05:6a20:eec2:20b0:3b3:26fd:6cc7 with SMTP id adf61e73a8af0-3b7e225d78fmr1706651637.9.1781604376371; Tue, 16 Jun 2026 03:06:16 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Alistair Francis , Pierrick Bouvier Subject: [PULL 12/83] target/riscv: Fix size of gpr and gprh Date: Tue, 16 Jun 2026 20:04:15 +1000 Message-ID: <20260616100527.1939565-13-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=alistair23@gmail.com; helo=mail-pg1-x535.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607164701158501 Content-Type: text/plain; charset="utf-8" From: Anton Johansson gprh is only needed for TARGET_RISCV64 when modeling 128-bit registers, fixing their size to 64 bits makes sense. gpr is also fixed to 64 bits since all direct uses of env->gpr correctly zero extend/truncate to/from target_ulong, meaning !TARGET_RISCV64 will behave as expected. We do however need to be a bit careful when mapping 64-bit fields to 32-bit TCGv globals on big endian hosts. Note, the cpu/rv128 VMSTATE version is bumped, breaking migration from older versions. Signed-off-by: Anton Johansson Acked-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260520125406.28693-2-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 4 ++-- target/riscv/cpu.c | 2 +- target/riscv/machine.c | 8 ++++---- target/riscv/monitor.c | 2 +- target/riscv/translate.c | 16 ++++++++++++++-- 5 files changed, 22 insertions(+), 10 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index f7d8a08c08..a440b03071 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -214,8 +214,8 @@ typedef struct PMUFixedCtrState { } PMUFixedCtrState; =20 struct CPUArchState { - target_ulong gpr[32]; - target_ulong gprh[32]; /* 64 top bits of the 128-bit registers */ + uint64_t gpr[32]; + uint64_t gprh[32]; /* 64 top bits of the 128-bit registers */ =20 /* vector coprocessor state. */ uint64_t vreg[32 * RV_VLEN_MAX / 64] QEMU_ALIGNED(16); diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 5903df9954..a57884dbc9 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -612,7 +612,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,= int flags) #endif =20 for (i =3D 0; i < 32; i++) { - qemu_fprintf(f, " %-8s " TARGET_FMT_lx, + qemu_fprintf(f, " %-8s %" PRIx64, riscv_int_regnames[i], env->gpr[i]); if ((i & 3) =3D=3D 3) { qemu_fprintf(f, "\n"); diff --git a/target/riscv/machine.c b/target/riscv/machine.c index b92e38b11a..358320a7fe 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -178,11 +178,11 @@ static bool rv128_needed(void *opaque) =20 static const VMStateDescription vmstate_rv128 =3D { .name =3D "cpu/rv128", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .needed =3D rv128_needed, .fields =3D (const VMStateField[]) { - VMSTATE_UINTTL_ARRAY(env.gprh, RISCVCPU, 32), + VMSTATE_UINT64_ARRAY(env.gprh, RISCVCPU, 32), VMSTATE_UINT64(env.mscratchh, RISCVCPU), VMSTATE_UINT64(env.sscratchh, RISCVCPU), VMSTATE_END_OF_LIST() @@ -449,7 +449,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { .minimum_version_id =3D 11, .post_load =3D riscv_cpu_post_load, .fields =3D (const VMStateField[]) { - VMSTATE_UINTTL_ARRAY(env.gpr, RISCVCPU, 32), + VMSTATE_UINT64_ARRAY(env.gpr, RISCVCPU, 32), VMSTATE_UINT64_ARRAY(env.fpr, RISCVCPU, 32), VMSTATE_UINT8_ARRAY(env.miprio, RISCVCPU, 64), VMSTATE_UINT8_ARRAY(env.siprio, RISCVCPU, 64), diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c index 6380600241..9edac0533c 100644 --- a/target/riscv/monitor.c +++ b/target/riscv/monitor.c @@ -248,7 +248,7 @@ static bool reg_is_ulong_integer(CPURISCVState *env, co= nst char *name, target_ulong *val, bool is_gprh) { const char * const *reg_names; - target_ulong *vals; + uint64_t *vals; =20 if (is_gprh) { reg_names =3D riscv_int_regnamesh; diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 1e4f340256..640691e1c5 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1469,12 +1469,24 @@ void riscv_translate_init(void) */ cpu_gpr[0] =3D NULL; cpu_gprh[0] =3D NULL; + /* + * Be careful with big endian hosts when mapping 64-bit CPUArchState f= ields + * to 32-bit TCGv globals. An offset of 4 bytes is applied so the lea= st + * significant bytes are correctly written to. + */ +#if HOST_BIG_ENDIAN && !defined(TARGET_RISCV64) + size_t field_offset =3D 4; +#else + size_t field_offset =3D 0; +#endif =20 for (i =3D 1; i < 32; i++) { cpu_gpr[i] =3D tcg_global_mem_new(tcg_env, - offsetof(CPURISCVState, gpr[i]), riscv_int_regnames[i]); + offsetof(CPURISCVState, gpr[i]) + field_offset, + riscv_int_regnames[i]); cpu_gprh[i] =3D tcg_global_mem_new(tcg_env, - offsetof(CPURISCVState, gprh[i]), riscv_int_regnamesh[i]); + offsetof(CPURISCVState, gprh[i]) + field_offset, + riscv_int_regnamesh[i]); } =20 for (i =3D 0; i < 32; i++) { --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605360; cv=none; d=zohomail.com; s=zohoarc; b=hbstYHVpRjuYe1KuMnW849MLejV7EF4lvD+JW2L5RbAItB3Bx+nXe643/DVYGJe9ydQeMEh455STjlo6dSkCoe/TWm/FVx2pPG3hJO/e4yD9UN4o4NiEAfou3yTnWVBdWoA0XitcX572RsWF+mcNVPlMq+mImHiZxYtE3c2iVrE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605360; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=mmrbFqSQfj+2KHG6KE7ufOnTgtaligS6RtPxzv2NkK4=; b=jWJxf9HeKacbX67IOdqUUT8FVN5ZpKjm7jA04kX6ClLeHO/xyXXoY1+x5G2uWxaIQhVYjrF8mssuOlxnvOvVzY/WWTCqUVdM4oANVTMWybAbsqgQ0rcm2lZCOjqGJau8estL8vyE2C4c05gOSMnYW4NqPQZAeNpRKLBoqHFnc/k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605360416304.0069112772595; Tue, 16 Jun 2026 03:22:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgd-0005b9-Ez; Tue, 16 Jun 2026 06:06:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgc-0005Zk-KG for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:26 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgZ-000382-6D for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:26 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-36d630c0e35so4252824a91.3 for ; Tue, 16 Jun 2026 03:06:21 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604381; x=1782209181; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mmrbFqSQfj+2KHG6KE7ufOnTgtaligS6RtPxzv2NkK4=; b=lkkwD+dQ52ce9t2GByFPtQbqM+9CNiBBnr0X2CjPbu0sPePeeJGyQ4H8NJp9QOeH00 7IOEgspkLx42NzRM5AbGH0vUUiViFk4Lhu9zTMOkmdAkaMoDGWWZnEFoE5vGp6srOsjL W3YII1nfZlu9H/clSLJotbqaMe4332KHvUlwbEjCRrLa8yTUqIHVE7YVgnAprAXdkVjZ fzk1komOXhmyCNiWpegUCGiOaPwD7rPM9XaEr9b1j4j0VOO8U6dh9JXs/DFfxFlFI4zD T7XD4Glp8RHJsB0Pd9Evk2u0cKjc/d8FPLE7okKCi0UMRqL0n5otZFIJOh4K8oymCJie mhtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604381; x=1782209181; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mmrbFqSQfj+2KHG6KE7ufOnTgtaligS6RtPxzv2NkK4=; b=TCAQbkNpTqFG01dVfpp1SAnZ5KlDeESnzUDlZrFK7cDXR08W+aIuCYAZ77ljmoCDRT tDpymU149Y+RikpFU50o9Ks8kVY7ca8/foh8anWIf2l2G9QpfNVIKhZO6vPPBNfmFONh n7rYAAcmasibf4ZNc2o9sNjkCarUTCGs3KAhJH2BB7qhz3L3LkQbly3hCC+zW9qkGiBV jVaaah8mtmY7TBpzA5ah+4S1CNAaNKiELY521WP3X+zePOfBpryBDRaxu6lRC+2XAC9b eLS7mI3pLAHGer03UmYsEznSJW9PvJQmu9xE3zeaZ//IpTDf/9Oxb6ukyC3z40qox4va X1Ug== X-Gm-Message-State: AOJu0Yys8WHxzOrBEAwdaong9yW7wz10Gd2L06dLvdRqiEmEt1ZZnlZN p8NDu4cRgzrL2CtaMHLv1BV1AG6ehunj8qBnfLZA7ZCJiuoWRW/gkjvvcd2Ruddw X-Gm-Gg: Acq92OHPzlSze2jxGVlYkLKIEfynG2Hz6M7KlLADMwDjtw6oWHGWBN80vO5EwzCnbEB 9UpCHklBLqdkahaDWoKsCjHl/QuNGU++MlRVt3ZtlNPqMvEbbtd6CZSGtQW1G//caRxeZClY4B9 KAlzo6outvfi6dICc2scaCHK7YWYRW4cpRtXYYnGvEOgdROe6B5XA89MrxpTqU90kThafab7Jlw +7Vh3vMSLhA0a404oayy8CjCiSX+dvfeSFY45R/Z5NhF7Lg+uvnhiY12kRs1I0DpPVcPElBnMde esV6LxJNoAa5gGBoNuLAkuk3HDm+M6/Os6ERwjyi1g59YV5MPfH8ajn0bIgfjXwRtpUAVw7Aiu5 JjBPhu6JnmR7Wy00ZxEz/OUcWFTj3cvtUdIXB+1HGkZcLLyZ9wi5Fq+NBEVIN8eHx2RNIJSvGHB jN/j46Cjed4LSpjvXSN9fxLoV6gSwcOAehBcQPBd6j X-Received: by 2002:a17:90b:580c:b0:35b:8d89:719b with SMTP id 98e67ed59e1d1-37c2bc6f158mr15263834a91.1.1781604380450; Tue, 16 Jun 2026 03:06:20 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Alistair Francis , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 13/83] target/riscv: Fix size of vector CSRs Date: Tue, 16 Jun 2026 20:04:16 +1000 Message-ID: <20260616100527.1939565-14-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605362897158500 From: Anton Johansson According to version 20250508 of the unprivileged specification: - vtype: bits 0..7 used, bit XLEN-1 illegal, rest reserved =3D> fix to 64-bits. - vxsat: bit 0 used, vxrm which would occupy bits 1..2 is stored separately, and bits 3..31 are set to 0 =3D> fix to 8-bits. - vxrm: 2 lowest bits are used for rounding mode, rest set to 0 =3D> fix to 8-bits. - vstart: maximum value of VLMAX-1, where VLMAX is at most 2^16 =3D> fix to 32-bits as vstart is mapped to a TCG global. - vl: maximum value of VLEN which is at most 2^16 =3D> fix to 32-bits as vl is mapped to a TCG global. Fields are shuffled for reduced padding. Note, the cpu/vector VMSTATE version is bumped, breaking migration from older versions. Signed-off-by: Anton Johansson Acked-by: Alistair Francis Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20260520125406.28693-3-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 12 +-- target/riscv/machine.c | 14 +-- target/riscv/translate.c | 12 ++- target/riscv/vector_helper.c | 125 ++++++++++++++---------- target/riscv/insn_trans/trans_rvv.c.inc | 22 ++--- 5 files changed, 103 insertions(+), 82 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index a440b03071..981073021f 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -193,7 +193,7 @@ FIELD(VTYPE, VSEW, 3, 3) FIELD(VTYPE, VTA, 6, 1) FIELD(VTYPE, VMA, 7, 1) FIELD(VTYPE, ALTFMT, 8, 1) -FIELD(VTYPE, RESERVED, 9, sizeof(target_ulong) * 8 - 10) +FIELD(VTYPE, RESERVED, 9, sizeof(uint64_t) * 8 - 10) =20 typedef struct PMUCTRState { /* Current value of a counter */ @@ -219,11 +219,11 @@ struct CPUArchState { =20 /* vector coprocessor state. */ uint64_t vreg[32 * RV_VLEN_MAX / 64] QEMU_ALIGNED(16); - target_ulong vxrm; - target_ulong vxsat; - target_ulong vl; - target_ulong vstart; - target_ulong vtype; + uint64_t vtype; + uint32_t vl; + uint32_t vstart; + uint8_t vxrm; + uint8_t vxsat; bool vill; =20 target_ulong pc; diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 358320a7fe..45e13a0105 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -138,16 +138,16 @@ static bool vector_needed(void *opaque) =20 static const VMStateDescription vmstate_vector =3D { .name =3D "cpu/vector", - .version_id =3D 2, - .minimum_version_id =3D 2, + .version_id =3D 3, + .minimum_version_id =3D 3, .needed =3D vector_needed, .fields =3D (const VMStateField[]) { VMSTATE_UINT64_ARRAY(env.vreg, RISCVCPU, 32 * RV_VLEN_MAX / 64), - VMSTATE_UINTTL(env.vxrm, RISCVCPU), - VMSTATE_UINTTL(env.vxsat, RISCVCPU), - VMSTATE_UINTTL(env.vl, RISCVCPU), - VMSTATE_UINTTL(env.vstart, RISCVCPU), - VMSTATE_UINTTL(env.vtype, RISCVCPU), + VMSTATE_UINT64(env.vtype, RISCVCPU), + VMSTATE_UINT32(env.vl, RISCVCPU), + VMSTATE_UINT32(env.vstart, RISCVCPU), + VMSTATE_UINT8(env.vxrm, RISCVCPU), + VMSTATE_UINT8(env.vxsat, RISCVCPU), VMSTATE_BOOL(env.vill, RISCVCPU), VMSTATE_END_OF_LIST() } diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 640691e1c5..4a557b4907 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -38,8 +38,9 @@ #include "tcg/tcg-cpu.h" =20 /* global register indices */ -static TCGv cpu_gpr[32], cpu_gprh[32], cpu_pc, cpu_vl, cpu_vstart; +static TCGv cpu_gpr[32], cpu_gprh[32], cpu_pc; static TCGv_i64 cpu_fpr[32]; /* assume F and D extensions */ +static TCGv_i32 cpu_vl, cpu_vstart; static TCGv load_res; static TCGv load_val; =20 @@ -1480,6 +1481,10 @@ void riscv_translate_init(void) size_t field_offset =3D 0; #endif =20 + /* 32 bits in size, no offset needed */ + size_t vl_offset =3D offsetof(CPURISCVState, vl); + size_t vstart_offset =3D offsetof(CPURISCVState, vstart); + for (i =3D 1; i < 32; i++) { cpu_gpr[i] =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, gpr[i]) + field_offset, @@ -1495,9 +1500,8 @@ void riscv_translate_init(void) } =20 cpu_pc =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, pc), "p= c"); - cpu_vl =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, vl), "v= l"); - cpu_vstart =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, vst= art), - "vstart"); + cpu_vl =3D tcg_global_mem_new_i32(tcg_env, vl_offset, "vl"); + cpu_vstart =3D tcg_global_mem_new_i32(tcg_env, vstart_offset, "vstart"= ); load_res =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, load_= res), "load_res"); load_val =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, load_= val), diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 954a85c03a..89012fccb3 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -285,7 +285,7 @@ vext_continuous_ldst_host(CPURISCVState *env, vext_ldst= _elem_fn_host *ldst_host, } } =20 -static void vext_set_tail_elems_1s(target_ulong vl, void *vd, +static void vext_set_tail_elems_1s(uint32_t vl, void *vd, uint32_t desc, uint32_t nf, uint32_t esz, uint32_t max_elems) { @@ -388,6 +388,12 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target= _ulong addr, uint32_t evl =3D env->vstart + elems; MMUAccessType access_type =3D is_load ? MMU_DATA_LOAD : MMU_DATA_STORE; =20 + /* + * Maximum vector length is VLMAX =3D=3D 2^16 =3D=3D LMUL * VL / SEW, = and + * occurs for LMUL =3D=3D 8, SEW =3D=3D 8, VL =3D=3D 2^16. + */ + g_assert(env->vstart < UINT16_MAX && UINT16_MAX - env->vstart >=3D ele= ms); + /* Check page permission/pmp/watchpoint/etc. */ probe_pages(env, addr, size, ra, access_type, mmu_index, &host, &flags, true); @@ -2224,12 +2230,12 @@ GEN_VEXT_VMERGE_VX(vmerge_vxm_d, int64_t, H8) * define common macros for fixed point here. */ typedef void opivv2_rm_fn(void *vd, void *vs1, void *vs2, int i, - CPURISCVState *env, int vxrm); + CPURISCVState *env, uint8_t vxrm); =20 #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ static inline void \ do_##NAME(void *vd, void *vs1, void *vs2, int i, \ - CPURISCVState *env, int vxrm) \ + CPURISCVState *env, uint8_t vxrm) \ { \ TX1 s1 =3D *((T1 *)vs1 + HS1(i)); \ TX2 s2 =3D *((T2 *)vs2 + HS2(i)); \ @@ -2239,7 +2245,7 @@ do_##NAME(void *vd, void *vs1, void *vs2, int i, = \ static inline void vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2, CPURISCVState *env, - uint32_t vl, uint32_t vm, int vxrm, + uint32_t vl, uint32_t vm, uint8_t vxrm, opivv2_rm_fn *fn, uint32_t vma, uint32_t esz) { for (uint32_t i =3D env->vstart; i < vl; i++) { @@ -2298,7 +2304,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ do_##NAME, ESZ); \ } =20 -static inline uint8_t saddu8(CPURISCVState *env, int vxrm, uint8_t a, +static inline uint8_t saddu8(CPURISCVState *env, uint8_t vxrm, uint8_t a, uint8_t b) { uint8_t res =3D a + b; @@ -2309,7 +2315,7 @@ static inline uint8_t saddu8(CPURISCVState *env, int = vxrm, uint8_t a, return res; } =20 -static inline uint16_t saddu16(CPURISCVState *env, int vxrm, uint16_t a, +static inline uint16_t saddu16(CPURISCVState *env, uint8_t vxrm, uint16_t = a, uint16_t b) { uint16_t res =3D a + b; @@ -2320,7 +2326,7 @@ static inline uint16_t saddu16(CPURISCVState *env, in= t vxrm, uint16_t a, return res; } =20 -static inline uint32_t saddu32(CPURISCVState *env, int vxrm, uint32_t a, +static inline uint32_t saddu32(CPURISCVState *env, uint8_t vxrm, uint32_t = a, uint32_t b) { uint32_t res =3D a + b; @@ -2331,7 +2337,7 @@ static inline uint32_t saddu32(CPURISCVState *env, in= t vxrm, uint32_t a, return res; } =20 -static inline uint64_t saddu64(CPURISCVState *env, int vxrm, uint64_t a, +static inline uint64_t saddu64(CPURISCVState *env, uint8_t vxrm, uint64_t = a, uint64_t b) { uint64_t res =3D a + b; @@ -2352,12 +2358,12 @@ GEN_VEXT_VV_RM(vsaddu_vv_w, 4) GEN_VEXT_VV_RM(vsaddu_vv_d, 8) =20 typedef void opivx2_rm_fn(void *vd, target_long s1, void *vs2, int i, - CPURISCVState *env, int vxrm); + CPURISCVState *env, uint8_t vxrm); =20 #define OPIVX2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ static inline void \ do_##NAME(void *vd, target_long s1, void *vs2, int i, \ - CPURISCVState *env, int vxrm) \ + CPURISCVState *env, uint8_t vxrm) \ { \ TX2 s2 =3D *((T2 *)vs2 + HS2(i)); \ *((TD *)vd + HD(i)) =3D OP(env, vxrm, s2, (TX1)(T1)s1); \ @@ -2366,7 +2372,7 @@ do_##NAME(void *vd, target_long s1, void *vs2, int i,= \ static inline void vext_vx_rm_1(void *vd, void *v0, target_long s1, void *vs2, CPURISCVState *env, - uint32_t vl, uint32_t vm, int vxrm, + uint32_t vl, uint32_t vm, uint8_t vxrm, opivx2_rm_fn *fn, uint32_t vma, uint32_t esz) { for (uint32_t i =3D env->vstart; i < vl; i++) { @@ -2435,7 +2441,8 @@ GEN_VEXT_VX_RM(vsaddu_vx_h, 2) GEN_VEXT_VX_RM(vsaddu_vx_w, 4) GEN_VEXT_VX_RM(vsaddu_vx_d, 8) =20 -static inline int8_t sadd8(CPURISCVState *env, int vxrm, int8_t a, int8_t = b) +static inline int8_t sadd8(CPURISCVState *env, uint8_t vxrm, int8_t a, + int8_t b) { int8_t res =3D a + b; if ((res ^ a) & (res ^ b) & INT8_MIN) { @@ -2445,7 +2452,7 @@ static inline int8_t sadd8(CPURISCVState *env, int vx= rm, int8_t a, int8_t b) return res; } =20 -static inline int16_t sadd16(CPURISCVState *env, int vxrm, int16_t a, +static inline int16_t sadd16(CPURISCVState *env, uint8_t vxrm, int16_t a, int16_t b) { int16_t res =3D a + b; @@ -2456,7 +2463,7 @@ static inline int16_t sadd16(CPURISCVState *env, int = vxrm, int16_t a, return res; } =20 -static inline int32_t sadd32(CPURISCVState *env, int vxrm, int32_t a, +static inline int32_t sadd32(CPURISCVState *env, uint8_t vxrm, int32_t a, int32_t b) { int32_t res =3D a + b; @@ -2467,7 +2474,7 @@ static inline int32_t sadd32(CPURISCVState *env, int = vxrm, int32_t a, return res; } =20 -static inline int64_t sadd64(CPURISCVState *env, int vxrm, int64_t a, +static inline int64_t sadd64(CPURISCVState *env, uint8_t vxrm, int64_t a, int64_t b) { int64_t res =3D a + b; @@ -2496,7 +2503,7 @@ GEN_VEXT_VX_RM(vsadd_vx_h, 2) GEN_VEXT_VX_RM(vsadd_vx_w, 4) GEN_VEXT_VX_RM(vsadd_vx_d, 8) =20 -static inline uint8_t ssubu8(CPURISCVState *env, int vxrm, uint8_t a, +static inline uint8_t ssubu8(CPURISCVState *env, uint8_t vxrm, uint8_t a, uint8_t b) { uint8_t res =3D a - b; @@ -2507,7 +2514,7 @@ static inline uint8_t ssubu8(CPURISCVState *env, int = vxrm, uint8_t a, return res; } =20 -static inline uint16_t ssubu16(CPURISCVState *env, int vxrm, uint16_t a, +static inline uint16_t ssubu16(CPURISCVState *env, uint8_t vxrm, uint16_t = a, uint16_t b) { uint16_t res =3D a - b; @@ -2518,7 +2525,7 @@ static inline uint16_t ssubu16(CPURISCVState *env, in= t vxrm, uint16_t a, return res; } =20 -static inline uint32_t ssubu32(CPURISCVState *env, int vxrm, uint32_t a, +static inline uint32_t ssubu32(CPURISCVState *env, uint8_t vxrm, uint32_t = a, uint32_t b) { uint32_t res =3D a - b; @@ -2529,7 +2536,7 @@ static inline uint32_t ssubu32(CPURISCVState *env, in= t vxrm, uint32_t a, return res; } =20 -static inline uint64_t ssubu64(CPURISCVState *env, int vxrm, uint64_t a, +static inline uint64_t ssubu64(CPURISCVState *env, uint8_t vxrm, uint64_t = a, uint64_t b) { uint64_t res =3D a - b; @@ -2558,7 +2565,8 @@ GEN_VEXT_VX_RM(vssubu_vx_h, 2) GEN_VEXT_VX_RM(vssubu_vx_w, 4) GEN_VEXT_VX_RM(vssubu_vx_d, 8) =20 -static inline int8_t ssub8(CPURISCVState *env, int vxrm, int8_t a, int8_t = b) +static inline int8_t ssub8(CPURISCVState *env, uint8_t vxrm, int8_t a, + int8_t b) { int8_t res =3D a - b; if ((res ^ a) & (a ^ b) & INT8_MIN) { @@ -2568,7 +2576,7 @@ static inline int8_t ssub8(CPURISCVState *env, int vx= rm, int8_t a, int8_t b) return res; } =20 -static inline int16_t ssub16(CPURISCVState *env, int vxrm, int16_t a, +static inline int16_t ssub16(CPURISCVState *env, uint8_t vxrm, int16_t a, int16_t b) { int16_t res =3D a - b; @@ -2579,7 +2587,7 @@ static inline int16_t ssub16(CPURISCVState *env, int = vxrm, int16_t a, return res; } =20 -static inline int32_t ssub32(CPURISCVState *env, int vxrm, int32_t a, +static inline int32_t ssub32(CPURISCVState *env, uint8_t vxrm, int32_t a, int32_t b) { int32_t res =3D a - b; @@ -2590,7 +2598,7 @@ static inline int32_t ssub32(CPURISCVState *env, int = vxrm, int32_t a, return res; } =20 -static inline int64_t ssub64(CPURISCVState *env, int vxrm, int64_t a, +static inline int64_t ssub64(CPURISCVState *env, uint8_t vxrm, int64_t a, int64_t b) { int64_t res =3D a - b; @@ -2620,7 +2628,7 @@ GEN_VEXT_VX_RM(vssub_vx_w, 4) GEN_VEXT_VX_RM(vssub_vx_d, 8) =20 /* Vector Single-Width Averaging Add and Subtract */ -static inline uint8_t get_round(int vxrm, uint64_t v, uint8_t shift) +static inline uint8_t get_round(uint8_t vxrm, uint64_t v, uint8_t shift) { uint8_t d =3D extract64(v, shift, 1); uint8_t d1; @@ -2632,22 +2640,30 @@ static inline uint8_t get_round(int vxrm, uint64_t = v, uint8_t shift) =20 d1 =3D extract64(v, shift - 1, 1); D1 =3D extract64(v, 0, shift); - if (vxrm =3D=3D 0) { /* round-to-nearest-up (add +0.5 LSB) */ + switch (vxrm) { + case 0: + /* round-to-nearest-up (add +0.5 LSB) */ return d1; - } else if (vxrm =3D=3D 1) { /* round-to-nearest-even */ + case 1: + /* round-to-nearest-even */ if (shift > 1) { D2 =3D extract64(v, 0, shift - 1); return d1 & ((D2 !=3D 0) | d); } else { return d1 & d; } - } else if (vxrm =3D=3D 3) { /* round-to-odd (OR bits into LSB, aka "ja= m") */ + case 2: + /* round-down (truncate) */ + return 0; + case 3: + /* round-to-odd (OR bits into LSB, aka "jam") */ return !d & (D1 !=3D 0); + default: + g_assert_not_reached(); } - return 0; /* round-down (truncate) */ } =20 -static inline int32_t aadd32(CPURISCVState *env, int vxrm, int32_t a, +static inline int32_t aadd32(CPURISCVState *env, uint8_t vxrm, int32_t a, int32_t b) { int64_t res =3D (int64_t)a + b; @@ -2656,7 +2672,7 @@ static inline int32_t aadd32(CPURISCVState *env, int = vxrm, int32_t a, return (res >> 1) + round; } =20 -static inline int64_t aadd64(CPURISCVState *env, int vxrm, int64_t a, +static inline int64_t aadd64(CPURISCVState *env, uint8_t vxrm, int64_t a, int64_t b) { int64_t res =3D a + b; @@ -2685,7 +2701,7 @@ GEN_VEXT_VX_RM(vaadd_vx_h, 2) GEN_VEXT_VX_RM(vaadd_vx_w, 4) GEN_VEXT_VX_RM(vaadd_vx_d, 8) =20 -static inline uint32_t aaddu32(CPURISCVState *env, int vxrm, +static inline uint32_t aaddu32(CPURISCVState *env, uint8_t vxrm, uint32_t a, uint32_t b) { uint64_t res =3D (uint64_t)a + b; @@ -2694,7 +2710,7 @@ static inline uint32_t aaddu32(CPURISCVState *env, in= t vxrm, return (res >> 1) + round; } =20 -static inline uint64_t aaddu64(CPURISCVState *env, int vxrm, +static inline uint64_t aaddu64(CPURISCVState *env, uint8_t vxrm, uint64_t a, uint64_t b) { uint64_t res =3D a + b; @@ -2722,7 +2738,7 @@ GEN_VEXT_VX_RM(vaaddu_vx_h, 2) GEN_VEXT_VX_RM(vaaddu_vx_w, 4) GEN_VEXT_VX_RM(vaaddu_vx_d, 8) =20 -static inline int32_t asub32(CPURISCVState *env, int vxrm, int32_t a, +static inline int32_t asub32(CPURISCVState *env, uint8_t vxrm, int32_t a, int32_t b) { int64_t res =3D (int64_t)a - b; @@ -2731,7 +2747,7 @@ static inline int32_t asub32(CPURISCVState *env, int = vxrm, int32_t a, return (res >> 1) + round; } =20 -static inline int64_t asub64(CPURISCVState *env, int vxrm, int64_t a, +static inline int64_t asub64(CPURISCVState *env, uint8_t vxrm, int64_t a, int64_t b) { int64_t res =3D (int64_t)a - b; @@ -2760,7 +2776,7 @@ GEN_VEXT_VX_RM(vasub_vx_h, 2) GEN_VEXT_VX_RM(vasub_vx_w, 4) GEN_VEXT_VX_RM(vasub_vx_d, 8) =20 -static inline uint32_t asubu32(CPURISCVState *env, int vxrm, +static inline uint32_t asubu32(CPURISCVState *env, uint8_t vxrm, uint32_t a, uint32_t b) { int64_t res =3D (int64_t)a - b; @@ -2769,7 +2785,7 @@ static inline uint32_t asubu32(CPURISCVState *env, in= t vxrm, return (res >> 1) + round; } =20 -static inline uint64_t asubu64(CPURISCVState *env, int vxrm, +static inline uint64_t asubu64(CPURISCVState *env, uint8_t vxrm, uint64_t a, uint64_t b) { uint64_t res =3D (uint64_t)a - b; @@ -2798,7 +2814,8 @@ GEN_VEXT_VX_RM(vasubu_vx_w, 4) GEN_VEXT_VX_RM(vasubu_vx_d, 8) =20 /* Vector Single-Width Fractional Multiply with Rounding and Saturation */ -static inline int8_t vsmul8(CPURISCVState *env, int vxrm, int8_t a, int8_t= b) +static inline int8_t vsmul8(CPURISCVState *env, uint8_t vxrm, int8_t a, + int8_t b) { uint8_t round; int16_t res; @@ -2818,7 +2835,7 @@ static inline int8_t vsmul8(CPURISCVState *env, int v= xrm, int8_t a, int8_t b) } } =20 -static int16_t vsmul16(CPURISCVState *env, int vxrm, int16_t a, int16_t b) +static int16_t vsmul16(CPURISCVState *env, uint8_t vxrm, int16_t a, int16_= t b) { uint8_t round; int32_t res; @@ -2838,7 +2855,7 @@ static int16_t vsmul16(CPURISCVState *env, int vxrm, = int16_t a, int16_t b) } } =20 -static int32_t vsmul32(CPURISCVState *env, int vxrm, int32_t a, int32_t b) +static int32_t vsmul32(CPURISCVState *env, uint8_t vxrm, int32_t a, int32_= t b) { uint8_t round; int64_t res; @@ -2858,7 +2875,7 @@ static int32_t vsmul32(CPURISCVState *env, int vxrm, = int32_t a, int32_t b) } } =20 -static int64_t vsmul64(CPURISCVState *env, int vxrm, int64_t a, int64_t b) +static int64_t vsmul64(CPURISCVState *env, uint8_t vxrm, int64_t a, int64_= t b) { uint8_t round; uint64_t hi_64, lo_64; @@ -2906,7 +2923,7 @@ GEN_VEXT_VX_RM(vsmul_vx_d, 8) =20 /* Vector Single-Width Scaling Shift Instructions */ static inline uint8_t -vssrl8(CPURISCVState *env, int vxrm, uint8_t a, uint8_t b) +vssrl8(CPURISCVState *env, uint8_t vxrm, uint8_t a, uint8_t b) { uint8_t round, shift =3D b & 0x7; uint8_t res; @@ -2916,7 +2933,7 @@ vssrl8(CPURISCVState *env, int vxrm, uint8_t a, uint8= _t b) return res; } static inline uint16_t -vssrl16(CPURISCVState *env, int vxrm, uint16_t a, uint16_t b) +vssrl16(CPURISCVState *env, uint8_t vxrm, uint16_t a, uint16_t b) { uint8_t round, shift =3D b & 0xf; =20 @@ -2924,7 +2941,7 @@ vssrl16(CPURISCVState *env, int vxrm, uint16_t a, uin= t16_t b) return (a >> shift) + round; } static inline uint32_t -vssrl32(CPURISCVState *env, int vxrm, uint32_t a, uint32_t b) +vssrl32(CPURISCVState *env, uint8_t vxrm, uint32_t a, uint32_t b) { uint8_t round, shift =3D b & 0x1f; =20 @@ -2932,7 +2949,7 @@ vssrl32(CPURISCVState *env, int vxrm, uint32_t a, uin= t32_t b) return (a >> shift) + round; } static inline uint64_t -vssrl64(CPURISCVState *env, int vxrm, uint64_t a, uint64_t b) +vssrl64(CPURISCVState *env, uint8_t vxrm, uint64_t a, uint64_t b) { uint8_t round, shift =3D b & 0x3f; =20 @@ -2958,7 +2975,7 @@ GEN_VEXT_VX_RM(vssrl_vx_w, 4) GEN_VEXT_VX_RM(vssrl_vx_d, 8) =20 static inline int8_t -vssra8(CPURISCVState *env, int vxrm, int8_t a, int8_t b) +vssra8(CPURISCVState *env, uint8_t vxrm, int8_t a, int8_t b) { uint8_t round, shift =3D b & 0x7; =20 @@ -2966,7 +2983,7 @@ vssra8(CPURISCVState *env, int vxrm, int8_t a, int8_t= b) return (a >> shift) + round; } static inline int16_t -vssra16(CPURISCVState *env, int vxrm, int16_t a, int16_t b) +vssra16(CPURISCVState *env, uint8_t vxrm, int16_t a, int16_t b) { uint8_t round, shift =3D b & 0xf; =20 @@ -2974,7 +2991,7 @@ vssra16(CPURISCVState *env, int vxrm, int16_t a, int1= 6_t b) return (a >> shift) + round; } static inline int32_t -vssra32(CPURISCVState *env, int vxrm, int32_t a, int32_t b) +vssra32(CPURISCVState *env, uint8_t vxrm, int32_t a, int32_t b) { uint8_t round, shift =3D b & 0x1f; =20 @@ -2982,7 +2999,7 @@ vssra32(CPURISCVState *env, int vxrm, int32_t a, int3= 2_t b) return (a >> shift) + round; } static inline int64_t -vssra64(CPURISCVState *env, int vxrm, int64_t a, int64_t b) +vssra64(CPURISCVState *env, uint8_t vxrm, int64_t a, int64_t b) { uint8_t round, shift =3D b & 0x3f; =20 @@ -3010,7 +3027,7 @@ GEN_VEXT_VX_RM(vssra_vx_d, 8) =20 /* Vector Narrowing Fixed-Point Clip Instructions */ static inline int8_t -vnclip8(CPURISCVState *env, int vxrm, int16_t a, int8_t b) +vnclip8(CPURISCVState *env, uint8_t vxrm, int16_t a, int8_t b) { uint8_t round, shift =3D b & 0xf; int16_t res; @@ -3029,7 +3046,7 @@ vnclip8(CPURISCVState *env, int vxrm, int16_t a, int8= _t b) } =20 static inline int16_t -vnclip16(CPURISCVState *env, int vxrm, int32_t a, int16_t b) +vnclip16(CPURISCVState *env, uint8_t vxrm, int32_t a, int16_t b) { uint8_t round, shift =3D b & 0x1f; int32_t res; @@ -3048,7 +3065,7 @@ vnclip16(CPURISCVState *env, int vxrm, int32_t a, int= 16_t b) } =20 static inline int32_t -vnclip32(CPURISCVState *env, int vxrm, int64_t a, int32_t b) +vnclip32(CPURISCVState *env, uint8_t vxrm, int64_t a, int32_t b) { uint8_t round, shift =3D b & 0x3f; int64_t res; @@ -3081,7 +3098,7 @@ GEN_VEXT_VX_RM(vnclip_wx_h, 2) GEN_VEXT_VX_RM(vnclip_wx_w, 4) =20 static inline uint8_t -vnclipu8(CPURISCVState *env, int vxrm, uint16_t a, uint8_t b) +vnclipu8(CPURISCVState *env, uint8_t vxrm, uint16_t a, uint8_t b) { uint8_t round, shift =3D b & 0xf; uint16_t res; @@ -3097,7 +3114,7 @@ vnclipu8(CPURISCVState *env, int vxrm, uint16_t a, ui= nt8_t b) } =20 static inline uint16_t -vnclipu16(CPURISCVState *env, int vxrm, uint32_t a, uint16_t b) +vnclipu16(CPURISCVState *env, uint8_t vxrm, uint32_t a, uint16_t b) { uint8_t round, shift =3D b & 0x1f; uint32_t res; @@ -3113,7 +3130,7 @@ vnclipu16(CPURISCVState *env, int vxrm, uint32_t a, u= int16_t b) } =20 static inline uint32_t -vnclipu32(CPURISCVState *env, int vxrm, uint64_t a, uint32_t b) +vnclipu32(CPURISCVState *env, uint8_t vxrm, uint64_t a, uint32_t b) { uint8_t round, shift =3D b & 0x3f; uint64_t res; diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 9a86c6dcd4..23262b1d03 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -203,7 +203,7 @@ static bool do_vsetvl(DisasContext *s, int rd, int rs1,= TCGv s2) =20 if (rd =3D=3D 0 && rs1 =3D=3D 0) { s1 =3D tcg_temp_new(); - tcg_gen_mov_tl(s1, cpu_vl); + tcg_gen_ext_i32_tl(s1, cpu_vl); } else if (rs1 =3D=3D 0) { /* As the mask is at least one bit, RV_VLEN_MAX is >=3D VLMAX */ s1 =3D tcg_constant_tl(RV_VLEN_MAX); @@ -1213,9 +1213,9 @@ static bool ldst_whole_trans(uint32_t vd, uint32_t rs= 1, uint32_t nf, tcg_gen_qemu_st_i64(t8, addr, s->mem_idx, MO_LEUQ | atomic= ity); } if (i =3D=3D size - 8) { - tcg_gen_movi_tl(cpu_vstart, 0); + tcg_gen_movi_i32(cpu_vstart, 0); } else { - tcg_gen_addi_tl(cpu_vstart, cpu_vstart, 8 >> log2_esz); + tcg_gen_addi_i32(cpu_vstart, cpu_vstart, 8 >> log2_esz); } } } else { @@ -2426,7 +2426,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a= ) \ s->cfg_ptr->vlenb, data, \ (s->altfmt ? gen_helper_##BFA_HELPER : \ fns[s->sew - 1])); \ - tcg_gen_movi_tl(cpu_vstart, 0); \ + tcg_gen_movi_i32(cpu_vstart, 0); \ finalize_rvv_inst(s); \ \ return true; \ @@ -3641,7 +3641,7 @@ static bool trans_vmv_x_s(DisasContext *s, arg_vmv_x_= s *a) vec_element_loadi(s, t1, a->rs2, 0, true); tcg_gen_trunc_i64_tl(dest, t1); gen_set_gpr(s, a->rd, dest); - tcg_gen_movi_tl(cpu_vstart, 0); + tcg_gen_movi_i32(cpu_vstart, 0); finalize_rvv_inst(s); return true; } @@ -3658,7 +3658,7 @@ static bool trans_vmv_s_x(DisasContext *s, arg_vmv_s_= x *a) TCGv s1; TCGLabel *over =3D gen_new_label(); =20 - tcg_gen_brcond_tl(TCG_COND_GEU, cpu_vstart, cpu_vl, over); + tcg_gen_brcond_i32(TCG_COND_GEU, cpu_vstart, cpu_vl, over); =20 t1 =3D tcg_temp_new_i64(); =20 @@ -3670,7 +3670,7 @@ static bool trans_vmv_s_x(DisasContext *s, arg_vmv_s_= x *a) tcg_gen_ext_tl_i64(t1, s1); vec_element_storei_tail(s, a->rd, t1); gen_set_label(over); - tcg_gen_movi_tl(cpu_vstart, 0); + tcg_gen_movi_i32(cpu_vstart, 0); finalize_rvv_inst(s); return true; } @@ -3698,7 +3698,7 @@ static bool trans_vfmv_f_s(DisasContext *s, arg_vfmv_= f_s *a) } =20 mark_fs_dirty(s); - tcg_gen_movi_tl(cpu_vstart, 0); + tcg_gen_movi_i32(cpu_vstart, 0); finalize_rvv_inst(s); return true; } @@ -3719,7 +3719,7 @@ static bool trans_vfmv_s_f(DisasContext *s, arg_vfmv_= s_f *a) TCGLabel *over =3D gen_new_label(); =20 /* if vstart >=3D vl, skip vector register write back */ - tcg_gen_brcond_tl(TCG_COND_GEU, cpu_vstart, cpu_vl, over); + tcg_gen_brcond_i32(TCG_COND_GEU, cpu_vstart, cpu_vl, over); =20 /* NaN-box f[rs1] */ t1 =3D tcg_temp_new_i64(); @@ -3728,7 +3728,7 @@ static bool trans_vfmv_s_f(DisasContext *s, arg_vfmv_= s_f *a) vec_element_storei_tail(s, a->rd, t1); =20 gen_set_label(over); - tcg_gen_movi_tl(cpu_vstart, 0); + tcg_gen_movi_i32(cpu_vstart, 0); finalize_rvv_inst(s); return true; } @@ -3793,7 +3793,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a= ) \ \ fns[s->sew](dest, mask, src1, src2, tcg_env, desc); \ \ - tcg_gen_movi_tl(cpu_vstart, 0); \ + tcg_gen_movi_i32(cpu_vstart, 0); \ finalize_rvv_inst(s); \ \ return true; \ --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781604409; cv=none; d=zohomail.com; s=zohoarc; b=igj/ac+RR5lIOREMEJxgjEM2p7Og0PfkQFVs2+rZ35KNkxp02Q/8xVeZpTczjPa+JlEoONybrnWFXkww31AYhG53jZ5ApZ6NhPG1guu3Iy8y8EtYBCS0mvjQYzGGTVPKjfyo5Cp7jrjw6zP2HZEV7b5uYH3ZwgN3TVYsQfLMX3Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781604409; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DoVZEPR/9+nnh498alOrlfMaDgDYVh2sCOYh3fw4mdw=; b=B4cGOIS9Z//ZdfjKuq6gWPpkBJ7splEMmRth9ADwRij9HdDF6bWFRvy7yxkPJP54CqFoKHDcYku1UoM7VO2EVBM/7PgwoQCY+KnyAyI/6WFpfmiNtlQ+x3hIsFLBqMyJAd9vSUf8fkJXOFoHXfrpbzR6wAgFm54kftbwjvvtjko= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781604409929147.4691445096288; Tue, 16 Jun 2026 03:06:49 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQge-0005ih-QV; Tue, 16 Jun 2026 06:06:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgc-0005Zw-VA for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:26 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgb-00038F-6q for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:26 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c8629bed4e7so3071257a12.2 for ; Tue, 16 Jun 2026 03:06:24 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604384; x=1782209184; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DoVZEPR/9+nnh498alOrlfMaDgDYVh2sCOYh3fw4mdw=; b=hknb6PiiUtzQKUePRFtMTcorJvVT0gteoyKbK9ht3fKGe0LAzQrSGtGlPwIUOxv7BU XTw7YfbfNYAmhGHPRH/0JWyjKfjCBmq5axtu4zzqSQlbEUNoC7RS1JCoTlDdDaHaJO23 WOoBgn9OwTd4LnDKVeZxlhLMaYKrcStM4B2XHfrwPQz7xD7gfkOeVb/NmFTAYa0cRfNH ftWobAIPgi0EPYZzCLOPJsZgxeoF65SETK0OQ0VqGlJYjKgurc+jL0S0ESg0OnrAWSEL yGv5JzBBE76EZCvHAPuP9t+VU9iztaSZTEy3SY0h6qBh5qIL+UWSHIbj0z9Ss7LpTYny WnfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604384; x=1782209184; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=DoVZEPR/9+nnh498alOrlfMaDgDYVh2sCOYh3fw4mdw=; b=Co36V33ibBnMOHMvpfllD1M+vSpifaFQ1TaPPYCvrnwjmIu/pEtHtEi4idPXpT1VTV JPdkCg9kfLQ9NICFVS9MhKnnqbgArjzEs3UTtvOUKCZ42xbg7x+oqf4W9Nf31GkEY7oV +tK/ei+vx2upDgpr5vsqD2YBQVoZDuSemCbeVqO0FdYpy4EIJ9qpAj/sVSf6/Xgilooa ihgoZ+4badEIKZc1D1WcPvm1h+4DTnTxQpgziJLYim6zGWxXKwqgRWNSdk9u8Xujk7cN /Z+en0xsKk0icYcTRR3XywIN4og7wt6cvyjaX18pdFPWwlInfcffb41jfNczTXwsuwZL Pi1Q== X-Gm-Message-State: AOJu0Yw8SF6eK9LUQ9EX25T1O+b8CsSSVE4hba9ngf7BuwsTfifGA9ds MBIlCFFWIMi8HgaCcfsE89uBkYNMGrUedoO/CXy0yyhLtRgW58/oPzeYXceaYFLk X-Gm-Gg: Acq92OGbr3MfLyeZAWHyTW0kuKsFnaNfUwfLb7toOgznH89R59DX5loZlxbe/FcmfVZ nZ3Q78g4lL0quT3S6YefI4Lus95fkrgx/YO1vQKQICb7M7g3xoEYzB+6opc1SC4WWH0wOmfdgF8 yF+asIeQKAMZeLEtJBKXXYYxms95An2m3tawqptFblnIDyrphoWUYCXoBgHBWWzMVjmg4AVP+2E tEYlMCnS5AEw8UfyddAIOtYZejqx7bdikH7wBASyu/BsSW+2xOECwss4rqcfxgEophaaM0dXdhQ Og8Q56bBqnaFhCmd1nQN3aO6pKI+9yS1shsQIhbyjK9hZ5Cxz1yPVQJ+mxau2tZfXlWp2p8DLPj no8FxqZXEqk7O0O/lTJsNWqF/ZigAiv8WYWN3ictmxBAp7gvec0C8hxnqt8oAFCSbawPF6ooo9J 0o9tWB1cSg6HLQgl5ZOnys65OcAs54ru+aZJ+z42RaR2AulJ/WwiE= X-Received: by 2002:a05:6a21:1690:b0:3b4:b216:2b32 with SMTP id adf61e73a8af0-3b7e4740859mr3673910637.15.1781604383734; Tue, 16 Jun 2026 03:06:23 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 14/83] target/riscv: Fix size of pc, load_[val|res] Date: Tue, 16 Jun 2026 20:04:17 +1000 Message-ID: <20260616100527.1939565-15-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781604410424158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson Fix to 64 bits in size and as these are mapped to TCG globals, be careful with host endianness when allocating globals. Casts are added to logging expressions to retain the correct size for TARGET_RISCV32. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-4-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 6 +++--- target/riscv/cpu.c | 2 +- target/riscv/cpu_helper.c | 6 +++--- target/riscv/machine.c | 6 +++--- target/riscv/translate.c | 12 +++++++----- 5 files changed, 17 insertions(+), 15 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 981073021f..8f0e73b6b5 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -226,9 +226,9 @@ struct CPUArchState { uint8_t vxsat; bool vill; =20 - target_ulong pc; - target_ulong load_res; - target_ulong load_val; + uint64_t pc; + uint64_t load_res; + uint64_t load_val; =20 /* Floating-Point state */ uint64_t fpr[32]; /* assume both F and D extensions */ diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a57884dbc9..c0b6218421 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -585,7 +585,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,= int flags) qemu_fprintf(f, " %s %d\n", "V =3D ", env->virt_enabled); } #endif - qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc ", env->pc); + qemu_fprintf(f, " %s %" PRIx64 "\n", "pc ", env->pc); #ifndef CONFIG_USER_ONLY for (i =3D 0; i < ARRAY_SIZE(csr_ops); i++) { int csrno =3D i; diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index c3745cee19..f81354c90d 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -2373,9 +2373,9 @@ void riscv_cpu_do_interrupt(CPUState *cs) =20 qemu_log_mask(CPU_LOG_INT, "%s: hart:%"PRIu64", async:%d, cause:"TARGET_FMT_lx", " - "epc:0x"TARGET_FMT_lx", tval:0x"TARGET_FMT_lx", desc=3D%= s\n", - __func__, env->mhartid, async, cause, env->pc, tval, - riscv_cpu_get_trap_name(cause, async)); + "epc:0x%"PRIx64", tval:0x"TARGET_FMT_lx", desc=3D%s\n", + __func__, env->mhartid, async, cause, env->pc, + tval, riscv_cpu_get_trap_name(cause, async)); =20 mode =3D env->priv <=3D PRV_S && cause < 64 && (((deleg >> cause) & 1) || s_injected || vs_injected) ? PRV_S : PR= V_M; diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 45e13a0105..a0376c7564 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -453,9 +453,9 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT64_ARRAY(env.fpr, RISCVCPU, 32), VMSTATE_UINT8_ARRAY(env.miprio, RISCVCPU, 64), VMSTATE_UINT8_ARRAY(env.siprio, RISCVCPU, 64), - VMSTATE_UINTTL(env.pc, RISCVCPU), - VMSTATE_UINTTL(env.load_res, RISCVCPU), - VMSTATE_UINTTL(env.load_val, RISCVCPU), + VMSTATE_UINT64(env.pc, RISCVCPU), + VMSTATE_UINT64(env.load_res, RISCVCPU), + VMSTATE_UINT64(env.load_val, RISCVCPU), VMSTATE_UINTTL(env.frm, RISCVCPU), VMSTATE_UINTTL(env.badaddr, RISCVCPU), VMSTATE_UINTTL(env.guest_phys_fault_addr, RISCVCPU), diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 4a557b4907..b444fde3ef 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1484,6 +1484,10 @@ void riscv_translate_init(void) /* 32 bits in size, no offset needed */ size_t vl_offset =3D offsetof(CPURISCVState, vl); size_t vstart_offset =3D offsetof(CPURISCVState, vstart); + /* 64 bits in size mapped to TCGv, needs offset */ + size_t pc_offset =3D offsetof(CPURISCVState, pc) + field_offset; + size_t res_offset =3D offsetof(CPURISCVState, load_res) + field_off= set; + size_t val_offset =3D offsetof(CPURISCVState, load_val) + field_off= set; =20 for (i =3D 1; i < 32; i++) { cpu_gpr[i] =3D tcg_global_mem_new(tcg_env, @@ -1499,11 +1503,9 @@ void riscv_translate_init(void) offsetof(CPURISCVState, fpr[i]), riscv_fpr_regnames[i]); } =20 - cpu_pc =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, pc), "p= c"); + cpu_pc =3D tcg_global_mem_new(tcg_env, pc_offset, "pc"); cpu_vl =3D tcg_global_mem_new_i32(tcg_env, vl_offset, "vl"); cpu_vstart =3D tcg_global_mem_new_i32(tcg_env, vstart_offset, "vstart"= ); - load_res =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, load_= res), - "load_res"); - load_val =3D tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, load_= val), - "load_val"); + load_res =3D tcg_global_mem_new(tcg_env, res_offset, "load_res"); + load_val =3D tcg_global_mem_new(tcg_env, val_offset, "load_val"); } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605930; cv=none; d=zohomail.com; s=zohoarc; b=OUR+MGm6Cc1cla1ykf8QyGAaKG/uQ/wPyuyviA7yY1F8wO8hqPvdSyCVXW+WVOblgz1/zpo4UcfdLRi7wr08W8S0rYmATemdf8Vuau4EEGfpoeCDWPRcyNxW18nSyPv4O8MvDg+021fUsDIt9i82gH4iGQMRxxA/SdPTPLfAbB4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605930; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Lt59bHyZKYJMHUs0fyDqd5bA4aPiDp7GL+LqxWw11qc=; b=ORqb8tuZ0SQNuXq/a3XBeKdp/hbPjAJL/3yrE9HbCZAZdWclfm66V+uCbakC37Sd8oiBvLbSUVgHQk16UFWIQ6NoljMRAJ+nbh2fg74Hi2Y7YPoFgpW5c4GEvqX6Xy6yflG2s1sc1P9UYiqxNTj5aemDUDqh5JtyrUceK27haaM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160593052059.22842947107881; Tue, 16 Jun 2026 03:32:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgj-0006CU-Hp; Tue, 16 Jun 2026 06:06:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgh-0005xV-0T for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:31 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgf-0003Ar-2B for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:30 -0400 Received: by mail-pj1-x102e.google.com with SMTP id 98e67ed59e1d1-36d630c0e35so4252918a91.3 for ; Tue, 16 Jun 2026 03:06:28 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604387; x=1782209187; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Lt59bHyZKYJMHUs0fyDqd5bA4aPiDp7GL+LqxWw11qc=; b=TCI6YTjDycY2y8gcv3Yc8aHxq26VP2cr1NY7ItREw2953gkcBf/pJAilR9+e0lW9Rh Syi5vLBjXoc6vtbx0H2id4efzRavWLCY9x3p88IZRF7ZGmNtO5/6Km/aOfPuSRZ+pHvw gZuWKcsnOhwmDhj2ezll1+uO1srTmIYUq19ec4EKZud4Q8ahC06a03VYTwyDh09UJxyl RwnjZe/VwPyTGOc6zUk/yoTcDTNOdkY4LZ4CsyAZJYzJ/hAbvvFFQIn+iMr15QLQ1Hp+ 2n6ls0lR40ArjblKIKh7zaxyW37AJOfqQEWWbh7qVDEPgZTUjiOc+2YomxxSAoNxKLoq PR6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604387; x=1782209187; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Lt59bHyZKYJMHUs0fyDqd5bA4aPiDp7GL+LqxWw11qc=; b=gb1jLM85I9mMHitpqr01nEact2Z9jQDBXgCrciuTqX7pw4/DberIeTmGPTRBRXxznb 5pINEWKodOak4V9+94+tWI3GkoaAqhNFLwlT/kBh0N8EoH9A+gXem+Baunkdz6Gv0uzr ImHCfemK5A2lK4zI1kvl+Gg66HDDAUzC9Jxw90ggyXR+msRafkHF7BnluqYLbuqbojMZ Mm1jCeQE/fKLANWFzLe9R+mHLxJxicVWP4TyTwzY3tiLxAMWmdkZ3q0pQg5WIKDYViri l/DIss6eJqgWb4qMd9yPdBQzt2uGtysTRxDC2hECDdbl3w3fD3EkOgFwlcOax5JHTMjC OIXg== X-Gm-Message-State: AOJu0Yza0fQ5sw5SXc7LwRDPQF00CapkUpulgmh/BDEPEBNxoZAHjMCU JebzPF5WAsy4OW4ExdQPLypI+lSzLsds+wlB+frnvOHnGyYJqnwwViIS/rbeEYpj X-Gm-Gg: Acq92OEcDDi52oZBy3Wsq6MqNjhbCY8/sYcBdVxDB5PsesNoWClCzaC7uOh3ccF62j+ k/+y8+UbnS+KhOmoyutKyvCPB8fx3gVop74OtHbUT5lQXj/im0cNu/zRW7FKVxazfXKpirBhKTx xYnklEMmgDeHgqgmHAI+ixIqMJgss2K960Brh+nz4Lb1T/4LmNsn76R0irEV3c2MoB4h0vCrR1s BJdDhaXN5sbm1UYFzMPG+r5UPNpujAKOZbE/TsFQn73yrlWrWNYxjyyJiiE3cTZo3IBxlf9L2ET 7jrGdTpu/TTF+NXIvFZijmlR+O5+JPIvTsa3ex0owVvpaVSuPX1Ojxgz7anaj0pKa9CyBzEnRvD QWcbggQmG+r562qpUwC1Lt/IhUJ12t0QOT/RZ1Km16DCH1jeV4hvGpIjc2qt97WBS/I+UMnBQMw j0CA7uO9Z3RH+952a3TLoIBo/pAq2Lu/H6eedV2TJI X-Received: by 2002:a17:90b:4ec8:b0:368:7c0f:ebf7 with SMTP id 98e67ed59e1d1-37c2bd06679mr15422428a91.16.1781604387398; Tue, 16 Jun 2026 03:06:27 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 15/83] target/riscv: Fix size of frm and fflags Date: Tue, 16 Jun 2026 20:04:18 +1000 Message-ID: <20260616100527.1939565-16-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605932269158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson According to version 20250508 of the unprivileged specification the frm field of fcsr is 3-bits in size, fix it to 8-bits. Similarly fflags is 5 bits, fix to 8. Uses of frm is restricted to uint8_t where sensible, helpers still need 32-bit arguments and the DisasContext field is kept as int to represent -1 for an unknown rm. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-5-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 6 +++--- target/riscv/csr.c | 4 ++++ target/riscv/fpu_helper.c | 10 +++++----- target/riscv/machine.c | 2 +- target/riscv/translate.c | 4 ++-- 5 files changed, 15 insertions(+), 11 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 8f0e73b6b5..6692bff456 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -232,7 +232,7 @@ struct CPUArchState { =20 /* Floating-Point state */ uint64_t fpr[32]; /* assume both F and D extensions */ - target_ulong frm; + uint8_t frm; float_status fp_status; =20 target_ulong badaddr; @@ -667,8 +667,8 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *en= v, RISCVException exception, uintptr_t pc); =20 -target_ulong riscv_cpu_get_fflags(CPURISCVState *env); -void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong); +uint8_t riscv_cpu_get_fflags(CPURISCVState *env); +void riscv_cpu_set_fflags(CPURISCVState *env, uint8_t); =20 #ifndef CONFIG_USER_ONLY void cpu_set_exception_base(int vp_index, target_ulong address); diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 2e81221b1d..8c2dcbeca4 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -918,6 +918,10 @@ static RISCVException write_frm(CPURISCVState *env, in= t csrno, static RISCVException read_fcsr(CPURISCVState *env, int csrno, target_ulong *val) { + /* + * This is an 8-bit operation, fflags make up the lower 5 bits and + * frm the upper 3 bits of fcsr. + */ *val =3D (riscv_cpu_get_fflags(env) << FSR_AEXC_SHIFT) | (env->frm << FSR_RD_SHIFT); return RISCV_EXCP_NONE; diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index af40561b31..e6d1ffb1d6 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -23,10 +23,10 @@ #include "fpu/softfloat.h" #include "internals.h" =20 -target_ulong riscv_cpu_get_fflags(CPURISCVState *env) +uint8_t riscv_cpu_get_fflags(CPURISCVState *env) { int soft =3D get_float_exception_flags(&env->fp_status); - target_ulong hard =3D 0; + uint8_t hard =3D 0; =20 hard |=3D (soft & float_flag_inexact) ? FPEXC_NX : 0; hard |=3D (soft & float_flag_underflow) ? FPEXC_UF : 0; @@ -37,7 +37,7 @@ target_ulong riscv_cpu_get_fflags(CPURISCVState *env) return hard; } =20 -void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong hard) +void riscv_cpu_set_fflags(CPURISCVState *env, uint8_t hard) { int soft =3D 0; =20 @@ -52,7 +52,7 @@ void riscv_cpu_set_fflags(CPURISCVState *env, target_ulon= g hard) =20 void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm) { - int softrm; + FloatRoundMode softrm; =20 if (rm =3D=3D RISCV_FRM_DYN) { rm =3D env->frm; @@ -82,7 +82,7 @@ void helper_set_rounding_mode(CPURISCVState *env, uint32_= t rm) =20 void helper_set_rounding_mode_chkfrm(CPURISCVState *env, uint32_t rm) { - int softrm; + FloatRoundMode softrm; =20 /* Always validate frm, even if rm !=3D DYN. */ if (unlikely(env->frm >=3D 5)) { diff --git a/target/riscv/machine.c b/target/riscv/machine.c index a0376c7564..5c692e0fe6 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -456,7 +456,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT64(env.pc, RISCVCPU), VMSTATE_UINT64(env.load_res, RISCVCPU), VMSTATE_UINT64(env.load_val, RISCVCPU), - VMSTATE_UINTTL(env.frm, RISCVCPU), + VMSTATE_UINT8(env.frm, RISCVCPU), VMSTATE_UINTTL(env.badaddr, RISCVCPU), VMSTATE_UINTTL(env.guest_phys_fault_addr, RISCVCPU), VMSTATE_UINTTL(env.priv_ver, RISCVCPU), diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b444fde3ef..7c23996271 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -753,7 +753,7 @@ static void finalize_rvv_inst(DisasContext *ctx) ctx->vstart_eq_zero =3D true; } =20 -static void gen_set_rm(DisasContext *ctx, int rm) +static void gen_set_rm(DisasContext *ctx, uint8_t rm) { if (ctx->frm =3D=3D rm) { return; @@ -770,7 +770,7 @@ static void gen_set_rm(DisasContext *ctx, int rm) gen_helper_set_rounding_mode(tcg_env, tcg_constant_i32(rm)); } =20 -static void gen_set_rm_chkfrm(DisasContext *ctx, int rm) +static void gen_set_rm_chkfrm(DisasContext *ctx, uint8_t rm) { if (ctx->frm =3D=3D rm && ctx->frm_valid) { return; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781604414; cv=none; d=zohomail.com; s=zohoarc; b=Syiq8CHesyDex0St4g3bfMph0hP5yqzntU130efNd7aJlgSjBaIdKvmLgqU2Y0h0fW6yDTuYWMwQ9o1yHkA63Lrj0Da7mn4Kkf+YU8msLiJVs89zczx2FhxQoGYWCUql3s/DkFFzdZeawYi7pdUnn6Nf1fNU5Xe9v9xvYr2fPs8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781604414; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=mKjw3Caa8EWbAlus8Dj+hIcL/xWzcqCPd2ngBCbDbuE=; b=PZyzGspi7OHhbnOGX3k09KdjmOkYxnhDjOWNg29B2ZMz2x773dUdqfedvzfjwnkXbmo9DHkC/cQnROs2y14k0pqPV1ljzrdNaRExLIHmVU8VVP763QJlCwmqv6qLHqVzePZYzpDR+puEspvOOaiHGeWLCvk1mS/JtI2Ixhj8qZA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160441459765.3375614610718; Tue, 16 Jun 2026 03:06:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgk-0006K9-Q6; Tue, 16 Jun 2026 06:06:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgj-0006Em-V5 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:33 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgi-0003BF-0z for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:33 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c8588f8fef3so1564749a12.0 for ; Tue, 16 Jun 2026 03:06:31 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604391; x=1782209191; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mKjw3Caa8EWbAlus8Dj+hIcL/xWzcqCPd2ngBCbDbuE=; b=ohxD/qEExUk97cMN72sCou9nSL6ThdoMNhX8ntJBvLbneP+/cgEhnZ9yo587Z4DcPu WkWyao+I2F/kow+fVLaqmISCfA10tvE/KxBbIFmRZ9h8e5m22mUKddcBrTmm6blUM/YQ wTZIeC9a9XLCWXboPxpBH+JTxr3oSQ3DVBE02ugpvqxa3nXSvhb42ubvHTZYLDKp1WBS imGl56yPCy/8FqhLjjltCP8aCBaGCR2XnnoHaVFSXqi3udaRy6kEYlr/91I6iKB41MRD WFqPOkyH+ffBTuvMJGlX+GbflKiOfqxaW7QMYzgJZ/uDg2yBRPkjEo+yMxOdoYgya+n0 HDzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604391; x=1782209191; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mKjw3Caa8EWbAlus8Dj+hIcL/xWzcqCPd2ngBCbDbuE=; b=c1ucwO4DfM8tdRJLNxhgMvN10w7PyIZXQkTzq4jKThXIeWa/nISrndNRNg1/nVpH4o jeWjNdd7phl3eNWdmb4T6p2FECutDCMjKHFSnHHmrbg/3EGsRCaMnBTbd9lgsdpZaWBA nNexpf0XkNFb4yW69rxryXact9JzfYrPVNaMNXh2bbJvN6wm7D169R0/l1ZNIXI1Dnsr LVn6vzaT5WgAz80WSLjURiI8s16C6OBVIyBEzRh+swCuiPefAueMuiwtSpiB0cZ21JOJ UL7J2SnmWN+8LSNEo+dBaVeV2uIULyesSNPTg7CrK4IrKM2/WZoFLEFgeHJoH6ARUiRP N+xg== X-Gm-Message-State: AOJu0YwnlcEN8t1nyNrWhKPhktpUlZ+FDCUrJb3xkLOOZQnuLE7McoZw hGiMri7HbDVcbzMj4rPrHec9Od/Y2I83lMVbyMsFNBrX0EemW86x+d0iNH4BJE4h X-Gm-Gg: Acq92OFzL5pCLzjR4nEcxF5r2hLQnffXdqVqyTm1JWbDxpC7b5a4wtAAaaEItIT6YHz OMW5O50IAXvFDoazT+Nuz6Fldhwc9jWtd0IQyUkgHgopFTlmeGmv59fiOs2hRrXfDE37xiknHTo 2ZjwJbk1Fx3od1DRIBfkoJG9N23ZQv3aXqEvOPqNllvQyFJrZGKAoqQfm4U1X/aycmXndKNrK9z B3ktQk1cTc+bsoRb99nokDsDI8K0Dx1UDKJCo4dr9XHMB0py4DiIHgpET3lY0IiyvIW7cVHp+5b 61CExHCw13mSepR41dOAIXR6TmjTmoUvcnm8ap95p5S5sPaIPcuP5zCmYNi+eANY2StjY0oKUNV RvOInFpIMfomOMoM5ZdhM71TE+ypi6OQCiPfnrh2M4A7LZGxZuYPuChdCxF3QXF//FVxGQU1S53 xxKx+Cq5uuCHs/ydRmi+yemD06uZH8My/aK2mubKM3 X-Received: by 2002:a05:6a20:ce46:b0:3b4:8aad:6337 with SMTP id adf61e73a8af0-3b7e49b8c55mr3424674637.15.1781604390684; Tue, 16 Jun 2026 03:06:30 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 16/83] target/riscv: Fix size of badaddr and bins Date: Tue, 16 Jun 2026 20:04:19 +1000 Message-ID: <20260616100527.1939565-17-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781604416419158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson Fix these fields to 64 bits as they cannot be made smaller. Also make sure stores to these fields from TCG are 64 bits in size to avoid incorrect values on big endian hosts. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-6-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 4 ++-- target/riscv/machine.c | 2 +- target/riscv/translate.c | 6 ++++-- target/riscv/insn_trans/trans_privileged.c.inc | 2 +- 4 files changed, 8 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 6692bff456..2cc1b68f34 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -235,8 +235,8 @@ struct CPUArchState { uint8_t frm; float_status fp_status; =20 - target_ulong badaddr; - target_ulong bins; + uint64_t badaddr; + uint64_t bins; =20 target_ulong guest_phys_fault_addr; =20 diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 5c692e0fe6..b7790c14d0 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -457,7 +457,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT64(env.load_res, RISCVCPU), VMSTATE_UINT64(env.load_val, RISCVCPU), VMSTATE_UINT8(env.frm, RISCVCPU), - VMSTATE_UINTTL(env.badaddr, RISCVCPU), + VMSTATE_UINT64(env.badaddr, RISCVCPU), VMSTATE_UINTTL(env.guest_phys_fault_addr, RISCVCPU), VMSTATE_UINTTL(env.priv_ver, RISCVCPU), VMSTATE_UINTTL(env.vext_ver, RISCVCPU), diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 7c23996271..1ea7faea4c 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -273,7 +273,7 @@ static void generate_exception(DisasContext *ctx, RISCV= Exception excp) =20 static void gen_exception_illegal(DisasContext *ctx) { - tcg_gen_st_i32(tcg_constant_i32(ctx->opcode), tcg_env, + tcg_gen_st_i64(tcg_constant_i64(ctx->opcode), tcg_env, offsetof(CPURISCVState, bins)); if (ctx->virt_inst_excp) { generate_exception(ctx, RISCV_EXCP_VIRT_INSTRUCTION_FAULT); @@ -284,7 +284,9 @@ static void gen_exception_illegal(DisasContext *ctx) =20 static void gen_exception_inst_addr_mis(DisasContext *ctx, TCGv target) { - tcg_gen_st_tl(target, tcg_env, offsetof(CPURISCVState, badaddr)); + TCGv_i64 ext =3D tcg_temp_new_i64(); + tcg_gen_extu_tl_i64(ext, target); + tcg_gen_st_i64(ext, tcg_env, offsetof(CPURISCVState, badaddr)); generate_exception(ctx, RISCV_EXCP_INST_ADDR_MIS); } =20 diff --git a/target/riscv/insn_trans/trans_privileged.c.inc b/target/riscv/= insn_trans/trans_privileged.c.inc index 8a62b4cfcd..a8eaccef67 100644 --- a/target/riscv/insn_trans/trans_privileged.c.inc +++ b/target/riscv/insn_trans/trans_privileged.c.inc @@ -68,7 +68,7 @@ static bool trans_ebreak(DisasContext *ctx, arg_ebreak *a) if (pre =3D=3D 0x01f01013 && ebreak =3D=3D 0x00100073 && post =3D=3D 0= x40705013) { generate_exception(ctx, RISCV_EXCP_SEMIHOST); } else { - tcg_gen_st_tl(tcg_constant_tl(ebreak_addr), tcg_env, + tcg_gen_st_i64(tcg_constant_i64(ebreak_addr), tcg_env, offsetof(CPURISCVState, badaddr)); generate_exception(ctx, RISCV_EXCP_BREAKPOINT); } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781608854; cv=none; d=zohomail.com; s=zohoarc; b=BfT1gVm0P1rhusdd9MAOBDSlCJM+M9BAzdXauDlxV9HrPS6zvL8KVnxNIbP8aMT9s5hUoP7JuB53ohLSzB+WBmeI8Bs1RQKtNgWarQGHM/NsCdoXE9Jy3ljflu7k7+ghGXRVMUuYZt8RaRzc8atCp5VMVWZHtNy6tMrRXllIfJQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781608854; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=bS5R3RsGVTQdordSW0UVUW5jFQW+AZvEdBGjeszpt5o=; b=h+4y6HabwNn3xkWLtXHuZqwjiJSl9ntLpEc/PvyH9cepunFRxY9zcsC4mkm3yTriHND5o6KE65A85og+Zn/RMECX8Tgq5h2xvw9dZltt48VD/G/iIhX+nLc8KjHGGSemVlmn9P3wfw149rctdnY5FkawHy9isXq9VgI+qJjZGxI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781608854247495.1615043523109; Tue, 16 Jun 2026 04:20:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgo-0006jr-8O; Tue, 16 Jun 2026 06:06:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgn-0006b4-3N for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:37 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgl-0003Cp-BL for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:36 -0400 Received: by mail-pg1-x529.google.com with SMTP id 41be03b00d2f7-c855599a77aso2142283a12.0 for ; Tue, 16 Jun 2026 03:06:34 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604394; x=1782209194; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bS5R3RsGVTQdordSW0UVUW5jFQW+AZvEdBGjeszpt5o=; b=XxPMaE+PE6ww/GI7yaeY85DscjbDCsrPTAE+icOYOGRqrDAfMNtTecmakHRGg7Nj8E ERiTse2sVFJuFxczhhSsZEZixCLX7BIm/n74hLAkSOwN+LaNVk4GutchFGvACKHObxse pGHLmvukCcAjZG5PnG8aVsk7egYNYi6N6euv39TjmZ8+Gch8hkq4/1Kr3YQ4KQ1WIfkE 7mSn+o0odUN1DHmuTF8ISq+KPJpV2omGj6Y/LMpeMn05EkI5JUGgveSB6glqo9je6mdK HaGAg+xMwh0WqHyrtgDvOGCi394YUjCdOR3y3gRsMat5m7uDC7Z6E2ZWQEHfKed9FLPn rOqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604394; x=1782209194; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=bS5R3RsGVTQdordSW0UVUW5jFQW+AZvEdBGjeszpt5o=; b=hbYQiyw2nXM631FYg0/mChdzSFPE34qI4yTQufsN3xQU7bdrOfd4ZyqE2UdhDhwdNf QHkulwk4Lb6g1EiLfq9I3XgM79k9geuxqZZkJC2CvdUjqWY4u+OwlT9Bt/f8jux+SyMw 4XINGrztgnZqb7a8FKV3wvMA/mWwu6VXevSwQrpQjc9hlj5hyPrHSIqhM04OGl1Qppyv HDI40t1o5ZmIEH28P3mGhKQS9vXQkE9ySmfSC30I2qPebVt9tVKmSGMVR7zTQTvTcv39 q+piE/TvMovHiB972/wZfxhl2lyGDUUSq+yoFuWzk9O3zyfVcJJ8G3xrPjLdISnEgcNK 94Rw== X-Gm-Message-State: AOJu0YyoefgjGqRbRe1zIr9Ml9CX3k/yHPIb2T/yNxtjwvje1PCOs15T xFM+eg6pjAxr+1I1+UELVQfDMbhl7RyvpGMiyR694AYpntw6Uxx4jCrHfZPkLlhb X-Gm-Gg: Acq92OF9ZM9DdGRikmtwiFHIAEFOeihNB1yALXB9BaFscNhnNB0Vji3sqyLyEYrqivZ 67PAYGQmrZ93VZ/xJOn1oGWHW7S05iCbZJbjWCZw6z2AyUr/K9jghvBAEPai1J4Ibd6s73nH2YC 1P8EEfI1FQNfO52lwVwezoceh5ax1YPDAGf20F1JqQzvQZzGCDnSGQT/abM3XdlHxPOV8zBRl+1 B9hGFVUWExl7WZfzIKj84dw+ptO1LOU81UkWotmTeAxzfB/AToHyZhOAcIGq1ClnEWtG75SOApb PIHCsMgH6nLKHxm/13nmJXJ2EnzJA0snYaqwAKvc32R7YeIBuHpxZbvdBO2JhgmztBaK7ccPwOH Wbj1EjR8PqfuIP5s0TAVWfDAu03DLqPefESkaIFe0xLSARDmnP4CEkwF/tITe8n3jzfaLBw8eDK cypOwWT/4IM7/UgvUbvTOdF2+3bEw7vDRzpZYSsopj X-Received: by 2002:a05:6a21:b94:b0:3b3:216b:274c with SMTP id adf61e73a8af0-3b7e4cffefemr3336350637.22.1781604394056; Tue, 16 Jun 2026 03:06:34 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 17/83] target/riscv: Fix size of guest_phys_fault_addr Date: Tue, 16 Jun 2026 20:04:20 +1000 Message-ID: <20260616100527.1939565-18-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=alistair23@gmail.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781608855801158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson Widen to 64 bits, and use hwaddr as argument to get_physical_address(). Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-7-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/cpu_helper.c | 3 +-- target/riscv/machine.c | 2 +- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 2cc1b68f34..50f9ce1f86 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -238,7 +238,7 @@ struct CPUArchState { uint64_t badaddr; uint64_t bins; =20 - target_ulong guest_phys_fault_addr; + uint64_t guest_phys_fault_addr; =20 target_ulong priv_ver; target_ulong vext_ver; diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index f81354c90d..a25727b0da 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1236,7 +1236,7 @@ static bool check_svukte_addr(CPURISCVState *env, vad= dr addr) */ static int get_physical_address(CPURISCVState *env, hwaddr *physical, int *ret_prot, vaddr addr, - target_ulong *fault_pte_addr, + hwaddr *fault_pte_addr, int access_type, int mmu_idx, bool first_stage, bool two_stage, bool is_debug, bool is_probe) @@ -1876,7 +1876,6 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, = int size, ret =3D get_physical_address(env, &pa, &prot, address, &env->guest_phys_fault_addr, access_typ= e, mmu_idx, true, true, false, probe); - /* * A G-stage exception may be triggered during two state lookup. * And the env->guest_phys_fault_addr has already been set in diff --git a/target/riscv/machine.c b/target/riscv/machine.c index b7790c14d0..a4d337c27a 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -458,7 +458,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT64(env.load_val, RISCVCPU), VMSTATE_UINT8(env.frm, RISCVCPU), VMSTATE_UINT64(env.badaddr, RISCVCPU), - VMSTATE_UINTTL(env.guest_phys_fault_addr, RISCVCPU), + VMSTATE_UINT64(env.guest_phys_fault_addr, RISCVCPU), VMSTATE_UINTTL(env.priv_ver, RISCVCPU), VMSTATE_UINTTL(env.vext_ver, RISCVCPU), VMSTATE_UINT32(env.misa_mxl, RISCVCPU), --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781604419; cv=none; d=zohomail.com; s=zohoarc; b=IVzTn+LTOfbBaY/VEvG3JgQBKlMBjud70+kEOOUruA4RteMPIgTKeMCeRYb7l7OaIIyXmNTqrSdoKWH2Ptebw5KsyIoqnKafKDdIRf7r4dgMzZ/m+0j7WZVz/Wu0WJqIb8LOyvYEGlQyPdzQ8bqyf9l+BBGqRtxa/FxWwbhsK3w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781604419; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=IPNd6SRZTVpSELxV3dLcc+YGY5aEYk44oCfhXn4GB7c=; b=Z1d1EF2tqmobZdcHodkCoonlBt1ypaJ74bPCXB8bsgv1q7yOOQG6hjjZtWruUDd72IA5PjgVQHFUUOtYM1ryXKZbjGyzLQ+MVKtDfUlpt3tARPVoamQ1bqlkEAZRAqFhC2RO/QO07uy2Ch+x/iKEM6d9OGUMo4ELRp+MOy4HdgQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781604419742167.26084134394807; Tue, 16 Jun 2026 03:06:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgs-00078q-CU; Tue, 16 Jun 2026 06:06:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgq-0006v1-Ae for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:40 -0400 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgo-0003DG-Ky for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:39 -0400 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-c85b2139015so1408343a12.2 for ; Tue, 16 Jun 2026 03:06:38 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604397; x=1782209197; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IPNd6SRZTVpSELxV3dLcc+YGY5aEYk44oCfhXn4GB7c=; b=IQH7y4HmM79cYbTZkEfyKIK1usfCOROgDZhs5whSV/JiaHfjeU88VMLNuLhXlCrWJ0 NXmLNoSm5lvBHkxnu+PT08X0lB9kU2DT5YeI+DU+RA6GCvS9pfzfvkljkH4f3nL1Blqx +6YQmRX/Ca/qkkyTo3uVxUo/shWJztZGhSph+jJ1c31UbyYbu5yw9avlbkeMjuYWQWAP SmXUN+qgBpYb/rh3e1Vi+rJ3um28M8Kd30ua0tcfuivexXf4NkqoyMD52OAUWoQ2F/kG 3WsJge9r1K2yad3+2Lk5N8FcRJaovbKnETCVewx9iN1nG5LH8Zxfvj7cDHJIe+mvzFnH KOpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604397; x=1782209197; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=IPNd6SRZTVpSELxV3dLcc+YGY5aEYk44oCfhXn4GB7c=; b=RHjmokx0pcO0bWzxHm1V9hUAJ9tvZWYPayD3g20S31ktjRAFu9dCy9se5FSKolwN+9 3Ay++an3WpWPC5LaKllMvVtazQhmUJONwzylwvjx9Zg63+EJo1xZLT+GHAfPyoRo4147 IwJwdn7XpXoTPmoEg/YPGWgm3f4l/1ctC9+NgvmZakkzRe/fyT1ONcmm7vt5fTu6r7GU aFunbCRGQQlTU/mC/M9S1IXMqdTX772+1yWHBaOJMf/yVNSu41aZN5O8bwJAH9saaaJc 6nh/FKcTnN//fecY/TEz6p2PQN4bOTbktBtlWhSDWljnE3GhX96voRLWZjvET1vaj4bj zkhQ== X-Gm-Message-State: AOJu0YzaWyE+frhSkY5vBJGdcznxTt/o48JgPWmjEbZELBsbNEh0ssY2 iqDsnUK90jrQ0JVqIqt06ubVq4WzgxYyDGzEyzvFcZc5oqS5Mxfr657QY1AdZoiB X-Gm-Gg: Acq92OEmqHk9IJov37TLrrV06kYc5f/+GIj+e4eVeEgd1vNz+DtYqY9FzOWG5Zglzyt 5hpwc+S7qNBztZjU1us+eFiH3RxW+1PEk6U5DTUtGyTfAGwJ3MFQ8AU5Rv5xv8yyhwKRz3i4MCq J8mgkWEZVfHcZ65R+NfxG9KkX5anE6uhbjngR/3l7N/X2K65fdnhEqD7FPK0ixdfVuLdM2CJcSP yrYqc/OGchQHa4FV7fT02zN4AJcHIFzlvYuBX5rT+34fLNqBmS79uYDJt4tGcI4ePSuKWGjhI4q 5MxSAS8nPjU2YMI6MiNoHGKRXZJG6h4ofOSgTO4yqJp2O+XiQzLLMPCSUxmfhaipGnXYS88+71g lvPipDodfuaImomLsCP3EgSAfGgRd7wZ9XUlSHAVReIByuO9e3UzSinkseoR6tchqte/dtJnTz4 YilGxv2cf4tkKyavaHS6QVMTkYN6ZwOBfo/WQWnsiv X-Received: by 2002:a05:6a20:2443:b0:3b4:813d:dc1 with SMTP id adf61e73a8af0-3b7e49c16eemr3372376637.31.1781604397219; Tue, 16 Jun 2026 03:06:37 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 18/83] target/riscv: Fix size of priv_ver and vext_ver Date: Tue, 16 Jun 2026 20:04:21 +1000 Message-ID: <20260616100527.1939565-19-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781604420572158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson Fix these fields to 32 bits, also update corresponding priv_ver field in DisasContext as well as function arguments. 32 bits was chosen since it's large enough to fit all stored values and int/int32_t is used in RISCVCPUDef and a few functions. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-8-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 6 +++--- target/riscv/machine.c | 4 ++-- target/riscv/translate.c | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 50f9ce1f86..5336344cba 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -240,8 +240,8 @@ struct CPUArchState { =20 uint64_t guest_phys_fault_addr; =20 - target_ulong priv_ver; - target_ulong vext_ver; + uint32_t priv_ver; + uint32_t vext_ver; =20 /* RISCVMXL, but uint32_t for vmstate migration */ uint32_t misa_mxl; /* current mxl */ @@ -846,7 +846,7 @@ bool riscv_cpu_eff_priv(CPURISCVState *env, int *priv, = bool *virt) } =20 static inline bool riscv_cpu_allow_16bit_insn(const RISCVCPUConfig *cfg, - target_long priv_ver, + uint32_t priv_ver, uint32_t misa_ext) { /* In priv spec version 1.12 or newer, C always implies Zca */ diff --git a/target/riscv/machine.c b/target/riscv/machine.c index a4d337c27a..b6a85ccd3e 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -459,8 +459,8 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT8(env.frm, RISCVCPU), VMSTATE_UINT64(env.badaddr, RISCVCPU), VMSTATE_UINT64(env.guest_phys_fault_addr, RISCVCPU), - VMSTATE_UINTTL(env.priv_ver, RISCVCPU), - VMSTATE_UINTTL(env.vext_ver, RISCVCPU), + VMSTATE_UINT32(env.priv_ver, RISCVCPU), + VMSTATE_UINT32(env.vext_ver, RISCVCPU), VMSTATE_UINT32(env.misa_mxl, RISCVCPU), VMSTATE_UINT32(env.misa_ext, RISCVCPU), VMSTATE_UNUSED(4), diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 1ea7faea4c..18a1e0ae99 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -59,7 +59,7 @@ typedef struct DisasContext { DisasContextBase base; target_ulong cur_insn_len; target_ulong pc_save; - target_ulong priv_ver; + uint32_t priv_ver; RISCVMXL misa_mxl_max; RISCVMXL xl; RISCVMXL address_xl; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606289; cv=none; d=zohomail.com; s=zohoarc; b=gM1QQ8k526zS5BNHy21Wh4odtdTpSHggmIWPMCnLq2QN5J7LhNbzfvQ8NmUDOvivfQebNudM6dCjG8EwQfpAE75N+b1fyG5sTJ40qZnQpGJSRwv29QWwOkXPr3HIpDcvvxNnVhks4Iv3dlUdcYKYsaHuqMNXpgW+Wkzq2cDU1rQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606289; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8oiSn8O3FBvzdVJGDR7fJW81Sm/kT5OP34oodmyNA8w=; b=ZlvWz2IHaJpEeksOIRsttyrEnq5AekNKjqeYN/K8kPeZrL8mhNOLxGrmJvj/WFd3XAXON2FJR0tB+yoXep5q9TqU8iZf5wA/WdoCOI/PVIkc4hrN3viVCNKTC6lcC1pMNNMJnSYqpHiHBYgf8RCquRQ6BzZ38dMBD1cHnYCT5C0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606289124387.8988877380883; Tue, 16 Jun 2026 03:38:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgw-0007EQ-9l; Tue, 16 Jun 2026 06:06:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgu-0007Dt-Gd for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:44 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgs-0003Di-L7 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:44 -0400 Received: by mail-pg1-x529.google.com with SMTP id 41be03b00d2f7-c85a2c012e5so1466456a12.1 for ; Tue, 16 Jun 2026 03:06:42 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604401; x=1782209201; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8oiSn8O3FBvzdVJGDR7fJW81Sm/kT5OP34oodmyNA8w=; b=U9+Gfu6oJqwpBaiyqG+3rfuVwziE5uUFRPccIKwDhaewlgZKgwumk4nXV0V8580SKH PBcxxEWhoJB7tnwQhNeyWKRHGzGrwlflUKwLafw0F2xk6dnU8X8zl3JkQ0fu5DIuO+7i WYUyFGiuX09gGw84SK8X2Ahrpxld42D67ArXnw8wkE3ZAhbos4ku53zTtfZYtRtnl3BR HepbXBkFyJjjBHXHh2r5++tWmb7wqlhVLtFPyrBed/nicjM9zWDurZncMr1AFir9M4OW IKIgqV1IZ+OR2t8Qr/YEliGq9C8BN/UUVrDMK0YOXMGfVsiLscsE9rS15mCmTIs6dm9j 8OWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604401; x=1782209201; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=8oiSn8O3FBvzdVJGDR7fJW81Sm/kT5OP34oodmyNA8w=; b=Wuw5CWY/nCpc627oE6cY+Zd/GAwMly4ydIpfeHwCzGRAeHehCiHatcmQqFApx/MGzB rHah+wmNlLyoir/l4QoCt2MaiEC7eTY0ADXnoXJ+OoWNArOjIB/pTq3uPXaf5Yk0HPF5 dVW6Z1yIenmjXzAQtQQIdXbF1lC3RXbEY0bwsfR83yfNuokqdYEzGUTmH1uNVSb5P7iq HocYdSnNxDwhBG32P3zi+X+ndnwwTvo+K7ksC5BtTTsF6R2OoM5ct+nvGUt/2hqFAH7I TtpuXzmTQT1W7HF4NEvzwUSoi4pVXYjWXljEMnHZs01SSfx2nYSclDT/GidezoxLdcGI t55Q== X-Gm-Message-State: AOJu0Yxx4ltG/dKDUcFSdK1n0NBLFsiGJRaj3lMdXHcI4ciUtFucXFQK QpRybhnumbDrEP5gWRitd14VJCBsN76GMVpWopJJUQv0VXMdD5L9yPcMCP2E60iQ X-Gm-Gg: Acq92OHnq3Awp8ba4hMMgvcLeDLWfmXoQW2B3GZnoH4wMWuVx2X9oCoU1bS8JFZ0DWI OzBF6vh9m2MZ07CgU/gyfB9qCOoi+81/cvRZDu8BeQ1BSSKheXsuTRNc0lnH6C255PgtK3B82Jc Wvwa4q9J7GqxcMr+yqNVGoM9Ekbc10x5oCGlrANoQTkbFziHwcAe1T14dTbfrmqZTjguFvK4M9N c32KpYNLYSoUTAj1cf0tEs0rzqtle9BA5q+Nn4Lv/KpDG5JyortwBaUoClmXE/WzpG9WQbLC2fh fhSfLKFgi9sJLR59fmeWfAfxWtL5rJXfW3D1/uo0jDF0JHz/et+0/1vjR0RRhDCqBuFc4qeGPBe 1SGY3B+R9JnqIX4zJ96MybthRodseURXfSxfQIaRpk4lkd85BCNg5geaeoz9S6I0d6m0Dfp5Q3E xeAXeIq+6y+cj3J/knbYfkwm0p7Z2+vOt1ZZY7GY67 X-Received: by 2002:a05:6a20:9f04:b0:3b3:1ee3:2794 with SMTP id adf61e73a8af0-3b7e4272829mr3493670637.5.1781604401282; Tue, 16 Jun 2026 03:06:41 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 19/83] target/riscv: Fix size of retxh Date: Tue, 16 Jun 2026 20:04:22 +1000 Message-ID: <20260616100527.1939565-20-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=alistair23@gmail.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606291320158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson 128-bit helpers only make sense for MXL_RV128, TARGET_RISCV64, and TCGv =3D=3D TCGv_i64, therefore fix retxh to 64 bits. For the sake of being pedandic, update 128-bit instructions to access retxh via 64 bit TCG ops, even if they only make sense when TCGv =3D=3D TCGv_i64. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-9-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/insn_trans/trans_rvi.c.inc | 8 ++++++-- target/riscv/insn_trans/trans_rvm.c.inc | 16 ++++++++++++---- 3 files changed, 19 insertions(+), 7 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 5336344cba..0a684f146f 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -250,7 +250,7 @@ struct CPUArchState { uint32_t xl; /* current xlen */ =20 /* 128-bit helpers upper part return value */ - target_ulong retxh; + uint64_t retxh; =20 uint64_t jvt; =20 diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_tr= ans/trans_rvi.c.inc index 2c82ae41a7..ff450d46f8 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -1030,10 +1030,12 @@ static bool do_csrr_i128(DisasContext *ctx, int rd,= int rc) TCGv destl =3D dest_gpr(ctx, rd); TCGv desth =3D dest_gprh(ctx, rd); TCGv_i32 csr =3D tcg_constant_i32(rc); + TCGv_i64 wide_desth =3D tcg_temp_new_i64(); =20 translator_io_start(&ctx->base); gen_helper_csrr_i128(destl, tcg_env, csr); - tcg_gen_ld_tl(desth, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_ld_i64(wide_desth, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_trunc_i64_tl(desth, wide_desth); gen_set_gpr128(ctx, rd, destl, desth); return do_csr_post(ctx); } @@ -1053,10 +1055,12 @@ static bool do_csrrw_i128(DisasContext *ctx, int rd= , int rc, TCGv destl =3D dest_gpr(ctx, rd); TCGv desth =3D dest_gprh(ctx, rd); TCGv_i32 csr =3D tcg_constant_i32(rc); + TCGv_i64 wide_desth =3D tcg_temp_new_i64(); =20 translator_io_start(&ctx->base); gen_helper_csrrw_i128(destl, tcg_env, csr, srcl, srch, maskl, maskh); - tcg_gen_ld_tl(desth, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_ld_i64(wide_desth, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_trunc_i64_tl(desth, wide_desth); gen_set_gpr128(ctx, rd, destl, desth); return do_csr_post(ctx); } diff --git a/target/riscv/insn_trans/trans_rvm.c.inc b/target/riscv/insn_tr= ans/trans_rvm.c.inc index 795f0ccf14..0e2da5bed2 100644 --- a/target/riscv/insn_trans/trans_rvm.c.inc +++ b/target/riscv/insn_trans/trans_rvm.c.inc @@ -169,8 +169,10 @@ static bool trans_mulhu(DisasContext *ctx, arg_mulhu *= a) static void gen_div_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { + TCGv_i64 wide_rdh =3D tcg_temp_new_i64(); gen_helper_divs_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_ld_i64(wide_rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_trunc_i64_tl(rdh, wide_rdh); } =20 static void gen_div(TCGv ret, TCGv source1, TCGv source2) @@ -212,8 +214,10 @@ static bool trans_div(DisasContext *ctx, arg_div *a) static void gen_divu_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { + TCGv_i64 wide_rdh =3D tcg_temp_new_i64(); gen_helper_divu_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_ld_i64(wide_rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_trunc_i64_tl(rdh, wide_rdh); } =20 static void gen_divu(TCGv ret, TCGv source1, TCGv source2) @@ -244,8 +248,10 @@ static bool trans_divu(DisasContext *ctx, arg_divu *a) static void gen_rem_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { + TCGv_i64 wide_rdh =3D tcg_temp_new_i64(); gen_helper_rems_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_ld_i64(wide_rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_trunc_i64_tl(rdh, wide_rdh); } =20 static void gen_rem(TCGv ret, TCGv source1, TCGv source2) @@ -289,8 +295,10 @@ static bool trans_rem(DisasContext *ctx, arg_rem *a) static void gen_remu_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { + TCGv_i64 wide_rdh =3D tcg_temp_new_i64(); gen_helper_remu_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_ld_i64(wide_rdh, tcg_env, offsetof(CPURISCVState, retxh)); + tcg_gen_trunc_i64_tl(rdh, wide_rdh); } =20 static void gen_remu(TCGv ret, TCGv source1, TCGv source2) --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605778; cv=none; d=zohomail.com; s=zohoarc; b=d2dMsTxKMiXqWrHY/zfCWlCQVPknBDLXhhBvZJNnkJ4vdwQUBklqQIj2YGaGDwEojSsqbW9VYyT8ycAidR+1E3ucUyJ3l4d8VLDnhHhGaqYWKbhfAU8tA/6M/Bjj016hHVt7pGVhAAlrT9HeSXnBi3m8gN7aWZoEy4Te1zxPBKI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605778; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ekSjvEGPuaoh/5V5BG4RKyBzz+gdt7oTF9LQS+JY8Tc=; b=l5f9EbGlXt98RRV4/AzhJYx6ZDg4pPNF0uECFYgyOT5zfxxA/JfPGNgwA10sg1DeDEkTkI2QUrUSfFXuT0X87KG105zDJLbQ/Hz5sGtTL45Pm2uYAUi7gI9vMBWGeAKZvOYQQ2mfip8atMY8VsPOj6jWyyZq153D6kFB+zVrxIU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605778835258.3839093838344; Tue, 16 Jun 2026 03:29:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQgz-0007KE-1h; Tue, 16 Jun 2026 06:06:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQgx-0007HK-NW for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:47 -0400 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgw-0003Dw-06 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:47 -0400 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-c858d69bde9so1712685a12.1 for ; Tue, 16 Jun 2026 03:06:45 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604404; x=1782209204; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ekSjvEGPuaoh/5V5BG4RKyBzz+gdt7oTF9LQS+JY8Tc=; b=r1uoNRMZmPaEulayUC/M7gdDIO9tUTpeN32QvUHBLyhFu4iQVRx+m/J9YRRVRlA7KB dD2yBYE+1iyAamkdic65kTVzBFgkqALXTRl3uOVPWwGygKcGBRUm3ViQSpPlCxIWdd2U nDr9wL2ZxNkSewFslgB2+twAh4hLNXrym0hCU+JWLvcyWhb1/lbPXAFiUgHLYfNWcxpq XOhc4jDdh8BN1Jeg1W8V06Jg11AhXyo4hNSiKU2B/ngjePmU38NHgNpE4CuzlW4iYYKb Zbw3F4YYKcxWw71BiDDuxCwv1xqwSAQqmssTPBxs3Q/jN4watcIMumKE6mpU96OuoVR/ O/8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604404; x=1782209204; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ekSjvEGPuaoh/5V5BG4RKyBzz+gdt7oTF9LQS+JY8Tc=; b=BJki6Osx90Es1Fh/AZrGl04PC2xMfyJEkKrHbCL36S7BCApRnYOFrPTZVTR6D9U+cM JwYE0cUG6cP/a5J1od3IPPhHEUUyyiEYegSu5s7AbFHKbXLHzfJyirbUTlNlGdtVcAM2 2vzbfo6joicOTbtg5Rkkk42Y3bDczv+ZFJQfUmWepL0oLtu9JXlaDrKyRXg6lEa0atF6 deolOVE6psuhNvHSusAe1fwONHXsmAw1aGmY8vIeQwSLv35aGvOWNvRADu4XCS3dE9lO 35vTJl7GV7ZmuRc2KM6Pkza4RtM7I85OLNnLEBp7CiFWZasAALsm0EPj4iBymBRZZ0NR qU4A== X-Gm-Message-State: AOJu0YxzVa0v/8PHuOCsAWEoLxSin1r6JYC2MN6MRQQONsrfj/EohzhK BkL+HlC1UaMFPzMcTmJVXYXcYw/6r7FWEhvb1OK62YpR0N1mSFNeZ48G+osYh2zb X-Gm-Gg: Acq92OEV5ePfVZ5hNGGqxB067G+wS6gKn4vxUT9Kr3tvgHrmiwEWQj1kxAQJkWzzM+G P7Jb3WhAMjEhjlniTvaJUxO4EZYSUPdfZZZsT7BUCPxZ2eXEQfivAP7II/CDZC0DoeX9AjZS9EX eBdw+wxH8fuOTQbCrtcoVC/+iNt1IjJ3VoHLhNAXm13EZKBS1suTVroK6Gbv+zKXx0IKMkeAu+U IImvXfMd8a8XbkGsdPLZTMj1g4mXONXpLwKUej4cOmFeeHOYdS32QLIlbtdA/jIRAUu761Lx10c Nd0+xwRDQQJY/qhJPTcmHOgoV/gz1SukKScQqiVS9IEqAZ+WGAp7Hu+mkXOit8rIjoWEdR+RUIa mfavUjz+XlUAKbbYeYLtLAbP4sV8btt3x9nR/fbWgTspTGiaLcUJziu6Lx2hS9xJIzKBuLDrN6s HtHuRlsw7Resnmn5AS5co8pgUrBs1ryyFcjHXSje1Q X-Received: by 2002:a05:6300:4049:b0:3b4:736b:da45 with SMTP id adf61e73a8af0-3b783fea080mr20816121637.31.1781604404543; Tue, 16 Jun 2026 03:06:44 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 20/83] target/riscv: Fix size of ssp Date: Tue, 16 Jun 2026 20:04:23 +1000 Message-ID: <20260616100527.1939565-21-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605781115158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson As ssp holds a pointer, fix to 64 bits in size and make sure stores from TCG use the correct size to avoid problems on big endian hosts. Note, the cpu/ssp VMSTATE version is bumped, breaking migration from older versions. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-10-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/machine.c | 6 +++--- target/riscv/insn_trans/trans_rvzicfiss.c.inc | 18 +++++++++++++----- 3 files changed, 17 insertions(+), 9 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0a684f146f..ae75f9f33f 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -257,7 +257,7 @@ struct CPUArchState { /* elp state for zicfilp extension */ bool elp; /* shadow stack register for zicfiss extension */ - target_ulong ssp; + uint64_t ssp; /* env place holder for extra word 2 during unwind */ target_ulong excp_uw2; /* sw check code for sw check exception */ diff --git a/target/riscv/machine.c b/target/riscv/machine.c index b6a85ccd3e..7ab62ebc82 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -391,11 +391,11 @@ static bool ssp_needed(void *opaque) =20 static const VMStateDescription vmstate_ssp =3D { .name =3D "cpu/ssp", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .needed =3D ssp_needed, .fields =3D (const VMStateField[]) { - VMSTATE_UINTTL(env.ssp, RISCVCPU), + VMSTATE_UINT64(env.ssp, RISCVCPU), VMSTATE_END_OF_LIST() } }; diff --git a/target/riscv/insn_trans/trans_rvzicfiss.c.inc b/target/riscv/i= nsn_trans/trans_rvzicfiss.c.inc index 0b6ad57965..40e5a1b7df 100644 --- a/target/riscv/insn_trans/trans_rvzicfiss.c.inc +++ b/target/riscv/insn_trans/trans_rvzicfiss.c.inc @@ -32,7 +32,9 @@ static bool trans_sspopchk(DisasContext *ctx, arg_sspopch= k *a) TCGLabel *skip =3D gen_new_label(); uint32_t tmp =3D (get_xl(ctx) =3D=3D MXL_RV64) ? 8 : 4; TCGv data =3D tcg_temp_new(); - tcg_gen_ld_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); + TCGv_i64 wide_addr =3D tcg_temp_new_i64(); + tcg_gen_ld_i64(wide_addr, tcg_env, offsetof(CPURISCVState, ssp)); + tcg_gen_trunc_i64_tl(addr, wide_addr); decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); tcg_gen_qemu_ld_tl(data, addr, SS_MMU_INDEX(ctx), mxl_memop(ctx) | MO_ALIGN); @@ -45,7 +47,8 @@ static bool trans_sspopchk(DisasContext *ctx, arg_sspopch= k *a) tcg_constant_i32(RISCV_EXCP_SW_CHECK)); gen_set_label(skip); tcg_gen_addi_tl(addr, addr, tmp); - tcg_gen_st_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); + tcg_gen_ext_tl_i64(wide_addr, addr); + tcg_gen_st_i64(wide_addr, tcg_env, offsetof(CPURISCVState, ssp)); =20 return true; } @@ -59,12 +62,15 @@ static bool trans_sspush(DisasContext *ctx, arg_sspush = *a) TCGv addr =3D tcg_temp_new(); int tmp =3D (get_xl(ctx) =3D=3D MXL_RV64) ? -8 : -4; TCGv data =3D get_gpr(ctx, a->rs2, EXT_NONE); + TCGv_i64 wide_addr =3D tcg_temp_new_i64(); decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); - tcg_gen_ld_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); + tcg_gen_ld_i64(wide_addr, tcg_env, offsetof(CPURISCVState, ssp)); + tcg_gen_trunc_i64_tl(addr, wide_addr); tcg_gen_addi_tl(addr, addr, tmp); tcg_gen_qemu_st_tl(data, addr, SS_MMU_INDEX(ctx), mxl_memop(ctx) | MO_ALIGN); - tcg_gen_st_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); + tcg_gen_ext_tl_i64(wide_addr, addr); + tcg_gen_st_i64(wide_addr, tcg_env, offsetof(CPURISCVState, ssp)); =20 return true; } @@ -76,7 +82,9 @@ static bool trans_ssrdp(DisasContext *ctx, arg_ssrdp *a) } =20 TCGv dest =3D dest_gpr(ctx, a->rd); - tcg_gen_ld_tl(dest, tcg_env, offsetof(CPURISCVState, ssp)); + TCGv_i64 wide_addr =3D tcg_temp_new_i64(); + tcg_gen_ld_i64(wide_addr, tcg_env, offsetof(CPURISCVState, ssp)); + tcg_gen_trunc_i64_tl(dest, wide_addr); gen_set_gpr(ctx, a->rd, dest); =20 return true; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605520; cv=none; d=zohomail.com; s=zohoarc; b=M+Ph8ZHerpJH4XtZTDriHiQQQWJDfAkPvoLtE86I6YaBp3neSkHxxhIKB3o+czrI0s0Jyq5ZxNbyAR8PryD05f8HdKk4yklSK1gNt/7dEn1FPGreAl5gDtzGxlrO7zdai+xn/7Njx4tPVpbAGNpjgma0pTEzGvbWwU37QgzIwDU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605520; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uuqUtnH/oNoz/oNxngx7m/7U2knMSUJxAG2hrGUXVBk=; b=XqXd2HfJik0wCUnmvsM/rzWrxw/ZZph8bqjcTM8MCmAZQ9FB2QrtpZdusfS3NtygHjBlft14ohvK6+GQwHDtV6txkFgShOl2G1Lf2SXDK0ktFNqiOzb5YenyzfMG4VNRzqM+RAjifSNEAZydfvs0wHX7Q6CQ9O6bqoQog6dYaXE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605520886116.2252546194004; Tue, 16 Jun 2026 03:25:20 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQh2-0007SW-Tt; Tue, 16 Jun 2026 06:06:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQh1-0007R5-3S for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:51 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQgz-0003FF-HZ for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:50 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-c86484d35d1so1502752a12.3 for ; Tue, 16 Jun 2026 03:06:49 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604408; x=1782209208; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uuqUtnH/oNoz/oNxngx7m/7U2knMSUJxAG2hrGUXVBk=; b=BNUC9sL5gKKcM6vK1uyha41dQj1HDZ+fqLXKrQJNLfukU10tBkZCy2v1wF4lBy6p23 DzT+Whazo5On1CCy2w50iJoWRGxEGPyDo90yvYbesXB8MA5Vmfg+DsAswOU5bXuoNrKA DyZ54bPcBsTbWC+XlwVINVEa3MmN/IbpmUw01UK+HLrgGDg940UteZQquPhDtJ6B9ZiE tossTQFFUHBUvSWIQ4a2nG+0r4Mg3yME+KRiIbwwKQAk0HwV6rxLRYxjXHg0v1nWcCrU seUdngGxjwY0wstENYjtaYRc21Qr6NIscRUXaYzwcZb+lUyWjkJs87GotvEHDEloLLE+ FqLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604408; x=1782209208; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=uuqUtnH/oNoz/oNxngx7m/7U2knMSUJxAG2hrGUXVBk=; b=RIpVx7hM15D1dn04c2lvHHWT0+H7MrDKpq1cXb3Ss4dkHsin+ffo4eCXEjdL65TtkM 98bKJBwQHWvstHIQ8zXFaldHYPVpofrID65pGlOFdugyc28Rs7wCewPfg61JHuyijiPt S2amjFCCGoptcCdAi3I93UA+UvHlhBkIbtjjSO6p9LbkhwdQIWNxhrIqeEHnbmnuoRPD CflNQSEQhtDc0UIZleecqEv+YmLFgjPfSaM1eRZqzVRo4uN3KzMHRIQ/yMTKD7HhaNni Pcj0rB/wfwCoBrF0Pa4ymTGUYSrp7GPOx/sP+hfCXQRtCwSurxCifDkS+OZNGzLQE+8r 4Wuw== X-Gm-Message-State: AOJu0YwZGjsQmkZTsR0jDuY5WRJ1XJI0Nx0YTdsRyCCUOXvsaqYKwJVU 1mhRULHZ1Kcy3zjVlnV9+ZwEIdVvSH3mRIsm9G/Ox9LFq4Z3o2qiiKgRi/5nbUyS X-Gm-Gg: Acq92OHVPcaf4JuUrQBeDdrZHWQYX56/YcU9dr6RBMJ0zNtprBkDOWBb0t9DaJUZMJ+ jacvCmSY34F9Lx/mz3/rMQ5lDdde/HAflLcMUxs+vC/E31hCSGbwqe4DU7AAgaZzpY2Vi6HpV5T nLs0BAZ2Z+VbYhduF7rueLgLoW/QG4zxXywB+GJ6hpBq/ANWlOAHZTnTTDQ/ho8Uho528c9ZPAp DUj1NnT4Ic+Y2jwkyJnk+7HyOt3Z+FtjFPnZh622q5Abq4ZnqzKJvwXN7PQjfS2Wuu84QrbK2xo HX6VNJbEf5gH9uTyTO5eU2FA14hE5lR7jj3neY/wO3eB4eCNYWOh+1W+umLVuI52O/VqINHzULP E8XWz7dt+3XK6K+3LU1AH4IqwRa8p/3vrLUVlCfk2vmOYcCAcRIPWZ6LUfMsDhiiDTJwz0cqTql MnXsAtuR0F/ZJYweszmLwDLNnDhXUw/PPsW76ofFW5 X-Received: by 2002:a05:6a21:a88:b0:3b4:65ac:e2e6 with SMTP id adf61e73a8af0-3b7963f2e47mr16212843637.36.1781604408257; Tue, 16 Jun 2026 03:06:48 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 21/83] target/riscv: Fix size of excp_uw2 Date: Tue, 16 Jun 2026 20:04:24 +1000 Message-ID: <20260616100527.1939565-22-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=alistair23@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605521425158500 From: Anton Johansson Fix to 64 bits to match size of instruction start words. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-ID: <20260520125406.28693-11-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/translate.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index ae75f9f33f..ef21972615 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -259,7 +259,7 @@ struct CPUArchState { /* shadow stack register for zicfiss extension */ uint64_t ssp; /* env place holder for extra word 2 during unwind */ - target_ulong excp_uw2; + uint64_t excp_uw2; /* sw check code for sw check exception */ target_ulong sw_check_code; #ifdef CONFIG_USER_ONLY diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 18a1e0ae99..9a0fd700d2 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -231,7 +231,7 @@ static void gen_check_nanbox_s(TCGv_i64 out, TCGv_i64 i= n) tcg_gen_movcond_i64(TCG_COND_GEU, out, in, t_max, in, t_nan); } =20 -static void decode_save_opc(DisasContext *ctx, target_ulong excp_uw2) +static void decode_save_opc(DisasContext *ctx, uint64_t excp_uw2) { assert(!ctx->insn_start_updated); ctx->insn_start_updated =3D true; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607266; cv=none; d=zohomail.com; s=zohoarc; b=eDjdLImt60nLMWCK6hqGAw0GTIN07svAyde7fqoZGLG3DfUVt5jbU2rXX7oqXgY9+5xXGQPlrQAdwtdBaX8NxaSFNDnqnGKQqiYI2hPTVdaOm5BV8e1ujIe49iglCLYw0yW/nvfGd/RW+GHHy319G9IWT1BnBEMeVR0HGdVX0rY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607266; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=U+HrF5EfmwyUjjCdSqJXZticw303vVGEPApGGN1NrVQ=; b=HWLAaspBPCStjX3g8Tpi159Z4bAVdv3yADhI3/KEyd1jKloqMFwDFHvh2tOHbkrFpYtdTeHpvktPytKCFlJA6jo5b67NaY/7QrjG9eT2Vn11iJxy4bA45kZu3gdUoqfaWRiX6LkZsMKpKWCk8MqFhlOM7GCYEYvqW2d1oKydTiY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607266592572.663081747866; Tue, 16 Jun 2026 03:54:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQh6-0007ZC-Mz; Tue, 16 Jun 2026 06:06:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQh5-0007Xn-4E for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:55 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQh3-0003FX-7L for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:54 -0400 Received: by mail-pj1-x102a.google.com with SMTP id 98e67ed59e1d1-36bcf3d2565so3097216a91.3 for ; Tue, 16 Jun 2026 03:06:52 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604412; x=1782209212; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U+HrF5EfmwyUjjCdSqJXZticw303vVGEPApGGN1NrVQ=; b=bHiO24hdeyx9bAgi5tWrNOMEpmdlPsN3QUSkffQXQZHI3sFpvIN/is1MXma0jti7v4 xeO/bBP6X3hWWYcmiVQEt/0Ac1UTkfSLUykY9sQtKl0DsY/cNV8KiiEzpALVi75Mxs7s 6QAvW2f7DwFNClt2FfTdBeiXLwmkQIxWHboAhpfSK4Jwz2YFaMGtmd4+B4Ec/jSZ518i PBWV0hb/mveShxrYvfH2zYlriWGaZ9b/ZaC12uiS3aoCbxDbvPl9m5f8so4YwxVMyX5G 4N6iFAZMphLZN12MJUcTr0H1kH/fHMzx+QhJJ7EgGTYBXD9ciojbzNERY5KMMGE4SvU/ jMzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604412; x=1782209212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=U+HrF5EfmwyUjjCdSqJXZticw303vVGEPApGGN1NrVQ=; b=mOq7O1kUGtrpiTQx+ZdgoGrUurmYqkBt52BxIjv3LRiopLUhB4qPlpUhWaaiXd7Smm in84Z+XZeLWuKY9dWJ+jKMV98rGCEV9CgfpmseUh3mtPOuwZ43dCv7SAVF80Q9bDTQyT rjHMIvdD89qNUED6IQOeXY6D+iciXo0SYI3bf0c87/+WHRvOrihCdmYa4mdjlW08PnjU IO2wFBb9mLuzu4STCbNk3GJsgiiyy6rjh51YVX/0M8uxgQgOiRPfjfH8OOC5oD31gLZG jYI0dvBjTsj9PZHTEXd6g2XJ0c7kf9SLD5IIfQFuwbJ8CYND3z6UK6Qvyq5Yfo9qgmsy 0gAQ== X-Gm-Message-State: AOJu0YwbgxRIV9QpDE0VXzvJ+zmJ5mz40JWfe7O9PjUiZqCgYEI9Zwsi WryrP9zUJiJ8xLWtB+ro8FALhilEw+GzaZyhL1SrpNlIYWnpLORZvGr1ORgSL6B1 X-Gm-Gg: Acq92OFR4ouLCqEYyw5O4XJXDt/cbz7whwI7H/8hXvyHDL2IGJLg65QdpyLloZVflX3 KZOHkSIRzwbqIHPm0OVNVNtPFyb/Qhy35HnGEeZTNnBuQ+3SSBDpa8JqONKMLNtpzSlLXSx9YuZ 6ZbGSizYEN8nWuFW2f1UuVMe9gwjkgo6vzo0HxXzJ6oloP6dohYU2KsEmype5bjj+BgYbUQgIRt 1c1awohgwp30GQQ2uzrsY+zMo6N1K+yekKFNJxiSCXvMMeQ67jRkqWXChGoKaf11G+K/Am75rNw E9d9BZcdCjWJkwi3SZLSNtNq9b6ASGwaM0wHSeKkt7tqI2GUcVcivqMh0P0aBmIZmYmDxPmzeAB jv7RmRx3QBjfhHgLTc0XWZl9lxYR09R/7fpfR+1BkbOd6a5CyQWLQL7M6wyQxizp/A/oAF0sS0u TvxsH//2+z1C49sL65FnZDH8RLelIlHk+qt5kjoWzghMe6sjdMrM0= X-Received: by 2002:a05:6a20:144f:b0:3b4:6265:3788 with SMTP id adf61e73a8af0-3b7963c9ce7mr19034240637.21.1781604411803; Tue, 16 Jun 2026 03:06:51 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 22/83] target/riscv: Fix size of sw_check_code Date: Tue, 16 Jun 2026 20:04:25 +1000 Message-ID: <20260616100527.1939565-23-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607267315158500 From: Anton Johansson The field only holds values of 2 and 3, fix its size to 8 bits and update stores from TCG. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-ID: <20260520125406.28693-12-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/translate.c | 4 ++-- target/riscv/insn_trans/trans_rvi.c.inc | 8 ++++---- target/riscv/insn_trans/trans_rvzicfiss.c.inc | 4 ++-- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index ef21972615..4794489ec3 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -261,7 +261,7 @@ struct CPUArchState { /* env place holder for extra word 2 during unwind */ uint64_t excp_uw2; /* sw check code for sw check exception */ - target_ulong sw_check_code; + uint8_t sw_check_code; #ifdef CONFIG_USER_ONLY uint32_t elf_flags; #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 9a0fd700d2..6a1ae92e5a 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1400,8 +1400,8 @@ static void riscv_tr_translate_insn(DisasContextBase = *dcbase, CPUState *cpu) if (ctx->fcfi_lp_expected) { /* Emit after insn_start, i.e. before the op following insn_start.= */ tcg_ctx->emit_before_op =3D QTAILQ_NEXT(ctx->base.insn_start, link= ); - tcg_gen_st_tl(tcg_constant_tl(RISCV_EXCP_SW_CHECK_FCFI_TVAL), - tcg_env, offsetof(CPURISCVState, sw_check_code)); + tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_FCFI_TVAL), + tcg_env, offsetof(CPURISCVState, sw_check_code)); gen_helper_raise_exception(tcg_env, tcg_constant_i32(RISCV_EXCP_SW_CHECK)); tcg_ctx->emit_before_op =3D NULL; diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_tr= ans/trans_rvi.c.inc index ff450d46f8..fea05d02cc 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -53,8 +53,8 @@ static bool trans_lpad(DisasContext *ctx, arg_lpad *a) /* * misaligned, according to spec we should raise sw check exception */ - tcg_gen_st_tl(tcg_constant_tl(RISCV_EXCP_SW_CHECK_FCFI_TVAL), - tcg_env, offsetof(CPURISCVState, sw_check_code)); + tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_FCFI_TVAL), + tcg_env, offsetof(CPURISCVState, sw_check_code)); gen_helper_raise_exception(tcg_env, tcg_constant_i32(RISCV_EXCP_SW_CHECK)); return true; @@ -66,8 +66,8 @@ static bool trans_lpad(DisasContext *ctx, arg_lpad *a) TCGv tmp =3D tcg_temp_new(); tcg_gen_extract_tl(tmp, get_gpr(ctx, xT2, EXT_NONE), 12, 20); tcg_gen_brcondi_tl(TCG_COND_EQ, tmp, a->label, skip); - tcg_gen_st_tl(tcg_constant_tl(RISCV_EXCP_SW_CHECK_FCFI_TVAL), - tcg_env, offsetof(CPURISCVState, sw_check_code)); + tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_FCFI_TVAL), + tcg_env, offsetof(CPURISCVState, sw_check_code)); gen_helper_raise_exception(tcg_env, tcg_constant_i32(RISCV_EXCP_SW_CHECK)); gen_set_label(skip); diff --git a/target/riscv/insn_trans/trans_rvzicfiss.c.inc b/target/riscv/i= nsn_trans/trans_rvzicfiss.c.inc index 40e5a1b7df..cb9c5419fa 100644 --- a/target/riscv/insn_trans/trans_rvzicfiss.c.inc +++ b/target/riscv/insn_trans/trans_rvzicfiss.c.inc @@ -40,8 +40,8 @@ static bool trans_sspopchk(DisasContext *ctx, arg_sspopch= k *a) mxl_memop(ctx) | MO_ALIGN); TCGv rs1 =3D get_gpr(ctx, a->rs1, EXT_NONE); tcg_gen_brcond_tl(TCG_COND_EQ, data, rs1, skip); - tcg_gen_st_tl(tcg_constant_tl(RISCV_EXCP_SW_CHECK_BCFI_TVAL), - tcg_env, offsetof(CPURISCVState, sw_check_code)); + tcg_gen_st8_i32(tcg_constant_i32(RISCV_EXCP_SW_CHECK_BCFI_TVAL), + tcg_env, offsetof(CPURISCVState, sw_check_code)); gen_update_pc(ctx, 0); gen_helper_raise_exception(tcg_env, tcg_constant_i32(RISCV_EXCP_SW_CHECK)); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606973; cv=none; d=zohomail.com; s=zohoarc; b=K6E2OKq1EIVbUanMWkW7xsAxZAVjQ0vHJ3uVFMdymHF++iNoaxaGoiRHl25a7qGoQnHp3Q0k6Ixa2mRoDdUl5I6rkDw+On+f9kYvhvpc8nYfA1ut/j/4qrFtBztqr1zUrb50K/AAmnS6CLfzYvFqOqQrS41sRWmep9V6Y3KyrbE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606973; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=mNDXHrJk6AV7e/wZGV5NxYwCzNb8bGdciGkd1gVO8Zg=; b=C1L21EPiADiAy+C1Ed2w+62REOFSwDcWEuSZT8Mby0NZSyers5zaQPAlyKurqJo0A8U6+zDgu/Cj3j6DJlwARVcd4nvQmCv+tbsGBALa8CVDYmlJSA//Ju1gnqESjViNu6mtSUoOcxhqwpWfauPiwrGGVu1jn32vFO+bFOMecEY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606973826931.0633588027082; Tue, 16 Jun 2026 03:49:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhB-0007el-In; Tue, 16 Jun 2026 06:07:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQh9-0007cA-PU for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:59 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQh7-0003Fz-1s for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:06:59 -0400 Received: by mail-pj1-x102a.google.com with SMTP id 98e67ed59e1d1-36baeec21dcso2753219a91.3 for ; Tue, 16 Jun 2026 03:06:56 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604415; x=1782209215; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mNDXHrJk6AV7e/wZGV5NxYwCzNb8bGdciGkd1gVO8Zg=; b=ZT+m0n1/wRFmnA05/H4l1UDz06Aa8WPl0AD1CnT5aAQlaqH/eMKYnMKrFckMeF+3o1 mNAbt64U3MU9vPzyIgf0pU/52w+Brb+T7lkKKj3mqhqAUqFj+V2vKCr2FqOnijr/71JS SgK950AnIT44gIglfOeiFz7UqDaqznxvQGMuZQulqoNTQctvKxQxEwxi6eo2/oTc+qxD hZa0CbEuSDdXb2ZHfN9dPlLmSD2zwP7RdcwMkwutnaH+B6ojp/UVnK61XoF3757hb0WE 1Wa7dwApAdrDkthf/vMpFESKuN5qQ0JPXu6hSYXvXCPfG4o8vY00YroSl1JOqeskhgiC BrhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604415; x=1782209215; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mNDXHrJk6AV7e/wZGV5NxYwCzNb8bGdciGkd1gVO8Zg=; b=P/hAr9ATjNjSbokq/OqTPTXzhXClTxYNT7uAxqF3Q8UGjZ3qVHHopUPCA9iaDhFmI/ eQuRBNQC6ra1/RhFSpsUVw/WRIsbcpyEMg44ji3xvrWAQpVsEzYiN4aY7pruG1QB0Wrh H9KX3x3LkbU/zhicYMn8pdN6h1aX1E6abEierAaqO6hfsk7vzTPkBGVRASap3DLnvx5q clS29TmYybnpBiZwalg7icPE+6DeYkCBdAtk/JlFE3pVJvt0HAI8K7s3eySmi+8bMhDZ VNAp9RhZVmtsmyZTSrxNoFK79Zu1Tb9iSw5ybanfHHeQ5T6/Sv/kF/z9++5CjfBGbmL9 W2Nw== X-Gm-Message-State: AOJu0YztmkRnqXLjgaHvjb9Y/nd759fXlXaFRUtGY3leII8xs76YnFQ1 AumDDgRaChCP++aRP5d5QZHH4lnbgRaF7PaYgSirPdLnssoXfoSnyy7wzGz4FURA X-Gm-Gg: Acq92OF/ysCMX+GpAHfDP8uACsQK/1sIaBuqXZTknOWImUteDGRdSt8JRe4ug/tO4io Gz5rWiYnfPlPZgiPaX1ZesJQiifJJHlEykF/FKKnqTjK8GR3fEo1GEGGLaNsUjYnCAIzcuH6VVq XWJ33QxjWdzbwjM7ik720ilyJ/s4NfIqcciI6k13LQ+GKM9QFCzItciHWEdmde8RL1f1r5ayBqE NUieuDNz9DUiDRU4YG+ENB3ZA9eJw/JaiNZC3tFQymJVpGqMYXiOaxeMdB/FwwzqDwj1SuH9wOJ 8y68ZB4upXukejGZS4QR7nWgALADPEo9soSYa907hRJNsC+JXJJJEWwaywpv5uPymErw1fIaDIk R4UJZzedvWT9YX1zVJn3FOep1Pz+a7esRlGQ9RjDk/XqMPm9Qi3cG5R88vn5W+cs3/EqbAvdVXy cbZRFfJt1xjYPPN6ZKSyEgjhjTI2oDGKEUwKrlrWBoUOFsQwGRaqA= X-Received: by 2002:a17:90b:4c87:b0:36d:9e0b:3801 with SMTP id 98e67ed59e1d1-37a024176e6mr18768451a91.8.1781604415245; Tue, 16 Jun 2026 03:06:55 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 23/83] target/riscv: Fix size of priv Date: Tue, 16 Jun 2026 20:04:26 +1000 Message-ID: <20260616100527.1939565-24-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606975607158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson The priv field of CPUArchState only stores values in the range [0,3], fix to 8 bits in size and update relevant function arguments. Introduce a new privilege_mode_t typedef for passing around the privilege mode. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-13-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 27 +++++++++++++++++---------- target/riscv/internals.h | 4 ++-- target/riscv/pmu.h | 2 +- target/riscv/cpu_helper.c | 37 ++++++++++++++++++++----------------- target/riscv/csr.c | 10 ++++++---- target/riscv/gdbstub.c | 2 +- target/riscv/machine.c | 2 +- target/riscv/op_helper.c | 27 ++++++++++++++------------- target/riscv/pmu.c | 9 ++++++--- target/riscv/translate.c | 2 +- 10 files changed, 69 insertions(+), 53 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 4794489ec3..a57e28f40e 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -110,6 +110,12 @@ typedef struct riscv_cpu_profile { =20 extern RISCVCPUProfile *riscv_profiles[]; =20 +/* + * Type large enough to hold all PRV_* fields, update CPUArchState::priv + * migration field if changing this type. + */ +typedef uint8_t privilege_mode_t; + /* Privileged specification version */ #define PRIV_VER_1_10_0_STR "v1.10.0" #define PRIV_VER_1_11_0_STR "v1.11.0" @@ -266,7 +272,7 @@ struct CPUArchState { uint32_t elf_flags; #endif =20 - target_ulong priv; + privilege_mode_t priv; /* CSRs for execution environment configuration */ uint64_t menvcfg; uint64_t senvcfg; @@ -642,7 +648,7 @@ void riscv_cpu_interrupt(CPURISCVState *env); #define BOOL_TO_MASK(x) (-!!(x)) /* helper for riscv_cpu_update_mip value = */ void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(void *), void *arg); -void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, uint32_t priv, +void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, privilege_mode_t pr= iv, int (*rmw_fn)(void *arg, target_ulong reg, target_ulong *val, @@ -653,10 +659,11 @@ void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env= , uint32_t priv, RISCVException smstateen_acc_ok(CPURISCVState *env, int index, uint64_t bi= t); #endif /* !CONFIG_USER_ONLY */ =20 -void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv, bool vir= t_en); +void riscv_cpu_set_mode(CPURISCVState *env, privilege_mode_t newpriv, + bool virt_en); =20 void riscv_ctr_add_entry(CPURISCVState *env, target_long src, target_long = dst, - enum CTRType type, target_ulong prev_priv, bool prev_virt); + enum CTRType type, privilege_mode_t prev_priv, bool prev_virt); void riscv_ctr_clear(CPURISCVState *env); =20 void riscv_translate_init(void); @@ -724,9 +731,9 @@ static inline const RISCVCPUConfig *riscv_cpu_cfg(CPURI= SCVState *env) } =20 #if !defined(CONFIG_USER_ONLY) -static inline int cpu_address_mode(CPURISCVState *env) +static inline privilege_mode_t cpu_address_mode(CPURISCVState *env) { - int mode =3D env->priv; + privilege_mode_t mode =3D env->priv; =20 if (mode =3D=3D PRV_M && get_field(env->mstatus, MSTATUS_MPRV)) { mode =3D get_field(env->mstatus, MSTATUS_MPP); @@ -734,7 +741,7 @@ static inline int cpu_address_mode(CPURISCVState *env) return mode; } =20 -static inline RISCVMXL cpu_get_xl(CPURISCVState *env, target_ulong mode) +static inline RISCVMXL cpu_get_xl(CPURISCVState *env, privilege_mode_t mod= e) { RISCVMXL xl =3D env->misa_mxl; /* @@ -780,7 +787,7 @@ static inline RISCVMXL cpu_address_xl(CPURISCVState *en= v) #ifdef CONFIG_USER_ONLY return env->xl; #else - int mode =3D cpu_address_mode(env); + privilege_mode_t mode =3D cpu_address_mode(env); =20 return cpu_get_xl(env, mode); #endif @@ -818,9 +825,9 @@ static inline RISCVMXL riscv_cpu_sxl(CPURISCVState *env) * Returns true if the effective privilege mode is modified. */ static inline QEMU_ALWAYS_INLINE -bool riscv_cpu_eff_priv(CPURISCVState *env, int *priv, bool *virt) +bool riscv_cpu_eff_priv(CPURISCVState *env, privilege_mode_t *priv, bool *= virt) { - int mode =3D env->priv; + privilege_mode_t mode =3D env->priv; bool virt_enabled =3D false; bool mode_modified =3D false; =20 diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 8c24af0d85..e143a86f97 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -43,9 +43,9 @@ #define MMU_2STAGE_BIT (1 << 2) #define MMU_IDX_SS_WRITE (1 << 3) =20 -static inline int mmuidx_priv(int mmu_idx) +static inline privilege_mode_t mmuidx_priv(int mmu_idx) { - int ret =3D mmu_idx & 3; + privilege_mode_t ret =3D mmu_idx & 3; if (ret =3D=3D MMUIdx_S_SUM) { ret =3D PRV_S; } diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h index 3853d0e262..b4f1e469a2 100644 --- a/target/riscv/pmu.h +++ b/target/riscv/pmu.h @@ -34,7 +34,7 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_even= t_idx event_idx); void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name= ); int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, uint32_t ctr_idx); -void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, target_ulong newpriv, +void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, privilege_mode_t newp= riv, bool new_virt); RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val, bool upper_half, uint32_t ctr_idx); diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index a25727b0da..9ffcc6fa51 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -44,7 +44,7 @@ int riscv_env_mmu_index(CPURISCVState *env, bool ifetch) return 0; #else bool virt =3D env->virt_enabled; - int mode =3D env->priv; + privilege_mode_t mode =3D env->priv; bool mode_modified =3D false; =20 /* All priv -> mmu_idx mapping are here */ @@ -165,7 +165,7 @@ bool riscv_env_smode_dbltrp_enabled(CPURISCVState *env,= bool virt) RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env) { #ifndef CONFIG_USER_ONLY - int priv_mode; + privilege_mode_t priv_mode; bool virt; =20 riscv_cpu_eff_priv(env, &priv_mode, &virt); @@ -217,7 +217,7 @@ RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env) RISCVPmPmm riscv_pm_get_vm_ldst_pmm(CPURISCVState *env) { #ifndef CONFIG_USER_ONLY - int priv_mode; + privilege_mode_t priv_mode; =20 if (!riscv_cpu_cfg(env)->ext_ssnpm || get_field(env->mstatus, MSTATUS_MXR) || @@ -245,7 +245,7 @@ bool riscv_cpu_virt_mem_enabled(CPURISCVState *env, boo= l is_vm_ldst) #ifndef CONFIG_USER_ONLY int satp_mode =3D 0; uint64_t satp; - int priv_mode; + privilege_mode_t priv_mode; bool virt =3D false; =20 if (!is_vm_ldst) { @@ -816,7 +816,7 @@ void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64= _t (*fn)(void *), env->rdtime_fn_arg =3D arg; } =20 -void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, uint32_t priv, +void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, privilege_mode_t pr= iv, int (*rmw_fn)(void *arg, target_ulong reg, target_ulong *val, @@ -849,7 +849,7 @@ void riscv_ctr_clear(CPURISCVState *env) memset(env->ctr_data, 0x0, sizeof(env->ctr_data)); } =20 -static uint64_t riscv_ctr_priv_to_mask(target_ulong priv, bool virt) +static uint64_t riscv_ctr_priv_to_mask(privilege_mode_t priv, bool virt) { switch (priv) { case PRV_M: @@ -869,7 +869,8 @@ static uint64_t riscv_ctr_priv_to_mask(target_ulong pri= v, bool virt) g_assert_not_reached(); } =20 -static uint64_t riscv_ctr_get_control(CPURISCVState *env, target_long priv, +static uint64_t riscv_ctr_get_control(CPURISCVState *env, + privilege_mode_t priv, bool virt) { switch (priv) { @@ -891,10 +892,11 @@ static uint64_t riscv_ctr_get_control(CPURISCVState *= env, target_long priv, * and src privilege is less than target privilege. This includes the virt= ual * state as well. */ -static bool riscv_ctr_check_xte(CPURISCVState *env, target_long src_prv, +static bool riscv_ctr_check_xte(CPURISCVState *env, + privilege_mode_t src_prv, bool src_virt) { - target_long tgt_prv =3D env->priv; + privilege_mode_t tgt_prv =3D env->priv; bool res =3D true; =20 /* @@ -980,7 +982,7 @@ static bool riscv_ctr_check_xte(CPURISCVState *env, tar= get_long src_prv, * idx =3D (sctrstatus.WRPTR - entry - 1) & (depth - 1); */ void riscv_ctr_add_entry(CPURISCVState *env, target_long src, target_long = dst, - enum CTRType type, target_ulong src_priv, bool src_virt) + enum CTRType type, privilege_mode_t src_priv, bool src_virt) { bool tgt_virt =3D env->virt_enabled; uint64_t src_mask =3D riscv_ctr_priv_to_mask(src_priv, src_virt); @@ -1078,7 +1080,8 @@ void riscv_ctr_add_entry(CPURISCVState *env, target_l= ong src, target_long dst, env->sctrstatus =3D set_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK, = head); } =20 -void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv, bool vir= t_en) +void riscv_cpu_set_mode(CPURISCVState *env, privilege_mode_t newpriv, + bool virt_en) { g_assert(newpriv <=3D PRV_M && newpriv !=3D PRV_RESERVED); =20 @@ -1141,7 +1144,7 @@ void riscv_cpu_set_mode(CPURISCVState *env, target_ul= ong newpriv, bool virt_en) */ static int get_physical_address_pmp(CPURISCVState *env, int *prot, hwaddr = addr, int size, MMUAccessType access_type, - int mode) + privilege_mode_t mode) { pmp_priv_t pmp_priv; bool pmp_has_privs; @@ -1165,7 +1168,7 @@ static int get_physical_address_pmp(CPURISCVState *en= v, int *prot, hwaddr addr, =20 /* Returns 'true' if a svukte address check is needed */ static bool do_svukte_check(CPURISCVState *env, bool first_stage, - int mode, bool virt) + privilege_mode_t mode, bool virt) { /* Svukte extension depends on Sv39. */ if (!(env_archcpu(env)->cfg.ext_svukte || @@ -1248,7 +1251,7 @@ static int get_physical_address(CPURISCVState *env, h= waddr *physical, */ MemTxResult res; MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; - int mode =3D mmuidx_priv(mmu_idx); + privilege_mode_t mode =3D mmuidx_priv(mmu_idx); bool virt =3D mmuidx_2stage(mmu_idx); bool use_background =3D false; hwaddr ppn; @@ -1861,7 +1864,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, = int size, bool two_stage_lookup =3D mmuidx_2stage(mmu_idx); bool two_stage_indirect_error =3D false; int ret =3D TRANSLATE_FAIL; - int mode =3D mmuidx_priv(mmu_idx); + privilege_mode_t mode =3D mmuidx_priv(mmu_idx); /* default TLB page size */ hwaddr tlb_size =3D TARGET_PAGE_SIZE; =20 @@ -2250,7 +2253,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) bool always_storeamo =3D (env->excp_uw2 & RISCV_UW2_ALWAYS_STORE_AMO); bool vsmode_exc; uint64_t s; - int mode; + privilege_mode_t mode; =20 /* * cs->exception is 32-bits wide unlike mcause which is XLEN-bits wide @@ -2266,7 +2269,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) bool smode_double_trap =3D false; uint64_t hdeleg =3D async ? env->hideleg : env->hedeleg; const bool prev_virt =3D env->virt_enabled; - const target_ulong prev_priv =3D env->priv; + const privilege_mode_t prev_priv =3D env->priv; uint64_t last_pc =3D env->pc; target_ulong tval =3D 0; target_ulong tinst =3D 0; diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 8c2dcbeca4..f885f5d4f7 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -374,7 +374,7 @@ static RISCVException aia_smode(CPURISCVState *env, int= csrno) static RISCVException aia_smode32(CPURISCVState *env, int csrno) { int ret; - int csr_priv =3D get_field(csrno, 0x300); + privilege_mode_t csr_priv =3D get_field(csrno, 0x300); =20 if (csr_priv =3D=3D PRV_M && !riscv_cpu_cfg(env)->ext_smaia) { return RISCV_EXCP_ILLEGAL_INST; @@ -2671,7 +2671,8 @@ static RISCVException rmw_xireg_aia(CPURISCVState *en= v, int csrno, bool virt =3D false, isel_reserved =3D false; int ret =3D -EINVAL; uint8_t *iprio; - target_ulong priv, vgein; + privilege_mode_t priv; + uint32_t vgein; =20 /* VS-mode CSR number passed in has already been translated */ switch (csrno) { @@ -2956,7 +2957,8 @@ static RISCVException rmw_xtopei(CPURISCVState *env, = int csrno, { bool virt; int ret =3D -EINVAL; - target_ulong priv, vgein; + privilege_mode_t priv; + uint32_t vgein; =20 /* Translate CSR number for VS-mode */ csrno =3D aia_xlate_vs_csrno(env, csrno); @@ -5647,7 +5649,7 @@ static inline RISCVException riscv_csrrw_check(CPURIS= CVState *env, } =20 #if !defined(CONFIG_USER_ONLY) - int csr_priv, effective_priv =3D env->priv; + privilege_mode_t csr_priv, effective_priv =3D env->priv; =20 if (riscv_has_ext(env, RVH) && env->priv =3D=3D PRV_S && !env->virt_enabled) { diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 2c6ccd4761..7abacd0e11 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -223,7 +223,7 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_t = *mem_buf, int n) const unsigned regsz =3D riscv_cpu_is_32bit(cpu) ? 4 : 8; #ifndef CONFIG_USER_ONLY CPURISCVState *env =3D &cpu->env; - uint64_t new_priv =3D ldn(env, mem_buf, regsz) & 0x3; + privilege_mode_t new_priv =3D ldn(env, mem_buf, regsz) & 0x3; bool new_virt =3D 0; =20 if (new_priv =3D=3D PRV_RESERVED) { diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 7ab62ebc82..045e830242 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -465,7 +465,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT32(env.misa_ext, RISCVCPU), VMSTATE_UNUSED(4), VMSTATE_UINT32(env.misa_ext_mask, RISCVCPU), - VMSTATE_UINTTL(env.priv, RISCVCPU), + VMSTATE_UINT8(env.priv, RISCVCPU), VMSTATE_BOOL(env.virt_enabled, RISCVCPU), VMSTATE_UINT64(env.resetvec, RISCVCPU), VMSTATE_UINT64(env.mhartid, RISCVCPU), diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 81873014cb..c074b24bc9 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -286,8 +286,9 @@ void helper_sc_probe_write(CPURISCVState *env, target_u= long addr, target_ulong helper_sret(CPURISCVState *env) { uint64_t mstatus; - target_ulong prev_priv, prev_virt =3D env->virt_enabled; - const target_ulong src_priv =3D env->priv; + privilege_mode_t prev_priv; + bool prev_virt =3D env->virt_enabled; + const privilege_mode_t src_priv =3D env->priv; const bool src_virt =3D env->virt_enabled; =20 if (!(env->priv >=3D PRV_S)) { @@ -339,7 +340,7 @@ target_ulong helper_sret(CPURISCVState *env) /* We support Hypervisor extensions and virtulisation is disabled = */ target_ulong hstatus =3D env->hstatus; =20 - prev_virt =3D get_field(hstatus, HSTATUS_SPV); + prev_virt =3D !!(get_field(hstatus, HSTATUS_SPV)); hstatus =3D set_field(hstatus, HSTATUS_SPV, 0); =20 env->hstatus =3D hstatus; @@ -369,7 +370,7 @@ target_ulong helper_sret(CPURISCVState *env) } =20 static void check_ret_from_m_mode(CPURISCVState *env, target_ulong retpc, - target_ulong prev_priv, + privilege_mode_t prev_priv, uintptr_t ra) { if (!(env->priv >=3D PRV_M)) { @@ -388,8 +389,8 @@ static void check_ret_from_m_mode(CPURISCVState *env, t= arget_ulong retpc, } } static target_ulong ssdbltrp_mxret(CPURISCVState *env, target_ulong mstatu= s, - target_ulong prev_priv, - target_ulong prev_virt) + privilege_mode_t prev_priv, + bool prev_virt) { /* If returning to U, VS or VU, sstatus.sdt =3D 0 */ if (prev_priv =3D=3D PRV_U || (prev_virt && @@ -408,13 +409,13 @@ target_ulong helper_mret(CPURISCVState *env) { target_ulong retpc =3D env->mepc & get_xepc_mask(env); uint64_t mstatus =3D env->mstatus; - target_ulong prev_priv =3D get_field(mstatus, MSTATUS_MPP); + privilege_mode_t prev_priv =3D get_field(mstatus, MSTATUS_MPP); uintptr_t ra =3D GETPC(); =20 check_ret_from_m_mode(env, retpc, prev_priv, ra); =20 - target_ulong prev_virt =3D get_field(env->mstatus, MSTATUS_MPV) && - (prev_priv !=3D PRV_M); + bool prev_virt =3D !!(get_field(env->mstatus, MSTATUS_MPV) && + (prev_priv !=3D PRV_M)); mstatus =3D set_field(mstatus, MSTATUS_MIE, get_field(mstatus, MSTATUS_MPIE)); mstatus =3D set_field(mstatus, MSTATUS_MPIE, 1); @@ -457,14 +458,14 @@ target_ulong helper_mret(CPURISCVState *env) target_ulong helper_mnret(CPURISCVState *env) { target_ulong retpc =3D env->mnepc; - target_ulong prev_priv =3D get_field(env->mnstatus, MNSTATUS_MNPP); - target_ulong prev_virt; + privilege_mode_t prev_priv =3D get_field(env->mnstatus, MNSTATUS_MNPP); + bool prev_virt; uintptr_t ra =3D GETPC(); =20 check_ret_from_m_mode(env, retpc, prev_priv, ra); =20 - prev_virt =3D get_field(env->mnstatus, MNSTATUS_MNPV) && - (prev_priv !=3D PRV_M); + prev_virt =3D !!(get_field(env->mnstatus, MNSTATUS_MNPV) && + (prev_priv !=3D PRV_M)); env->mnstatus =3D set_field(env->mnstatus, MNSTATUS_NMIE, true); =20 /* diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c index 708f2ec7aa..3444400bd2 100644 --- a/target/riscv/pmu.c +++ b/target/riscv/pmu.c @@ -114,7 +114,8 @@ static bool riscv_pmu_counter_enabled(RISCVCPU *cpu, ui= nt32_t ctr_idx) * new priv and new virt values are passed in as arguments. */ static void riscv_pmu_icount_update_priv(CPURISCVState *env, - target_ulong newpriv, bool new_vi= rt) + privilege_mode_t newpriv, + bool new_virt) { uint64_t *snapshot_prev, *snapshot_new; uint64_t current_icount; @@ -154,7 +155,8 @@ static void riscv_pmu_icount_update_priv(CPURISCVState = *env, } =20 static void riscv_pmu_cycle_update_priv(CPURISCVState *env, - target_ulong newpriv, bool new_vir= t) + privilege_mode_t newpriv, + bool new_virt) { uint64_t *snapshot_prev, *snapshot_new; uint64_t current_ticks; @@ -189,7 +191,8 @@ static void riscv_pmu_cycle_update_priv(CPURISCVState *= env, counter_arr[env->priv] +=3D delta; } =20 -void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, target_ulong newpriv, +void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, + privilege_mode_t newpriv, bool new_virt) { riscv_pmu_cycle_update_priv(env, newpriv, new_virt); diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 6a1ae92e5a..3132386801 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -68,7 +68,7 @@ typedef struct DisasContext { RISCVExtStatus mstatus_fs; RISCVExtStatus mstatus_vs; uint32_t mem_idx; - uint32_t priv; + privilege_mode_t priv; /* * Remember the rounding mode encoded in the previous fp instruction, * which we have already installed into env->fp_status. Or -1 for --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606761; cv=none; d=zohomail.com; s=zohoarc; b=oCgIZT9EFQOq1+VwiC26t4G12qBjAiwdWGxp7lAjR6rl57oCJU91lJ54QNDKhWO9T0HUD3areYjc19kyM42NtF7oaAnugVl5gJgWI0UlI4ca2YtvyFo+NQcwrg/awYuWwSFQ0YlPFXZjfLEki36AvK9O0ArNC+OxVkg+3iAjOqM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606761; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=RQG0yk5z1yC9H4Dw6LKZKYTX7Uw12q4zbc2nNy7e0VA=; b=LMCHw8KNqaX5o/YolYYBjfCH/RnPaJDHhnJxUgDVq7Cy1wYLYqBCBAnsyQIGUMAfoKA2cJNnxsDj/YJ1+1gh9okYRA4Oz3Ge7oy39P/AQnPbJIk7O3NwwxEmP38rDRwXoVp751Wqsw7keZtM7ip/udNiRFTV1iyNSBbQWpXT7Zg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606761800467.07852328846457; Tue, 16 Jun 2026 03:46:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhD-0007pB-8x; Tue, 16 Jun 2026 06:07:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhB-0007ga-Ov for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:01 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQh9-0003KC-UM for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:01 -0400 Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-842cd900ee0so1958677b3a.2 for ; Tue, 16 Jun 2026 03:06:59 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:06:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604418; x=1782209218; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RQG0yk5z1yC9H4Dw6LKZKYTX7Uw12q4zbc2nNy7e0VA=; b=RUKBSbFnw/NS8rpBul9cRGN84KSfhpHHOMPRO1rOL5tiPeMzJVaqVWvsbgrqWRbHV1 B9BV6BSUlPeVSOymy9JhLQrNUlZHfYK891sAXSfmL47BHqbVMXD+Aq8fy4HLysDLMRxn D1TxbvMtoC/+wD6rAPQ7apdXBVx1JNbe762tJEmmN1jq82CmzEzhbafJ/dwt6K5T0f2K hVg6l5X6AAVwwxOynLh5jfZO5oAvigQYi0o0lMKwkvpcG6kLid2IBpEoORQCRS14VKhB YYYt4G5EZXdpp+EygrsLbZ8EXs+BJDKX9n+6tojySAqV3Jnwuh/LOCIl/BPCVby4uXIt 9Tjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604418; x=1782209218; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=RQG0yk5z1yC9H4Dw6LKZKYTX7Uw12q4zbc2nNy7e0VA=; b=c+LJhTEuJ3m4wP1IMqrJCGi8gyNIaseY2dZGKiqgJ+bUUxQPJiqZvoDcdv3bhHysRo BgrxIBdl+TzWEQHdUIgG38pPrFsBSBYPlrAiFkOy0sUuAOJ4JQivlQSuLJ4rjoa5iQ6j RYaSaxFJnoT8jwiU4tBd5IgYLpMMlt7JkOopG2B4NQB5EFedcP/PzbBFQRy44aH0SLSN /bbkIZktUwPJfKoUvPE/AOKRKtcIchS2jYEFqTImWHc7+F8f/+c9PTslOKW4eD1GIClG ye9k1RSfgGmi0IccUUDGPyKRbv5OTGgI09IL3XGTtd8z4ZXHY/lpqjfIe9soOV6ma0Wj Wp8g== X-Gm-Message-State: AOJu0YyAoK7Z89LlWoO2aS57AkAYr5WXOwHwrjGtNbFotLXHh9WkO5Jp O9HYj0ZO2gAfmO/MylxtxxYE34zdi/C3OohZ2LkkdJrAryO7qm4N/d5gtr54ghjK X-Gm-Gg: Acq92OGB/LiXFf/b9p/XzKj6DR2/jidmZXPISWmKy4J7vXxKU2qNja4eFLOHJ/k1X5/ 7ri4ZOE92nEXQsHfoH5PsYibzMi0KblSNL6muYxPqN456ywK/3W7B2cQO+IWcxGraVNAoOec8cC MPIHB1fl+gZ7Y2/thCfGWTI370AyTtnpDoPTHUPWoBPedtyq966KeJrtXUz8n6jfSCZKENcjuTm VSIsT9BVMPcmMcJbZKkfAOu+iyJxdK4xoijzKUarqWYjhvcBbd//goNG6F0xwEBdkB6ssDQrffc GTQWTodEImGQlRImCljFS4IcAL85mjHDdLfpeGLp3vflKI4uh/g3i+Efxm1TwvhMt3znM+PasZX NXqJU5Tf+4MP0wPXprrN95eOmsg6NwZogZYzAVkgL1pqshW+LpJ9CjVAXhzy0xEGCGWQc2sbbSl menandTWM5pguTMM8trFGUIQDkXXdGHuTts+Qk2/eM X-Received: by 2002:a05:6a20:9186:b0:39b:8dcb:f36d with SMTP id adf61e73a8af0-3b7e49d09f6mr3381494637.35.1781604418401; Tue, 16 Jun 2026 03:06:58 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 24/83] target/riscv: Fix size of gei fields Date: Tue, 16 Jun 2026 20:04:27 +1000 Message-ID: <20260616100527.1939565-25-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=alistair23@gmail.com; helo=mail-pf1-x430.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606762207158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson geilen takes the values 31 or 63, fix it to 8 bits. hgeie and hgeip are at most 64 bits in size, fix to 64. Update relevant function arguments and uses of hgeie and hgeip. Note, masking is widened to 64-bit as geilen is already verified to be smaller than the target long size, and an out-of-bounds shift would be UB anyway. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-14-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 10 +++++----- target/riscv/cpu.c | 4 ++-- target/riscv/cpu_helper.c | 4 ++-- target/riscv/csr.c | 4 ++-- target/riscv/machine.c | 4 ++-- 5 files changed, 13 insertions(+), 13 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index a57e28f40e..2a4b7378f3 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -280,7 +280,7 @@ struct CPUArchState { #ifndef CONFIG_USER_ONLY /* This contains QEMU specific information about the virt state. */ bool virt_enabled; - target_ulong geilen; + uint8_t geilen; uint64_t resetvec; =20 uint64_t mhartid; @@ -357,8 +357,8 @@ struct CPUArchState { uint64_t htval; uint64_t htinst; uint64_t hgatp; - target_ulong hgeie; - target_ulong hgeip; + uint64_t hgeie; + uint64_t hgeip; uint64_t htimedelta; uint64_t hvien; =20 @@ -611,8 +611,8 @@ int riscv_cpu_mirq_pending(CPURISCVState *env); int riscv_cpu_sirq_pending(CPURISCVState *env); int riscv_cpu_vsirq_pending(CPURISCVState *env); bool riscv_cpu_fp_enabled(CPURISCVState *env); -target_ulong riscv_cpu_get_geilen(CPURISCVState *env); -void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen); +uint8_t riscv_cpu_get_geilen(CPURISCVState *env); +void riscv_cpu_set_geilen(CPURISCVState *env, uint8_t geilen); bool riscv_cpu_vector_enabled(CPURISCVState *env); void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable); int riscv_env_mmu_index(CPURISCVState *env, bool ifetch); diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index c0b6218421..c063604298 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1084,9 +1084,9 @@ static void riscv_cpu_set_irq(void *opaque, int irq, = int level) } =20 /* Update HGEIP CSR */ - env->hgeip &=3D ~((target_ulong)1 << irq); + env->hgeip &=3D ~(1ULL << irq); if (level) { - env->hgeip |=3D (target_ulong)1 << irq; + env->hgeip |=3D 1ULL << irq; } =20 /* Update mip.SGEIP bit */ diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 9ffcc6fa51..4529341696 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -712,7 +712,7 @@ void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env) } } =20 -target_ulong riscv_cpu_get_geilen(CPURISCVState *env) +uint8_t riscv_cpu_get_geilen(CPURISCVState *env) { if (!riscv_has_ext(env, RVH)) { return 0; @@ -721,7 +721,7 @@ target_ulong riscv_cpu_get_geilen(CPURISCVState *env) return env->geilen; } =20 -void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen) +void riscv_cpu_set_geilen(CPURISCVState *env, uint8_t geilen) { if (!riscv_has_ext(env, RVH)) { return; diff --git a/target/riscv/csr.c b/target/riscv/csr.c index f885f5d4f7..0d0b2fca49 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3786,7 +3786,7 @@ static RISCVException rmw_mip64(CPURISCVState *env, i= nt csrno, =20 if (csrno !=3D CSR_HVIP) { gin =3D get_field(env->hstatus, HSTATUS_VGEIN); - old_mip |=3D (env->hgeip & ((target_ulong)1 << gin)) ? MIP_VSEIP := 0; + old_mip |=3D (env->hgeip & (1ULL << gin)) ? MIP_VSEIP : 0; old_mip |=3D env->vstime_irq ? MIP_VSTIP : 0; } =20 @@ -4971,7 +4971,7 @@ static RISCVException write_hgeie(CPURISCVState *env,= int csrno, target_ulong val, uintptr_t ra) { /* Only GEILEN:1 bits implemented and BIT0 is never implemented */ - val &=3D ((((target_ulong)1) << env->geilen) - 1) << 1; + val &=3D ((1ULL << env->geilen) - 1) << 1; env->hgeie =3D val; /* Update mip.SGEIP bit */ riscv_cpu_update_mip(env, MIP_SGEIP, diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 045e830242..eb57ab07dc 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -92,8 +92,8 @@ static const VMStateDescription vmstate_hyper =3D { VMSTATE_UINT64(env.htval, RISCVCPU), VMSTATE_UINT64(env.htinst, RISCVCPU), VMSTATE_UINT64(env.hgatp, RISCVCPU), - VMSTATE_UINTTL(env.hgeie, RISCVCPU), - VMSTATE_UINTTL(env.hgeip, RISCVCPU), + VMSTATE_UINT64(env.hgeie, RISCVCPU), + VMSTATE_UINT64(env.hgeip, RISCVCPU), VMSTATE_UINT64(env.hvien, RISCVCPU), VMSTATE_UINT64(env.hvip, RISCVCPU), VMSTATE_UINT64(env.htimedelta, RISCVCPU), --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606936; cv=none; d=zohomail.com; s=zohoarc; b=j8uVwH1Z0XYo/CAqb7b7um7xKFSEIDNduig4QqYCf92aWTlqNpgorAvzFTKxw0zAhmGm9BLyOBnFmeTr0uO+QaUinFQZwdLy9Uvx06HEtnF+2Bx9k00GqiRAsc+f8VFlxdGL0OS4xe0mDZ40MssuDr9n2lF86TVlzAEskp/fqao= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606936; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3jxiXtNxHQeunKjhZBQ34EwCH1Q6dP1U0lZODDJfL4M=; b=agtBHEhgxwjE4sw6H2RqxuiknAt/eozR9kBV4rBb5ltcrDyWBTvmdd1qp2wQ4BEd6sebxfdnlF+2912YNXJeYkjljNHuWhYLdTjW4oA00WxD3uc7IAzRLGgUUEjdtdWy0FcArV6Icq4KOCyoYQjHrbISTyIXhx6BwA2VQvSKNEU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606936163761.2988286454241; Tue, 16 Jun 2026 03:48:56 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhH-0008Eb-3R; Tue, 16 Jun 2026 06:07:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhF-00081D-55 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:05 -0400 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhD-0003MD-05 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:04 -0400 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-c88831f28f4so417194a12.2 for ; Tue, 16 Jun 2026 03:07:02 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.06.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604422; x=1782209222; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3jxiXtNxHQeunKjhZBQ34EwCH1Q6dP1U0lZODDJfL4M=; b=H6cowK3mlbAb+2oHReYo6/L3jGX/wEIXxkP6mui+wKJ5jf+WH09oX3ckEEZlSrICUb Byq8umPGZzILNkwuRqfPFB8W1W9kVdH8DYY7d1n/Sk2aV6bKXwchyjiFLnS71XUniVKq j+MkyI1aQK8We0ow1CCOoicY/IiEa1v8P/BCTc7/FGBClrn4YDj9JeJ3NleUb2Y8v6ux 6ie7Fu5J0aDBeqGZCQod3jAmzkuazwb6WUy9/b2iD9BJX0VFVOUx6J1G8M1CHCQE3D1b hwOS1QHQhMq6ToIWPlgyrLKO1Bh4IleeacZdbrkQW7fQlrYorab7U6rJGKBQ2SfpPiOF OEYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604422; x=1782209222; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3jxiXtNxHQeunKjhZBQ34EwCH1Q6dP1U0lZODDJfL4M=; b=KEKBoxgxN5iwZX6G32Lx92kTsyDPURPhoDEE/1F/PX1bQ5DVcVZWrjzxlV1zDRX2nV M5zb32yfgKb6g2Z4+JJw0WEnV9jrdnZxLlucOsTfiuOSsjadRzkGKW5UOU8ti5GSMVJz m5g2y+idKR0Pedf/zJtAKsvRCVgiz2jdtZRdAh6h92bZEPO/u11AwpysxoJFvAmtfniA gmwi0sHDEm22I2KUWqeTgemdIhfkpFD61qosjlOS1/TTdmJx5zyMBl1zZM+Ap2iwaOw8 R6Vla3hh8/GNRxJ3WoH5ITY5/6RPgdvlOHEjT5yjklOxYFZw/Buf5qCN3VcG1ZXe4qo/ IkEQ== X-Gm-Message-State: AOJu0Yxyz3Sru0lSsy8zTNBAaJJsID1BIGzFc9Qj9bmvPEIxhd5oivzI 3tjptVIUt+bmFPQCzi4I2zdGGzw5oZ2Za5xsoWAHW9RIUQNbJaxVuX3LksDik0Qu X-Gm-Gg: Acq92OGNa8bkilxyTq/Unb9XnV9CcCzmiSSQPVuNUgnRI5UcQMPOSTL7hMocmVFhEdY +LR1sTF4NWsRNimPmBgYzfM55dYtxBSy7jMYNiM+FRXvjHy0GtgIBmwJwYaNJFHBNfQ6OU7QjSc 2UyyHI7yjwI198xFxrARUD7UcBzk2EvQ6HzzELt9U6PwDxfVYzCSewrsqGYkP4RGc6vScgFPo03 bZzFuIyvCd1SN22WLsoLLWgzbPnA4/nFqCozsVRZTW7Gb6KrM/NYmQGOQzX1fg8YEJIQYOI2e0i z02lOUQ6GUXQo8qL5i6vZmDRwmDhCYztGCWZHpFq9Hw2+UPZUG00kTT/3DiBrVvho6Uy7+tymmL eMLB3CjdpTIjHejj9xSgb5udRejxe1/YnIGVWPWBAkrHef8GpPis/gEmLA/rbwnt4bB+uThnwRo EBMb0coAu5ooIrVcItIgn+Af0zcDwi3YLpXXLtYEpS X-Received: by 2002:a05:6a20:d70a:b0:39c:5624:ee53 with SMTP id adf61e73a8af0-3b7e4ce6955mr3321483637.24.1781604421609; Tue, 16 Jun 2026 03:07:01 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 25/83] target/riscv: Fix size of [m|s|vs]iselect fields Date: Tue, 16 Jun 2026 20:04:28 +1000 Message-ID: <20260616100527.1939565-26-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606937446158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson [m|s|vs]iselect are defined in version 20250508 of the privileged specification to be XLEN in size, however QEMU only ever uses at most 16 bits of these fields, so fix them to 16. Update relevant function arguments. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-15-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 8 ++++---- target/riscv/csr.c | 32 ++++++++++++++++---------------- target/riscv/machine.c | 6 +++--- 3 files changed, 23 insertions(+), 23 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 2a4b7378f3..c338df1598 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -344,8 +344,8 @@ struct CPUArchState { uint8_t siprio[64]; =20 /* AIA CSRs */ - target_ulong miselect; - target_ulong siselect; + uint16_t miselect; + uint16_t siselect; uint64_t mvien; uint64_t mvip; =20 @@ -391,7 +391,7 @@ struct CPUArchState { uint64_t vsatp; =20 /* AIA VS-mode CSRs */ - target_ulong vsiselect; + uint16_t vsiselect; =20 uint64_t mtval2; uint64_t mtinst; @@ -794,7 +794,7 @@ static inline RISCVMXL cpu_address_xl(CPURISCVState *en= v) } #endif =20 -static inline int riscv_cpu_xlen(CPURISCVState *env) +static inline uint16_t riscv_cpu_xlen(CPURISCVState *env) { return 16 << env->xl; } diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 0d0b2fca49..29db646589 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -2440,7 +2440,7 @@ static RISCVException rmw_xiselect(CPURISCVState *env= , int csrno, target_ulong *val, target_ulong new_val, target_ulong wr_mask) { - target_ulong *iselect; + uint16_t *iselect; int ret; =20 ret =3D smstateen_acc_ok(env, 0, SMSTATEEN0_SVSLCT); @@ -2483,18 +2483,18 @@ static RISCVException rmw_xiselect(CPURISCVState *e= nv, int csrno, return RISCV_EXCP_NONE; } =20 -static bool xiselect_aia_range(target_ulong isel) +static bool xiselect_aia_range(uint16_t isel) { return (ISELECT_IPRIO0 <=3D isel && isel <=3D ISELECT_IPRIO15) || (ISELECT_IMSIC_FIRST <=3D isel && isel <=3D ISELECT_IMSIC_LAST); } =20 -static bool xiselect_cd_range(target_ulong isel) +static bool xiselect_cd_range(uint16_t isel) { return (ISELECT_CD_FIRST <=3D isel && isel <=3D ISELECT_CD_LAST); } =20 -static bool xiselect_ctr_range(int csrno, target_ulong isel) +static bool xiselect_ctr_range(int csrno, uint16_t isel) { /* MIREG-MIREG6 for the range 0x200-0x2ff are not used by CTR. */ return CTR_ENTRIES_FIRST <=3D isel && isel <=3D CTR_ENTRIES_LAST && @@ -2502,7 +2502,7 @@ static bool xiselect_ctr_range(int csrno, target_ulon= g isel) } =20 static int rmw_iprio(target_ulong xlen, - target_ulong iselect, uint8_t *iprio, + uint16_t iselect, uint8_t *iprio, target_ulong *val, target_ulong new_val, target_ulong wr_mask, int ext_irq_no) { @@ -2546,7 +2546,7 @@ static int rmw_iprio(target_ulong xlen, return 0; } =20 -static int rmw_ctrsource(CPURISCVState *env, int isel, target_ulong *val, +static int rmw_ctrsource(CPURISCVState *env, uint16_t isel, target_ulong *= val, target_ulong new_val, target_ulong wr_mask) { /* @@ -2585,7 +2585,7 @@ static int rmw_ctrsource(CPURISCVState *env, int isel= , target_ulong *val, return 0; } =20 -static int rmw_ctrtarget(CPURISCVState *env, int isel, target_ulong *val, +static int rmw_ctrtarget(CPURISCVState *env, uint16_t isel, target_ulong *= val, target_ulong new_val, target_ulong wr_mask) { /* @@ -2624,7 +2624,7 @@ static int rmw_ctrtarget(CPURISCVState *env, int isel= , target_ulong *val, return 0; } =20 -static int rmw_ctrdata(CPURISCVState *env, int isel, target_ulong *val, +static int rmw_ctrdata(CPURISCVState *env, uint16_t isel, target_ulong *va= l, target_ulong new_val, target_ulong wr_mask) { /* @@ -2665,7 +2665,7 @@ static int rmw_ctrdata(CPURISCVState *env, int isel, = target_ulong *val, } =20 static RISCVException rmw_xireg_aia(CPURISCVState *env, int csrno, - target_ulong isel, target_ulong *val, + uint16_t isel, target_ulong *val, target_ulong new_val, target_ulong wr_mask) { bool virt =3D false, isel_reserved =3D false; @@ -2746,12 +2746,12 @@ done: } =20 static int rmw_xireg_cd(CPURISCVState *env, int csrno, - target_ulong isel, target_ulong *val, + uint16_t isel, target_ulong *val, target_ulong new_val, target_ulong wr_mask) { int ret =3D -EINVAL; - int ctr_index =3D isel - ISELECT_CD_FIRST; - int isel_hpm_start =3D ISELECT_CD_FIRST + 3; + uint16_t ctr_index =3D isel - ISELECT_CD_FIRST; + uint16_t isel_hpm_start =3D ISELECT_CD_FIRST + 3; =20 if (!riscv_cpu_cfg(env)->ext_smcdeleg || !riscv_cpu_cfg(env)->ext_sscc= fg) { ret =3D RISCV_EXCP_ILLEGAL_INST; @@ -2818,7 +2818,7 @@ done: } =20 static int rmw_xireg_ctr(CPURISCVState *env, int csrno, - target_ulong isel, target_ulong *val, + uint16_t isel, target_ulong *val, target_ulong new_val, target_ulong wr_mask) { if (!riscv_cpu_cfg(env)->ext_smctr && !riscv_cpu_cfg(env)->ext_ssctr) { @@ -2846,7 +2846,7 @@ static int rmw_xireg_ctr(CPURISCVState *env, int csrn= o, * extension using csrind should be implemented here. */ static int rmw_xireg_csrind(CPURISCVState *env, int csrno, - target_ulong isel, target_ulong *val, + uint16_t isel, target_ulong *val, target_ulong new_val, target_ulong wr_mask) { bool virt =3D csrno =3D=3D CSR_VSIREG ? true : false; @@ -2876,7 +2876,7 @@ static int rmw_xiregi(CPURISCVState *env, int csrno, = target_ulong *val, target_ulong new_val, target_ulong wr_mask) { int ret =3D -EINVAL; - target_ulong isel; + uint16_t isel; =20 ret =3D smstateen_acc_ok(env, 0, SMSTATEEN0_SVSLCT); if (ret !=3D RISCV_EXCP_NONE) { @@ -2907,7 +2907,7 @@ static RISCVException rmw_xireg(CPURISCVState *env, i= nt csrno, target_ulong wr_mask) { int ret =3D -EINVAL; - target_ulong isel; + uint16_t isel; =20 ret =3D smstateen_acc_ok(env, 0, SMSTATEEN0_SVSLCT); if (ret !=3D RISCV_EXCP_NONE) { diff --git a/target/riscv/machine.c b/target/riscv/machine.c index eb57ab07dc..45fd39994e 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -109,7 +109,7 @@ static const VMStateDescription vmstate_hyper =3D { VMSTATE_UINT64(env.vscause, RISCVCPU), VMSTATE_UINT64(env.vstval, RISCVCPU), VMSTATE_UINT64(env.vsatp, RISCVCPU), - VMSTATE_UINTTL(env.vsiselect, RISCVCPU), + VMSTATE_UINT16(env.vsiselect, RISCVCPU), VMSTATE_UINT64(env.vsie, RISCVCPU), =20 VMSTATE_UINT64(env.mtval2, RISCVCPU), @@ -487,8 +487,8 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT64(env.mepc, RISCVCPU), VMSTATE_UINT64(env.mcause, RISCVCPU), VMSTATE_UINT64(env.mtval, RISCVCPU), - VMSTATE_UINTTL(env.miselect, RISCVCPU), - VMSTATE_UINTTL(env.siselect, RISCVCPU), + VMSTATE_UINT16(env.miselect, RISCVCPU), + VMSTATE_UINT16(env.siselect, RISCVCPU), VMSTATE_UINT32(env.scounteren, RISCVCPU), VMSTATE_UINT32(env.mcounteren, RISCVCPU), VMSTATE_UINT32(env.scountinhibit, RISCVCPU), --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606972; cv=none; d=zohomail.com; s=zohoarc; b=LR+3W4wyxzBt4FlsU0/LRTmRC50KbOMk9qG3vROFcpUw4FJYOtml4MQthEtSIbG6dBmXQ/rOEFMn4yzSEZjqEjc/9BZ46XI3U2339PMRol8XvPIcynU1x1qZhKGKWHYUPuh9nm2z0VCFgForOATyeyfr0HFdph1O+0W3BCD26Bc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606972; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QcMnKyII8r/lV77qN3Eve6DZ7u06AOKMdhC9UZhkf9M=; b=k5ZSc8ja9T3nCs0buMQInjfQLnhUyC65WbyFNh0+e+YUAAZbpKbfoXgsHFXK1GVbbk3pYMUNYPEF8j+aiI6ivKKVttCorK4ylc6+iHOCPlPkrZtBxL8noy/x8DPnBnqE/wJOOSDARcEQ0hxLO+CIYnbe0WDpXhqbiEe4nysJK5M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606972710601.9113802876518; Tue, 16 Jun 2026 03:49:32 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhK-0000BQ-9o; Tue, 16 Jun 2026 06:07:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhI-0008P5-K4 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:08 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhG-0003MZ-4J for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:08 -0400 Received: by mail-pg1-x52b.google.com with SMTP id 41be03b00d2f7-c85a2c012e5so1466637a12.1 for ; Tue, 16 Jun 2026 03:07:05 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604425; x=1782209225; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QcMnKyII8r/lV77qN3Eve6DZ7u06AOKMdhC9UZhkf9M=; b=QvnT7iFG+h/NocYYSwu+QrjZFK8p8Z0LCV7GLp7bv2G+l99I8E/51dtuYpJlnPYsiC mke+Sje7okzjaVaT25FgDyQ0cBZuXj1UlutJXoYtkr4HzwyVOGWHfFDyhS3Nz7jHMhi5 qG5TBHVKg11N6EhiDzudkcn0O41toM70I/G3+J2msPVyuufz3MYrrhhDqlB+p1JDJUFV 9zlEADr9tlCP1k2gd3R4VVOkjF8tEfCzYsoml2HgyfHu3p/fk6DhjqD64OMs4hLHL4AD 1B+FRtRptvip7S5W6G4xPKDh2DdNDkImQFX6U73piah7MHvu+1Cay1M7Gjn9BiqowPUi bF9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604425; x=1782209225; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=QcMnKyII8r/lV77qN3Eve6DZ7u06AOKMdhC9UZhkf9M=; b=n1l1i0sNUk6+ThRiEvzmrEwGV0xsB2u7O83R1t3VA0oHDepfLAk2Bqxt+ay3+CEI2/ z+mUSY3AwKDUzwBvUqKBgjSNt5BPI9BOCzWSrOG8U/1pbU7+QLA9RaDidBc0qpSUDpN2 b/5WJpPE20rMhlVc/xy/JP7otwrnwFUAKOeWjO9xj3cHc48AZ8FCrQVV9+e4hAhjKoYf g9Rkzf0LEtHnd4ekE+8NvvvGM/epWRqwrF+VNsLk9yvvlqxHXG4ZqlKGLM1f25F0RFfw 9AKe3MpTtnRoW8W89uGJE3U9zRfZVKfDEe0H6HKkfoSQlUeQMVuKEaXBmdweRWVcrkU1 pBxA== X-Gm-Message-State: AOJu0YynUiEcCA4kWm58MRrW9PkiKLZC1zBgBvXBLz01wJCFdcQnmVNs cpPLsCuZ3vrvFQTjPhB/X2v8kecHNuRG98J3CQ/uXozNpCYXKWbU2qiZxFP7APLQ X-Gm-Gg: Acq92OFv+F9PSPp3BV5UDKzynj8RnZEMpadHCErNsSil7ohCgspUxaZCMO9ueVgELX4 gGAYQzaNLbHv3AtZgGp9DfqW7SutpMyQwNs0spYOI1qlS0WXDtACHqIOqfnlKH+2HQMAMmmY0TZ pQ/jWDrj883RE9I9+Tgo2dRTxmHpclC5LzwfBqRLj2a3yWQaGNHMi+GKJL6qeVs/ooJEDhleaBA 6urJ3+iHIqNK07BJCK6qS+x58/ckyWq5//8ar8Kac5pcyX9bsBEXH1pUSqCUd/lQRQufu0Ml3Mm dTDBvsQfucGrb/aEsgeGSziEud8s+9O+gsmbEjfiEqc3aR8dqxzGve1JsdruNFdWJw8OuQis69D +PyjNtJz06T/tBlGVag4WjibPbFncQteGltGugJoXDk8V3iZCyh+vHjrHDv3F0P8wkdImqNxpCR MaE0VQKYWcH3rgMuYkWw0hf5t4NmsKBCsbPacCLVxA X-Received: by 2002:a05:6a21:1405:b0:39c:787:f197 with SMTP id adf61e73a8af0-3b7e49d08b1mr3068188637.36.1781604424805; Tue, 16 Jun 2026 03:07:04 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 26/83] target/riscv: Fix arguments to board IMSIC emulation callbacks Date: Tue, 16 Jun 2026 20:04:29 +1000 Message-ID: <20260616100527.1939565-27-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606973388158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson In hw/ the relevant RISCVIMSICState fields eidelivery, eithreshold, eistate are uint32_t. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Acked-by: Alistair Francis Message-ID: <20260520125406.28693-16-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 42 ++++++++++++++++++++------------------- hw/intc/riscv_imsic.c | 34 +++++++++++++++---------------- target/riscv/cpu_helper.c | 12 ++++------- target/riscv/csr.c | 24 ++++++++++++---------- 4 files changed, 57 insertions(+), 55 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index c338df1598..380749f9a8 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -201,6 +201,24 @@ FIELD(VTYPE, VMA, 7, 1) FIELD(VTYPE, ALTFMT, 8, 1) FIELD(VTYPE, RESERVED, 9, sizeof(uint64_t) * 8 - 10) =20 +#ifndef CONFIG_USER_ONLY +/* machine specific AIA ireg read-modify-write callback */ +#define AIA_MAKE_IREG(__isel, __priv, __virt, __vgein, __xlen) = \ + ((uint32_t)((((__xlen) & 0xff) << 24) | = \ + (((__vgein) & 0x3f) << 20) | = \ + (((__virt) & 0x1) << 18) | = \ + (((__priv) & 0x3) << 16) | = \ + (__isel & 0xffff))) +#define AIA_IREG_ISEL(__ireg) ((__ireg) & 0xffff) +#define AIA_IREG_PRIV(__ireg) (((__ireg) >> 16) & 0x3) +#define AIA_IREG_VIRT(__ireg) (((__ireg) >> 18) & 0x1) +#define AIA_IREG_VGEIN(__ireg) (((__ireg) >> 20) & 0x3f) +#define AIA_IREG_XLEN(__ireg) (((__ireg) >> 24) & 0xff) + +typedef int (*aia_ireg_rmw_fn)(void *arg, uint32_t reg, uint64_t *val, + uint64_t new_val, uint64_t write_mask); +#endif + typedef struct PMUCTRState { /* Current value of a counter */ uint64_t mhpmcounter_val; @@ -466,20 +484,8 @@ struct CPUArchState { void *rdtime_fn_arg; =20 /* machine specific AIA ireg read-modify-write callback */ -#define AIA_MAKE_IREG(__isel, __priv, __virt, __vgein, __xlen) \ - ((((__xlen) & 0xff) << 24) | \ - (((__vgein) & 0x3f) << 20) | \ - (((__virt) & 0x1) << 18) | \ - (((__priv) & 0x3) << 16) | \ - (__isel & 0xffff)) -#define AIA_IREG_ISEL(__ireg) ((__ireg) & 0xffff) -#define AIA_IREG_PRIV(__ireg) (((__ireg) >> 16) & 0x3) -#define AIA_IREG_VIRT(__ireg) (((__ireg) >> 18) & 0x1) -#define AIA_IREG_VGEIN(__ireg) (((__ireg) >> 20) & 0x3f) -#define AIA_IREG_XLEN(__ireg) (((__ireg) >> 24) & 0xff) - int (*aia_ireg_rmw_fn[4])(void *arg, target_ulong reg, - target_ulong *val, target_ulong new_val, target_ulong write_mask); - void *aia_ireg_rmw_fn_arg[4]; + aia_ireg_rmw_fn aia_ireg_rmw_cb[4]; + void *aia_ireg_rmw_cb_arg[4]; =20 /* True if in debugger mode. */ bool debugger; @@ -648,12 +654,8 @@ void riscv_cpu_interrupt(CPURISCVState *env); #define BOOL_TO_MASK(x) (-!!(x)) /* helper for riscv_cpu_update_mip value = */ void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(void *), void *arg); -void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, privilege_mode_t pr= iv, - int (*rmw_fn)(void *arg, - target_ulong reg, - target_ulong *val, - target_ulong new_val, - target_ulong write_mask), +void riscv_cpu_set_aia_ireg_rmw_cb(CPURISCVState *env, privilege_mode_t pr= iv, + aia_ireg_rmw_fn rmw_fn, void *rmw_fn_arg); =20 RISCVException smstateen_acc_ok(CPURISCVState *env, int index, uint64_t bi= t); diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index ac59496c22..1c86ecdb2c 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -88,11 +88,11 @@ static void riscv_imsic_update(RISCVIMSICState *imsic, = uint32_t page) } =20 static int riscv_imsic_eidelivery_rmw(RISCVIMSICState *imsic, uint32_t pag= e, - target_ulong *val, - target_ulong new_val, - target_ulong wr_mask) + uint64_t *val, + uint64_t new_val, + uint64_t wr_mask) { - target_ulong old_val =3D imsic->eidelivery[page]; + uint32_t old_val =3D imsic->eidelivery[page]; =20 if (val) { *val =3D old_val; @@ -106,11 +106,11 @@ static int riscv_imsic_eidelivery_rmw(RISCVIMSICState= *imsic, uint32_t page, } =20 static int riscv_imsic_eithreshold_rmw(RISCVIMSICState *imsic, uint32_t pa= ge, - target_ulong *val, - target_ulong new_val, - target_ulong wr_mask) + uint64_t *val, + uint64_t new_val, + uint64_t wr_mask) { - target_ulong old_val =3D imsic->eithreshold[page]; + uint32_t old_val =3D imsic->eithreshold[page]; =20 if (val) { *val =3D old_val; @@ -124,8 +124,8 @@ static int riscv_imsic_eithreshold_rmw(RISCVIMSICState = *imsic, uint32_t page, } =20 static int riscv_imsic_topei_rmw(RISCVIMSICState *imsic, uint32_t page, - target_ulong *val, target_ulong new_val, - target_ulong wr_mask) + uint64_t *val, uint64_t new_val, + uint64_t wr_mask) { uint32_t base, topei =3D riscv_imsic_topei(imsic, page); =20 @@ -149,11 +149,11 @@ static int riscv_imsic_topei_rmw(RISCVIMSICState *ims= ic, uint32_t page, =20 static int riscv_imsic_eix_rmw(RISCVIMSICState *imsic, uint32_t xlen, uint32_t page, - uint32_t num, bool pend, target_ulong *val, - target_ulong new_val, target_ulong wr_mask) + uint32_t num, bool pend, uint64_t *val, + uint64_t new_val, uint64_t wr_mask) { uint32_t i, base, prev; - target_ulong mask; + uint64_t mask; uint32_t state =3D (pend) ? IMSIC_EISTATE_PENDING : IMSIC_EISTATE_ENAB= LED; =20 if (xlen !=3D 32) { @@ -178,7 +178,7 @@ static int riscv_imsic_eix_rmw(RISCVIMSICState *imsic, continue; } =20 - mask =3D (target_ulong)1 << i; + mask =3D 1ull << i; if (wr_mask & mask) { if (new_val & mask) { prev =3D qatomic_fetch_or(&imsic->eistate[base + i], state= ); @@ -197,8 +197,8 @@ static int riscv_imsic_eix_rmw(RISCVIMSICState *imsic, return 0; } =20 -static int riscv_imsic_rmw(void *arg, target_ulong reg, target_ulong *val, - target_ulong new_val, target_ulong wr_mask) +static int riscv_imsic_rmw(void *arg, uint32_t reg, uint64_t *val, + uint64_t new_val, uint64_t wr_mask) { RISCVIMSICState *imsic =3D arg; uint32_t isel, priv, virt, vgein, xlen, page; @@ -400,7 +400,7 @@ static void riscv_imsic_realize(DeviceState *dev, Error= **errp) } =20 if (!kvm_irqchip_in_kernel()) { - riscv_cpu_set_aia_ireg_rmw_fn(env, (imsic->mmode) ? PRV_M : PR= V_S, + riscv_cpu_set_aia_ireg_rmw_cb(env, (imsic->mmode) ? PRV_M : PR= V_S, riscv_imsic_rmw, imsic); } } diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 4529341696..ae0490a086 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -816,17 +816,13 @@ void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint= 64_t (*fn)(void *), env->rdtime_fn_arg =3D arg; } =20 -void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, privilege_mode_t pr= iv, - int (*rmw_fn)(void *arg, - target_ulong reg, - target_ulong *val, - target_ulong new_val, - target_ulong write_mask), +void riscv_cpu_set_aia_ireg_rmw_cb(CPURISCVState *env, privilege_mode_t pr= iv, + aia_ireg_rmw_fn rmw_fn, void *rmw_fn_arg) { if (priv <=3D PRV_M) { - env->aia_ireg_rmw_fn[priv] =3D rmw_fn; - env->aia_ireg_rmw_fn_arg[priv] =3D rmw_fn_arg; + env->aia_ireg_rmw_cb[priv] =3D rmw_fn; + env->aia_ireg_rmw_cb_arg[priv] =3D rmw_fn_arg; } } =20 diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 29db646589..4dd6c93e51 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -2673,6 +2673,7 @@ static RISCVException rmw_xireg_aia(CPURISCVState *en= v, int csrno, uint8_t *iprio; privilege_mode_t priv; uint32_t vgein; + uint64_t wide_val; =20 /* VS-mode CSR number passed in has already been translated */ switch (csrno) { @@ -2717,16 +2718,17 @@ static RISCVException rmw_xireg_aia(CPURISCVState *= env, int csrno, } } else if (ISELECT_IMSIC_FIRST <=3D isel && isel <=3D ISELECT_IMSIC_LA= ST) { /* IMSIC registers only available when machine implements it. */ - if (env->aia_ireg_rmw_fn[priv]) { + if (env->aia_ireg_rmw_cb[priv]) { /* Selected guest interrupt file should not be zero */ if (virt && (!vgein || env->geilen < vgein)) { goto done; } /* Call machine specific IMSIC register emulation */ - ret =3D env->aia_ireg_rmw_fn[priv](env->aia_ireg_rmw_fn_arg[pr= iv], + ret =3D env->aia_ireg_rmw_cb[priv](env->aia_ireg_rmw_cb_arg[pr= iv], AIA_MAKE_IREG(isel, priv, virt, vgein, riscv_cpu_mxl_bits(env)), - val, new_val, wr_mask); + &wide_val, new_val, wr_mask); + *val =3D wide_val; } } else { isel_reserved =3D true; @@ -2959,6 +2961,7 @@ static RISCVException rmw_xtopei(CPURISCVState *env, = int csrno, int ret =3D -EINVAL; privilege_mode_t priv; uint32_t vgein; + uint64_t wide_val; =20 /* Translate CSR number for VS-mode */ csrno =3D aia_xlate_vs_csrno(env, csrno); @@ -2984,7 +2987,7 @@ static RISCVException rmw_xtopei(CPURISCVState *env, = int csrno, }; =20 /* IMSIC CSRs only available when machine implements IMSIC. */ - if (!env->aia_ireg_rmw_fn[priv]) { + if (!env->aia_ireg_rmw_cb[priv]) { goto done; } =20 @@ -2997,10 +3000,11 @@ static RISCVException rmw_xtopei(CPURISCVState *env= , int csrno, } =20 /* Call machine specific IMSIC register emulation for TOPEI */ - ret =3D env->aia_ireg_rmw_fn[priv](env->aia_ireg_rmw_fn_arg[priv], + ret =3D env->aia_ireg_rmw_cb[priv](env->aia_ireg_rmw_cb_arg[priv], AIA_MAKE_IREG(ISELECT_IMSIC_TOPEI, priv, virt, vgein, riscv_cpu_mxl_bits(env)), - val, new_val, wr_mask); + &wide_val, new_val, wr_mask); + *val =3D wide_val; =20 done: if (ret) { @@ -4504,7 +4508,7 @@ static RISCVException read_vstopi(CPURISCVState *env,= int csrno, target_ulong *val) { int irq, ret; - target_ulong topei; + uint64_t topei =3D 0; uint64_t vseip, vsgein; uint32_t iid, iprio, hviid, hviprio, gein; uint32_t s, scount =3D 0, siid[VSTOPI_NUM_SRCS], siprio[VSTOPI_NUM_SRC= S]; @@ -4519,13 +4523,13 @@ static RISCVException read_vstopi(CPURISCVState *en= v, int csrno, if (gein <=3D env->geilen && vseip) { siid[scount] =3D IRQ_S_EXT; siprio[scount] =3D IPRIO_MMAXIPRIO + 1; - if (env->aia_ireg_rmw_fn[PRV_S]) { + if (env->aia_ireg_rmw_cb[PRV_S]) { /* * Call machine specific IMSIC register emulation for * reading TOPEI. */ - ret =3D env->aia_ireg_rmw_fn[PRV_S]( - env->aia_ireg_rmw_fn_arg[PRV_S], + ret =3D env->aia_ireg_rmw_cb[PRV_S]( + env->aia_ireg_rmw_cb_arg[PRV_S], AIA_MAKE_IREG(ISELECT_IMSIC_TOPEI, PRV_S, true, ge= in, riscv_cpu_mxl_bits(env)), &topei, 0, 0); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605928; cv=none; d=zohomail.com; s=zohoarc; b=UNUr2BdhJCy9Bjeul7sGv35tV+3yC1sAzxsGmSJo710VrPp7gLvnc4duHTSPRtPmg8s55ljEOeTU0l/kVh2KGXZ84EPgt1G5vkwPeGZss8aSRF4ixB20COP8/3Fbn2VZPkOdtFdzWpK3mKWv64WQdfDymaZ8xfeppD09FJwuLV0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605928; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=4TnZbo83Oivu2UJ9QwpQikoITuKpWmQjIVYnelr1oZ8=; b=m/fOEJhb2npehPPmj7j98UF6SkCP4J0ic1rg5xv6htIGQAq2edeyAUzaZlekFThoR9z0Ik7Yqw5S2oynthWqzfaYJNc9pioPnRYildvD2EXjLiGqs9zmWym15uOkqPaxm6vAQilSU9FRkwT4oHfjLeANeyj8b++jFo2ftTRyVFA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605928421961.3313002997808; Tue, 16 Jun 2026 03:32:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhN-0000S5-5H; Tue, 16 Jun 2026 06:07:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhL-0000JO-76 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:11 -0400 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhJ-0003Mp-GN for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:10 -0400 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-c85ba774551so1573131a12.0 for ; Tue, 16 Jun 2026 03:07:09 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604428; x=1782209228; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4TnZbo83Oivu2UJ9QwpQikoITuKpWmQjIVYnelr1oZ8=; b=EFKQRcf6rG/KyEMNJ6saeQ9GBWLnzp+ZTmX52fAk0jbJTXfdbX9PCLVnLOrIa7shJW m9OF75YCyjoVr7U2siVsf+UY+tbyknJLLIGjY9OFI4YwduEHNP+NfvO9KXEyFjTZE73P xfr4odaaHWk7Ys0LOq9I71g2tw4epPGtUlV7NpjBXxuDiEqiiwIap2mLuAJqayucZZdZ tkL6JxsGhtzmhdcuyk+vY4DG8ickbVEIty9h5/Daur5Cf5d2ZArsJ7RPAwrH1fplRTrh l9EuIlly1GLQPT6uy4VvNonNBb0mqZmE2HPmcWW0XSHe3QvmjNa2VwEzrOsg7/QAHiWU t5GA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604428; x=1782209228; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=4TnZbo83Oivu2UJ9QwpQikoITuKpWmQjIVYnelr1oZ8=; b=Tt4RlkcnKiZBkKSc4mNcaqli7bk5F0wOJLkdGIHYa5bsLkj4JU+9lS1b5VkSfdBdAB 4zpWKJxfvGW4loW23HEz0JC3KTWAunRT+Tv/b4Tn1PaXBQSRqH/GNi+KXnqsIuj6/EeS Jv9c9PswcxcKvZbAydLUZYBNToTCguxS3ruAXjRPUm3Wi8VjV0Cn9ouJd8tTs7Iqs9yf TvFB7UcvSVoPuwZHwQ/aZ2O6OUKSAKJS/uU3y6aVkocWwGYdOv47G3I4yILwG5nbvVbY kV6aWOdPwLvkHC4FKtPCCr9CfXfxxXJib4tc0SrUee9XwGrqt7S1oQsehW/nGFARSITA G4NQ== X-Gm-Message-State: AOJu0YywRjexUxuwG1r6nKbVDu5lePWuyBN4LZlLN/KhZRPY2vSGrCsm Qd4S7iJ8Hm36BHeLZJSyxw9VZRVo9cmwOl9M//61XgXIKk0KcbjY4+lpg2MnlWE3 X-Gm-Gg: Acq92OFqFDJz2m25/zWMc/JQyB9St4DoocNhpMMqLQ1CNaPFs1zb+sVEWmp+cCFcQyY J6716otqPybri4gOmgcHCHcvb/FqDB3IAVb8hDW4xPqM4Cp4ZAYNlZYWJ+vh3fd/6iClk3Y6AlN uUiYjzuyDvEMKt3Vnn+z1uvxi0kMUBo/B0SzF3+NFh6PYW8LaPW2dc2SuJxZW4fM/LgmsVw/lbV wgX2Ow+r/DMn7imOXtnq5BMArn4TSElV7lRQvxwcw4u3MP1iZSykgN/iexxtX87YyeAgdXD+lwx r2oWq4aymdQiiA0gKxWos5mIMVCaAoW6Y/vZCFo0r8xpjMIcAMt8cWljPYj3UoyEVEZCxdyRlHs /RzTliYLf5xns090shxDfWprOvaKlaoWsWYKN4r0hr7sfSvakkwqp0295jHcr4UQPt3q/uFU/9i 79fKoHLQoiYxZGHCfvSp5KwTsoBqpTDhVYvSWnQGJD X-Received: by 2002:a05:6a20:9f48:b0:3b2:86e8:a817 with SMTP id adf61e73a8af0-3b796409353mr16761094637.31.1781604428245; Tue, 16 Jun 2026 03:07:08 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 27/83] target/riscv: Fix size of irq_overflow_left Date: Tue, 16 Jun 2026 20:04:30 +1000 Message-ID: <20260616100527.1939565-28-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605930089158500 From: Anton Johansson Fix to 64 bits to hold all relevant values. Also update comment to reflect that irq_overflow_left stores the ns beyond INT64_MAX until the next overflow, this to account for the uint64_t/int64_t timer value difference between RISCV/QEMU. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-ID: <20260520125406.28693-17-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 380749f9a8..5d01672f12 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -224,8 +224,8 @@ typedef struct PMUCTRState { uint64_t mhpmcounter_val; /* Snapshot value of a counter */ uint64_t mhpmcounter_prev; - /* Value beyond UINT32_MAX/UINT64_MAX before overflow interrupt trigge= r */ - target_ulong irq_overflow_left; + /* Value beyond INT64_MAX before overflow interrupt trigger */ + uint64_t irq_overflow_left; } PMUCTRState; =20 typedef struct PMUFixedCtrState { --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605847; cv=none; d=zohomail.com; s=zohoarc; b=QtSxTZgkMM5oy419nwVqjj/ZhvEqslLs8vS8I1XhebEMGYOaCRMckeczcqRDr4q1zmVAhkGtCYjp6ftORzLxFqYXPLdhTLHwIQedslr6o/CtiefPmfMRt58+6YARAA+24wH1xKVj1TEmKInWxVRvVZOMaerMliOcc/z17QOHWmw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605847; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qKn6Uqir0rU27VFly5gOIip/ZmHPwqNDrsn5rg+vJ6M=; b=EE0+jPVpx+fCcalr98qrA3ENmUtIcpLWCVbn4RrL18sO1eKdvj2rfrnPA4gdz/cMzrRmZHVCSbPsnexi7rDsMmij1/2vIsq9dFErCwygI1+gRMH1f5jTLpP0y2vbfLZEyaxrSWn37FOLreKhUdzZBxbqKJulfq6pYtkPJFajNww= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605847346337.01841338729537; Tue, 16 Jun 2026 03:30:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhQ-0000YR-Kg; Tue, 16 Jun 2026 06:07:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhO-0000Sj-GK for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:14 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhN-0003OC-1Y for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:14 -0400 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-c8583b8fd89so2609145a12.0 for ; Tue, 16 Jun 2026 03:07:12 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604432; x=1782209232; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qKn6Uqir0rU27VFly5gOIip/ZmHPwqNDrsn5rg+vJ6M=; b=XBN5rbYFkyCylV47bZUj/yuzMtnOC06rplTPKcpyJERTe+ivdQ+fe9KYC0WptqSx9m JyR8Ad1vc6Z6ke8irF6fnKGhITLjLzQdbI/ZSekP2DPo+eLluh57R/ZZ5SfjtygtEZLs UX55xqU9O2wsyoQ3zHZzZfdOS4CDgta9ufpcUv8J5Xaq84U1qZJUzX2qSLPUjUPRD0yb CoAgHtnB+Kz2aM8JNCljzcmoM8hDC/xXslr5vfMxICeOHnfdSbIwHi7CQqRAACHp3AjL 9Wm7CsgcmSZQWJmWhqHKi9jWYbRaakL5kAMuVzAP7A5rsRCsuDhRIRvthjZJKGSfzYM3 4Eaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604432; x=1782209232; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=qKn6Uqir0rU27VFly5gOIip/ZmHPwqNDrsn5rg+vJ6M=; b=aKxcWfpRQuNeWxrsvpi5CFm6of8rG/azdzolJv+Wz5zOmxAziZ97AQlOg03a382LJH DVbIGcfV6RaRHyUhd1KO9kl264tYR57l2Glnb481Xk+lVUaMk3u9SDMCbM6RjeXTsGto sxNb9I5jJG/+Vc2iYOQEZgxigXrie5DwehzdoRv75fV5Q56iSb9c7mRUGTvwPG61mdIy Tm8jCTxg6/t/s30o+PD9G9XWymc0sO9cYFszZ4hhIhFkGQncpwsx46u/FzlYTA7rnZFB IpYVK2BHiH1a5AwxPpAXcVKTH4NqVGweB/E3jsnzbGsvnDZFOpeiGSgfgpO79SK2FBFe VPYw== X-Gm-Message-State: AOJu0YwU7t2uMLvNHYPN+XFd3kRcbp/WXvZxX5EoYa8ASUOhosoCNG/D zndGrO4scrcFrHQlUwZmAoEgLEfNlEDPWqrPqrDgEGhK3v7ERRWByLeHh49/UwUM X-Gm-Gg: Acq92OG7sUXOLQGYC6CM9KK2sfOeh/GwTO/O84gRbXmHRO7cs93Py/6A/caSp4xVwHP 2o33DkpXcdnHapFK969AIeT1aONoGmHKzO5VHhfP1s8YAYBSa/kxOOhquU2YLd2rmMikt0OWOFM FmHC8wJohIHSoT6+1zjnr+av+Jrt9SFkAP0Op3OJW9qbms189L5uNIIHEw+3USMu9iSb6nG8z1M tTyidPhJuOXCDwl5wG+GcNuafiIn2x/hQye7V64tfs6SL87aPhEUSc3z9yOrLRLl5eX+pdc9l5/ VT6T/ukjObIYmlzAoM77Cq3dMBlrYIRY0t/aP5OIq3E3MVbOOeZXY5anaew7QITIA9dH9Hhyabc iI9DDB7+jHbN/y3Offri317q+HwDnkCmn5QRBhOLmSSr/gABELE1f000jQixxxcmfBSdBKQehR2 owwwRT880sKSIV7zcXb0t6zOKnq9AYEAOvnWMcZsrC X-Received: by 2002:a05:6a21:4a98:b0:3b4:b216:2b26 with SMTP id adf61e73a8af0-3b783c7847emr19949727637.5.1781604431753; Tue, 16 Jun 2026 03:07:11 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 28/83] target/riscv: Indent PMUFixedCtrState correctly Date: Tue, 16 Jun 2026 20:04:31 +1000 Message-ID: <20260616100527.1939565-29-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=alistair23@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605847591158500 From: Anton Johansson Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-ID: <20260520125406.28693-18-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 5d01672f12..6477c7de99 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -229,12 +229,12 @@ typedef struct PMUCTRState { } PMUCTRState; =20 typedef struct PMUFixedCtrState { - /* Track cycle and icount for each privilege mode */ - uint64_t counter[4]; - uint64_t counter_prev[4]; - /* Track cycle and icount for each privilege mode when V =3D 1*/ - uint64_t counter_virt[2]; - uint64_t counter_virt_prev[2]; + /* Track cycle and icount for each privilege mode */ + uint64_t counter[4]; + uint64_t counter_prev[4]; + /* Track cycle and icount for each privilege mode when V =3D 1*/ + uint64_t counter_virt[2]; + uint64_t counter_virt_prev[2]; } PMUFixedCtrState; =20 struct CPUArchState { --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605350; cv=none; d=zohomail.com; s=zohoarc; b=Uf1MCWlG8l+iDOXlbKkh6OofQbcpqMhc/aH6qUkkv9/KCoKD5ifRyiRIwcCjRZXOm7FvhVM9lAaozmTEq0EGVSn16TQlwQUEVcUusAGo6T0zO7YUmIIxZMSjlvnIFgSGF0tqb+2CrKyeNcF49gsfDLcMWIBF2iZWhzOJGDs4xeI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605350; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Fo8RfBkdy4Aa8xwG5toPk/LTT+2RXG0B985ij9QtC/Y=; b=ckYbMFP5YlMGdnG+ANgkb7glyPX0wCCFhxWgtrl7cMfpNjwbm5wnr6CGXRawK10wU3oc/Qez0BmkHaFI9ROTgTlK9sfOAR5FwFGsggVDA3qwKWAr0L2V/thMvg28OPPKZCtV230lPA+Lk/mo47FqVsNpHlRBt85shHOSv8wI8nM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605350686853.7809155201923; Tue, 16 Jun 2026 03:22:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhU-0000vE-7n; Tue, 16 Jun 2026 06:07:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhS-0000iE-9V for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:18 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhQ-0003RN-Lt for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:18 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c85a297d2d2so2648195a12.0 for ; Tue, 16 Jun 2026 03:07:16 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604435; x=1782209235; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Fo8RfBkdy4Aa8xwG5toPk/LTT+2RXG0B985ij9QtC/Y=; b=XOIcZAt5EyLhlmNAa7s4JRadDnYdwUmQEl76ZiT8iZ9r7Xnm2IYqd9MLlc6Vu3h87p RW81VRFEPWH8JqjMzzlPw5mIYTkefS4eETjODcMbWPlruBY5ZOKLZksTDVfdpIwr3FM5 4aH20MBA6N8VK8+QUQJPTPrUbyn8Bjhe6vgiEsrKzAn2e7Au+JvYUK2Nz2nM3o+qHrMh aZYaS7s8iBmkW+hDtzYOq0LqH8g8Zse7x3qjinoGcjsP2pCgGGlXVz1FoYtKULDR3tIK fw5R5J2fVLZa86HKEN5Z1u6fBk6nBlaQavm8IzgO4EQk7qOu5a5rcRAF/wxzvridQhOf 0ziQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604435; x=1782209235; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Fo8RfBkdy4Aa8xwG5toPk/LTT+2RXG0B985ij9QtC/Y=; b=WW1hUGH1AmHDgYZuG4rfyJ2UawwGkaP7G+0D2QhVTVCa2BK6LsWfYrLlKIVqzm2xHn pkIG0IFCPPFzdBqOjUUywgKnKRIbJzmotYJC6f4YzE4z1fRrDAqc7duWuvNgIxehAdgy flNlLUQUVOwbV4DMM254rwfGkOzzA0+Vh3o3J4XsKedDYl5o/D9w+4TLAzrgH+cl+O38 wN3k7euEEHpWYPuxXMNIGK25KnXk6xZF2YiwtP0u/p2T/cH4HmPcO9Zr4irkUCN4kcFp ARvVvvTyU6CVmipHfDzuIZZq3NHLEaG9gissrB93mLrMfwFhGb1bV7Cz8kWU9tEAJIhp cbDg== X-Gm-Message-State: AOJu0YxpjYyDCi1KkqoVph2ai2pFmCIjqk1KsU/SZudNKySzbHQhEF+F v+5k0PEM8nrjmjBbwY9eph8wP0/yjuxuk5UzgDRt7tFwwAoq9yhOtTSbbyML3eH7 X-Gm-Gg: Acq92OEJF5aQX4yNG8KFHV1dG7nUNxfKdelrUIW2iwn+218MMty7ZyGELwwK9AB9CQi YbEhHAYFGEsJExqf50AKSLZYv91z0LOYWfiNmCe04KK1aphbXrsiXzv0lh54puEK2VaRrBxot/B pDuCBqF55D/D5Di9zvHGo02mOhAU3NlCH6xFKlUrU4HJHgJp2M4ImPbX7Fou0SywCc1YLHnFpwJ ahupcTbQvXloa0FWsFYQmpZSKZbENA7XHOVQDcWMXN5df6QO5ITSwNeJfcAXpLTEqiodUHUPJcu jrmxblgt0Dwo6a1vX2CVky56rRlC8AnNWqEtAec/UBfasGg/vCv2fU9kwAzVqUBLyyBarDqEnkk 7a3clggWbMgDzDNNHF6+W/RG/BnpN40/CXgACv+/U+XgsgK11/a4g1tbyeZ8N4EeTqDR5ufMyNK Dd3PG5H4weoFibm/tmgqROg+uhLWd17NJ+1S8z9Jsz X-Received: by 2002:a05:6a20:94ce:b0:3a0:adc5:52c1 with SMTP id adf61e73a8af0-3b7e473ff32mr3275654637.11.1781604435243; Tue, 16 Jun 2026 03:07:15 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 29/83] target/riscv: Replace target_ulong in riscv_cpu_get_trap_name() Date: Tue, 16 Jun 2026 20:04:32 +1000 Message-ID: <20260616100527.1939565-30-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605352992158500 From: Anton Johansson Fix cause argument to 64 bit to match env->mcause. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-ID: <20260520125406.28693-19-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/cpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 6477c7de99..a92cb249fa 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -603,7 +603,7 @@ extern const char * const riscv_int_regnamesh[]; extern const char * const riscv_fpr_regnames[]; extern const char * const riscv_rvv_regnames[]; =20 -const char *riscv_cpu_get_trap_name(target_ulong cause, bool async); +const char *riscv_cpu_get_trap_name(uint64_t cause, bool async); int riscv_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, DumpState *s); int riscv_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index c063604298..e792655cc2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -386,7 +386,7 @@ static const char * const riscv_intr_names[] =3D { [IRQ_PMU_OVF] =3D "counter_overflow", }; =20 -const char *riscv_cpu_get_trap_name(target_ulong cause, bool async) +const char *riscv_cpu_get_trap_name(uint64_t cause, bool async) { if (async) { if ((cause < ARRAY_SIZE(riscv_intr_names)) && riscv_intr_names[cau= se]) { --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607804; cv=none; d=zohomail.com; s=zohoarc; b=PWliJHBlPA/qgJlPSdDOKGooF8DnrrPJujKsGMSb/KTLbrKMv3OZy4NV7a/j4s4SsrCHGYKkZzTsusRqBEdUkoykipGXmRd7yA57Z9aadNquO5m9htn1QMkInFKvQgnUKrUR1mJv3b4Csso+Oh3u++N9YPZuxQG2tb2nQGuYFks= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607804; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=vtqmoh4dg8khN5cnWu/i5fmQVO199sh9k7HIZoSec9Y=; b=ToTeR+SlLAXit6B6D9ysqLjS1PWgSIDE3uubhuHrSZ7/dcYDX4WEUCeWKTHVjcTTmYZhGiWwgFiRXwe4J+lArxgYJ8NInr2S3LTjxVQDDqZHAxSo+OMnRnatfEen0JTruSIEc1T74zx6y2TG1lPBV/ypyypCYvgnDjOxOz2rLCo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607804327730.6415979215242; Tue, 16 Jun 2026 04:03:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhY-0001QV-Ba; Tue, 16 Jun 2026 06:07:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhV-0001AL-R9 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:21 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhU-0003SV-5O for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:21 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c85a2ca7bf7so1608285a12.3 for ; Tue, 16 Jun 2026 03:07:19 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604439; x=1782209239; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vtqmoh4dg8khN5cnWu/i5fmQVO199sh9k7HIZoSec9Y=; b=UjqE5BY2bqLF0eKU/78Bz3wxLdDyNVLBWthxcaLRfMRFkvP1TIJWgDXigf4t1IwWfp rR/AUwHFbULpKBG9CgftrdOI2NDMvT/0h+BLXRegn5SLQxc+gim7aWpLQSrIwQRzSCPc OnsWNa/dr+q7ERiYECvbKutnhFd7KHJgcyeNl3pu9ew4KLLzlXleU4Jv4UyJbG3qgQwZ bIM5TgA74WjR8JiWBmd+LoHhBJodZKViNY9NM6XhjgI0NLJ41rknhuFwcFdG1yxY1998 /0EdxJHJoBFuWckP1d+PsbpGWtGL1NLttPeA+yxxILi9aCSpyEVcvGak3zmKVcR9r5e0 jbGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604439; x=1782209239; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=vtqmoh4dg8khN5cnWu/i5fmQVO199sh9k7HIZoSec9Y=; b=Y2xxhv6mM99wVa6G+dIaoyRs2jBA5cFzXzJdHUuaGaefnupPa64jYpAPF0c+PRctir mvqvYWUn4Ww4zvztpu6St0cQI8Uahsm58nvZYU+GBfDWezU8s3cHRrLSqeAbXZWZiKDq jmqy4m6nlpQAP1/UQEX0QLG/RC04UyD/h9CwS22ehPYMKCHgwfH9gAPUGeX8cWb9aJu3 BhgbAMagkPEvoZkurK2sR0dMEvBFMTzNscqlepOOuAJ695eD69b9m/Z3Vq4chqe3Ywv3 ZBLX7iQqDowhdWVk1ZNMw8TrsIkWf6WbHyS0oZy6IJ6jybydH8/M+tQGE51tG91nKSI5 0sOQ== X-Gm-Message-State: AOJu0YyBtrhn0HGfFXmivkqOOooz8CQYmLC8bG0hZn9qGK5eAhQtkSe3 R01626jRbVachjt9Qhke+jQ758Odkf4oSdwy/OEKAWvBPchhlRJiL3RS40Ehw1Iq X-Gm-Gg: Acq92OGFt7TFTgcoL5mJ63IM7kBtNQEYvThuMXOr+taQwEt44b0AAtxPe+uuvGWKdgQ qXlY8p3UJlM2udYyt7yerYY0PCe+gHc6MPHDkEAipfbAyQFJnq+0+hwNWwquvUaheSDPINtl35t tlGIErpbi8oi4sMxTebNRboHVmujEY0WBTbvloWbVcakhgtsFgsmzEXgpUptEtA+rW6R2IwKnq9 koKOc8S1s1XdnD9NxTFkL0Jplx7ZCFwZgYhNO9UFMuTZwwQiqbWnX+ursufhF/NIviVnL7Wr5f2 OuAsOjSp9C+YfdPct5SUaF72Hj70TvumllecqEcnsedPhWtueT6eJP8mOqr5A+sxXy1orwX0VgF w0d1It2SU6ucg3xqGAUWWw+hCjtv/XDTvslt7ltiycCc/3nEQI43H3I5SkQWeZFk0RV/ZSYTYwT rTfI0wf5U1XM27rho9czS+VqCD5L9bTSaqOc6m9z2n X-Received: by 2002:a05:6300:4049:b0:3b4:7236:1b5 with SMTP id adf61e73a8af0-3b783f66890mr20953213637.26.1781604438786; Tue, 16 Jun 2026 03:07:18 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 30/83] target/riscv: Replace target_ulong in riscv_ctr_add_entry() Date: Tue, 16 Jun 2026 20:04:33 +1000 Message-ID: <20260616100527.1939565-31-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607805539158500 From: Anton Johansson Widen to 64 bits in size to hold all relevant values. Note: src and dst arguments change from signed to unsigned but no functional change is incurred. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-ID: <20260520125406.28693-20-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 5 +++-- target/riscv/cpu_helper.c | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index a92cb249fa..48d5c769f1 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -664,8 +664,9 @@ RISCVException smstateen_acc_ok(CPURISCVState *env, int= index, uint64_t bit); void riscv_cpu_set_mode(CPURISCVState *env, privilege_mode_t newpriv, bool virt_en); =20 -void riscv_ctr_add_entry(CPURISCVState *env, target_long src, target_long = dst, - enum CTRType type, privilege_mode_t prev_priv, bool prev_virt); +void riscv_ctr_add_entry(CPURISCVState *env, uint64_t src, uint64_t dst, + enum CTRType type, privilege_mode_t prev_priv, + bool prev_virt); void riscv_ctr_clear(CPURISCVState *env); =20 void riscv_translate_init(void); diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index ae0490a086..57e6f8217c 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -977,8 +977,9 @@ static bool riscv_ctr_check_xte(CPURISCVState *env, * entry =3D isel - CTR_ENTRIES_FIRST; * idx =3D (sctrstatus.WRPTR - entry - 1) & (depth - 1); */ -void riscv_ctr_add_entry(CPURISCVState *env, target_long src, target_long = dst, - enum CTRType type, privilege_mode_t src_priv, bool src_virt) +void riscv_ctr_add_entry(CPURISCVState *env, uint64_t src, uint64_t dst, + enum CTRType type, privilege_mode_t src_priv, + bool src_virt) { bool tgt_virt =3D env->virt_enabled; uint64_t src_mask =3D riscv_ctr_priv_to_mask(src_priv, src_virt); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605814; cv=none; d=zohomail.com; s=zohoarc; b=hF7mO+hVyJ2hRewUQyflJYsAFu8f0BfljhIQAnAYzALj7Rg0ZTrb6XrM53Sj39BitqwD6ecKs49Ars/tLulKI5M8tXTCxmUvmJGSNixJU/5/UKC8JlTCbHRvjMz3km5l7bY+9ZjT/vT7+WP8gJOtXwbGGRMVUvjnDUY2hghhIho= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605814; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=4niY5r5fgwLd4NzvX3v5BZyv3X55J8xjoqPGbl4BPcw=; b=Rw5l/Y72sGgad2aECWHF6DDPiq5juoSzzFhj5jB7V05ms7DDgj6nRJSc+AHN9eUwwJaIIrux2cg//PLgYz8MEh2ThbSR/481sPUIPorYaHTWiTR6ufFyOee+vq0SgdVteDKLbouohbewaDnCgQmQYnSFQ//qVU+ISP+5isDYqUM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605814544403.45141969394274; Tue, 16 Jun 2026 03:30:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhm-0001iW-VZ; Tue, 16 Jun 2026 06:07:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhZ-0001a8-QP for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:27 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhY-0003Sr-2c for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:25 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-36d98b68d68so2907900a91.2 for ; Tue, 16 Jun 2026 03:07:23 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604443; x=1782209243; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4niY5r5fgwLd4NzvX3v5BZyv3X55J8xjoqPGbl4BPcw=; b=OITyXillDWuydd16qwsb7szITdWJrvvvrCBC0OenGVn3mh1OeAomIEW98Pwuoeb489 ZI8LlL2VJgVeDp9KZdi8rdOFBuD3IgXE4Ttng/k6J7FM+n9sU/riZr4a7216/Cimlkcr zVUz8ALLLdZvzkmJwdOi3KP0PEEiUfzAHO9HCGytBDd1lwUJimVTJETfs6e2iJrUi8e6 jtWSgDjBmFjXtGsiNWdZyuGo9YCv3+c6DRwf7gj6i/X2EBYn6HfxNe1Lk8OrMW9rVdTr K247YbasIqsMIT0DfH1mN0ZXiqeaFe62Vbl0biHHSAJbRcRwvehqVmqLjA7OmbfydoQD 4Wgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604443; x=1782209243; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=4niY5r5fgwLd4NzvX3v5BZyv3X55J8xjoqPGbl4BPcw=; b=jsQjIL3IpJf4Sv75CkatQcWmvJ96bp3Y9Y4cOFw1Us/0z9iHBz+BwVqeqHHxn4bFQ4 mdHoxAD9GhVianO/PqDgIG0KMiDy6TtogdBc0xqfXmmz/Qy7XsiCAk61SaRS7bx916eO rS059EIm3ew9kILHttYGnU3VX1OxvxBTqSXMq+NquKPEV2Z1sfwlEs7g1Bv11DanoXxr f37/deN90r93eDaV607SQJh7yH28lUkCAOrEBmYgvB5lrIgPBPpCY1VCkDmaBLmmErDc rQ5UUW/aEHdYxiTnFGHWCHjaQBSzqOz80oVGbdvJj0g3Fg6Dzwil1/elu30s59F0TNDH Mmmw== X-Gm-Message-State: AOJu0YyYwt6EY7srb0F14TXsLbRcscuVzMjxyoOwAWeg8I5GyTnunJKe kwpYK3DIvjaIg5dfJ24oqzOoIxrLzIRRM6ohvIn9JTtmXXy6ygg+EVn+acgceAQ+ X-Gm-Gg: Acq92OE6carFDa6COg1eFeGERiWiHXFqoehGPytwXYcomdSGGz6R0sy7DY/xVz9bzGT kyzdvBxMp5oIDDXYu0EOgE4ghDFWjGZ+qeqme36E43y0DiisQ2ycMnznbnlgmNJGluTIwICA2yB K38i67/BlxM2kVf60tGAZSqnTAjKxMj2IzaMTi2aUt9tFMXBxZxC3s5rmHC2zoocQBnuo3lX/vp T4a/0Hn3h0lOrjAChSwM5NRDcL4efAI0x5boq+GKjZmi2gl5jZOKdOjx8k8KFP52zqV7840uMob v3Xb9LQWc3JkYqL6sb1DTvPeMVVAs2Y6wNF87qKx9fPKbT0JbX8bNPjZsE7JGld4HaVNQ099PJW YS/lJ8nI3cEeWpmYFr/k9f76wHbg4scOpHTrjJwWzYl8XRDrpPgFNCRl9mc+2+5QlL417DIUzf4 xCI9fQ/LFvgrIMQzA97s8BiAelapsLcKuLEz7tzj08 X-Received: by 2002:a05:6a20:729a:b0:398:6ea8:21f7 with SMTP id adf61e73a8af0-3b79629990emr16135796637.15.1781604442640; Tue, 16 Jun 2026 03:07:22 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 31/83] target/riscv: Fix size of trigger data Date: Tue, 16 Jun 2026 20:04:34 +1000 Message-ID: <20260616100527.1939565-32-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605815280158500 From: Anton Johansson mcontext is at most 14 bits in size with the H extension, fix to 16 bits. trigger_cur indexes into tdata*[RV_MAX_TRIGGERS] which holds 2 elements, fix to 8 bits. This patch also adds a migration entry for mcontext which is used in tandem with other debug data that is already migrated. Note, the cpu/debug VMSTATE version is bumped, breaking migration from older versions. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-ID: <20260520125406.28693-21-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 10 +++++----- target/riscv/machine.c | 13 +++++++------ 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 48d5c769f1..45dc0393f9 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -468,11 +468,11 @@ struct CPUArchState { target_ulong mseccfg; =20 /* trigger module */ - target_ulong trigger_cur; - target_ulong tdata1[RV_MAX_TRIGGERS]; - target_ulong tdata2[RV_MAX_TRIGGERS]; - target_ulong tdata3[RV_MAX_TRIGGERS]; - target_ulong mcontext; + uint16_t mcontext; + uint8_t trigger_cur; + uint64_t tdata1[RV_MAX_TRIGGERS]; + uint64_t tdata2[RV_MAX_TRIGGERS]; + uint64_t tdata3[RV_MAX_TRIGGERS]; struct CPUBreakpoint *cpu_breakpoint[RV_MAX_TRIGGERS]; struct CPUWatchpoint *cpu_watchpoint[RV_MAX_TRIGGERS]; QEMUTimer *itrigger_timer[RV_MAX_TRIGGERS]; diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 45fd39994e..78ca607b48 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -240,15 +240,16 @@ static int debug_post_load(void *opaque, int version_= id) =20 static const VMStateDescription vmstate_debug =3D { .name =3D "cpu/debug", - .version_id =3D 2, - .minimum_version_id =3D 2, + .version_id =3D 3, + .minimum_version_id =3D 3, .needed =3D debug_needed, .post_load =3D debug_post_load, .fields =3D (const VMStateField[]) { - VMSTATE_UINTTL(env.trigger_cur, RISCVCPU), - VMSTATE_UINTTL_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS), - VMSTATE_UINTTL_ARRAY(env.tdata2, RISCVCPU, RV_MAX_TRIGGERS), - VMSTATE_UINTTL_ARRAY(env.tdata3, RISCVCPU, RV_MAX_TRIGGERS), + VMSTATE_UINT16(env.mcontext, RISCVCPU), + VMSTATE_UINT8(env.trigger_cur, RISCVCPU), + VMSTATE_UINT64_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS), + VMSTATE_UINT64_ARRAY(env.tdata2, RISCVCPU, RV_MAX_TRIGGERS), + VMSTATE_UINT64_ARRAY(env.tdata3, RISCVCPU, RV_MAX_TRIGGERS), VMSTATE_END_OF_LIST() } }; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605367; cv=none; d=zohomail.com; s=zohoarc; b=OQlKiRPbSWYocIGVJ++i4TDSV9EF9X8Ycubnx12foeO5A6E2z6iOfHlkozLobqL/zjBz9PBNA9y6AFsC2zrZVZYblF9sIE7MBWrYKPagebKdc4YTuOVh9kXAavTnTSgcK07yOVke84GhpwR/qSkC5EV/wwnH7TOBxgM4aaffBSo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605367; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kslYU5AYmj7thTXYRZ+gLiZ7/V0BzViJNUN2iFTUqIw=; b=CrrhlCiRMynnvTtxqm1P9KmY2mlyOUTIBBOqoW8vJbJQCXoZPyJC7bKgS9fuLpaet0SfjEF/04Lix7WKPZRyI+ggcSPB1NLGuXkVgBJ+Vz7WXgjol7tg+sbXo9XuZKIq0VSFv+0f1vZHsrQ33ixqfUbNpxcgRmoLQ90jyDGD4AM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605367626678.1719486687823; Tue, 16 Jun 2026 03:22:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQht-0001v3-0N; Tue, 16 Jun 2026 06:07:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhd-0001cX-Gb for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:30 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhb-0003T7-QH for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:29 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-36d98b68d68so2907950a91.2 for ; Tue, 16 Jun 2026 03:07:27 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604446; x=1782209246; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kslYU5AYmj7thTXYRZ+gLiZ7/V0BzViJNUN2iFTUqIw=; b=cFZLAc+ti2VvszoexjzdENul26DhcUCXXCvd5boJjddxg6oF+r0LAGo/v3zZeBG0tQ QOPR5koYdY82OIPkTUUdGAtTTOhf3A0MaZkz4xnMuW9F0LNxyNas5qVMO2263fh3zXu3 Tpq/r2I+2vFFrQPh9bOFZj9Jwk7mZfS/PDYkbRC59vgMbEtnYuUOm5duUWOIDSxrveGW r6S3jEW/w/2YxCrOKIsGe43nup2Quthc6R7n1uHHv9E8Sh/JInREgBrswKosfnffrR57 gBdr1Pz7syMTpILXGu8gin88JDkxsQn4XMlDaGu+d6GbgV95usCM4m/tPNqVzKGFypN6 fALQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604446; x=1782209246; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=kslYU5AYmj7thTXYRZ+gLiZ7/V0BzViJNUN2iFTUqIw=; b=VLLGmPaZdGwsFKMiJwBmBPtkYQpXT1cdvIAoqgDOPvcAZNU3GL0KUnjvjKqwlhGGFN 76rtd4f81vNhM16m+u2EkyebADp4C220P1ypCjdZMueP148hGOSTP3hUHiv2x/lW+Zt3 JAN3Deq9nuxT2f5I5h8avKhZnIlyLEJymKsYYh8iHx/KADi6ISmxk328AiSwgUDa7Za8 IznTfQNuPJZJqGAQ3bbad5CQKjhK3IQvhoMkS/ZakdelPgGGUfMGDI9u5s5CPyz9qYjg hyY32AqVqBRakpoTwKOcTgh3tQt+mRjXZVecl7jZp/z3248CUkbA7s/xH+Tm0ABXBtCx i7+A== X-Gm-Message-State: AOJu0YzHIn3Lr7SZ7CdG0FayF5lDI+XmYE0eeiVJ6WZwIJ+hzGOp88OA 3lqYo8r95ALw4Njs/wmNNPesI54u/HeDOGu95Ot4WwbAfZLldy8zz/Ys62gpVw7i X-Gm-Gg: Acq92OF3XQ3rpkcEuKRujX6hiPEd+gQ62EDqs92zaME1VsU3Q23X7EbTy1TOySLIjkk 2pcnTvTriW/GG62EF+xFVQszcYjIlOCLrtPBcVjSNKETXbIjLpEoPXxRFB7izeJ/RfqVWpOs6fM DgcJccCz/ovTxWiIrSNJn9XeiMp5aIWV+yEklrUQ9OcbUvtv80j/w1sbGA20eX8U+b+vnee+aak 6icFWqsGJci1fx6Vwx2h6ZQltCKrcpJHk/v06fPS3b2nZBP47WkpCi4C5sZogxArnINqRCVdNKF l1ULNXwZe4xaNh0IS6+JXmV5eewk/uNo2AipNJ3Q94pThbs01Yw694SntvuWbCEcgmnY1JzUOec ZAcuZi8+Y7KhmpW9QyHOvjy/CjnMpTpkXtwXx1xDOzY9lrmqngfUqtgnAGfhbZHTetW3b2RoZUw bA0AtbVmHfLn453ORP5JyWR8J7fDHYYC+rmhC1uf1k X-Received: by 2002:a17:90a:d60e:b0:36a:1ed8:6fe6 with SMTP id 98e67ed59e1d1-37c2bd52996mr14481707a91.24.1781604446463; Tue, 16 Jun 2026 03:07:26 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 32/83] target/riscv: Fix size of mseccfg Date: Tue, 16 Jun 2026 20:04:35 +1000 Message-ID: <20260616100527.1939565-33-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605370570158500 From: Anton Johansson mseccfg is defined in version 20250508 of the privileged specification to be 64 bits in size. Update relevant function arguments. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-ID: <20260520125406.28693-22-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/pmp.h | 4 ++-- target/riscv/machine.c | 2 +- target/riscv/pmp.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 45dc0393f9..8726929bd3 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -465,7 +465,7 @@ struct CPUArchState { =20 /* physical memory protection */ pmp_table_t pmp_state; - target_ulong mseccfg; + uint64_t mseccfg; =20 /* trigger module */ uint16_t mcontext; diff --git a/target/riscv/pmp.h b/target/riscv/pmp.h index 17307ef88a..91130289d8 100644 --- a/target/riscv/pmp.h +++ b/target/riscv/pmp.h @@ -71,8 +71,8 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_in= dex, target_ulong val); target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index); =20 -void mseccfg_csr_write(CPURISCVState *env, target_ulong val); -target_ulong mseccfg_csr_read(CPURISCVState *env); +void mseccfg_csr_write(CPURISCVState *env, uint64_t val); +uint64_t mseccfg_csr_read(CPURISCVState *env); =20 void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index, target_ulong val); diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 78ca607b48..dad45f10c3 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -439,7 +439,7 @@ static const VMStateDescription vmstate_mseccfg =3D { .minimum_version_id =3D 1, .needed =3D mseccfg_needed, .fields =3D (const VMStateField[]) { - VMSTATE_UINTTL(env.mseccfg, RISCVCPU), + VMSTATE_UINT64(env.mseccfg, RISCVCPU), VMSTATE_END_OF_LIST() } }; diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 58a8923d0d..211f5b3862 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -667,7 +667,7 @@ target_ulong pmpaddr_csr_read(CPURISCVState *env, uint3= 2_t addr_index) /* * Handle a write to a mseccfg CSR */ -void mseccfg_csr_write(CPURISCVState *env, target_ulong val) +void mseccfg_csr_write(CPURISCVState *env, uint64_t val) { int i; uint64_t mask =3D MSECCFG_MMWP | MSECCFG_MML; @@ -713,7 +713,7 @@ void mseccfg_csr_write(CPURISCVState *env, target_ulong= val) /* * Handle a read from a mseccfg CSR */ -target_ulong mseccfg_csr_read(CPURISCVState *env) +uint64_t mseccfg_csr_read(CPURISCVState *env) { trace_mseccfg_csr_read(env->mhartid, env->mseccfg); return env->mseccfg; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605528; cv=none; d=zohomail.com; s=zohoarc; b=LjCYf6Rm3x3RZ+TJf2t7+4tTbs8Ib+zAUtPZ0etwuliBwA9abTC+xx3lEqtb2MIQaZikSkQxBWJ3D7C7Vx6dTRS77tbFXlOTunaeR9G4TSqZKRXI0021Mo50Qg9fWKDMpfwBLvkJn/Ff8ZTaj2IoxS9w43j1IAu1tuU714NGxSI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605528; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=b5q6ISXs9OA63MoSetz0QM2GNUXYBRusOLOcdCa31BY=; b=At1s5rwQEd8AtcQvsM36h5yPjwppljHvIN8rDWIw3G5GNn10JR3aVnVWR6r9ERHSZwAsGoMSa3bAgpCFBE0Nmou8knU71zoZrVaJWQs0ejlJiCtBmNnyEK0AN0bBX1o4L8tZa+S99M/eI3Nhuzd4nxfTKHmPF5J2RlWaWhyoGns= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605528832736.397585347984; Tue, 16 Jun 2026 03:25:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQht-00026Y-US; Tue, 16 Jun 2026 06:07:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhh-0001h1-0d for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:33 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhf-0003TP-BE for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:32 -0400 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-c8588ec1b44so3010684a12.1 for ; Tue, 16 Jun 2026 03:07:31 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604450; x=1782209250; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b5q6ISXs9OA63MoSetz0QM2GNUXYBRusOLOcdCa31BY=; b=kjfBnL5WsOnq6KBxc4x+iM2ncchEk8Yc7PeR7ZX4AzjnYnYz9Vbt5lTHfMruLahYFO cCDbpL+g0G3gF562Zy1pzG9z4PR5r4Hbpwjyko/oT2vLOGb9OtARzqbapVTvTNBoKbFj //SiPXrA81ltUNLBVPfbuY6iNMo+ww26mF1SwDXmwkNmvHaHA6GLmsPinwvzxKVWiMAr DKOrua3Vk9VLsAVK3RK0QJvygOFx/H8A3O8Co0xX7Co858KIZUplDtsC/ZrNpo62r0IA 3ON1CoWlAOcEGgYxuI8usjTmX54Q7PFPr4anIrs5yTsxbFOhwyiufkXelDJOwtTyrRjy /x1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604450; x=1782209250; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=b5q6ISXs9OA63MoSetz0QM2GNUXYBRusOLOcdCa31BY=; b=XGkrNYXn3koTrNmuUH2P/5V7TU4n8GWmHAWVkk7kmHeHcW/tOSovSSytoJqY9p2gUx qJ022NF0l+gH2EIl2huUioLB2oxpZkg+B7Y4zqLx7DV/JWcjBM/XTtyqQf0jOsluXEr4 x/Felh5dI+wGh8N7inIjcKAIQEWh+N1MAaN2epG/QWjQrqx2k1ccaz9MLMAufdEytGSU vF/Hl1vnSD1wLDULP2hpiFb//sC1FeZuvlTuuY3t5n/HkIaV91CSOizYAsVJsWaUcf6x Mfonb2HOCis73YanVi+/hnQuHtZBtm7nRAsUbdkhV/bzp2wrF+kUMMjuFaTr7NlQZJI8 MsBA== X-Gm-Message-State: AOJu0Yydf2s6Kd5LaCbzMro7rcT2w8JVc5iyNXG9VCqjBipsI0FJpq+S Rkar/wIBc6aTm1hZxbmAv6RT9p3319M4hLIPbLXzVcPOR/HdEUtGGnCCJGsMiBwU X-Gm-Gg: Acq92OEEgEjqbIDzC1ngkL2NI1WBZNMgLG+P5TBKjmr5RlFn+7NHfouocc6XlFQcqR4 tgfe/RkkBWFOIMi3pkKTWZV5BCNOKiGN+CR7uEwdKgl1/DFd3kpN9q0PQktSrHgJWbbP9P2yOQ4 v1iT7CVKEY7AVDcr4TQE87WE9+almyRTEVs6C/81r/D1MasAocg6C/IPLHm2Q9NMW6EFDQYyaxM hCKhEQf906biQjRsVLf9EsjyAOSCvTBIGDBg1vnkxgeCMV8GLT197UJ7p2/AG3GusIUtSUzTG+0 HUku+zlZNibVhtbjhFZxdzfrHjSXX1gPiS4JUqfjj+9VZWAOuwkeo5dxrexaQ9hIO6GIKvG6k5a 2ZN357G87MXWJRjON8yARyp7vwB4q3Xll7zlFP2n0lTgiwmUxqUrET2Val4VsAaF18N5ClRDwLQ Av/f06NRNWb4VqYkmQ8J2exdGLOQ/pGt4rRTv8oaos X-Received: by 2002:a05:6a20:1615:b0:3b4:736b:da61 with SMTP id adf61e73a8af0-3b784193115mr21608195637.35.1781604449989; Tue, 16 Jun 2026 03:07:29 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 33/83] target/riscv: Move debug.h include away from cpu.h Date: Tue, 16 Jun 2026 20:04:36 +1000 Message-ID: <20260616100527.1939565-34-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=alistair23@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605529503158500 From: Anton Johansson All debug.h definitions except for RV_MAX_TRIGGERS are internal to target/riscv. Move RV_MAX_TRIGGERS to cpu.h and include debug.h from all translation units which relied on the cpu.h include. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20260520125406.28693-23-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/debug.h | 2 -- target/riscv/cpu.c | 3 +++ target/riscv/cpu_helper.c | 2 +- target/riscv/csr.c | 3 +++ target/riscv/debug.c | 1 + target/riscv/tcg/tcg-cpu.c | 1 + 7 files changed, 10 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 8726929bd3..644a08ea5a 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -187,12 +187,12 @@ extern RISCVCPUImpliedExtsRule *riscv_multi_ext_impli= ed_rules[]; =20 #if !defined(CONFIG_USER_ONLY) #include "pmp.h" -#include "debug.h" #endif =20 #define RV_VLEN_MAX 1024 #define RV_MAX_MHPMEVENTS 32 #define RV_MAX_MHPMCOUNTERS 32 +#define RV_MAX_TRIGGERS 2 =20 FIELD(VTYPE, VLMUL, 0, 3) FIELD(VTYPE, VSEW, 3, 3) diff --git a/target/riscv/debug.h b/target/riscv/debug.h index 066e9c585f..55a3ac72e6 100644 --- a/target/riscv/debug.h +++ b/target/riscv/debug.h @@ -25,8 +25,6 @@ #include "exec/breakpoint.h" #include "exec/target_long.h" =20 -#define RV_MAX_TRIGGERS 2 - /* register index of tdata CSRs */ enum { TDATA1 =3D 0, diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index e792655cc2..7fb426b697 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -38,6 +38,9 @@ #include "kvm/kvm_riscv.h" #include "tcg/tcg-cpu.h" #include "tcg/tcg.h" +#if !defined(CONFIG_USER_ONLY) +#include "target/riscv/debug.h" +#endif =20 /* RISC-V CPU definitions */ static const char riscv_single_letter_exts[] =3D "IEMAFDQCBPVH"; diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 57e6f8217c..be36dca8f1 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -34,7 +34,7 @@ #include "semihosting/common-semi.h" #include "exec/icount.h" #include "cpu_bits.h" -#include "debug.h" +#include "target/riscv/debug.h" #include "pmp.h" #include "qemu/plugin.h" =20 diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 4dd6c93e51..8b1de77b7a 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -31,6 +31,9 @@ #include "qapi/error.h" #include "tcg/insn-start-words.h" #include "internals.h" +#if !defined(CONFIG_USER_ONLY) +#include "target/riscv/debug.h" +#endif =20 /* CSR function table public API */ void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops) diff --git a/target/riscv/debug.c b/target/riscv/debug.c index 5664466749..30d39ee5cd 100644 --- a/target/riscv/debug.c +++ b/target/riscv/debug.c @@ -27,6 +27,7 @@ #include "qemu/log.h" #include "qapi/error.h" #include "cpu.h" +#include "target/riscv/debug.h" #include "trace.h" #include "exec/helper-proto.h" #include "exec/watchpoint.h" diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index f8b2f04a94..21886e5d39 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -37,6 +37,7 @@ #include "hw/core/boards.h" #include "system/tcg.h" #include "exec/icount.h" +#include "target/riscv/debug.h" #endif =20 /* Hash that stores user set extensions */ --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605506; cv=none; d=zohomail.com; s=zohoarc; b=O5H70oKHce1/tSLIKDT/zOjAsfc8exBpuIbC3PbEBvh2O72J+eyNKBETe7KLjQjxlXJIt2/8CHxnE0pPOYtzhqm+6aVdzbDJoWNZ2Qx6sX+E3QOTiOcdjj5o1oBOwD+RATjZ2s0t+AET6Mro0vn7XzvVkIXRgbANmQ489VnxO9g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605506; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=CWVbz+LoV9WM9mA2yBpJy2LIqx8pnUBQTK1oHveufzQ=; b=Du6P/k1iBX6ihwW9f+cq46Y6rvmEm6xkzYUku7gJa1jEj3/MLASngCmYx+lP87oHql+N0l0q12OczY8X3zbn7xrLb4BeoMHgLKPbUpXshzmYmFm+3bX5rh43euTXwottnNshy2bFjxQpYipCYocjeHFo+YOB6ybNE7ST5DMqeww= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605506539658.8206536797868; Tue, 16 Jun 2026 03:25:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQht-0001zo-D0; Tue, 16 Jun 2026 06:07:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhl-0001ns-9w for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:38 -0400 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhj-0003Te-1b for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:37 -0400 Received: by mail-pg1-x530.google.com with SMTP id 41be03b00d2f7-c85893bce34so1812911a12.1 for ; Tue, 16 Jun 2026 03:07:34 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604454; x=1782209254; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CWVbz+LoV9WM9mA2yBpJy2LIqx8pnUBQTK1oHveufzQ=; b=MVUQ0v55yUUrfXhvdQmipoGB9i4UVU0VbAN9ZPSiGtp7IFex5ralNiEpAjZtj3MqBF flyXfStbzklWbmama4VcSmoeQJ6Cegxaw6D3ln3sxAzJy4HevGQq/wgIPIuVI3Potica A4mzeEHUvw3pJGjg3sjxXt/iZPVivxnI8ITnSRJp6a0gWhgaps3Yh1q3Utu8F41vSuM8 K+WRvH6B3DYVyNFgRMIjK6JQYirTCh0Zi+aj0wwewj20fFPRFqERTrV93Wtawfum8eN+ DL7tWslFpzQlK9EhL123a0zHDFwMbQmbs+c8t+COaagOYZ+DUqr8I4s3gJwF9hdrhdcs MsMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604454; x=1782209254; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=CWVbz+LoV9WM9mA2yBpJy2LIqx8pnUBQTK1oHveufzQ=; b=cVBMrZyUN3Jt2zBlHEMapRDjXgNnAph2yj04nXlN3rTMVmBSIHq/HAtIr/50TrNiXx sXYBR230eHsnjrViclQmAn7aTQt82zv6pGFngvdpHJkWajrcxKEfmHMOxIS6u1gkcmCi q7TT4CgCNfbl4tpy4E2AS2B+7h4sFNaiHM/OLn1AaCszr6yRFpaEom9NCl6+2H0apw19 pkfM5U7DcsqlvlEVHoI0Uskp8rS6e3HUgNUEfHIztAsHUMCR32C7oTOvniHj7F6uWO+y ZcAEHCP6f38m3UFRKE4FuWkDdrr6zR/XOP0WgZV6rMathe2pDitOPsBp+xjFqjUuEmq2 8bug== X-Gm-Message-State: AOJu0Yyg7X2LtlORGbBzWdv1GyS+DlAJvM6gdWnCOi7jSyywbkhUX1U7 VoaUdTIXfmtGX7oS5o27h/KyuwdHeMkjRyOTV7INQYSxjnexG2IqNcEgOA2Wcq9I X-Gm-Gg: Acq92OGixcOf5zSaLp/nVuUvYQwZIQ9yIwfRzMRf9GKOaB+NJlU4o/fKd7S6mQDi6Vh xEpLBCATPFNLO0f4YpgrJIsBqAtNl/hfwNy8+lvAml8IkX/K9VK/UeTKOlLF2n/0mvwOzAe91+1 Q1A+BQimsKCV89c1/NfqSzZT5YGTxt105XRIGgtpi4+j27eoPTFRWSIPgrHRnPVSZrX4NWFo0jm selrSRz9ISnnosXPuvpI9zc1tEkmvt2SFhwXp2odHxOGwtAnav+uwgV7zlkYUU4qaVmZFzUrEmG pj9n4rBGOFt17nlat9ACTUKiQhjngRBR6+h9mOZq1ZWyqH0xNufIgHeP674ETfEd2UwAdcvO9vr bGNCRJt0mNud+GjARB56nmhdwLxliCXdIe+o8PVbRp0YfpkiWWZwW96WqsVudzJh99h0IKEm80E XJ66Y/0j9bi0IG6SmmMSNq0TyGR7VHEkheMLIYQUBG X-Received: by 2002:a05:6a20:7287:b0:3b4:871a:5aaa with SMTP id adf61e73a8af0-3b7963c95famr15505929637.26.1781604453629; Tue, 16 Jun 2026 03:07:33 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 34/83] target/riscv: Move CSR declarations to separate csr.h header Date: Tue, 16 Jun 2026 20:04:37 +1000 Message-ID: <20260616100527.1939565-35-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=alistair23@gmail.com; helo=mail-pg1-x530.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605507572158500 From: Anton Johansson Most of these definitions save riscv_csrr, riscv_csrrw, riscv_csr_read, riscv_csr_write are only used in target/. Move declarations to a separate headers which will soon be made internal to target/. csr.h is temporarily included from cpu.h to not break includes from outside target/, this include will be removed in the following commit. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-ID: <20260520125406.28693-24-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 87 +--------------------------- target/riscv/csr.h | 103 ++++++++++++++++++++++++++++++++++ target/riscv/cpu.c | 1 + target/riscv/csr.c | 1 + target/riscv/gdbstub.c | 1 + target/riscv/kvm/kvm-cpu.c | 1 + target/riscv/mips_csr.c | 1 + target/riscv/monitor.c | 1 + target/riscv/op_helper.c | 1 + target/riscv/riscv-qmp-cmds.c | 1 + target/riscv/th_csr.c | 1 + 11 files changed, 113 insertions(+), 86 deletions(-) create mode 100644 target/riscv/csr.h diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 644a08ea5a..b751c9d348 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -905,75 +905,7 @@ RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env); RISCVPmPmm riscv_pm_get_vm_ldst_pmm(CPURISCVState *env); uint32_t riscv_pm_get_pmlen(RISCVPmPmm pmm); =20 -RISCVException riscv_csrr(CPURISCVState *env, int csrno, - target_ulong *ret_value); - -RISCVException riscv_csrrw(CPURISCVState *env, int csrno, - target_ulong *ret_value, target_ulong new_value, - target_ulong write_mask, uintptr_t ra); -RISCVException riscv_csrrw_debug(CPURISCVState *env, int csrno, - target_ulong *ret_value, - target_ulong new_value, - target_ulong write_mask); - -static inline void riscv_csr_write(CPURISCVState *env, int csrno, - target_ulong val) -{ - riscv_csrrw(env, csrno, NULL, val, MAKE_64BIT_MASK(0, TARGET_LONG_BITS= ), 0); -} - -static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno) -{ - target_ulong val =3D 0; - riscv_csrr(env, csrno, &val); - return val; -} - -typedef RISCVException (*riscv_csr_predicate_fn)(CPURISCVState *env, - int csrno); -typedef RISCVException (*riscv_csr_read_fn)(CPURISCVState *env, int csrno, - target_ulong *ret_value); -typedef RISCVException (*riscv_csr_write_fn)(CPURISCVState *env, int csrno, - target_ulong new_value, - uintptr_t ra); -typedef RISCVException (*riscv_csr_op_fn)(CPURISCVState *env, int csrno, - target_ulong *ret_value, - target_ulong new_value, - target_ulong write_mask); - -RISCVException riscv_csrr_i128(CPURISCVState *env, int csrno, - Int128 *ret_value); -RISCVException riscv_csrrw_i128(CPURISCVState *env, int csrno, - Int128 *ret_value, Int128 new_value, - Int128 write_mask, uintptr_t ra); - -typedef RISCVException (*riscv_csr_read128_fn)(CPURISCVState *env, int csr= no, - Int128 *ret_value); -typedef RISCVException (*riscv_csr_write128_fn)(CPURISCVState *env, int cs= rno, - Int128 new_value); - -typedef struct { - const char *name; - riscv_csr_predicate_fn predicate; - riscv_csr_read_fn read; - riscv_csr_write_fn write; - riscv_csr_op_fn op; - riscv_csr_read128_fn read128; - riscv_csr_write128_fn write128; - /* The default priv spec version should be PRIV_VERSION_1_10_0 (i.e 0)= */ - uint32_t min_priv_ver; -} riscv_csr_operations; - -struct RISCVCSR { - int csrno; - bool (*insertion_test)(RISCVCPU *cpu); - riscv_csr_operations csr_ops; -}; - -/* CSR function table constants */ -enum { - CSR_TABLE_SIZE =3D 0x1000 -}; +#include "target/riscv/csr.h" =20 /* * The event id are encoded based on the encoding specified in the @@ -1007,28 +939,11 @@ void riscv_cpu_finalize_features(RISCVCPU *cpu, Erro= r **errp); void riscv_add_satp_mode_properties(Object *obj); bool riscv_cpu_accelerator_compatible(RISCVCPU *cpu); =20 -/* CSR function table */ -extern riscv_csr_operations csr_ops[CSR_TABLE_SIZE]; -bool riscv_csr_is_fpu(int csrno); -bool riscv_csr_is_vpu(int csrno); - extern const bool valid_vm_1_10_32[], valid_vm_1_10_64[]; =20 -void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops); -void riscv_set_csr_ops(int csrno, const riscv_csr_operations *ops); - void riscv_cpu_register_gdb_regs_for_features(CPUState *cs); =20 -target_ulong riscv_new_csr_seed(target_ulong new_value, - target_ulong write_mask); - const char *satp_mode_str(uint8_t satp_mode, bool is_32_bit); =20 -/* In th_csr.c */ -extern const RISCVCSR th_csr_list[]; - -/* Implemented in mips_csr.c */ -extern const RISCVCSR mips_csr_list[]; - const char *priv_spec_to_str(int priv_version); #endif /* RISCV_CPU_H */ diff --git a/target/riscv/csr.h b/target/riscv/csr.h new file mode 100644 index 0000000000..f45f9912c5 --- /dev/null +++ b/target/riscv/csr.h @@ -0,0 +1,103 @@ +/* + * QEMU RISC-V CSRs + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2017-2018 SiFive, Inc. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef RISCV_CSR_H +#define RISCV_CSR_H + +#include "exec/target_long.h" +#include "cpu_bits.h" + +target_ulong riscv_new_csr_seed(target_ulong new_value, + target_ulong write_mask); + +RISCVException riscv_csrr(CPURISCVState *env, int csrno, + target_ulong *ret_value); + +RISCVException riscv_csrrw(CPURISCVState *env, int csrno, + target_ulong *ret_value, target_ulong new_value, + target_ulong write_mask, uintptr_t ra); +RISCVException riscv_csrrw_debug(CPURISCVState *env, int csrno, + target_ulong *ret_value, + target_ulong new_value, + target_ulong write_mask); + +static inline void riscv_csr_write(CPURISCVState *env, int csrno, + target_ulong val) +{ + riscv_csrrw(env, csrno, NULL, val, MAKE_64BIT_MASK(0, TARGET_LONG_BITS= ), 0); +} + +static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno) +{ + target_ulong val =3D 0; + riscv_csrr(env, csrno, &val); + return val; +} + +typedef RISCVException (*riscv_csr_predicate_fn)(CPURISCVState *env, + int csrno); +typedef RISCVException (*riscv_csr_read_fn)(CPURISCVState *env, int csrno, + target_ulong *ret_value); +typedef RISCVException (*riscv_csr_write_fn)(CPURISCVState *env, int csrno, + target_ulong new_value, + uintptr_t ra); +typedef RISCVException (*riscv_csr_op_fn)(CPURISCVState *env, int csrno, + target_ulong *ret_value, + target_ulong new_value, + target_ulong write_mask); + +RISCVException riscv_csrr_i128(CPURISCVState *env, int csrno, + Int128 *ret_value); +RISCVException riscv_csrrw_i128(CPURISCVState *env, int csrno, + Int128 *ret_value, Int128 new_value, + Int128 write_mask, uintptr_t ra); + +typedef RISCVException (*riscv_csr_read128_fn)(CPURISCVState *env, int csr= no, + Int128 *ret_value); +typedef RISCVException (*riscv_csr_write128_fn)(CPURISCVState *env, int cs= rno, + Int128 new_value); + +typedef struct { + const char *name; + riscv_csr_predicate_fn predicate; + riscv_csr_read_fn read; + riscv_csr_write_fn write; + riscv_csr_op_fn op; + riscv_csr_read128_fn read128; + riscv_csr_write128_fn write128; + /* The default priv spec version should be PRIV_VERSION_1_10_0 (i.e 0)= */ + uint32_t min_priv_ver; +} riscv_csr_operations; + +struct RISCVCSR { + int csrno; + bool (*insertion_test)(RISCVCPU *cpu); + riscv_csr_operations csr_ops; +}; + +/* CSR function table constants */ +enum { + CSR_TABLE_SIZE =3D 0x1000 +}; + +/* CSR function table */ +extern riscv_csr_operations csr_ops[CSR_TABLE_SIZE]; + +bool riscv_csr_is_fpu(int csrno); +bool riscv_csr_is_vpu(int csrno); + +void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops); +void riscv_set_csr_ops(int csrno, const riscv_csr_operations *ops); + +/* In th_csr.c */ +extern const RISCVCSR th_csr_list[]; + +/* Implemented in mips_csr.c */ +extern const RISCVCSR mips_csr_list[]; + +#endif /* RISCV_CSR_H */ diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 7fb426b697..bcc8a6bcb1 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -23,6 +23,7 @@ #include "qemu/log.h" #include "cpu.h" #include "cpu_vendorid.h" +#include "target/riscv/csr.h" #include "internals.h" #include "qapi/error.h" #include "qapi/visitor.h" diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 8b1de77b7a..e508985311 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "qemu/timer.h" #include "cpu.h" +#include "target/riscv/csr.h" #include "tcg/tcg-cpu.h" #include "pmu.h" #include "time_helper.h" diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 7abacd0e11..a2bbaf7f07 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -21,6 +21,7 @@ #include "gdbstub/helpers.h" #include "cpu.h" #include "internals.h" +#include "target/riscv/csr.h" =20 struct TypeSize { const char *gdb_type; diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 53d88339c1..f0de5c3071 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -31,6 +31,7 @@ #include "system/kvm.h" #include "system/kvm_int.h" #include "cpu.h" +#include "target/riscv/csr.h" #include "trace.h" #include "accel/accel-cpu-target.h" #include "hw/pci/pci.h" diff --git a/target/riscv/mips_csr.c b/target/riscv/mips_csr.c index 822e25e346..609718f288 100644 --- a/target/riscv/mips_csr.c +++ b/target/riscv/mips_csr.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "cpu_vendorid.h" +#include "target/riscv/csr.h" =20 /* Static MIPS CSR state storage */ static struct { diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c index 9edac0533c..3e89dcaf7c 100644 --- a/target/riscv/monitor.c +++ b/target/riscv/monitor.c @@ -22,6 +22,7 @@ #include "qemu/ctype.h" #include "qemu/qemu-print.h" #include "cpu.h" +#include "target/riscv/csr.h" #include "cpu_bits.h" #include "monitor/monitor.h" #include "monitor/hmp.h" diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index c074b24bc9..3dc8c4f6b3 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -20,6 +20,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" +#include "target/riscv/csr.h" #include "internals.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c index 93e6b7fa68..b94e8391ed 100644 --- a/target/riscv/riscv-qmp-cmds.c +++ b/target/riscv/riscv-qmp-cmds.c @@ -35,6 +35,7 @@ #include "system/tcg.h" #include "cpu-qom.h" #include "cpu.h" +#include "target/riscv/csr.h" =20 static void riscv_cpu_add_definition(gpointer data, gpointer user_data) { diff --git a/target/riscv/th_csr.c b/target/riscv/th_csr.c index 49eb7bbab5..a4ea4ce391 100644 --- a/target/riscv/th_csr.c +++ b/target/riscv/th_csr.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "cpu_vendorid.h" +#include "target/riscv/csr.h" =20 #define CSR_TH_SXSTATUS 0x5c0 =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605545; cv=none; d=zohomail.com; s=zohoarc; b=Z4oHXAeqkNxOiXUV/LuxvkauUxrkJWRGssyCNNkCuC3gsvOuICU/c9/3Q0faM2f8H7p02OeigsbXDwCeV/ZmDtqN7/N9iyIBTRX/TmXw8msiu82czpfn+cg52vRyxokGKsD6ba0vx4M8EbYKy4FaoT5kpAFhY4DyaVb+B4BHAVY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605545; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=z5MJMD7DLmPAgIxPr6bWjQ19lgkOsPJq3HKXc0cJskA=; b=mEGOGCgXnaUCp6g1Rt3PzJ98X+CD4wgSClcOcH1iBcxBXNSvhPT+UmuvAtOGBu7hFIc5H/05jbiZXMwu1cFgD6p6qyJejoJvqDecuXweIT0q5TJQJtmXV88hNfvHLeC+7Z+pZmJoNYKzu45i6H2E8IR5pPcDczWa2qPcRbyZxRk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605544993213.16828544453347; Tue, 16 Jun 2026 03:25:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhv-0002KV-Bv; Tue, 16 Jun 2026 06:07:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQho-0001t1-SE for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:42 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhm-0003Tp-3Q for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:40 -0400 Received: by mail-pg1-x52c.google.com with SMTP id 41be03b00d2f7-c86484d35d1so1503028a12.3 for ; Tue, 16 Jun 2026 03:07:37 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604457; x=1782209257; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=z5MJMD7DLmPAgIxPr6bWjQ19lgkOsPJq3HKXc0cJskA=; b=iPaf6yXrsLJlea9QMbQSDCb4+fwV3xQuzF7UuPqbCgyhUXY8D3x6orrc5pwfOBEaWt nesfOYSTH02ylr2HjEBwrtLPhrDdftJOfiY90yKEAtY0SIyYqgdwn2gT6zbWGf10c/JK 3246Ne0HuwHf4JhE2cXS5HBr8sHUi/J3StCpjJuOe75U53CILD3ub++ofgslXaxmbAz5 vESn9/aVzcfm6+Pv0jIKwnN2abLdxo/WKHkTJsRMBmqxiAkloGpd8SGDlZ92QGNIvvz4 T/9T8lJJOrc2UtNMWX/noX7lmY2cubgPBPFBpSvftVpVDB9IsAIaSb7ZHM1UzHhDSuyN cR9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604457; x=1782209257; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=z5MJMD7DLmPAgIxPr6bWjQ19lgkOsPJq3HKXc0cJskA=; b=k6PAUGfmDGapOoDJzdsQ2MWFRUTr8WNqG/v8hG1FtHLXhJgFgc9XE7kc6Eh3UXTdfe OakGSmdA2pnyBKUOUGgQgJO4qNMMJPZ3Q3TW/I7BN1I4wgFUstotP+0+BcVzqu9GWUiy 6h9fenjcJ8/F0Y6edgY6o58woNk76JKf7PSOaQR2eVWsNW5dnT/wahjPPnNn4HnsxCHO 8VCMy5joh4SMMmLbyNCJ1AmamXIDM4jca7fFgSwuYYlgTFaVoICARU8sp3FmDHj3P4s7 hqmIx2lWbbXlkM4VbpoixIunIb3vV0mWXL5DEkYBEgQ8CY2tQ4HLSixAzipKRW7Eqzlr zs0g== X-Gm-Message-State: AOJu0YyazfJ5LoSoAmFr+f+FMdi1AAQaQ2mnDPLlHotlBBMLxRevHtWo HMEQnlTWkgbyTIuF4w4rfTo0oYa/tg9KdzMMtU0yQzoDXmqnVXOH+ZPvLlRP0H11 X-Gm-Gg: Acq92OE2z3nhDc1iMBJcIUw80lo6gcM1JQrF92ztVnjuyagC2lN6HN1AJYOgRH995yf NqN4OanwBkBIC0LvCD4QBPkSlPMBwbiVTCVc3auCPXygq6x0cP8uLZQ3oclNnTPhjmKuPlwHdyN YRULD+iZiQa8bLl7WP1cYRhgawQ8tPCB8/TgaonUX4aiQHyVJawYzILEYQjF/ctFdfwpdV548Lx xyg97XMc7IxeiLe6EVJAOecplqV70GtCqPwNN+YOoZGxO/fI9l3dpGxpOr8znvcIJzjXWOJ+qbT FjXqeUK5TxkBroIby0nUGf6E+RM7+pbxxkqrC+2vBZlNVGSX1QBA1OYt5nq5he162Chy78V+KXY y1+g9vwUrgjoX+8SXMHfWWEEum1jxdtBuTA4f13oDr9W00uKSlnnI0Ed/LbnxXuOnrwldQXsgqv k74jF8elDTGwh9heE2rCRpSD9RpwJosHIJzADPHc4n X-Received: by 2002:a05:6a21:7010:b0:3a0:c2b4:d976 with SMTP id adf61e73a8af0-3b796423b63mr16966350637.44.1781604456826; Tue, 16 Jun 2026 03:07:36 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , Alistair Francis Subject: [PULL 35/83] target/riscv: Introduce externally facing CSR access functions Date: Tue, 16 Jun 2026 20:04:38 +1000 Message-ID: <20260616100527.1939565-36-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605545560158500 Content-Type: text/plain; charset="utf-8" From: Anton Johansson Convert riscv_csr_[read|write]() into target_ulong angnostic CSR access functions that can be safely used from outside of target/ without knowledge of the target register size. Replace the 4 existing CSR accesses in hw/ and linux-user/. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Alistair Francis Message-ID: <20260520125406.28693-25-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 7 ++++++- target/riscv/csr.h | 13 ------------- hw/riscv/riscv_hart.c | 7 +++---- linux-user/riscv/signal.c | 5 +++-- target/riscv/csr.c | 15 +++++++++++++++ 5 files changed, 27 insertions(+), 20 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index b751c9d348..e7ecc02b64 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -905,7 +905,12 @@ RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env); RISCVPmPmm riscv_pm_get_vm_ldst_pmm(CPURISCVState *env); uint32_t riscv_pm_get_pmlen(RISCVPmPmm pmm); =20 -#include "target/riscv/csr.h" +/* + * Externally facing CSR access functions, wrappers around riscv_csr*(). + */ + +RISCVException riscv_csr_write_i64(CPURISCVState *env, int csrno, uint64_t= val); +RISCVException riscv_csr_read_i64(CPURISCVState *env, int csrn, uint64_t *= res); =20 /* * The event id are encoded based on the encoding specified in the diff --git a/target/riscv/csr.h b/target/riscv/csr.h index f45f9912c5..4cca3a000a 100644 --- a/target/riscv/csr.h +++ b/target/riscv/csr.h @@ -26,19 +26,6 @@ RISCVException riscv_csrrw_debug(CPURISCVState *env, int= csrno, target_ulong new_value, target_ulong write_mask); =20 -static inline void riscv_csr_write(CPURISCVState *env, int csrno, - target_ulong val) -{ - riscv_csrrw(env, csrno, NULL, val, MAKE_64BIT_MASK(0, TARGET_LONG_BITS= ), 0); -} - -static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno) -{ - target_ulong val =3D 0; - riscv_csrr(env, csrno, &val); - return val; -} - typedef RISCVException (*riscv_csr_predicate_fn)(CPURISCVState *env, int csrno); typedef RISCVException (*riscv_csr_read_fn)(CPURISCVState *env, int csrno, diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index e675358e1a..d1c7188369 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -67,12 +67,11 @@ static void csr_call(char *cmd, uint64_t cpu_num, int c= srno, uint64_t *val) RISCVCPU *cpu =3D RISCV_CPU(cpu_by_arch_id(cpu_num)); CPURISCVState *env =3D &cpu->env; =20 - int ret =3D RISCV_EXCP_NONE; + RISCVException ret =3D RISCV_EXCP_NONE; if (strcmp(cmd, "get_csr") =3D=3D 0) { - ret =3D riscv_csrr(env, csrno, (target_ulong *)val); + ret =3D riscv_csr_read_i64(env, csrno, val); } else if (strcmp(cmd, "set_csr") =3D=3D 0) { - ret =3D riscv_csrrw(env, csrno, NULL, *(target_ulong *)val, - MAKE_64BIT_MASK(0, TARGET_LONG_BITS), 0); + ret =3D riscv_csr_write_i64(env, csrno, *val); } =20 g_assert(ret =3D=3D RISCV_EXCP_NONE); diff --git a/linux-user/riscv/signal.c b/linux-user/riscv/signal.c index 358fa1d82d..9d5ba300e4 100644 --- a/linux-user/riscv/signal.c +++ b/linux-user/riscv/signal.c @@ -90,7 +90,8 @@ static void setup_sigcontext(struct target_sigcontext *sc= , CPURISCVState *env) __put_user(env->fpr[i], &sc->fpr[i]); } =20 - uint32_t fcsr =3D riscv_csr_read(env, CSR_FCSR); + uint64_t fcsr; + riscv_csr_read_i64(env, CSR_FCSR, &fcsr); __put_user(fcsr, &sc->fcsr); } =20 @@ -159,7 +160,7 @@ static void restore_sigcontext(CPURISCVState *env, stru= ct target_sigcontext *sc) =20 uint32_t fcsr; __get_user(fcsr, &sc->fcsr); - riscv_csr_write(env, CSR_FCSR, fcsr); + riscv_csr_write_i64(env, CSR_FCSR, fcsr); } =20 static void restore_ucontext(CPURISCVState *env, struct target_ucontext *u= c) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index e508985311..19d5a55b54 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -5751,6 +5751,21 @@ RISCVException riscv_csrrw(CPURISCVState *env, int c= srno, return riscv_csrrw_do64(env, csrno, ret_value, new_value, write_mask, = ra); } =20 +RISCVException riscv_csr_write_i64(CPURISCVState *env, int csrno, uint64_t= val) +{ + return riscv_csrrw(env, csrno, NULL, val, + MAKE_64BIT_MASK(0, TARGET_LONG_BITS), 0); +} + +RISCVException riscv_csr_read_i64(CPURISCVState *env, int csrno, uint64_t = *res) +{ + RISCVException ret; + target_ulong val =3D 0; + ret =3D riscv_csrr(env, csrno, &val); + *res =3D val; + return ret; +} + static RISCVException riscv_csrrw_do128(CPURISCVState *env, int csrno, Int128 *ret_value, Int128 new_value, --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605609; cv=none; d=zohomail.com; s=zohoarc; b=MVaAJegf8tbs32RF26QR3X4czp4Ct4kvrWbsgdmJCZeGYtKymmI7WcksUZYWw/ahtQrmKGmkI0WYpWEXPFcjp/ZSdb2fHKOmtddKewEna1x+yJbubuC8BezOyvG0rR8C4f7dHYGGF1mzGcMTocb9bYSJ8U+6fnpYhwcCyec+nIk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605609; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tFbtHTpTbPnfYlm9OrTcuscTEdQcUcd5xh026t7kduI=; b=ZBCBhmkkR7YkRkUGdBoX2WujMbO27E8UfMDNnUr5J1W+pcWNt7PAGqsRN7P934acljsnacksXO5rgZNRQw1kZvquZ3bNTj0kjtLgq8Armn0x0JQ/G3aB9WNYdZyJ6q0BU0IAAG3iGdU0GGeRf3wo5MXw1hQ4K5WunffW2burWeU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605609839692.5953088706488; Tue, 16 Jun 2026 03:26:49 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhu-0002F2-Qu; Tue, 16 Jun 2026 06:07:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhs-0001v0-4p for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:44 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhp-0003UI-Rh for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:43 -0400 Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-2c0aa420401so31922985ad.3 for ; Tue, 16 Jun 2026 03:07:41 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604460; x=1782209260; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tFbtHTpTbPnfYlm9OrTcuscTEdQcUcd5xh026t7kduI=; b=iGGW29PZsXfPHi9R9Ne3UFiN4C+FA4DvKZvhs4DU4jVuyV7KSNjrgsT4ZmuuY7Sjun ADJSzZ3PsBRQ1Z2vOfNSPIl9rosoqUYIa28SreCR/N0EcJdZrooXNjq4TEbf7M8/xleq isGYdxODCm2cY6ayWkFnANC1gQsy9j/dwybbNYmSy7LooKjnz+l75u+kjIHJBK1yaC5F YhGNtvMEM9LArfIUJyTnRL3E84qcaxwnZ2tl+QYI9pVVniJWiwLVUIBdt5cfT6AAnFyJ rbm8nbwub4RemQFix+amLxIRqt25ZrWUjZa+lX04NQYV5Mw7Zpe2KjkEQmRCiuRkc2Hw ZmDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604460; x=1782209260; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=tFbtHTpTbPnfYlm9OrTcuscTEdQcUcd5xh026t7kduI=; b=s9TLALkdmfO1I/C5fcUdVEDejUxkri3JG0JHTsDrxrZHxH84Y1cjWG7w823shBaR1m wiOKrAR+WJcSPo8KX1CQNeV/+3sqGsHRX9ceHUSG4z6ASVQDgwVpyf2WqyzqbFKH+FW7 K1vlNiUCw6jIbNM97vheteIo8i2RDIssrPst2M0APGR6PpqmyZh6KiHpRibdbzuMCUlL Ij+zeJ0+WTIP5TUsk1s+MiNQ09pIiey7dl9uUpVwBrejqoLNrklWZ0+W9AsD7O3gRdxV otQgqePHCExOtqi1mT1+elnT40v8dBko45VTnjn1KPcwKDSGd37ry1wseUj6FW5i6N2Z CGlQ== X-Gm-Message-State: AOJu0YwTkXegs2NamyztAFLXlas2CtydNQR9SfmhSGunxcyoUpYnsURO YjAyKsK7CLu5CxH+m/dc3XzlynxGAa26aFtl70urnqg0E6bUz/RA+OqhUxY78ZWU X-Gm-Gg: Acq92OHkZn67Fb6H63xkV2caFLofN79y4Z+Zsx4+IsI636H5IYd312fwnTMvZf5Wc9h 3FenjIkLZ2YfL4wuk1kxVpKivBcYDXSGkh24zSjwfi//VG2c3aFpt46qQ0ub1f3Cj2OFVPgRjHM rpe1eUa+N3kIZ7xPTk2qp67gzFODhaYd94f6NyxBL0HvXkTwrlJBHpB5URabs6ekncZRFYCWfpc vjEtYjAYCUEQKeOoAQRJXyHY1TNDIYiQbkgXE8RvBjwZMgXWF0XPVpQfFDUrdtyMnnHgEQlh83b 9kw/cmu6f1LNwF/+6j9h/2YuIOFf8+iX2DLc1PS9XFV/RJJ40DxZ2OPnOU4u8YLTbd1ZSR3FHxh qPxtQUsVERD7YgEj3dhf4GZocCCOB+hYz78tjOfAbicaswYFITksZdYRJwqLpcpzyOwVTppaJZt rHuF0yZwX+KljtoE1lelMCm8KlXEqLo/O/GEN6KxVy X-Received: by 2002:a17:903:4587:b0:2c2:8659:da3a with SMTP id d9443c01a7336-2c4132039cbmr202766105ad.31.1781604460392; Tue, 16 Jun 2026 03:07:40 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 36/83] target/riscv: Make pmp.h target_ulong agnostic Date: Tue, 16 Jun 2026 20:04:39 +1000 Message-ID: <20260616100527.1939565-37-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605612043158500 From: Anton Johansson The pmp.h header is exposed through cpu.h. pmp_table_t is also used in CPUArchState. CSR declarations are only used in target/ and are moved to csr.h. In pmp.h, addr_reg is widened to 64 bits and the privilege mode parameter is fixed to 8 bits, similar to previous commits. Note, the cpu/pmp/entry and cpu/pmp VMSTATE versions are bumped, breaking migration from older versions. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-ID: <20260520125406.28693-26-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/csr.h | 12 ++++++++++++ target/riscv/pmp.h | 19 +++++-------------- target/riscv/machine.c | 10 +++++----- target/riscv/pmp.c | 10 ++++++---- 4 files changed, 28 insertions(+), 23 deletions(-) diff --git a/target/riscv/csr.h b/target/riscv/csr.h index 4cca3a000a..c791260f83 100644 --- a/target/riscv/csr.h +++ b/target/riscv/csr.h @@ -87,4 +87,16 @@ extern const RISCVCSR th_csr_list[]; /* Implemented in mips_csr.c */ extern const RISCVCSR mips_csr_list[]; =20 +/* PMP CSRs, defined in pmp.c */ +void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, + target_ulong val); +target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index); + +void mseccfg_csr_write(CPURISCVState *env, uint64_t val); +uint64_t mseccfg_csr_read(CPURISCVState *env); + +void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index, + target_ulong val); +target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index); + #endif /* RISCV_CSR_H */ diff --git a/target/riscv/pmp.h b/target/riscv/pmp.h index 91130289d8..eae305ac6f 100644 --- a/target/riscv/pmp.h +++ b/target/riscv/pmp.h @@ -22,7 +22,6 @@ #ifndef RISCV_PMP_H #define RISCV_PMP_H =20 -#include "exec/target_long.h" #include "cpu.h" =20 typedef enum { @@ -52,7 +51,7 @@ typedef enum { } mseccfg_field_t; =20 typedef struct { - target_ulong addr_reg; + uint64_t addr_reg; uint8_t cfg_reg; } pmp_entry_t; =20 @@ -67,21 +66,13 @@ typedef struct { uint32_t num_rules; } pmp_table_t; =20 -void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, - target_ulong val); -target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index); +typedef struct CPUArchState CPURISCVState; =20 -void mseccfg_csr_write(CPURISCVState *env, uint64_t val); -uint64_t mseccfg_csr_read(CPURISCVState *env); - -void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index, - target_ulong val); -target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index); bool pmp_hart_has_privs(CPURISCVState *env, hwaddr addr, - target_ulong size, pmp_priv_t privs, + int size, pmp_priv_t privs, pmp_priv_t *allowed_privs, - target_ulong mode); -target_ulong pmp_get_tlb_size(CPURISCVState *env, hwaddr addr); + privilege_mode_t mode); +uint64_t pmp_get_tlb_size(CPURISCVState *env, hwaddr addr); void pmp_update_rule_addr(CPURISCVState *env, uint32_t pmp_index); void pmp_update_rule_nums(CPURISCVState *env); uint32_t pmp_get_num_rules(CPURISCVState *env); diff --git a/target/riscv/machine.c b/target/riscv/machine.c index dad45f10c3..6e70b145a5 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -49,10 +49,10 @@ static int pmp_post_load(void *opaque, int version_id) =20 static const VMStateDescription vmstate_pmp_entry =3D { .name =3D "cpu/pmp/entry", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (const VMStateField[]) { - VMSTATE_UINTTL(addr_reg, pmp_entry_t), + VMSTATE_UINT64(addr_reg, pmp_entry_t), VMSTATE_UINT8(cfg_reg, pmp_entry_t), VMSTATE_END_OF_LIST() } @@ -60,8 +60,8 @@ static const VMStateDescription vmstate_pmp_entry =3D { =20 static const VMStateDescription vmstate_pmp =3D { .name =3D "cpu/pmp", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .needed =3D pmp_needed, .post_load =3D pmp_post_load, .fields =3D (const VMStateField[]) { diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 211f5b3862..d93563c36b 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -23,6 +23,7 @@ #include "qemu/log.h" #include "qapi/error.h" #include "cpu.h" +#include "target/riscv/csr.h" #include "trace.h" #include "exec/cputlb.h" #include "exec/page-protection.h" @@ -317,7 +318,7 @@ static int pmp_is_in_range(CPURISCVState *env, int pmp_= index, hwaddr addr) */ static bool pmp_hart_has_privs_default(CPURISCVState *env, pmp_priv_t priv= s, pmp_priv_t *allowed_privs, - target_ulong mode) + privilege_mode_t mode) { bool ret; =20 @@ -380,8 +381,9 @@ static bool pmp_hart_has_privs_default(CPURISCVState *e= nv, pmp_priv_t privs, * have no functional impact in QEMU emulation. */ bool pmp_hart_has_privs(CPURISCVState *env, hwaddr addr, - target_ulong size, pmp_priv_t privs, - pmp_priv_t *allowed_privs, target_ulong mode) + int size, pmp_priv_t privs, + pmp_priv_t *allowed_privs, + privilege_mode_t mode) { int i =3D 0; int pmp_size =3D 0; @@ -732,7 +734,7 @@ uint64_t mseccfg_csr_read(CPURISCVState *env) * To avoid this we return a size of 1 (which means no caching) if the PMP * region only covers partial of the TLB page. */ -target_ulong pmp_get_tlb_size(CPURISCVState *env, hwaddr addr) +uint64_t pmp_get_tlb_size(CPURISCVState *env, hwaddr addr) { hwaddr pmp_sa; hwaddr pmp_ea; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605601; cv=none; d=zohomail.com; s=zohoarc; b=cogQZ2k6aTNVEVgbnsvySRA5ffe4wEjPSLzs9vL6+9DmnM7qzh5y3C8VzYpkK5HUlD26/WBFUCJ8SflHp3OnrGtBw85HiJwbd7RFI0v7yftETdDHK3puE5BRe+g/fBhlitCAord38ebzs5lf8DAWxqonJJyBG1vv9Y9fm+fUE+k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605601; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=t4qtZkwrlgnvUjXfrU2XfaUYkQ/M2t4pWQ1LP8LHX5k=; b=MWFYzJ3AMK7O5hr7oHHusjhHE7K45xe2xUN2gWslLvQC5x847/zyQphl4+eB354b247+AOTU43DVA29hsiDSxq1UL/8K3zGe4YKByG8+SEsWE+q84sL3fPYSOpsyQxkxrMNglL8ah3NkZgcmoUsNAXaHEalmwsdmNuOw6a9+O7c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605601156928.6688163742382; Tue, 16 Jun 2026 03:26:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQhy-0002kx-H9; Tue, 16 Jun 2026 06:07:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhu-0002FP-PR for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:46 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQht-0003Wp-5I for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:46 -0400 Received: by mail-pj1-x1032.google.com with SMTP id 98e67ed59e1d1-36bd175fdbaso2619588a91.0 for ; Tue, 16 Jun 2026 03:07:44 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604464; x=1782209264; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=t4qtZkwrlgnvUjXfrU2XfaUYkQ/M2t4pWQ1LP8LHX5k=; b=DCEyai0qFlCcf00dheIuqO4bG1WJUuyBbgA4HYJ3BW8PjCmv65EL6+72dx517iyrTx pjte+8Aaz3CCD0qnhEhF24tEhD2B2hxzkFXB1ib+Ow4WhBPcHkOrUqe7Pgs28HnJEMP7 slgSRT+REYhPMQp2rmlNPsqtzO+PryZ0hJf7I4rWKqDhLKLxLlrKwB9nYb18C2vvde1F V6y9B+IaXkAhzy/jNhJfiuQhWqW+FDLhmYHyFngzKUgvVLcDufm8+CHcBRw2ajSBmHj7 s5vNOefyoIFua0OswKVfPCclcclvMzFElPl3Rhr92PnuesL9mEXBqVqrynAwaq6P5YOv 3hNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604464; x=1782209264; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=t4qtZkwrlgnvUjXfrU2XfaUYkQ/M2t4pWQ1LP8LHX5k=; b=c8fmnYIEc1ovGp4uC0m9i60XFgh92HdgnzUSbXuAZDZHPuJ0slEwX2DjTtrw6DYRdd bcSYGBH8Uwq8I+lO3LRl3kPddYgo6i/XYICAy6xq+Zxep7McKX0Uz3HK8gbwqIpTpk8Q pVRs2Xhl4qdBrCZrg4NL8n1IuEuNY4v7g6ZceEDdUdzDS9VTe8bHyaKcYsUroY+cN8+5 kA+PHqwS1oRq5q5e4e7PquENFUcna0OownUu27+FnWWo8f1S2d8ykF3+H2OYvMPfqxoX nw+4+INhj9JZulKKMc61HC23hXbrc4XfOAwnpK+wNvNqaEOehWAhr8Ca8Ke751T4Igx9 p/pw== X-Gm-Message-State: AOJu0YxxHLvdiB6xIJbk8OVtFJVme3OaeyTgEol7kfegQVotyxjOlzju 70vYfSHVaqiX+EPbkSekO6UInY8m9tnEMyo9Y9bK8nK19r2wZ+zQ34sGTnMaK2Jw X-Gm-Gg: Acq92OEu5/7FGokYx6GOe8e2onWUkpD6jlyae+qFsDzLqAEmF4qlJdBIgyNoQz779GV xUJCPKX+M0AcONxPaxVf6uVpGg28gBJCc1xkWGNs+yvInjtXHLjkiGqlB3tgJ2UprR1OO1xcynU rjgk6favUxYduJzHMZJf/grJp9AHvx8KUBtCn7ZonUqZrE3ZlWKHgq/2b767lvY11+iP0Sa3BIW 47DkC9KO5vuVe5t1nNNzjzvmPgJ8aoiBor9UuI9AvQ2TVa6ebPNyevQjvK+sPRJfEYWtCvCiwad 7IxvgVOV5sQHE1LWjmD6SVJ0iUrR3h4Z7bMOOLgX3VmGHq0IWnEYL5qUoJlvK7RdQ8CuAw6yHW/ dxeyIYHNILolMC5XlDXBBLYTf49vHtj0iiyJNWCGuFc/AHLwBCdYjTnNMeNng8Uz3XwzWfXpJbg zu55xH1HPg1t5xj2XcFMOzNwc+rG9lCJj7LT8K+neq X-Received: by 2002:a05:6a20:d808:b0:3b4:68c1:237b with SMTP id adf61e73a8af0-3b7962d74f0mr16096795637.19.1781604463758; Tue, 16 Jun 2026 03:07:43 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 37/83] target/riscv: Pass address as uint64_t in cpu_set_exception_base() Date: Tue, 16 Jun 2026 20:04:40 +1000 Message-ID: <20260616100527.1939565-38-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1032.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605601892158500 From: Anton Johansson The corresponding field CPUArchState::resetvec is uint64_t anyway, no need to use target_ulong. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-ID: <20260520125406.28693-27-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/cpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index e7ecc02b64..3e33efdc60 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -681,7 +681,7 @@ uint8_t riscv_cpu_get_fflags(CPURISCVState *env); void riscv_cpu_set_fflags(CPURISCVState *env, uint8_t); =20 #ifndef CONFIG_USER_ONLY -void cpu_set_exception_base(int vp_index, target_ulong address); +void cpu_set_exception_base(int vp_index, uint64_t address); #endif =20 FIELD(TB_FLAGS, MEM_IDX, 0, 3) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index bcc8a6bcb1..65bf931296 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -76,7 +76,7 @@ bool riscv_cpu_option_set(RISCVCPU *cpu, const char *optn= ame) =20 #ifndef CONFIG_USER_ONLY /* This is used in runtime only. */ -void cpu_set_exception_base(int vp_index, target_ulong address) +void cpu_set_exception_base(int vp_index, uint64_t address) { RISCVCPU *cpu; CPUState *cs =3D qemu_get_cpu(vp_index); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607618; cv=none; d=zohomail.com; s=zohoarc; b=eA7DHtJqGU8o+5v8Z/Hirw7lY8dqyRyK1Ov0R/k5XqwarcwQuPiVC+2g+0ZZ5sjXZnS8wZnb3F8R6uaDkySf/g64Ha8ahlYmfOtu388slo9KVpqXEsBMqvVdePWtEmQgWnSHiY6pJ+pE+BNNFzWhbHn2kMG/8z+xhYTHaGYeJGw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607618; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QfzpkzMSoMzwHbURFfVnVGFkL1vk1Nm5GaC2STIxEuw=; b=l/xe+PP2aLIURYhTeqWjHIE3bt86XruyI5ITTv7yApFtuBOXCkZyzDu0yD3ABg4yEB2QWHsxEoQO0p2RSx9sxT5emqSjZM+067yd30JW/30SVKPrcIS78M4H19w6i3vaNfS4MxZFnxYKB1IdQECwZs4roVeaEwkp2c8FPFX1zjQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607618050571.3768709356291; Tue, 16 Jun 2026 04:00:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQi0-00036I-IB; Tue, 16 Jun 2026 06:07:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQhy-0002m6-JW for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:50 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhw-0003XX-Ow for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:50 -0400 Received: by mail-pg1-x52d.google.com with SMTP id 41be03b00d2f7-c86307c4e6bso1517376a12.0 for ; Tue, 16 Jun 2026 03:07:48 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604467; x=1782209267; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QfzpkzMSoMzwHbURFfVnVGFkL1vk1Nm5GaC2STIxEuw=; b=HmFVq4r5DKD52W4qdwET6DZopEXBHCUO4X5iisF2PmDUsNfS3B7uEl8Xpme14xjF/E V5gnzRvAUP8EQd8TwBXXMlVAeU1gD54e9vthp0sfnNYcMwuLw++RD0dn4zNjfxF2Bm78 0eptpoVr2Q1OZIHPEjr14fu4bkc8ck+r+W7JRwWD/ZFZvxGvXjqZGCLiHUpHQ0LhjRgn BM1gmda9BsbE/w3Ryp9cAmsz6jn0Wx55wJvN3Kvp0vFu8/BxB6W+U083AJQTSIjA1It4 SGVCZMTNEsdjS8xm+Qd8715lAL0bG46irRTdYONktsafX6w/1LSCOY3NoM4+xv7G6tYU uHYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604467; x=1782209267; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=QfzpkzMSoMzwHbURFfVnVGFkL1vk1Nm5GaC2STIxEuw=; b=pEo+ZveuncPjeqdEzAx0uTti3oj127g2UH6Ff7+q0WncZDvSHRKyL5XU3aNyGx0IFB d4M/X/9SWBNSgP7mJR24dRxK6g9H4oCXTVPwdqHyazbVYBXaHzSGOmHPag0Jg7AAQt3a SNWRvc8rgKxmPJF+nfkfj1NBkqkW/yxxXj5TjS3XnI3uHxNXi8BzSptRlD84cE76iXaq mkRq305xb2g3C8plxyPjBIqf1373CSPPTa6gHDZwLi16Obw70X9GVVoU+dRZf7heak4Y DQM/OJaKgLi+IX26XTD6bta1G80M6JelT3R4cl7+WjS2OBpihLY6H6vXkvCMByc7DE2r 00xA== X-Gm-Message-State: AOJu0YzcvoBR1wYWbNVrcB4YUIGmIhvYtx2T8KMOCdeyJfJS4jmhjLgx 3h9OVFRLz5MlzezDr1adLb2zoSIZ0tCAyUlSRN814zINhTcg4TuC29ia72CtUF95 X-Gm-Gg: Acq92OE+2tSmlys1X6ykCHvgrNfQ9f8bYyCSExFNc4tRZch6YBlvIs6SSnjv+WkbBHX gPW0IrmYCIRN2wB0n7xdZk3qUiVgJ5YgiwORditVWUfZZ1lECA2DryUoCmCTYWOY02lsIDFvzU2 yK8JAysNIVa1nHBrLnQTxbjfknGAn5PC7vYqEfV1G1vCa6sRyTMTW9w7ctGDPNX00BX/1BE6Arg 0xvwikDwUcMYi9jLDvJ0Mus/rft0pqeLy+VaiS03skwnBiQgnPYAw5zTOBGtj54s83hET/YeY// 7RrR/JiHotkKZy1DnP8cnnQKa3NKnAZz2Z2XB85heCmDyNYX4OSwukz6mZrLPKdeOtOC8adNuS6 lB+gHxG/YU/FneSFnh71vQtkZtrTY0K6GIdJXA1R3q+2ftWwGblY6jrmqXQ5CO5Nf8XTG69RQv8 ooEdCbCkYYlCqjNCO873L2f+wjfa10UfNPpuqSuREB X-Received: by 2002:a05:6300:141:b0:3b4:701f:a0dc with SMTP id adf61e73a8af0-3b7e494193emr3182576637.26.1781604467235; Tue, 16 Jun 2026 03:07:47 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Johansson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 38/83] target/riscv: Fix pmp.h/cpu.h circular inclusion Date: Tue, 16 Jun 2026 20:04:41 +1000 Message-ID: <20260616100527.1939565-39-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607619907158500 From: Anton Johansson pmp.h is only needed and included for system mode, however relevant macros (MAX_RISCV_PMPS, OLD_MAX_RISCV_PMPS, MIN_RISCV_PMP_GRANULARITY) are required unconditionally by cpu.c, and so are defined in cpu.h. pmp.h then defines pmp_table_t depending on these macros and so requires cpu.h, and cpu.h in turn uses pmp_table_t resulting in circular inclusion. Move PMP macros to pmp.h and only expose PMP properties in system mode. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-ID: <20260520125406.28693-28-anjo@rev.ng> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 4 ---- target/riscv/pmp.h | 4 +++- target/riscv/cpu.c | 6 ++++++ 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 3e33efdc60..68e1ec37b4 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -181,10 +181,6 @@ extern RISCVCPUImpliedExtsRule *riscv_multi_ext_implie= d_rules[]; =20 #define MMU_USER_IDX 3 =20 -#define MAX_RISCV_PMPS (64) -#define OLD_MAX_RISCV_PMPS (16) -#define MIN_RISCV_PMP_GRANULARITY 4 - #if !defined(CONFIG_USER_ONLY) #include "pmp.h" #endif diff --git a/target/riscv/pmp.h b/target/riscv/pmp.h index eae305ac6f..4c95c2767a 100644 --- a/target/riscv/pmp.h +++ b/target/riscv/pmp.h @@ -22,7 +22,9 @@ #ifndef RISCV_PMP_H #define RISCV_PMP_H =20 -#include "cpu.h" +#define MAX_RISCV_PMPS (64) +#define OLD_MAX_RISCV_PMPS (16) +#define MIN_RISCV_PMP_GRANULARITY 4 =20 typedef enum { PMP_READ =3D 1 << 0, diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 65bf931296..1d9e575bb2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1147,7 +1147,9 @@ static void riscv_cpu_init(Object *obj) cpu->cfg.cbop_blocksize =3D 64; cpu->cfg.cboz_blocksize =3D 64; cpu->cfg.pmp_regions =3D 16; +#ifndef CONFIG_USER_ONLY cpu->cfg.pmp_granularity =3D MIN_RISCV_PMP_GRANULARITY; +#endif cpu->env.vext_ver =3D VEXT_VERSION_1_00_0; cpu->cfg.max_satp_mode =3D -1; =20 @@ -1385,6 +1387,7 @@ static const PropertyInfo prop_mmu =3D { .set =3D prop_mmu_set, }; =20 +#ifndef CONFIG_USER_ONLY static void prop_pmp_set(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -1493,6 +1496,7 @@ static const PropertyInfo prop_pmp_granularity =3D { .get =3D prop_pmp_granularity_get, .set =3D prop_pmp_granularity_set, }; +#endif /* !CONFIG_USER_ONLY */ =20 static int priv_spec_from_str(const char *priv_spec_str) { @@ -2522,9 +2526,11 @@ static const Property riscv_cpu_properties[] =3D { {.name =3D "pmu-num", .info =3D &prop_pmu_num}, /* Deprecated */ =20 {.name =3D "mmu", .info =3D &prop_mmu}, +#ifndef CONFIG_USER_ONLY {.name =3D "pmp", .info =3D &prop_pmp}, {.name =3D "num-pmp-regions", .info =3D &prop_num_pmp_regions}, {.name =3D "pmp-granularity", .info =3D &prop_pmp_granularity}, +#endif =20 {.name =3D "priv_spec", .info =3D &prop_priv_spec}, {.name =3D "vext_spec", .info =3D &prop_vext_spec}, --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606155; cv=none; d=zohomail.com; s=zohoarc; b=RwCMzx3qpF6F7dGYNFrIlOR3VCD4i2wKOlr+QjA9AKsZtUONXKxsCFblpfY9GNsbEpbjrQl45YmUrodhChWstdgSLnZzVNBywyaOzZZwfr1arDorWVu/sdo0egA//0xK80ViEAJB9Fh6SmtQzEu+LfUHiDE1AC1GfEm7G9JHsYU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606155; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=NZCHWP87J1KCGD/lBAcv42oDW/fhm0BWCAY/URuwlgY=; b=bNigQEB9vNdELWtX+FHuiwE7/X4xGfVFFVNfbaCYcsmhyHiviidQff27ztu8EZXb/M67qydTe9fFsy5aUpkkAiEdhXZ/7KGqI4ELIuGaxz9NQVEjDDQxO7b4IaW4DC3pavFvAY/fD15CEDY/aOD6hKnmlsZoB0b2ghKra3TEpq4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160615557658.834530968196646; Tue, 16 Jun 2026 03:35:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQi4-0003el-IY; Tue, 16 Jun 2026 06:07:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQi2-0003JD-5Y for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:54 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQhz-0003YC-Vv for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:53 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-36ba285e98bso4337249a91.2 for ; Tue, 16 Jun 2026 03:07:51 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604471; x=1782209271; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NZCHWP87J1KCGD/lBAcv42oDW/fhm0BWCAY/URuwlgY=; b=mhEuV067Amlq2Op/1hmoqYvuCNw9aUm6vZiZ8dMKtu15KkDSJMg3EZDKZmEb9lwHC3 QQSN46vkWYFfRrRnCMl2pytxP154RV9SLOUwINFyXPY4JSOAfOT7EBdRqaCdFvd8HR88 ovde2UA5SJ0/Ez3Jlx1XgJ4UW1u36TIwB/gVygVlTnKx0e6loC8l9nmKLH7XsAGdti0d 9QCm4XO0ajv8NavyDyTJMygObujzBT5vutLaWSapFwL+qE1f/UepUj8Wp/ClOGSczYPq VFeemnV8Kj0lgu2QCi62lsAWJHLe8NRhnVMB0SBP+UhMSTR1a9Buhm2TY3J4wlw6jWNz xksQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604471; x=1782209271; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=NZCHWP87J1KCGD/lBAcv42oDW/fhm0BWCAY/URuwlgY=; b=ftGb8OWgxfULxICNCqnNxkpDMx+6FNF+/LRk1OZaTmVAovNqIvoOv0gj9HKNxfFwFH lBCQAczf+L7/XJAN0VM4DyrInoXWZzsvDmOZhbFIVORP2nUnfIxi5RRvl7/GctNZps3S gdatgBaAtpCoL0Uh4zDXCwwG6KEtldKXi6brpnKD7mRGnuQWqQNHYqU/790aKWNkjFrB IR/GgDVwzbG71KSJ6qXv+q5fkXsKCITkZm+VhaB2PxrF61Bg+7LUzbihZQ+QlF6mkuue Sl2z5iCDY5docwKLNIZPdBJmRxlJJEJc333CMj1SHhXVutJ+K4aq5dQjbNfOqkzVffNe ZnUQ== X-Gm-Message-State: AOJu0Yz/dP0NjRld7k2+rIyWTiO+OXS838kMPgCUSH/5jrtPJ+7NqPCB vcEybzYRiO4MMwBPeIbshO75g/oySfK9Yo8rN5JDcWoigYSTltlPIPihJrZ2bKb8 X-Gm-Gg: Acq92OFleOAMjh14BClrWRZZ6b0yUOBH2N+hH9IRT01ICEfVVb+lKxIpE8DsST87Qm/ eEPfAPyITF9612E5lon5vWrCfgaGYY2XKGqm4aj1GlcSxUmhvpBzkT3By+Z58fgUBg4kUPIVgdW 5CEMqt+Mxu7XX+8DvyDYRxjWpusxvWSSyjCzY+Y6e50byAU0rOPqWPRA3CmXETLDH6dnXcnucjF Hf99CWNXD8CZLHudoA7hGz3k+y4s6IfsPju8nBkW7ligJgXhh2Wc7m0USyud1b2VnXsxhrDmsO9 34sDjyvfzGvnQMpMG1QvHPz+7mPaaWkeGWRGcee2iFZzppuMFVD8ux2ZJWxbJUvenhLx+o5epJP DgJafqEqiN5YLEMe72P4pBO9Y5OiV1TeFG5lZuIK5Fh5CmP66PHGWuVxHxk4rTDZx7M7TeAEOOs hVCnVGXCClWJQQlgvU00alCXhch7djUZx/fyEJ0xKJ X-Received: by 2002:a05:6a20:2443:b0:3b4:b276:a789 with SMTP id adf61e73a8af0-3b7841ab01dmr20768275637.36.1781604470534; Tue, 16 Jun 2026 03:07:50 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis , Chao Liu Subject: [PULL 39/83] target/riscv/cpu_helper.c: add PMA access fault Date: Tue, 16 Jun 2026 20:04:42 +1000 Message-ID: <20260616100527.1939565-40-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606157687158500 From: Daniel Henrique Barboza We're not doing anything special w.r.t PMA (Physical Memory Access) related faults, handling them like regular faults that will eventually turn to be regular page faults. Turns out we can't do that. Priv spec section "Virtual Address Translation Process" mentions: "If a store to the PTE at address a+va.vpn[i]=C3=97PTESIZE would violate a PMA or PMP check, raise an access-fault exception corresponding to the original access type." This means that we should handle PMA violations with access faults, like we're already doing with PMP. One clear code path where we should throw a PMA failure, exposed by [1], is the error return from address_space_ld* call. There's a separated issue with the error code being returned by them (it always return DECODE_ERROR even with 'rejected' reads) that we're going to work around it by assuming that we did a good job with the PTE address sanitization beforehand, and interpret that the error here is related to PMA. This is of course not ideal but fixing this QEMU API is out of scope for this work. All this said, we'll set the new pmp_pma_violation flag when we have either a PMP or a PMA fault, and everything else shall fall into place. [1] https://gitlab.com/qemu-project/qemu/-/work_items/3502 Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3502 Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: Chao Liu Message-ID: <20260522172502.320529-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 3 ++- target/riscv/cpu_helper.c | 34 +++++++++++++++++++++++++--------- 2 files changed, 27 insertions(+), 10 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 68e1ec37b4..1805aa8dfd 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -137,7 +137,8 @@ enum { TRANSLATE_SUCCESS, TRANSLATE_FAIL, TRANSLATE_PMP_FAIL, - TRANSLATE_G_STAGE_FAIL + TRANSLATE_G_STAGE_FAIL, + TRANSLATE_PMA_FAIL, }; =20 /* Extension context status */ diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index be36dca8f1..dc78fc1192 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1424,7 +1424,22 @@ static int get_physical_address(CPURISCVState *env, = hwaddr *physical, } =20 if (res !=3D MEMTX_OK) { - return TRANSLATE_FAIL; + /* + * The result of address_space_* APIs above does not take into + * consideration reject reads, putting all errors in the same + * cathegory (DECODE_ERROR), although there's a clear + * distinction between a rejected read versus other errors + * (see memory_region_dispatch_read() -> + * memory_region_access_valid()). This is something that + * we might have to deal with core QEMU logic some other + * day. + * + * For this particular error path, given that we made checks + * w.r.t legal PTE address before calling those APIs, we'll + * assume that anything !=3D MEMTX_OK means a rejected read, + * i.e. a PMA error. + */ + return TRANSLATE_PMA_FAIL; } =20 if (riscv_cpu_sxl(env) =3D=3D MXL_RV32) { @@ -1704,7 +1719,8 @@ static int get_physical_address(CPURISCVState *env, h= waddr *physical, } =20 static void raise_mmu_exception(CPURISCVState *env, target_ulong address, - MMUAccessType access_type, bool pmp_violat= ion, + MMUAccessType access_type, + bool pmp_pma_violation, bool first_stage, bool two_stage, bool two_stage_indirect) { @@ -1712,7 +1728,7 @@ static void raise_mmu_exception(CPURISCVState *env, t= arget_ulong address, =20 switch (access_type) { case MMU_INST_FETCH: - if (pmp_violation) { + if (pmp_pma_violation) { cs->exception_index =3D RISCV_EXCP_INST_ACCESS_FAULT; } else if (env->virt_enabled && !first_stage) { cs->exception_index =3D RISCV_EXCP_INST_GUEST_PAGE_FAULT; @@ -1721,7 +1737,7 @@ static void raise_mmu_exception(CPURISCVState *env, t= arget_ulong address, } break; case MMU_DATA_LOAD: - if (pmp_violation) { + if (pmp_pma_violation) { cs->exception_index =3D RISCV_EXCP_LOAD_ACCESS_FAULT; } else if (two_stage && !first_stage) { cs->exception_index =3D RISCV_EXCP_LOAD_GUEST_ACCESS_FAULT; @@ -1730,7 +1746,7 @@ static void raise_mmu_exception(CPURISCVState *env, t= arget_ulong address, } break; case MMU_DATA_STORE: - if (pmp_violation) { + if (pmp_pma_violation) { cs->exception_index =3D RISCV_EXCP_STORE_AMO_ACCESS_FAULT; } else if (two_stage && !first_stage) { cs->exception_index =3D RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAUL= T; @@ -1856,7 +1872,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, = int size, vaddr im_address; hwaddr pa =3D 0; int prot, prot2, prot_pmp; - bool pmp_violation =3D false; + bool pmp_pma_violation =3D false; bool first_stage_error =3D true; bool two_stage_lookup =3D mmuidx_2stage(mmu_idx); bool two_stage_indirect_error =3D false; @@ -1956,8 +1972,8 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, = int size, } } =20 - if (ret =3D=3D TRANSLATE_PMP_FAIL) { - pmp_violation =3D true; + if (ret =3D=3D TRANSLATE_PMP_FAIL || ret =3D=3D TRANSLATE_PMA_FAIL) { + pmp_pma_violation =3D true; } =20 if (ret =3D=3D TRANSLATE_SUCCESS) { @@ -1984,7 +2000,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, = int size, cpu_check_watchpoint(cs, address, size, MEMTXATTRS_UNSPECIFIED, wp_access, retaddr); =20 - raise_mmu_exception(env, address, access_type, pmp_violation, + raise_mmu_exception(env, address, access_type, pmp_pma_violation, first_stage_error, two_stage_lookup, two_stage_indirect_error); cpu_loop_exit_restore(cs, retaddr); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607272; cv=none; d=zohomail.com; s=zohoarc; b=W/AQpJ08WE4O5is39nJ+cIJgEDsEyr9wsszhBIqb7/bRUyZgHZuW3sxOFb/kjDWyEnyEnPYqFpDJ2Qbifn3Vuejd7ZVrJ4gvNlaufrzH4ltTAdlZfb7QqBIgPjZWr8akDaK4OEoMqCstddVa5l2a4THiO2q2uHkJifGZEVSBbyo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607272; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=nyHSF2KMbSW86nFqhbQ3pWPtxmeW7imEGewRME7P/WA=; b=gHQ4/fpBBJTBSoLAyxxgq/go1Ae8hoN5Z54JW+jrSKZiczpSIdZ1d5t4gJGZQGi5P8gtqGug4i5O6BIElm7GN8pQzBDWJp9KjHdXSkpgIoYWo2l+x9d9rQmkWDqNHeXqZRyWb6lkuoJMxZhLtTj6mP4j6kYj65arQlsXk+WfGo0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607272941355.58159696827204; Tue, 16 Jun 2026 03:54:32 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQi6-00040R-IP; Tue, 16 Jun 2026 06:07:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQi4-0003h0-JU for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:56 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQi2-0003Yx-R9 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:56 -0400 Received: by mail-pj1-x102e.google.com with SMTP id 98e67ed59e1d1-36bcbd7821fso2169511a91.2 for ; Tue, 16 Jun 2026 03:07:54 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604473; x=1782209273; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nyHSF2KMbSW86nFqhbQ3pWPtxmeW7imEGewRME7P/WA=; b=BLaquhJabLqlvetGRlZRimvruaSHc7r0msCkdydwiUxdiDvKjlbJfFuqhuw/jhHSyC 2yczRmjBZy5XT2+4Dcc7LT0U3z+rf+8iMGBee5W2huFroxtpF1irqD3+vbg5k0Js4nNM W1riVzmHqbgjkPBe4JoBOqtUai440y3xRDvkdldVeumuE+Up4c9naj+CQFZaPftZ6LKq a39QK2POwv7lxI6ueeaSyIs+ACnIsKz5Dogc900fT7uihVcbL2MwJEIdERK6yflR/6No mk9KdY1CwiC+WMUM1XoJ3OGjgXvGhHXZS1wFF2dLupmvYL43vpt5W9Dl6omZZnVQdKH2 SLOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604473; x=1782209273; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=nyHSF2KMbSW86nFqhbQ3pWPtxmeW7imEGewRME7P/WA=; b=X9yBtLLi95Q0EZn0yLD/N4LaIjmLJoYmYtKQQPoikNEHI7jzabxKs32WDyZ1k0f+5w qsnGsf+LimbradrqJhACVQY0KClLe+nIoqsWtpuU0pXBGy21n5wzqf/wWR96xQJcKadF cEPDa3Ya4MTKvkz5MZriDGZMx15CbBUKpzDayso+DlCIyz2sTHy2+hcD+IzHZykltwVy RFPEBlXrN4AaIj4cHcMeEZOKzfj3lBqUOBnKtdgKjgcvY7LJloSEZofPynqe850UMAv1 EHEv3Z7OCXHcht8JzATVJM/rb3VoKwZ5v2y+k0xC8g6Ny/v5LEfPjtWu68CwlmFUkhG7 75uA== X-Gm-Message-State: AOJu0YzGG5vnHuURSm/m5XSygmR6IchREEgdz6l0kLH9LyTIRePYggMy lwqvYUUKm9A0qIATid/BzVDNnF10f3g5wGW6bWKC67/fsQ1LF6ZJJ6gqJ5w6AKgE X-Gm-Gg: Acq92OGqh7hdBJNCcbUN/FkAva3Z+WOqfbazmVzlwhV0rg4IswSRO07Qyte6UF97Jlx KNFiE+5jGnhWvzTC8OXkUsuHm7Tvm2aBCfhyTmdCu2vPD1EpxQp6kHeQBr5quXvkz6r1OxMSAPi UTN4VUx4sF8lAcfvvRGM5kc1fcrLzgvPpQH3YBQu057HFtGH+vwfMmV8BY+iBgO3LQQndHszNjV wiU1JaMicyXxvEw89Z1H4d7xtoIn7Xe51kY+P4N3CNmBqYjDdLDiPw1r73liEgZSzW1Soat/fcD irkjC4vzA2JeVovJb2fIAQ3p8WDpS1UX/tX/FGjNXcs2SJULJpc9yy0LY5Ze0mtgmGJA9wM70LO UbQoMHtrJEexjKwVj+LvMkAu5onTFtZm6kGszywCyFFZNNAmZUZc4hwsW7j4V4dIASR6+VaYpbS W2WSibW2Ws/sl3ml8ZzwrUSVYJi9SMh+w1JDZSoc/J X-Received: by 2002:a17:90a:2ecc:b0:37c:63fc:b2fb with SMTP id 98e67ed59e1d1-37c63fcba6fmr463989a91.22.1781604473511; Tue, 16 Jun 2026 03:07:53 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 40/83] target/riscv/tcg: disable svnapot if satp_mode < sv39 Date: Tue, 16 Jun 2026 20:04:43 +1000 Message-ID: <20260616100527.1939565-41-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607273217158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza We did a recent change to disable svpbmt if satp_mode < sv39 that was discovered via a gitlab report. This time we don't have an opened bug but the problem is similar: RISC-V privileged ISA, chapter '"Svnapot" Extension for NAPOT Translation Contiguity, Version 1.0' states: "The Svnapot extension depends on the Sv39 extension." Do the same thing with svnapot, including the user warning in case we try to enable it without the required satp_mode: $ ./build/qemu-system-riscv64 -M virt,dumpdtb=3Dfdt.dtb \ -cpu max,sv39=3Doff,sv48=3Doff,sv57=3Doff,sv64=3Doff,svnapot=3Don qemu-system-riscv64: warning: svnapot requires at least satp sv39, current = satp mode: none Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260527213034.2094103-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/tcg-cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 21886e5d39..7e964e8f1a 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -848,6 +848,16 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) riscv_cpu_is_32bit(cpu))); } } + + if (cpu->cfg.ext_svnapot && cpu->cfg.max_satp_mode < VM_1_10_SV39) { + cpu->cfg.ext_svnapot =3D false; + if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_svnapot))) { + warn_report("svnapot requires at least satp sv39, " + "current satp mode: %s", + satp_mode_str(cpu->cfg.max_satp_mode, + riscv_cpu_is_32bit(cpu))); + } + } #endif /* * Disable isa extensions based on priv spec after we --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607197; cv=none; d=zohomail.com; s=zohoarc; b=RDeeN8HKpcJ3ISuLSXvqS11ocxOgoSi9Gbf2WZ7gCbCVwNYdhclL/wtls1nVl0spxEbXs4/Nq28/1Kgao65RIzNBoZ5OuY8bhzaw2MYBhDp0BEPZe+mI8kOe/xIfZ16MQrphoeewHBCsC03K7zAQ1B8M0NT19OQGHTXOKvNuD58= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607197; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=aDCgN8gmkzyX6a1YUeztPsr2d8QBaAYnsnmREj7auDM=; b=BtafOvfvrPp0gR0irZ5sfEkSAd7uzr5nBFuYgeUKECLfh0CfdgzsPGIQLXxKaA8caSGI/cBT/tDv/3dxzB5AmUyfCSk1gkZ8B8WeItqMYAsb3GHZXzTqV+TbgP5Z64dKNvJxqC8EbBaWUjTDdCPXZUKKkntGxRwSW1aGZsb+eQU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607197281289.0091773388252; Tue, 16 Jun 2026 03:53:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiA-0004Sw-44; Tue, 16 Jun 2026 06:08:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQi8-0004JK-6q for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:00 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQi6-0003ZL-8Z for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:07:59 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-36d630c0e35so4254014a91.3 for ; Tue, 16 Jun 2026 03:07:57 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604477; x=1782209277; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aDCgN8gmkzyX6a1YUeztPsr2d8QBaAYnsnmREj7auDM=; b=fQ8CMg8gRd3kHPl4qsTDcQAjx5dpy4oRux0D/ZywMKIIPiFSH5FwaJjQNByDZMTJTU jKXoO89JqfgA/LsF+aKUHCUZEfCTfg/WhDT4zLzOu0aUDjBf10+q1D1YyVoEcHi0X3kt DP/4It5L5JF8uh2xXQeSDcHEBerRypT3z60Yiuj+TRndSRCk5Fwgvh7GU1dB3y7xwZep p7WLFlZBAj8/LgaOOOq94OxXz4IQqzWduOEBvRDSaAFDTXqS0LTzrbPUIAABcGYn8En6 hVjUcGG5Qi92Um1m/mIFkNHQvZdq0pSez+ruD7sH20MCxkmCtRrhZFKGDZUJqKrz1OP+ 75nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604477; x=1782209277; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=aDCgN8gmkzyX6a1YUeztPsr2d8QBaAYnsnmREj7auDM=; b=qAWxU5f8Z9d6JgmpZOlv4+haGOYThg4rRUui7yF3zblKwXRiXdtkkf32f6pUbs95FB PPMS4FUD5NHBxb5q0yRywzuF0bAGiNoiNMtTltPjtbsba7qEBJX2qF7s3x0PNrFNCPmq cQdLDhvIiZJQ17w6I5IuD2MWmrUuFvURa/8lPBejgwOsy/9mFFQMOzXF282Au6ywkH0L VakY18neFWv+3A8ImAt5d6Ht5Hb2/USi3No3zlw6KZmlufePpSm2/KKGK/cU0UL4iaoT Mv8/0NpkbNZNMrMrVAF4OzkSAqNp0gLNAByhcEk8SuKIREgrd0srJxp7ZaLNgat3wKhq siJg== X-Gm-Message-State: AOJu0Yx/iv+UG2GyoMLq/hQ8k5e/WLOT/3bcF2V5u7wxSvVZ8IcHB9l6 Bemk9ZfkYX3Mfd3snmTb3g/kHmDAw+EgLHNBOZDPfhRFpR90EG8shN0D4yHZF+GI X-Gm-Gg: Acq92OFYWaW0TVe6HhNe701XH9WHKVsO6a/Wrh8q4URczDFMrzH7pswz5QHYgXS+mLw gIvajbby2SnYh24qd6iJGlHA1Gj3mJIzLJILaA2HCiNXCOdOv/S08HduJ0ntn48KPYvDMj9devH 3pFAuQD2/xGV0Vl6zcdOL+w+aMwnpxU7vyGX2CU4g3KPSqJLCkNXi1OshicN2ZC5o/9awNvSSrw uWW6nDsnfUJLE8G+m0Uu3Nhi+V+CH+d8Gf6SWV7sR339ZDQKXvyLz4MgGwELQDjB13aSwD2OOzr PBf/z0GVNiSUDJSgiKjWB/g/HKV5qLh8UOnK71HEO9YChnRyg7ZUjigg7rSzFgvb/CARuPHWm3b ZvB8sEfJCsiw1dkWm3Q5RzYwso0t4PAVgEB9pvy+zF8jyXiAAcff+dkK2vRPG9vb2KmKnBrip8R SSleFLGnSl2hy/ujg6GGTIshLl0EHk5M67f8oKrC07 X-Received: by 2002:a17:90b:50cb:b0:36b:a2cc:485b with SMTP id 98e67ed59e1d1-37c2bd52987mr14313958a91.21.1781604476647; Tue, 16 Jun 2026 03:07:56 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 41/83] disas/riscv.c: fix inst_length() Date: Tue, 16 Jun 2026 20:04:44 +1000 Message-ID: <20260616100527.1939565-42-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607198752158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza inst_length() can return 0 if 'inst' happens to not match any known encoding (like [1]). Returning 0 is not desirable, even for unknown encodings, given that it will cause a loop in target_disas() later on. The most recent version of the RISC-V unpriv spec ditched the sophisticated instruction-length encoding. We're now supporting only 16-bit and 32-bit length instructions, where: "All the 32-bit instructions in the base ISA have their lowest two bits set to 11. The optional compressed 16-bit instruction-set extensions have their lowest two bits equal to 00, 01, or 10." So the code is now simpler, never returning 0, and in fact it's the same thing we're already doing in insn_len() from target/riscv/internals.h. Due to include shenarigans we can't use that function in disas/riscv.c, but I believe we can cut ourselves some slack this time and not lose sleep over a 1 line of duplicated logic. We're documenting it though! [1] https://gitlab.com/qemu-project/qemu/-/work_items/3479 Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3479 Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260527200355.2068879-2-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- disas/riscv.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 36609efdf5..b8ec546883 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5084,26 +5084,10 @@ static bool check_constraints(rv_decode *dec, const= rvc_constraint *c) return true; } =20 -/* instruction length */ - +/* Same as insn_len() from target/riscv/internals.h */ static size_t inst_length(rv_inst inst) { - /* NOTE: supports maximum instruction size of 64-bits */ - - /* - * instruction length coding - * - * aa - 16 bit aa !=3D 11 - * bbb11 - 32 bit bbb !=3D 111 - * 011111 - 48 bit - * 0111111 - 64 bit - */ - - return (inst & 0b11) !=3D 0b11 ? 2 - : (inst & 0b11100) !=3D 0b11100 ? 4 - : (inst & 0b111111) =3D=3D 0b011111 ? 6 - : (inst & 0b1111111) =3D=3D 0b0111111 ? 8 - : 0; + return (inst & 3) =3D=3D 3 ? 4 : 2; } =20 /* format instruction */ --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605936; cv=none; d=zohomail.com; s=zohoarc; b=iNBMp+4ny+PibBUnIXuUIeTOwbHR5OHJhUzqIo93PJKhBIWvMvVlUjziXvED+Ug4ZELXr5QuFibgB04uJ2ZIanb0mz3NdgDzp7ccEnQfCuugiRJX92WSR0HfKKcvb254MX9nSln7tpfrFZiRGcYv5n5h8eoNvDuUJDb/u/H4Mvk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605936; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=PXnFZHopZftR9I1+ORxmZPXUGH/4V8C4QlkDG+My/vE=; b=GPp+h4GvlKCHfjEKK9Hfz8m46HiMSCXvTQFQw2msek1udltl91b5b+v083xuRjAAbgzCm3FKjFvNETi32aaSaT2UnoByyDqagWtmw8II2ggg8ZHweWDXqUR/XSDZ39u/iXZditk8TlR+yy/l3qRuj7yxcrAp0xPX46AeNsT7FhU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605936740905.6277413433347; Tue, 16 Jun 2026 03:32:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiF-0004g2-9J; Tue, 16 Jun 2026 06:08:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQiE-0004eM-3E for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:06 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQi9-0003Zo-JG for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:05 -0400 Received: by mail-pg1-x52b.google.com with SMTP id 41be03b00d2f7-c8585c51f1fso1922350a12.1 for ; Tue, 16 Jun 2026 03:08:01 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.07.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:07:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604480; x=1782209280; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PXnFZHopZftR9I1+ORxmZPXUGH/4V8C4QlkDG+My/vE=; b=rmebFsS/LMpIllHAzpmPqU8n15q4igxcEWB2sKTbENKjgWnekhiGh3AjIRuHedoqZ2 Big6wNjfa8x02XTSquvEpP0XUTpGBqhwRv8FXNn7da/IVtEMnKwR2MB0Ix9KhyFJB3HE K7SY/VdvwOrvey8PzR2uVpReHVyiLaJodJ0iveQMAQYaTFITrfyFOT6DwZuQLpkjKwMR A0dpQS4I+hHqEPIjsvQ57EueIRfoclyXx1iqpjwo1WzdlH6yeHl9i2enwfr0xpW9Yj3b /C5CtvNtMYa629n/BToVs3Gd9uXiqVwMgu1YPpqYAGhZiXF6/ktrLlH0QmPO4rjQWYaV CK7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604480; x=1782209280; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=PXnFZHopZftR9I1+ORxmZPXUGH/4V8C4QlkDG+My/vE=; b=pomNxJBwtajc+mVEuEgumBbo2wPs7ocQ1FhjTAEDtf5yYy7oI2YNxxcyBD+YHYR0Cy A9uaOFpc25pYI7AtU55DNPMifKDafC2r40A0OqmYF1WFRd7dbMCpJUmqnfO326mSqX+4 3Rn3GLEYyIMKaJNgX4LleoBcOo37Wl450PKjlbtLIIpXOwEFSX1PFH7wKYE9nqrsD77B B5LbpkMZBbBuPyp4/uMmRZeJR9JZhlMxaBvxNzn2V217fq8rZNIheoJk1ptNlqhiJPwG 0GNVRJmJrVV+f4dz554SsDyzPO0m8nYuYwdH9kKkm7iJPvQmu5psZE9ko1HRgnoonKYL ks8g== X-Gm-Message-State: AOJu0YxwpFTaB8ckDulAi5jvh9gbyxhALNUwaHoRDNpRaQj2+VBKZqCt 1nzF/1KzrnapWJ7EOu1/JV1ksGjivw5CS0FzkURUJbSPk7p764Pf4rjXYAJwtdt7 X-Gm-Gg: Acq92OEJ89HGq4cDKwIUr2FJjZs9e0FJFRbAnw9qh2owEwRV+ok3J0aijJdbFVqwRF7 DWQKbIr1znACLzmbxNoZN7zNAk3wHkhE4TiGG1CuhuM1ERcy5NieFdrjJkAwBuBg8If5ytf7woP F2H4zAM4oiKjj+WlMhnP2uNS86gqhLOdSlnXw/w5Bh0Px251ZlCkiqWm/AUDOUloFDlcm0+7j8s P97SbUcCs+dQIHARnV4zibPWBWz+f5ZjAYlTJLh68SRuj5gpMH3+8L2kGNwB6q3DZwOCFp7cMQf oGj85EFGHbLQgzM/PH7xycpQs+NvblX9RSGg3DpAinIgu0ZtAjGlnx7gEUr7x1zqLic0whvXokJ 7pEi5pLXb1SFeNAr5K5g3MuEDx4LzjTfkTrKvoa6YiVNwi1pNWPTTQqN8J4j6XfaV/XtV/YWKqg wNPdefcQwS3G4zMNCBeaWeSTO8oELkefWaZ6/dAkbf X-Received: by 2002:a05:6a21:b84:b0:3b3:bf9c:7c3b with SMTP id adf61e73a8af0-3b7e2200a2fmr2719638637.8.1781604480109; Tue, 16 Jun 2026 03:08:00 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Djordje Todorovic , Alistair Francis , Pierrick Bouvier Subject: [PULL 42/83] target/riscv: Initialize DisasContext::mo_endian once Date: Tue, 16 Jun 2026 20:04:45 +1000 Message-ID: <20260616100527.1939565-43-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605938342158500 From: Philippe Mathieu-Daud=C3=A9 The data access endianness is constant during a translation block; rather than calling the mo_endian() method each time, initialize the DisasContext::mo_endianness field once in TranslatorOps::init_disas_context(). Signed-off-by: Djordje Todorovic Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-2-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/translate.c | 9 ++++++--- target/riscv/insn_trans/trans_rva.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvd.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvf.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvi.c.inc | 8 ++++---- target/riscv/insn_trans/trans_rvzacas.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvzalasr.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvzce.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvzfh.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvzicfiss.c.inc | 4 ++-- target/riscv/insn_trans/trans_xmips.c.inc | 8 ++++---- target/riscv/insn_trans/trans_xthead.c.inc | 16 ++++++++-------- target/riscv/insn_trans/trans_zilsd.c.inc | 4 ++-- 13 files changed, 40 insertions(+), 37 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 3132386801..5405db9ea5 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -121,6 +121,8 @@ typedef struct DisasContext { bool fcfi_lp_expected; /* zicfiss extension, if shadow stack was enabled during TB gen */ bool bcfi_enabled; + /* Data endianness from MSTATUS UBE/SBE/MBE */ + MemOp mo_endianness; } DisasContext; =20 static inline bool has_ext(DisasContext *ctx, uint32_t ext) @@ -156,7 +158,7 @@ static inline MemOp mo_endian(DisasContext *ctx) #define get_address_xl(ctx) ((ctx)->address_xl) #endif =20 -#define mxl_memop(ctx) ((get_xl(ctx) + 1) | mo_endian(ctx)) +#define mxl_memop(ctx) ((get_xl(ctx) + 1) | (ctx)->mo_endianness) =20 /* The word size for this machine mode. */ static inline int __attribute__((unused)) get_xlen(DisasContext *ctx) @@ -1159,7 +1161,7 @@ static bool gen_amo(DisasContext *ctx, arg_atomic *a, TCGv src1, src2 =3D get_gpr(ctx, a->rs2, EXT_NONE); MemOp size =3D mop & MO_SIZE; =20 - mop |=3D mo_endian(ctx); + mop |=3D ctx->mo_endianness; if (ctx->cfg_ptr->ext_zama16b && size >=3D MO_32) { mop |=3D MO_ATOM_WITHIN16; } else { @@ -1180,7 +1182,7 @@ static bool gen_cmpxchg(DisasContext *ctx, arg_atomic= *a, MemOp mop) TCGv src1 =3D get_address(ctx, a->rs1, 0); TCGv src2 =3D get_gpr(ctx, a->rs2, EXT_NONE); =20 - mop |=3D mo_endian(ctx); + mop |=3D ctx->mo_endianness; decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); tcg_gen_atomic_cmpxchg_tl(dest, src1, dest, src2, ctx->mem_idx, mop); =20 @@ -1363,6 +1365,7 @@ static void riscv_tr_init_disas_context(DisasContextB= ase *dcbase, CPUState *cs) ctx->zero =3D tcg_constant_tl(0); ctx->virt_inst_excp =3D false; ctx->decoders =3D cpu->decoders; + ctx->mo_endianness =3D mo_endian(ctx); } =20 static void riscv_tr_tb_start(DisasContextBase *db, CPUState *cpu) diff --git a/target/riscv/insn_trans/trans_rva.c.inc b/target/riscv/insn_tr= ans/trans_rva.c.inc index 62c0fe673d..44c1696fe4 100644 --- a/target/riscv/insn_trans/trans_rva.c.inc +++ b/target/riscv/insn_trans/trans_rva.c.inc @@ -35,7 +35,7 @@ static bool gen_lr(DisasContext *ctx, arg_atomic *a, MemO= p mop) TCGv src1; =20 mop |=3D MO_ALIGN; - mop |=3D mo_endian(ctx); + mop |=3D ctx->mo_endianness; =20 decode_save_opc(ctx, 0); src1 =3D get_address(ctx, a->rs1, 0); @@ -65,7 +65,7 @@ static bool gen_sc(DisasContext *ctx, arg_atomic *a, MemO= p mop) TCGLabel *l2 =3D gen_new_label(); =20 mop |=3D MO_ALIGN; - mop |=3D mo_endian(ctx); + mop |=3D ctx->mo_endianness; =20 decode_save_opc(ctx, 0); src1 =3D get_address(ctx, a->rs1, 0); diff --git a/target/riscv/insn_trans/trans_rvd.c.inc b/target/riscv/insn_tr= ans/trans_rvd.c.inc index ffea0c2a1f..3b9a745520 100644 --- a/target/riscv/insn_trans/trans_rvd.c.inc +++ b/target/riscv/insn_trans/trans_rvd.c.inc @@ -60,7 +60,7 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a) } else { memop |=3D MO_ATOM_IFALIGN; } - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; =20 decode_save_opc(ctx, 0); addr =3D get_address(ctx, a->rs1, a->imm); @@ -85,7 +85,7 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a) } else { memop |=3D MO_ATOM_IFALIGN; } - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; =20 decode_save_opc(ctx, 0); addr =3D get_address(ctx, a->rs1, a->imm); diff --git a/target/riscv/insn_trans/trans_rvf.c.inc b/target/riscv/insn_tr= ans/trans_rvf.c.inc index 89fb0f604a..e935523c93 100644 --- a/target/riscv/insn_trans/trans_rvf.c.inc +++ b/target/riscv/insn_trans/trans_rvf.c.inc @@ -48,7 +48,7 @@ static bool trans_flw(DisasContext *ctx, arg_flw *a) REQUIRE_FPU; REQUIRE_EXT(ctx, RVF); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } @@ -71,7 +71,7 @@ static bool trans_fsw(DisasContext *ctx, arg_fsw *a) REQUIRE_FPU; REQUIRE_EXT(ctx, RVF); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_tr= ans/trans_rvi.c.inc index fea05d02cc..e47b16a7fa 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -392,7 +392,7 @@ static bool gen_load_i128(DisasContext *ctx, arg_lb *a,= MemOp memop) } } else { tcg_gen_qemu_ld_i128(t16, addrl, ctx->mem_idx, memop); - if (mo_endian(ctx) =3D=3D MO_LE) { + if (ctx->mo_endianness =3D=3D MO_LE) { tcg_gen_extr_i128_i64(tl, th, t16); } else { tcg_gen_extr_i128_i64(th, tl, t16); @@ -409,7 +409,7 @@ static bool gen_load(DisasContext *ctx, arg_lb *a, MemO= p memop) { bool out; =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } @@ -508,7 +508,7 @@ static bool gen_store_i128(DisasContext *ctx, arg_sb *a= , MemOp memop) tcg_gen_ext_tl_i64(tl, src2l); tcg_gen_ext_tl_i64(th, src2h); =20 - if (mo_endian(ctx) =3D=3D MO_LE) { + if (ctx->mo_endianness =3D=3D MO_LE) { tcg_gen_concat_i64_i128(t16, tl, th); } else { tcg_gen_concat_i64_i128(t16, th, tl); @@ -520,7 +520,7 @@ static bool gen_store_i128(DisasContext *ctx, arg_sb *a= , MemOp memop) =20 static bool gen_store(DisasContext *ctx, arg_sb *a, MemOp memop) { - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; if (ctx->cfg_ptr->ext_zama16b) { memop |=3D MO_ATOM_WITHIN16; } diff --git a/target/riscv/insn_trans/trans_rvzacas.c.inc b/target/riscv/ins= n_trans/trans_rvzacas.c.inc index 8d94b83ce9..79bca1e957 100644 --- a/target/riscv/insn_trans/trans_rvzacas.c.inc +++ b/target/riscv/insn_trans/trans_rvzacas.c.inc @@ -76,7 +76,7 @@ static bool gen_cmpxchg64(DisasContext *ctx, arg_atomic *= a, MemOp mop) TCGv src1 =3D get_address(ctx, a->rs1, 0); TCGv_i64 src2 =3D get_gpr_pair(ctx, a->rs2); =20 - mop |=3D mo_endian(ctx); + mop |=3D ctx->mo_endianness; decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); tcg_gen_atomic_cmpxchg_i64(dest, src1, dest, src2, ctx->mem_idx, mop); =20 @@ -121,7 +121,7 @@ static bool trans_amocas_q(DisasContext *ctx, arg_amoca= s_q *a) TCGv_i64 desth =3D get_gpr(ctx, a->rd =3D=3D 0 ? 0 : a->rd + 1, EXT_NO= NE); MemOp memop =3D MO_ALIGN | MO_UO; =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_concat_i64_i128(src2, src2l, src2h); tcg_gen_concat_i64_i128(dest, destl, desth); decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); diff --git a/target/riscv/insn_trans/trans_rvzalasr.c.inc b/target/riscv/in= sn_trans/trans_rvzalasr.c.inc index 0f307affec..79b0b2c63b 100644 --- a/target/riscv/insn_trans/trans_rvzalasr.c.inc +++ b/target/riscv/insn_trans/trans_rvzalasr.c.inc @@ -29,7 +29,7 @@ static bool gen_load_acquire(DisasContext *ctx, arg_lb_aq= rl *a, MemOp memop) return false; } =20 - memop |=3D MO_ALIGN | mo_endian(ctx); + memop |=3D MO_ALIGN | ctx->mo_endianness; memop |=3D (ctx->cfg_ptr->ext_zama16b) ? MO_ATOM_WITHIN16 : 0; =20 tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, memop); @@ -79,7 +79,7 @@ static bool gen_store_release(DisasContext *ctx, arg_sb_a= qrl *a, MemOp memop) return false; } =20 - memop |=3D MO_ALIGN | mo_endian(ctx); + memop |=3D MO_ALIGN | ctx->mo_endianness; memop |=3D (ctx->cfg_ptr->ext_zama16b) ? MO_ATOM_WITHIN16 : 0; =20 /* Add a memory barrier implied by RL (mandatory) and AQ (optional) */ diff --git a/target/riscv/insn_trans/trans_rvzce.c.inc b/target/riscv/insn_= trans/trans_rvzce.c.inc index 0d3ba40e52..71b4ca5473 100644 --- a/target/riscv/insn_trans/trans_rvzce.c.inc +++ b/target/riscv/insn_trans/trans_rvzce.c.inc @@ -185,7 +185,7 @@ static bool gen_pop(DisasContext *ctx, arg_cmpp *a, boo= l ret, bool ret_val) =20 tcg_gen_addi_tl(addr, sp, stack_adj - reg_size); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; for (i =3D X_Sn + 11; i >=3D 0; i--) { if (reg_bitmap & (1 << i)) { TCGv dest =3D dest_gpr(ctx, i); @@ -239,7 +239,7 @@ static bool trans_cm_push(DisasContext *ctx, arg_cm_pus= h *a) =20 tcg_gen_subi_tl(addr, sp, reg_size); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; for (i =3D X_Sn + 11; i >=3D 0; i--) { if (reg_bitmap & (1 << i)) { TCGv val =3D get_gpr(ctx, i, EXT_NONE); diff --git a/target/riscv/insn_trans/trans_rvzfh.c.inc b/target/riscv/insn_= trans/trans_rvzfh.c.inc index 791ee51f65..f36b46c211 100644 --- a/target/riscv/insn_trans/trans_rvzfh.c.inc +++ b/target/riscv/insn_trans/trans_rvzfh.c.inc @@ -49,7 +49,7 @@ static bool trans_flh(DisasContext *ctx, arg_flh *a) REQUIRE_FPU; REQUIRE_ZFHMIN_OR_ZFBFMIN(ctx); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; decode_save_opc(ctx, 0); t0 =3D get_gpr(ctx, a->rs1, EXT_NONE); if (a->imm) { @@ -74,7 +74,7 @@ static bool trans_fsh(DisasContext *ctx, arg_fsh *a) REQUIRE_FPU; REQUIRE_ZFHMIN_OR_ZFBFMIN(ctx); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; decode_save_opc(ctx, 0); t0 =3D get_gpr(ctx, a->rs1, EXT_NONE); if (a->imm) { diff --git a/target/riscv/insn_trans/trans_rvzicfiss.c.inc b/target/riscv/i= nsn_trans/trans_rvzicfiss.c.inc index cb9c5419fa..a813232887 100644 --- a/target/riscv/insn_trans/trans_rvzicfiss.c.inc +++ b/target/riscv/insn_trans/trans_rvzicfiss.c.inc @@ -113,7 +113,7 @@ static bool trans_ssamoswap_w(DisasContext *ctx, arg_am= oswap_w *a) decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); src1 =3D get_address(ctx, a->rs1, 0); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_atomic_xchg_tl(dest, src1, src2, SS_MMU_INDEX(ctx), memop); gen_set_gpr(ctx, a->rd, dest); return true; @@ -143,7 +143,7 @@ static bool trans_ssamoswap_d(DisasContext *ctx, arg_am= oswap_w *a) decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); src1 =3D get_address(ctx, a->rs1, 0); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_atomic_xchg_tl(dest, src1, src2, SS_MMU_INDEX(ctx), memop); gen_set_gpr(ctx, a->rd, dest); return true; diff --git a/target/riscv/insn_trans/trans_xmips.c.inc b/target/riscv/insn_= trans/trans_xmips.c.inc index c1a30156d3..1b9993a9b0 100644 --- a/target/riscv/insn_trans/trans_xmips.c.inc +++ b/target/riscv/insn_trans/trans_xmips.c.inc @@ -47,7 +47,7 @@ static bool trans_ccmov(DisasContext *ctx, arg_ccmov *a) /* Load Doubleword Pair. */ static bool trans_ldp(DisasContext *ctx, arg_ldp *a) { - MemOp memop =3D MO_SQ | mo_endian(ctx); + MemOp memop =3D MO_SQ | ctx->mo_endianness; =20 REQUIRE_XMIPSLSP(ctx); REQUIRE_64_OR_128BIT(ctx); @@ -71,7 +71,7 @@ static bool trans_ldp(DisasContext *ctx, arg_ldp *a) /* Load Word Pair. */ static bool trans_lwp(DisasContext *ctx, arg_lwp *a) { - MemOp memop =3D MO_SL | mo_endian(ctx); + MemOp memop =3D MO_SL | ctx->mo_endianness; =20 REQUIRE_XMIPSLSP(ctx); =20 @@ -94,7 +94,7 @@ static bool trans_lwp(DisasContext *ctx, arg_lwp *a) /* Store Doubleword Pair. */ static bool trans_sdp(DisasContext *ctx, arg_sdp *a) { - MemOp memop =3D MO_UQ | mo_endian(ctx); + MemOp memop =3D MO_UQ | ctx->mo_endianness; =20 REQUIRE_XMIPSLSP(ctx); REQUIRE_64_OR_128BIT(ctx); @@ -116,7 +116,7 @@ static bool trans_sdp(DisasContext *ctx, arg_sdp *a) /* Store Word Pair. */ static bool trans_swp(DisasContext *ctx, arg_swp *a) { - MemOp memop =3D MO_SL | mo_endian(ctx); + MemOp memop =3D MO_SL | ctx->mo_endianness; =20 REQUIRE_XMIPSLSP(ctx); =20 diff --git a/target/riscv/insn_trans/trans_xthead.c.inc b/target/riscv/insn= _trans/trans_xthead.c.inc index f8b95c6498..f4e3051000 100644 --- a/target/riscv/insn_trans/trans_xthead.c.inc +++ b/target/riscv/insn_trans/trans_xthead.c.inc @@ -349,7 +349,7 @@ static bool gen_fload_idx(DisasContext *ctx, arg_th_mem= idx *a, MemOp memop, TCGv_i64 rd =3D cpu_fpr[a->rd]; TCGv addr =3D get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zex= t_offs); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_ld_i64(rd, addr, ctx->mem_idx, memop); if ((memop & MO_SIZE) =3D=3D MO_32) { gen_nanbox_s(rd, rd); @@ -370,7 +370,7 @@ static bool gen_fstore_idx(DisasContext *ctx, arg_th_me= midx *a, MemOp memop, TCGv_i64 rd =3D cpu_fpr[a->rd]; TCGv addr =3D get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zex= t_offs); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_st_i64(rd, addr, ctx->mem_idx, memop); =20 return true; @@ -570,7 +570,7 @@ static bool gen_load_inc(DisasContext *ctx, arg_th_memi= nc *a, MemOp memop, TCGv rd =3D dest_gpr(ctx, a->rd); TCGv rs1 =3D get_gpr(ctx, a->rs1, EXT_NONE); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_ld_tl(rd, addr, ctx->mem_idx, memop); tcg_gen_addi_tl(rs1, rs1, imm); gen_set_gpr(ctx, a->rd, rd); @@ -591,7 +591,7 @@ static bool gen_store_inc(DisasContext *ctx, arg_th_mem= inc *a, MemOp memop, TCGv data =3D get_gpr(ctx, a->rd, EXT_NONE); TCGv rs1 =3D get_gpr(ctx, a->rs1, EXT_NONE); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, memop); tcg_gen_addi_tl(rs1, rs1, imm); gen_set_gpr(ctx, a->rs1, rs1); @@ -747,7 +747,7 @@ static bool gen_load_idx(DisasContext *ctx, arg_th_memi= dx *a, MemOp memop, TCGv rd =3D dest_gpr(ctx, a->rd); TCGv addr =3D get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zex= t_offs); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_ld_tl(rd, addr, ctx->mem_idx, memop); gen_set_gpr(ctx, a->rd, rd); =20 @@ -765,7 +765,7 @@ static bool gen_store_idx(DisasContext *ctx, arg_th_mem= idx *a, MemOp memop, TCGv data =3D get_gpr(ctx, a->rd, EXT_NONE); TCGv addr =3D get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zex= t_offs); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, memop); =20 return true; @@ -926,7 +926,7 @@ static bool gen_loadpair_tl(DisasContext *ctx, arg_th_p= air *a, MemOp memop, addr1 =3D get_address(ctx, a->rs, imm); addr2 =3D get_address(ctx, a->rs, memop_size(memop) + imm); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_ld_tl(t1, addr1, ctx->mem_idx, memop); tcg_gen_qemu_ld_tl(t2, addr2, ctx->mem_idx, memop); gen_set_gpr(ctx, a->rd1, t1); @@ -965,7 +965,7 @@ static bool gen_storepair_tl(DisasContext *ctx, arg_th_= pair *a, MemOp memop, addr1 =3D get_address(ctx, a->rs, imm); addr2 =3D get_address(ctx, a->rs, memop_size(memop) + imm); =20 - memop |=3D mo_endian(ctx); + memop |=3D ctx->mo_endianness; tcg_gen_qemu_st_tl(data1, addr1, ctx->mem_idx, memop); tcg_gen_qemu_st_tl(data2, addr2, ctx->mem_idx, memop); return true; diff --git a/target/riscv/insn_trans/trans_zilsd.c.inc b/target/riscv/insn_= trans/trans_zilsd.c.inc index f50c52f22c..8068cc1aec 100644 --- a/target/riscv/insn_trans/trans_zilsd.c.inc +++ b/target/riscv/insn_trans/trans_zilsd.c.inc @@ -30,7 +30,7 @@ static bool gen_load_i64(DisasContext *ctx, arg_ld *a) TCGv addr =3D get_address(ctx, a->rs1, a->imm); TCGv_i64 tmp =3D tcg_temp_new_i64(); =20 - tcg_gen_qemu_ld_i64(tmp, addr, ctx->mem_idx, MO_SQ | mo_endian(ctx)); + tcg_gen_qemu_ld_i64(tmp, addr, ctx->mem_idx, MO_SQ | ctx->mo_endiannes= s); =20 if (a->rd =3D=3D 0) { return true; @@ -85,7 +85,7 @@ static bool gen_store_i64(DisasContext *ctx, arg_sd *a) } else { tcg_gen_concat_tl_i64(tmp, data_low, data_high); } - tcg_gen_qemu_st_i64(tmp, addr, ctx->mem_idx, MO_SQ | mo_endian(ctx)); + tcg_gen_qemu_st_i64(tmp, addr, ctx->mem_idx, MO_SQ | ctx->mo_endiannes= s); =20 return true; } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606102; cv=none; d=zohomail.com; s=zohoarc; b=PUU49jcLEhIHIbZI37YWqPhGkQNxfuOTGRV2Q7wTKBxl4qqFp5YYU5xPTf0wh7terygEP5ldi0HJxzG2oluJkcHPxHPTMsfQFnE2ZzEAbf7BbDSNrnqDi9rhOFlqYNYHf1tsvGjuOrLpXWxOSDnfGZnxVhxWFIY38Zg8vi4HVM0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606102; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kbgCJ59Xgnc50VCPq3lgNF9mVy/0CctYffqoXbtdNfM=; b=mykZ6PHdHMAfWkWHg6cTe/rpMzQlkPlHOnW1LltwbG/y0zlDvKGXbGeIiRR0ucjpsUPpkRPf4rbpo5EdVX4z1EQwlimzi/XzT794b0iye17fpdqB517F0H8lsrfBWNV/nGBuMc1tn9S5yvzF1Ethg3Xx3956FjDgeOuvNBxX/fI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606102151461.06191642805095; Tue, 16 Jun 2026 03:35:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiG-0004ix-On; Tue, 16 Jun 2026 06:08:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQiF-0004fz-7C for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:07 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiD-0003a9-CT for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:06 -0400 Received: by mail-pj1-x1033.google.com with SMTP id 98e67ed59e1d1-36d98b9aa9aso3624238a91.3 for ; Tue, 16 Jun 2026 03:08:05 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604484; x=1782209284; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kbgCJ59Xgnc50VCPq3lgNF9mVy/0CctYffqoXbtdNfM=; b=qidP1XLWbk3P7KOBIJACBg8eDUZWRR1GY2Fg2H4lrdENjsqak0Fv4ECzhkfI4lYZqv 2WfHk4bL/FBrs0lyQNMuEvbost9Tks8DBxFZPJ2zDnDRGPLhYLJtqfojweOjbDQEHwVe 3WRtkGn3Mcb/itlAJVBvhJCoIbf/mP/fx2GMo4VHEkizTbzw5cotE4ReGRKqZmRjVMVS viUaEdbXTmD5LDTgPVIo+77+GlYRUNrKizM2t/CUtadLUVfR8ggVFm5bNdqdjEQOLbje +kDV/Fxi2cFAPvq4Br79MjZ8rf6v1XrU2HIGkY9JgKUycAOVrI6pABZU/FnWFcOSVAQe XYlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604484; x=1782209284; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=kbgCJ59Xgnc50VCPq3lgNF9mVy/0CctYffqoXbtdNfM=; b=IxbY3+YRSr616dd3sPuCQFxmjGnvZzvc5nxoryIn3d8Y9QTpKJhHMt3OyMG4rUTuX+ 0uNLW1NuF/ld1MmA9vXUbRRVpj7XAYauF9NWskFkGEvh3hxC0qtUC4kU80b9Dc7GRqfO 4h21s7nfiM4QJDitPYfYsaohfinqGN+vKpD0qI08VKRHWQQM8mjaMnIj2aRNtTEV6xEx LvDHTIHt/UYllOoVXUMhBnCkK069wDryyccjt5LAfRk8+9OOvgbXIivB0i9wx9zf8Ydm 3eIHh4x6mbovN6lKKXuJluZugEawarEE13Fds9q2xhFyzzNTkvPWxpyDJi56/1gidS1I ijCQ== X-Gm-Message-State: AOJu0YyD1mbvu6R4bMH/xA05ygW26Vy+4V4NyTQ/hUcS/o+fivyy1Dl9 SBKxP/YESloNpjzwZ4scLX0yWeY0m2wXbvLUyozEHJcf536BFdyRfzisxyDrkOnV X-Gm-Gg: Acq92OH2I3aNgh8z0FQxaMEuCXVTmF5nTgiw1yD36vgElNZO8LqGZiAEWcOuwpnGMHb L+iD5HlEJ9fK26BMEOR84RAR0afY6X/nIMMSjV4vCzYkt9hMGZyboTsfRXTfNAGGqalgMqlkJXW lPZkvymPA3Gg57iHRZa8ZiOCjxG1G0AS+phVCU8SWdp6EHft1tPW/JAFzhh8zFLywqGehtWhRSn HPiHko8I0I5oaNsMBMv9Ta0nXi2n7G6diZx+Kpm4RJk1CUfD7EnqWUWRZBNJz7Z9i9JtS+SVb8h Fy7Q/Opi5x84Ks/y0oEUwpwPL+I0FpX9NOaC/o6tsfGZKJc6xv2FfYfH/6Ez5IeDNQT6q/IlbMX zJ8C9uIxHgL4aRXcvQbQVpIGbFG6kbmrmwaKYKfYNYyoYrpPpCYd9v4jqIKZ4V6korusaXqxme1 TWEyzeiKrbnqJS0Ufgjrn3OIJn8xonSNnhUn+rTEUzgKgkXLtXRf0= X-Received: by 2002:a17:90b:2fc7:b0:37c:54d5:290e with SMTP id 98e67ed59e1d1-37c54d52dc3mr2488268a91.21.1781604483837; Tue, 16 Jun 2026 03:08:03 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Djordje Todorovic , Djordje Todorovic , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 43/83] target/riscv: Implement runtime data endianness via MSTATUS bits Date: Tue, 16 Jun 2026 20:04:46 +1000 Message-ID: <20260616100527.1939565-44-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606103814158500 From: Djordje Todorovic Make data accesses honour the MSTATUS MBE/SBE/UBE endianness bits instead of being hardcoded to little-endian. Update mo_endian_env() to pick the bit corresponding to the current privilege level (MBE for M, SBE for S, UBE for U). Remove the now unused mo_endian() helper. Note, TB_FLAGS has no free bits, so the data endianness is carried in the extended RISC-V TB flags stored in cs_base. It uses EXT_TB_FLAGS.BIG_ENDIAN at bit 33, leaving bit 32 for EXT_TB_FLAGS.ALTFMT. This keys TBs correctly on the current data endianness. Instruction fetches remain MO_LE unconditionally; RISC-V instructions are always little-endian per the ISA specification. Update the disassembler comment to clarify that BFD_ENDIAN_LITTLE is correct. Signed-off-by: Djordje Todorovic Co-developed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-3-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 1 + target/riscv/internals.h | 29 +++++++++++++++++++++-------- target/riscv/cpu.c | 7 ++----- target/riscv/tcg/tcg-cpu.c | 2 ++ target/riscv/translate.c | 15 ++------------- 5 files changed, 28 insertions(+), 26 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 1805aa8dfd..febd905389 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -714,6 +714,7 @@ FIELD(TB_FLAGS, PM_SIGNEXTEND, 31, 1) =20 FIELD(EXT_TB_FLAGS, MISA_EXT, 0, 32) FIELD(EXT_TB_FLAGS, ALTFMT, 32, 1) +FIELD(EXT_TB_FLAGS, BIG_ENDIAN, 33, 1) =20 #ifdef TARGET_RISCV32 #define riscv_cpu_mxl(env) ((void)(env), MXL_RV32) diff --git a/target/riscv/internals.h b/target/riscv/internals.h index e143a86f97..5d84e4de96 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -62,16 +62,29 @@ static inline bool mmuidx_2stage(int mmu_idx) return mmu_idx & MMU_2STAGE_BIT; } =20 +/* + * Return the endianness for the current privilege + * level, based on the MSTATUS MBE/SBE/UBE bits. + */ static inline MemOp mo_endian_env(CPURISCVState *env) { - /* - * A couple of bits in MSTATUS set the endianness: - * - MSTATUS_UBE (User-mode), - * - MSTATUS_SBE (Supervisor-mode), - * - MSTATUS_MBE (Machine-mode) - * but we don't implement that yet. - */ - return MO_LE; + bool be =3D false; +#if !defined(CONFIG_USER_ONLY) + switch (env->priv) { + case PRV_M: + be =3D env->mstatus & MSTATUS_MBE; + break; + case PRV_S: + be =3D env->mstatus & MSTATUS_SBE; + break; + case PRV_U: + be =3D env->mstatus & MSTATUS_UBE; + break; + default: + g_assert_not_reached(); + } +#endif + return be ? MO_BE : MO_LE; } =20 /* share data between vector helpers and decode code */ diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1d9e575bb2..ee74cc5b20 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -831,11 +831,8 @@ static void riscv_cpu_disas_set_info(const CPUState *s= , disassemble_info *info) info->target_info =3D &cpu->cfg; =20 /* - * A couple of bits in MSTATUS set the endianness: - * - MSTATUS_UBE (User-mode), - * - MSTATUS_SBE (Supervisor-mode), - * - MSTATUS_MBE (Machine-mode) - * but we don't implement that yet. + * RISC-V instructions are always little-endian, regardless of the + * data endianness configured via MSTATUS UBE/SBE/MBE bits. */ info->endian =3D BFD_ENDIAN_LITTLE; =20 diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 7e964e8f1a..60afb4ccc2 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -194,6 +194,8 @@ static TCGTBCPUState riscv_get_tb_cpu_state(CPUState *c= s) flags =3D FIELD_DP32(flags, TB_FLAGS, PM_SIGNEXTEND, pm_signext); =20 ext_flags =3D FIELD_DP64(ext_flags, EXT_TB_FLAGS, MISA_EXT, env->misa_= ext); + ext_flags =3D FIELD_DP64(ext_flags, EXT_TB_FLAGS, BIG_ENDIAN, + mo_endian_env(env) =3D=3D MO_BE); =20 return (TCGTBCPUState){ .pc =3D env->xl =3D=3D MXL_RV32 ? env->pc & UINT32_MAX : env->pc, diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 5405db9ea5..9684dbe752 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -130,18 +130,6 @@ static inline bool has_ext(DisasContext *ctx, uint32_t= ext) return ctx->misa_ext & ext; } =20 -static inline MemOp mo_endian(DisasContext *ctx) -{ - /* - * A couple of bits in MSTATUS set the endianness: - * - MSTATUS_UBE (User-mode), - * - MSTATUS_SBE (Supervisor-mode), - * - MSTATUS_MBE (Machine-mode) - * but we don't implement that yet. - */ - return MO_LE; -} - #ifdef TARGET_RISCV32 #define get_xl(ctx) MXL_RV32 #elif defined(CONFIG_USER_ONLY) @@ -1365,7 +1353,8 @@ static void riscv_tr_init_disas_context(DisasContextB= ase *dcbase, CPUState *cs) ctx->zero =3D tcg_constant_tl(0); ctx->virt_inst_excp =3D false; ctx->decoders =3D cpu->decoders; - ctx->mo_endianness =3D mo_endian(ctx); + ctx->mo_endianness =3D FIELD_EX64(ext_tb_flags, EXT_TB_FLAGS, BIG_ENDI= AN) + ? MO_BE : MO_LE; } =20 static void riscv_tr_tb_start(DisasContextBase *db, CPUState *cpu) --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607841; cv=none; d=zohomail.com; s=zohoarc; b=X6FPc/Ol9B1j/dnh+N4GI+7SZQOeYWnvRTObnUVMO9IGEiQ7aWdTSnJtwFsJynnWY3QFCWXwhLm3h7KPDaMdbdB53x4V/JQuSBdlCXaKxCZJ+GU3oNGD72SIJFYs2E2d89Jy8Rgyv9vto7y0nj5WBfJTZDsJZiwZWpOvuHnejbE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607841; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=84pgkHPEqKnO+5XQVV3HYQGTgjK8P0Ygb3uX514z88U=; b=SJKCq69zIfZI/H46/Xxgb4V25VBzKZHwawJtK+SHRM9QjyhFHe133IdPYY4X/BE5m487P/cBtbpGtueIMI/oqQyTHzhfzlW4MwcFuoch+Eowu3SdHkCMvB4vljgK/UD7nbObakCtzZkqb3NU1iiMaG3xMQHe7WvNVVQc1F6DwW4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607841706611.7438241327771; Tue, 16 Jun 2026 04:04:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiI-0004ke-HF; Tue, 16 Jun 2026 06:08:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQiH-0004k2-QB for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:09 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiG-0003aY-A0 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:09 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c858dc05ee3so2615922a12.2 for ; Tue, 16 Jun 2026 03:08:07 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604487; x=1782209287; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=84pgkHPEqKnO+5XQVV3HYQGTgjK8P0Ygb3uX514z88U=; b=RLo2ki+w1m9beydWsaI3C6qqf7W2lvRjxWZLY8sv5vibWkM87aB3pxv+0MHf1sLVvc jFmvt3H6bAwZdlsKoPjtw2WfXXkQirC+Jmb+EEmv4qyXLM5wChke1qf5WXXyPRTepBVD 5emx65ceEI6yMsqyxfUKhjZuVxGhLFa+kNYWUT5YWfUfR6cX1VrC25tapp3eZaDlocyx dATb7hD+WtU1y8Nm9pYl2DIrOKRrhs73pfh2zPPkUNJWWHVSaVfC6f13AqesBRalqfU9 JIRoie2r9LBYmIHWu9zojdkI68PF5QYsw49AfG9vvUcxwbKqUYFX9TmMHBGWkN8xg5z1 RaVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604487; x=1782209287; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=84pgkHPEqKnO+5XQVV3HYQGTgjK8P0Ygb3uX514z88U=; b=ZmU4zTHqY04h8lUGbmxYoyYjtICz0hNmAL9V4gQJ9CZVUaAGvl7jy/FyadtUXZ6sMY 9fmZCGhLhInfay/RyMO1yAc0eIuObofmcgAvcmglj21T/YYbttUfjYVF68M7cpSG6Dm3 u7r4FP1muzY1nY19REMZ4RoKQRDMrU3F5Vjq0DqKYpJqC9LgI5sVPcw43f/XDPtevUR2 bvWayAZTtnAEp/4v+5VHRTwszZta8+0Hq+lsPq6pZtZLxAfx/6f/JTW5zypiMjXS6ZNb 5dHbPM8KZsv0quHg0nqd/vQokMWEV1UU/Xo24KgJVCTbzlx701XZ5YZ1oj4s0VHsZkKY jdmw== X-Gm-Message-State: AOJu0YyshTeTWunxj2BT2K703ywiVyQ7P4sN0UvQg/dq+46QYvy6Wm6M T0WYnnTzQXtMxjMs67zfm1Wa+Vg3gjrAmmeX4+j6KYl3kWFCQ77QNg7JCGIyLZZ+ X-Gm-Gg: Acq92OGEgUH4THrBvU9HdZEYLI1OFCMQifzPfu3baluJ/P8xVxAQwbVd5I452v0USJP 9o44pBtDdoo+k6HCe0q794UpqzeoFJzh9+ddq3RRoSk8sfQaqtpLHHrM8Gvvh5uQSV9oyhXwWhf k5KYEhMELggJCjhpXEuaNoVkt2wTQyoXE82qI0Tksq3zilChL2/5luZ0aBXv59VBv/AL98QTF4M JPBVukaJLFxBxJbAmE08d1SKCTyCus0tK4eyTlAnax7uWwcSkSUvf2LduQZ8la2Y0z7W+T8xi8t a9+k/Amc1xnESKavSXto7FgSTL7N2XngcGhZ8R4csj4I9OyRt0qqU37+TJ0louoJPnjqpsxoe0F danVClXXL3/jxLcDqZsRpBD2kRhfr+nm1aiRe2lldlYHOn8TSbjCGzZaVnAlLgXguCeGSaj/SV+ +uilm6zD56JqTd4aRXMvDJ4fvxJrsct0/GXkKt+ppu X-Received: by 2002:a05:6a21:6492:b0:3b4:6c68:b100 with SMTP id adf61e73a8af0-3b7962c1131mr16386286637.19.1781604486978; Tue, 16 Jun 2026 03:08:06 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 44/83] target/riscv: De-indent some code in get_physical_address() Date: Tue, 16 Jun 2026 20:04:47 +1000 Message-ID: <20260616100527.1939565-45-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607843847158501 From: Philippe Mathieu-Daud=C3=A9 get_physical_address() is quite complex already. In order to make the two next commits simplers, de-indent one if() ladder. No logical change intended. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-5-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 33 ++++++++++++++++++--------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index dc78fc1192..a8d4a1a4f4 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1667,27 +1667,30 @@ static int get_physical_address(CPURISCVState *env,= hwaddr *physical, hwaddr l =3D sxlen_bytes, addr1; mr =3D address_space_translate(cs->as, pte_addr, &addr1, &l, false, MEMTXATTRS_UNSPECIFIED); - if (memory_region_is_ram(mr)) { - target_ulong *pte_pa =3D qemu_map_ram_ptr(mr->ram_block, addr1= ); - target_ulong old_pte; - if (riscv_cpu_sxl(env) =3D=3D MXL_RV32) { - old_pte =3D qatomic_cmpxchg((uint32_t *)pte_pa, cpu_to_le3= 2(pte), cpu_to_le32(updated_pte)); - old_pte =3D le32_to_cpu(old_pte); - } else { - old_pte =3D qatomic_cmpxchg(pte_pa, cpu_to_le64(pte), cpu_= to_le64(updated_pte)); - old_pte =3D le64_to_cpu(old_pte); - } - if (old_pte !=3D pte) { - goto restart; - } - pte =3D updated_pte; - } else { + if (!memory_region_is_ram(mr)) { /* * Misconfigured PTE in ROM (AD bits are not preset) or * PTE is in IO space and can't be updated atomically. */ return TRANSLATE_FAIL; } + + target_ulong *pte_pa =3D qemu_map_ram_ptr(mr->ram_block, addr1); + target_ulong old_pte; + + if (riscv_cpu_sxl(env) =3D=3D MXL_RV32) { + old_pte =3D qatomic_cmpxchg((uint32_t *)pte_pa, cpu_to_le32(pt= e), + cpu_to_le32(updated_pte)); + old_pte =3D le32_to_cpu(old_pte); + } else { + old_pte =3D qatomic_cmpxchg(pte_pa, cpu_to_le64(pte), + cpu_to_le64(updated_pte)); + old_pte =3D le64_to_cpu(old_pte); + } + if (old_pte !=3D pte) { + goto restart; + } + pte =3D updated_pte; } =20 /* For superpage mappings, make a fake leaf PTE for the TLB's benefit.= */ --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606837; cv=none; d=zohomail.com; s=zohoarc; b=GgHPs2suNmlQKsa4QCVBfUcJlyNX7p5AgbTdyQfrKAEBTnvYG0KzJqrBuw0mzKby3eUlYLZ+gx74i7QujduudRHFIBBJ0YbWl6g+NNS+kpx8pWb6eb//Pg6E06Pg01kdIg1Gcppl28OJUxev1eysfSyITELfPgL4jp8B66lTlps= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606837; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=lMD4n4yKqyqaSyFhuXV0YZ2Qu85Y+oSmxAVjdW60sk4=; b=O3RR0jWAc7jj+xv0c1V04Iuw8pSdxf3JFIr/IdMXLIMaWvwSBLb5b5NbD818X8azFTZ09s8Q8fis9p7UcHKSz+5guPUjHjMbhqeIPp1WSwCdjIOng0f0eisutoioub7rBKffEQDBK0WxLSs71gUfFOyU/GHVqNGUm/5x94mPT9E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606837183590.0912141158956; Tue, 16 Jun 2026 03:47:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiO-0004p0-9T; Tue, 16 Jun 2026 06:08:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQiN-0004oS-3q for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:15 -0400 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiL-0003bX-HO for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:14 -0400 Received: by mail-pg1-x536.google.com with SMTP id 41be03b00d2f7-c8857a27041so1312024a12.1 for ; Tue, 16 Jun 2026 03:08:13 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604492; x=1782209292; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lMD4n4yKqyqaSyFhuXV0YZ2Qu85Y+oSmxAVjdW60sk4=; b=GO5qU5QiugC2IyMxcudd4S18WuzTFJTA7RvCKYJuaVxl8RNMzagCi62I7g9qUlWoE5 juNsGahHDccyA9TsccxeJrRklGJKLgtvPgbvv2atVZXMhvCWOuIQCy2qgEvkPHq4v0Fy fGKS3QgdltRFfhHC7Ozm+zCWG5r0AmwvY9w8LHPLZRcFTmPbrM2mMsWE54YGN7XITjNp GpMzmdCxHP+Gkb6NXoikIY83l7tSXA8I/Z72zo5FixWsFTtEsw6xJmjxOk2cI8ox3/pw DFwDRNxeh21vYZgGekRUThLdlfDVI8MACYBCeDn5BlPnXfno269dYyRoNR+jL4wXm/lx LFhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604492; x=1782209292; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=lMD4n4yKqyqaSyFhuXV0YZ2Qu85Y+oSmxAVjdW60sk4=; b=YFLzgZto7TZ83NhfF4uINOccMBDv0xbyKFZ4t1L6Y4TznQPf13AIqFAfhruRFq30WO BNxtUabtkfX9nflSMMxRyOQSQ2pNlSiQfHwg4A/X0x2pLXVczgyNJq0t3TE0nmY93mhZ 4SkAYSGb+FYKpG4Zs+DZw7x9xpGoIx+LWm3LWMjI1JYD1sgXCQbcEB1uZ4XdCnspfwyq rlfKq0oYckf/l59k9UWF8Vyyf0OxRewKXwbo5Ir47uvwB6ywCLmco7KikjRw8SLeFEIy PE9O/R0Roq0+OirFid+Jkkm2hNeGjpiPbagsxSMISKhlgTmFcQ57I7uuyG5f/VZiX918 0r/Q== X-Gm-Message-State: AOJu0YxlA05pwzyCHr2YcD2h+s5AQlHESlxtcYcCtyOXZNQO1E42AYCw MyqzqUYxOoS4LwyO+mQkxQfTvHKwARUkrLVxYXgcqP2k56+ZIHRcwKES+ekfwggb X-Gm-Gg: Acq92OE0rpp8ukjjBI58uYppF4qgpmtn7FuPP66qKEBPSu9iK9dTOFzl8vYQT5qUYIM DlB6mjVmCIVHMzWoVIK2x+NuYh0bYQZPmk4qX1ANJ0WRCPfICjlFKxL3sq5CN6s/ZHamOADtTC7 l4A5bvTI7K/hUA/7fkq3xq/sWlpTSlBeqZntRG1Ne48GDX7vrUlgkQPLdhkXRD//prWldYY2j6a YueGoXw7Qpk2SWuIXkcPf2BE9hZLGI2zY4g6+lNBg81sbK6HoNC8NIRXrEW77xA2DYayFZXdS0T 3I2AaLap32kJ9tpV/DudoU1mmHNR0SORGTvBrtP6OvPeO/HHk6TZKDlL76wO9tAVqrG6ewlUTpZ +6v8BucloTl5WYvFiT2pdAZbxJsYnslMeoRaClqLgtrJdZuOa3f9Vl2Xa4oEovN6wse2qC/UCbi +XYjhS6jx3dN7w3JuZKYghEECIhvqMcEr/pD3lqjtY X-Received: by 2002:a05:6a21:9206:b0:3b4:3ef0:9132 with SMTP id adf61e73a8af0-3b7962554b9mr17021964637.11.1781604490723; Tue, 16 Jun 2026 03:08:10 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 45/83] target/riscv: Remove target_ulong use in get_physical_address() Date: Tue, 16 Jun 2026 20:04:48 +1000 Message-ID: <20260616100527.1939565-46-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=alistair23@gmail.com; helo=mail-pg1-x536.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606838850158500 From: Philippe Mathieu-Daud=C3=A9 Use uint32_t for RV32, uint64_t otherwise. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-6-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index a8d4a1a4f4..430378490f 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1675,16 +1675,18 @@ static int get_physical_address(CPURISCVState *env,= hwaddr *physical, return TRANSLATE_FAIL; } =20 - target_ulong *pte_pa =3D qemu_map_ram_ptr(mr->ram_block, addr1); - target_ulong old_pte; + void *pte_pa =3D qemu_map_ram_ptr(mr->ram_block, addr1); + uint64_t old_pte; =20 if (riscv_cpu_sxl(env) =3D=3D MXL_RV32) { - old_pte =3D qatomic_cmpxchg((uint32_t *)pte_pa, cpu_to_le32(pt= e), - cpu_to_le32(updated_pte)); + uint32_t cmp =3D cpu_to_le32(pte); + uint32_t val =3D cpu_to_le32(updated_pte); + old_pte =3D qatomic_cmpxchg((uint32_t *)pte_pa, cmp, val); old_pte =3D le32_to_cpu(old_pte); } else { - old_pte =3D qatomic_cmpxchg(pte_pa, cpu_to_le64(pte), - cpu_to_le64(updated_pte)); + uint64_t cmp =3D cpu_to_le64(pte); + uint64_t val =3D cpu_to_le64(updated_pte); + old_pte =3D qatomic_cmpxchg((uint64_t *)pte_pa, cmp, val); old_pte =3D le64_to_cpu(old_pte); } if (old_pte !=3D pte) { --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605755; cv=none; d=zohomail.com; s=zohoarc; b=CEXGFfX+Sr9vJLaUkaObT6jZBq7Pw4JmbRq8WtRCPfmDVdFPvXLYvxFCDzwyEPY/zpf2NduUf4fRYHxqmqeCGgNsmDTUYVGmRQZKTftbdFhZgHB1yR5bPVTlR0eQrkzdqvnLXYW8ILTQm5LiddIsrwX6FWBKP5auq7obSEBO7Ss= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605755; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=j4OxOYo/AGR6vOtP7Q8aQq8DU0Ortkt82PJXFt1tv7g=; b=U5QzSfWmp4yc8pP4BEsm5F//dfGfSwcYOso0HiRT6GtiwlDHbjNXYGFZnGTWsHaKTgHM+btrBeidd4heJCoqOQj8TEwi3kjGB1O7Yn9ALCq0H7NBLshHDC+lPlMe8wAWBTcZfn9VSVPLKaLHZedArYKkwE2SHoXrUzN7AjvXpuY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605755275872.1114071151155; Tue, 16 Jun 2026 03:29:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiR-00050s-1E; Tue, 16 Jun 2026 06:08:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQiP-0004vR-PT for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:17 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiO-0003bl-3R for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:17 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c85893bce34so1813190a12.1 for ; Tue, 16 Jun 2026 03:08:15 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604495; x=1782209295; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=j4OxOYo/AGR6vOtP7Q8aQq8DU0Ortkt82PJXFt1tv7g=; b=ThlSwzufZTwk6+qXFVWRGctINxGWTszIrqDKte3/hmN/PrkHK5OqeD0IkPg8HayTpt Eg+21ZKSaXySYrX0reJ8jnnWjQ28lQzy6q4fq71E5JYEDrW1ZT5ygGfo97xMxo1z2pbp Q81uneQ1QTgAjc2oq88jyWt2HNw+Qkyo/MFdCrzQSetQddNXrBNIS8Hw2B2OGZi+0QWS ab1dYJgxnE5hSumTGSXXAK2Jv+ID/t3LWq2AFmO6C030Yu9tC1jA+jZDa4NsICEFmhe7 eRdhR7fOWktbpw6shqOjBKYH/JwWDKmUAzzvSlGFcTLvu9+JDPkYdBBMuxQ4zzC0GXch VRrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604495; x=1782209295; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=j4OxOYo/AGR6vOtP7Q8aQq8DU0Ortkt82PJXFt1tv7g=; b=MyL6R9BzTTTpujScpDuBKvTw9ORfBaIZGb7kehukm0QcEkoyC5U1Qou/5c+P58prim dbibjrkVwYT7iQ+pUSGgnSV7hT3hKY+QXFrhjjSMqLdYOZT2WJ3bwXvjpu0hvcsQWAWQ pjGuWK0NtODNQA/kmcqSx725PWvbOOedEuZAa7geTpXC7tvcYZ8Rb5eudehzDnZOJrmE OFm2f4ad1UvEa0PBYufJBUoD9wnj/NB/YFmmyv7Ru+34mpqw8bzZTd97iXe1bw5fB5yr pza9Ts7IVRnKsePj3a32nGe5tUrGRoOB8mdWzq8aeURKmNryDD+hC6MpZyzyCS0OTZfh S4xA== X-Gm-Message-State: AOJu0YyqjyRuh1G9dYjZ2KU8vqFCGAEko6Wb2kUR+wCX334YbM9960Th qK6Vev6qcUJz5Q37O3A1HfWK6Iyk0+nAqDWQS04hge+poSl0GscO4YQ4I4zogEJq X-Gm-Gg: Acq92OGgEFQFstJ2Qwi393a0IZa7wggJS8jagiTR7c6u3OvZagqkzCommUgdthDmk4J phWvboic9lN1dh07bgi6gIcxb+W89kYLtMNKqtbS4eLsdLze1ao5nyE/Q3KFyvjAXZmxT44moCz Xu3PNe+TphsW8yeecFkbZ1phgbp9xuZOgbIekmeCu+tO60jr1pqqCLZEPlFUnMgdf9V4M0l3hHQ tGlNFUCRfl5I9P2fWebMuJh7MFaTe133O6lRXkqmYPKVXMelDE3R2FtU69earRqJGLKd0GL0GiK 8pFJ2hgwGHBoPSANWiE1QdofPEdF6yJoPPISUMl7qbESNyM4smUobqfF9i59lUMrAn/dxSDNsCF KcPOHL2rPljWN+kgcii05lwu/tMwjsunJkBkXBORjH8t1quzhYMyzzsenqCFbN3XU4Bmb4bIAM7 GLG5wUitg+kT4bDvsMA9tMD1lGzaoZATiekKEh79Yo X-Received: by 2002:a05:6a21:4d8e:b0:3a3:17f8:bedd with SMTP id adf61e73a8af0-3b7962bc4b9mr17033785637.17.1781604494540; Tue, 16 Jun 2026 03:08:14 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Djordje Todorovic , Djordje Todorovic , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 46/83] target/riscv: Fix page table walk endianness for big-endian harts Date: Tue, 16 Jun 2026 20:04:49 +1000 Message-ID: <20260616100527.1939565-47-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605757321158500 From: Djordje Todorovic The page table walker reads PTEs using address_space_ldl/ldq which use compile-time native endianness (always LE for RISC-V). However, when a big-endian kernel writes PTEs via normal store instructions, they are stored in big-endian byte order. The walker then misinterprets the PTE values, causing page faults and a hang when the kernel enables the MMU. The RISC-V privileged specification states that implicit data memory accesses to supervisor-level memory management data structures follow the hart's endianness setting (MSTATUS SBE/MBE bits). Fix both PTE reads and atomic A/D bit updates to use the explicit _le or _be memory access variants based on the hart's runtime endianness. Signed-off-by: Djordje Todorovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-7-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 430378490f..e5653a5730 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1370,6 +1370,7 @@ static int get_physical_address(CPURISCVState *env, h= waddr *physical, target_ulong pte; hwaddr pte_addr; const hwaddr base_root =3D base; + const bool be =3D mo_endian_env(env) =3D=3D MO_BE; int i; =20 restart: @@ -1418,9 +1419,11 @@ static int get_physical_address(CPURISCVState *env, = hwaddr *physical, } =20 if (riscv_cpu_mxl(env) =3D=3D MXL_RV32) { - pte =3D address_space_ldl_le(cs->as, pte_addr, attrs, &res); + pte =3D be ? address_space_ldl_be(cs->as, pte_addr, attrs, &re= s) + : address_space_ldl_le(cs->as, pte_addr, attrs, &res); } else { - pte =3D address_space_ldq_le(cs->as, pte_addr, attrs, &res); + pte =3D be ? address_space_ldq_be(cs->as, pte_addr, attrs, &re= s) + : address_space_ldq_le(cs->as, pte_addr, attrs, &res); } =20 if (res !=3D MEMTX_OK) { @@ -1679,15 +1682,15 @@ static int get_physical_address(CPURISCVState *env,= hwaddr *physical, uint64_t old_pte; =20 if (riscv_cpu_sxl(env) =3D=3D MXL_RV32) { - uint32_t cmp =3D cpu_to_le32(pte); - uint32_t val =3D cpu_to_le32(updated_pte); + uint32_t cmp =3D be ? cpu_to_be32(pte) : cpu_to_le32(pte); + uint32_t val =3D be ? cpu_to_be32(updated_pte) : cpu_to_le32(u= pdated_pte); old_pte =3D qatomic_cmpxchg((uint32_t *)pte_pa, cmp, val); - old_pte =3D le32_to_cpu(old_pte); + old_pte =3D be ? be32_to_cpu(old_pte) : le32_to_cpu(old_pte); } else { - uint64_t cmp =3D cpu_to_le64(pte); - uint64_t val =3D cpu_to_le64(updated_pte); + uint64_t cmp =3D be ? cpu_to_be64(pte) : cpu_to_le64(pte); + uint64_t val =3D be ? cpu_to_be64(updated_pte) : cpu_to_le64(u= pdated_pte); old_pte =3D qatomic_cmpxchg((uint64_t *)pte_pa, cmp, val); - old_pte =3D le64_to_cpu(old_pte); + old_pte =3D be ? be64_to_cpu(old_pte) : le64_to_cpu(old_pte); } if (old_pte !=3D pte) { goto restart; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781608022; cv=none; d=zohomail.com; s=zohoarc; b=cC9wEVMWStqVlWtcsDpZw5zzlRVs91+Y3LEXY5a+qvpS9sAAk1AZVeWM2Q+V0lXVLWzrdJfaK9AlLzLHBCw85E8QUrJt6A4A8at0WDJFMEmr+AtcI3dOoUxfHLgJL+qaPdo0Ug0rxfWNU7kdmnOmwq5ERYLNxB8DxZZghys1Rec= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781608022; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=EXqYnOvY3KwDuh3m0AauGU52HI7RWvVWxcP3+lQQkR0=; b=h+YUnijoVtU+j2mKijsvBgXI5Y6ij8GfG9h0o9LRu8NBf+GwVgXDKZEtsjMZa3pcqYUccqwzufIVYLnwsSs2XZ8ldU3E+vDelNkvOZkvPQ3PXDYjvHUlWjl+T07mx5enEaR1YqLDl7JX4U4LTH78Kl29j5fd8OeT4vSSdJCaIUY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160802293086.94139604349948; Tue, 16 Jun 2026 04:07:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiV-0005Ko-Cc; Tue, 16 Jun 2026 06:08:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQiT-0005DU-Gv for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:21 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiR-0003bz-Hp for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:21 -0400 Received: by mail-pj1-x102a.google.com with SMTP id 98e67ed59e1d1-36b9ec98144so3481243a91.1 for ; Tue, 16 Jun 2026 03:08:19 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604498; x=1782209298; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EXqYnOvY3KwDuh3m0AauGU52HI7RWvVWxcP3+lQQkR0=; b=BEj4z/jF2/C88DBZ/aDk1CGYpFZK5ogBDajDE0U+ayZglcjS4t5ZcJiXBJN03pwvg+ I89OSFfqPrK6ICkVNcVErjPOYOBVN/UWm3Uo3Px+XJ53DJ3zHDbchUevhUxXIuJK3H6H JiJO7mXwWJM6KE3BHfdyQXcnKRFOdDtRtvHGBb1i7obxRpawD9zRDaL5XL+l+lm8qwO6 wZ1eg0ANXaW8XTAU+asL1yKeg2oVmZ7JyHC4fX/tU1zi1qTUgEmKnPNMeL0NaYnp0f7l sOhIxB9w5PGmw+J2AfpV9ohhjYSuH2TJT0cPYinGPuGJNH2g9CGkl+Iy8Xd1iAWupI+W WLGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604498; x=1782209298; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=EXqYnOvY3KwDuh3m0AauGU52HI7RWvVWxcP3+lQQkR0=; b=lZ+F5UE/TwA2XTFFTSm02Hxy9l2vZhIH4vnNgO/u8Tx4huwzU0SrHR3nIUQ+gGsQuq ILw5A/2flPXPgTnFDV1qRhT3A0ZyvSv2YZXuQ2z2PzUpcqU49mw80X+lqJCWfBJ/D5iJ FK1izcwvakakt/UYzSGE5l5gAS/00u+8F0wwKAzLfD5Mo27hRqZu6JiA9tqBSwIaapS/ vyadiWJH7FBhwNx0+h0YfrHI7lkbSJH0JEhKWljrbcuxTnmhaX74xhDQ/VUky4UmdhgJ dgyWcsYWTaiftt2C5trolR+D30/m8ORoyWdRKIcrZcijdQAIwaVlriAYWw+thBkVxeZK pYlg== X-Gm-Message-State: AOJu0YzM3IH6eawISs1lwfaKG5WD8Um2Cl++S5zoLyc6Ge1g+HEIVHIx F4XpVikqiNEsR1DaMQSdLkpWtk7uePI1WXqKLI2Rxl7yPhyUMbqlj4HpBsn8Egp3 X-Gm-Gg: Acq92OHdmly52xt2aeK5Lhn2lxrKgCsBGTgLgfgEzu9DYN8CmM/Y1K3uFJ6IG4+n0gE QVwXtFCCDcgLKjt5OvvQl4ql4cZIysBuae9IM/cFe+hqrKi2dFUQxhTcGsrjYPl5sJKk6cQPqrA gl6nq8vVzHCsBysSJE5fVNRSlcZw4Q5YPDieE7g6mxyqNPbxpkaK2ecX1wzSBgHYXRNpu5Wu326 PA6U5VoKfEm7CPJcbay0sLPYmCk2j/iKnZ9WYEdTkWPRTs3gRlqI4+2yw/lNjrnCqgA/NQtCLn0 3Bytv/ORpnowHXplMg+Zv6CgjcrABbtHKyoyICHxNB34gQymj/bENQ3UTNn5wERQzJDdA9ILzbj sIf40Ro3U/22On542Pnqupkk2bc6+4mDtt0whwY/rK4nV2k2PqMYqCLJFXo4wsehC/7Wpa7RYg2 XUYCmgwbeQsaIZFz7qeHB2BDNsZExZGsEFHqmQhCSmQ/sAabg8rkw= X-Received: by 2002:a17:90b:5890:b0:37c:5453:8c3d with SMTP id 98e67ed59e1d1-37c54538cd3mr2564394a91.3.1781604498245; Tue, 16 Jun 2026 03:08:18 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 47/83] hw/riscv/boot: Rewrite setup_rom_reset_vec() using load/store API Date: Tue, 16 Jun 2026 20:04:50 +1000 Message-ID: <20260616100527.1939565-48-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781608023957158500 From: Philippe Mathieu-Daud=C3=A9 In order to make the following commits easier to review, do not pre-initialize the reset_vec[] array, fill each word one by one. Set the start and FDT load addresses using the load/ store APIs. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-8-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/boot.c | 55 ++++++++++++++++++++++--------------------------- 1 file changed, 25 insertions(+), 30 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index ae2f86c7ce..c6ab1cc8cf 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -18,6 +18,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/bswap.h" #include "qemu/datadir.h" #include "qemu/units.h" #include "qemu/error-report.h" @@ -444,6 +445,9 @@ void riscv_rom_copy_firmware_info(MachineState *machine, &address_space_memory); } =20 +#define CODE_WORDS 6 +#define DATA_WORDS 4 + void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState = *harts, hwaddr start_addr, hwaddr rom_base, hwaddr rom_size, @@ -451,43 +455,34 @@ void riscv_setup_rom_reset_vec(MachineState *machine,= RISCVHartArrayState *harts uint64_t fdt_load_addr) { int i; - uint32_t start_addr_hi32 =3D 0x00000000; - uint32_t fdt_load_addr_hi32 =3D 0x00000000; - - if (!riscv_is_32bit(harts)) { - start_addr_hi32 =3D start_addr >> 32; - fdt_load_addr_hi32 =3D fdt_load_addr >> 32; - } - /* reset vector */ - uint32_t reset_vec[10] =3D { - 0x00000297, /* 1: auipc t0, %pcrel_hi(fw_dyn) */ - 0x02828613, /* addi a2, t0, %pcrel_lo(1b) */ - 0xf1402573, /* csrr a0, mhartid */ - 0, - 0, - 0x00028067, /* jr t0 */ - start_addr, /* start: .dword */ - start_addr_hi32, - fdt_load_addr, /* fdt_laddr: .dword */ - fdt_load_addr_hi32, - /* fw_dyn: */ - }; - if (riscv_is_32bit(harts)) { - reset_vec[3] =3D 0x0202a583; /* lw a1, 32(t0) */ - reset_vec[4] =3D 0x0182a283; /* lw t0, 24(t0) */ + const bool rv32 =3D riscv_is_32bit(harts); + uint32_t reset_vec[CODE_WORDS + DATA_WORDS]; + + /* .text */ + reset_vec[0] =3D 0x00000297; /* 1: auipc t0, %pcrel= _hi(fw_dyn) */ + reset_vec[1] =3D 0x02828613; /* addi a2, t0, %p= crel_lo(1b) */ + if (harts->harts[0].cfg.ext_zicsr) { + reset_vec[2] =3D 0xf1402573; /* csrr a0, mharti= d */ } else { - reset_vec[3] =3D 0x0202b583; /* ld a1, 32(t0) */ - reset_vec[4] =3D 0x0182b283; /* ld t0, 24(t0) */ - } - - if (!harts->harts[0].cfg.ext_zicsr) { /* * The Zicsr extension has been disabled, so let's ensure we don't * run the CSR instruction. Let's fill the address with a non * compressed nop. */ - reset_vec[2] =3D 0x00000013; /* addi x0, x0, 0 */ + reset_vec[2] =3D 0x00000013; /* addi x0, x0, 0 = */ + } + if (rv32) { + reset_vec[3] =3D 0x0202a583; /* lw a1, 32(t0)= */ + reset_vec[4] =3D 0x0182a283; /* lw t0, 24(t0)= */ + } else { + reset_vec[3] =3D 0x0202b583; /* ld a1, 32(t0)= */ + reset_vec[4] =3D 0x0182b283; /* ld t0, 24(t0)= */ } + reset_vec[5] =3D 0x00028067; /* jr t0 */ + + /* .data */ + stq_p(&reset_vec[6], start_addr); /* start: .dword */ + stq_p(&reset_vec[8], fdt_load_addr); /* fdt_laddr: .dword */ =20 /* copy in the reset vector in little_endian byte order */ for (i =3D 0; i < ARRAY_SIZE(reset_vec); i++) { --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605385; cv=none; d=zohomail.com; s=zohoarc; b=LGdUWVxjfkVzTdxKBqVjhfzhKSEeeQc4odgr8BSKNISC5ldmk+sJQwkJST3zKH4vBvMIeDMuH5yJF3SN9tMoQ7A+0YoRxEuupQODe4Im+UAXr/NqW+oLqT965z/RP7J1XwKsWEXhDtM5zvNSomCfduOvq2rbUA4NbkgAIGLQlbQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605385; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8a171VpmQFGXoe3rT39lAdkfIikj6YLS/s1pyARELVY=; b=MuZ7FUbgxrad7cf44/FdbJ4RQiRzcOWo91YSMR2qdgmaU7uyDTuwFuWKRDNjtVZIUNNRyxeSb5dw4x1xNyHwtWX0KT3okDUI5S+NXFT2l5GdEHakUU0viwMz1DDmhJ5X8VBOLsqCk+/J2ImaUrMfYTUJUH/FSzNMtg7epmdXleY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605385074497.9406606652475; Tue, 16 Jun 2026 03:23:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQiZ-0005ZD-0U; Tue, 16 Jun 2026 06:08:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQiW-0005RK-PV for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:24 -0400 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiV-0003cF-14 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:24 -0400 Received: by mail-pg1-x536.google.com with SMTP id 41be03b00d2f7-c85c531d4a9so1680209a12.2 for ; Tue, 16 Jun 2026 03:08:22 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604501; x=1782209301; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8a171VpmQFGXoe3rT39lAdkfIikj6YLS/s1pyARELVY=; b=YFMFbSIcdNwdILNuNhWoa9Bc08tNQYLgplNTH6vIEtTFJw0Gg5bqQc0yrBS07ySTMI P9ZdfAZhyrR4a/ktItBEfS4kJ+s5U0BKAXx9hvI6CRQ76ovDXxjysG9ZSyp5o6n87FFy NipokBZN7mQAaoBIwcboQ71sptz3nHq3WbIamI1aPwPtyiN6pUcTIS6zJIAuBKdHWZ+l /5+8r8pzyZhiOPTGluYQV/vPpFakkgiKCdkP9eon0rXNGjlrmp2r22hYmWAUgwmDauDB mV66cgNgkC5pT7vTzvXI/sZ9y8jn+Vv0bJQibM9zMMvRpLRlVjbD27N1/6ThlojJPjs0 s1vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604501; x=1782209301; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=8a171VpmQFGXoe3rT39lAdkfIikj6YLS/s1pyARELVY=; b=kApd9SGs6qj9yIf+Vfv4+D2hCFjzFZRNPrTqS8Yw3rog5I0kZ2a5oNXpx17qE2HJ1S fxYRvms1OQ+MLNw+O3sqmTiZ2cvhd0Gb7DrYWzHRnp2gWTUOKwdOTiSZLEoMX5DrS+bx z3Rg900yv5eSoS4QtjGX9I0FHRedjkfRy1+bxi1VF4vz7V3/h2Di6Ebohu7A8QjKffWA jU1MOy2yT3UysaY+fU6Z1tRtdOsTSA67hhUMgFinYJLP6AQT/7dvR70UlKEJOO5R4ITR 2dyMF24N64Bzr/mUCnpqLosQqDuYLed1PYCtEM1NHXE0froKtokPR+PrNHrKnLr4REr5 hp8A== X-Gm-Message-State: AOJu0YxhmNYBpo4ZjEIu3zJ/DgNyWrGl08rtoHPFdxqZiA03JozjdYxu pgD6lh6Y42CWfBYt+092pHs2c4Hsng1TaAitPpo3y6tgf9AS6EoMKDOl9dOBrtha X-Gm-Gg: Acq92OEYngqOcQ88x9e1YQne9118TW7KdetY5JgLeNkWB8/N0bESrZI3C45RaBSlLFr am6YFDkCUV7ndOz2PUruKt8AGq3vlakBxZvNURJZ3UpGPBGUwRmq6Js2kuM01Kczdb7junR45Pa Yg/W+dtLpOm6E0a0BuyAyfOz2zLpUKM4M5PyBhIliC8NekQQaK7seJ5UNWqWjXPIzNE1gEkWqCb iT85REztfsFTXUJlztShpfCz+hPaf33ecePchfR17BHkleBq9yHH28fq+mLbqxeOsucsubscMIY TudEWLoyZaWYRRVb6003WDDvntesdOlx0prpdETfNv6e9HZo1b/y423/YKd1IVjHflYrSsxlba7 DaYc+xIbw+Ee1/XvrQF/uYEPMSjVnNcSh+zNywYV+0fBiirqqWe+xi/ZFJocjf2kPMdZrrA5S2A 35MCbQn1/WHhkLqwZnUDwaigDZjIZG5Vc47BJJWQCL X-Received: by 2002:a05:6a21:d84:b0:3b4:6dee:a427 with SMTP id adf61e73a8af0-3b796445fd5mr14540671637.44.1781604501476; Tue, 16 Jun 2026 03:08:21 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 48/83] hw/riscv/boot: Replace cpu_to_le32() -> const_le32() Date: Tue, 16 Jun 2026 20:04:51 +1000 Message-ID: <20260616100527.1939565-49-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=alistair23@gmail.com; helo=mail-pg1-x536.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605386708158500 From: Philippe Mathieu-Daud=C3=A9 Rather than adapting the array endianness when it it filled, directly initialize the CODE words with the correct endianness. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-9-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/boot.c | 30 +++++++++++++----------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index c6ab1cc8cf..4297949f6b 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -454,40 +454,36 @@ void riscv_setup_rom_reset_vec(MachineState *machine,= RISCVHartArrayState *harts uint64_t kernel_entry, uint64_t fdt_load_addr) { - int i; const bool rv32 =3D riscv_is_32bit(harts); uint32_t reset_vec[CODE_WORDS + DATA_WORDS]; =20 - /* .text */ - reset_vec[0] =3D 0x00000297; /* 1: auipc t0, %pcrel= _hi(fw_dyn) */ - reset_vec[1] =3D 0x02828613; /* addi a2, t0, %p= crel_lo(1b) */ + /* .text (RISC-V instructions are always little-endian) */ + reset_vec[0] =3D const_le32(0x00000297); /* 1: auipc t0, %pcrel= _hi(fw_dyn) */ + reset_vec[1] =3D const_le32(0x02828613); /* addi a2, t0, %p= crel_lo(1b) */ + reset_vec[2] =3D const_le32(0xf1402573); /* csrr a0, mharti= d */ if (harts->harts[0].cfg.ext_zicsr) { - reset_vec[2] =3D 0xf1402573; /* csrr a0, mharti= d */ + reset_vec[2] =3D const_le32(0xf1402573); /* csrr a0, mharti= d */ } else { /* * The Zicsr extension has been disabled, so let's ensure we don't * run the CSR instruction. Let's fill the address with a non * compressed nop. */ - reset_vec[2] =3D 0x00000013; /* addi x0, x0, 0 = */ + reset_vec[2] =3D const_le32(0x00000013); /* addi x0, x0, 0 = */ } if (rv32) { - reset_vec[3] =3D 0x0202a583; /* lw a1, 32(t0)= */ - reset_vec[4] =3D 0x0182a283; /* lw t0, 24(t0)= */ + reset_vec[3] =3D const_le32(0x0202a583); /* lw a1, 32(t0)= */ + reset_vec[4] =3D const_le32(0x0182a283); /* lw t0, 24(t0)= */ } else { - reset_vec[3] =3D 0x0202b583; /* ld a1, 32(t0)= */ - reset_vec[4] =3D 0x0182b283; /* ld t0, 24(t0)= */ + reset_vec[3] =3D const_le32(0x0202b583); /* ld a1, 32(t0)= */ + reset_vec[4] =3D const_le32(0x0182b283); /* ld t0, 24(t0)= */ } - reset_vec[5] =3D 0x00028067; /* jr t0 */ + reset_vec[5] =3D const_le32(0x00028067); /* jr t0 */ =20 /* .data */ - stq_p(&reset_vec[6], start_addr); /* start: .dword */ - stq_p(&reset_vec[8], fdt_load_addr); /* fdt_laddr: .dword */ + stq_le_p(&reset_vec[6], start_addr); /* start: .dword */ + stq_le_p(&reset_vec[8], fdt_load_addr); /* fdt_laddr: .dword */ =20 - /* copy in the reset vector in little_endian byte order */ - for (i =3D 0; i < ARRAY_SIZE(reset_vec); i++) { - reset_vec[i] =3D cpu_to_le32(reset_vec[i]); - } rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec), rom_base, &address_space_memory); riscv_rom_copy_firmware_info(machine, harts, --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607158; cv=none; d=zohomail.com; s=zohoarc; b=NfHflrQjNuEvpF+gEzUoqJDFBDlh8fViYKxSW7dUzeHTCS1YIKDlm/VszhH69JaaRJdtSn6j3oC7+1PfFFeKjNrrUqGD70TdH2CkPJrZBwEj6Np+paR8Sy2Crbh8rx1civCf6i3N8Unn7duBT61devHRQ6Hu+TUKCwmSgDXES4o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607158; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=783WOVRdzAZMS0Kq52fQLIJbCbqqdOyC83jusazd0xU=; b=T4Y6SfO1SoAwFwTvnrtGTs86oKhwCqdkdD20k3skFXKUyKQpNGHHvY8pWrgGgOlY3KVX3/LIgMLEb/xd36ywFJC0XiykTUySRb7o8dZVHrdX1UkAn4veecdsmoWAYRQgJn3aQ7bhq66HEWp/Dj7AVqinERFg3n3FCCYXCzrYgB8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607158528315.4316360869277; Tue, 16 Jun 2026 03:52:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQic-0005cT-K2; Tue, 16 Jun 2026 06:08:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQib-0005br-0E for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:29 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiZ-0003d2-7S for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:28 -0400 Received: by mail-pg1-x52d.google.com with SMTP id 41be03b00d2f7-c86307c4e6bso1517534a12.0 for ; Tue, 16 Jun 2026 03:08:26 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604506; x=1782209306; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=783WOVRdzAZMS0Kq52fQLIJbCbqqdOyC83jusazd0xU=; b=pEc1nrc62bXGyJE62HgdwZdGKSKxVnGgLw8OudXkFLJhOzb15bdrgfeNFJJp9fX1yp 3xQipo8ijLyzLG4wwMxYSaI6Cis5NhJjbpsY6nWMpDelD2aplU5/Idhnn+sJp6hAKajS jDOilsB3cXq0ue5siHcPZWr37H978lAhTrOg8yBy7nSZ3+8b+/neLlG5QBSKUBQnsypv f3UzBVFzu9f/7q2gARlZRQptzElub1XpAmD/oONIeUQvDd9MVMqRlTtVnfyJrxIlgOiO MKQfOeYHHzxcOlLoSh0D9lRs2Wym9+duYwunphLDuRYVpJakAOQ5yFM+xj+qML9o3rLV soaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604506; x=1782209306; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=783WOVRdzAZMS0Kq52fQLIJbCbqqdOyC83jusazd0xU=; b=ZtC9yB6PXdNPWbyj0wCx4tfCUBs1vsCJOZQn06yvPnVoHdz/n3tTuqnH4H5xbulZ5V qx6MFuqVnVOuuT4P4AETPf6JNfYRp/fUXEh6CHWunm6bkxLI62GjAmeWXO5nQBQ6Syij kq4boULM5Ei3IwbRT00y661bJZ5gx/2HgBzItqNUtwt+EtDTSni1/mjBcANBHRIlv/Q0 efVNZaNMSr2QMohLSVH3fjoc9Xm9HRvPNwosinZzJoOLCUB0ZNo1/kHgMlswuoSZE8z/ NC2/w8GScMzyujADdqbPOazrjzN4K2GsW8F6KtFIEHlzOK6mUWjJ4B52jaoz2aiQv4jl HWhA== X-Gm-Message-State: AOJu0Ywm0QM0qk9ItnTeZplZn9s0GishdidO4yqlsRvgKJ0GiX/lklg3 WD0ykLdygXenq4cX8aculyQlxzjBRAxeyulNHTiut+3R0fszwQWSaB4xxdS5bfh4 X-Gm-Gg: Acq92OHwFopQ7PP9i+Dt5WW69KZHQo3iM9hbEC3oLxhmtZWWsB4fnU5TCUaPTCm9MvI UysZGw8Yhyzj/LkvhPnbI7k/vRfYuIyK+P15bAXNcxX+ubqnAA+SYhPTcsRm0hJlhid9ilIPLki 7w6BKEKVmnlx8TSE2lmX/nP15ssVMGcRuMK5vk2Vvxtl/OXvWxEUFnFCpU25pH8Co7vq+N6N0fZ AfzTb+m7vyf44sJDAteNQlm4pEJFjejgD2x2+FE6lO+WLV5VQLwvo/exlPpxpjRwHHIT3Z+uDeu EAUBQ0jwpvC1Zeqtb4UqNOvbiE87m/xQ85NKtrhXWR391Xi/5LvPUojwkAZZN0BBXQYKvEskHq1 4OlkwQz/OOlWW6+0Mi9LLdZhVGGhHjhoIXkbtKZ10eBrsgECiqmaC428R9xL1PxmJxENmJQ4r3D N5DnTbB5jR4pjpUr2KTerBf8F8bBp7+WaiXkIJ4c4p X-Received: by 2002:a05:6a20:2443:b0:3b4:813d:dc1 with SMTP id adf61e73a8af0-3b7e49c16eemr3380073637.31.1781604505741; Tue, 16 Jun 2026 03:08:25 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Djordje Todorovic , Djordje Todorovic , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 49/83] target/riscv: Add big-endian CPU configuration field and reset logic Date: Tue, 16 Jun 2026 20:04:52 +1000 Message-ID: <20260616100527.1939565-50-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607160586158500 From: Djordje Todorovic Add a big_endian field to RISCVCPUConfig and wire it into the CPU reset path. When cfg.big_endian is set, riscv_cpu_reset_hold() writes 1 into the MSTATUS MBE/SBE/UBE fields using set_field(); otherwise it writes 0. This makes the reset value deterministic on both cold and warm reset. This models fixed-endian harts, not mixed-endian implementations where the guest can toggle MBE/SBE/UBE at runtime. The MBE/SBE/UBE bits are not included in the writable mask of any mstatus/mstatush/sstatus CSR write path (unchanged by this series), so the value chosen at reset is effectively hardwired per section 3.1.6.5 of the RISC-V Privileged Specification. The user-facing property and documentation are added in a later patch, once the full endianness support is in place. Signed-off-by: Djordje Todorovic Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-10-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/cpu_cfg_fields.h.inc | 1 + target/riscv/cpu.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/target/riscv/cpu_cfg_fields.h.inc b/target/riscv/cpu_cfg_field= s.h.inc index 734fa079f2..9eb47af0a7 100644 --- a/target/riscv/cpu_cfg_fields.h.inc +++ b/target/riscv/cpu_cfg_fields.h.inc @@ -157,6 +157,7 @@ BOOL_FIELD(ext_xmipscmov) BOOL_FIELD(ext_xmipslsp) BOOL_FIELD(ext_xlrbr) =20 +BOOL_FIELD(big_endian) BOOL_FIELD(mmu) BOOL_FIELD(pmp) BOOL_FIELD(debug) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ee74cc5b20..cc793aef18 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -740,6 +740,13 @@ static void riscv_cpu_reset_hold(Object *obj, ResetTyp= e type) env->mstatus =3D set_field(env->mstatus, MSTATUS_MDT, 1); } } + /* + * Model fixed-endian harts: MBE/SBE/UBE are initialized from the + * CPU configuration and are intentionally not writable via status CSR= s. + */ + env->mstatus =3D set_field(env->mstatus, MSTATUS_MBE, cpu->cfg.big_end= ian); + env->mstatus =3D set_field(env->mstatus, MSTATUS_SBE, cpu->cfg.big_end= ian); + env->mstatus =3D set_field(env->mstatus, MSTATUS_UBE, cpu->cfg.big_end= ian); env->mcause =3D 0; env->miclaim =3D MIP_SGEIP; env->pc =3D env->resetvec; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606273; cv=none; d=zohomail.com; s=zohoarc; b=WvzAoP7s5VmeF5OeLnVVbvfP06ch2DmH/P40O4OmiBQMPS37LOoMexTduAhmdx5LXKLdo/UI5TDxT0+YAPsLohwm1ebxbtGjuotKLFqaeZptrUhKStcDOnTof9URKDv5GEWGdJMtFTq6Ib8zgaWhRC3TXygtnOFyogrykFJnBLU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606273; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=a8PhlzPkw58bsUy5fB/Xu08IOcfbpJ5W/1XPZlVe/rE=; b=ic0jqC+vKudGHqYPWPI4iPXNVThJ5Wd9Xu7QtgKGLqZLpH4hCCAanJ9LWH4b6xSvELZkp4HfAz7aKDuDyJgAK97ukHYBqHdDPiso0xFU4Hbhj+ENPdEmdZLP/p9pMNGY80o+hY1Gh3RbkCnxVWPRQ/qnaqmlIm174ntUYB4MGTY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606272976701.3997684834096; Tue, 16 Jun 2026 03:37:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQig-0005lH-KZ; Tue, 16 Jun 2026 06:08:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQie-0005fO-JM for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:32 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQic-0003fU-V6 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:32 -0400 Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-c857fba35cfso1951290a12.1 for ; Tue, 16 Jun 2026 03:08:30 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604509; x=1782209309; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=a8PhlzPkw58bsUy5fB/Xu08IOcfbpJ5W/1XPZlVe/rE=; b=ZgL9sSSYfY3A9xfnQklUiJrpPksv1A/x7H2Fv2r6cy0SI7PCD1eojHt57FkycjRiwB E4j6/bA4yqGMP1Rys55VfbetbL2m1NjO5nr8D8OKkkwd5HXAKrWLZ5KNTY7vRFYG0Ybx 89Lya42zufskCd3FZBeuKsvYgudOUF5XUzLV+QUEX1LkvejN9TNlr/AtJ0URJ8Uon1KI NkLpvyMZdI2n26VutASVdFhAwsTL8wGIqgbvY+4cjT3WR94MvpYFnX0ImJiyW/BWrrWh WDLciYN4Wz9/n62ct2mTfj2eGLjPxzhVDKWth2cHmJzRTHkGmeXer0dPZG7EH2nK/y13 TJ3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604509; x=1782209309; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=a8PhlzPkw58bsUy5fB/Xu08IOcfbpJ5W/1XPZlVe/rE=; b=ZEbGlP4RSNG9FL9XRnP+hDUThmbl/tSoNtgaNMAoIQ4d+gUxC90d8q0mDJo20iFfkh sLr69fekvIsDDLZ7SzCMdgybIxBtQB+R4GiIMbD5uENIn0IZBjYcviyGN3UM9ErPMr3h MURY+oK1gQ9RdifKnz1yu4DkYCrE2FuL6ygyE2efpqA4VbaIdoPm/jEOMSiArSPU39li fufCwwXNKshSIi/RgohWUumMGrFzZ1X9t5zmToHPCwBCqqeQWrpnZqVTQECmL3Vqj/g1 A2dkRpvZG4N3VXp7iFgKKTeKj5isZg17RykTElt3kWCgtuvjf/ctEoaHj5X3oiNEUWLb 4Hpg== X-Gm-Message-State: AOJu0YySNmn7PNaKi+OEdHziJdSA2ipYIheTDmTky+73Cbq311U/zVAR 1TnfGSQdLJVQgDEMAoUdK0UJklvXzSJ9PbnT6JM7wxD6mr7WU8/11Zm7TJTX+qDQ X-Gm-Gg: Acq92OE3Bu3AZrS+I+FZFMCmLTmpRXhGxx5GYRNhSxFDnA225FhFiDdV+0L0w3dKPjq 5jKr3NL8cYwkAWtY7ENpeo6kCMw+yxIsF5EfG1KQ5YQZxkaSvYTa3pISIIup10eRnRhRIeZasIV yLJtvPYrbBV6pB7EwmNcZzF0LdynphBc/rIHjtWXkILrFcttYtqiOHkw6hZuXcSxPf2uhIWGWcU x1Vzn514aKNU8F07NYaDDxYfY/dOZIgEfstAY40z8YX6mqcnk1zSK23AIXzOUWKxBmKWJ5hToVd ap4pDVtjE/oeT5nZlWX57s631ptII2dgjzu54M1TIyag29q1fz1WS30qv44Ux8lBqEISi53+k0G XH1rK8YfI4GdnPFaG/fWb0vZkNDKGfBW6zmJ1eYKbx0sBBUi49Unr4pZliqeo9BQO1eo94iHUuC OhwBWOnIC0shT62StgVMriPlfBL9U/AUiRlaYMznA5 X-Received: by 2002:a05:6a20:7346:b0:3b4:65ad:b417 with SMTP id adf61e73a8af0-3b7e4dd7847mr3183512637.45.1781604509468; Tue, 16 Jun 2026 03:08:29 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Djordje Todorovic , Djordje Todorovic , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 50/83] hw/riscv/boot: Honour data endianness Date: Tue, 16 Jun 2026 20:04:53 +1000 Message-ID: <20260616100527.1939565-51-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606274473158500 From: Djordje Todorovic Check the hart endianness property and use it throughout the boot code: - ELF loading: pass ELFDATA2MSB or ELFDATA2LSB based on endianness - Firmware dynamic info - Reset vector: instructions (entries 0-5) remain always little-endian, data words (entries 6-9) use target data endianness. Signed-off-by: Djordje Todorovic Co-developed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-11-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/riscv/boot.c | 40 ++++++++++++++++++++++++++++------------ 1 file changed, 28 insertions(+), 12 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 4297949f6b..7c9cd61468 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -407,21 +407,31 @@ void riscv_rom_copy_firmware_info(MachineState *machi= ne, struct fw_dynamic_info64 dinfo64; void *dinfo_ptr =3D NULL; size_t dinfo_len; + const bool rv32 =3D riscv_is_32bit(harts); + const bool be =3D harts->harts[0].cfg.big_endian; =20 - if (riscv_is_32bit(harts)) { - dinfo32.magic =3D cpu_to_le32(FW_DYNAMIC_INFO_MAGIC_VALUE); - dinfo32.version =3D cpu_to_le32(FW_DYNAMIC_INFO_VERSION); - dinfo32.next_mode =3D cpu_to_le32(FW_DYNAMIC_INFO_NEXT_MODE_S); - dinfo32.next_addr =3D cpu_to_le32(kernel_entry); + if (rv32) { + dinfo32.magic =3D be ? cpu_to_be32(FW_DYNAMIC_INFO_MAGIC_VALUE) + : cpu_to_le32(FW_DYNAMIC_INFO_MAGIC_VALUE); + dinfo32.version =3D be ? cpu_to_be32(FW_DYNAMIC_INFO_VERSION) + : cpu_to_le32(FW_DYNAMIC_INFO_VERSION); + dinfo32.next_mode =3D be ? cpu_to_be32(FW_DYNAMIC_INFO_NEXT_MODE_S) + : cpu_to_le32(FW_DYNAMIC_INFO_NEXT_MODE_S); + dinfo32.next_addr =3D be ? cpu_to_be32(kernel_entry) + : cpu_to_le32(kernel_entry); dinfo32.options =3D 0; dinfo32.boot_hart =3D 0; dinfo_ptr =3D &dinfo32; dinfo_len =3D sizeof(dinfo32); } else { - dinfo64.magic =3D cpu_to_le64(FW_DYNAMIC_INFO_MAGIC_VALUE); - dinfo64.version =3D cpu_to_le64(FW_DYNAMIC_INFO_VERSION); - dinfo64.next_mode =3D cpu_to_le64(FW_DYNAMIC_INFO_NEXT_MODE_S); - dinfo64.next_addr =3D cpu_to_le64(kernel_entry); + dinfo64.magic =3D be ? cpu_to_be64(FW_DYNAMIC_INFO_MAGIC_VALUE) + : cpu_to_le64(FW_DYNAMIC_INFO_MAGIC_VALUE); + dinfo64.version =3D be ? cpu_to_be64(FW_DYNAMIC_INFO_VERSION) + : cpu_to_le64(FW_DYNAMIC_INFO_VERSION); + dinfo64.next_mode =3D be ? cpu_to_be64(FW_DYNAMIC_INFO_NEXT_MODE_S) + : cpu_to_le64(FW_DYNAMIC_INFO_NEXT_MODE_S); + dinfo64.next_addr =3D be ? cpu_to_be64(kernel_entry) + : cpu_to_le64(kernel_entry); dinfo64.options =3D 0; dinfo64.boot_hart =3D 0; dinfo_ptr =3D &dinfo64; @@ -455,6 +465,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, R= ISCVHartArrayState *harts uint64_t fdt_load_addr) { const bool rv32 =3D riscv_is_32bit(harts); + const bool big_endian =3D harts->harts[0].cfg.big_endian; uint32_t reset_vec[CODE_WORDS + DATA_WORDS]; =20 /* .text (RISC-V instructions are always little-endian) */ @@ -480,9 +491,14 @@ void riscv_setup_rom_reset_vec(MachineState *machine, = RISCVHartArrayState *harts } reset_vec[5] =3D const_le32(0x00028067); /* jr t0 */ =20 - /* .data */ - stq_le_p(&reset_vec[6], start_addr); /* start: .dword */ - stq_le_p(&reset_vec[8], fdt_load_addr); /* fdt_laddr: .dword */ + /* .data (must match the firmware's data endianness) */ + if (big_endian) { + stq_be_p(&reset_vec[6], start_addr); /* start: .dword */ + stq_be_p(&reset_vec[8], fdt_load_addr); /* fdt_laddr: .dword */ + } else { + stq_le_p(&reset_vec[6], start_addr); + stq_le_p(&reset_vec[8], fdt_load_addr); + } =20 rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec), rom_base, &address_space_memory); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781608022; cv=none; d=zohomail.com; s=zohoarc; b=PpSgQ6cR7P4VUNGZoAkTAZOweCr3VOdqNSWvn+/TZgAgCB13ApuDp48v4dyqXgWv49q8b3ebVQxMZIKJ5Qyqlj3SSjXy5ZHiOCe5hPW99F0rBk6t1Sb6zZ0oU6jvbldBh+CjD0dwUdUyxzBc9XUHVvxQLReAeoe2e/0Ap+cOJhk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781608022; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=VyznDJY0L2Bq22y7heSsow547LinZLhsCPsjjbdM4sU=; b=Y/BaumZzrIedGQtI/RyiScbBEkZINqj0vWyB2Zffylz6pWl6P0vsHCpfPdwjl188ioMOr7ij+yecA3xqi7qKjp7KOQ+KJ6RueUHoCpBNHPGdsrWVwA3EhpepOf0Zcw3R9vwNORxJMJChkjDgDW6aSy1tIEzv/mX4P7+YqCrWHx4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781608022563852.9926895321636; Tue, 16 Jun 2026 04:07:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQik-0005sx-55; Tue, 16 Jun 2026 06:08:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQii-0005rG-Fs for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:36 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQig-0003fx-Px for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:36 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-36bb3551f6eso3412752a91.1 for ; Tue, 16 Jun 2026 03:08:34 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604513; x=1782209313; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VyznDJY0L2Bq22y7heSsow547LinZLhsCPsjjbdM4sU=; b=Q2bsISYt5Z0PL3wDIq/+Xbj7O8lR/xOhNbKoEBRMk85yHmPRdrkoB0DxP+AypxpI5J ruN1qDq5Becj2Gejow26x9qxlrbiYhBigyTS0fNzW1wxrlV6WuUV31IiHtD7nz/Bt7gc duvP/jRmdb2lE6jMPiOh9nIWO4g98ueeiM6zZqREaWQ5te1pZlxkXxlEgJjXNKssC3y1 TNMLK1lGU9kFSLH9WFq57eigo7H3QgEl91p90xBWLAqc68Gy0LvAj/rl2AyTKutyEfXz 4yIeOhxyZ2eUAIaZnv16Zc34wqcRRaeY+MbnUDoovxFSFv91vYsp6IVMjIk4p1yQH5l9 8zpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604513; x=1782209313; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=VyznDJY0L2Bq22y7heSsow547LinZLhsCPsjjbdM4sU=; b=ooZNqCGrDbqCvpVmscWLS9Ye/Ke7Rg/7IA0yszMkk51H4UfWJCF+nB0NwIG+nJ4amm gorqD1554Cmw3Ffk54zMDZZzywSvt8N1/+aGTPPSPasd3Kpw+e1l0oMhUL6GRGr8j8Zx dbs7YqSk4x+MUFwIy2gA2lm2/jTsoUqjWpHdxCopTeB8pwNGg13sJFWrKki9Xyr9ZsDm VkVKZ0BiGJ0vmn1dttwWrjuQ1hI0eY+HlWMt88fUCmIbdLO/QMJtA+EF4DqbTBrmZ3F8 9ahGdX7/ezpZOJyIlMjVhtj+57O/Gt9Iop15WTKrN7hUXeTKvKtvqYWibDAOExPnBN4s bUhw== X-Gm-Message-State: AOJu0YwnPpUof42FT2N6VRu+ShBH+T7wu1ePHZoDEd4BE/rVM2HzWDiL V6aKvrMAB2TdBqzp9bvt/8TSVnPSzir6djnRcGKSPzWhnqbfF4TugWjgYmH9UvVo X-Gm-Gg: Acq92OHZP8TqpkABMlGiSvGApeayapVrn4DN/ZIFRa82NwmL959lrgZeHqXxLCQCGz7 9LMH/TBcnWw487YNFyJBw4gpXzh3i/qZ7Y7kimjfj2nIBbQVBUEzv/fJjBfG1xsAQS9G0RXQ+BI DROrf7awPJS9PM5VXcipijvHGZvLukUdrfRQFg2N2nrx+xvaTwOshDLgCqZT9jekzJE9+lojTTz mMF6mYTNnW3vv4d82ULnKdRPUUPTsMgLmd1Tg7ITcwI38aMbCrX3GWQPkfDJS8I9oTJ7GQsSkWk 67mvazqgAwP1ObB9McXBm3U5EFSS7SHr2XMHacCG+FHaOhyQ8X1LGKZpm2Pldol6ezWugQhURK6 0a1Gc8jBIWCFD/s5PQ2+KgNugI85Xxv7kqjinrZt/una9pMAM1A56khgSCr7uI7zv9LsYQ4JDDR WxyyLeHXuQ2Yh4r9wjAZdkGM8HhS9KtbFf1DrNsad1 X-Received: by 2002:a17:90b:2dca:b0:366:10f1:3d86 with SMTP id 98e67ed59e1d1-37c2bd75872mr14951022a91.22.1781604513468; Tue, 16 Jun 2026 03:08:33 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Djordje Todorovic , Djordje Todorovic , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 51/83] target/riscv: Expose and document the CPU 'big-endian' property Date: Tue, 16 Jun 2026 20:04:54 +1000 Message-ID: <20260616100527.1939565-52-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781608023956158501 From: Djordje Todorovic Now that the full big-endian data path is in place (runtime MSTATUS bits, boot code, and page-table walks), expose the "big-endian" property to users via DEFINE_PROP_BOOL and document it in docs/system/target-riscv.rst. Document that the property models fixed-endian hardware: it selects harts whose MBE/SBE/UBE fields are fixed to 1, and it does not model a mixed-endian implementation where software can toggle those bits at runtime. The property can be enabled from the command line, e.g.: -cpu ,big-endian=3Don Signed-off-by: Djordje Todorovic Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-12-philmd@linaro.org> Signed-off-by: Alistair Francis --- docs/system/target-riscv.rst | 29 +++++++++++++++++++++++++++++ target/riscv/cpu.c | 1 + 2 files changed, 30 insertions(+) diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst index 3ad5d1ddaf..afd86ca2ba 100644 --- a/docs/system/target-riscv.rst +++ b/docs/system/target-riscv.rst @@ -95,3 +95,32 @@ the images they need. * ``-bios `` =20 Tells QEMU to load the specified file as the firmware. + +RISC-V CPU endianness +--------------------- + +The RISC-V ISA specifies that instruction fetches are always little-endian, +while data accesses can be either little-endian or big-endian under control +of the MSTATUS ``MBE``/``SBE``/``UBE`` bits (see section 3.1.6.5, "Memory +Endianness", in the RISC-V Privileged Specification). + +QEMU implements the full data-endianness behaviour described by those bits. +In addition, the RISC-V CPU object exposes a ``big-endian`` boolean proper= ty +which models a big-endian-only hardware implementation, where the +``MBE``/``SBE``/``UBE`` bits are hardwired to 1. When the property is set, +the CPU is reset with all three bits initialised to 1, so the guest starts +executing in big-endian data mode from the reset vector. The property is a +static, per-CPU hardware configuration option and is not meant to be toggl= ed +at runtime. + +The property does not model a mixed-endian implementation where software c= an +toggle ``MBE``/``SBE``/``UBE`` at runtime. QEMU's RISC-V CPUs treat these +fields as fixed by the CPU configuration: they are reset to 0 by default a= nd +to 1 when ``big-endian`` is enabled. + +The property can be enabled from the command line, for example:: + + -cpu ,big-endian=3Don + +No upstream CPU model currently defaults to big-endian; the property is +provided so that big-endian-only RISC-V CPU variants can be modelled. diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index cc793aef18..5a3560308f 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2525,6 +2525,7 @@ RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rule= s[] =3D { =20 static const Property riscv_cpu_properties[] =3D { DEFINE_PROP_BOOL("debug", RISCVCPU, cfg.debug, true), + DEFINE_PROP_BOOL("big-endian", RISCVCPU, cfg.big_endian, false), =20 {.name =3D "pmu-mask", .info =3D &prop_pmu_mask}, {.name =3D "pmu-num", .info =3D &prop_pmu_num}, /* Deprecated */ --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606115; cv=none; d=zohomail.com; s=zohoarc; b=mMFjkSCy51KmHk1BbIQbSvAtgv/zjD7A289Coap13r9XKoRDMWPYGyYtl/h4L0Ykc31tz8/5MQCVaLS5WIUoK4KNKWVwkun/wObCo1sEAabOqd8KJL4qPaxf1Re/h4vqhgEKXhxrjnvS4uPkkxnEtqPnAc676v8HxKqpfCxNahs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606115; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=o6/HL728qanwHhItg7PFEzOq2yYEp9+MhTefHX4QvFE=; b=MToaxC2wm3/BozSFQ6Hg/MGCXvVDMWJjoyym0NpNWh8I5ROnvo6gpmuJ3nxicWoKYRcqBflUTqwc1sRo0dkyyoqkuuvTj3egh0A+OEa7L6PUMXnuaRg9+hcTg41Ae6UCe3fk9QOFVht7n4iRL2xv4Nz6BqpkBoGAiFBsG//vN6Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606115312496.59087557475516; Tue, 16 Jun 2026 03:35:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQin-0005u3-Rs; Tue, 16 Jun 2026 06:08:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQim-0005ts-HL for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:40 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQik-0003iI-NL for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:40 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c858b5de728so2759392a12.0 for ; Tue, 16 Jun 2026 03:08:38 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604517; x=1782209317; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=o6/HL728qanwHhItg7PFEzOq2yYEp9+MhTefHX4QvFE=; b=XjHi7wUFb6gn947VERBkK6WKRU8f+FM+SFYNap5Pqv1QAPMr/cdF9DlPcZ9kxSegnP Fh9lGpuExmXb7jslBEdfzl7otVybLWLmfYPSA5BtAcepWwtYrpCp+0A4WkE3OaPPZAaV JM3Uf+tMsN6fGhP4dFMha9ROHHh/lw6KIO1nBa0vDER7Sje1xA0QhqiTk6CL3AomJlCY 9r0hOAaxKOy55eYONUa8PQmGcDb9smVY63X6zXc4UewVOSl6wE4fIcnBmgymurIv73bK 8RQX0+2AxTlMYljNtKxo8YFmPhhz4xC8/VQQnIZFc7TKWvilV1omYNdDNPRPPVKALBu0 N3DQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604517; x=1782209317; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=o6/HL728qanwHhItg7PFEzOq2yYEp9+MhTefHX4QvFE=; b=C7ihTii6Zmv6wpjDgEHnxxy+qk1bBJ7Zwzx6fvBzr7bhnggsVEjzTLwj0N25Lu+Ia/ n2Tk+nwT5OWPiwziWZID8Zib7pDTh2ursW2YDyutvHl0sHRgDBu9q0jSD+qQZcwqDquN d3B2ENksfgw54RXCK3b8/JYmWCU8vBDDNKfs1joWec/AckMLgq81k/Z38n2Fxwf+tSOp mn/iWW+N3uvWcrtZ+TIyBjhddhIfciOZEW0nGUqPiggGBkZZV8xvd/RhIUzmoFZrFPLl eWimFaDBvSvaX2t4Du4HQUC7IGGOn8ChPL59DS2cs76+nITCROtOkVHpAf5eixzx3uti MreA== X-Gm-Message-State: AOJu0Yx2poKzXAHUwyq54vk8kyF28h/xHT/WyhT2BchFwNlDVtbhHi75 dX7mrqBynfchhHAhG8p3XzCnwVpogCtjnrcmR6tvLOToeh5wbWs+HhqXZX2ly62A X-Gm-Gg: Acq92OF+8qO2CsUTZQ/B2zsJbxrXDtFmvDRaG0quduqio0m/SkB3pJQvHQi05Kr8cMC 0UGpqQFybnNLYGUs0U7/TSeAyVgoFairEfPWhdaCQq19G7PGDp+bNcgmPDWTPJRnWxonUJP2Q9V LSn1IF547i5L0JTEQHRiMKZs7QVE1jbRyMFH75TjwkDsp8DR5RJ1wtg1fwxQD8fayNPz45/7QtD wf/nIQYTkLpeZTPrNkPgMuawqvTJSfN2Ir6BOT/Z+sm3mnN2I4MPdl4ATStRIcODTNgre3l8rUG 2hRcRFNZ6+2PqOSFTVS5lz2O2u5GK8XBiYxgSLuzgGvn0C0PhCDzNIQXSUKK2D93k2Yw9E5NbNa YvfmAWrfcTzM1kW38A6ZgfF4aoB8LtFM7H8m0Xl0q2HjuIfX02/4LF3qlchxph+edU3hfzBgJ1T UE1mhAVNAtRGjH3jD2/0M53T22B+6JNTg7q9mQlQxM X-Received: by 2002:a05:6a20:d049:b0:3b4:85db:1bdb with SMTP id adf61e73a8af0-3b79642c556mr16772257637.44.1781604517478; Tue, 16 Jun 2026 03:08:37 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Djordje Todorovic , Djordje Todorovic , Thomas Huth , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Pierrick Bouvier Subject: [PULL 52/83] tests/functional: Add RISC-V endianness test Date: Tue, 16 Jun 2026 20:04:55 +1000 Message-ID: <20260616100527.1939565-53-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606117600158500 From: Djordje Todorovic Add functional test for the RISC-V 'big-endian' CPU property. Signed-off-by: Djordje Todorovic Reviewed-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-ID: <20260527201348.29511-13-philmd@linaro.org> Signed-off-by: Alistair Francis --- tests/functional/riscv64/meson.build | 1 + tests/functional/riscv64/test_endianness.py | 57 +++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 tests/functional/riscv64/test_endianness.py diff --git a/tests/functional/riscv64/meson.build b/tests/functional/riscv6= 4/meson.build index b996c89d7d..5871211e89 100644 --- a/tests/functional/riscv64/meson.build +++ b/tests/functional/riscv64/meson.build @@ -11,6 +11,7 @@ tests_riscv64_system_quick =3D [ ] =20 tests_riscv64_system_thorough =3D [ + 'endianness', 'boston', 'sifive_u', 'tuxrun', diff --git a/tests/functional/riscv64/test_endianness.py b/tests/functional= /riscv64/test_endianness.py new file mode 100644 index 0000000000..9e0b3b7db5 --- /dev/null +++ b/tests/functional/riscv64/test_endianness.py @@ -0,0 +1,57 @@ +#!/usr/bin/env python3 +# +# Functional tests for RISC-V big-endian support +# +# Copyright (c) 2026 MIPS +# +# SPDX-License-Identifier: GPL-2.0-or-later + +from qemu_test import QemuSystemTest, Asset +from qemu_test import wait_for_console_pattern + + +class RiscvBigEndian(QemuSystemTest): + """ + Tests for RISC-V runtime big-endian data support. + + Uses a bare-metal RV64 ELF that detects data endianness at runtime + by storing a 32-bit word and reading back byte 0. Prints "ENDIAN: BE" + or "ENDIAN: LE" to the NS16550A UART on the virt machine. + """ + + timeout =3D 10 + + ASSET_BE_TEST =3D Asset( + 'https://github.com/MIPS/linux-test-downloads/raw/main/' + 'riscvbe-baremetal/be-test-bare-metal.elf', + '9ad51b675e101de65908fadbac064ed1d0564c17463715d09dd734db86ea0f58') + + def _run_bare_metal(self, big_endian=3DFalse): + self.set_machine('virt') + kernel =3D self.ASSET_BE_TEST.fetch() + self.vm.add_args('-bios', 'none') + self.vm.add_args('-kernel', kernel) + if big_endian: + self.vm.add_args('-cpu', 'rv64,big-endian=3Don') + self.vm.set_console() + self.vm.launch() + expected =3D 'ENDIAN: BE' if big_endian else 'ENDIAN: LE' + wait_for_console_pattern(self, expected) + + def test_bare_metal_littleendian(self): + """ + Boot bare-metal ELF on virt with default little-endian CPU. + Expects "ENDIAN: LE" on UART. + """ + self._run_bare_metal(big_endian=3DFalse) + + def test_bare_metal_bigendian(self): + """ + Boot bare-metal ELF on virt with big-endian=3Don CPU property. + Expects "ENDIAN: BE" on UART. + """ + self._run_bare_metal(big_endian=3DTrue) + + +if __name__ =3D=3D '__main__': + QemuSystemTest.main() --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605590; cv=none; d=zohomail.com; s=zohoarc; b=fHvTJX0FZyG9R43fOsdjdlpDGsI7jbw778G4PdLK/XFc35vxJX7SCynjT1BtJGuuUl0xAe/1iQVAW2LgwYXOuwtWz+C1CMqArA1CmWVYagjFIt6gFWKzmkurm0gMypRDM9ZTdcsbPqlixu1heTPNdTdP5CBw3g/1xqvon6OU+uc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605590; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=mBrN/o82KX/qPCIojmby70acTiwbieQ12mji/59OGMU=; b=n3mMpNOJM4PujFxQDfqM8vbVHGSDaw8vBbOVhO3pY0qAfM3nQ2S2664WoA1K8IE+/RIunPpwxI5U5FAVQmmVLv8uYzTsPWIHZzqu+GBWH1FJaecH+xXzh2udru/MiU5EMicy7feajvT4iWsx7Ji93+XtgPamteObFI6HvV/P7jk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605590499445.276341959952; Tue, 16 Jun 2026 03:26:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQir-0005ux-5W; Tue, 16 Jun 2026 06:08:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQip-0005uT-Tl for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:43 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQio-0003ia-CC for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:43 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c85b2139015so1408959a12.2 for ; Tue, 16 Jun 2026 03:08:42 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604521; x=1782209321; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mBrN/o82KX/qPCIojmby70acTiwbieQ12mji/59OGMU=; b=B44lAT5sqbhTEtDIJ3dbK1VoKcVBZnCnS7W8EY0VhtYpihWn/tpysvIWn0F9SVb/aw XqWkzZZzYrKEZigUE4nwCLj2QmmVRhe/RHZsFH1Pd6gNSNevg/T8W8VeqIsI2TYWgTYT +5/NnE3vyXadIXOW3AT+6zjpvXRixivlbhqqrPV9yKwMrDdjjsVVlIFZR2ahkn/rRqLS oe3PotLcNWPaS1b/8wGraAuwWP+3aX5fVjSfkYIrk9BapdnIOIjHnWUavFEgND3yjMS2 w5jMmpcYSZPViB4kjImGGu96CDppR5yoLdDFIXf37hj98iNX7j/m1Y+sNZJnNIrBbuGq IPDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604521; x=1782209321; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mBrN/o82KX/qPCIojmby70acTiwbieQ12mji/59OGMU=; b=YaT2D5ITrG4+x1EXqY7TbWIE6jmlw2fMdXlLMk1733og+xGuJJShGfGwW3u+HWYhUQ UKh9jJizaBkxCJtJqJe8fSz5Kxw/hUOy7jyRrCNOadBe6V8Cxsz7WsK9L4Xiygik8qpy k9Pa4mCT4j75edNm5RRKLg59wM7MPyD2yHfBm5rhsrIKw/6pDvJE2fp1fAMI1GrdOJCP ibI0RtKoarajIRmSuQjbTdZ5rxb/UVkjxC3/dMzP/c3Nv5DsXRbwsTiR9ttgL1lLScAm NcbO76kQCpxJ6nX+Zwoj3CYrpXrBcfeLPYsURVfw7kFlzGduI+8I5moST9H3Xhs8xMhR LREg== X-Gm-Message-State: AOJu0YwgOmKq28wtcImvNqrtVNF/dIbw0WO1HG/uw0s+cKT77pLSzamC LUOSJ6qxHZbgEmlGTUHiupsLy60z2H2IchVrTDBydD4uS8GfVYCmVDs0eYcpyAcO X-Gm-Gg: Acq92OEDTE0ljaHeNro78CVYK3PIpAa8KAPK0oFR2aim7y53ZPOsZygNFZpOoTAzi+f GXHk1u+zomRW8a4+fB8CamuCUsBVpNJSpuuSEhpAiyXTkQSNqVTCTqeXyg6Uz/tlcySfm/meDQI Q8J1F86S5j6DhMXX2gvHkrrQxbsaq7bT2nTudRlYQJvvNKtdg0fsoqgh8mxrwnxOa+grT25YIm8 irQvKmEwzuB9zSa+0jmp72zH5bKWNVaw18Eq1hLWpOvB0CGz9izcGmqlCibgC3wWW/EyUkKudZf pcTD/aZysw1eSyKlKmJEPDO0Bo+/BiC9h8l07+yI/jNAwvFR5IGI30ka31I+J6pCtV4GYapTbwT t7vsqFQ6MmrWF+PPyeGE5q3RxmyTRL1VPrr9RUReoRS9ZneUx9Z3h8uxDRLsDUphP3yWgzv/1TB 9fkzS9lLaDD4yBwGXc9ss/oVBnTM7Vbxt2gIv3FQj5 X-Received: by 2002:a05:6a20:9186:b0:39b:8dcb:f36d with SMTP id adf61e73a8af0-3b7e49d09f6mr3387802637.35.1781604521064; Tue, 16 Jun 2026 03:08:41 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Jim Shu , Frank Chang , Alistair Francis Subject: [PULL 53/83] target/riscv: Add the implied rule for G extension Date: Tue, 16 Jun 2026 20:04:56 +1000 Message-ID: <20260616100527.1939565-54-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605591864158500 Content-Type: text/plain; charset="utf-8" From: Jim Shu Add the missing implied rule from G to imafd_zicsr_zifencei. We can also remove the auto-enables in riscv_cpu_validate_g() as IMAFD, Zicsr, Zifencei extensions can be enabled by the implied rule. Signed-off-by: Jim Shu Reviewed-by: Frank Chang Reviewed-by: Alistair Francis Message-ID: <20260528054213.678458-2-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 14 +++++++++++++- target/riscv/tcg/tcg-cpu.c | 21 ++++----------------- 2 files changed, 17 insertions(+), 18 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 5a3560308f..455d5b3d48 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2095,6 +2095,18 @@ static RISCVCPUImpliedExtsRule RVV_IMPLIED =3D { }, }; =20 +static RISCVCPUImpliedExtsRule RVG_IMPLIED =3D { + .is_misa =3D true, + .ext =3D RVG, + .implied_misa_exts =3D RVI | RVM | RVA | RVF | RVD, + .implied_multi_exts =3D { + CPU_CFG_OFFSET(ext_zicsr), + CPU_CFG_OFFSET(ext_zifencei), + + RISCV_IMPLIED_EXTS_RULE_END + }, +}; + static RISCVCPUImpliedExtsRule ZCB_IMPLIED =3D { .ext =3D CPU_CFG_OFFSET(ext_zcb), .implied_multi_exts =3D { @@ -2502,7 +2514,7 @@ static RISCVCPUImpliedExtsRule ZVFBFA_IMPLIED =3D { =20 RISCVCPUImpliedExtsRule *riscv_misa_ext_implied_rules[] =3D { &RVA_IMPLIED, &RVD_IMPLIED, &RVF_IMPLIED, - &RVM_IMPLIED, &RVV_IMPLIED, NULL + &RVM_IMPLIED, &RVV_IMPLIED, &RVG_IMPLIED, NULL }; =20 RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[] =3D { diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 60afb4ccc2..942c2851e8 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -498,30 +498,17 @@ static void riscv_cpu_validate_g(RISCVCPU *cpu) continue; } =20 - if (!cpu_misa_ext_is_user_set(bit)) { - riscv_cpu_write_misa_bit(cpu, bit, true); - continue; - } - if (send_warn) { warn_report(warn_msg, riscv_get_misa_ext_name(bit)); } } =20 - if (!cpu->cfg.ext_zicsr) { - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicsr))) { - cpu->cfg.ext_zicsr =3D true; - } else if (send_warn) { - warn_report(warn_msg, "zicsr"); - } + if (!cpu->cfg.ext_zicsr && send_warn) { + warn_report(warn_msg, "zicsr"); } =20 - if (!cpu->cfg.ext_zifencei) { - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zifencei))) { - cpu->cfg.ext_zifencei =3D true; - } else if (send_warn) { - warn_report(warn_msg, "zifencei"); - } + if (!cpu->cfg.ext_zifencei && send_warn) { + warn_report(warn_msg, "zifencei"); } } =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607364; cv=none; d=zohomail.com; s=zohoarc; b=G2YcJNSkn9Hs8MH74R//fIhanUWGpt8/apxTay/ZPEEut5ffQc1O2YCrf5MWGUfu/8QIE23aMQ85WoTqAu9Z7TD0tk+MVtdXF9buWYJ5a4ctBnTozya9bh83yX9852eAAFlgBE2NtAz+y4AOJtniMQeh8PCVkSxSBa7f9wGyEOA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607364; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3u9rzQOI9J4UTnWjFA47Hld4PgjrsYGswxeHP/aXJpU=; b=lRaXKxIBP6WhRddFdHXooWOf740hiXuGgJb6WP0hHkKWkF4D23uudMDqulsiivyA+PzbIXS8GGBnwKUPMV2BRjhCn1RTJ7nUSDEqKj61N8kNa5Z9gpAFJm08ewyYi/bBEplB/vVCdBAzu5eBuutOD30dxJeZ8jcjvIelAJVLHmM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607364169819.8617654641547; Tue, 16 Jun 2026 03:56:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQj0-0005zq-Fm; Tue, 16 Jun 2026 06:08:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQit-0005xR-Uv for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:48 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQis-0003j5-98 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:47 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-36b95eb4bb4so2741217a91.3 for ; Tue, 16 Jun 2026 03:08:45 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604525; x=1782209325; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3u9rzQOI9J4UTnWjFA47Hld4PgjrsYGswxeHP/aXJpU=; b=cNI4XQLUKwt18hQUHA/ctHpJEZU4FTY3qS9vsTSII0UgnsmHW+bftOtX6Wrmd2+QTo X8c7z7SnGRMJ7SVHEtjLasXG5cZggm/+PuXoN+uYP0naJKJngdQZcYROhFz5J3BBdsAq MK+L5w/S02DHn0EcO/Sh9CIQgxzQ7JQa//6Oh+YDN7eZtX+WKgRXPy6+2+/xVAGFFzbe 8q8ARupx0ZNoMk+3IDYv8XOUMHca1tsqB6NmRgmLSDpl3R94Nk90Bvbgyr2wjxZgZxEv YXqD8rynB51In3OajGS9a9S4llv6V/L8/ApOE/CMrtJyeb/7vzB7580s3Sh1I0LDIqiD /EIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604525; x=1782209325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3u9rzQOI9J4UTnWjFA47Hld4PgjrsYGswxeHP/aXJpU=; b=kOmMmrKiBgo/LJSq8xT5+IouRwxRcBQilgq2a/KYnBHlME6zI58UffWKx6zM+g07PY DUcYInck4cRmVAKip3dTrKFEPhgb5cDYB17ch5492riUSZkf6/wyxQPh3uWuC5ODEE8/ 6J+JGIq8dRl7Scf4SdDc1EFgtMuIy4qtsB/ISedIrc0x4ovyAO2Ybe+zP4pwOW3m63CV bZvVEGkeqiF/3HKu2zYK/XCGsHOR187thOGKN7k6GZ+c4Q8gmT0cSiWEdX1E5xiD6Bbi o8im4lgHwLruX2uyAs1waMGDtJPrP6M5kbpGqvCv7TXon+J1XaIhA4jIJnMIF3kSxbYF Tp7w== X-Gm-Message-State: AOJu0Yx6XysBBN6BIT/FUE0hs5wAwsQoIy18zWOWXQA3kQ5khYvX4OvV B6twL7RSw2F3jGAR07+wju1n5LyhhUoK6OA3xuHpQ+wsj5i1NJ8PyIXsEqXJeu3y X-Gm-Gg: Acq92OF7LVVRVj/OfXdqc4aiUjjz8RYZ9dtKSVDWnXdxefHkPPE5bRQvkE6kfU6lV9O Z+MxDpT4pMo/nTJHC5wNOZHZHN1Xx0ktCqzMp84njS3XzMmKWvwSeswaz7RjTDPNXtBiYVSBiX5 b5aHMpOMw+X1bHfZbbGNVmDF57+8bhMmGqw23jRWxjJAjGYAjCeFYaz4K85JZ2//0Ddwu1rsUxZ Z4cdKO8HrVotAwmxf0V0Ez2FF2il9aCvepxdv9DF48t/g4fA001nGU0JLvFxoioNvyG9lfNHDq9 eAD1ffjHohNJGkIa8e8nA9t04Pik/wz4mE5TU5zQ6LTwcyQycofX50+Q48bD80RLb97b28dtUit t+ELCCXawtVL4uuxoMAfXYHgM3mLbPC4N17siKmYJkxoqC8+hYpGfDzhCfqDG/zdAnPtHqdmp5V nPxlYiIWabkGXUWO8UH6MP6EfJqnnNUWzJtg3Z6ALj X-Received: by 2002:a17:90a:dfc7:b0:36d:5d1c:c4ad with SMTP id 98e67ed59e1d1-37c5283eb6dmr2787744a91.9.1781604524857; Tue, 16 Jun 2026 03:08:44 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Frank Chang , Jerry Zhang Jian , Jim Shu , Alistair Francis , Daniel Henrique Barboza Subject: [PULL 54/83] target/riscv: Add standard B extension implied rule Date: Tue, 16 Jun 2026 20:04:57 +1000 Message-ID: <20260616100527.1939565-55-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607365771158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang Add the missing implied rule for standard B extension. Standard B extension implies Zba, Zbb, Zbs extensions. We can also remove the auto-enables in riscv_cpu_validate_b() as Zba, Zbb, Zbs extensions can be enabled by the implied rule. RISC-V B spec: https://github.com/riscv/riscv-b Reviewed-by: Jerry Zhang Jian Reviewed-by: Jim Shu Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Signed-off-by: Frank Chang Signed-off-by: Frank Chang Message-ID: <20260528054213.678458-3-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 14 +++++++++++++- target/riscv/tcg/tcg-cpu.c | 18 +++--------------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 455d5b3d48..df101b1213 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2107,6 +2107,17 @@ static RISCVCPUImpliedExtsRule RVG_IMPLIED =3D { }, }; =20 +static RISCVCPUImpliedExtsRule RVB_IMPLIED =3D { + .is_misa =3D true, + .ext =3D RVB, + .implied_multi_exts =3D { + CPU_CFG_OFFSET(ext_zba), CPU_CFG_OFFSET(ext_zbb), + CPU_CFG_OFFSET(ext_zbs), + + RISCV_IMPLIED_EXTS_RULE_END + }, +}; + static RISCVCPUImpliedExtsRule ZCB_IMPLIED =3D { .ext =3D CPU_CFG_OFFSET(ext_zcb), .implied_multi_exts =3D { @@ -2514,7 +2525,8 @@ static RISCVCPUImpliedExtsRule ZVFBFA_IMPLIED =3D { =20 RISCVCPUImpliedExtsRule *riscv_misa_ext_implied_rules[] =3D { &RVA_IMPLIED, &RVD_IMPLIED, &RVF_IMPLIED, - &RVM_IMPLIED, &RVV_IMPLIED, &RVG_IMPLIED, NULL + &RVM_IMPLIED, &RVV_IMPLIED, &RVG_IMPLIED, + &RVB_IMPLIED, NULL }; =20 RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[] =3D { diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 942c2851e8..b73e3e9dd4 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -517,27 +517,15 @@ static void riscv_cpu_validate_b(RISCVCPU *cpu) const char *warn_msg =3D "RVB mandates disabled extension %s"; =20 if (!cpu->cfg.ext_zba) { - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zba))) { - cpu->cfg.ext_zba =3D true; - } else { - warn_report(warn_msg, "zba"); - } + warn_report(warn_msg, "zba"); } =20 if (!cpu->cfg.ext_zbb) { - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbb))) { - cpu->cfg.ext_zbb =3D true; - } else { - warn_report(warn_msg, "zbb"); - } + warn_report(warn_msg, "zbb"); } =20 if (!cpu->cfg.ext_zbs) { - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbs))) { - cpu->cfg.ext_zbs =3D true; - } else { - warn_report(warn_msg, "zbs"); - } + warn_report(warn_msg, "zbs"); } } =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607216; cv=none; d=zohomail.com; s=zohoarc; b=AwnbGKmkMs8iTL8syYTnewL0dpbvKeqAEkAInZVAENcCgzhxblmvq/qrxSYcQzSZh1Ofbs1DAmpP0dNMCw1FixtB+cL+Rpv7tuWg1V1LHgAonaytPvG8KF4wuJrVKwVgmn8WtyJ4xBHjgPFEgVY4Zj/7W3vs0jNzJCe3uMsK2Yw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607216; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=aCtqoJPvTEM7pcYWllSHBKBt50VMDfpPmDLSixCvOHY=; b=XV/7soRM7Vhj5YOKI2BNJD46a/yCpmNu42SuhawWeDVmz39g/WfIMZElcGAgU3xglae4QlmRZfFtvH3TNtT24Pep4xtqY9q5p22bf/7O/cWp2KzaDQAYzgzxag9f4AKQgHZM3Uo4XT/j1g5K8BZWC1fHJL7rxuc5ItGovd9iIt4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607216651507.52671517478075; Tue, 16 Jun 2026 03:53:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjH-00065R-EW; Tue, 16 Jun 2026 06:09:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQix-0005zr-1v for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:52 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiv-0003jP-Ku for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:50 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-36b9d265355so2126835a91.2 for ; Tue, 16 Jun 2026 03:08:49 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604528; x=1782209328; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aCtqoJPvTEM7pcYWllSHBKBt50VMDfpPmDLSixCvOHY=; b=onMKhC6DEDwQVfr/VGSt60cVffLaAysx8ILUClsSqFpuFJ5AOxOsroXlM5+3LysUEg ivVpHmuPFmpWleurYL7l9DJci8/SZAySHj3wxTbKV8SpzrP3eJnKUwtxzNtdErP+mCvS D2vHvkriZVLWsyo1CzpsE0ITAeYDxS8KwMv7y+PZtt/eb90VhEWVCaeX0SVBif9PXlSr 29fGoIbbokom0blZLkKINZffrJCAsLOUELKDTay/6WQgq1lN4/cVjXdiyP0VjEeW30BF Bt5AcTfQC1Gf49UEaj+6+oSbKJKgxM/istO58LSxpVrx4RpDm29mpEuDbaJQe4MUl8pu PDew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604528; x=1782209328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=aCtqoJPvTEM7pcYWllSHBKBt50VMDfpPmDLSixCvOHY=; b=PkOvVb2BSQBVc8cm2rO4Km1taf+hDOLo552izgz19TMDW16kPkHyXO+yMJeln+TdKj 2qsV8xiPOeW4N5gI8Qp4SQFco2XQqZK9+u+IZax+Yz8FHN5DS/fQutGjndTxwQN97ALQ 8szGhmWsVTLxCsx11w4yhsaEh5XxYT9SQW2etEUH030D6KxkobOd1woZqmRe4eec7t3b TbJlNL9Q0PlonVV9UCICpXOU9VQ6f+w4ixmzaemThrbWHyq5o+UORJfRUdzTbEKyGIS3 VM/amtgXbJwKHj+PYwvvZ9iQ5RZMp+aJX3h9Y+08dedUDa1LbdbzF5nKP0CptqYfmibI FjuA== X-Gm-Message-State: AOJu0YxDjJiDZkNUhlvNgRuxJtyq+YhfJnlMIpLUu1D2igLuIBP0k07t 6YH7TJP46IsUJ2V1ZtYDeYKilo8n1WFZLchPAQ5UJwNe01X45Phq/MiiMmv2CS71 X-Gm-Gg: Acq92OEh0H+bZlVlIcXMgwMpwc9W4NsLx5xB8Jld0MwHta13rPZh+rQ2GZAai/p4Aze PlR2TPZutZQFeYuWCSruR1VmpuDFMJS1xSvxXMXgZ2nHvbbpenyHpXIxAQruHuCZuQlTNJdFc25 vjalD0LtMz+LMu4c3q364uJIgJd4Jay3W8uVxOYtKR2e5I9YZAho2RNK9CElwksA7YMhUuKEa3Q ARLU0X3AOCao6aVKNadU4JytguP5CM17f7g0x4Oqu66O5cUo7ofmeun3DVXdgY1/UQHOy1Hrx4J 5haDZRaqLJTLSEQIjQFzgTZTLleVE6ckVJlQRvlUD3ORk1GW0BTzwq4Sc5TOCb0sbasOFmUbsPg yNj5M1vGns1CFlqZTqKG7gqIbVOt/PBQACkdDl8DxLEG8mT+MXZXzu6HHD3z0fuEG8w4+1+xXU7 Tup+tB5LIYdvX+gNOWgokHJ0ikK7IBn5vYEQVvN2ze X-Received: by 2002:a17:90b:17cb:b0:36d:b818:f848 with SMTP id 98e67ed59e1d1-37c5280311amr3047968a91.5.1781604528026; Tue, 16 Jun 2026 03:08:48 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Blanchard , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 55/83] target/riscv: Print privilege level and ELP in riscv_cpu_dump_state Date: Tue, 16 Jun 2026 20:04:58 +1000 Message-ID: <20260616100527.1939565-56-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607218861158500 Content-Type: text/plain; charset="utf-8" From: Anton Blanchard The privilege level and ELP are implicit state (like virt), so print them out. Signed-off-by: Anton Blanchard Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260529053519.1224019-1-antonb@tenstorrent.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index df101b1213..a5b1c2ba62 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -577,6 +577,22 @@ static void riscv_dump_csr(CPURISCVState *env, int csr= no, FILE *f) } } =20 +#if !defined(CONFIG_USER_ONLY) +static const char *riscv_priv_str(uint32_t priv) +{ + switch (priv) { + case PRV_M: + return "M"; + case PRV_S: + return "S"; + case PRV_U: + return "U"; + } + + return "?"; +} +#endif + static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) { RISCVCPU *cpu =3D RISCV_CPU(cs); @@ -585,9 +601,15 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f= , int flags) uint8_t *p; =20 #if !defined(CONFIG_USER_ONLY) + qemu_fprintf(f, " %s %s\n", "priv =3D ", riscv_priv_str(env->priv)); + if (riscv_has_ext(env, RVH)) { qemu_fprintf(f, " %s %d\n", "V =3D ", env->virt_enabled); } + + if (cpu->cfg.ext_zicfilp) { + qemu_fprintf(f, " %s %d\n", "elp =3D ", env->elp); + } #endif qemu_fprintf(f, " %s %" PRIx64 "\n", "pc ", env->pc); #ifndef CONFIG_USER_ONLY --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607001; cv=none; d=zohomail.com; s=zohoarc; b=jqYve2qp+LhRBB1P7PpZarjKaTzMDfkelJYrZXlZOHYKqxjWCioeKf2WGi4YpOrV74EYZ2BgPI8/Boeu7k5nyfzZ6nIaKZzhHbXspMiIkJCrQV51QIXmmreJdvTE9aBoGdiu/j2LMnzQ6cYVohdMVGKqziE3LOOfIzH2zYFEdRk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607001; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=GB27e2Kj2VlqVIO8yDB2+UY5InhZ7Eg6JtDLLKAzkDQ=; b=A4IuDfDCEfHanssUtOYQnbBvg2vS2Dh8H35hXaM1hx4gICqI2cN8dJLTM95quF3UdRSoL34XIl+LsrKKVB5eQLpcJ73mOL9n1StNPtlezyPx8UfIrIenFRnOCRS0v5S00haTPovX4kyJmy0YBouV0W0VuQoXl/Jy1dv9cfbMLyY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607001086535.2909497568157; Tue, 16 Jun 2026 03:50:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjL-0006Jd-A1; Tue, 16 Jun 2026 06:09:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQj0-000601-55 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:54 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQiy-0003ji-HP for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:53 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-842264dde84so2722833b3a.0 for ; Tue, 16 Jun 2026 03:08:52 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604531; x=1782209331; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GB27e2Kj2VlqVIO8yDB2+UY5InhZ7Eg6JtDLLKAzkDQ=; b=lN+teEHDlSBsVKm2yLN73XXxlDAENa2ooMeqgXBG29TmSXJFygEh8d3z6cPcyw4loe M4tRZOCtNv76iZ8zRWQcHgP1kFj8TyqyPEl6eVhcidxzc1sOK1Hv9zC1Fw9K2io1bOyJ kvwVcJX21o2YswizO2BOCL2Z2CZlf5vxxgoRTbVB+lFsaa3SCYsSjfS6e6IK8bkRnuLU 5Z7BvvocPai+B/UcdW9wBJa9ajhHXTl/bCnv30yKlNRLxhAnitTosbidGTp/IkyRzW4u zM8XF6evbeQ+ItnneoVTs7w5GXslhkYqqf9cag0iql3zkyk3spWZ8GzRF9p7OwOaJye9 DGog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604531; x=1782209331; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=GB27e2Kj2VlqVIO8yDB2+UY5InhZ7Eg6JtDLLKAzkDQ=; b=p08umgFqL9g/wTrVtTZTDKZiABtJLimsSGg9KBYKYC9XtBpAi2Nju7tcnI44qEbHwQ GZ/l15m4h2J0qCqxhwMdIRjvN2v9q25wswac5lj5YtbZxu+PqzGgedfe+K1tpdF5O7oy 5KJlgaAvD9RdmNgaDabEaL/cR8AfgImZ9qq6EooQQdYDdLRAcuguRle77jIPOWFXrez8 HCCq6yb61klMd4T/OgBxOpF/Eh+GAp3Czc7ty6ww5AyrFtPlbFeRiTiflyPxIJsdeJcV pqHr5C5x4B0xMaREWL8FFeFuQuz2wGV/XAWZ7Sh/nSRnWUANzTlbATZhAWiV4b1rQErk Qodw== X-Gm-Message-State: AOJu0Yw6D38DDVeHrars6GDfN5L723KBkx8C8cHPcONL8MMdUPUE2Yk6 AY5Jot1QsxZafaZ5q78or/m5B09+JOSD4/wE6c5WUM6WaovZ7/M63KRZIrkh/+IF X-Gm-Gg: Acq92OGGR6h9qCOzN7ChsT4HlhcaLXHuBUHlQ1EzpmbYtjoIQ1QkimQMkw49IomLU4v hkJs01BE4OPpuzLIs7Shyph1LgODw1fk3BF5TB3NcpNfCNkHU94EQOS1r0NGagEZlnueuui+9ki kA51VS59T9F003Up+PLoFj2Xg02hLvJsOi2HjVsONwh271GciXeE6IL2rkn7dwmcizJkW+/AmJP XO+QlD51o28YLaRzf3uPLPZysMqtvT7ASu0w2KoJ2Y0U2bJKnp0GjFZRpbKRsNaAqUSeIrl0i0X DwpSL1yzTBkHs+AscUIxga77DJpWeJQr1xhvARIX3ByTtmbq1DzmO0RD3tgyj91SoYf2i3BCczz 5HPZ7w85bB+ULdpl+LPOBOXO1YWbIItNgM5trvJZ1kn2AN1I+OUxrs5XFeOUyBJUZwd/vrwBeTF C7/hfFawBJzNcal58Yn1XLBkWTgdQF/Uv4mp7JglCb X-Received: by 2002:a05:6a20:d492:b0:3b4:6f45:d8ed with SMTP id adf61e73a8af0-3b7e249580emr2906416637.21.1781604531160; Tue, 16 Jun 2026 03:08:51 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Anton Blanchard , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 56/83] target/riscv: Improve alignment in riscv_cpu_dump_state Date: Tue, 16 Jun 2026 20:04:59 +1000 Message-ID: <20260616100527.1939565-57-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=alistair23@gmail.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607001593158501 Content-Type: text/plain; charset="utf-8" From: Anton Blanchard Align all the CSR values. mcountinhibit is the longest CSR name at 13 characters, so use that width for PC, implicit state, and CSR names. Also remove the redundant '=3D' from the implicit state lines.t Signed-off-by: Anton Blanchard Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260529053519.1224019-2-antonb@tenstorrent.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a5b1c2ba62..a74384a091 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -572,7 +572,7 @@ static void riscv_dump_csr(CPURISCVState *env, int csrn= o, FILE *f) * to do the filtering of the registers that are present. */ if (res =3D=3D RISCV_EXCP_NONE) { - qemu_fprintf(f, " %-8s " TARGET_FMT_lx "\n", + qemu_fprintf(f, " %-13s " TARGET_FMT_lx "\n", csr_ops[csrno].name, val); } } @@ -601,17 +601,17 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *= f, int flags) uint8_t *p; =20 #if !defined(CONFIG_USER_ONLY) - qemu_fprintf(f, " %s %s\n", "priv =3D ", riscv_priv_str(env->priv)); + qemu_fprintf(f, " %-13s %s\n", "priv", riscv_priv_str(env->priv)); =20 if (riscv_has_ext(env, RVH)) { - qemu_fprintf(f, " %s %d\n", "V =3D ", env->virt_enabled); + qemu_fprintf(f, " %-13s %d\n", "V", env->virt_enabled); } =20 if (cpu->cfg.ext_zicfilp) { - qemu_fprintf(f, " %s %d\n", "elp =3D ", env->elp); + qemu_fprintf(f, " %-13s %d\n", "elp", env->elp); } #endif - qemu_fprintf(f, " %s %" PRIx64 "\n", "pc ", env->pc); + qemu_fprintf(f, " %-13s %" PRIx64 "\n", "pc", env->pc); #ifndef CONFIG_USER_ONLY for (i =3D 0; i < ARRAY_SIZE(csr_ops); i++) { int csrno =3D i; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607010; cv=none; d=zohomail.com; s=zohoarc; b=BDu25OfdOTaNM0+ZQbYFp/fUdKyWrxM4P5Ra/Ql1eVeIlfV7YmV4mc5//azOCtSPcgMMcco/O3lTzTyXuB9+UzF+kprTjs+9rQAGRTO17/hAtX6uKdQ3mRSATq0DbpFwWOiJnljiIQjPX5vtn8ZwNTxoOjIjz5o0s6yn7Y2aH/0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607010; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=LC8Tp9LOlX1iIxsS7p263aBjVp7XomH0anhd7+QMmbM=; b=EIJvYObxBNjUWYGSUlgM2uCGF3sL/2FvZBSakMxHPtDrYvCbatiWqp6tgxg0XEGNe55QA93iuNztGCMtH4DR69spVlThFRzoMorDPmMB5DQyu7CovCrtlMywx+yTALzsKrzUVlLF+xJsstiIJPwpD1EwjttgCg5uy5j4TGHNKKk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607010020393.133058460382; Tue, 16 Jun 2026 03:50:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjL-0006JM-83; Tue, 16 Jun 2026 06:09:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQj3-00060R-NG for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:58 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQj2-0003k4-06 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:08:57 -0400 Received: by mail-pj1-x102a.google.com with SMTP id 98e67ed59e1d1-36ba706ab46so2774175a91.1 for ; Tue, 16 Jun 2026 03:08:55 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604535; x=1782209335; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LC8Tp9LOlX1iIxsS7p263aBjVp7XomH0anhd7+QMmbM=; b=WZbtRBO44CxxTWSOoL/EXKbXJVEExtxI61LHHDKQ2iXWdSHfrkCZ53yfW5nRy3wswG wLmKcmELsfGouUCNRh0/Gsq6EIxD+cDOOdKdRTHa8XMo/7uWV/oQ7YpAtezs6pgEHMxF nc4SWwayEyH51FHVftZt0QfGcaMT0CyiEhLbKgVUStGVfCoOwk/LJugPn2v85nauJz9W 0iDaZkP2lplvOY5Fa3+0FqySr+LkSU05vh20ArI4Ay+5YNaxg4SNnUUToXxAhl1V3SYe 6806+of5kIy58DI92Ke9MdTrxf18uZe4RAyLE6yud9hzPA1Ojb6yELa5qfs7+jcQEf5z NjTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604535; x=1782209335; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=LC8Tp9LOlX1iIxsS7p263aBjVp7XomH0anhd7+QMmbM=; b=tTOhQPlgiiPVI/A8PtXrIMoQKEdltF8KBDEr8qWk1+8ooQwDW5A1Y/6bZXvb/PPQ5K 6xUeDVqhXF0c4D/Ci2W5Q+Xb7uwAtAyDZROtEloM3s0X0xEt6k9A0XMFgIwtmPTswuc6 FJDeG10RlTz8pblgaKItD73GBR4QjzQ+07lJd1LxQ6NWrbcCALYR/ZxEfvX3iEdHUiRZ WBtkdqPJJDEn+nMdQEG3pLvMhIpcuOO7T5eBhgClmRsRQDWbWh1xzNL1xcZktrLFTqGC O9eDz3ZtbNKrPzUSZgK6KIXOgGHqTIoDp6ooMrsi+gUwvmAgUWlbiH1Qp7OwtVIUVJka HdZw== X-Gm-Message-State: AOJu0YwAmTlofLNfsgQM8LTbI3NLC0f1XGvDmKpybwxgdebMO62bgkV3 jmvQaIF0Emq/G9W0f0V65ANMhzmJ5pbuuJoK8Zb/JcunPuZfoaVHNvxua649VVyr X-Gm-Gg: Acq92OG1NyH9v61d+w2Vz/cFTOF8d0p5DbGf4q52ohEy0gNUV5yJoq5BM+LhftA6Dpr 8UFt+D/QdIwzi4GgOyck+KUDmPqk3i0uou5YKS+AbQoer980lAEeIsbD6xfd4hSkh0HFKQQ90fP tL1/MS9o5Aka7KHvvdd8QcL05VhVAZotvM1BtN29/RZ8CbsYU+clGibCmd3GWfY2l5m19f9WcJ6 2WACxwZBhPjMI+vunUImvxmYKeFEcK1KuPxLyBUlYPquIww+XFGcGZQx9yoxL+vCvJCDhufRqUT e7woVpNpBRA0t3UMwxg5uH21lUDgjkHdi3kE6J9CpQQPRukyiHRSXIHUiWDCbrPjbjJa9kRNvt+ y2NHDSXpnr7wuXTWIuMW1C/i8uzuPVCM1EvdK+4PzK8oYhUkFG33PR780fHCcsTdg8DUDjUSO0y 2Gl5fyYmUVcm3qdYH8Crrh/eA1kamMd9ks9c0hOX3J X-Received: by 2002:a17:90b:4f88:b0:368:5367:d679 with SMTP id 98e67ed59e1d1-37c5284102dmr3014066a91.9.1781604534720; Tue, 16 Jun 2026 03:08:54 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Abhigyan Kumar <314abh@gmail.com>, Alistair Francis , Daniel Henrique Barboza Subject: [PULL 57/83] target/riscv: mask vxrm csrw write to the low 2 bits Date: Tue, 16 Jun 2026 20:05:00 +1000 Message-ID: <20260616100527.1939565-58-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607011691158500 Content-Type: text/plain; charset="utf-8" From: Abhigyan Kumar <314abh@gmail.com> Citing the RISC-V specification: "The vector fixed-point rounding-mode register holds a two-bit read-write rounding-mode field in the least-significant bits (vxrm[1:0]). The upper bits, vxrm[XLEN-1:2], should be written as zeros." QEMU wrote full value into env->vxrm causing read of upper bits too. Used existing macros for bit-masking. Previous had a hard-coded value. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3470 Signed-off-by: Abhigyan Kumar <314abh@gmail.com> Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20260530102100.78150-1-314abh@gmail.com> Signed-off-by: Alistair Francis --- target/riscv/csr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 19d5a55b54..ec931a8c3d 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -989,7 +989,7 @@ static RISCVException write_vxrm(CPURISCVState *env, in= t csrno, #if !defined(CONFIG_USER_ONLY) env->mstatus |=3D MSTATUS_VS; #endif - env->vxrm =3D val; + env->vxrm =3D val & (VCSR_VXRM >> VCSR_VXRM_SHIFT); return RISCV_EXCP_NONE; } =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605382; cv=none; d=zohomail.com; s=zohoarc; b=SQu6XEx2cMK/v03yB3P1CmwE89OBMfM/MdJOutF0G1nnLqH376mAQUgS03gc/CQ7ntkTLapzqQTG3l3DMGTDGRjRqXSGfBIVNpZl6yJ7CGhpxLqJ/LjLgslYDHKjh+IJJXFNovQNW4pT9d+DyTimQd4uuIlvKN6RIkE80+mUpHs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605382; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=XaxxQ/2rudA9HGll1kBnOyEP3HxdMr2VQrPmX35dXjQ=; b=c0QgWNysf6H+kYAFBb0iBPSas9prrzKw7O9+oIwwgpncfD5BDn0mBp2hYZBu1I1JP8Pl+4B5j6YOyC4hWb2XK79C7wPTYB/p1ImO3Gttakay4BVqW9FF0rQmKm6FXQ2RVF2AmwYEoHvBJ0/S3D2tpgDeP+gvntgJYoqIugiYh/Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605382820528.8024686558252; Tue, 16 Jun 2026 03:23:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjJ-0006Dh-Q5; Tue, 16 Jun 2026 06:09:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQj9-000636-AD for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:09 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQj5-0003kL-Bx for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:01 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-36bcf3d2565so3098259a91.3 for ; Tue, 16 Jun 2026 03:08:58 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:08:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604537; x=1782209337; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XaxxQ/2rudA9HGll1kBnOyEP3HxdMr2VQrPmX35dXjQ=; b=l/YJaFdXwdgP1Z+AyNkhALyogWGTHl/mbg3trBhjAN4EHi1avmKhkSX+5SdvzFD8m5 QmPFUH0fHWfUH7VNSZXK67oz8mAKb2EM9ULnvssQVFR7M8KCsKXPjfBeQVohnAYqjn/6 q2pDETlViqXX/bHe0syuN1Ar7hAjYzOLPglRedNQ+w1wpiHckBUocWLfztWLlqvCOcb1 ytg+fH/rgSmW4Sd77OIAWej5nuZ/J1bVAlqlp12jpYlvZDuema0aPYgDXRhR4ZskgKcN TxIa/gh7VwZwE+9nuIB+indRNCLU9E6U84sJ7YAfiXSAlHiCyzba9MLh0xkp1CMt2NWS knIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604537; x=1782209337; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XaxxQ/2rudA9HGll1kBnOyEP3HxdMr2VQrPmX35dXjQ=; b=hnmjbFZ2T1paGPtaRnbYTlGJ+sjBMkG1NcaIXT8RrGR/GntZuK7xr0JamGPZqUarcm aUIPIDZkx6JD/hskzwyHAXq3TaUWGnluSmFC3Dps6HU9prNp65TkaDVSdkfMxYH+sb6f MbNO7pWlPW5y0N76xBTo+VI/Zis7S8iUWKiHRyLk4iVEaktOGVQiyZD0VV2dRE4C1zb9 nXw9VbH36rdG6x7ksA2DR1FItn7MqJz+JGu1LlGxtWTdGJi/dZCjnUo+B4ERLR9Ibn6Q gSmInDfi7WiS/M1ctEfwtGXuEkVuTnGDTa6eLkBk04cyh0tIz2AIhJv07csLGEUAv+iR Gxxw== X-Gm-Message-State: AOJu0Yzeb4YbOvmqraRcP1varqvXz1/EXHDbfGWRUBO9wCKMo28ZWGxe 6tNkcL+l5HuwBww6K1msaBhRThjsI80RQnF75fkw9+gP8ePSLhpNgMwhM1UysBWS X-Gm-Gg: Acq92OHb9dYBTY79MD14ucapWG5g/gI+yXnH2rRg456BpHXLZ8Gkt63fVQ/zOaJWvVu Q4vVvJYeDJcPIJYfKXOb38T0aopxQpU3Vushp/06rHnA9Jv+xcpcV6Cu+keTW4g0d9UgQhggnvX 1Gglcr4+i7dm4YdMkqKUx3LIWhlLHqTVVz77nv8z8hedzpi05vfdSi0enkL3TXEQPsTSlZJ5dok TVk2mjVxJ6DJyA38WoTqkBshZ0pdOIsIc4YNATy673bTj6Q8Tz3/WPLlz5riUBu9+pU3Cxmq3kf 3FnnPkm6y8XJKT10R/u3A9C+U6cCCpzIqmCWYYtC9J48bZLOwVe3UAaLXs9xf5cDkL9sKQlZuvx poghgznscF17R5ykiniOl6EzRf8OQh+BIFB042pwl1z20laszq9asmLCchBdFqw7CrMYXwQgKOu mXW8yRBhBwg2zBadKMq7p2Tf6gO9baGxWNUVrGZkC3 X-Received: by 2002:a17:90a:6502:b0:37c:607b:2cd9 with SMTP id 98e67ed59e1d1-37c607b3288mr535559a91.0.1781604537607; Tue, 16 Jun 2026 03:08:57 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Frank Chang , Alistair Francis Subject: [PULL 58/83] target/riscv: Reorder Smrnmi CPU fields above CPU reset line Date: Tue, 16 Jun 2026 20:05:01 +1000 Message-ID: <20260616100527.1939565-59-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605384812158500 Content-Type: text/plain; charset="utf-8" From: Frank Chang Smrnmi CPU fields introduced by commit: #5db557f should be reset when the CPU resets, so move these fields above the CPU reset line. Fixes: 5db557f82bff ("target/riscv: Add Smrnmi CSRs") Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Message-ID: <20260528060007.717307-1-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index febd905389..eec5acea5f 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -491,6 +491,15 @@ struct CPUArchState { uint64_t hstateen[SMSTATEEN_MAX_COUNT]; uint64_t sstateen[SMSTATEEN_MAX_COUNT]; uint64_t henvcfg; + + /* RNMI */ + uint64_t mnscratch; + uint64_t mnepc; + uint64_t mncause; /* mncause without bit XLEN-1 set to 1 */ + uint64_t mnstatus; + uint64_t rnmip; + uint64_t rnmi_irqvec; + uint64_t rnmi_excpvec; #endif =20 /* Fields from here on are preserved across CPU reset. */ @@ -509,15 +518,6 @@ struct CPUArchState { uint64_t kvm_timer_state; uint64_t kvm_timer_frequency; #endif /* CONFIG_KVM */ - - /* RNMI */ - uint64_t mnscratch; - uint64_t mnepc; - uint64_t mncause; /* mncause without bit XLEN-1 set to 1 */ - uint64_t mnstatus; - uint64_t rnmip; - uint64_t rnmi_irqvec; - uint64_t rnmi_excpvec; }; =20 /* --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605554; cv=none; d=zohomail.com; s=zohoarc; b=eXYNLWwNNx4Qw6ajcBZFSMu7zSzrG5Qwpg8+bgLXWSZjV12AlC4vToSAM7VVyZsLEzAwtujB9J8iEg9bNNKdzqFJsqSpCft2u4oZkBJFmBBiDl/QJwY+C8kDv2PAqjXZQgJZAEfncl1NxKvVP7HIv6LW2jACKvI6RWRjUruhEGE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605554; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ywv1Eitj0Dtkzkc45YArwuUkBcmzxPNgkwxhdE319cA=; b=JLGeNtxEr/OqBJ6rNs4uGflRYzZBk0oB/p4kqp1lJq0a+J/J03QTIfazEiGkcmJVxRcHQJ+pM9lJFoJcAJq9jQUVc4/a9RL5EIJlndukpjn/GrsHYMkMk+lMSlSvN6qUiIfMX/w5bC20Xrgf2jFuk1ptQTCVnLe1NkBntAqLYD8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605554896743.4825035818673; Tue, 16 Jun 2026 03:25:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjN-0006Rq-55; Tue, 16 Jun 2026 06:09:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjA-000638-Kf for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:09 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQj9-0003mr-7a for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:04 -0400 Received: by mail-pj1-x102d.google.com with SMTP id 98e67ed59e1d1-36b8d414666so2695966a91.3 for ; Tue, 16 Jun 2026 03:09:02 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.08.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604541; x=1782209341; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ywv1Eitj0Dtkzkc45YArwuUkBcmzxPNgkwxhdE319cA=; b=MmbD1sq/ZzMjIrwFVAXIrghP2gxsA3VxHcaLNSSQ48SM6JrGaJDT4GOwp7xhkpxWmg B6PzZdFUTOh0auMlLee5fspN28l75esdJmk6GBkFqRvpmUWptSDHYLM3RaEL7rIM7AXR vOctPfmzHNBSRtzMjF6anOcKwDFjBH4KjoNpUlZKgY3VhHndwrCEUYiW1t4yyfk+x2UJ bUN0bNbUjQwYaIiUll5r4d7ZiiYU6RS4Xgo53CzHl0Buziq3MQcYkUMhDCFSP2auzuhJ Ash3uhhHUtc3ykGkmQ0NVlcuXA0RAT6W0XWmk89lYyqeHxrqhcMqrg7+0Llaiso+kk4K 2+EA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604541; x=1782209341; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ywv1Eitj0Dtkzkc45YArwuUkBcmzxPNgkwxhdE319cA=; b=MgSIvQNEpBztxov6WR4SWnlpXt/SaIC9vuoRu3sDLFR974BCyIBI+yxaolTIoiRYmf YwgTDvOjUCv7PcBhVMPndfIE6t8UQ82+GeIpflUsca8j0qZis3wCDSAFeT5aW3JWQJ1B untuvKYLF/fYziBUxiQCKoghPamXPWJT9rMi7uiD5Zfu7sHFfpcHh9bN+YdygRVN9SBv JvsM0OaLY6r3GFEYbVZRmwSV5PP+/lvbJNgLm5vVMkOr4ZWdPQLGLukAIwajkFhmaN7G QL+Ng2MUuSKvz0yMIYrravR4iiKHAkv1hrtDmZ4tBuUkOjtZPCbeDwonMWMxCzfAOMWR xuww== X-Gm-Message-State: AOJu0YyHCkPJADpeTuprubKcCkkpLP7mxiRR7GV+SYLdJNQ4/QQ7CKCL QxfsMCpNHcWWzmIe5bwLS9fwzdd1kHfskPQHT7mLoN8w7atqGZMBFz0+TZTzKsgV X-Gm-Gg: Acq92OHE1ROuvgMFRaPjTnllAy+Ow/it4ual3fwO9acygk3cPQjjUq7FapGS1yjrhvz 84qKnOkGzNnbS6b5iNC9YH5Cquvak5as8HlE2raTgsODqktV2iCW0AY8mPDj4BczgmffK9JToBG Qp82SaKzoM4so4Yv4w1Yyqjw73Z060JHKJ0zmd7aw8OW5KzpWy+djXMX6BCUTTaohZZ/n20pe/g DbTJ9RrePLKDZzOHdPF60AERjTSc9qyU2rVOYt45DceG6Px29CjNRXuj2JcGVqEEbi1tm6DFbpv +7dj0fxtkoEgmQxueuGrD1ELElds6yVcdyLojTUd/ndYnzfQ9oWvoRTrZn+yamnBBdQSYBVdM9P es2spI+q3wX14S3Z/y9AmwDstlaqfrIJZ9KlpI81aBOfJTl3BaPDiLHq63dKba2cCEqUk9dnmh6 +02TBjAHhhRBcyAshLLg6fTjikG9QKNZwlU+JGvhh0 X-Received: by 2002:a17:90b:3c02:b0:366:3517:1a95 with SMTP id 98e67ed59e1d1-37c52203244mr3286798a91.0.1781604541265; Tue, 16 Jun 2026 03:09:01 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Xuemei Liu , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 59/83] hw/riscv/numa.c: Supplement cpu topology arguments Date: Tue, 16 Jun 2026 20:05:02 +1000 Message-ID: <20260616100527.1939565-60-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605555689158500 Content-Type: text/plain; charset="utf-8" From: Xuemei Liu Supplement RISC-V cpu topology arguments, including support socket cluster and threads per core. Signed-off-by: Xuemei Liu Reviewed-by: Daniel Henrique Barboza Message-ID: <20260529181848378wiq8pXCmbwAZR5_-wZFJd@zte.com.cn> Signed-off-by: Alistair Francis --- hw/riscv/numa.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/riscv/numa.c b/hw/riscv/numa.c index 24a803f7fa..8a144925c1 100644 --- a/hw/riscv/numa.c +++ b/hw/riscv/numa.c @@ -239,8 +239,18 @@ const CPUArchIdList *riscv_numa_possible_cpu_arch_ids(= MachineState *ms) for (n =3D 0; n < ms->possible_cpus->len; n++) { ms->possible_cpus->cpus[n].type =3D ms->cpu_type; ms->possible_cpus->cpus[n].arch_id =3D n; + ms->possible_cpus->cpus[n].props.has_socket_id =3D true; + ms->possible_cpus->cpus[n].props.socket_id =3D + n / (ms->smp.clusters * ms->smp.cores * ms->smp.threads); + ms->possible_cpus->cpus[n].props.has_cluster_id =3D true; + ms->possible_cpus->cpus[n].props.cluster_id =3D + (n / (ms->smp.cores * ms->smp.threads)) % ms->smp.clusters; ms->possible_cpus->cpus[n].props.has_core_id =3D true; - ms->possible_cpus->cpus[n].props.core_id =3D n; + ms->possible_cpus->cpus[n].props.core_id =3D + (n / ms->smp.threads) % ms->smp.cores; + ms->possible_cpus->cpus[n].props.has_thread_id =3D true; + ms->possible_cpus->cpus[n].props.thread_id =3D + n % ms->smp.threads; } =20 return ms->possible_cpus; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605373; cv=none; d=zohomail.com; s=zohoarc; b=iqfk3DOH9GEUwSsjGuGwPWCxX1zdzv1V5DqV7oxUFQQLt1O5kkjXQpeG8z6lnXhvdgaA9inRme7kCFl9j5bp4MTDOvGuTkoAnWCWtPYzIP53nuQpmDsCbU5I2Yi4fx1tyrW+TokK+E/3VbWGkJiN25ebXzerSG2Ugiq0E46w+f4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605373; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=klQeXcFqg6sY3LuPqqW6DC5KTXVw4lVlN5+eeEYUWIg=; b=PBSKWOtBJgzOOLq5MwN95vMFFNsIutBtl84Q5b05caqLK/jHm0xxLgJ313hfNG0koqg3bEWOJHcIIgTRN1EkGi0mS/X2mV6Yrq/A/IosRGRgYW89zBtxVrmeC41xmNCuGcCURrMAI9yw3Dm0WJH4ovns7FEoHZMUYB7ySS4tbOw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605373392553.8328363404594; Tue, 16 Jun 2026 03:22:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjJ-0006CK-HV; Tue, 16 Jun 2026 06:09:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjE-00063W-FU for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:09 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjD-0003nF-0W for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:08 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-36bba9a1089so2548549a91.3 for ; Tue, 16 Jun 2026 03:09:06 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604545; x=1782209345; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=klQeXcFqg6sY3LuPqqW6DC5KTXVw4lVlN5+eeEYUWIg=; b=L0E5Pusco9BovacrrtDIdCgVBsVDJEmnyl+1HShRdmwuy7xpjYOjsj02NqdU9gwRz3 9vfU9ZPazkbfldsdf7X/nOjIZD2Vt9IZxUiJ2XkP9lF+xtRC0M/NRDrZVdg8bABRd3He jSxNzVWLNIByDYzD2+Gu1FVbkg03AacsY7Cdy8DJfp8o+a3R5eegkLeuSEUqTymXAZ5y XdEs+GGtb2I4xdNc/WsR+dhebAtlaB3n7NHeqfq7OFxGztrj+G9NnouNvqWP/Gk5Ivsu R/h/nD2rijun8IIiOztA32TXdtsbBDBWcyjYdA4chOp6/SjPQY9laMLokYa7ecKXh0lY GMJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604545; x=1782209345; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=klQeXcFqg6sY3LuPqqW6DC5KTXVw4lVlN5+eeEYUWIg=; b=d0aNy+UANoNE3XcXICo0j8C/WFgtkIbnwHQWm68cX2yJkLSIVlX1aupKQkyeROHpWf GS9JWM8n9uEreplu4RXNSBXA7FFu6Mrf/7ttElMtd2creizHmBpZEa1rWRL6YlAQJbYq CIQ6c6VRlbiQaJac9xXFjXyc2sMXcSJdRejGKOaaR5e23mhwPKVNxBAiZ+MjS9NL4jCA 5hnDmjgAz9VcuYCLqycD2nn+xWvQeB3TmmeRPBk84vRnSa+rqnGf18NSN3Q+Yl3tm8aX rdxJmdwzOVIaTpPnsQ3fyOTEV/1TPXq4lRTA8Yy/ZYNeIllpZonvW+SxYeodgwL31zxk woIg== X-Gm-Message-State: AOJu0Ywy6kjQAb+SUAxr6wzvIept7N1VUbbpBB5I8fh2htiLSlKQXLUY Am2SyO7wOgyUeAsdv8vdl3ev9ew4y58SLkvTOkMcFcFv5TbwrbnrOZuyov/NHztt X-Gm-Gg: Acq92OHquRgv0DCatYYj41N7PnDN6EoyPFwWr5Fzn7N7PAVIeFbWwzwrSPm5nld6pMA 1edtAYhpM2U/T14G1SJpUhGdh+E3x/oT/xIh0xjIMDJnYjI18JeNtBJ8RoqfaE5BYpGo6EpTm5E tD590IFiXofa/agIUkpm0y/KkD9hNDsJjJCSJQ5TjowvSDvp1KHwUZAcjkyXrGmIAfZ5sFSuWKU KnzfiJTU/D8/76d5uWtLGGUYEI+C1lZuhpRTKJdqOj+ZT+1++wb4K1XbFvGrxv4AYE2yxJv9FQU zdmP1r4HYrPeCc77ZYOR/cWiI/9iEjtGFyNnomsnkJYBVQLONUXa/VX5GwUsAzz8VdebSFvldX7 bazeSS0yIZ2Vz3Ek2u1CC2MhXzfjMhvonKggMcb4+YgfwnV8IzGo3j76Fhj27FXICELb7N5smc0 sJiVYiRJC8qy75tIuB6eK30jeZlrOqjLxqgdnMgjjK X-Received: by 2002:a05:6a21:493:b0:3b3:bdfd:762c with SMTP id adf61e73a8af0-3b79625bf04mr16915087637.17.1781604545146; Tue, 16 Jun 2026 03:09:05 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Jay Chang , Frank Chang , Daniel Henrique Barboza , Nutty Liu , Alistair Francis Subject: [PULL 60/83] hw/riscv: Don't insert DDT cache in Bare mode Date: Tue, 16 Jun 2026 20:05:03 +1000 Message-ID: <20260616100527.1939565-61-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605374569158500 Content-Type: text/plain; charset="utf-8" From: Jay Chang In Bare mode the IOMMU does not perform DDT look-ups, therefore caching DDT entries is unnecessary. Signed-off-by: Jay Chang Reviewed-by: Frank Chang Reviewed-by: Daniel Henrique Barboza Reviewed-by: Nutty Liu Message-ID: <20260518072239.16293-2-jay.chang@sifive.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 1b8a8e9ef2..5b28b1ad63 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -1358,16 +1358,23 @@ static RISCVIOMMUContext *riscv_iommu_ctx(RISCVIOMM= UState *s, =20 int fault =3D riscv_iommu_ctx_fetch(s, ctx); if (!fault) { - if (g_hash_table_size(ctx_cache) >=3D LIMIT_CACHE_CTX) { + if (mode !=3D RISCV_IOMMU_DDTP_MODE_BARE) { + if (g_hash_table_size(ctx_cache) >=3D LIMIT_CACHE_CTX) { + g_hash_table_unref(ctx_cache); + ctx_cache =3D g_hash_table_new_full(riscv_iommu_ctx_hash, + riscv_iommu_ctx_equal, + g_free, NULL); + g_hash_table_ref(ctx_cache); + g_hash_table_unref(qatomic_xchg(&s->ctx_cache, ctx_cache)); + } + + g_hash_table_add(ctx_cache, ctx); + *ref =3D ctx_cache; + } else { g_hash_table_unref(ctx_cache); - ctx_cache =3D g_hash_table_new_full(riscv_iommu_ctx_hash, - riscv_iommu_ctx_equal, - g_free, NULL); - g_hash_table_ref(ctx_cache); - g_hash_table_unref(qatomic_xchg(&s->ctx_cache, ctx_cache)); + /* Remember ctx so it can be freed */ + *ref =3D ctx; } - g_hash_table_add(ctx_cache, ctx); - *ref =3D ctx_cache; return ctx; } =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605998; cv=none; d=zohomail.com; s=zohoarc; b=EJNEeWKlV6VdIARPe2Fqwl5qnW+4gI+tn+EtxCHA5th6GH4fWBd1vfUgSDGKEOLEfYkqNLH6sykUFRj0BvRgVoVCakyhqwkVpVFUxtAAGjxMW0RDk4K1WeEuHOjTZ0zquw0Umxb+sKRBFUMB6JkJW4PAxDIKD09f4nVxaAJ1xbs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605998; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=/TVDp/yPz1OKiy1XeIDs0kWwhquE6XmBCHpt58oJajc=; b=jE3x8FGQx7ygI8LhMXTm9cp8MtwMtUu6wIVBulc+vlgtA29ZtEuvjn9HFGznoCs6i/fKS7EpzPiZ+l2TGCBTym7/6lSR6xu45J2YK1j7Rd9BcHLUzEh6j768AgkrTxFPiaFpPHDCJKuPYG/9uVKI1sngZ1bnhHUJgHRv1aMvgII= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605998739605.7058676176437; Tue, 16 Jun 2026 03:33:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjS-0006en-1K; Tue, 16 Jun 2026 06:09:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjH-0006A0-W9 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:12 -0400 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjG-0003oo-Gy for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:11 -0400 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-c857fba35cfso1951462a12.1 for ; Tue, 16 Jun 2026 03:09:10 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604549; x=1782209349; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/TVDp/yPz1OKiy1XeIDs0kWwhquE6XmBCHpt58oJajc=; b=n8mhZfL4i0s2Nzp0K2y2+yQNVwSlPSu/vsjz2vj/zCoVEn2aeA6H63RVCaFtcl/WIo tIoE9nhDDMDOqjY2/v8KagDAHKXjxI1EWB+G83AmN2LgaYpvHpn4UBaWppM1o9Jm2CrU On6YFWfYliJ6JhsCDmybFVnvc4hqimYhFVkI6vVxM9zSWah7RP3+xQkLJ3dzyz6P23/D d/XtEjx+Q71ZsAvA9evklGq1UslHE1PjMzSMmXEjF9A0NoR7Nm/kNJ3ewIQ/iV2tSxev 77feaf0WMDAWqkMPyTtpnkvi4wR7ZIE0jRIVQTZCFwyVUyfzegkU1J7vc5ZA0Z0dUIf2 Msiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604549; x=1782209349; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=/TVDp/yPz1OKiy1XeIDs0kWwhquE6XmBCHpt58oJajc=; b=KRQvVUugihp7NOjg2/FQ4+qnloWZnaJtOr/JtiLGhjwGhBVZDOT6yWmxP+TE/GfyG3 werMxk9lDnT9TQLzndbWIqqHQkyVXF+OecnkMc8nhMTyx5Defxu9BNcTSEtrPU9LZtQ4 SWx/5cOnbPsl8RClYyQhU6RKdInP1JheKRVjfCoWYSXg/RbxxnU7ZJsx/GRDhUhr5aKS uQWcMSadmF1EbOEh3ga+wX+WuylmRTIbQ4tj/kbwDgvTRiZM5bB4DkqgAuy/0GqXhTx9 vFqZkVjvE20I73zwyWRkt6HlBjZvo2nlD0CDuu9QuEsciKLivM9SGPzHtOnkJ3037+tr jDhA== X-Gm-Message-State: AOJu0YyVDPkp3qmN/iktjSz0Sjj7S0lyDV+2oXwgk/4G6XZbnHNWpKZ4 Yd4PKCIDHO2h7GakLHPZzTwi9HsEbFejewpECDEW8T/daoRNoxd2WR659zORVFH/ X-Gm-Gg: Acq92OFVUUsM6WXiBMDd3WmjrcjBH+ufMz06TS77KhWQ8SaFzhVbZ03aR5msTkHzWkQ HvIs0dM3wLoq3fFUFFBIE6cVcJWM5fWize9JTFUO//v9GGu1AYMMJhYuINqE/4p7Nt+xNlW3jSQ gTIq9ldAD38y9JVKwC4Z4A1jmlRtOwZYCxGuPoWR0D5kx91nmD9q/omVL/+zQLpNe4OGge1oLuG oB5ObRNoGEI3UF5T8lZaP+9oPcEhVm5EvXQnVOGR7gtCerAOANn5++RD3YAX1up+axjJ/GyBbjU mARzpqLM2xAtvIBnqruHfLm7ZruThpQx6zlr2z4RJLGBHA50o6MhjTyIrfmJqj8OtkHHmInzmm7 UIBeQSlfn31znLpplr4wmSXoO4LdQig4zGPFOF4mN8xzEm7HK9nqFU+6kwaGmureEsztO+36SKX isLE9eJqGAH9hglsPluWG5idN5I1pvSMRhD4tR0+HO X-Received: by 2002:a05:6a20:d10d:b0:3a2:7ef4:81d9 with SMTP id adf61e73a8af0-3b7e4dd781bmr3266176637.44.1781604549262; Tue, 16 Jun 2026 03:09:09 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Jay Chang , Frank Chang , Daniel Henrique Barboza , Nutty Liu , Alistair Francis Subject: [PULL 61/83] hw/riscv: Refactor riscv_iommu_ctx_put() for Bare mode handling Date: Tue, 16 Jun 2026 20:05:04 +1000 Message-ID: <20260616100527.1939565-62-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606001591158500 Content-Type: text/plain; charset="utf-8" From: Jay Chang Align SPEC: Bare mode contexts are not cached, so they require direct memory deallocation via g_free instead of hash table cleanup. Signed-off-by: Jay Chang Reviewed-by: Frank Chang Reviewed-by: Daniel Henrique Barboza Reviewed-by: Nutty Liu Message-ID: <20260518072239.16293-3-jay.chang@sifive.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 5b28b1ad63..a500cb8440 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -1390,7 +1390,16 @@ static RISCVIOMMUContext *riscv_iommu_ctx(RISCVIOMMU= State *s, =20 static void riscv_iommu_ctx_put(RISCVIOMMUState *s, void *ref) { - if (ref) { + unsigned mode =3D get_field(s->ddtp, RISCV_IOMMU_DDTP_MODE); + + if (!ref) { + return; + } + + /* ref is pointing to ctx in Bare mode. Bare mode ctx is not cached */ + if (mode =3D=3D RISCV_IOMMU_DDTP_MODE_BARE) { + g_free(ref); + } else { g_hash_table_unref((GHashTable *)ref); } } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605835; cv=none; d=zohomail.com; s=zohoarc; b=hJSmJvoNB+MyB6kAIag1/wb8ifvTWnJ681T2QkDD/n8a5aKU28RQY7e8CPlw0RFGaqUMoAb5cxR+oGMfAxpWK/8Elu986yjtvP3LEjlJLwEgBd4aMiYvwPN4hHHH9v8dHM2D077a742IXvLEYDHYPwMaumiz4S6fb8cH3eOMqKU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605835; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uxKkyeejx8Q+vTtrpQmaNbDvbKzB3cd4Z5Ebm106wMM=; b=VypZ6tdjMeqVXu5MWrqRT/A4vA8/L0SGQmQvjUe9WdnacPGD1xHVqzwPqLtObtVNj6847sdyH15MVji9GvWaZoFKJ6hFDr62kfT5IsI9f1Sb4n0OYlYCFO9Vd6RXyNiqOED8iPO7soXIbZNLmdyEzH9RfDW+Ozg+CVJ7UT88LIw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17816058354237.5139342214566796; Tue, 16 Jun 2026 03:30:35 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjQ-0006YX-JK; Tue, 16 Jun 2026 06:09:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjL-0006LD-FF for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:15 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjJ-0003qZ-P3 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:15 -0400 Received: by mail-pg1-x52b.google.com with SMTP id 41be03b00d2f7-c8589498839so1817170a12.2 for ; Tue, 16 Jun 2026 03:09:13 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604552; x=1782209352; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uxKkyeejx8Q+vTtrpQmaNbDvbKzB3cd4Z5Ebm106wMM=; b=KtX7p4O/SuqeV9XZ5fj2QJ6X72QJb5hT+aVuBoelKWTleewatKyPoH+Ojy8ePSEgFF RA+p1JfL0V4E6uOOAZzWhjxaVS+Cs1BCgAXhN+ThrjaB1nhgA3PLZi/saFDbWqRtSNsS m8G0DCKIL1oBGwBy4dSpquazgFyslvc0Z0Rmw78SfNDEAbbPHXbT99LksNXc07B51LaB PiFSWDKnNhsipnAKUtKEa1wcGikkZU1mwI6trvMr4OGXpx6niNCSEZA6+dTJDJ6zOYrg BL4ao3MlaPrnY7bBkNR6AFVTX+XvEEUSlBoA8cFzd8n/bad/UQbZOLPIGn+EDZAvZ6jr Cgdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604552; x=1782209352; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=uxKkyeejx8Q+vTtrpQmaNbDvbKzB3cd4Z5Ebm106wMM=; b=RSqy4SFBDFfS44DGxCX63szToHHAVJXwBVBPI0ze0jXiCnMHuOyacb+Cjy177IryZI C+AvM6Ssfva3QFmfvJeRAZ6o3pBq27rcWDmr+RPCBJa9TL3h0QoY+f6H6WZBul0mPSv1 WYyxF2r024S+TK9liQjTSO1ZYVueWiDz8ET0DDgIbaUbBjnxQMLpYnM25qM44EJyPpQL NI7NPe7+Zl6zxk1+OKYPDa0PJ+5f+j9DvauImlPIEvS0eL+kl0kj/18TjbXxvsMWxEPe OzU60tVhjXR2JFPzVbibBTnY20v7/cclnqtws8A/cg8Pa4M0R2mySXJONUwct5QLRFoT GZhg== X-Gm-Message-State: AOJu0YykiOFTvckm/nfOeaxw8DPtyiQJfni7l7atXhAlVu/GVxnA1BQD 2GdTWHDoyf8y+ugpWUCzq/Pewiu+05YDmkzXYTecsMd57R4KtHpdDWcquZj3A2rS X-Gm-Gg: Acq92OHSo/9pIBJMGGFv2uPm/bOPCQ618vESIPaYY79XuoHQQ/IYTzaXaRetQFbfOSz 6Tc+2lWRldzOOFvdwBMa2ksmmn6m//ZnYYn59KfjtEsIrqwC3ri7rwUmuuf5gnvxNDnISy6EqA/ AsGaeyGTH9QII72B+Ednfn5d3WuClWHiI6cxZuAKXbKeDGw1+t8xj8ktT0M06GBvblrPWnVV64l xBC5fSDSC61ynVM47fOF1rpyA0oBOTTlMjKBekbsLwGQ/57h3wYUTpW8JO2b4aYQ3Fz9NUsNtpF RBvAwGFjFOrslatGRsSi+RZiwHh1vfzURjrsibRNuzzcc1pNl5wyoGV2TzwT4GmWNhKJOvwFS4P GTq6hbr/AIRyBUJvyx1lDGIwsroWc7cWQ1VQlueTo9vbvKnOz3n+TwybFfc11MfBAJoKnoqoR0X cxwaOpZKHhUt38SDN7oXdlq7iEcEEIbCi2Qsiv/4U3 X-Received: by 2002:a05:6a20:549f:b0:3b4:7eb0:479f with SMTP id adf61e73a8af0-3b7961f6fc2mr17029945637.5.1781604552456; Tue, 16 Jun 2026 03:09:12 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 62/83] hw/riscv/virt.c: fix 'iommu-map' FDT entry Date: Tue, 16 Jun 2026 20:05:05 +1000 Message-ID: <20260616100527.1939565-63-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605837529158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Based on the DT documentation of 'iommu-map': https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-iommu.= txt - iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier data. The property is an arbitrary number of tuples of (rid-base,iommu,iommu-base,length). Reviewed-by: Alistair Francis ---------- We're adding a no-op entry (length =3D 0) in iommu-map: qemu_fdt_setprop_cells(ms->fdt, name, "iommu-map", 0, iommu_sys_phandle, 0, 0, 0, iommu_sys_phandle, 0, 0xffff); This is easily seen in the generated DT: iommu-map =3D <0x00 0x8000 0x00 0x00 0x00 0x8000 0x00 0xffff>; The tuple (0 0 0x8000 0) does nothing since it has length =3D 0. The information we want to advertise is in the second tuple only. Thus remove the empty tuple. While we're at it, seems like we've mistaken the API and we're using 0xffff as 'last address', but in fact it is length. This means that we're telling the DT we're mapping 0x0 -> 0xfffe, which wasn't our intention. Therefore change size to '0x10000' to reflect the address mapping we want (0x0 -> 0xffff). Found while reviewing the RISC-V Server Platform DT generation, which happens to copy a lot of code from the 'virt' board, and this nit is also present there. Fixes: 2c12de1460 ("hw/riscv/virt: Add IOMMU as platform device if the opti= on is set") Signed-off-by: Daniel Henrique Barboza Message-ID: <20260608210642.464131-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/virt.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index ce64eaaef7..0c489bb412 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -900,8 +900,7 @@ static void create_fdt_pcie(RISCVVirtState *s, =20 if (virt_is_iommu_sys_enabled(s)) { qemu_fdt_setprop_cells(ms->fdt, name, "iommu-map", - 0, iommu_sys_phandle, 0, 0, 0, - iommu_sys_phandle, 0, 0xffff); + 0, iommu_sys_phandle, 0, 0x10000); } =20 create_pcie_irq_map(s, ms->fdt, name, irq_pcie_phandle); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781609167; cv=none; d=zohomail.com; s=zohoarc; b=Fd1ubJUtu5jV8zPfoeBV3rTTX5tPJxLcmXYg2Ctx6alsF+sYWBkzuKzzFYVXQ27Bs2B7t/t/OzFT0tfyvtnSZsr/keSjwYpecBSMGqsQwYVV3NeFcGfBgsMs5ItTikfsCtENeMjxuskzPVLqRvaKgKCfEHhYQ0dqgF3UZQa4K7I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781609167; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hTJICuTgtDm/SYdUsrTzXK3QgvqftbPFI8VVLkqtBQ0=; b=aq8gQItft25v4T2J+egp68o84o5Hnm21r7sDV+x3C70olxwpU6ZC0Rpt9/WdkAxP5+sr8PeikQ8mFavN9ZaMr0KBmK7ldfXljjVLEkJ1Qck7XpSANS5lB1poJB1F61kMC40XhL/GbWX0ZRgeRIXjKsJ9ayNlF9FVbr0xPfJFIYI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781609167262689.6906961714753; Tue, 16 Jun 2026 04:26:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjT-0006ko-JD; Tue, 16 Jun 2026 06:09:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjR-0006c0-5h for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:21 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjO-0003r0-IU for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:20 -0400 Received: by mail-pg1-x529.google.com with SMTP id 41be03b00d2f7-c85825bbc4fso2696281a12.2 for ; Tue, 16 Jun 2026 03:09:17 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604556; x=1782209356; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hTJICuTgtDm/SYdUsrTzXK3QgvqftbPFI8VVLkqtBQ0=; b=lzh8q/5BOINsa4GC9vcJi645RfF5exWtEush+D/7I4AUdBeo0qnF8Tu4hIiFAI6x/C jbGWUvaO/f30A7zBEFibz3J7P8S3b2gnJgBZ8ePDvKJRQa7zhOICewCC8w/lzzem7eME 2AoOrvlJHXkEz37jcV84R9/Pd0a6+Mb7BjCSyxhATxagiyqCyaPBd4UIwU8q5WzLyYCq T8V4DD8DROAk/Mnw8Ta5RSBSU+V7Sgkr0T0YUyHMEW14kCbQJ3VQU5Ct0QgT6YebxUqC 1+Hs6GDN1VT//FqZ3khxdZpGe1TD9o3pSmBIfMGRGPqHvU9vZNkZgqqbOgdMWSgB4as7 g30Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604556; x=1782209356; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=hTJICuTgtDm/SYdUsrTzXK3QgvqftbPFI8VVLkqtBQ0=; b=EFV4qVfZLELR9zfuNsoyszYGTy4obrL+uMPInh1Cw/XuubT3sGAjzl2f28xC0oBNe7 ZcgCv7Ap2w+50iZZTu3D2zodsP5Ty6AhfMTiU3fAzTJB7wHE/QRkIBBNWf5+kyqxljCt lpSVNK3TLB6k6+ArrPPL0f9+BC7l7rGisfR6OsLXAg4DRyefRkPKo+49Tpt3SV1cUF+9 jzLjwLAm395lP43vrXC3kEuUucEYwznbD3Sy7L1keqH5sn99z1M16BlD61hmh/zQdyNZ /lV5i0u+cA9mqiSwtihRRi3urMt3IxVI9W6P4HVabdipVPIMKfRBRNkeNCpkzTzaQsvM HcpQ== X-Gm-Message-State: AOJu0YyFNh8SXwcNUTbIVfPDEX++eNtK2qAcnrasQqEftyvRN38j4Zcs bL7q82z4nnW77b6re6oEaXpoENDguCdGP6GXpJCItdxede6tya7nVZDCeHXXJstJ X-Gm-Gg: Acq92OGNlDvbfiZpg3J7l87n0h/M70sbayAii6LGm+vGhwj0lqCmMa3nn9pAMMSSYeg awUO55k/G/3wh6ZiiP2E1S+34raFQZdnvpPahpwJoxhgqTZ0M+7JvJoB5vRBVMdjxxIiZIxcG/U O3rHyQ21LCHZoRNHxblmDfsJzcSGWOlkOWka9aRj/C+OtxYtFFHreKHjMG5v5rdVd8YJIkRJdkU cxGnm13PF9dJgaUf8rXvcWyrywtwoGFw4mVgDVDtMEtUKf2HrfSD+hofm8zOzENn99YXNsMkSH7 IL3fLDE0u/trROWgxyjYJ2CLLmVi8eT6ikBl3ofHhOku5lchTiiYqXDr/NeTDMkwsZQ91pmNIjD 372cAtBa+zFXiKgb4+h42Beoop5n+EdnVLwAXZHx8hcD76SrVoUCxCOREWry455gq5VuADjhBHS QzigtKdnCdtqKnP3sTnFzUVpjyKHEsPDbq8X4eQf5M X-Received: by 2002:a05:6a20:6a08:b0:3b4:b340:411d with SMTP id adf61e73a8af0-3b7840eceb8mr21432443637.24.1781604555956; Tue, 16 Jun 2026 03:09:15 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Max Chou , Alistair Francis Subject: [PULL 63/83] target/riscv: Set mstatus.FS dirty when scalar FP raises exceptions Date: Tue, 16 Jun 2026 20:05:06 +1000 Message-ID: <20260616100527.1939565-64-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=alistair23@gmail.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781609169607158500 From: Max Chou According to the RISC-V privileged spec 3.1.6, any instruction that modifies FP extension state (FP CSRs including fflags, or f registers) must set mstatus.FS to Dirty. Raising fflags bits is modifying fcsr (an FP CSR). Scalar FP instructions that write integer registers (FP comparisons and FP-to-integer conversions) never call mark_fs_dirty at translation time to set mstatus.FS to dirty. However, they can raise FP exception flags via softfloat functions, which modifies fflags without any mechanism to dirty mstatus.FS. The affected helpers: - Comparisons: fle/fleq/flt/fltq/feq =E2=80=94 raise NV on NaN operands - FP-to-integer: fcvt.[w|wu|l|lu]/fcvtmod.w.d =E2=80=94 raise NX on inexact or NV on out-of-range Fix this issue by 1. Save float_exception_flags before the softfloat operation 2. Perform the operation 3. If any new exception bits are set, set fs to dirty Signed-off-by: Max Chou Reviewed-by: Alistair Francis Message-ID: <20260611105037.157773-2-max.chou@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 1 + target/riscv/fpu_helper.c | 157 +++++++++++++++++++++++++++++++------- 2 files changed, 130 insertions(+), 28 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index eec5acea5f..7582874c35 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -676,6 +676,7 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *en= v, =20 uint8_t riscv_cpu_get_fflags(CPURISCVState *env); void riscv_cpu_set_fflags(CPURISCVState *env, uint8_t); +void riscv_cpu_check_fflags(CPURISCVState *env, FloatExceptionFlags); =20 #ifndef CONFIG_USER_ONLY void cpu_set_exception_base(int vp_index, uint64_t address); diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index e6d1ffb1d6..db1475271b 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -50,6 +50,22 @@ void riscv_cpu_set_fflags(CPURISCVState *env, uint8_t ha= rd) set_float_exception_flags(soft, &env->fp_status); } =20 +#ifndef CONFIG_USER_ONLY +void riscv_cpu_check_fflags(CPURISCVState *env, + FloatExceptionFlags pre_fflag) +{ + if (get_float_exception_flags(&env->fp_status) & ~pre_fflag) { + env->mstatus |=3D MSTATUS_FS; + if (env->virt_enabled) { + env->mstatus_hs |=3D MSTATUS_FS; + } + } +} +#else +void riscv_cpu_check_fflags(CPURISCVState *env, + FloatExceptionFlags pre_fflag) {} +#endif + void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm) { FloatRoundMode softrm; @@ -286,59 +302,86 @@ target_ulong helper_fle_s(CPURISCVState *env, uint64_= t rs1, uint64_t rs2) { float32 frs1 =3D check_nanbox_s(env, rs1); float32 frs2 =3D check_nanbox_s(env, rs2); - return float32_le(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_le(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fleq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float32 frs1 =3D check_nanbox_s(env, rs1); float32 frs2 =3D check_nanbox_s(env, rs2); - return float32_le_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_le_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_flt_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float32 frs1 =3D check_nanbox_s(env, rs1); float32 frs2 =3D check_nanbox_s(env, rs2); - return float32_lt(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_lt(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fltq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float32 frs1 =3D check_nanbox_s(env, rs1); float32 frs2 =3D check_nanbox_s(env, rs2); - return float32_lt_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_lt_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_feq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float32 frs1 =3D check_nanbox_s(env, rs1); float32 frs2 =3D check_nanbox_s(env, rs2); - return float32_eq_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_eq_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_w_s(CPURISCVState *env, uint64_t rs1) { float32 frs1 =3D check_nanbox_s(env, rs1); - return float32_to_int32(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_to_int32(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_wu_s(CPURISCVState *env, uint64_t rs1) { float32 frs1 =3D check_nanbox_s(env, rs1); - return (int32_t)float32_to_uint32(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D (int32_t)float32_to_uint32(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_l_s(CPURISCVState *env, uint64_t rs1) { float32 frs1 =3D check_nanbox_s(env, rs1); - return float32_to_int64(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_to_int64(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_lu_s(CPURISCVState *env, uint64_t rs1) { float32 frs1 =3D check_nanbox_s(env, rs1); - return float32_to_uint64(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float32_to_uint64(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 uint64_t helper_fcvt_s_w(CPURISCVState *env, target_ulong rs1) @@ -453,52 +496,83 @@ uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t = frs1) =20 target_ulong helper_fle_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) { - return float64_le(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_le(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fleq_d(CPURISCVState *env, uint64_t frs1, uint64_t frs= 2) { - return float64_le_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_le_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_flt_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) { - return float64_lt(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_lt(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fltq_d(CPURISCVState *env, uint64_t frs1, uint64_t frs= 2) { - return float64_lt_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_lt_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_feq_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) { - return float64_eq_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_eq_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_w_d(CPURISCVState *env, uint64_t frs1) { - return float64_to_int32(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_to_int32(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 uint64_t helper_fcvtmod_w_d(CPURISCVState *env, uint64_t value) { - return float64_to_int32_modulo(value, float_round_to_zero, &env->fp_st= atus); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + uint64_t ret =3D float64_to_int32_modulo(value, float_round_to_zero, + &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_wu_d(CPURISCVState *env, uint64_t frs1) { - return (int32_t)float64_to_uint32(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D (int32_t)float64_to_uint32(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_l_d(CPURISCVState *env, uint64_t frs1) { - return float64_to_int64(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_to_int64(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_lu_d(CPURISCVState *env, uint64_t frs1) { - return float64_to_uint64(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float64_to_uint64(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 uint64_t helper_fcvt_d_w(CPURISCVState *env, target_ulong rs1) @@ -619,35 +693,50 @@ target_ulong helper_fle_h(CPURISCVState *env, uint64_= t rs1, uint64_t rs2) { float16 frs1 =3D check_nanbox_h(env, rs1); float16 frs2 =3D check_nanbox_h(env, rs2); - return float16_le(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_le(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fleq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float16 frs1 =3D check_nanbox_h(env, rs1); float16 frs2 =3D check_nanbox_h(env, rs2); - return float16_le_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_le_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_flt_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float16 frs1 =3D check_nanbox_h(env, rs1); float16 frs2 =3D check_nanbox_h(env, rs2); - return float16_lt(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_lt(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fltq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float16 frs1 =3D check_nanbox_h(env, rs1); float16 frs2 =3D check_nanbox_h(env, rs2); - return float16_lt_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_lt_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_feq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float16 frs1 =3D check_nanbox_h(env, rs1); float16 frs2 =3D check_nanbox_h(env, rs2); - return float16_eq_quiet(frs1, frs2, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_eq_quiet(frs1, frs2, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fclass_h(CPURISCVState *env, uint64_t rs1) @@ -683,25 +772,37 @@ uint64_t helper_froundnx_h(CPURISCVState *env, uint64= _t rs1) target_ulong helper_fcvt_w_h(CPURISCVState *env, uint64_t rs1) { float16 frs1 =3D check_nanbox_h(env, rs1); - return float16_to_int32(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_to_int32(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_wu_h(CPURISCVState *env, uint64_t rs1) { float16 frs1 =3D check_nanbox_h(env, rs1); - return (int32_t)float16_to_uint32(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D (int32_t)float16_to_uint32(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_l_h(CPURISCVState *env, uint64_t rs1) { float16 frs1 =3D check_nanbox_h(env, rs1); - return float16_to_int64(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_to_int64(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 target_ulong helper_fcvt_lu_h(CPURISCVState *env, uint64_t rs1) { float16 frs1 =3D check_nanbox_h(env, rs1); - return float16_to_uint64(frs1, &env->fp_status); + FloatExceptionFlags pre_fflag =3D get_float_exception_flags(&env->fp_s= tatus); + target_ulong ret =3D float16_to_uint64(frs1, &env->fp_status); + riscv_cpu_check_fflags(env, pre_fflag); + return ret; } =20 uint64_t helper_fcvt_h_w(CPURISCVState *env, target_ulong rs1) --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605356; cv=none; d=zohomail.com; s=zohoarc; b=XUdv9rXrD70Ev5NhPnunjGeGtVNo8ZL1HNIviV5D582LX+hkRS4tN+OAeYFA/+JRA73hVxobtN3rF0QTmZ5RLRED5bneykl9fwYSUDmtNoUhIOiZxPPAfvLn3Vy4D28Jxewzz9agb54IRMbYFlE/4VddA5fq0Y+77QAgWrE2sKs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605356; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=X4uJFCvbOydXUAuweKD6FNennFCxp3AJxi62BKOYAl0=; b=UjJtGHhVW4j3Zh+3RI3wW1uv70wiEHLDhs3fVvXkTTgH7vP8nlYAUNVKeA3CskQKKGyE1Fu/4sbeTq2VumE54crWAe4aPDDUZK7TU2ku9xwAoit8VwHKMGz4f/xpRV0Y6vGzpoWLNHuO7r6nkzqrOGA/MUrOVw1VUq/EZ26BXls= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605356202163.9083202065808; Tue, 16 Jun 2026 03:22:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjU-0006o9-Vi; Tue, 16 Jun 2026 06:09:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjT-0006kE-Bw for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:23 -0400 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjQ-0003rI-H7 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:22 -0400 Received: by mail-pg1-x52f.google.com with SMTP id 41be03b00d2f7-c8584e80d59so1706961a12.2 for ; Tue, 16 Jun 2026 03:09:20 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604559; x=1782209359; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X4uJFCvbOydXUAuweKD6FNennFCxp3AJxi62BKOYAl0=; b=FN1DJW1rFZ5H/wkwy1GmncLJ+SAdw848JysJykqTnr7fihjLx6leN/HJAf4qGCXQGS jrXotzHumWgCXSIK5WtsvsZpqNZraKhvOkhgUJQu94tF9d1Shia1Zn7xZ0fYRfpDGeFa sHUQxueMlfxRK0ATsYDEdXjmjn3ae+kP3FfUZ7sLKt2T5IhO50eXjQ55R55bzeMDpHte IaxygLoHlCI5fPzO3d5kIBthdNHilkZMApv/demgISeEYF+EVdzm6TWP2WeZ6/xF3tbd BAmnyfwjIcSN4VGBr5BeG/v586FkgKzdmtnjYhJD/x745W5wsyaK1nOTbON0aoywAK/1 AHVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604559; x=1782209359; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=X4uJFCvbOydXUAuweKD6FNennFCxp3AJxi62BKOYAl0=; b=fRISr7vMXTqAZE4WFUdvdM8mWtp/zBFv2CTUWT7i4Jjg3tSuIhpXBKU8X7n4yJT5rQ dgSM4vRAgfxoKbyifJGdmqDaJXNvh/UdY/sdXg+p91PashbFVlPQ9iZxiKOkBA0mn3cj 1MOzl6p0rU+0uE0LNFGcV8wXsZowVbI5thhUlXWVpbB2Zlp2BtDVfnTFwZbSe2Po0Uf9 x/Mi/ISdCUQinDC5E0YM7DzqcmaYk5cXeYBRn2e8t0VrVg7bKZ+tO5ZNYOYpiwRAC8Ns LAm04L5Tm4WqU0FU3ISaEViYA0uB11hST8plxknP/IWtXQ4XL5+ERWFW86cEMNSzPWr3 MUkw== X-Gm-Message-State: AOJu0YyrCxdsX7USU8pTchQbxnIr3yPfINBcDtjcjD8H/4TGvfAEq4JB oPuiKwUOW6fS3HIzJ5M59iOfCaaTmc4w/Zzd+iJp+3fMpJ/3oNBpFJBkeWJ7MQQl X-Gm-Gg: Acq92OGA1MFaxISbglZgz6FS2PjGU9HKLm+5v97oxCkEUEb9NDHma2Ms7Uw6bKF3WrE P2sPNbf77sKtc/4vN0n3qgObDYCMm3cQFlYWN3+KaBtGPqebOrHwdpiFV4YDU6uKa6sfalIZjCq 1dbZTn99k5rBT/Lr965F0RbqVU6ZQxu61fmwTyaV0K3jWX0sKN1n57iuj3K930/PleNhZ+PK/Fi UtMZuhpD47XWc2bvaHFgy6qXwFKqMu0fuxOc8pL6lVJmEFAYtb/FysFX4gTedFLihex2cHA1Iad uw2q9kt8+si1mIUSazke5MRe5WodOEmoCjgseHAFCK0c2o5Qr8Bey2sL/1pRfeh+TadqZf4NTUU IpNduOhGolFfZeSn+SytrAkvU+5eYkj+Frm53Zv/7Dir0RWRGkAEwjQhSsfOuSfEw/hrQ7y3xMw 1iyy4f25dBxcq7lT3W1cvEdzGKLq2hDTmy0LHsr9pvCwrw/LugT04= X-Received: by 2002:a05:6a21:7d04:b0:3b4:7d99:a23f with SMTP id adf61e73a8af0-3b7840a75a0mr20950510637.45.1781604559070; Tue, 16 Jun 2026 03:09:19 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Max Chou , Alistair Francis Subject: [PULL 64/83] target/riscv: rvv: Set mstatus.FS dirty when vector FP raises exceptions Date: Tue, 16 Jun 2026 20:05:07 +1000 Message-ID: <20260616100527.1939565-65-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605356628158501 Content-Type: text/plain; charset="utf-8" From: Max Chou According to the RISC-V privileged spec 3.1.6, any instruction that modifies FP extension state (FP CSRs including fflags, or f registers) must set mstatus.FS to Dirty. Raising fflags bits is modifying fcsr (an FP CSR). When a vector FP instruction raises a floating-point exception, it modifies fflags (an FP CSR), but current implementation was not marking mstatus.FS dirty in this case. Fix the issue by snapshot fflags before the element loop and OR MSTATUS_FS into env->mstatus if any new exception bits are set afterwards. Signed-off-by: Max Chou Reviewed-by: Alistair Francis Message-ID: <20260611105037.157773-3-max.chou@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/vector_helper.c | 241 +++++++++++++++++++---------------- 1 file changed, 128 insertions(+), 113 deletions(-) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 89012fccb3..e321ca2616 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -3172,34 +3172,36 @@ static void do_##NAME(void *vd, void *vs1, void *vs= 2, int i, \ *((TD *)vd + HD(i)) =3D OP(s2, s1, &env->fp_status); \ } =20 -#define GEN_VEXT_VV_ENV(NAME, ESZ) \ -void HELPER(NAME)(void *vd, void *v0, void *vs1, \ - void *vs2, CPURISCVState *env, \ - uint32_t desc) \ -{ \ - uint32_t vm =3D vext_vm(desc); \ - uint32_t vl =3D env->vl; \ - uint32_t total_elems =3D \ - vext_get_total_elems(env, desc, ESZ); \ - uint32_t vta =3D vext_vta(desc); \ - uint32_t vma =3D vext_vma(desc); \ - uint32_t i; \ - \ - VSTART_CHECK_EARLY_EXIT(env, vl); \ - \ - for (i =3D env->vstart; i < vl; i++) { \ - if (!vm && !vext_elem_mask(v0, i)) { \ - /* set masked-off elements to 1s */ \ - vext_set_elems_1s(vd, vma, i * ESZ, \ - (i + 1) * ESZ); \ - continue; \ - } \ - do_##NAME(vd, vs1, vs2, i, env); \ - } \ - env->vstart =3D 0; \ - /* set tail elements to 1s */ \ - vext_set_elems_1s(vd, vta, vl * ESZ, \ - total_elems * ESZ); \ +#define GEN_VEXT_VV_ENV(NAME, ESZ) \ +void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ + CPURISCVState *env, uint32_t desc) \ +{ \ + uint32_t vm =3D vext_vm(desc); \ + uint32_t vl =3D env->vl; \ + uint32_t total_elems =3D \ + vext_get_total_elems(env, desc, ESZ); \ + uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ + uint32_t i; \ + FloatExceptionFlags pre_fflag =3D \ + get_float_exception_flags(&env->fp_status); \ + \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ + for (i =3D env->vstart; i < vl; i++) { \ + if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * ESZ, \ + (i + 1) * ESZ); \ + continue; \ + } \ + do_##NAME(vd, vs1, vs2, i, env); \ + } \ + env->vstart =3D 0; \ + /* set tail elements to 1s */ \ + vext_set_elems_1s(vd, vta, vl * ESZ, \ + total_elems * ESZ); \ + riscv_cpu_check_fflags(env, pre_fflag); \ } =20 RVVCALL(OPFVV2, vfadd_vv_h_bf16, OP_UUU_H, H2, H2, H2, bfloat16_add) @@ -3219,34 +3221,36 @@ static void do_##NAME(void *vd, uint64_t s1, void *= vs2, int i, \ *((TD *)vd + HD(i)) =3D OP(s2, (TX1)(T1)s1, &env->fp_status);\ } =20 -#define GEN_VEXT_VF(NAME, ESZ) \ -void HELPER(NAME)(void *vd, void *v0, uint64_t s1, \ - void *vs2, CPURISCVState *env, \ - uint32_t desc) \ -{ \ - uint32_t vm =3D vext_vm(desc); \ - uint32_t vl =3D env->vl; \ - uint32_t total_elems =3D \ - vext_get_total_elems(env, desc, ESZ); \ - uint32_t vta =3D vext_vta(desc); \ - uint32_t vma =3D vext_vma(desc); \ - uint32_t i; \ - \ - VSTART_CHECK_EARLY_EXIT(env, vl); \ - \ - for (i =3D env->vstart; i < vl; i++) { \ - if (!vm && !vext_elem_mask(v0, i)) { \ - /* set masked-off elements to 1s */ \ - vext_set_elems_1s(vd, vma, i * ESZ, \ - (i + 1) * ESZ); \ - continue; \ - } \ - do_##NAME(vd, s1, vs2, i, env); \ - } \ - env->vstart =3D 0; \ - /* set tail elements to 1s */ \ - vext_set_elems_1s(vd, vta, vl * ESZ, \ - total_elems * ESZ); \ +#define GEN_VEXT_VF(NAME, ESZ) \ +void HELPER(NAME)(void *vd, void *v0, uint64_t s1, void *vs2, \ + CPURISCVState *env, uint32_t desc) \ +{ \ + uint32_t vm =3D vext_vm(desc); \ + uint32_t vl =3D env->vl; \ + uint32_t total_elems =3D \ + vext_get_total_elems(env, desc, ESZ); \ + uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ + uint32_t i; \ + FloatExceptionFlags pre_fflag =3D \ + get_float_exception_flags(&env->fp_status); \ + \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ + for (i =3D env->vstart; i < vl; i++) { \ + if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * ESZ, \ + (i + 1) * ESZ); \ + continue; \ + } \ + do_##NAME(vd, s1, vs2, i, env); \ + } \ + env->vstart =3D 0; \ + /* set tail elements to 1s */ \ + vext_set_elems_1s(vd, vta, vl * ESZ, \ + total_elems * ESZ); \ + riscv_cpu_check_fflags(env, pre_fflag); \ } =20 RVVCALL(OPFVF2, vfadd_vf_h_bf16, OP_UUU_H, H2, H2, bfloat16_add) @@ -3993,35 +3997,38 @@ static void do_##NAME(void *vd, void *vs2, int i, = \ *((TD *)vd + HD(i)) =3D OP(s2, &env->fp_status); \ } =20 -#define GEN_VEXT_V_ENV(NAME, ESZ) \ -void HELPER(NAME)(void *vd, void *v0, void *vs2, \ - CPURISCVState *env, uint32_t desc) \ -{ \ - uint32_t vm =3D vext_vm(desc); \ - uint32_t vl =3D env->vl; \ - uint32_t total_elems =3D \ - vext_get_total_elems(env, desc, ESZ); \ - uint32_t vta =3D vext_vta(desc); \ - uint32_t vma =3D vext_vma(desc); \ - uint32_t i; \ - \ - VSTART_CHECK_EARLY_EXIT(env, vl); \ - \ - if (vl =3D=3D 0) { \ - return; \ - } \ - for (i =3D env->vstart; i < vl; i++) { \ - if (!vm && !vext_elem_mask(v0, i)) { \ - /* set masked-off elements to 1s */ \ - vext_set_elems_1s(vd, vma, i * ESZ, \ - (i + 1) * ESZ); \ - continue; \ - } \ - do_##NAME(vd, vs2, i, env); \ - } \ - env->vstart =3D 0; \ - vext_set_elems_1s(vd, vta, vl * ESZ, \ - total_elems * ESZ); \ +#define GEN_VEXT_V_ENV(NAME, ESZ) \ +void HELPER(NAME)(void *vd, void *v0, void *vs2, \ + CPURISCVState *env, uint32_t desc) \ +{ \ + uint32_t vm =3D vext_vm(desc); \ + uint32_t vl =3D env->vl; \ + uint32_t total_elems =3D \ + vext_get_total_elems(env, desc, ESZ); \ + uint32_t vta =3D vext_vta(desc); \ + uint32_t vma =3D vext_vma(desc); \ + uint32_t i; \ + FloatExceptionFlags pre_fflag =3D \ + get_float_exception_flags(&env->fp_status); \ + \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ + if (vl =3D=3D 0) { \ + return; \ + } \ + for (i =3D env->vstart; i < vl; i++) { \ + if (!vm && !vext_elem_mask(v0, i)) { \ + /* set masked-off elements to 1s */ \ + vext_set_elems_1s(vd, vma, i * ESZ, \ + (i + 1) * ESZ); \ + continue; \ + } \ + do_##NAME(vd, vs2, i, env); \ + } \ + env->vstart =3D 0; \ + vext_set_elems_1s(vd, vta, vl * ESZ, \ + total_elems * ESZ); \ + riscv_cpu_check_fflags(env, pre_fflag); \ } =20 RVVCALL(OPFVV1, vfsqrt_v_h, OP_UU_H, H2, H2, float16_sqrt) @@ -4610,6 +4617,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint32_t vta_all_1s =3D vext_vta_all_1s(desc); \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ + FloatExceptionFlags pre_fflag =3D \ + get_float_exception_flags(&env->fp_status); \ \ VSTART_CHECK_EARLY_EXIT(env, vl); \ \ @@ -4636,6 +4645,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ vext_set_elem_mask(vd, i, 1); \ } \ } \ + riscv_cpu_check_fflags(env, pre_fflag); \ } =20 GEN_VEXT_CMP_VV_ENV(vmfeq_vv_h_bf16, uint16_t, H2, bfloat16_eq_quiet) @@ -4653,6 +4663,8 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, vo= id *vs2, \ uint32_t vta_all_1s =3D vext_vta_all_1s(desc); \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ + FloatExceptionFlags pre_fflag =3D \ + get_float_exception_flags(&env->fp_status); \ \ VSTART_CHECK_EARLY_EXIT(env, vl); \ \ @@ -4678,6 +4690,7 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, vo= id *vs2, \ vext_set_elem_mask(vd, i, 1); \ } \ } \ + riscv_cpu_check_fflags(env, pre_fflag); \ } =20 GEN_VEXT_CMP_VF(vmfeq_vf_h_bf16, uint16_t, H2, bfloat16_eq_quiet) @@ -5151,34 +5164,36 @@ GEN_VEXT_RED(vwredsumu_vs_h, uint32_t, uint16_t, H4= , H2, DO_ADD) GEN_VEXT_RED(vwredsumu_vs_w, uint64_t, uint32_t, H8, H4, DO_ADD) =20 /* Vector Single-Width Floating-Point Reduction Instructions */ -#define GEN_VEXT_FRED(NAME, TD, TS2, HD, HS2, OP) \ -void HELPER(NAME)(void *vd, void *v0, void *vs1, \ - void *vs2, CPURISCVState *env, \ - uint32_t desc) \ -{ \ - uint32_t vm =3D vext_vm(desc); \ - uint32_t vl =3D env->vl; \ - uint32_t esz =3D sizeof(TD); \ - uint32_t vlenb =3D simd_maxsz(desc); \ - uint32_t vta =3D vext_vta(desc); \ - uint32_t i; \ - TD s1 =3D *((TD *)vs1 + HD(0)); \ - \ - VSTART_CHECK_EARLY_EXIT(env, vl); \ - \ - for (i =3D env->vstart; i < vl; i++) { \ - TS2 s2 =3D *((TS2 *)vs2 + HS2(i)); \ - if (!vm && !vext_elem_mask(v0, i)) { \ - continue; \ - } \ - s1 =3D OP(s1, (TD)s2, &env->fp_status); \ - } \ - if (vl > 0) { \ - *((TD *)vd + HD(0)) =3D s1; \ - } \ - env->vstart =3D 0; \ - /* set tail elements to 1s */ \ - vext_set_elems_1s(vd, vta, esz, vlenb); \ +#define GEN_VEXT_FRED(NAME, TD, TS2, HD, HS2, OP) \ +void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ + CPURISCVState *env, uint32_t desc) \ +{ \ + uint32_t vm =3D vext_vm(desc); \ + uint32_t vl =3D env->vl; \ + uint32_t esz =3D sizeof(TD); \ + uint32_t vlenb =3D simd_maxsz(desc); \ + uint32_t vta =3D vext_vta(desc); \ + uint32_t i; \ + FloatExceptionFlags pre_fflag =3D \ + get_float_exception_flags(&env->fp_status); \ + TD s1 =3D *((TD *)vs1 + HD(0)); \ + \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ + for (i =3D env->vstart; i < vl; i++) { \ + TS2 s2 =3D *((TS2 *)vs2 + HS2(i)); \ + if (!vm && !vext_elem_mask(v0, i)) { \ + continue; \ + } \ + s1 =3D OP(s1, (TD)s2, &env->fp_status); \ + } \ + if (vl > 0) { \ + *((TD *)vd + HD(0)) =3D s1; \ + } \ + env->vstart =3D 0; \ + /* set tail elements to 1s */ \ + vext_set_elems_1s(vd, vta, esz, vlenb); \ + riscv_cpu_check_fflags(env, pre_fflag); \ } =20 /* Unordered sum */ --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606590; cv=none; d=zohomail.com; s=zohoarc; b=OuSkOVMMq/re6vfNOr8eLr1EtNCQDSCQg9BRYtqUnc4lo/56wWU4XXPaI4qOJwd2F7K2AuNhnOXLpDMPtsUEvAWfWBV4x3nJ/cdlA+/pJxSlU5k0Erwqmcnod+wb6Fgh84sU6YD0/L+9AwruBE/x20xlBFKL6jeCnbtWkBVRCgg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606590; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tyL2f336HSE9UBR6i/wiYZkJNqrj2PCoYVGUodbMamE=; b=Chb1WmebL07hAFo9alOOUAGqlmdXlAQOzNR4DucOyyyPMe0bzaRWOqmTYo356vum/uzgE1Zb9oJbdHSH1iK/PKIEHEDOqkKxaX08eVcQrnsjAE0bhczmpmC4tcU0KJPP0tbESo7ju95nUhdWeNbMnJQGYPQ+kEVuytfDvxegOfw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606590176372.2855394923265; Tue, 16 Jun 2026 03:43:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjX-0006qC-5l; Tue, 16 Jun 2026 06:09:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjV-0006pK-IX for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:25 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjU-0003t5-0R for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:25 -0400 Received: by mail-pg1-x529.google.com with SMTP id 41be03b00d2f7-c858961a8efso1814419a12.2 for ; Tue, 16 Jun 2026 03:09:23 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604563; x=1782209363; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tyL2f336HSE9UBR6i/wiYZkJNqrj2PCoYVGUodbMamE=; b=M9yjGU1SK9ThQJ+zdzUeA04+X09AiWbvKlcGyyBKk+qZtglNG5YIDJ0YfioHwJQRoX FND5j8znxZqBOueN7ev+2XziAZU8F2c0x84WVk2ejw8Prg7lgOOpjET5XvkC8jEImVMx XQmbWNxCDg7hLvfEQInCQN8Y+G2YWjU0xf2AofgKVlnC/HcT17Xle1/Ad1P/YAQLiTks NvkMa82rA97tn73/7PMj3OnIVTr4EhBzPR9iDidPQ3UuD2qkYEpG0XyjtBho738UzjbZ Xk3gN+kwSj1yEo18NPO+8fTzusgWf22jFRk3kYnaFhFuaQjtZOXuIkffGLPoPhVZnt8q 02pA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604563; x=1782209363; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=tyL2f336HSE9UBR6i/wiYZkJNqrj2PCoYVGUodbMamE=; b=ENRc7FIN+EpopwBU5qBm3KOMtdNw6yt33SRD1Jt+T/n2prTwmytQ4mk0fQqptQi0Mn y9sacivVX613aXcYjxWrGmuNVYTLPGCvL1gj7PQKPSmdcHtQCbxNOmXESlIeWbCVnrQz f7KT11Qu4IPMpxN+px1Z5cwzom+az50+H4gEaOxC4TdqQFbgLhrKx+9f6P7Yp56HRWbP DL3PALqxJM59ga85+tfdLgU2RaiVYe/1opuAuAdqcTX11fWeLW3pe4xg0sPyaWDQ7hWU UmD/mIM7amd19/Dbs5j0lNtnZS1Y79Hd5loWzQPtx07+UAT92ZqvSQGMBTWzapq9THV1 Ajxg== X-Gm-Message-State: AOJu0Yw/0zjeXNyxO7EVlkRFRUrOwQpLU4l3WEzex0rajNoxb8cCC6eu cpp6xVm+wU8yAyXg3AvBJ35BTBZ+5Tystm2rWMYnIfYkvbHSMBKderRQqcobmBr0 X-Gm-Gg: Acq92OGxiCI06mJzbxrwtF4K51MZbWYY4DUT6M/W4/lYebRJ4btwrA/r8OmYawb/S/u jneYXgB2s3HYh3zVBCA104tUGpuT5cpkBzvC3q5PWoq1BXk7IUmsKoe4ztDnTl0FyzCw3+77VEn GE+TlkIa+stOEZskZ1z3RbSE7ICOvpt9CwxvgQqWM/IqhkFYN/9D1WJiTyfbf/7/EHH4NnjUnTt CL+0LMyih7fLRk2TS/3NuDoZ1EL6eNsaweUYPbYYt9dB5LDnPzbtrjSNCII3hmuOb7nfqSwSSSX oqgU9AMgnIuBbd2S85AUlKxlMWk4SZUf7csWYycg7iMjxHul8UArlX+R9svDt4PCF8Dgubo1gFw budqfh1CduFqNCvHVuzz+M/GAHhzWw6SC6toG+J6GBsDo6InopU79JRrGcPasTjZdoS0bZyeqrB 1pVIOOnYjFFK/pXI7YIMBz7rbPGM8N97h+XEo8nm4+ X-Received: by 2002:a05:6a21:2986:b0:3b5:4dd2:7284 with SMTP id adf61e73a8af0-3b7e49510fdmr3422267637.9.1781604562662; Tue, 16 Jun 2026 03:09:22 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, imaginos , Alistair Francis Subject: [PULL 65/83] disas/riscv: enable `mnret` disassembly Date: Tue, 16 Jun 2026 20:05:08 +1000 Message-ID: <20260616100527.1939565-66-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=alistair23@gmail.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606591040158500 Content-Type: text/plain; charset="utf-8" From: imaginos The translator has supported mnret since commit 3157a553ec6b9a ("target/riscv: Add Smrnmi mnret instruction"), but the disassembler still renders it as illegal. Add it unguarded, since the encoding does not overlap any other extension. Signed-off-by: imaginos Acked-by: Alistair Francis Message-ID: <20260614141315.17320-1-imaginos32@gmail.com> Signed-off-by: Alistair Francis --- disas/riscv.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/disas/riscv.c b/disas/riscv.c index b8ec546883..7f1b262773 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -989,6 +989,7 @@ typedef enum { rv_op_cbo_clean =3D 957, rv_op_cbo_flush =3D 958, rv_op_cbo_zero =3D 959, + rv_op_mnret =3D 960, } rv_op; =20 /* register names */ @@ -2263,6 +2264,7 @@ const rv_opcode_data rvi_opcode_data[] =3D { { "cbo.clean", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, { "cbo.flush", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, { "cbo.zero", rv_codec_r, rv_fmt_rs1, NULL, 0, 0, 0 }, + { "mnret", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, }; =20 /* CSR names */ @@ -4077,6 +4079,11 @@ static void decode_inst_opcode(rv_decode *dec, rv_is= a isa) case 64: op =3D rv_op_mret; break; } break; + case 1792: + switch ((inst >> 15) & 0b1111111111) { + case 64: op =3D rv_op_mnret; break; + } + break; case 1952: switch ((inst >> 15) & 0b1111111111) { case 576: op =3D rv_op_dret; break; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605371; cv=none; d=zohomail.com; s=zohoarc; b=L3nuZMNSdkV5I7mfY1vNHF+ptkuhrHXbkwJfwHzVkGi6Iy11R7Hw4UOH5o2uBx3Jfesl3l4hFanRUa4G+XVJjgqBn9WHZrb7Fnq4ggxp6UbRUJw/nnyEAz9HkvP6ft7b8T/tTCcAEKeVSWwtPofV2dvkFI5R3VNjLfJX3Up+JiU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605371; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=XkQvFZUVhtVsED3Y4QMiMbRrPxGXy039Nz4aN1nTJpU=; b=YPVXG84wxc0X6gcImZ9AQiLQ5f0yfbl6VXZQ7w4qvoQC8esW9t2h6fmLK4FI2rFMz3uoIT7tHbHyMlkECPARvRY7XaKUX56ERPoLeAHHej32Ny5udmfaFciG7i2BTjBh1dZ0ZDFkEj3998ZEn1x8AfViuiIH9BemYtMLsCllIEw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605371326551.1929369376908; Tue, 16 Jun 2026 03:22:51 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjd-0007Re-W4; Tue, 16 Jun 2026 06:09:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjb-0007AN-H4 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:31 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjY-0003vw-GH for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:31 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-36d8b644473so3794922a91.3 for ; Tue, 16 Jun 2026 03:09:28 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604567; x=1782209367; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XkQvFZUVhtVsED3Y4QMiMbRrPxGXy039Nz4aN1nTJpU=; b=O9MvHF+R3a046qbhAYvE0WtNY7rChLNgLOwqBeE/fevLhADx6glH+MdSjFzRcoccIr NYr6yohOy6XrMK+QLJQDRbbBOqZron8ILxPkxjHmBoxgPpUOtHPZJrnFiWIL8hiH/8dV P4if77MPKiNPJcRoQmWjnS8ZXF7DkXpT+vlNYMAKw0Nid9WB2crrmoqMIAgUahjx46st Y5SfCwDASfoQDuxxM+Sb/wgYoeT3jP1CGUPfifmIB3TarElQ0WiN5WnwpU6xHcW0yUCr VLI6Rh1u/JGInLTD6k4fIleSSm5MwhNuXciA4go52VXMF1nsmmv2XZVIltjzfENApss+ zRTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604567; x=1782209367; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XkQvFZUVhtVsED3Y4QMiMbRrPxGXy039Nz4aN1nTJpU=; b=ooZYcE0sJt3LPolBvFi1oa8d6+W+7JtPhg+ja7WKWEg6J6XgKi3+yOh0Tloqzdm/hm LyY4joTP9685fWoogsduKo3K5Ns2lM7wz8j1MxnOvkYVoesn3KuBGPGvmSgDZVNP11H4 KiD0TLFYROOnv5/9v4N5fGXYQ1e+Wsah3ZCKAp93g5FIekzovxse0Jhs5BrWEJKdrN6o vukSQktfnyTvrrtzMHR6cU1fRbfmAcr941AabALwRaF/xtw1b40jXJVEYQEOl6ZR26V/ zFgDIG29AQNLX4j3chfvg5tJMmFH/Aet68a6q+AV+KZEq8HstDqAP1kS6TRlNQw4Cjdq 9oQw== X-Gm-Message-State: AOJu0YyBP5t3OWDS84IGf9UOauWP4lbwyXfWd2y6TQpH+uRpDCbmcBeY VsNFOGYM+AOOFEEGnXfedtPJSb2h7y+tO7ciDjfwekFx05urLT+nGtaysCb1ziq6 X-Gm-Gg: Acq92OHicKrL1uLKgkq1PVSzcKOEZj1OTUp/5Y7t3f3rY7zEOoCO92zpmhMKP3+DtZk A2ZcIhv2kaqWh3Z2/manXO1MJwr5wOP7LZlBBiXXSQor5BiGxwx7PlSNTqIuR8YVdKYIpemTOhM d8fEF46HsYFjhJm+ZIv7jfq+CmTJ0wHxSPT8M7S0CHTLwotTKuFerzAdzuLHsNOgqNKx9YY39t1 hXwVMr55BGAiY9QxNEc8l1DfDi5LrrvAt6OoqC95IZYhP/NoIuuccjwAQUmDGqKB6/ZxIW79N8+ GnJe7+nZk3JS+g9mvG9tpWbljyoc7BXFHyIelm/boLZ8yVlSBbDPoTCYVBrxiX/egDtu8JUOuP6 8DNfXHMRpTP17mYiV80ct4+KUU8L8DIhVqR4D0Bq7sQnZh0obVUzT0EZNpuZz/aiKJUvUi8A2qp VYRQ9YeDSeFZnRvJo4GxstxIlyxeeq03XD6cv3pFKK X-Received: by 2002:a05:6a21:1405:b0:39c:126c:93b5 with SMTP id adf61e73a8af0-3b7e49a525emr3193043637.21.1781604567160; Tue, 16 Jun 2026 03:09:27 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Chao Liu , Chao Liu , LIU Zhiwei , Daniel Henrique Barboza , Peng Jiang <3160104094@zju.edu.cn>, Alistair Francis , Nutty Liu Subject: [PULL 66/83] target/riscv: add thead-c908 cpu support Date: Tue, 16 Jun 2026 20:05:09 +1000 Message-ID: <20260616100527.1939565-67-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605373391158500 Content-Type: text/plain; charset="utf-8" From: Chao Liu The C908 processor is based on the RV64GCB[V] instruction set, compatible to RVA22 Profile and implements the XIE (XuanTie Instruction Extension) technology. Signed-off-by: Chao Liu Suggested-by: LIU Zhiwei Reviewed-by: Daniel Henrique Barboza Tested-by: Peng Jiang <3160104094@zju.edu.cn> Acked-by: Alistair Francis Reviewed-by: Nutty Liu Message-ID: Signed-off-by: Alistair Francis --- target/riscv/cpu-qom.h | 2 + target/riscv/cpu.c | 51 ++++++ target/riscv/th_csr.c | 376 ++++++++++++++++++++++++++++++++++++++++- 3 files changed, 428 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index 30dcdcfaae..1a28f1369c 100644 --- a/target/riscv/cpu-qom.h +++ b/target/riscv/cpu-qom.h @@ -52,6 +52,8 @@ #define TYPE_RISCV_CPU_SIFIVE_U34 RISCV_CPU_TYPE_NAME("sifive-u34") #define TYPE_RISCV_CPU_SIFIVE_U54 RISCV_CPU_TYPE_NAME("sifive-u54") #define TYPE_RISCV_CPU_THEAD_C906 RISCV_CPU_TYPE_NAME("thead-c906") +#define TYPE_RISCV_CPU_THEAD_C908 RISCV_CPU_TYPE_NAME("thead-c908") +#define TYPE_RISCV_CPU_THEAD_C908V RISCV_CPU_TYPE_NAME("thead-c908v") #define TYPE_RISCV_CPU_VEYRON_V1 RISCV_CPU_TYPE_NAME("veyron-v1") #define TYPE_RISCV_CPU_TT_ASCALON RISCV_CPU_TYPE_NAME("tt-ascalon") #define TYPE_RISCV_CPU_XIANGSHAN_NANHU RISCV_CPU_TYPE_NAME("xiangshan-nan= hu") diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a74384a091..fa497e5e8a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -3121,6 +3121,57 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { #endif ), =20 + DEFINE_RISCV_CPU(TYPE_RISCV_CPU_THEAD_C908, TYPE_RISCV_VENDOR_CPU, + .misa_mxl_max =3D MXL_RV64, + .misa_ext =3D RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU, + .priv_spec =3D PRIV_VERSION_1_12_0, + + /* ISA extensions */ + .cfg.ext_xtheadba =3D true, + .cfg.ext_xtheadbb =3D true, + .cfg.ext_xtheadbs =3D true, + .cfg.ext_xtheadcmo =3D true, + .cfg.ext_xtheadcondmov =3D true, + .cfg.ext_xtheadfmv =3D true, + .cfg.ext_xtheadfmemidx =3D true, + .cfg.ext_xtheadmac =3D true, + .cfg.ext_xtheadmemidx =3D true, + .cfg.ext_xtheadmempair =3D true, + .cfg.ext_xtheadsync =3D true, + .cfg.ext_smepmp =3D true, + .cfg.ext_sscofpmf =3D true, + .cfg.ext_sstc =3D true, + .cfg.ext_svpbmt =3D true, + .cfg.ext_svinval =3D true, + .cfg.ext_svnapot =3D true, + .cfg.ext_zba =3D true, + .cfg.ext_zbb =3D true, + .cfg.ext_zbc =3D true, + .cfg.ext_zbs =3D true, + .cfg.ext_zkt =3D true, + .cfg.ext_zbkc =3D true, + .cfg.ext_zicsr =3D true, + .cfg.ext_zifencei =3D true, + .cfg.ext_zihintpause =3D true, + .cfg.ext_zicbom =3D true, + .cfg.ext_zicboz =3D true, + + .cfg.pmp =3D true, + .cfg.mmu =3D true, + .cfg.max_satp_mode =3D VM_1_10_SV48, + + .cfg.marchid =3D 0x8d143000, + .cfg.mvendorid =3D THEAD_VENDOR_ID, +#ifndef CONFIG_USER_ONLY + .custom_csrs =3D th_csr_list, +#endif + ), + + DEFINE_RISCV_CPU(TYPE_RISCV_CPU_THEAD_C908V, TYPE_RISCV_CPU_THEAD_C908, + .misa_ext =3D RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU | RVV, + .vext_spec =3D VEXT_VERSION_1_00_0, + ), + DEFINE_RISCV_CPU(TYPE_RISCV_CPU_TT_ASCALON, TYPE_RISCV_VENDOR_CPU, .misa_mxl_max =3D MXL_RV64, .misa_ext =3D RVG | RVC | RVS | RVU | RVH | RVV, diff --git a/target/riscv/th_csr.c b/target/riscv/th_csr.c index a4ea4ce391..431f4cc286 100644 --- a/target/riscv/th_csr.c +++ b/target/riscv/th_csr.c @@ -2,6 +2,9 @@ * T-Head-specific CSRs. * * Copyright (c) 2024 VRULL GmbH + * Copyright (c) 2025 Chao Liu + * + * For more information, see XuanTie-C908-UserManual_xrvm_20240530.pdf * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -21,13 +24,84 @@ #include "cpu_vendorid.h" #include "target/riscv/csr.h" =20 -#define CSR_TH_SXSTATUS 0x5c0 +/* Extended M-mode control registers of T-Head */ +#define CSR_TH_MXSTATUS 0x7c0 +#define CSR_TH_MHCR 0x7c1 +#define CSR_TH_MCOR 0x7c2 +#define CSR_TH_MCCR2 0x7c3 +#define CSR_TH_MHINT 0x7c5 +#define CSR_TH_MRVBR 0x7c7 +#define CSR_TH_MCOUNTERWEN 0x7c9 +#define CSR_TH_MCOUNTERINTEN 0x7ca +#define CSR_TH_MCOUNTEROF 0x7cb +#define CSR_TH_MCINS 0x7d2 +#define CSR_TH_MCINDEX 0x7d3 +#define CSR_TH_MCDATA0 0x7d4 +#define CSR_TH_MCDATA1 0x7d5 +#define CSR_TH_MSMPR 0x7f3 +#define CSR_TH_CPUID 0xfc0 +#define CSR_TH_MAPBADDR 0xfc1 + +/* TH_MXSTATUS bits */ +#define TH_MXSTATUS_UCME BIT(16) +#define TH_MXSTATUS_MAEE BIT(21) +#define TH_MXSTATUS_THEADISAEE BIT(22) + +/* Extended S-mode control registers of T-Head */ +#define CSR_TH_SXSTATUS 0x5c0 +#define CSR_TH_SHCR 0x5c1 +#define CSR_TH_SCER2 0x5c2 +#define CSR_TH_SCER 0x5c3 +#define CSR_TH_SCOUNTERINTEN 0x5c4 +#define CSR_TH_SCOUNTEROF 0x5c5 +#define CSR_TH_SCYCLE 0x5e0 +#define CSR_TH_SHPMCOUNTER3 0x5e3 +#define CSR_TH_SHPMCOUNTER4 0x5e4 +#define CSR_TH_SHPMCOUNTER5 0x5e5 +#define CSR_TH_SHPMCOUNTER6 0x5e6 +#define CSR_TH_SHPMCOUNTER7 0x5e7 +#define CSR_TH_SHPMCOUNTER8 0x5e8 +#define CSR_TH_SHPMCOUNTER9 0x5e9 +#define CSR_TH_SHPMCOUNTER10 0x5ea +#define CSR_TH_SHPMCOUNTER11 0x5eb +#define CSR_TH_SHPMCOUNTER12 0x5ec +#define CSR_TH_SHPMCOUNTER13 0x5ed +#define CSR_TH_SHPMCOUNTER14 0x5ee +#define CSR_TH_SHPMCOUNTER15 0x5ef +#define CSR_TH_SHPMCOUNTER16 0x5f0 +#define CSR_TH_SHPMCOUNTER17 0x5f1 +#define CSR_TH_SHPMCOUNTER18 0x5f2 +#define CSR_TH_SHPMCOUNTER19 0x5f3 +#define CSR_TH_SHPMCOUNTER20 0x5f4 +#define CSR_TH_SHPMCOUNTER21 0x5f5 +#define CSR_TH_SHPMCOUNTER22 0x5f6 +#define CSR_TH_SHPMCOUNTER23 0x5f7 +#define CSR_TH_SHPMCOUNTER24 0x5f8 +#define CSR_TH_SHPMCOUNTER25 0x5f9 +#define CSR_TH_SHPMCOUNTER26 0x5fa +#define CSR_TH_SHPMCOUNTER27 0x5fb +#define CSR_TH_SHPMCOUNTER28 0x5fc +#define CSR_TH_SHPMCOUNTER29 0x5fd +#define CSR_TH_SHPMCOUNTER30 0x5fe +#define CSR_TH_SHPMCOUNTER31 0x5ff +#define CSR_TH_SMIR 0x9c0 +#define CSR_TH_SMLO0 0x9c1 +#define CSR_TH_SMEH 0x9c2 +#define CSR_TH_SMCIR 0x9c3 + +/* Extended U-mode control registers of T-Head */ +#define CSR_TH_FXCR 0x800 =20 /* TH_SXSTATUS bits */ #define TH_SXSTATUS_UCME BIT(16) #define TH_SXSTATUS_MAEE BIT(21) #define TH_SXSTATUS_THEADISAEE BIT(22) =20 +static RISCVException mmode(CPURISCVState *env, int csrno) +{ + return RISCV_EXCP_NONE; +} + static RISCVException smode(CPURISCVState *env, int csrno) { if (riscv_has_ext(env, RVS)) { @@ -37,11 +111,31 @@ static RISCVException smode(CPURISCVState *env, int cs= rno) return RISCV_EXCP_ILLEGAL_INST; } =20 +static RISCVException any(CPURISCVState *env, int csrno) +{ + return RISCV_EXCP_NONE; +} + static bool test_thead_mvendorid(RISCVCPU *cpu) { return cpu->cfg.mvendorid =3D=3D THEAD_VENDOR_ID; } =20 +static RISCVException read_th_mxstatus(CPURISCVState *env, int csrno, + target_ulong *val) +{ + /* We don't set MAEE here, because QEMU does not implement MAEE. */ + *val =3D TH_MXSTATUS_UCME | TH_MXSTATUS_THEADISAEE; + return RISCV_EXCP_NONE; +} + +static RISCVException read_unimp_th_csr(CPURISCVState *env, int csrno, + target_ulong *val) +{ + *val =3D 0; + return RISCV_EXCP_NONE; +} + static RISCVException read_th_sxstatus(CPURISCVState *env, int csrno, target_ulong *val) { @@ -51,10 +145,290 @@ static RISCVException read_th_sxstatus(CPURISCVState = *env, int csrno, } =20 const RISCVCSR th_csr_list[] =3D { + { + .csrno =3D CSR_TH_MXSTATUS, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mxstatus", mmode, read_th_mxstatus } + }, + { + .csrno =3D CSR_TH_MHCR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mhcr", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCOR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcor", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCCR2, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mccr2", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MHINT, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mhint", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MRVBR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mrvbr", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCOUNTERWEN, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcounterwen", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCOUNTERINTEN, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcounterinten", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCOUNTEROF, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcounterof", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCINS, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcins", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCINDEX, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcindex", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCDATA0, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcdata0", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MCDATA1, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mcdata1", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MSMPR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.msmpr", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_CPUID, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.cpuid", mmode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_MAPBADDR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.mapbaddr", mmode, read_unimp_th_csr } + }, { .csrno =3D CSR_TH_SXSTATUS, .insertion_test =3D test_thead_mvendorid, .csr_ops =3D { "th.sxstatus", smode, read_th_sxstatus } }, + { + .csrno =3D CSR_TH_SHCR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shcr", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SCER2, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.scer2", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SCER, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.scer", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SCOUNTERINTEN, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.scounterinten", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SCOUNTEROF, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.scounterof", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SCYCLE, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.scycle", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER3, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter3", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER4, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter4", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER5, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter5", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER6, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter6", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER7, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter7", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER8, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter8", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER9, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter9", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER10, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter10", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER11, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter11", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER12, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter12", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER13, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter13", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER14, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter14", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER15, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter15", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER16, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter16", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER17, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter17", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER18, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter18", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER19, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter19", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER20, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter20", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER21, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter21", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER22, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter22", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER23, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter23", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER24, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter24", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER25, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter25", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER26, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter26", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER27, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter27", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER28, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter28", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER29, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter29", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER30, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter30", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SHPMCOUNTER31, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.shpmcounter31", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SMIR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.smir", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SMLO0, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.smlo0", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SMEH, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.smeh", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_SMCIR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.smcir", smode, read_unimp_th_csr } + }, + { + .csrno =3D CSR_TH_FXCR, + .insertion_test =3D test_thead_mvendorid, + .csr_ops =3D { "th.fxcr", any, read_unimp_th_csr } + }, { } }; --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605995; cv=none; d=zohomail.com; s=zohoarc; b=eA/GY8wi6eN+3xRHU7uHnWwTebWQgi4tBzJyUmyJDBvRLFcoNSD1gmWLRPb/vVBrzRnQTFiBYpAuAW9HMS/f8lHBTal32Pnh3dzf1g9N1U2gg1szJ41dsNePgHaif7tofim32XRnm+3q4jqteaE8SlMxH/ngcch0PAPu8HFMdvU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605995; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=cwXK/aS1FTBO6kISF2m2PcFJWpR//ta4VcN+LBq3+sM=; b=VKWQ9yAeKOk/flX9nMgAFQv7nwwHOiVVD6KUAJ6vZEwq70lgKUCjv2eQhE3vjfSNkUyir/0ZmmsDvHHQ15sG7GKKk6L6+IzNgg0UW6tSNwy8YwiRNWlofgBXPOl9B8apKvLUiCPa2hR6g+3GoecmN2T8mPROTXzZNV2nTEDCEWE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17816059955161018.2152512238346; Tue, 16 Jun 2026 03:33:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjs-00089S-FX; Tue, 16 Jun 2026 06:09:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjg-0007hG-9o for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:36 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjc-0003zx-Ee for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:36 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-c85a2c012e5so1467567a12.1 for ; Tue, 16 Jun 2026 03:09:31 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604571; x=1782209371; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cwXK/aS1FTBO6kISF2m2PcFJWpR//ta4VcN+LBq3+sM=; b=Ys5YqOCz0Gg0fUIbqQKXCvNMh2C/p7lv2QOfIQGyeYYNx9MEgmpp7nbp28q8p6+s0K tQZxwWG8iyXoYXNdfBFmY3D5mhNHr7bgi7YZx/t3Tm+nQ8yDwplVA1Kp7r/ahcr/5nRo NKanWB1MX1M+N+0KUXAXIo3F5YOezXGbkD2lgVmpNBMxfMkR31k9WDvqUlKGout0/9BG YmN8WwIlVkCRf9rRffK47+bjURURilhLquZAPoURZY/k54Jp9G0poBM+fBVg4n65kyS9 Nnddy5ZzKd+JMt61Wdp1kbRcIX4oFpV3da/s+zzSJLXpAu+U1lGgFZhr7WpiRh7E8ALx PSQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604571; x=1782209371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=cwXK/aS1FTBO6kISF2m2PcFJWpR//ta4VcN+LBq3+sM=; b=CFqeS3tDDQZF38+9QfVe53qG0CZ4TTZ73z0xb/9qxmBQBSN5dKVFX6S1fuOKcVn/tR ZwSEfiVk9Ul1YGO/EB+bAZKQmrW9BaGMUhXK4Lw0UdpSjFeGvUvcZktbadT9qB+C6qqi D2lEeKWmxlbL7kxxWpAb2eghtlkCTtrVgupbcp6QAzytUPrQc4c00khoEOqDDefxHKyd Upo0wi5Kggi9MKVB+6G/i/pX0FnHteUU0wtO3IpwzCqEXWG/K1Tm4zkQqGaxbVWOlFIW mL4GJVX2kRQUuXMGVp8JAkUUYZfPzQ3MAATea2K28bLDuUphXyDBJCHr0ylHC+srJy52 DxJQ== X-Gm-Message-State: AOJu0Ywe0kPrDEq86ZVWCkFtYW40669WlYIDeYEMa7MrpdZn4tl5vyWU AmzZvp6jSADvF/ht4ggYjkoTX+UxrszMh7Bzqac2UakSQ87t/MFClSbSY/ouKl9n X-Gm-Gg: Acq92OHkzjqAXzt1hVZhK0gsM3OgqE9ISsGKoTXe93wgJTF4+Gb1IR1uUuvedf9nUD9 Yj4qjs/PP9I9N75ZyczTI9TyRVDXWcHR69PmV5oSCjGlt4xBzHuEURzQZ5KDhu+SSFTjH8A6dhc dfZVCI/vjE2kK2mUPwBSieSk3Imrq9if+0Gty97t82FMNMRifL1ZsLoF6LhtZY/FOANud8BeZoM rItspKdoDNCPIQ+eWfz/zUXlKOx6WR6Ra7c1TnB4zcXFHcCLnaTMQyWC12ztjdzX7sVGVhVkZom wijPIgJd8sEmc6ZWTuuGNkwCCt9/l+XkqQ5fFpfnAFPar1aRtqfXmUyqwf0WC9rs5uqoiqcrWaQ PnEwqn6Yfiq2MFKrmAfZnK0X3almJIXEUNqS+cNqKzZlJ7Uf/pbJM/e5P2/nASEfsRvhLkn/N4T VwgF2npPzxd3eNASZZdiW7kd2pnK2cZAR+BZ6P4tt0 X-Received: by 2002:a05:6a21:4e01:b0:3a2:f7bd:a9a5 with SMTP id adf61e73a8af0-3b7e49d0b42mr3133772637.38.1781604570843; Tue, 16 Jun 2026 03:09:30 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Chao Liu , Peng Jiang <3160104094@zju.edu.cn>, Alistair Francis , Nutty Liu Subject: [PULL 67/83] hw/riscv: add k230 board initial support Date: Tue, 16 Jun 2026 20:05:10 +1000 Message-ID: <20260616100527.1939565-68-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=alistair23@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605997150158500 Content-Type: text/plain; charset="utf-8" From: Chao Liu K230 Board compatible with Kendryte K230 SDK. Preliminarily supports the C908 small core, which can run U-Boot and Linux kernels compiled by the K230 SDK. The K230 boot flow provides its device tree from firmware or software. QEMU does not generate a K230 DTB; users can pass one with -dtb for direct Linux boot, or rely on firmware/kernel built-in DTB for other payloads. Signed-off-by: Chao Liu Tested-by: Peng Jiang <3160104094@zju.edu.cn> Acked-by: Alistair Francis Reviewed-by: Nutty Liu Message-ID: Signed-off-by: Alistair Francis --- MAINTAINERS | 7 + include/hw/riscv/k230.h | 145 ++++++++++++ hw/riscv/k230.c | 508 ++++++++++++++++++++++++++++++++++++++++ hw/riscv/Kconfig | 10 + hw/riscv/meson.build | 2 +- 5 files changed, 671 insertions(+), 1 deletion(-) create mode 100644 include/hw/riscv/k230.h create mode 100644 hw/riscv/k230.c diff --git a/MAINTAINERS b/MAINTAINERS index 2b5b581e17..a21796ac6f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1786,6 +1786,13 @@ F: docs/system/riscv/xiangshan-kunminghu.rst F: hw/riscv/xiangshan_kmh.c F: include/hw/riscv/xiangshan_kmh.h =20 +K230 Machines +M: Chao Liu +L: qemu-riscv@nongnu.org +S: Maintained +F: hw/riscv/k230.c +F: include/hw/riscv/k230.h + RX Machines ----------- rx-gdbsim diff --git a/include/hw/riscv/k230.h b/include/hw/riscv/k230.h new file mode 100644 index 0000000000..dcfde39096 --- /dev/null +++ b/include/hw/riscv/k230.h @@ -0,0 +1,145 @@ +/* + * QEMU RISC-V Virt Board Compatible with kendryte K230 SDK + * + * Copyright (c) 2025 Chao Liu + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Provides a board compatible with the kendryte K230 SDK + * + * K230 Technical Reference Manual V0.3.1 (2024-11-18): + * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Tec= hnical_Reference_Manual_V0.3.1_20241118.pdf + * + * For more information, see + */ +#ifndef HW_K230_H +#define HW_K230_H + +#include "hw/core/boards.h" +#include "hw/riscv/riscv_hart.h" + +#define C908_CPU_HARTID (0) + +#define TYPE_RISCV_K230_SOC "riscv.k230.soc" +#define RISCV_K230_SOC(obj) \ + OBJECT_CHECK(K230SoCState, (obj), TYPE_RISCV_K230_SOC) + +typedef struct K230SoCState { + /*< private >*/ + DeviceState parent_obj; + + /*< public >*/ + RISCVHartArrayState c908_cpu; /* Small core */ + + MemoryRegion sram; + MemoryRegion bootrom; + + DeviceState *c908_plic; +} K230SoCState; + +#define TYPE_RISCV_K230_MACHINE MACHINE_TYPE_NAME("k230") +#define RISCV_K230_MACHINE(obj) \ + OBJECT_CHECK(K230MachineState, (obj), TYPE_RISCV_K230_MACHINE) + +typedef struct K230MachineState { + /*< private >*/ + MachineState parent_obj; + + /*< public >*/ + K230SoCState soc; + Notifier machine_done; +} K230MachineState; + +enum { + K230_DEV_DDRC, + K230_DEV_KPU_L2_CACHE, + K230_DEV_SRAM, + K230_DEV_KPU_CFG, + K230_DEV_FFT, + K230_DEV_AI_2D_ENGINE, + K230_DEV_GSDMA, + K230_DEV_DMA, + K230_DEV_DECOMP_GZIP, + K230_DEV_NON_AI_2D, + K230_DEV_ISP, + K230_DEV_DEWARP, + K230_DEV_RX_CSI, + K230_DEV_H264, + K230_DEV_2P5D, + K230_DEV_VO, + K230_DEV_VO_CFG, + K230_DEV_3D_ENGINE, + K230_DEV_PMU, + K230_DEV_RTC, + K230_DEV_CMU, + K230_DEV_RMU, + K230_DEV_BOOT, + K230_DEV_PWR, + K230_DEV_MAILBOX, + K230_DEV_IOMUX, + K230_DEV_TIMER, + K230_DEV_WDT0, + K230_DEV_WDT1, + K230_DEV_TS, + K230_DEV_HDI, + K230_DEV_STC, + K230_DEV_BOOTROM, + K230_DEV_SECURITY, + K230_DEV_UART0, + K230_DEV_UART1, + K230_DEV_UART2, + K230_DEV_UART3, + K230_DEV_UART4, + K230_DEV_I2C0, + K230_DEV_I2C1, + K230_DEV_I2C2, + K230_DEV_I2C3, + K230_DEV_I2C4, + K230_DEV_PWM, + K230_DEV_GPIO0, + K230_DEV_GPIO1, + K230_DEV_ADC, + K230_DEV_CODEC, + K230_DEV_I2S, + K230_DEV_USB0, + K230_DEV_USB1, + K230_DEV_SD0, + K230_DEV_SD1, + K230_DEV_QSPI0, + K230_DEV_QSPI1, + K230_DEV_SPI, + K230_DEV_HI_SYS_CFG, + K230_DEV_DDRC_CFG, + K230_DEV_FLASH, + K230_DEV_PLIC, + K230_DEV_CLINT, +}; + +enum { + /* + * K230 TRM v0.3.1 section 2.4 lists peripheral interrupt bits; SDK + * DTBs expose the corresponding PLIC IDs as bit + 16. + */ + K230_UART0_IRQ =3D 16, + K230_UART1_IRQ =3D 17, + K230_UART2_IRQ =3D 18, + K230_UART3_IRQ =3D 19, + K230_UART4_IRQ =3D 20, +}; + +#define K230_UART_COUNT 5 + +/* + * Integrates with the interrupt controller (PLIC), + * which can process 208 interrupt external sources + */ +#define K230_PLIC_NUM_SOURCES 208 +#define K230_PLIC_NUM_PRIORITIES 7 +#define K230_PLIC_PRIORITY_BASE 0x00 +#define K230_PLIC_PENDING_BASE 0x1000 +#define K230_PLIC_ENABLE_BASE 0x2000 +#define K230_PLIC_ENABLE_STRIDE 0x80 +#define K230_PLIC_CONTEXT_BASE 0x200000 +#define K230_PLIC_CONTEXT_STRIDE 0x1000 + +#endif diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c new file mode 100644 index 0000000000..26d1e20c99 --- /dev/null +++ b/hw/riscv/k230.c @@ -0,0 +1,508 @@ +/* + * QEMU RISC-V Virt Board Compatible with Kendryte K230 SDK + * + * Copyright (c) 2025 Chao Liu + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Provides a board compatible with the Kendryte K230 SDK + * + * K230 Technical Reference Manual V0.3.1 (2024-11-18): + * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Tec= hnical_Reference_Manual_V0.3.1_20241118.pdf + * + * For more information, see + */ + +#include "qemu/osdep.h" +#include "cpu-qom.h" +#include "qemu/cutils.h" +#include "qemu/error-report.h" +#include "qapi/error.h" +#include "system/device_tree.h" +#include "system/system.h" +#include "system/memory.h" +#include "target/riscv/cpu.h" +#include "hw/core/loader.h" +#include "hw/core/sysbus.h" +#include "hw/riscv/k230.h" +#include "hw/riscv/boot.h" +#include "hw/riscv/machines-qom.h" +#include "hw/intc/riscv_aclint.h" +#include "hw/intc/sifive_plic.h" +#include "hw/char/serial-mm.h" +#include "hw/misc/unimp.h" + +/* Align K230_SDK k230_canmv_defconfig */ +#define K230_DIRECT_OPENSBI_ADDR 0x8000000 +#define K230_DIRECT_KERNEL_ADDR 0x8200000 +#define K230_DIRECT_DTB_ADDR 0xa000000 + +static const MemMapEntry memmap[] =3D { + [K230_DEV_DDRC] =3D { 0x00000000, 0x80000000 }, + [K230_DEV_KPU_L2_CACHE] =3D { 0x80000000, 0x00200000 }, + [K230_DEV_SRAM] =3D { 0x80200000, 0x00200000 }, + [K230_DEV_KPU_CFG] =3D { 0x80400000, 0x00000800 }, + [K230_DEV_FFT] =3D { 0x80400800, 0x00000400 }, + [K230_DEV_AI_2D_ENGINE] =3D { 0x80400C00, 0x00000800 }, + [K230_DEV_GSDMA] =3D { 0x80800000, 0x00004000 }, + [K230_DEV_DMA] =3D { 0x80804000, 0x00004000 }, + [K230_DEV_DECOMP_GZIP] =3D { 0x80808000, 0x00004000 }, + [K230_DEV_NON_AI_2D] =3D { 0x8080C000, 0x00004000 }, + [K230_DEV_ISP] =3D { 0x90000000, 0x00008000 }, + [K230_DEV_DEWARP] =3D { 0x90008000, 0x00001000 }, + [K230_DEV_RX_CSI] =3D { 0x90009000, 0x00002000 }, + [K230_DEV_H264] =3D { 0x90400000, 0x00010000 }, + [K230_DEV_2P5D] =3D { 0x90800000, 0x00040000 }, + [K230_DEV_VO] =3D { 0x90840000, 0x00010000 }, + [K230_DEV_VO_CFG] =3D { 0x90850000, 0x00001000 }, + [K230_DEV_3D_ENGINE] =3D { 0x90A00000, 0x00000800 }, + [K230_DEV_PMU] =3D { 0x91000000, 0x00000C00 }, + [K230_DEV_RTC] =3D { 0x91000C00, 0x00000400 }, + [K230_DEV_CMU] =3D { 0x91100000, 0x00001000 }, + [K230_DEV_RMU] =3D { 0x91101000, 0x00001000 }, + [K230_DEV_BOOT] =3D { 0x91102000, 0x00001000 }, + [K230_DEV_PWR] =3D { 0x91103000, 0x00001000 }, + [K230_DEV_MAILBOX] =3D { 0x91104000, 0x00001000 }, + [K230_DEV_IOMUX] =3D { 0x91105000, 0x00000800 }, + [K230_DEV_TIMER] =3D { 0x91105800, 0x00000800 }, + [K230_DEV_WDT0] =3D { 0x91106000, 0x00000800 }, + [K230_DEV_WDT1] =3D { 0x91106800, 0x00000800 }, + [K230_DEV_TS] =3D { 0x91107000, 0x00000800 }, + [K230_DEV_HDI] =3D { 0x91107800, 0x00000800 }, + [K230_DEV_STC] =3D { 0x91108000, 0x00000800 }, + [K230_DEV_BOOTROM] =3D { 0x91200000, 0x00010000 }, + [K230_DEV_SECURITY] =3D { 0x91210000, 0x00008000 }, + [K230_DEV_UART0] =3D { 0x91400000, 0x00001000 }, + [K230_DEV_UART1] =3D { 0x91401000, 0x00001000 }, + [K230_DEV_UART2] =3D { 0x91402000, 0x00001000 }, + [K230_DEV_UART3] =3D { 0x91403000, 0x00001000 }, + [K230_DEV_UART4] =3D { 0x91404000, 0x00001000 }, + [K230_DEV_I2C0] =3D { 0x91405000, 0x00001000 }, + [K230_DEV_I2C1] =3D { 0x91406000, 0x00001000 }, + [K230_DEV_I2C2] =3D { 0x91407000, 0x00001000 }, + [K230_DEV_I2C3] =3D { 0x91408000, 0x00001000 }, + [K230_DEV_I2C4] =3D { 0x91409000, 0x00001000 }, + [K230_DEV_PWM] =3D { 0x9140A000, 0x00001000 }, + [K230_DEV_GPIO0] =3D { 0x9140B000, 0x00001000 }, + [K230_DEV_GPIO1] =3D { 0x9140C000, 0x00001000 }, + [K230_DEV_ADC] =3D { 0x9140D000, 0x00001000 }, + [K230_DEV_CODEC] =3D { 0x9140E000, 0x00001000 }, + [K230_DEV_I2S] =3D { 0x9140F000, 0x00001000 }, + [K230_DEV_USB0] =3D { 0x91500000, 0x00010000 }, + [K230_DEV_USB1] =3D { 0x91540000, 0x00010000 }, + [K230_DEV_SD0] =3D { 0x91580000, 0x00001000 }, + [K230_DEV_SD1] =3D { 0x91581000, 0x00001000 }, + [K230_DEV_QSPI0] =3D { 0x91582000, 0x00001000 }, + [K230_DEV_QSPI1] =3D { 0x91583000, 0x00001000 }, + [K230_DEV_SPI] =3D { 0x91584000, 0x00001000 }, + [K230_DEV_HI_SYS_CFG] =3D { 0x91585000, 0x00000400 }, + [K230_DEV_DDRC_CFG] =3D { 0x98000000, 0x02000000 }, + [K230_DEV_FLASH] =3D { 0xC0000000, 0x08000000 }, + [K230_DEV_PLIC] =3D { 0xF00000000, 0x00400000 }, + [K230_DEV_CLINT] =3D { 0xF04000000, 0x00400000 }, +}; + +static void k230_soc_init(Object *obj) +{ + K230SoCState *s =3D RISCV_K230_SOC(obj); + RISCVHartArrayState *cpu0 =3D &s->c908_cpu; + + object_initialize_child(obj, "c908-cpu", cpu0, TYPE_RISCV_HART_ARRAY); + qdev_prop_set_uint32(DEVICE(cpu0), "hartid-base", 0); + qdev_prop_set_string(DEVICE(cpu0), "cpu-type", TYPE_RISCV_CPU_THEAD_C9= 08); + qdev_prop_set_uint64(DEVICE(cpu0), "resetvec", + memmap[K230_DEV_BOOTROM].base); +} + +static DeviceState *k230_create_plic(int base_hartid, int hartid_count) +{ + g_autofree char *plic_hart_config =3D NULL; + + /* Per-socket PLIC hart topology configuration string */ + plic_hart_config =3D riscv_plic_hart_config_string(hartid_count); + + /* Per-socket PLIC */ + return sifive_plic_create(memmap[K230_DEV_PLIC].base, + plic_hart_config, hartid_count, base_hartid, + K230_PLIC_NUM_SOURCES, + K230_PLIC_NUM_PRIORITIES, + K230_PLIC_PRIORITY_BASE, K230_PLIC_PENDING_B= ASE, + K230_PLIC_ENABLE_BASE, K230_PLIC_ENABLE_STRI= DE, + K230_PLIC_CONTEXT_BASE, + K230_PLIC_CONTEXT_STRIDE, + memmap[K230_DEV_PLIC].size); +} + +static void k230_create_uart(MemoryRegion *sys_mem, DeviceState *plic, + int index) +{ + int uart_dev =3D K230_DEV_UART0 + index; + g_autofree char *name =3D g_strdup_printf("uart%d", index); + + /* Cover the non-16550 part of the SDK's 0x1000 UART window. */ + create_unimplemented_device(name, memmap[uart_dev].base, + memmap[uart_dev].size); + + serial_mm_init(sys_mem, memmap[uart_dev].base, 2, + qdev_get_gpio_in(plic, K230_UART0_IRQ + index), + 399193, serial_hd(index), DEVICE_LITTLE_ENDIAN); +} + +static void k230_soc_realize(DeviceState *dev, Error **errp) +{ + K230SoCState *s =3D RISCV_K230_SOC(dev); + MemoryRegion *sys_mem =3D get_system_memory(); + int c908_cpus; + + sysbus_realize(SYS_BUS_DEVICE(&s->c908_cpu), &error_fatal); + + c908_cpus =3D s->c908_cpu.num_harts; + + /* SRAM */ + memory_region_init_ram(&s->sram, OBJECT(dev), "sram", + memmap[K230_DEV_SRAM].size, &error_fatal); + memory_region_add_subregion(sys_mem, memmap[K230_DEV_SRAM].base, + &s->sram); + + /* BootROM */ + memory_region_init_rom(&s->bootrom, OBJECT(dev), "bootrom", + memmap[K230_DEV_BOOTROM].size, &error_fatal); + memory_region_add_subregion(sys_mem, memmap[K230_DEV_BOOTROM].base, + &s->bootrom); + + /* PLIC */ + s->c908_plic =3D k230_create_plic(C908_CPU_HARTID, c908_cpus); + + /* CLINT */ + riscv_aclint_swi_create(memmap[K230_DEV_CLINT].base, + C908_CPU_HARTID, c908_cpus, false); + riscv_aclint_mtimer_create(memmap[K230_DEV_CLINT].base + 0x4000, + RISCV_ACLINT_DEFAULT_MTIMER_SIZE, + C908_CPU_HARTID, c908_cpus, + RISCV_ACLINT_DEFAULT_MTIMECMP, + RISCV_ACLINT_DEFAULT_MTIME, + RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, true); + + /* UART */ + for (int i =3D 0; i < K230_UART_COUNT; i++) { + k230_create_uart(sys_mem, DEVICE(s->c908_plic), i); + } + + /* unimplemented devices */ + create_unimplemented_device("kpu.l2-cache", + memmap[K230_DEV_KPU_L2_CACHE].base, + memmap[K230_DEV_KPU_L2_CACHE].size); + + create_unimplemented_device("kpu_cfg", memmap[K230_DEV_KPU_CFG].base, + memmap[K230_DEV_KPU_CFG].size); + + create_unimplemented_device("fft", memmap[K230_DEV_FFT].base, + memmap[K230_DEV_FFT].size); + + create_unimplemented_device("2d-engine.ai", + memmap[K230_DEV_AI_2D_ENGINE].base, + memmap[K230_DEV_AI_2D_ENGINE].size); + + create_unimplemented_device("gsdma", memmap[K230_DEV_GSDMA].base, + memmap[K230_DEV_GSDMA].size); + + create_unimplemented_device("dma", memmap[K230_DEV_DMA].base, + memmap[K230_DEV_DMA].size); + + create_unimplemented_device("decomp-gzip", + memmap[K230_DEV_DECOMP_GZIP].base, + memmap[K230_DEV_DECOMP_GZIP].size); + + create_unimplemented_device("2d-engine.non-ai", + memmap[K230_DEV_NON_AI_2D].base, + memmap[K230_DEV_NON_AI_2D].size); + + create_unimplemented_device("isp", memmap[K230_DEV_ISP].base, + memmap[K230_DEV_ISP].size); + + create_unimplemented_device("dewarp", memmap[K230_DEV_DEWARP].base, + memmap[K230_DEV_DEWARP].size); + + create_unimplemented_device("rx-csi", memmap[K230_DEV_RX_CSI].base, + memmap[K230_DEV_RX_CSI].size); + + create_unimplemented_device("vpu", memmap[K230_DEV_H264].base, + memmap[K230_DEV_H264].size); + + create_unimplemented_device("gpu", memmap[K230_DEV_2P5D].base, + memmap[K230_DEV_2P5D].size); + + create_unimplemented_device("vo", memmap[K230_DEV_VO].base, + memmap[K230_DEV_VO].size); + + create_unimplemented_device("vo_cfg", memmap[K230_DEV_VO_CFG].base, + memmap[K230_DEV_VO_CFG].size); + + create_unimplemented_device("3d-engine", memmap[K230_DEV_3D_ENGINE].ba= se, + memmap[K230_DEV_3D_ENGINE].size); + + create_unimplemented_device("pmu", memmap[K230_DEV_PMU].base, + memmap[K230_DEV_PMU].size); + + create_unimplemented_device("rtc", memmap[K230_DEV_RTC].base, + memmap[K230_DEV_RTC].size); + + create_unimplemented_device("cmu", memmap[K230_DEV_CMU].base, + memmap[K230_DEV_CMU].size); + + create_unimplemented_device("rmu", memmap[K230_DEV_RMU].base, + memmap[K230_DEV_RMU].size); + + create_unimplemented_device("boot", memmap[K230_DEV_BOOT].base, + memmap[K230_DEV_BOOT].size); + + create_unimplemented_device("pwr", memmap[K230_DEV_PWR].base, + memmap[K230_DEV_PWR].size); + + create_unimplemented_device("ipcm", memmap[K230_DEV_MAILBOX].base, + memmap[K230_DEV_MAILBOX].size); + + create_unimplemented_device("iomux", memmap[K230_DEV_IOMUX].base, + memmap[K230_DEV_IOMUX].size); + + create_unimplemented_device("timer", memmap[K230_DEV_TIMER].base, + memmap[K230_DEV_TIMER].size); + + create_unimplemented_device("wdt0", memmap[K230_DEV_WDT0].base, + memmap[K230_DEV_WDT0].size); + + create_unimplemented_device("wdt1", memmap[K230_DEV_WDT1].base, + memmap[K230_DEV_WDT1].size); + + create_unimplemented_device("ts", memmap[K230_DEV_TS].base, + memmap[K230_DEV_TS].size); + + create_unimplemented_device("hdi", memmap[K230_DEV_HDI].base, + memmap[K230_DEV_HDI].size); + + create_unimplemented_device("stc", memmap[K230_DEV_STC].base, + memmap[K230_DEV_STC].size); + + create_unimplemented_device("security", memmap[K230_DEV_SECURITY].base, + memmap[K230_DEV_SECURITY].size); + + create_unimplemented_device("i2c0", memmap[K230_DEV_I2C0].base, + memmap[K230_DEV_I2C0].size); + + create_unimplemented_device("i2c1", memmap[K230_DEV_I2C1].base, + memmap[K230_DEV_I2C1].size); + + create_unimplemented_device("i2c2", memmap[K230_DEV_I2C2].base, + memmap[K230_DEV_I2C2].size); + + create_unimplemented_device("i2c3", memmap[K230_DEV_I2C3].base, + memmap[K230_DEV_I2C3].size); + + create_unimplemented_device("i2c4", memmap[K230_DEV_I2C4].base, + memmap[K230_DEV_I2C4].size); + + create_unimplemented_device("pwm", memmap[K230_DEV_PWM].base, + memmap[K230_DEV_PWM].size); + + create_unimplemented_device("gpio0", memmap[K230_DEV_GPIO0].base, + memmap[K230_DEV_GPIO0].size); + + create_unimplemented_device("gpio1", memmap[K230_DEV_GPIO1].base, + memmap[K230_DEV_GPIO1].size); + + create_unimplemented_device("adc", memmap[K230_DEV_ADC].base, + memmap[K230_DEV_ADC].size); + + create_unimplemented_device("codec", memmap[K230_DEV_CODEC].base, + memmap[K230_DEV_CODEC].size); + + create_unimplemented_device("i2s", memmap[K230_DEV_I2S].base, + memmap[K230_DEV_I2S].size); + + create_unimplemented_device("usb0", memmap[K230_DEV_USB0].base, + memmap[K230_DEV_USB0].size); + + create_unimplemented_device("usb1", memmap[K230_DEV_USB1].base, + memmap[K230_DEV_USB1].size); + + create_unimplemented_device("sd0", memmap[K230_DEV_SD0].base, + memmap[K230_DEV_SD0].size); + + create_unimplemented_device("sd1", memmap[K230_DEV_SD1].base, + memmap[K230_DEV_SD1].size); + + create_unimplemented_device("qspi0", memmap[K230_DEV_QSPI0].base, + memmap[K230_DEV_QSPI0].size); + + create_unimplemented_device("qspi1", memmap[K230_DEV_QSPI1].base, + memmap[K230_DEV_QSPI1].size); + + create_unimplemented_device("spi", memmap[K230_DEV_SPI].base, + memmap[K230_DEV_SPI].size); + + create_unimplemented_device("hi_sys_cfg", memmap[K230_DEV_HI_SYS_CFG].= base, + memmap[K230_DEV_HI_SYS_CFG].size); + + create_unimplemented_device("ddrc_cfg", memmap[K230_DEV_DDRC_CFG].base, + memmap[K230_DEV_DDRC_CFG].size); + + create_unimplemented_device("flash", memmap[K230_DEV_FLASH].base, + memmap[K230_DEV_FLASH].size); +} + +static void k230_soc_class_init(ObjectClass *oc, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + + dc->realize =3D k230_soc_realize; +} + +static const TypeInfo k230_soc_type_info =3D { + .name =3D TYPE_RISCV_K230_SOC, + .parent =3D TYPE_DEVICE, + .instance_size =3D sizeof(K230SoCState), + .instance_init =3D k230_soc_init, + .class_init =3D k230_soc_class_init, +}; + +static void k230_soc_register_types(void) +{ + type_register_static(&k230_soc_type_info); +} + +type_init(k230_soc_register_types) + +static void k230_direct_boot(K230MachineState *s, MachineState *machine) +{ + const char *firmware_name =3D riscv_default_firmware_name(&s->soc.c908= _cpu); + RISCVBootInfo boot_info =3D {0}; + hwaddr start_addr =3D K230_DIRECT_OPENSBI_ADDR; + hwaddr firmware_end_addr =3D 0; + hwaddr kernel_entry =3D 0; + int fdt_size =3D 0; + + if (machine->firmware && !strcmp(machine->firmware, "none")) { + error_report("K230 direct boot requires OpenSBI firmware; omit " + "-bios none or pass OpenSBI with -bios"); + exit(EXIT_FAILURE); + } + + if (!machine->dtb) { + error_report("K230 direct boot requires -dtb"); + exit(EXIT_FAILURE); + } + + machine->fdt =3D load_device_tree(machine->dtb, &fdt_size); + if (!machine->fdt) { + error_report("load_device_tree() failed"); + exit(EXIT_FAILURE); + } + + qemu_fdt_add_path(machine->fdt, "/chosen"); + + riscv_boot_info_init(&boot_info, &s->soc.c908_cpu); + riscv_load_kernel(machine, &boot_info, K230_DIRECT_KERNEL_ADDR, true, = NULL); + kernel_entry =3D boot_info.image_low_addr; + + riscv_load_fdt(K230_DIRECT_DTB_ADDR, machine->fdt); + + firmware_end_addr =3D riscv_find_and_load_firmware(machine, firmware_n= ame, + &start_addr, NULL); + if (firmware_end_addr > K230_DIRECT_KERNEL_ADDR) { + error_report("K230 firmware overlaps kernel address 0x%x", + K230_DIRECT_KERNEL_ADDR); + exit(EXIT_FAILURE); + } + + riscv_setup_rom_reset_vec(machine, &s->soc.c908_cpu, start_addr, + memmap[K230_DEV_BOOTROM].base, + memmap[K230_DEV_BOOTROM].size, kernel_entry, + K230_DIRECT_DTB_ADDR); +} + +static void k230_firmware_boot(K230MachineState *s, MachineState *machine) +{ + const char *firmware_name =3D riscv_default_firmware_name(&s->soc.c908= _cpu); + hwaddr start_addr =3D memmap[K230_DEV_DDRC].base; + + if (machine->dtb || (machine->kernel_cmdline && *machine->kernel_cmdli= ne)) { + error_report("K230 firmware boot does not support -dtb or -append"= ); + exit(EXIT_FAILURE); + } + + riscv_find_and_load_firmware(machine, firmware_name, &start_addr, NULL= ); + + riscv_setup_rom_reset_vec(machine, &s->soc.c908_cpu, start_addr, + memmap[K230_DEV_BOOTROM].base, + memmap[K230_DEV_BOOTROM].size, 0, 0); +} + +static void k230_machine_done(Notifier *notifier, void *data) +{ + K230MachineState *s =3D container_of(notifier, K230MachineState, + machine_done); + MachineState *machine =3D MACHINE(s); + + if (machine->kernel_filename) { + k230_direct_boot(s, machine); + } else { + k230_firmware_boot(s, machine); + } +} + +static void k230_machine_init(MachineState *machine) +{ + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + K230MachineState *s =3D RISCV_K230_MACHINE(machine); + MemoryRegion *sys_mem =3D get_system_memory(); + + if (machine->ram_size < mc->default_ram_size) { + char *sz =3D size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + + /* Initialize SoC */ + object_initialize_child(OBJECT(machine), "soc", &s->soc, + TYPE_RISCV_K230_SOC); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); + + /* Data Memory */ + memory_region_add_subregion(sys_mem, memmap[K230_DEV_DDRC].base, + machine->ram); + + s->machine_done.notify =3D k230_machine_done; + qemu_add_machine_init_done_notifier(&s->machine_done); +} + +static void k230_machine_instance_init(Object *obj) +{ +} + +static void k230_machine_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + + mc->desc =3D "RISC-V Board compatible with Kendryte K230 SDK"; + mc->init =3D k230_machine_init; + mc->default_cpus =3D 1; + mc->default_ram_id =3D "riscv.K230.ram"; /* DDR */ + mc->default_ram_size =3D memmap[K230_DEV_DDRC].size; +} + +static const TypeInfo k230_machine_typeinfo =3D { + .name =3D TYPE_RISCV_K230_MACHINE, + .parent =3D TYPE_MACHINE, + .class_init =3D k230_machine_class_init, + .instance_init =3D k230_machine_instance_init, + .instance_size =3D sizeof(K230MachineState), + .interfaces =3D riscv64_machine_interfaces, +}; + +static void k230_machine_init_register_types(void) +{ + type_register_static(&k230_machine_typeinfo); +} + +type_init(k230_machine_init_register_types) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index 2518b04175..f512ed65ac 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -138,3 +138,13 @@ config MIPS_BOSTON_AIA select RISCV_MIPS_CMGCR select RISCV_MIPS_CPC select RISCV_MIPS_CPS + +config K230 + bool + default y + depends on RISCV64 + select RISCV_ACLINT + select RISCV_APLIC + select RISCV_IMSIC + select SERIAL_MM + select UNIMP diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index 533472e22a..09cf855984 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -14,8 +14,8 @@ riscv_ss.add(when: 'CONFIG_RISCV_IOMMU', if_true: files( 'riscv-iommu.c', 'riscv-iommu-pci.c', 'riscv-iommu-sys.c', 'riscv-iommu-h= pm.c')) riscv_ss.add(when: 'CONFIG_MICROBLAZE_V', if_true: files('microblaze-v-gen= eric.c')) riscv_ss.add(when: 'CONFIG_XIANGSHAN_KUNMINGHU', if_true: files('xiangshan= _kmh.c')) - riscv_ss.add(when: 'CONFIG_RISCV_MIPS_CPS', if_true: files('cps.c')) riscv_ss.add(when: 'CONFIG_MIPS_BOSTON_AIA', if_true: files('boston-aia.c'= )) +riscv_ss.add(when: 'CONFIG_K230', if_true: files('k230.c')) =20 hw_arch +=3D {'riscv': riscv_ss} --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605922; cv=none; d=zohomail.com; s=zohoarc; b=Bs0P0XdVhnLWgqZRr9l7sii4L8gBJ37J8L7osH42JPlC7eSxWs11KNF3Daxdu2GjSNlcE/vrI1IiH1QRZfaeOS3fkwBamtRmobtYjBf+dguwrKYzGmpK27cbeqUkloOUryNKvg0LvZq7oS8vE0tyfLpkCi6GYc4oTtmh4yidpjc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605922; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FGkE009GNow9syyzIXj+mGbpD3051NRC2Q/viPyeNb8=; b=cO0Q+QERTOrsXf/u72gJybzEYUSJAeYgGsAfli89LeRfeq6Bvvq/146RLb8g6F04ZKzX8UdQcM0XHUSEbsYNhRaAv3n+OozB+MODMh6MS6hzQUucIsYv47C7fsxC5P1qwC//EBGT4X7lhNYIwsJFID7LPjBEl/NmZ+LVqTGzLDg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160592205486.21145010909026; Tue, 16 Jun 2026 03:32:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjz-0008Qz-0w; Tue, 16 Jun 2026 06:09:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjk-0007zl-Lz for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:42 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjg-000442-QH for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:39 -0400 Received: by mail-pg1-x52c.google.com with SMTP id 41be03b00d2f7-c858014845aso1731272a12.1 for ; Tue, 16 Jun 2026 03:09:36 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604575; x=1782209375; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FGkE009GNow9syyzIXj+mGbpD3051NRC2Q/viPyeNb8=; b=rZLlkxU8cWiTTNuQXO2Tk8sLW4x1Sn3UuZA2jmqMxnTnuFPlZ7d0Ryh8XbkgmZQ1EZ WkKUFcppxK1nBJ26iOvAyBkqG+2IPVUqAE2jvhIQQCtUwOqvYMv50BldY9mU3BQlBi04 RnJjco5BOWPcK0ibLqWF5pJzQZJNs0q1TEnuzRCMYEGV7zU3hR08ZAJfDk6cTHbyrXI6 r/DW8QQSn78kKqZ6OcqLBs1H9wHEEETsUkGkaBhqAtzKYPHtosKBRUixdIrHgzfUTDjv nbbsad94FvJ8nwKp3AAfXBw1RxY/A9xt5DJkegntZyQBlFi4I0q/uBbbkgxiqGksyGuE T5FQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604575; x=1782209375; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=FGkE009GNow9syyzIXj+mGbpD3051NRC2Q/viPyeNb8=; b=R0i1mVoQRObvBV+eS1rbBExWBJXdzhb6YqGt/2tSfKfr7aMAuSdJ4J65uo5XC4k+0g kuJu4CINhQr0lMj0e6a6xfEOAFGOnCj3JR4Ek84CU0jFNWG1J4t6dxdnLe7bkRMpOl1E QItcPipO5tyGy6x5Mtzg77q9XfneNgPa+EJWSsRYVMPT+TENm0JiL1dxQxayZ29cnn5A mNt4Zl++26tVqsDgUe6T9WBiJhaJUXboVyJNE7ROf/56+3Qh39dSf59jDndP0owGgCUX cK3IoluKOheLgM3wvhon8ySEKhXWpsiY7exmgk58qpOvHWyQKA8pmKc4JyRnNpZ3V4k0 EtMQ== X-Gm-Message-State: AOJu0YxbbaWF71kY80QXnS7L9J3rXLNrRXo45l3ewdYzgKNXo68GkU/g Fd+k9uj05+n+NNNosAWvy/i6TYhAP+VxwQrLpJxcfCJDJG1erEMKYpLcksF3h5Ot X-Gm-Gg: Acq92OHs/AtPXw8trasD0udgLcVmAGxkdmHnAFOjTcfYVe44NrArIr1Y43o9NNefWM6 CNnLBxkWrgjvMNvkZR4ziegdlgvJ7mZwho2ylGOhi0SIAkFJchUerC01nPcC2RQHwtmSq3SZVr0 lM8Nu7J5o27bFkZFyRwWLN5eH0uOpkmXXRatMM2S9SyAjdlTU2XuiFjdjWXBn5vvtXJqMBG+RpI ped1WRlZGjDzIjuQt3Onlt9t4pWT5lqxxs+IVeu0+qLKNMSJqmlr68TS2DioHe5Ym1fD9bAc0Zj eN4FUMITt9VtgcXuAXLGuoAHJcgWqpzdPAjFSs1uFJG55bE9nIsi249bfX0PKGhOh+ZXfpV6qQa W3bdymkpDGZDaPW2uX8uNrQ6vk3RvBU/6RHLgqaMlNusJX85HzJelxqTFTLGthIZgv5RevjONhi 5upZp0pSUhyKdo3NBCS4rW7ESwl2aCtGXyP0LcJn+d X-Received: by 2002:a05:6a21:487:b0:3b4:5ea5:6bc with SMTP id adf61e73a8af0-3b7e2204328mr2796942637.5.1781604575056; Tue, 16 Jun 2026 03:09:35 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Chao Liu , Mig Yang , Chao Liu , Daniel Henrique Barboza , Nutty Liu , Alistair Francis Subject: [PULL 68/83] hw/watchdog: add k230 watchdog initial support Date: Tue, 16 Jun 2026 20:05:11 +1000 Message-ID: <20260616100527.1939565-69-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605924280158501 Content-Type: text/plain; charset="utf-8" From: Chao Liu Add programmable Watchdog Timer (WDT) peripheral for K230 machine. Signed-off-by: Mig Yang Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Reviewed-by: Nutty Liu Message-ID: <805a04d9467556ee6a5f4742c9eb4bbb6fc7898c.1781246408.git.chao.l= iu@processmission.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 2 + include/hw/riscv/k230.h | 4 + include/hw/watchdog/k230_wdt.h | 121 ++++++++++++++ hw/riscv/k230.c | 18 ++ hw/watchdog/k230_wdt.c | 296 +++++++++++++++++++++++++++++++++ hw/riscv/Kconfig | 1 + hw/watchdog/Kconfig | 4 + hw/watchdog/meson.build | 1 + hw/watchdog/trace-events | 9 + 9 files changed, 456 insertions(+) create mode 100644 include/hw/watchdog/k230_wdt.h create mode 100644 hw/watchdog/k230_wdt.c diff --git a/MAINTAINERS b/MAINTAINERS index a21796ac6f..06db33a107 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1791,7 +1791,9 @@ M: Chao Liu L: qemu-riscv@nongnu.org S: Maintained F: hw/riscv/k230.c +F: hw/watchdog/k230_wdt.c F: include/hw/riscv/k230.h +F: include/hw/watchdog/k230_wdt.h =20 RX Machines ----------- diff --git a/include/hw/riscv/k230.h b/include/hw/riscv/k230.h index dcfde39096..592e1c26bf 100644 --- a/include/hw/riscv/k230.h +++ b/include/hw/riscv/k230.h @@ -17,6 +17,7 @@ =20 #include "hw/core/boards.h" #include "hw/riscv/riscv_hart.h" +#include "hw/watchdog/k230_wdt.h" =20 #define C908_CPU_HARTID (0) =20 @@ -31,6 +32,7 @@ typedef struct K230SoCState { /*< public >*/ RISCVHartArrayState c908_cpu; /* Small core */ =20 + K230WdtState wdt[2]; MemoryRegion sram; MemoryRegion bootrom; =20 @@ -125,6 +127,8 @@ enum { K230_UART2_IRQ =3D 18, K230_UART3_IRQ =3D 19, K230_UART4_IRQ =3D 20, + K230_WDT0_IRQ =3D 107, + K230_WDT1_IRQ =3D 108, }; =20 #define K230_UART_COUNT 5 diff --git a/include/hw/watchdog/k230_wdt.h b/include/hw/watchdog/k230_wdt.h new file mode 100644 index 0000000000..ba194abebe --- /dev/null +++ b/include/hw/watchdog/k230_wdt.h @@ -0,0 +1,121 @@ +/* + * K230 Watchdog Timer + * + * K230 Technical Reference Manual V0.3.1 (2024-11-18): + * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Tec= hnical_Reference_Manual_V0.3.1_20241118.pdf + * + * Copyright (c) 2025 Mig Yang + * Copyright (c) 2025 Chao Liu + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef K230_WDT_H +#define K230_WDT_H + +#include "qemu/bitops.h" +#include "hw/core/sysbus.h" +#include "hw/core/irq.h" +#include "hw/core/ptimer.h" +#include "qom/object.h" + +#define TYPE_K230_WDT "riscv.k230.wdt" +OBJECT_DECLARE_SIMPLE_TYPE(K230WdtState, K230_WDT) + +#define K230_WDT_DEFAULT_FREQ (32768) + +/* K230 Watchdog Register Map */ +enum K230WdtRegisters { + K230_WDT_CR =3D 0x00, /* Control Register */ + K230_WDT_TORR =3D 0x04, /* Timeout Range Register */ + K230_WDT_CCVR =3D 0x08, /* Current Counter Value Register */ + K230_WDT_CRR =3D 0x0c, /* Counter Restart Register */ + K230_WDT_STAT =3D 0x10, /* Interrupt Status Register */ + K230_WDT_EOI =3D 0x14, /* Interrupt Clear Register */ + K230_WDT_PROT_LEVEL =3D 0x1c, /* Protection Level Register */ + K230_WDT_COMP_PARAM_5 =3D 0xe4, /* Component Parameters Register 5 */ + K230_WDT_COMP_PARAM_4 =3D 0xe8, /* Component Parameters Register 4 */ + K230_WDT_COMP_PARAM_3 =3D 0xec, /* Component Parameters Register 3 */ + K230_WDT_COMP_PARAM_2 =3D 0xf0, /* Component Parameters Register 2 */ + K230_WDT_COMP_PARAM_1 =3D 0xf4, /* Component Parameters Register 1 */ + K230_WDT_COMP_VERSION =3D 0xf8, /* Component Version Register */ + K230_WDT_COMP_TYPE =3D 0xfc, /* Component Type Register */ +}; + +#define K230_WDT_MMIO_SIZE 0x100 + +/* Control Register (WDT_CR) definitions */ +#define K230_WDT_CR_RPL_MASK 0x7 /* Reset Pulse Length */ +#define K230_WDT_CR_RPL_SHIFT 2 +#define K230_WDT_CR_RMOD BIT(1) /* Response Mode */ +#define K230_WDT_CR_WDT_EN BIT(0) /* Watchdog Enable */ + +/* Reset Pulse Length values */ +#define K230_WDT_RPL_2_CYCLES 0x0 +#define K230_WDT_RPL_4_CYCLES 0x1 +#define K230_WDT_RPL_8_CYCLES 0x2 +#define K230_WDT_RPL_16_CYCLES 0x3 +#define K230_WDT_RPL_32_CYCLES 0x4 +#define K230_WDT_RPL_64_CYCLES 0x5 +#define K230_WDT_RPL_128_CYCLES 0x6 +#define K230_WDT_RPL_256_CYCLES 0x7 + +/* Timeout Range Register (WDT_TORR) definitions */ +#define K230_WDT_TORR_TOP_MASK 0xf /* Timeout Period */ + +/* Interrupt Status Register (WDT_STAT) definitions */ +#define K230_WDT_STAT_INT BIT(0) /* Interrupt Status */ + +/* Counter Restart Register (WDT_CRR) magic value */ +#define K230_WDT_CRR_RESTART 0x76 /* Restart command */ + +/* Component Parameters Register 1 (WDT_COMP_PARAM_1) definitions */ +#define K230_WDT_CNT_WIDTH_MASK 0x1f000000 /* Counter Width */ +#define K230_WDT_CNT_WIDTH_SHIFT 24 +#define K230_WDT_DFLT_TOP_INIT_MASK 0xf00000 /* Default Initial Timeout */ +#define K230_WDT_DFLT_TOP_INIT_SHIFT 20 +#define K230_WDT_DFLT_TOP_MASK 0xf0000 /* Default Timeout */ +#define K230_WDT_DFLT_TOP_SHIFT 16 +#define K230_WDT_DFLT_RPL_MASK 0x7 /* Default Reset Pulse Length */ +#define K230_WDT_DFLT_RPL_SHIFT 10 +#define K230_WDT_APB_DATA_WIDTH_MASK 0x3 /* APB Data Width */ +#define K230_WDT_APB_DATA_WIDTH_SHIFT 8 +#define K230_WDT_USE_FIX_TOP BIT(6) /* Use Fixed Timeout Values */ +#define K230_WDT_HC_TOP BIT(5) /* Hard-coded Timeout */ +#define K230_WDT_HC_RPL BIT(4) /* Hard-coded Reset Pulse Lengt= h */ +#define K230_WDT_HC_RMOD BIT(3) /* Hard-coded Response Mode */ +#define K230_WDT_DUAL_TOP BIT(2) /* Dual Timeout Period */ +#define K230_WDT_DFLT_RMOD BIT(1) /* Default Response Mode */ +#define K230_WDT_ALWAYS_EN BIT(0) /* Always Enabled */ + +/* Component Type Register value */ +#define K230_WDT_COMP_TYPE_VAL 0x44570120 + +/* Component Version Register value */ +#define K230_WDT_COMP_VERSION_VAL 0x3131302a /* "110*" */ + +struct K230WdtState { + /* */ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion mmio; + qemu_irq irq; + + struct ptimer_state *timer; + + /* Register state */ + uint32_t cr; /* Control Register */ + uint32_t torr; /* Timeout Range Register */ + uint32_t ccvr; /* Current Counter Value Register */ + uint32_t stat; /* Interrupt Status Register */ + uint32_t prot_level; /* Protection Level Register */ + + /* Internal state */ + bool interrupt_pending; + bool enabled; + uint32_t timeout_value; + uint32_t current_count; +}; + +#endif /* K230_WDT_H */ diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c index 26d1e20c99..502281c52c 100644 --- a/hw/riscv/k230.c +++ b/hw/riscv/k230.c @@ -108,6 +108,9 @@ static void k230_soc_init(Object *obj) RISCVHartArrayState *cpu0 =3D &s->c908_cpu; =20 object_initialize_child(obj, "c908-cpu", cpu0, TYPE_RISCV_HART_ARRAY); + object_initialize_child(obj, "k230-wdt0", &s->wdt[0], TYPE_K230_WDT); + object_initialize_child(obj, "k230-wdt1", &s->wdt[1], TYPE_K230_WDT); + qdev_prop_set_uint32(DEVICE(cpu0), "hartid-base", 0); qdev_prop_set_string(DEVICE(cpu0), "cpu-type", TYPE_RISCV_CPU_THEAD_C9= 08); qdev_prop_set_uint64(DEVICE(cpu0), "resetvec", @@ -188,6 +191,21 @@ static void k230_soc_realize(DeviceState *dev, Error *= *errp) k230_create_uart(sys_mem, DEVICE(s->c908_plic), i); } =20 + /* Watchdog */ + for (int i =3D 0; i < 2; i++) { + if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) { + return; + } + } + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[0]), 0, memmap[K230_DEV_WDT0].b= ase); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[0]), 0, + qdev_get_gpio_in(DEVICE(s->c908_plic), K230_WDT0_IR= Q)); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[1]), 0, memmap[K230_DEV_WDT1].b= ase); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[1]), 0, + qdev_get_gpio_in(DEVICE(s->c908_plic), K230_WDT1_IR= Q)); + /* unimplemented devices */ create_unimplemented_device("kpu.l2-cache", memmap[K230_DEV_KPU_L2_CACHE].base, diff --git a/hw/watchdog/k230_wdt.c b/hw/watchdog/k230_wdt.c new file mode 100644 index 0000000000..1f83b499e8 --- /dev/null +++ b/hw/watchdog/k230_wdt.c @@ -0,0 +1,296 @@ +/* + * K230 Watchdog Compatible with kendryte K230 SDK + * + * Copyright (c) 2025 Mig Yang + * Copyright (c) 2025 Chao Liu + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Provides a board compatible with the kendryte K230 SDK + * + * K230 Technical Reference Manual V0.3.1 (2024-11-18): + * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Tec= hnical_Reference_Manual_V0.3.1_20241118.pdf + * + * For more information, see + */ +#include "qemu/osdep.h" +#include "qemu/bitops.h" +#include "qemu/module.h" +#include "system/watchdog.h" +#include "migration/vmstate.h" +#include "hw/core/qdev-properties.h" +#include "hw/watchdog/k230_wdt.h" +#include "trace.h" + +static void k230_wdt_timeout(void *opaque) +{ + K230WdtState *s =3D K230_WDT(opaque); + + trace_k230_wdt_timeout(); + + /* Set interrupt status if in interrupt mode */ + if (s->cr & K230_WDT_CR_RMOD) { + s->stat |=3D K230_WDT_STAT_INT; + s->interrupt_pending =3D true; + qemu_set_irq(s->irq, 1); + trace_k230_wdt_interrupt(); + } else { + /* Direct reset mode */ + trace_k230_wdt_reset(); + watchdog_perform_action(); + } + + /* Restart counter */ + s->current_count =3D s->timeout_value; + ptimer_set_count(s->timer, s->current_count); + ptimer_run(s->timer, 1); +} + +static void k230_wdt_reset(DeviceState *dev) +{ + K230WdtState *s =3D K230_WDT(dev); + + trace_k230_wdt_reset_device(); + + ptimer_transaction_begin(s->timer); + ptimer_stop(s->timer); + ptimer_transaction_commit(s->timer); + + /* Reset registers to default values */ + s->cr =3D 0; + s->torr =3D 0; + s->ccvr =3D 0xFFFFFFFF; + s->stat =3D 0; + s->prot_level =3D 0x2; + + s->interrupt_pending =3D false; + s->enabled =3D false; + s->timeout_value =3D 0; + s->current_count =3D 0xFFFFFFFF; +} + +static uint64_t k230_wdt_read(void *opaque, hwaddr addr, unsigned int size) +{ + K230WdtState *s =3D K230_WDT(opaque); + uint32_t value =3D 0; + + switch (addr) { + case K230_WDT_CR: + value =3D s->cr; + break; + case K230_WDT_TORR: + value =3D s->torr; + break; + case K230_WDT_CCVR: + if (s->enabled) { + value =3D ptimer_get_count(s->timer); + } else { + value =3D s->current_count; + } + break; + case K230_WDT_STAT: + value =3D s->stat; + break; + case K230_WDT_PROT_LEVEL: + value =3D s->prot_level; + break; + case K230_WDT_COMP_PARAM_5: + value =3D 0; /* Upper limit of Timeout Period parameters */ + break; + case K230_WDT_COMP_PARAM_4: + value =3D 0; /* Upper limit of Initial Timeout Period parameters */ + break; + case K230_WDT_COMP_PARAM_3: + value =3D 0; /* Derived from WDT_TOP_RST parameter */ + break; + case K230_WDT_COMP_PARAM_2: + value =3D 0xFFFFFFFF; /* Derived from WDT_RST_CNT parameter */ + break; + case K230_WDT_COMP_PARAM_1: + /* Component parameters */ + value =3D (32 << K230_WDT_CNT_WIDTH_SHIFT) | /* 32-bit counter */ + (0 << K230_WDT_DFLT_TOP_INIT_SHIFT) | + (0 << K230_WDT_DFLT_TOP_SHIFT) | + (K230_WDT_RPL_16_CYCLES << K230_WDT_DFLT_RPL_SHIFT) | + (2 << K230_WDT_APB_DATA_WIDTH_SHIFT) | /* 32-bit APB */ + K230_WDT_USE_FIX_TOP; /* Use fixed timeout values */ + break; + case K230_WDT_COMP_VERSION: + value =3D K230_WDT_COMP_VERSION_VAL; + break; + case K230_WDT_COMP_TYPE: + value =3D K230_WDT_COMP_TYPE_VAL; + break; + default: + /* Other registers return 0 */ + break; + } + + trace_k230_wdt_read(addr, value); + return value; +} + +static void k230_wdt_update_timer(K230WdtState *s) +{ + ptimer_transaction_begin(s->timer); + + if (s->enabled && s->timeout_value > 0) { + ptimer_set_count(s->timer, s->current_count); + ptimer_run(s->timer, 1); + } else { + ptimer_stop(s->timer); + } + + ptimer_transaction_commit(s->timer); +} + +static uint32_t k230_wdt_calculate_timeout(uint32_t top_value) +{ + /* Calculate timeout based on TOP value */ + /* For fixed timeout mode: 2^(16 + top_value) */ + if (top_value <=3D 15) { + return 1 << (16 + top_value); + } + return 1 << 31; /* Maximum value for 32-bit counter */ +} + +static void k230_wdt_write(void *opaque, hwaddr addr, + uint64_t value, unsigned int size) +{ + K230WdtState *s =3D K230_WDT(opaque); + + trace_k230_wdt_write(addr, value); + + switch (addr) { + case K230_WDT_CR: + s->cr =3D value & (K230_WDT_CR_RPL_MASK << K230_WDT_CR_RPL_SHIFT | + K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN); + + /* Update enabled state */ + s->enabled =3D (s->cr & K230_WDT_CR_WDT_EN) !=3D 0; + + /* Update timer */ + k230_wdt_update_timer(s); + break; + + case K230_WDT_TORR: + s->torr =3D value & K230_WDT_TORR_TOP_MASK; + + /* Calculate new timeout value */ + s->timeout_value =3D k230_wdt_calculate_timeout(s->torr); + s->current_count =3D s->timeout_value; + + /* Update timer if enabled */ + if (s->enabled) { + k230_wdt_update_timer(s); + } + break; + + case K230_WDT_CRR: + /* Restart counter with magic value 0x76 */ + if ((value & 0xFF) =3D=3D K230_WDT_CRR_RESTART) { + trace_k230_wdt_restart(); + s->current_count =3D s->timeout_value; + + /* Clear interrupt if pending */ + if (s->interrupt_pending) { + s->stat &=3D ~K230_WDT_STAT_INT; + s->interrupt_pending =3D false; + qemu_set_irq(s->irq, 0); + } + + /* Update timer */ + k230_wdt_update_timer(s); + } + break; + + case K230_WDT_EOI: + /* Clear interrupt */ + s->stat &=3D ~K230_WDT_STAT_INT; + s->interrupt_pending =3D false; + qemu_set_irq(s->irq, 0); + break; + + case K230_WDT_PROT_LEVEL: + s->prot_level =3D value & 0x7; + break; + + default: + /* Read-only registers, ignore writes */ + break; + } +} + +static const MemoryRegionOps k230_wdt_ops =3D { + .read =3D k230_wdt_read, + .write =3D k230_wdt_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + .unaligned =3D false, + }, +}; + +static const VMStateDescription vmstate_k230_wdt =3D { + .name =3D "k230.wdt", + .fields =3D (const VMStateField[]) { + VMSTATE_PTIMER(timer, K230WdtState), + VMSTATE_UINT32(cr, K230WdtState), + VMSTATE_UINT32(torr, K230WdtState), + VMSTATE_UINT32(ccvr, K230WdtState), + VMSTATE_UINT32(stat, K230WdtState), + VMSTATE_UINT32(prot_level, K230WdtState), + VMSTATE_BOOL(interrupt_pending, K230WdtState), + VMSTATE_BOOL(enabled, K230WdtState), + VMSTATE_UINT32(timeout_value, K230WdtState), + VMSTATE_UINT32(current_count, K230WdtState), + VMSTATE_END_OF_LIST() + } +}; + +static void k230_wdt_realize(DeviceState *dev, Error **errp) +{ + K230WdtState *s =3D K230_WDT(dev); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); + + memory_region_init_io(&s->mmio, OBJECT(dev), + &k230_wdt_ops, s, + TYPE_K230_WDT, + K230_WDT_MMIO_SIZE); + sysbus_init_mmio(sbd, &s->mmio); + sysbus_init_irq(sbd, &s->irq); + + s->timer =3D ptimer_init(k230_wdt_timeout, s, + PTIMER_POLICY_NO_IMMEDIATE_TRIGGER | + PTIMER_POLICY_NO_IMMEDIATE_RELOAD | + PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); + + ptimer_transaction_begin(s->timer); + ptimer_set_freq(s->timer, K230_WDT_DEFAULT_FREQ); + ptimer_transaction_commit(s->timer); +} + +static void k230_wdt_class_init(ObjectClass *klass, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D k230_wdt_realize; + device_class_set_legacy_reset(dc, k230_wdt_reset); + dc->vmsd =3D &vmstate_k230_wdt; + dc->desc =3D "K230 watchdog timer"; + set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories); +} + +static const TypeInfo k230_wdt_info =3D { + .name =3D TYPE_K230_WDT, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(K230WdtState), + .class_init =3D k230_wdt_class_init, +}; + +static void k230_wdt_register_type(void) +{ + type_register_static(&k230_wdt_info); +} +type_init(k230_wdt_register_type) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index f512ed65ac..54e41a6afc 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -148,3 +148,4 @@ config K230 select RISCV_IMSIC select SERIAL_MM select UNIMP + select K230_WDT diff --git a/hw/watchdog/Kconfig b/hw/watchdog/Kconfig index 861fd00334..55f77c5c84 100644 --- a/hw/watchdog/Kconfig +++ b/hw/watchdog/Kconfig @@ -18,6 +18,10 @@ config WDT_DIAG288 config WDT_IMX2 bool =20 +config K230_WDT + bool + select PTIMER + config WDT_SBSA bool =20 diff --git a/hw/watchdog/meson.build b/hw/watchdog/meson.build index 15370565bd..5edae65a36 100644 --- a/hw/watchdog/meson.build +++ b/hw/watchdog/meson.build @@ -6,5 +6,6 @@ system_ss.add(when: 'CONFIG_WDT_IB700', if_true: files('wdt= _ib700.c')) system_ss.add(when: 'CONFIG_WDT_DIAG288', if_true: files('wdt_diag288.c')) system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('wdt_aspeed.c')) system_ss.add(when: 'CONFIG_WDT_IMX2', if_true: files('wdt_imx2.c')) +system_ss.add(when: 'CONFIG_K230_WDT', if_true: files('k230_wdt.c')) system_ss.add(when: 'CONFIG_WDT_SBSA', if_true: files('sbsa_gwdt.c')) specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_watchdog.c')) diff --git a/hw/watchdog/trace-events b/hw/watchdog/trace-events index ad3be1e9bd..d85b3ca769 100644 --- a/hw/watchdog/trace-events +++ b/hw/watchdog/trace-events @@ -33,3 +33,12 @@ spapr_watchdog_expired(uint64_t num, unsigned action) "n= um=3D%" PRIu64 " action=3D%u # watchdog.c watchdog_perform_action(unsigned int action) "action=3D%u" watchdog_set_action(unsigned int action) "action=3D%u" + +# k230_wdt.c +k230_wdt_read(uint64_t addr, uint32_t data) "K230 WDT read: [0x%" PRIx64 "= ] -> 0x%" PRIx32 +k230_wdt_write(uint64_t addr, uint64_t data) "K230 WDT write: [0x%" PRIx64= "] <- 0x%" PRIx64 +k230_wdt_timeout(void) "K230 WDT timeout" +k230_wdt_interrupt(void) "K230 WDT interrupt" +k230_wdt_reset(void) "K230 WDT system reset" +k230_wdt_restart(void) "K230 WDT restart" +k230_wdt_reset_device(void) "K230 WDT device reset" --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605583; cv=none; d=zohomail.com; s=zohoarc; b=hFawfdtensxppbYifUET07rrlEmKo8twswGSzw44LcoH9wx9gxAk4CcbHX6i9qC3E8LiiTmmZsC4924Ejxo9FdR2aEqmjINNdFK4rnXdc41pNTcMORdRWawxbg6JyC0qn757euaW6oEy1NFoDGtB0nSbdODCYIUUav29c71dgUI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605583; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=1dFVnvk10tuyBMWh235Wzy1/QPc1OV61/YleBsrVbHU=; b=PMvFc+mvowA7300JTCk6+MxZ6l88/6G67rHd4d8sK/JkuiBHKEGUXfGgDjJVYinzVWM6mZd9AUSwYX3Q0h7Ms6ijiSicBI2LWVrw9C37RWZPEqavZpt/J1u/vVppqR7UJf/uSTqQlr2Wi7fZRAL7Vo46HYwJ3sgK4vcCU3IvJAo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160558310931.238132042093753; Tue, 16 Jun 2026 03:26:23 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQjy-0008L7-K3; Tue, 16 Jun 2026 06:09:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjn-00081Y-8Y for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:44 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjk-000454-VW for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:43 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-c858014845aso1731293a12.1 for ; Tue, 16 Jun 2026 03:09:40 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604579; x=1782209379; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1dFVnvk10tuyBMWh235Wzy1/QPc1OV61/YleBsrVbHU=; b=mBKe0IYmBRERVR5LABzfLkJTJ+tXXKq7K360zQb2ubMvs/dfdJK9SuZjgm/cAMpPCJ ZlAbIQ+ZUHhO94ItbfLN+DV1tKffzBXlVKENRTFX/l/wU8zvi2xQCR0SrthtphHcxOkd CI+MMt2HQe3A5UGlo0ZpIL+AMxntXRFbrKCZWbH3jumt4CmIogjvpEKf0I+Lrp4oqaU1 KYobwG/7m+1hS8u3USOxd0Lgvx31BvMgV36kRr6UTrO30FbhfUrobhZjB5kBj5MBdBB7 MhU374RqRhPx48sLvlKJO0uqdGBrzNFfeDLKjBhqBvkEuZ++PDkKKvK0Ml6QMDHXxdwy K+GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604579; x=1782209379; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=1dFVnvk10tuyBMWh235Wzy1/QPc1OV61/YleBsrVbHU=; b=oxpl9pW9qZGiucvWMSxCeL7BdDP7X9clpgOgPAWDAdUbNnvdSLuTIOsCGTO9uJLtOO PO3k6SXeswOrBIbrgQYvLpfoPAeHqluq0cDX1aBH6KMc4Ytk4AgdYZ2Pw2GqWudtRoL8 +zGza7HI+1qoMAIE1U5ANJi6VPwfNrw6PEqbunmNARybsTC5BSQc/K00V6raeyufqRsD owFsApxthPWyckgaaY9TUgayZEMfdcMd5uOhldj09saRCmlG/qTu4bwzy8Gcc5IzavAf rHvQ3veLLWWgfciJP/UZ/qULjn06wR+sM+/MPQ3XNSjGfbRJJaueuhqzhKVnUuJFZyIT Qj1Q== X-Gm-Message-State: AOJu0YzLOgE5Ti52oDHOvwtFII/lRyF8afqpSglecUxBz0kFq2cvxMaq 8AQP/XSqgu2SPRaLycTfPy9Ahk9uaPncag3DYKZcTlQ1MEJriQcUVCTf416TLD+o X-Gm-Gg: Acq92OFkPMhoAlOya/D8756dMGSHqTK5qKbnhCE2nmLa8jgI0SOWkKy0S8RXaOePUPj doaFinJV+EnzKHhdreK2Vy39zKLaKzsSllWm+1/ocMOnmRLcjuMJXoe0XGmGBEzG/QXgixaMoGF vkEiMyJWZArxHSY+bGHjuDnf7DTNsUyLAJv4QVyGoYD5G/DM6volnejQ1JuB0dEIR0AzGKo9ZXQ kd6jnFPVkBrqFcHU0R91ZJNSggFoMSQLe2QUQVv92zAHieQEa7kMxPrQCBfYvy9ZJ1mKi4384yg ST8TpCBJdUvZJFz5ThrUNRr56DPNStnEm8D2ofzKKIssMDo8KMhPvX3wDeBSYSyXlwn9RgtycoI GEX0thlbQmkcPa2owjmkvHV/LGsdNE1J9P7hNKlCrVVwofMhjh08M2sz2ypjTmXo1IJOFVI2vsU x7FY+YPaAgAF5+es9yFvVi0/pSJeLSyVOEGhoBT/0F X-Received: by 2002:a05:6a20:d817:b0:3b5:6b5a:4f31 with SMTP id adf61e73a8af0-3b7e24e1f45mr2759986637.27.1781604579584; Tue, 16 Jun 2026 03:09:39 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Chao Liu , Mig Yang , Daniel Henrique Barboza , Fabiano Rosas , Chao Liu , Nutty Liu , Alistair Francis Subject: [PULL 69/83] tests/qtest: add test for K230 watchdog Date: Tue, 16 Jun 2026 20:05:12 +1000 Message-ID: <20260616100527.1939565-70-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=alistair23@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605583903158500 Content-Type: text/plain; charset="utf-8" From: Chao Liu Testing the Basic Functions of K230 WDT: 1. Reset Function 2. Timeout Check 3. Interrupt Function Signed-off-by: Mig Yang Reviewed-by: Daniel Henrique Barboza Acked-by: Fabiano Rosas Signed-off-by: Chao Liu Reviewed-by: Nutty Liu Message-ID: <791beb1d8db07e4d1011cbeb4a8ac3add5b24f09.1781246408.git.chao.l= iu@processmission.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 1 + tests/qtest/k230-wdt-test.c | 189 ++++++++++++++++++++++++++++++++++++ tests/qtest/meson.build | 3 +- 3 files changed, 192 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/k230-wdt-test.c diff --git a/MAINTAINERS b/MAINTAINERS index 06db33a107..44654b5798 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1794,6 +1794,7 @@ F: hw/riscv/k230.c F: hw/watchdog/k230_wdt.c F: include/hw/riscv/k230.h F: include/hw/watchdog/k230_wdt.h +F: tests/qtest/k230-wdt-test.c =20 RX Machines ----------- diff --git a/tests/qtest/k230-wdt-test.c b/tests/qtest/k230-wdt-test.c new file mode 100644 index 0000000000..c8eaeaf1ae --- /dev/null +++ b/tests/qtest/k230-wdt-test.c @@ -0,0 +1,189 @@ +/* + * QTest testcase for K230 Watchdog + * + * Copyright (c) 2025 Mig Yang + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Provides a board compatible with the kendryte K230 SDK + * + * K230 Technical Reference Manual V0.3.1 (2024-11-18): + * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Tec= hnical_Reference_Manual_V0.3.1_20241118.pdf + * + * For more information, see + */ + +#include "qemu/osdep.h" +#include "qemu/timer.h" +#include "qemu/bitops.h" +#include "libqtest.h" +#include "hw/watchdog/k230_wdt.h" + +/* K230 WDT0 base address */ +#define K230_WDT0_BASE 0x91106000 +#define K230_WDT1_BASE 0x91106800 + +/* Test WDT0 by default */ +#define WDT_BASE K230_WDT0_BASE + +static void test_register_read_write(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + /* Test Control Register (CR) read/write */ + qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0xFFFFFFFF); + g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_CR), =3D=3D, + (K230_WDT_CR_RPL_MASK << K230_WDT_CR_RPL_SHIFT) | + K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN); + + /* Test Timeout Range Register (TORR) read/write */ + qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0xFFFFFFFF); + g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_TORR), =3D=3D, + K230_WDT_TORR_TOP_MASK); + + /* Test Protection Level Register read/write */ + qtest_writel(qts, WDT_BASE + K230_WDT_PROT_LEVEL, 0xFFFFFFFF); + g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_PROT_LEVEL), =3D= =3D, 0x7); + + qtest_quit(qts); +} + +static void test_counter_restart(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + /* Enable watchdog and set timeout */ + qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN); + qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x5); /* TOP =3D 5 */ + + /* Read current counter value */ + uint32_t initial_count =3D qtest_readl(qts, WDT_BASE + K230_WDT_CCVR); + g_assert_cmpuint(initial_count, >, 0); + + /* Restart counter with magic value */ + qtest_writel(qts, WDT_BASE + K230_WDT_CRR, K230_WDT_CRR_RESTART); + + /* Wait for time */ + qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2); + + /* Counter should be reset to timeout value */ + uint32_t new_count =3D qtest_readl(qts, WDT_BASE + K230_WDT_CCVR); + g_assert_cmpuint(new_count, >, 0); + g_assert_cmpuint(new_count, !=3D, initial_count); + + qtest_quit(qts); +} + +static void test_interrupt_mode(void) +{ + QTestState *qts =3D qtest_init("-machine k230 --trace k230_*,file=3Dk2= 30.log"); + + /* Set interrupt mode and enable watchdog */ + qtest_writel(qts, WDT_BASE + K230_WDT_CR, + K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN); + qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x1); /* Short timeout */ + + /* Wait for timeout to trigger interrupt */ + qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 10); + + /* Check interrupt status */ + uint32_t stat =3D qtest_readl(qts, WDT_BASE + K230_WDT_STAT); + g_assert_cmphex(stat & K230_WDT_STAT_INT, =3D=3D, K230_WDT_STAT_INT); + + /* Clear interrupt */ + qtest_writel(qts, WDT_BASE + K230_WDT_EOI, 0x1); + stat =3D qtest_readl(qts, WDT_BASE + K230_WDT_STAT); + g_assert_cmphex(stat & K230_WDT_STAT_INT, =3D=3D, 0); + + qtest_quit(qts); +} + +static void test_reset_mode(void) +{ + QTestState *qts =3D qtest_init("-machine k230 -no-reboot"); + + /* Set reset mode and enable watchdog */ + qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN); + qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x1); /* Short timeout */ + + /* Wait for timeout to trigger reset */ + qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2); + + /* In reset mode, the system should reset */ + /* This test verifies that reset mode is properly configured */ + + qtest_quit(qts); +} + +static void test_timeout_calculation(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + /* Test different timeout values */ + for (uint32_t top =3D 0; top <=3D 15; top++) { + qtest_writel(qts, WDT_BASE + K230_WDT_TORR, top); + qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN); + + /* Read current counter value */ + uint32_t count =3D qtest_readl(qts, WDT_BASE + K230_WDT_CCVR); + g_assert_cmpuint(count, >, 0); + + /* Disable watchdog for next iteration */ + qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0); + } + + qtest_quit(qts); +} + +static void test_wdt1_registers(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + /* Test WDT1 registers (second watchdog) */ + qtest_writel(qts, K230_WDT1_BASE + K230_WDT_CR, 0xFFFFFFFF); + g_assert_cmphex(qtest_readl(qts, K230_WDT1_BASE + K230_WDT_CR), =3D=3D, + (K230_WDT_CR_RPL_MASK << K230_WDT_CR_RPL_SHIFT) | + K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN); + + qtest_writel(qts, K230_WDT1_BASE + K230_WDT_TORR, 0xFFFFFFFF); + g_assert_cmphex(qtest_readl(qts, K230_WDT1_BASE + K230_WDT_TORR), =3D= =3D, + K230_WDT_TORR_TOP_MASK); + + qtest_quit(qts); +} + +static void test_enable_disable(void) +{ + QTestState *qts =3D qtest_init("-machine k230"); + + /* Initially disabled */ + uint32_t cr =3D qtest_readl(qts, WDT_BASE + K230_WDT_CR); + g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, =3D=3D, 0); + + /* Enable watchdog */ + qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN); + cr =3D qtest_readl(qts, WDT_BASE + K230_WDT_CR); + g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, =3D=3D, K230_WDT_CR_WDT_EN); + + /* Disable watchdog */ + qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0); + cr =3D qtest_readl(qts, WDT_BASE + K230_WDT_CR); + g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, =3D=3D, 0); + + qtest_quit(qts); +} + +int main(int argc, char *argv[]) +{ + g_test_init(&argc, &argv, NULL); + + qtest_add_func("/k230-wdt/register_read_write", test_register_read_wri= te); + qtest_add_func("/k230-wdt/counter_restart", test_counter_restart); + qtest_add_func("/k230-wdt/interrupt_mode", test_interrupt_mode); + qtest_add_func("/k230-wdt/reset_mode", test_reset_mode); + qtest_add_func("/k230-wdt/timeout_calculation", test_timeout_calculati= on); + qtest_add_func("/k230-wdt/wdt1_registers", test_wdt1_registers); + qtest_add_func("/k230-wdt/enable_disable", test_enable_disable); + + return g_test_run(); +} diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 45ea497fa5..37ca38f9e7 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -291,7 +291,8 @@ qtests_riscv64 =3D ['riscv-csr-test'] + \ (unpack_edk2_blobs ? ['bios-tables-test'] : []) + \ (config_all_devices.has_key('CONFIG_IOMMU_TESTDEV') and config_all_devices.has_key('CONFIG_RISCV_IOMMU') ? - ['iommu-riscv-test'] : []) + ['iommu-riscv-test'] : []) + \ + (config_all_devices.has_key('CONFIG_K230') ? ['k230-wdt-test'] : []) =20 qos_test_ss =3D ss.source_set() qos_test_ss.add( --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607515; cv=none; d=zohomail.com; s=zohoarc; b=Xqclw13VKOQJd7ErUsTYL7hmf5OdB+zTkwpK5zRC+1JeJ1Gt6IEOC7eLHSt9OzwD7Fw5RYcn4Q3Z8+55DzVJSHJ8EZs5lofyEMfcRyuZTWizR9vf95XchbHdmBuLfCWCyladHOXzNqPsBbJUyCBcVJ1rCycLQXo/Dn2lhNyicWQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607515; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=AXWOnEtF/0/IAhq675fj/v8UPIe82YgPSMA/HkHI4VY=; b=QHtT4keGO9QhIbWJWYTLKnC+/Rt0vQlcyCWIFPkTgkw0Fv46oUfUKs/U6MznbbFaE1IOemAh05cQtjfvUckurHDg1MZOWTIL7SJqyVSu0zGt1o5us7T9s6NwkypfCAR0B35N7x0p1mz/t0Qjn6KYeuYtA8g7vnkLsOMASi62kZw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607515142340.2039175164324; Tue, 16 Jun 2026 03:58:35 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQk0-0000Aq-1t; Tue, 16 Jun 2026 06:09:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjq-00089U-53 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:46 -0400 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjn-00046w-RZ for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:45 -0400 Received: by mail-pg1-x536.google.com with SMTP id 41be03b00d2f7-c8584e80bd9so1646153a12.3 for ; Tue, 16 Jun 2026 03:09:43 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604582; x=1782209382; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AXWOnEtF/0/IAhq675fj/v8UPIe82YgPSMA/HkHI4VY=; b=gaeS8J05WZ+LaFF9W8ka/jo3FbZMST/KHlkU0SLHYvbvUNE2/uqM2oaecQVjYllo7j w7plKAEvgAGRmtfAY11AIqqNUSYevMZwd3GnTrT3IL0mPkFv7sc0FUHXlizT7FHprOdl rxonvBUqDWwMXk5DPhNlLyz6eI8S29E5Jsi8eLiLXlJoJIwlkcmUJQ4Ibh8v0RLq100A vMK/KlfNvYjjFe8oOztM0JOahnEh4/vIaKIKs2iWYtNk415CvahglovtpsdaORdSy5cF loSRF8q+3oTQfypCo7esUjccrOeBo1cwEULdQP8Eg19HI5M7TyAdlrpLg6VOE85+U0Um JVAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604582; x=1782209382; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=AXWOnEtF/0/IAhq675fj/v8UPIe82YgPSMA/HkHI4VY=; b=KpeQrv8MjAMoeotZx/kGM1i1ElcGevkzwKTNAxNtEhIbPwqFcwAk2fO5zKyDhvQzPa t927ogIL9jCUIQpYxnC4xYBga+B0Rz8XVRBS8cQabBhUmgjtdZIkE8/RUim9DOjO2o+6 ArdpWVXdSFIwihedR07IzH0+esSebPbM/OpcVktK6VsG0Wk2Bie4RR3GItHBQmoa9qD8 55AUS1r6ibL1JnPibRZitZvqouFG5V3vIya6Ph4Q+WYZvM3j+uYCcL5lf335fj/fPW1G j9SqLnnvR4RsS6E+q5eTz2930x2HebQGKbHnWSNFF1472p3XODaNhPLym+l2U2g64QMK do3Q== X-Gm-Message-State: AOJu0YxGHR3ebyXqFM/neNqmVCcIVFqlCBW2EGHkGwvWrCdg2WJJcEWH VoqkRBo98GO6QaZJ67kv7T31wf9QcThp552B59nMXc1Yosb5gC5+nIkZ21OVQYip X-Gm-Gg: Acq92OHo22YDd3IZzLyQeYvhl74L5OwFtS1+lg9WQfGrJoW8bhNUWwLLsWkrCiLZVuz wRv2z3lOTL4rEBOvPRWSENLzPGIbJlrtOfYxK0DzZZ+zuZOoID0muhJ99Vv24nC8Jf1y6HPnQ3m 7icSq8ZqiBzClv7UO6GXogpnMmH79vyp2UUUZpeNjRVq6F+Ccm2SjNBsJdya1I7w6EK6hQ0dfA5 d8KmtanrHhcaUOHLIPjoQ49sdE+KRP6901+PmQWUVPQ3q/CGawSdMOBw1V3pXEx57q18FctpCvC fi9EGZNh+XySrXm/6kDRvYZdyRAmcjM3J6s/9yRLmLm6LsjIJeYIZq28T3TxjBgSkQkDCpJHUYM 65PbppShn+StGwHP+FURSc4kAmfudW5F5CCU/bXFvjjgzTwoln5snpl9mb0Lb0VshITuTzCbL7a Yf5VurrbiFrc0uszAFnAPm/na9E5kRes2v+noqdKME X-Received: by 2002:a05:6a20:3d82:b0:3b4:bdd5:2f8 with SMTP id adf61e73a8af0-3b7e4d5c9e2mr2998968637.38.1781604582466; Tue, 16 Jun 2026 03:09:42 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Chao Liu , Alistair Francis Subject: [PULL 70/83] docs/system/riscv: add documentation for k230 machine Date: Tue, 16 Jun 2026 20:05:13 +1000 Message-ID: <20260616100527.1939565-71-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=alistair23@gmail.com; helo=mail-pg1-x536.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607516751158500 From: Chao Liu Signed-off-by: Chao Liu Acked-by: Alistair Francis Message-ID: <81d2e2fa42ecabf638f841321cf36cee8f10af01.1781246408.git.chao.l= iu@processmission.com> Signed-off-by: Alistair Francis --- MAINTAINERS | 1 + docs/system/riscv/k230.rst | 113 +++++++++++++++++++++++++++++++++++ docs/system/target-riscv.rst | 1 + 3 files changed, 115 insertions(+) create mode 100644 docs/system/riscv/k230.rst diff --git a/MAINTAINERS b/MAINTAINERS index 44654b5798..4fc073b7ee 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1790,6 +1790,7 @@ K230 Machines M: Chao Liu L: qemu-riscv@nongnu.org S: Maintained +F: docs/system/riscv/k230.rst F: hw/riscv/k230.c F: hw/watchdog/k230_wdt.c F: include/hw/riscv/k230.h diff --git a/docs/system/riscv/k230.rst b/docs/system/riscv/k230.rst new file mode 100644 index 0000000000..cea8202e55 --- /dev/null +++ b/docs/system/riscv/k230.rst @@ -0,0 +1,113 @@ +Kendryte K230 virt reference platform (``k230``) +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +The ``k230`` machine is compatible with the Kendryte K230 SDK. + +The K230 is a chip from the AIoT SoC series made by Kendryte =C2=AE =E2=80= =94 a part of +Canaan Inc. It uses a brand-new multi-heterogeneous unit accelerated compu= ting +structure. + +This chip has 2 RISC-V computing cores and a new-generation KPU (Knowledge +Process Unit) smart computing unit. + +For more information, see + +Supported devices +----------------- +The ``k230`` machine supports the following devices: + +* 1 c908 cores (little core) +* Core Local Interruptor (CLINT) +* Platform-Level Interrupt Controller (PLIC) +* 2 K230 Watchdog Timer +* 5 UART + +Boot options +------------ +The ``k230`` machine supports K230 SDK boot through M-mode U-Boot, which t= hen +starts OpenSBI/Linux with ``bootm``. It also supports direct Linux boot. + +K230 SDK Linux kernels use T-HEAD C9xx private MAEE page table attributes.= QEMU +does not implement MAEE in the generic RISC-V MMU, so such kernels need to= be +built with standard RISC-V PTE bits before they can boot under QEMU. + +Running +------- + +Direct Linux boot +~~~~~~~~~~~~~~~~~ + +This flow lets QEMU load OpenSBI, Linux, initrd, and DTB directly, without +running SDK U-Boot. The Linux Image must be rebuilt with standard RISC-V P= TE +bits before running under QEMU. + +.. code-block:: bash + + $ SDK=3Dk230_sdk/output/k230_canmv_defconfig + $ qemu-system-riscv64 -machine k230 \ + -kernel "$SDK/images/little-core/Image" \ + -dtb "/tmp/user-k230-qemu.dtb" \ + -initrd "$SDK/images/little-core/rootfs.cpio.gz" \ + -append "console=3DttyS0,115200 earlycon=3Dsbi cma=3D0" \ + -nographic + +Direct boot uses the SDK little-core RAM layout for OpenSBI at +``0x08000000``, Linux at ``0x08200000``, and the DTB at ``0x0a000000``. The +initrd is placed by QEMU's generic RISC-V boot helper, and QEMU writes the +initrd range and kernel command line into ``/chosen``. The DTB passed with +``-dtb`` should be derived from ``$SDK/images/little-core/k230.dtb`` and m= ust +describe that initrd location as usable memory and disable any devices tha= t are +not emulated by this machine. + +U-Boot boot +~~~~~~~~~~~ + +This flow starts SDK U-Boot in M-mode with ``-bios``. Until the SDK storage +path is modeled, place OpenSBI, Linux, initrd, and DTB in RAM with loader +devices and run ``bootm`` manually. The Linux Image must be rebuilt with +standard RISC-V PTE bits before running under QEMU. + +.. code-block:: bash + + $ SDK=3Dk230_sdk/output/k230_canmv_defconfig + $ IMAGE=3D$SDK/images/little-core/Image + $ INITRD=3D$SDK/images/little-core/rootfs.cpio.gz + $ DTB=3D$SDK/images/little-core/k230.dtb + $ FWJUMP_UIMAGE=3D/tmp/k230-fw-jump.uImage + $ INITRD_END=3D$(printf "0x%x" $((0x0a100000 + $(stat -c %s "$INITRD"))= )) + $ "$SDK/little/buildroot-ext/host/bin/mkimage" \ + -A riscv -O linux -T kernel -C none \ + -a 0x8000000 -e 0x8000000 -n opensbi \ + -d "$SDK/images/little-core/fw_jump.bin" "$FWJUMP_UIMAGE" + $ qemu-system-riscv64 -machine k230 \ + -bios "$SDK/little/uboot/u-boot" \ + -device loader,file=3D"$FWJUMP_UIMAGE",addr=3D0xc100000,force-raw=3D= on \ + -device loader,file=3D"$IMAGE",addr=3D0x8200000,force-raw=3Don \ + -device loader,file=3D"$INITRD",addr=3D0xa100000,force-raw=3Don \ + -device loader,file=3D"$DTB",addr=3D0xa000000,force-raw=3Don \ + -nographic + +The loader addresses mirror the SDK ``k230_canmv_defconfig`` output. Read = the +U-Boot addresses from the generated environment, and read the Linux RAM ba= se +from the generated ``hw/k230.dts.txt``. This replaces the SDK storage and +decompression steps. + +Press Enter to stop autoboot. At the U-Boot prompt, run these commands: + +.. code-block:: bash + + K230# setenv bootargs console=3DttyS0,115200 earlycon=3Dsbi cma=3D0 + K230# fdt addr 0xa000000 + K230# fdt resize 8192 + K230# fdt set /chosen linux,initrd-start <0x0 0xa100000> + K230# fdt set /chosen linux,initrd-end <0x0 ${INITRD_END}> + K230# fdt set /soc/sdhci0@91580000 status disabled + K230# fdt set /soc/sdhci1@91581000 status disabled + K230# bootm 0xc100000 - 0xa000000 + +Use ``setenv`` so ``bootm`` writes the kernel command line into +``/chosen/bootargs``. The ``fdt`` commands select the loaded DTB, add spac= e for +edits, describe the initrd range in ``/chosen``, and disable SDHCI nodes b= ecause +this machine does not emulate those controllers yet. Replace ``${INITRD_EN= D}`` +with the host-calculated value above when typing the command. ``cma=3D0`` = avoids +the SDK kernel reserving too much of the little-core memory window for ini= tramfs +boot. diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst index afd86ca2ba..896f14e78b 100644 --- a/docs/system/target-riscv.rst +++ b/docs/system/target-riscv.rst @@ -66,6 +66,7 @@ undocumented; you can get a complete list by running .. toctree:: :maxdepth: 1 =20 + riscv/k230 riscv/microblaze-v-generic riscv/microchip-icicle-kit riscv/mips --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607512; cv=none; d=zohomail.com; s=zohoarc; b=FpgnYU+mGP1I9AsJix2IvwvzYRo6myFsGPX/c+r9mZYIY6K+oN1cuX4ozxKs6gp4TRLSb6H7WDC1yz537A5Zopm0yUomB6OAJNbSh4xb5ZRjJU0fIVTEcRC4hJQoMTJjOkN0bbAQS5TExtBGhKeYeL9eFoLpVV72YopWJjJ5AAc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607512; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=s6olje7UD96sdnIFEA78G6UfFtJlFCB5r0kXRgWZric=; b=X/8CHnWr0OCTz7MLwJsG+dtqmZKNEY+mPREEOkDjCFfQAMFJS9/2jBXbhai95g50IsGhEEvxpOxY3WVjX13BF0TlvBWw9pwTUDJrUn8eEomu1x66DvmHOAqa7JRIYqQU1xwM9+Tj7NgbPFQnweE7A3lBg0t/q75/UiIk/sWBSUU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607512231912.9196075364654; Tue, 16 Jun 2026 03:58:32 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQk0-0000As-1x; Tue, 16 Jun 2026 06:09:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjs-0008CO-ER for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:48 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjq-000491-VT for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:48 -0400 Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-36d8b644473so3795131a91.3 for ; Tue, 16 Jun 2026 03:09:46 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604585; x=1782209385; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s6olje7UD96sdnIFEA78G6UfFtJlFCB5r0kXRgWZric=; b=XUqoBpxa9LqdFDaIWjEU0XSZbc21AeF+vM/9UoK6SAtDcjtOwSkmHq7r346oKe6fAN +O5IfHu78P223mfUH0TpGMYpw7Sbd/bG/TW5Qw51j1r+M+yQPGUhFJK4hHkWLXEBIUho ZMnigjoU7GPw62umk08fnf+6xnGUn5cf6g23GR8ZkFfGWQUrOQabj3WUwWjMY8FujDSm w+zIZohS+wdmbJxaJLb5noTKMCrz2DxwvMP22EBmCtAkW7G97/xLivnczD8hYkjamy3n 5IezHtpD+oU79q1seQ4pwx7RZWKSdiqnUjztre6LY5crrLhOZty3qm33f9bQLShalP+C YuWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604585; x=1782209385; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=s6olje7UD96sdnIFEA78G6UfFtJlFCB5r0kXRgWZric=; b=q5WRe2728HXMCrgleJSEHcRBbv7b4qyDGrvZ2mYqU4kGsMXuSPKhP0zgAJZz+m2puY 2thKLX1ahXkNpj3I9su14KL8yHZxxpjYcFBeREgWp8d/gQwkco/wCZJ/Wuy0xl79Sejl 9wpwtEt9pw3Lu+URUctxWoqIJ9H4xUkZwjeqdfSCUYOTcTA2iO5RwHvY+KiJ5IfM3AcV hQ6IIf5IR4ymeSj1lqsayjFaEMj+8OskN1uWCQLoLL78wC2MvHvQplCdsQYH9AobADMQ ACXPJ9SzxvPLbz3lkX5Pp0dzRNhV/2ErIJVUpZyH0zlG7i4fznsfNuIxfk7bHI9luBL/ OfdA== X-Gm-Message-State: AOJu0YycyjXawQc3/5ouB0bbCKtx8squxsa5jnihfR6DzUr7BOpEJ9Es F7i9fVyzdqyRcw2Uc7nKEmctLdHSbPB80EUCpoQHpXmz05SL7slbOLJUqqFfl4Gp X-Gm-Gg: Acq92OH0gs+XmX03RhLawCGfmB+MK5c48+ZAhfuMgAeIrZO2lw4DXnOhoPa2FJk6sit hNXfDSsTTmhkA3R0DXT81duVNFiECDZ4OAZZ1yKVJEwl/I/eXMYMOJRbGU3Ne3kLwsh4dyinYHI cWBGjhhudXhB3dufaWVL/M8ieSeoSk49eKTDbZw/Zf8fUgJl0DnwQhYhfumaOxzQeHS/JvvY16Y pFGv9m7/Eppg0gVA+5WrCYQf8nE6XuOoUhuE9MX6/qONndsXPGMiIX1SKfF4q2iR5ZeHQn9RFTn uSyHGCSZy8fTFU1d0qcW+DdoO9HiCzF0hylkbYA2lEuq5o/xnR64utznqrEBRsHYMngqr3MWZST VXmveRUpWdU3C1sFM6fHHYPjqok8EC84xroCPyzfTBMrnjpqCalse/hiyhKjXJcN3Qx+wxNZX8o sGLsnTqMdeQvdY7R5wAWRsxoVyK3LHUqRF2EGBCU8X X-Received: by 2002:a17:90b:4d0b:b0:36d:8e6f:8d9e with SMTP id 98e67ed59e1d1-37c52916f59mr3016887a91.20.1781604585465; Tue, 16 Jun 2026 03:09:45 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 71/83] hw/riscv/sifive_u.c: add a FDT phandle to cpu-intc Date: Tue, 16 Jun 2026 20:05:14 +1000 Message-ID: <20260616100527.1939565-72-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607512674158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza We're assigning a 'cpu_phandle' phandle to the cpu-intc phandle field. Make it more in line with the other boards by assigning both a cpu_phandle and a intc phandle. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-2-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/sifive_u.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 6a637e3b86..3abbd6c823 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -187,8 +187,10 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, qemu_fdt_setprop_string(fdt, nodename, "status", "okay"); qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu); qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu"); + qemu_fdt_setprop_cell(fdt, nodename, "phandle", cpu_phandle); + qemu_fdt_add_subnode(fdt, intc); - qemu_fdt_setprop_cell(fdt, intc, "phandle", cpu_phandle); + qemu_fdt_setprop_cell(fdt, intc, "phandle", phandle++); qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc"); qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0); qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606163; cv=none; d=zohomail.com; s=zohoarc; b=ATKPuYn9QDZyARKSOd9QZQQDo9KLscVoBlscwh3RsaHYGhkDniHrt7Rn8cZGwKbdblB91BzuUTZJkSB643JqZXG7F9o0MrFr0bW01SE5i0PnMtxLTvS3VHmr2LWAiUEoIzeAVR3eHnWpH27PqrXxXR3CPOH0oIYKgX2iB2SQMTo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606163; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=UVkyfPCQGMRLChnENkb4WZSDiUfeKQOkpPMn/WD6mhs=; b=i9wZLmE1qZEC0Hp64BVuhpn6nfXEbMqHf1GMGkJCOlJbygYgiQQuoPVJV93rRd3wiO22HTyGGcUErT22AftEs3q2FGO5LtfUofwVvGmD879NgXwnJrgdws9WsYCcf38v5fuk7v3JlgvGJ7SaWdu1TNd078cevFYOEuozqaZkQg4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606163437185.3172513016175; Tue, 16 Jun 2026 03:36:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQk4-0000yg-Ks; Tue, 16 Jun 2026 06:10:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQjv-0008MD-VK for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:52 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjt-00049J-TL for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:51 -0400 Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-c8583b8fd89so2610530a12.0 for ; Tue, 16 Jun 2026 03:09:49 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604588; x=1782209388; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UVkyfPCQGMRLChnENkb4WZSDiUfeKQOkpPMn/WD6mhs=; b=mmyLFeCKSdxX3umYgY28NN66/n7ONnf2NMmsxT0ioJzxeJ5BPtkdivwtZcnGTMX4P0 7SXMJdOkKES01TbgRp75p6oCW6P7UrOS4PHm4u1LMNd01bFTfOpmBvStKgQSfdi+N9DS fgE6gW4VK4A9VQY4UJggnkZu0d3r+Np2Fm+ZJ+D+5paCiepsW/4wB5Euu3gm2UdAMT5/ 3ANKTj9nlyO7QtDQPB98Ys8FqbKJTXjhTYlwuRr81EVzv95Uuhc4NQz/MksrbpWh7o4T gVP13GHh2N7xRzL3dgGTNS2BQy+WyqNZw7c3/SOB746yL4dB+KU0KfthnRTzLDAREzlT dRzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604588; x=1782209388; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=UVkyfPCQGMRLChnENkb4WZSDiUfeKQOkpPMn/WD6mhs=; b=QaulRtT59sOm/KMBCmpCzMAGdMML2fCSvJEdk2dTe6VjVJYY19v8EaZDM72ZpAn7AX TOhundFb58gg34FBM5tFjOyd2tjSB1133+XmHOVnagYrdQ+MeJ/5NolHTl+hpFfBTNEW h1iWF7oQh0XouVezoOJZ6tV8c37mqbc13gAr1+3n8nZH1u3uDKvtBaFpSz3QH9v+7fUi dilixTTGu4XFvJqtxL7pD1d7KoDqXayBaZSGUJFk7gI4+Pn/EqgYAkydI/I9NsCEsfjs j+JahGTcTt/nCQG/o8FMqJNXA3brMF3TMT8snF1KCo51GJEJDG96JmYy7WaLiBnWAsxu 9AOg== X-Gm-Message-State: AOJu0YyD4IA/dxhClrTNH4KWAuHxjp/FxIqipjNt7KE3MYzTiWeJ0SL6 sChxzz8vzF2hUzpWGEc6rN75b2ToBw+vBnxqnSu85ZYLYeWRK3QMKqO9TtPJtxCT X-Gm-Gg: Acq92OF9qPmOm+T0nPAI6QVLq2IfoeVPrQxVLxYm/bDx3UvN8v7Fi4N7Ov9yrKze1Gb Zo3fE7p2eZLJQ6/U9/uEPslnifeN96te8kqdzMi5SBNqfiB+WbHx/D8CcnP3XHuQOgt/NG2PITC YIq1NxlhIRm7/ct3MeY8DMKSP9VeoU3Dv4Dr9yIUNw/8YNSMu8zmJiTh20KyzU5h1RRXUgRcSp1 fbd4QX9XZo/96VeIdu+gT/SLnA5VnDiZlrtdtxMgE98T1fSIR/8aMhPKQ2H3IEjUAVVVd0Jghx4 j5dzf2hzYY+2xNof3LgST5DCD58mZ2EEDHMcGTo8HJyoZoOS26IdunBmINXN+Sal6jWrqBNeqGC beXJfUda96PnnkNc4y7Kz3hawLNXru/XP6wzEE2iJoZZKgv3h9q4Ki1Nu0AEGQSz0IDNlpyIUxZ mzxx+GV7EiQhnjttqRep2JijAArpY1wnOo2gUaOK9WOKOKQiQJHic= X-Received: by 2002:a05:6a20:1615:b0:3b4:736b:da61 with SMTP id adf61e73a8af0-3b784193115mr21617730637.35.1781604588457; Tue, 16 Jun 2026 03:09:48 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 72/83] hw/riscv: add fdt-common helper Date: Tue, 16 Jun 2026 20:05:15 +1000 Message-ID: <20260616100527.1939565-73-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606163912158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza There's too much duplication between RISC-V boards and one of the most common culprits is the FDT functions. Add a new file for board FDT helpers. Start by creating a helper that initializes the FDT and init it with the common board boilerplate. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-3-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- include/hw/riscv/fdt-common.h | 14 +++++++++++++ hw/riscv/fdt-common.c | 37 +++++++++++++++++++++++++++++++++++ hw/riscv/sifive_u.c | 20 +++---------------- hw/riscv/spike.c | 19 +++--------------- hw/riscv/virt.c | 19 +++--------------- hw/riscv/meson.build | 1 + 6 files changed, 61 insertions(+), 49 deletions(-) create mode 100644 include/hw/riscv/fdt-common.h create mode 100644 hw/riscv/fdt-common.c diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h new file mode 100644 index 0000000000..adf9b33dfd --- /dev/null +++ b/include/hw/riscv/fdt-common.h @@ -0,0 +1,14 @@ +/* + * RISC-V board helpers for FDT generation. + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef RISCV_VIRT_FDT_H +#define RISCV_VIRT_FDT_H + +void *create_board_device_tree(const char *model, const char *compatible, + int *fdt_size); +#endif diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c new file mode 100644 index 0000000000..b155246998 --- /dev/null +++ b/hw/riscv/fdt-common.c @@ -0,0 +1,37 @@ +/* + * RISC-V board helpers for FDT generation. + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" + +#include "qemu/error-report.h" +#include "system/device_tree.h" +#include "hw/riscv/fdt-common.h" + +void *create_board_device_tree(const char *model, const char *compatible, + int *fdt_size) +{ + void *fdt =3D create_device_tree(fdt_size); + + if (!fdt) { + error_report("create_device_tree() failed"); + exit(1); + } + + qemu_fdt_setprop_string(fdt, "/", "model", model); + qemu_fdt_setprop_string(fdt, "/", "compatible", compatible); + qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2); + qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2); + + qemu_fdt_add_subnode(fdt, "/soc"); + qemu_fdt_setprop(fdt, "/soc", "ranges", NULL, 0); + qemu_fdt_setprop_string(fdt, "/soc", "compatible", "simple-bus"); + qemu_fdt_setprop_cell(fdt, "/soc", "#size-cells", 0x2); + qemu_fdt_setprop_cell(fdt, "/soc", "#address-cells", 0x2); + + return fdt; +} diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 3abbd6c823..5d3b2751ad 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -52,6 +52,7 @@ #include "hw/riscv/sifive_u.h" #include "hw/riscv/boot.h" #include "hw/riscv/machines-qom.h" +#include "hw/riscv/fdt-common.h" #include "hw/char/sifive_uart.h" #include "hw/intc/riscv_aclint.h" #include "hw/intc/sifive_plic.h" @@ -112,23 +113,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, "sifive,plic-1.0.0", "riscv,plic0" }; =20 - fdt =3D ms->fdt =3D create_device_tree(&s->fdt_size); - if (!fdt) { - error_report("create_device_tree() failed"); - exit(1); - } - - qemu_fdt_setprop_string(fdt, "/", "model", "SiFive HiFive Unleashed A0= 0"); - qemu_fdt_setprop_string(fdt, "/", "compatible", - "sifive,hifive-unleashed-a00"); - qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2); - qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2); - - qemu_fdt_add_subnode(fdt, "/soc"); - qemu_fdt_setprop(fdt, "/soc", "ranges", NULL, 0); - qemu_fdt_setprop_string(fdt, "/soc", "compatible", "simple-bus"); - qemu_fdt_setprop_cell(fdt, "/soc", "#size-cells", 0x2); - qemu_fdt_setprop_cell(fdt, "/soc", "#address-cells", 0x2); + fdt =3D ms->fdt =3D create_board_device_tree("SiFive HiFive Unleashed = A00", + "sifive,hifive-unleashed-a00", &s->fdt_size); =20 hfclk_phandle =3D phandle++; nodename =3D g_strdup_printf("/hfclk"); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index f9d00e0d5c..79c9bb041f 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -32,6 +32,7 @@ #include "hw/riscv/riscv_hart.h" #include "hw/riscv/spike.h" #include "hw/riscv/boot.h" +#include "hw/riscv/fdt-common.h" #include "hw/riscv/numa.h" #include "hw/riscv/machines-qom.h" #include "hw/char/riscv_htif.h" @@ -66,16 +67,8 @@ static void create_fdt(SpikeState *s, const MemMapEntry = *memmap, "sifive,clint0", "riscv,clint0" }; =20 - fdt =3D ms->fdt =3D create_device_tree(&fdt_size); - if (!fdt) { - error_report("create_device_tree() failed"); - exit(1); - } - - qemu_fdt_setprop_string(fdt, "/", "model", "ucbbar,spike-bare,qemu"); - qemu_fdt_setprop_string(fdt, "/", "compatible", "ucbbar,spike-bare-dev= "); - qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2); - qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2); + fdt =3D ms->fdt =3D create_board_device_tree("ucbbar,spike-bare,qemu", + "ucbbar,spike-bare-dev", &fdt_size); =20 qemu_fdt_add_subnode(fdt, "/htif"); qemu_fdt_setprop_string(fdt, "/htif", "compatible", "ucb,htif0"); @@ -84,12 +77,6 @@ static void create_fdt(SpikeState *s, const MemMapEntry = *memmap, 0x0, memmap[SPIKE_HTIF].base, 0x0, memmap[SPIKE_HTIF].size); } =20 - qemu_fdt_add_subnode(fdt, "/soc"); - qemu_fdt_setprop(fdt, "/soc", "ranges", NULL, 0); - qemu_fdt_setprop_string(fdt, "/soc", "compatible", "simple-bus"); - qemu_fdt_setprop_cell(fdt, "/soc", "#size-cells", 0x2); - qemu_fdt_setprop_cell(fdt, "/soc", "#address-cells", 0x2); - qemu_fdt_add_subnode(fdt, "/cpus"); qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ); diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 0c489bb412..cb1d83fd48 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -36,6 +36,7 @@ #include "hw/riscv/riscv-iommu-bits.h" #include "hw/riscv/virt.h" #include "hw/riscv/boot.h" +#include "hw/riscv/fdt-common.h" #include "hw/riscv/machines-qom.h" #include "hw/riscv/numa.h" #include "kvm/kvm_riscv.h" @@ -1150,22 +1151,8 @@ static void create_fdt(RISCVVirtState *s) uint8_t rng_seed[32]; g_autofree char *name =3D NULL; =20 - ms->fdt =3D create_device_tree(&s->fdt_size); - if (!ms->fdt) { - error_report("create_device_tree() failed"); - exit(1); - } - - qemu_fdt_setprop_string(ms->fdt, "/", "model", "riscv-virtio,qemu"); - qemu_fdt_setprop_string(ms->fdt, "/", "compatible", "riscv-virtio"); - qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2); - qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2); - - qemu_fdt_add_subnode(ms->fdt, "/soc"); - qemu_fdt_setprop(ms->fdt, "/soc", "ranges", NULL, 0); - qemu_fdt_setprop_string(ms->fdt, "/soc", "compatible", "simple-bus"); - qemu_fdt_setprop_cell(ms->fdt, "/soc", "#size-cells", 0x2); - qemu_fdt_setprop_cell(ms->fdt, "/soc", "#address-cells", 0x2); + ms->fdt =3D create_board_device_tree("riscv-virtio,qemu", "riscv-virti= o", + &s->fdt_size); =20 /* * The "/soc/pci@..." node is needed for PCIE hotplugs diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index 09cf855984..b70a054579 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -1,5 +1,6 @@ riscv_ss =3D ss.source_set() riscv_ss.add(files('boot.c')) +riscv_ss.add(files('fdt-common.c')) riscv_ss.add(when: 'CONFIG_RISCV_NUMA', if_true: files('numa.c')) riscv_ss.add(files('riscv_hart.c')) riscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c')) --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605524; cv=none; d=zohomail.com; s=zohoarc; b=Yg0R9YROUeZoh/G8AfPSrqj0tmNw2WVANy188K57ACezc5ExMJ8Sh11rhexZjlRYmk5z47UV0lLHbuOstnS+GR7DDVaYoOKJwKeNujZeB2320L6/8BoKhfqQ8WTWcADzlphsYqV5bV5JtuXecMcklRf9IM1jD564LH8/dvwjd3U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605524; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=JWKe4G97S2HY13cere3BvmAT0JMJSJuujZjHesFoJwk=; b=UYGcQVmP8GWfwDpr5C0QV0a3Z19kn8w/D4MKg79loqT95sAE+QvIIcxJrxXbLeLLeHm0xTzAMESB35bFu305VLvZOp00EO/u2Sy9QGNXSJ5f7fxI80gtZyL7nwSU8uXReSxor2lA82cfW+5KddFmqmG4QNFfhn7MIY6yiYOfbBs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605524281211.22318547696614; Tue, 16 Jun 2026 03:25:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQk2-0000ay-Mi; Tue, 16 Jun 2026 06:09:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQk0-0000CW-8o for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:56 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQjx-00049d-Uh for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:55 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-37c64d34032so72747a91.0 for ; Tue, 16 Jun 2026 03:09:52 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604592; x=1782209392; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JWKe4G97S2HY13cere3BvmAT0JMJSJuujZjHesFoJwk=; b=BWzotMcxGT+vtqFDfNXXVXnauuhfYosRf+dZLHT/rYS4FahK1HxejMrXxiV7EzEet/ Gc6BA8VWVGHFv6feZBe2paQyCZxSoT1490F8J2v0eV6hjx7XJy6sz7PFyRfsSXIs1XmE VvWnMoHUKo9xgwtyNV04bZfaPSMg4+/BWjhExFRq6iLJKhO1IU9cpfxxCNI2gnQxMlpM 9/hY+82oX4/nYW5PU2lJq+dVW5tlMzZOwXvyi/dgp7ELYYN8W0099l0Ad1lsOtFlXv9b EdHOqpXOo3K012B+UW29L0hr59mjLQ4jP5Pofir8JSarN9f9xlPTxDoHNQvreReHfIzu PmRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604592; x=1782209392; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=JWKe4G97S2HY13cere3BvmAT0JMJSJuujZjHesFoJwk=; b=hJJb02W+92pUc23JN1fKsCdaJvS2FkWziDHgSkuAhhc6DP3CV5YoXbDVYPGdF4gIZ+ tnUG6CMyFB9KGQMxvMO0pioBfaOW7pxPpz3JYQpk7bAxibn7QjmIn5ReaEuUGwSFzHxd HrXsOeYc/5vfUCXOnKXXCV9d6Hz1353zxzQ8TM3bQnQ7pU4AJgxq9h/TcrIYvFb7Jz2w FpypQewc2T0gEngf7hrRH8sxGwdezFjE08slkaq1n8IK6kLKBXzlbJsBIN5N9AEiwd2k FpnqP2OlAYDkmApD1Q4cdxH9zoFtMvCd+2nhaA/gv3XCd1Hq3T+qHVfK/TO9fCN99bLl d/gQ== X-Gm-Message-State: AOJu0YwDENzFkzdZw9O25oRSjwBWNDfXg6UQKP4DDXBR36mLtFqHhtBU VsAT7SHFkieovlewTtiF4MYnU/jP9moG/3yxbkoPMzrOgPkKH+2QymrDRn6x5iAW X-Gm-Gg: Acq92OHhqFGEQjegxSHEDTBa+9WXbhGdfQrnsno0JZEihjfNZim3jTng1j+moMdtyTJ wDarALZgLEZoSVX/5Ebrk/m0E5SIN6/5qDXi8FClNHNvaP6K59QcCm4jgyUpFaGnJBghyYMmFo0 0Be9QR40UbJED2cPzrvIyzo/qZMrtZKqjp8GWZ7VS+yHDtFVpWz3noaQBQ0UGZ026K5VBEiBrOg eT+Gh50P8UCIcJltNAWSbe9qqllxmcrMaPAyH3xI5vz5SWybklcOekRlYPGSF0ioa2Fg6GuTmZd ItYWy9/9NtJhhfVjFQTSdSOkTtDjt3kLwWsmwJ1FYxxx9xCRZhciXeOaUy+/SnaSu26OUaeP9eZ GuIDKGD+47jNpufcrFPUlmdavSiVoRvzROC40VJa5/PJKi4JxonpbGrPva2tCrqijLy/OEIXvC4 peJP0IIjAjouKAI8yr0XEnQT8yWRQEFM3mdYMe10d38yFt1uas+TA= X-Received: by 2002:a17:90b:3d86:b0:35f:c493:cac5 with SMTP id 98e67ed59e1d1-37c52433cb1mr2590575a91.16.1781604591707; Tue, 16 Jun 2026 03:09:51 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 73/83] hw/riscv/numa: make numa_enabled() public Date: Tue, 16 Jun 2026 20:05:16 +1000 Message-ID: <20260616100527.1939565-74-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605525550158501 From: Daniel Henrique Barboza There's FDT logic gated around 'numa_enabled()' in virt.c and spike.c. We want to move the FDT code to a common helper without having to call hw/riscv/numa.c functions from it, but at the same time being aware of the FDT changes if numa is enabled. To do that the boards will inform the FDT helpers if we have numa_enabled in the env or not. And for the boards to be able to do that we need the static 'numa_enabled' function to be public. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20260615203734.954428-4-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- include/hw/riscv/numa.h | 8 ++++++++ hw/riscv/numa.c | 20 ++++++++++---------- 2 files changed, 18 insertions(+), 10 deletions(-) diff --git a/include/hw/riscv/numa.h b/include/hw/riscv/numa.h index e68ce8e8af..ac07786555 100644 --- a/include/hw/riscv/numa.h +++ b/include/hw/riscv/numa.h @@ -23,6 +23,14 @@ #include "hw/core/sysbus.h" #include "system/numa.h" =20 +/** + * riscv_numa_enabled: + * @ms: pointer to machine state + * + * Returns: true if NUMA is enabled in the machine state. + */ +bool riscv_numa_enabled(const MachineState *ms); + /** * riscv_socket_count: * @ms: pointer to machine state diff --git a/hw/riscv/numa.c b/hw/riscv/numa.c index 8a144925c1..8933d9d81f 100644 --- a/hw/riscv/numa.c +++ b/hw/riscv/numa.c @@ -25,21 +25,21 @@ #include "hw/riscv/numa.h" #include "system/device_tree.h" =20 -static bool numa_enabled(const MachineState *ms) +bool riscv_numa_enabled(const MachineState *ms) { return (ms->numa_state && ms->numa_state->num_nodes) ? true : false; } =20 int riscv_socket_count(const MachineState *ms) { - return (numa_enabled(ms)) ? ms->numa_state->num_nodes : 1; + return (riscv_numa_enabled(ms)) ? ms->numa_state->num_nodes : 1; } =20 int riscv_socket_first_hartid(const MachineState *ms, int socket_id) { int i, first_hartid =3D ms->smp.cpus; =20 - if (!numa_enabled(ms)) { + if (!riscv_numa_enabled(ms)) { return (!socket_id) ? 0 : -1; } =20 @@ -59,7 +59,7 @@ int riscv_socket_last_hartid(const MachineState *ms, int = socket_id) { int i, last_hartid =3D -1; =20 - if (!numa_enabled(ms)) { + if (!riscv_numa_enabled(ms)) { return (!socket_id) ? ms->smp.cpus - 1 : -1; } =20 @@ -79,7 +79,7 @@ int riscv_socket_hart_count(const MachineState *ms, int s= ocket_id) { int first_hartid, last_hartid; =20 - if (!numa_enabled(ms)) { + if (!riscv_numa_enabled(ms)) { return (!socket_id) ? ms->smp.cpus : -1; } =20 @@ -104,7 +104,7 @@ bool riscv_socket_check_hartids(const MachineState *ms,= int socket_id) { int i, first_hartid, last_hartid; =20 - if (!numa_enabled(ms)) { + if (!riscv_numa_enabled(ms)) { return (!socket_id) ? true : false; } =20 @@ -132,7 +132,7 @@ uint64_t riscv_socket_mem_offset(const MachineState *ms= , int socket_id) int i; uint64_t mem_offset =3D 0; =20 - if (!numa_enabled(ms)) { + if (!riscv_numa_enabled(ms)) { return 0; } =20 @@ -148,7 +148,7 @@ uint64_t riscv_socket_mem_offset(const MachineState *ms= , int socket_id) =20 uint64_t riscv_socket_mem_size(const MachineState *ms, int socket_id) { - if (!numa_enabled(ms)) { + if (!riscv_numa_enabled(ms)) { return (!socket_id) ? ms->ram_size : 0; } =20 @@ -159,7 +159,7 @@ uint64_t riscv_socket_mem_size(const MachineState *ms, = int socket_id) void riscv_socket_fdt_write_id(const MachineState *ms, const char *node_na= me, int socket_id) { - if (numa_enabled(ms)) { + if (riscv_numa_enabled(ms)) { qemu_fdt_setprop_cell(ms->fdt, node_name, "numa-node-id", socket_i= d); } } @@ -170,7 +170,7 @@ void riscv_socket_fdt_write_distance_matrix(const Machi= neState *ms) g_autofree uint32_t *dist_matrix =3D NULL; uint32_t dist_matrix_size; =20 - if (numa_enabled(ms) && ms->numa_state->have_numa_distance) { + if (riscv_numa_enabled(ms) && ms->numa_state->have_numa_distance) { dist_matrix_size =3D riscv_socket_count(ms) * riscv_socket_count(m= s); dist_matrix_size *=3D (3 * sizeof(uint32_t)); dist_matrix =3D g_malloc0(dist_matrix_size); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606297; cv=none; d=zohomail.com; s=zohoarc; b=Wbro4G/hRZZB/jX8Fx6jy77Q7t2Vd+xzy2mKwffuDYkSIcfDfKXdzOdbuuDhh4gAyLSlSNlgYPQ3b86szu3nvWzNutv0+fvKAvowEYkq3nWikZFfmbomdfKkxvFEzZ383nCe1rOtwXdsLYUayrXeLDbzytc6yzonChcpee7R/1w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606297; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=9wdx0SFX2aYhmNm/ywqM6TXpg1nVDqEWSuSpbqkMHlY=; b=d2jdG2Kny11B14uBWjDZchKEn67n+M2kSjV1UIT4+ZYUampPWhCVaQtpWgX0ssuqSIY4w49O0YU+kSWoRRzWMRCp6h/clORw/TbJVhUCsbk6/itAuVPv7F/dOs4UHBgROCgfL2r4Ape0oaVmTCEPOQSPjP0a9nMDrw0lZkHUFDE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606297471898.2044760148784; Tue, 16 Jun 2026 03:38:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQk4-0000yw-Lb; Tue, 16 Jun 2026 06:10:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQk2-0000aj-Dn for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:58 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQk0-0004AX-8i for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:09:58 -0400 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-c859878eb48so1743209a12.0 for ; Tue, 16 Jun 2026 03:09:55 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604595; x=1782209395; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9wdx0SFX2aYhmNm/ywqM6TXpg1nVDqEWSuSpbqkMHlY=; b=JKHNoz4Z8HWyyugG1Qbg1MizvJDiUyikHhUSl/IrTHr5s8bTdR3vBvBtV/xfrWCr8h wqnjkISL9Bpuu6m2snA93RkL9D9liaq00+zOeFIqyKQRDeDIZyteRhtIJ/G2WpXcBJOg jwiZw36moly0OP0tGPCKsPf6c38hDrGj+n7mI9IVb/Xpaj4hbWNVn2zFogkrJwjtyitR BqdWrFfDY/7A8FYpZelTFF7DLAB6DRSNjzPo8A+mFFK7bK++6AByS+skMlRLheUavwyo 8PLcpO1vg/ST6Fnovpa3g88bK8DiJZLk1+19c/+VD0mSFkfNEQTeu3qQH3kvGvt+4MiU CQug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604595; x=1782209395; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=9wdx0SFX2aYhmNm/ywqM6TXpg1nVDqEWSuSpbqkMHlY=; b=Og69LXQy9BsRZedncRs3Ox3OcxdqfW+IfZKnPYHhgPQZUtdiSul5caepwuwuZoyo02 DO5f/VzTlMexacsSYJBoPs5JQg79iIgvsGRxnszqdKGh/X/saf1H/9JRPXNz4RQKFHtB Fc05GTnVkBzRYE3EdII1/6ZmxfCZ2OO3N+Kq2xuRmLcfd4vvYr1IzslldI5blCTOf8Iy TQmtPZAkdVeHx9eDq+nd9V4OfINojGWX/+y8lrD0doSb+SGninnuDo8pGqlo2r0BQurT W2upSwR3629BVgFA59E2YVR1SZ18QY963mUdHoIkMPc3FI4M9hvZuZtoj4L5X7p+Y/a3 HHag== X-Gm-Message-State: AOJu0YywdKk0rc2BVdaxsabvGLb35Qb80gB5OZcajLu9Ukguo/Y48/sZ zQq6iO0ALXVJE0KtqJXQ7dZLOfaQzHy0oSgK0QUS04iufP/Fq7wyp2ocymBaytqZ X-Gm-Gg: Acq92OEchabwxIW77VXOUXWXfzwLb69atCTDsXQajcqgVW70FxqorCYdmBb7hmUdxR3 dU/S4mnmJtk6KWxE17UMVe/GLb1hQOWmVM3y7kMgevnkcGHiYF2mJGylaBEQIu7YjqlfvDXRAZY p1vdUQAiakb8gZkmguc0MWMZQoyEy3uvn7Ks8OXi1yQaZoZ8+UHMwJlsL80azXJZexe/BYtKFTH C473McOYrrYhj+zzYI3YSL2M4pCufxGd/WSneCIUpJfj3W1vJvqgSwJZL/1a+5EBeRy3SxyBKIT jxRtPL5u3LACy/dF2QEkQ3dRdWpha5RXGQdWykauDaZb9niVPXCAhFlQM9Td5gzNTa0vLDPKXwE DdDe2pPi3+yMxIYG+WR+kf0yHWgmC26eDdzNUPNMNOjAQhltekVGuAmtgjv3ISTKX5OV+SpeXKV G/Oug2nYHAp4922ng5Kz4B3wndDluV5vEgSk5oRhdq92Qc8XVTb3E= X-Received: by 2002:a05:6a21:6190:b0:3b4:7880:10c9 with SMTP id adf61e73a8af0-3b796423baamr17253540637.43.1781604594761; Tue, 16 Jun 2026 03:09:54 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 74/83] hw/riscv: add create_fdt_socket_memory() helper Date: Tue, 16 Jun 2026 20:05:17 +1000 Message-ID: <20260616100527.1939565-75-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=alistair23@gmail.com; helo=mail-pg1-x535.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606299409158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza This helper encapsulates the creation of /memory@addr FDT subnodes. Boards are responsible for calculating the adequate addr, size and inform if we have numa enabled. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-5-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- include/hw/riscv/fdt-common.h | 2 ++ hw/riscv/fdt-common.c | 15 +++++++++++++++ hw/riscv/sifive_u.c | 11 ++--------- hw/riscv/spike.c | 18 +++++++----------- hw/riscv/virt.c | 23 ++++++----------------- 5 files changed, 32 insertions(+), 37 deletions(-) diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h index adf9b33dfd..81689f418b 100644 --- a/include/hw/riscv/fdt-common.h +++ b/include/hw/riscv/fdt-common.h @@ -11,4 +11,6 @@ =20 void *create_board_device_tree(const char *model, const char *compatible, int *fdt_size); +void create_fdt_socket_memory(void *fdt, hwaddr addr, uint64_t size, + int socket_id, bool numa_enabled); #endif diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c index b155246998..719c36e001 100644 --- a/hw/riscv/fdt-common.c +++ b/hw/riscv/fdt-common.c @@ -10,6 +10,7 @@ =20 #include "qemu/error-report.h" #include "system/device_tree.h" +#include "hw/core/boards.h" #include "hw/riscv/fdt-common.h" =20 void *create_board_device_tree(const char *model, const char *compatible, @@ -35,3 +36,17 @@ void *create_board_device_tree(const char *model, const = char *compatible, =20 return fdt; } + +void create_fdt_socket_memory(void *fdt, hwaddr addr, uint64_t size, + int socket_id, bool numa_enabled) +{ + g_autofree char *mem_name =3D g_strdup_printf("/memory@%"HWADDR_PRIx, = addr); + + qemu_fdt_add_subnode(fdt, mem_name); + qemu_fdt_setprop_sized_cells(fdt, mem_name, "reg", 2, addr, 2, size); + qemu_fdt_setprop_string(fdt, mem_name, "device_type", "memory"); + + if (numa_enabled) { + qemu_fdt_setprop_cell(fdt, mem_name, "numa-node-id", socket_id); + } +} diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 5d3b2751ad..a00cfd08a7 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -98,7 +98,6 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry= *memmap, bool is_32_bit) { MachineState *ms =3D MACHINE(s); - uint64_t mem_size =3D ms->ram_size; void *fdt; int cpu; uint32_t *cells; @@ -138,14 +137,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x0); g_free(nodename); =20 - nodename =3D g_strdup_printf("/memory@%lx", - (long)memmap[SIFIVE_U_DEV_DRAM].base); - qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - memmap[SIFIVE_U_DEV_DRAM].base >> 32, memmap[SIFIVE_U_DEV_DRAM].ba= se, - mem_size >> 32, mem_size); - qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory"); - g_free(nodename); + create_fdt_socket_memory(fdt, memmap[SIFIVE_U_DEV_DRAM].base, + ms->ram_size, 0, false); =20 qemu_fdt_add_subnode(fdt, "/cpus"); qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 79c9bb041f..92facba29d 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -55,13 +55,12 @@ static void create_fdt(SpikeState *s, const MemMapEntry= *memmap, { void *fdt; int fdt_size; - uint64_t addr, size; unsigned long clint_addr; int cpu, socket; MachineState *ms =3D MACHINE(s); uint32_t *clint_cells; uint32_t cpu_phandle, intc_phandle, phandle =3D 1; - char *mem_name, *clint_name, *clust_name; + char *clint_name, *clust_name; char *core_name, *cpu_name, *intc_name; static const char * const clint_compat[2] =3D { "sifive,clint0", "riscv,clint0" @@ -85,6 +84,10 @@ static void create_fdt(SpikeState *s, const MemMapEntry = *memmap, qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); =20 for (socket =3D (riscv_socket_count(ms) - 1); socket >=3D 0; socket--)= { + hwaddr memaddr =3D memmap[SPIKE_DRAM].base + + riscv_socket_mem_offset(ms, socket); + uint64_t memsize =3D riscv_socket_mem_size(ms, socket); + clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket); qemu_fdt_add_subnode(fdt, clust_name); =20 @@ -133,15 +136,8 @@ static void create_fdt(SpikeState *s, const MemMapEntr= y *memmap, g_free(cpu_name); } =20 - addr =3D memmap[SPIKE_DRAM].base + riscv_socket_mem_offset(ms, soc= ket); - size =3D riscv_socket_mem_size(ms, socket); - mem_name =3D g_strdup_printf("/memory@%lx", (long)addr); - qemu_fdt_add_subnode(fdt, mem_name); - qemu_fdt_setprop_cells(fdt, mem_name, "reg", - addr >> 32, addr, size >> 32, size); - qemu_fdt_setprop_string(fdt, mem_name, "device_type", "memory"); - riscv_socket_fdt_write_id(ms, mem_name, socket); - g_free(mem_name); + create_fdt_socket_memory(fdt, memaddr, memsize, socket, + riscv_numa_enabled(ms)); =20 clint_addr =3D memmap[SPIKE_CLINT].base + (memmap[SPIKE_CLINT].size * socket); diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index cb1d83fd48..df3eadef78 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -302,22 +302,6 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, = int socket, } } =20 -static void create_fdt_socket_memory(RISCVVirtState *s, int socket) -{ - g_autofree char *mem_name =3D NULL; - hwaddr addr; - uint64_t size; - MachineState *ms =3D MACHINE(s); - - addr =3D s->memmap[VIRT_DRAM].base + riscv_socket_mem_offset(ms, socke= t); - size =3D riscv_socket_mem_size(ms, socket); - mem_name =3D g_strdup_printf("/memory@%"HWADDR_PRIx, addr); - qemu_fdt_add_subnode(ms->fdt, mem_name); - qemu_fdt_setprop_sized_cells(ms->fdt, mem_name, "reg", 2, addr, 2, siz= e); - qemu_fdt_setprop_string(ms->fdt, mem_name, "device_type", "memory"); - riscv_socket_fdt_write_id(ms, mem_name, socket); -} - static void create_fdt_socket_clint(RISCVVirtState *s, int socket, uint32_t *intc_phandles) @@ -759,6 +743,10 @@ static void create_fdt_sockets(RISCVVirtState *s, phandle_pos =3D ms->smp.cpus; for (socket =3D (socket_count - 1); socket >=3D 0; socket--) { g_autofree char *clust_name =3D NULL; + hwaddr memaddr =3D s->memmap[VIRT_DRAM].base + + riscv_socket_mem_offset(ms, socket); + uint64_t memsize =3D riscv_socket_mem_size(ms, socket); + phandle_pos -=3D s->soc[socket].num_harts; =20 clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket); @@ -767,7 +755,8 @@ static void create_fdt_sockets(RISCVVirtState *s, create_fdt_socket_cpus(s, socket, clust_name, phandle, &intc_phandles[phandle_pos]); =20 - create_fdt_socket_memory(s, socket); + create_fdt_socket_memory(ms->fdt, memaddr, memsize, + socket, riscv_numa_enabled(ms)); =20 if (virt_aclint_allowed() && s->have_aclint) { create_fdt_socket_aclint(s, socket, --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607994; cv=none; d=zohomail.com; s=zohoarc; b=RPcwYVtaqiXHBvn4uVpmNeCdaYGCp3BztbwPQGeEGH4JA/pys4DvXRZOr/VUaFso3mNy99zs8brLanxaUAZ4oQJb82jXA6iHPHZXqPhQtC38ihHqAcDw7FfsLHQ0EPp+m+Ga/gopfRUVFw3xrrWKcnDLkMJ/HbdKpSLPDdsR1V4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607994; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hgVeXNJdbBixXrfneznZx6ETuUsk7Hx2xz1yrOHPSrA=; b=fnBz/PCodWLuzrPse060rWeG5k2doYRqKaQeCE+xwK1wC10Pyz8CDfo+xqOuzjkKGwoj+kUPIiXWzqXTMAwzsnVblMiDCDX3MYAGzmyNk0QCSCP+RpRh+ChYH0h9YhQvSjzZRy7va1pIBIkSXQ1zQV8c0O3C1XN74DYp/W/HaWM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607994778973.1587367625058; Tue, 16 Jun 2026 04:06:34 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQk7-0001M7-5z; Tue, 16 Jun 2026 06:10:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQk5-00016J-7H for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:01 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQk3-0004Bt-HO for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:00 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-36da8439078so3693460a91.2 for ; Tue, 16 Jun 2026 03:09:59 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:09:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604598; x=1782209398; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hgVeXNJdbBixXrfneznZx6ETuUsk7Hx2xz1yrOHPSrA=; b=j/SWzlGbb7go4iG+C88TOhChNdtjmOigx/KOCRLLd2/f6iCrKZneSZbczgTGgAlMno KsEleGOMoPw/GxG/eZl/kmpBlM3lDDw4tWV2mOrk7CXgPqkvk8nCFXIyNqYPytcXDVoq jDi2P9lX01ar17k8j2akSYbUr9NcIoDPOlHlj1chpUIkE/o/NdCubTulcJmEn9kdS27i pI4nG0sXKbmKQit0Rcamn9cDot6IFhK2XHZIQn0JzkyWZGUT1XpX1PqUDiCrV1MBIItz ALNan03vjWlIRMltCk3kIJ0h2Bxnt/A4+zv25wsOuicI25Ox2JYph46LKqASst7Iq6Fz IBsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604598; x=1782209398; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=hgVeXNJdbBixXrfneznZx6ETuUsk7Hx2xz1yrOHPSrA=; b=YUtwcT7QEannY6UswY7tT+OZDPmuJPiiTDsK/eE7rkYrc/VaILDyUKg0RdKhK2cRZ3 UsjaSrcuh6GleaUkUlLSnZ8NQWxk3kNuCyU3wgg9nr9ZsyH63IOC9rAyQOp/q7hTJGOC P+Cg65ZkRq8B/6llqtURrms+SFUCKE2uOx0W+SN7+ycmfAGRm8HtK4PHb/pV346kc0o3 1ADZXLpL7f3f1Bi7b6zsAxL4d/BT9VzHIPd5ZP8zlNeeKyipbmxaIzeN/9n2Bd+5hHwN umWt2GAvrlCQHut1vgbrEzxSa5fWNevNWxgbMEOnwhQygIOU7StPeAdUTDbIKEpuc+6a //vg== X-Gm-Message-State: AOJu0YyBDTWCb5A/wjQ7QUrzfgQtxeFpw0/YTUqaN+1VggXw7qZA+qKJ aX7InQYI2VHlN5LR2r3v7RZ0SAQlSKPn8tzo3nRLiJweMsJmlzzo2/uumVrKSfO2 X-Gm-Gg: Acq92OErJfSF0mNPaJHLEYhHv4170uK8KWGk04ki7eRXfUxIxyvWc3tdoQ7x6whfvpH RqIyPhrqncE46eFS2LqacKenlSrFxc4JjMfRXGQlpekkkZm6WLsR5LkWQWout4CRn0XThd32KkY gPiNWmmNy7Xdkwe+tsnZjX1bxafEwrBP/WHtdoS09cBWDECaQUrGnje1k1m+MVQwMFgnvqsnCD4 R7KfqVX8qL8B0vHNXFdcZfRiaUGjl/h2iOOgNUXxP6RfappkpSZgNVIkdx4IfS5czkVYr3nRWFU 03Ro/ES5cla1XCSkrOY1MtYhDiAQsaTOvPvEsOkgf2qUkQAo4EB3+6G3p0LSVVEKnWrhx9V1x0V Ctgg5uZpdDazUhBxqTRTAnIN625U9ofjPkadGvjaFWBQTMfh+6mlSt4NeuY1gBr6r4QBJRcE74b wGqlY9Q6JY7Lv+Fp1HL5wkMz20dFoi6QMNhR8X4cwj X-Received: by 2002:a17:90b:538d:b0:36b:a0fa:ff96 with SMTP id 98e67ed59e1d1-37c528e0a69mr3013973a91.12.1781604597748; Tue, 16 Jun 2026 03:09:57 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 75/83] hw/riscv/sifive_u.c: add intc_phandles array Date: Tue, 16 Jun 2026 20:05:18 +1000 Message-ID: <20260616100527.1939565-76-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=alistair23@gmail.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607996997158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Store the intc phandles in an 'intc_phandles' array, like the 'virt' board does, instead of re-creating the interrupt-controller FDT string and using qemu_fdt_get_phandle() to fetch it. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-6-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/sifive_u.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index a00cfd08a7..ce86989bc8 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -111,6 +111,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEnt= ry *memmap, static const char * const plic_compat[2] =3D { "sifive,plic-1.0.0", "riscv,plic0" }; + g_autofree uint32_t *intc_phandles =3D g_new0(uint32_t, ms->smp.cpus); =20 fdt =3D ms->fdt =3D create_board_device_tree("SiFive HiFive Unleashed = A00", "sifive,hifive-unleashed-a00", &s->fdt_size); @@ -168,8 +169,10 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu"); qemu_fdt_setprop_cell(fdt, nodename, "phandle", cpu_phandle); =20 + intc_phandles[cpu] =3D phandle++; + qemu_fdt_add_subnode(fdt, intc); - qemu_fdt_setprop_cell(fdt, intc, "phandle", phandle++); + qemu_fdt_setprop_cell(fdt, intc, "phandle", intc_phandles[cpu]); qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc"); qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0); qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1); @@ -179,14 +182,10 @@ static void create_fdt(SiFiveUState *s, const MemMapE= ntry *memmap, =20 cells =3D g_new0(uint32_t, ms->smp.cpus * 4); for (cpu =3D 0; cpu < ms->smp.cpus; cpu++) { - nodename =3D - g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu); - uint32_t intc_phandle =3D qemu_fdt_get_phandle(fdt, nodename); - cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandle); + cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandles[cpu]); cells[cpu * 4 + 1] =3D cpu_to_be32(IRQ_M_SOFT); - cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandle); + cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandles[cpu]); cells[cpu * 4 + 3] =3D cpu_to_be32(IRQ_M_TIMER); - g_free(nodename); } nodename =3D g_strdup_printf("/soc/clint@%lx", (long)memmap[SIFIVE_U_DEV_CLINT].base); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607500; cv=none; d=zohomail.com; s=zohoarc; b=hjFz119/+J8QvbnJvDI6gCbc/Nw757IsyAidLb4Qvkb7vxPi9jmiyAygtj8PxvkqaLXDtvJeA0hyZ9tOh1xS3ZpR0f4i6lfkZ98d+vupjiZgKbPFcmSh0txtfQNmGiz2KGpxhorXBms98GsTynsX3zDGiuYekPEiLrvRV3QrcQ0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607500; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=k+CPW+mrFb4Q9pfWiijQO7BuxfxRUOuvUJFTjhbA2GY=; b=SThzjMrv0GSvXpNQ9z1vPMXJ0jvRo1VN7aBiA6Ri3MoGkyF8Ky5BICX4wGznnms8swTCcJ8Jx6TO6msRd65XnXxAfOu480EnY6PnM+mG5IlhWTqoROY3Q0+BKSdmpbZQ5Pww8jmyMjnHYAOiaCuze2ftROZlJ/7uSbuBEvv3/6Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607500755581.1076510702771; Tue, 16 Jun 2026 03:58:20 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQk9-0001ap-PV; Tue, 16 Jun 2026 06:10:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQk7-0001Pg-Nc for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:03 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQk5-0004CL-QI for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:03 -0400 Received: by mail-pg1-x533.google.com with SMTP id 41be03b00d2f7-c85d4b4245aso3173798a12.1 for ; Tue, 16 Jun 2026 03:10:01 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604600; x=1782209400; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=k+CPW+mrFb4Q9pfWiijQO7BuxfxRUOuvUJFTjhbA2GY=; b=XC1ipNPjVS10T6YTtjEP7FpKnaee2H6OzURfCtOY03pxB3oqYzVkBr8YjT4ZYTAJRM oruIPPCShoWk0ln6m9rQR3H3jMi376vYvOfxA3y+4Yc+aphGqDClBT4impnm+awPmV6c H3naMmOnT5Uqt+neidOEgWF/U6adFfHuBybe9MvUNlQ9x+fSYl+XereP0y1PqclRFZkz 1mkFT96HcDWhalM38qeXvltcIf1C2T4AHUNgKNOM9sxvPDG3cK7GzZHLRurUTLQuPDcY RUXw+X4I0btr0qJ2SMU7JOZxD3fJOJMovdRU55s0Wr1U5g3XOS0zJeE6kMHIA6YiZKZ8 gqJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604600; x=1782209400; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=k+CPW+mrFb4Q9pfWiijQO7BuxfxRUOuvUJFTjhbA2GY=; b=anBtr5PaAVak2b7dKE0cShJ9suIlcogD1puNofLxb/Qaz2OMWwyTfSwx8RYiUJgBul 0R/7LW00z+B/sL3ezbAOYX8HbW4W7C8UBmmpNbzpoPqjx6TWTwNGAQaaURzb39eG3B/Q HPt5FU4KaJf6FgduNbHh5uqmbtAlNXovH7KB/+9mN9E9Zx2QvEW4r5OeZAU8mm3RJcB3 wPwZyoEr4/QjFz2Jhcczf/uw22u1gBmVjxQ6Ps1Y9MF5BgiSNnebkTpR3nR+kIqluNEW nIy+qFjCmGK5zDZwNeIgktZuALi3Ovh4RGpvKyJwFjwFpcUjxFnKMtoSG1+5VT87CPXs mv5A== X-Gm-Message-State: AOJu0Yy0FkiUTbSbYG+qihoHJ5JYnRnsGoO+9EEo96a/Zge3vc0x272q n344aq+lZX7JptO7T2hma0iMBzgdgnj8Wmm7cnBFxPNoRZE4X+Eea2BhWwiMNgpV X-Gm-Gg: Acq92OHA5eyaNtK+4hqDapLiRD5/H2AqBqikMA/iOt00VuH++dtnORQV9qhiymlqCG3 5OcFCeRNoTZEZ5amPqSTOmlOQ86CAzf+tttPzL15agFlJuDyOTR/Ts/XltD1SeXOZxENodaYVZZ UrM1h7zotiRF/0/e7Ta52gnhzlXAbkl/DzEQln/dTheAJQOVxjawU5uljpPMlY+BmxLDCPVK+Oj N4HBSgyRvjcFNp2Nk6PZkpzx1E3TVN4HvtcYStntNM2W9AwIK0qTUn46NqJG5Awmoo3avNEYugi YM4KnIDhc41aGwcgJGN0dH/7EqJTtM47knZYoOMLLsYI6jASDwFh97nPNgYUGw3jp0KKsOBehkZ AI+Z8lIAUnbpjzGgG6x4nCnBmEgKvZ/Ih8iSvnqCzbBYQUAnuYocR8gUH4mgxNczxHrZu59z4bS 2/3Y/ti9MfYH1ol+ZvPrq3ALCxKtQWWiUskVEa2mOW X-Received: by 2002:a05:6a21:e93:b0:3b4:76c6:f961 with SMTP id adf61e73a8af0-3b79624e144mr16215964637.17.1781604600565; Tue, 16 Jun 2026 03:10:00 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 76/83] hw/riscv/spike.c: add intc_phandles array Date: Tue, 16 Jun 2026 20:05:19 +1000 Message-ID: <20260616100527.1939565-77-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=alistair23@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607503033158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza The clint FDT generation uses a cells array (clint_cells) that are populated in the middle of the loop that creates the CPU socket FDT. This is completely fine but it differs from the other boards that creates the clint cells array right before creating the clint FDT. 'virt' and 'sifive_u' store the intc phandles in a intc_phandles array during FDT CPU socket creation, and this array is used to create the clint FDT cells. Standardize the clint FDT creation for spike doing the same here, allowing us to move everything to a common helper later. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-7-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/spike.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 92facba29d..82005ec163 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -59,7 +59,7 @@ static void create_fdt(SpikeState *s, const MemMapEntry *= memmap, int cpu, socket; MachineState *ms =3D MACHINE(s); uint32_t *clint_cells; - uint32_t cpu_phandle, intc_phandle, phandle =3D 1; + uint32_t cpu_phandle, phandle =3D 1; char *clint_name, *clust_name; char *core_name, *cpu_name, *intc_name; static const char * const clint_compat[2] =3D { @@ -84,6 +84,8 @@ static void create_fdt(SpikeState *s, const MemMapEntry *= memmap, qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); =20 for (socket =3D (riscv_socket_count(ms) - 1); socket >=3D 0; socket--)= { + g_autofree uint32_t *intc_phandles =3D g_new0(uint32_t, + s->soc[socket].num_har= ts); hwaddr memaddr =3D memmap[SPIKE_DRAM].base + riscv_socket_mem_offset(ms, socket); uint64_t memsize =3D riscv_socket_mem_size(ms, socket); @@ -91,8 +93,6 @@ static void create_fdt(SpikeState *s, const MemMapEntry *= memmap, clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket); qemu_fdt_add_subnode(fdt, clust_name); =20 - clint_cells =3D g_new0(uint32_t, s->soc[socket].num_harts * 4); - for (cpu =3D s->soc[socket].num_harts - 1; cpu >=3D 0; cpu--) { cpu_phandle =3D phandle++; =20 @@ -113,20 +113,17 @@ static void create_fdt(SpikeState *s, const MemMapEnt= ry *memmap, riscv_socket_fdt_write_id(ms, cpu_name, socket); qemu_fdt_setprop_cell(fdt, cpu_name, "phandle", cpu_phandle); =20 + intc_phandles[cpu] =3D phandle++; + intc_name =3D g_strdup_printf("%s/interrupt-controller", cpu_n= ame); qemu_fdt_add_subnode(fdt, intc_name); - intc_phandle =3D phandle++; - qemu_fdt_setprop_cell(fdt, intc_name, "phandle", intc_phandle); + qemu_fdt_setprop_cell(fdt, intc_name, "phandle", + intc_phandles[cpu]); qemu_fdt_setprop_string(fdt, intc_name, "compatible", "riscv,cpu-intc"); qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL,= 0); qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1); =20 - clint_cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandle); - clint_cells[cpu * 4 + 1] =3D cpu_to_be32(IRQ_M_SOFT); - clint_cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandle); - clint_cells[cpu * 4 + 3] =3D cpu_to_be32(IRQ_M_TIMER); - core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); qemu_fdt_add_subnode(fdt, core_name); qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); @@ -139,6 +136,15 @@ static void create_fdt(SpikeState *s, const MemMapEntr= y *memmap, create_fdt_socket_memory(fdt, memaddr, memsize, socket, riscv_numa_enabled(ms)); =20 + clint_cells =3D g_new0(uint32_t, s->soc[socket].num_harts * 4); + + for (cpu =3D 0; cpu < s->soc[socket].num_harts; cpu++) { + clint_cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandles[cpu]); + clint_cells[cpu * 4 + 1] =3D cpu_to_be32(IRQ_M_SOFT); + clint_cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandles[cpu]); + clint_cells[cpu * 4 + 3] =3D cpu_to_be32(IRQ_M_TIMER); + } + clint_addr =3D memmap[SPIKE_CLINT].base + (memmap[SPIKE_CLINT].size * socket); clint_name =3D g_strdup_printf("/soc/clint@%lx", clint_addr); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607174; cv=none; d=zohomail.com; s=zohoarc; b=j5N6N/k13Jf05hBfMMVrEwMohhK4NEHCithM/sHD1uIK636CfYBNI66g7O/HQYEJk4vDR0TTjRzJ51eQVbz4C3Za/CegOFThKfX5S0eh9QNVsplK5fPhH6kPyWfJDIOlJ4wXb3Xnxgmgdjly09SKW64L0Idag3IeHwCGGWdWFVo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607174; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=mgiXv0DdqXhZdd1pfnR+wbylT7qv8kTRYp/BSPGj9xY=; b=ivvQ1A2BPOM38Dah+ZscbQqfu0tyIF7r2+aTyp65m3BLjY1662J+iu3yhpOQNyi1GwOMmNW71+OHRAl+1M+skrLu0xXyInQuncw0TcZfKSBVUK25Dc48bc4doxSLW7a5z8qPDMXx7mDe5xTwFoIub/xehOS3yBbggfoCPo+B/vU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607174380356.3307763238338; Tue, 16 Jun 2026 03:52:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQkE-00024T-0A; Tue, 16 Jun 2026 06:10:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQkB-0001nt-FZ for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:07 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQk8-0004Dr-Sc for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:07 -0400 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-c85a2c012e5so1467793a12.1 for ; Tue, 16 Jun 2026 03:10:04 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.10.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604603; x=1782209403; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mgiXv0DdqXhZdd1pfnR+wbylT7qv8kTRYp/BSPGj9xY=; b=M529jpRqCYIyiwugqMxQI8q50XWQ9Owiv1NaiKuJOZQX9jYYMC3TQWXdn3BdkFyS2O BlTCOhQbnmTo4tVE/PfB7kIin+AaCrVfgvzijQQO9zkkvK76/DGNCpKM+vmGc9ScsLDZ auZyDYB4vDQAk61I9ea8L2MXLrKL1ET4pZ6ZAU/SzyDa/hsUJ/97aB1nlaAAlGHQ7cvK q0QDTa4tGI3K2oCKQpX8VmC1UgxAP8N8qaUvUp5erf3ecWzOQIrXThbwPsR5r9sx4Ty/ eCr70WT4kb1OeKujcskhyq84FWd5XfvBuQ411P4Ptq9SmqYfYdJZgqTTlhjzJHNSKMYv 4B0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604603; x=1782209403; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mgiXv0DdqXhZdd1pfnR+wbylT7qv8kTRYp/BSPGj9xY=; b=evNN0o1sb9vexpXwikTB+swCDfotFmy0/COGRp12OW1kI6cSxppqOVdtqVOpfJ4zJs cxyXdqamguuy2cy/MPivGsIOxdzI4o0z74YK0Cp1Gkqw4B19cXn/BS5PXYIicuZKOC/7 Z+20XdqALJH7iozUp1SwX6Jbblw3TwYqcTWqGR7I2eTvWQKfJ6oOtpG5eOkgVOVh7fwR iWmx2fknTZY0I+SuaOx6C+2/kgYQgvz5bXT7MZ6XXnuGqqB+528pFS1pQzKvf/zcz787 E7vxxmTiTStRMCz+cWK110MQPJIj0MCqufj5lrUFUne3/2hdhXck9VLuP11mc5xvNxls U5FA== X-Gm-Message-State: AOJu0YxLV9cjIW4yo9f6YTwOE2NEDvww9CImDH83mIrWXXUz8z0OzPPy qhHA+aXdQUBUf+w9j8hHQu9KA8NF+htDi40PTQR3RCshR1fKd/J1sD8Zm6lsE7xq X-Gm-Gg: Acq92OHsrCz/4IA+MPBh+QkcRve+ZqM3cJdp6NNyFe8LepqtdRrAzCF+BqZgNbf8GHf kMCN3Jwa6gf75s5LbCenU3tyTOJp2dk4d1LCj8NXSPJK+fliplXzM14ZFUBcEPDwdPZnrtiawvc g520G50xjSoWZPiHfA8Ix6ZAeegs4t6j3osjVnys/MFF2Soo0RuNRAkwCqGAQM7+rQzZJNHVnKP EDllUfzZ9IVUJBE+TRsgcVAMqkrUlyRCxT49+T2PS8jllAfzN47iy7b/XYYFFTv6pixrIUGi+Ca /VuZemrJoxnFQ6w1onvj47NxcsGdwSpPUT4oDv177pKSknAT6PsSas9MNlEcOQOcq3G8jCzU3Hf u96x5SIG8O7KL5RhjKJBMrGCFqnRSDgJkoxm+R96yrRILNj0YDsR5MJHFDpC1fW3fiqcLhkjiwD qujDPvEk/2O8j1jivhnm6/YLlVsIQFZXMjIcVI9s9C X-Received: by 2002:a05:6a20:9186:b0:39b:8dcb:f36d with SMTP id adf61e73a8af0-3b7e49d09f6mr3392604637.35.1781604603452; Tue, 16 Jun 2026 03:10:03 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 77/83] hw/riscv: add create_fdt_clint() helper Date: Tue, 16 Jun 2026 20:05:20 +1000 Message-ID: <20260616100527.1939565-78-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=alistair23@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607174616158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Move all clint FDT generation to fdt-common.c reducing code repetition. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-8-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- include/hw/riscv/fdt-common.h | 5 ++++ hw/riscv/fdt-common.c | 33 +++++++++++++++++++++++++ hw/riscv/sifive_u.c | 25 +++---------------- hw/riscv/spike.c | 31 ++++------------------- hw/riscv/virt.c | 46 ++++++----------------------------- 5 files changed, 54 insertions(+), 86 deletions(-) diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h index 81689f418b..6e81d6cd6c 100644 --- a/include/hw/riscv/fdt-common.h +++ b/include/hw/riscv/fdt-common.h @@ -13,4 +13,9 @@ void *create_board_device_tree(const char *model, const c= har *compatible, int *fdt_size); void create_fdt_socket_memory(void *fdt, hwaddr addr, uint64_t size, int socket_id, bool numa_enabled); +void create_fdt_clint(void *fdt, hwaddr addr, uint64_t size, + uint32_t *intc_phandles, int num_harts); +void create_fdt_socket_clint(void *fdt, hwaddr addr, uint64_t size, + int socket_id, uint32_t *intc_phandles, + int num_harts, bool numa_enabled); #endif diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c index 719c36e001..d2661ec389 100644 --- a/hw/riscv/fdt-common.c +++ b/hw/riscv/fdt-common.c @@ -12,6 +12,7 @@ #include "system/device_tree.h" #include "hw/core/boards.h" #include "hw/riscv/fdt-common.h" +#include "target/riscv/cpu_bits.h" =20 void *create_board_device_tree(const char *model, const char *compatible, int *fdt_size) @@ -50,3 +51,35 @@ void create_fdt_socket_memory(void *fdt, hwaddr addr, ui= nt64_t size, qemu_fdt_setprop_cell(fdt, mem_name, "numa-node-id", socket_id); } } + +void create_fdt_socket_clint(void *fdt, hwaddr addr, uint64_t size, + int socket_id, uint32_t *intc_phandles, + int num_harts, bool numa_enabled) +{ + g_autofree uint32_t *clint_cells =3D g_new0(uint32_t, num_harts * 4); + g_autofree char *clint_name =3D NULL; + static const char * const clint_compat[2] =3D { + "sifive,clint0", "riscv,clint0" + }; + + for (int cpu =3D 0; cpu < num_harts; cpu++) { + clint_cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandles[cpu]); + clint_cells[cpu * 4 + 1] =3D cpu_to_be32(IRQ_M_SOFT); + clint_cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandles[cpu]); + clint_cells[cpu * 4 + 3] =3D cpu_to_be32(IRQ_M_TIMER); + } + + clint_name =3D g_strdup_printf("/soc/clint@%"HWADDR_PRIx, addr); + qemu_fdt_add_subnode(fdt, clint_name); + qemu_fdt_setprop_string_array(fdt, clint_name, "compatible", + (char **)&clint_compat, + ARRAY_SIZE(clint_compat)); + qemu_fdt_setprop_sized_cells(fdt, clint_name, "reg", + 2, addr, 2, size); + qemu_fdt_setprop(fdt, clint_name, "interrupts-extended", + clint_cells, num_harts * sizeof(uint32_t) * 4); + + if (numa_enabled) { + qemu_fdt_setprop_cell(fdt, clint_name, "numa-node-id", socket_id); + } +} diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index ce86989bc8..9a791b36d6 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -105,9 +105,6 @@ static void create_fdt(SiFiveUState *s, const MemMapEnt= ry *memmap, uint32_t plic_phandle, prci_phandle, gpio_phandle, phandle =3D 1; uint32_t hfclk_phandle, rtcclk_phandle, phy_phandle; static const char * const ethclk_names[2] =3D { "pclk", "hclk" }; - static const char * const clint_compat[2] =3D { - "sifive,clint0", "riscv,clint0" - }; static const char * const plic_compat[2] =3D { "sifive,plic-1.0.0", "riscv,plic0" }; @@ -180,25 +177,9 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, g_free(nodename); } =20 - cells =3D g_new0(uint32_t, ms->smp.cpus * 4); - for (cpu =3D 0; cpu < ms->smp.cpus; cpu++) { - cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandles[cpu]); - cells[cpu * 4 + 1] =3D cpu_to_be32(IRQ_M_SOFT); - cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandles[cpu]); - cells[cpu * 4 + 3] =3D cpu_to_be32(IRQ_M_TIMER); - } - nodename =3D g_strdup_printf("/soc/clint@%lx", - (long)memmap[SIFIVE_U_DEV_CLINT].base); - qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_string_array(fdt, nodename, "compatible", - (char **)&clint_compat, ARRAY_SIZE(clint_compat)); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_CLINT].base, - 0x0, memmap[SIFIVE_U_DEV_CLINT].size); - qemu_fdt_setprop(fdt, nodename, "interrupts-extended", - cells, ms->smp.cpus * sizeof(uint32_t) * 4); - g_free(cells); - g_free(nodename); + create_fdt_socket_clint(fdt, memmap[SIFIVE_U_DEV_CLINT].base, + memmap[SIFIVE_U_DEV_CLINT].size, 0, + intc_phandles, ms->smp.cpus, false); =20 nodename =3D g_strdup_printf("/soc/otp@%lx", (long)memmap[SIFIVE_U_DEV_OTP].base); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 82005ec163..b15188fb07 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -58,13 +58,10 @@ static void create_fdt(SpikeState *s, const MemMapEntry= *memmap, unsigned long clint_addr; int cpu, socket; MachineState *ms =3D MACHINE(s); - uint32_t *clint_cells; uint32_t cpu_phandle, phandle =3D 1; - char *clint_name, *clust_name; + char *clust_name; char *core_name, *cpu_name, *intc_name; - static const char * const clint_compat[2] =3D { - "sifive,clint0", "riscv,clint0" - }; + bool numa_enabled =3D riscv_numa_enabled(ms); =20 fdt =3D ms->fdt =3D create_board_device_tree("ucbbar,spike-bare,qemu", "ucbbar,spike-bare-dev", &fdt_size); @@ -136,29 +133,11 @@ static void create_fdt(SpikeState *s, const MemMapEnt= ry *memmap, create_fdt_socket_memory(fdt, memaddr, memsize, socket, riscv_numa_enabled(ms)); =20 - clint_cells =3D g_new0(uint32_t, s->soc[socket].num_harts * 4); - - for (cpu =3D 0; cpu < s->soc[socket].num_harts; cpu++) { - clint_cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandles[cpu]); - clint_cells[cpu * 4 + 1] =3D cpu_to_be32(IRQ_M_SOFT); - clint_cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandles[cpu]); - clint_cells[cpu * 4 + 3] =3D cpu_to_be32(IRQ_M_TIMER); - } - clint_addr =3D memmap[SPIKE_CLINT].base + (memmap[SPIKE_CLINT].size * socket); - clint_name =3D g_strdup_printf("/soc/clint@%lx", clint_addr); - qemu_fdt_add_subnode(fdt, clint_name); - qemu_fdt_setprop_string_array(fdt, clint_name, "compatible", - (char **)&clint_compat, ARRAY_SIZE(clint_compat)); - qemu_fdt_setprop_cells(fdt, clint_name, "reg", - 0x0, clint_addr, 0x0, memmap[SPIKE_CLINT].size); - qemu_fdt_setprop(fdt, clint_name, "interrupts-extended", - clint_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); - riscv_socket_fdt_write_id(ms, clint_name, socket); - - g_free(clint_name); - g_free(clint_cells); + create_fdt_socket_clint(fdt, clint_addr, memmap[SPIKE_CLINT].size, + socket, intc_phandles, + s->soc[socket].num_harts, numa_enabled); g_free(clust_name); } =20 diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index df3eadef78..b134f11266 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -302,42 +302,6 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, = int socket, } } =20 -static void create_fdt_socket_clint(RISCVVirtState *s, - int socket, - uint32_t *intc_phandles) -{ - int cpu; - g_autofree char *clint_name =3D NULL; - g_autofree uint32_t *clint_cells =3D NULL; - hwaddr clint_addr; - MachineState *ms =3D MACHINE(s); - static const char * const clint_compat[2] =3D { - "sifive,clint0", "riscv,clint0" - }; - - clint_cells =3D g_new0(uint32_t, s->soc[socket].num_harts * 4); - - for (cpu =3D 0; cpu < s->soc[socket].num_harts; cpu++) { - clint_cells[cpu * 4 + 0] =3D cpu_to_be32(intc_phandles[cpu]); - clint_cells[cpu * 4 + 1] =3D cpu_to_be32(IRQ_M_SOFT); - clint_cells[cpu * 4 + 2] =3D cpu_to_be32(intc_phandles[cpu]); - clint_cells[cpu * 4 + 3] =3D cpu_to_be32(IRQ_M_TIMER); - } - - clint_addr =3D s->memmap[VIRT_CLINT].base + - s->memmap[VIRT_CLINT].size * socket; - clint_name =3D g_strdup_printf("/soc/clint@%"HWADDR_PRIx, clint_addr); - qemu_fdt_add_subnode(ms->fdt, clint_name); - qemu_fdt_setprop_string_array(ms->fdt, clint_name, "compatible", - (char **)&clint_compat, - ARRAY_SIZE(clint_compat)); - qemu_fdt_setprop_sized_cells(ms->fdt, clint_name, "reg", - 2, clint_addr, 2, s->memmap[VIRT_CLINT].size); - qemu_fdt_setprop(ms->fdt, clint_name, "interrupts-extended", - clint_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); - riscv_socket_fdt_write_id(ms, clint_name, socket); -} - static void create_fdt_socket_aclint(RISCVVirtState *s, int socket, uint32_t *intc_phandles) @@ -728,6 +692,7 @@ static void create_fdt_sockets(RISCVVirtState *s, uint32_t xplic_phandles[MAX_NODES]; g_autofree uint32_t *intc_phandles =3D NULL; int socket_count =3D riscv_socket_count(ms); + bool numa_enabled =3D riscv_numa_enabled(ms); =20 qemu_fdt_add_subnode(ms->fdt, "/cpus"); qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency", @@ -762,8 +727,13 @@ static void create_fdt_sockets(RISCVVirtState *s, create_fdt_socket_aclint(s, socket, &intc_phandles[phandle_pos]); } else if (tcg_enabled()) { - create_fdt_socket_clint(s, socket, - &intc_phandles[phandle_pos]); + hwaddr clintaddr =3D s->memmap[VIRT_CLINT].base + + s->memmap[VIRT_CLINT].size * socket; + + create_fdt_socket_clint(ms->fdt, clintaddr, + s->memmap[VIRT_CLINT].size, + socket, &intc_phandles[phandle_pos], + s->soc[socket].num_harts, numa_enabled= ); } } =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781606129; cv=none; d=zohomail.com; s=zohoarc; b=Ef2/vm9UTxZNODpKFLx0y7LConPrTD01yhQyv3aMp37syS2VqlBgAcSN6K6sYe22XjonPJUBcVYYLFxZc86SnL9e7zq8sIS57kGGkVkv02axhJvvWePpD49RBciT86g8pVywiN5GUSl94gfBuqJ7WwyYdD9Da4UPx9EocNnJoHs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781606129; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=V89OmXjJ6i0x2VVOQnLfX1TIcadCG73wFIW02DeqfbQ=; b=jg7lTNOOBilotbaqkreuTlaegEhNd4sD8jAG3OlhPY4XXBfV2mmGZPIs6Ydz+nUCz0hv/R9m2Ifs2gfUxYpMRUcl7Otrdx+OgGFPbcg9RZP0SJDhDmncwHuC40ioT3x3bznWsivnKcEzwjTaq2fIIMBk1fV1g4WA38qO+7YVzwE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781606129135179.49778017450694; Tue, 16 Jun 2026 03:35:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQkG-0002OX-BB; Tue, 16 Jun 2026 06:10:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQkE-00029R-4L for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:10 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQkC-0004Q2-0X for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:09 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-c8585c51f1fso1923239a12.1 for ; Tue, 16 Jun 2026 03:10:07 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.10.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604606; x=1782209406; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=V89OmXjJ6i0x2VVOQnLfX1TIcadCG73wFIW02DeqfbQ=; b=MblsKFVzinoJBx/AgzGkcDk2KMjqWsw0jpWq4/La/pORDAj4Ft2BKnlqGNrqu/C1CU auD0srLrICzmxG+3+DE+LCGZCPg6hAZrT0V2aw6XUXSmFujMzvv4rsQlb75bXqNglOHx Ul6MCHqLURRtdhaDrxd69CyE9c+jwocSNQ0Z4TKsPo+ygLWFDW9TDrdtCPJIc1Wl7HdX WmNVRg1PXONvhcByP6054IBGwAso5YM2Y7C4Z42zWoi3HVeK1/k1TyFn7AL3Q01J1SLK SCuVCOwIHnGqvm7Q8M0HqpLCWvZKCV0ObAtacneww4WrOP/wHnjS2VQEPGDjzCPRR9UM Vvrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604606; x=1782209406; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=V89OmXjJ6i0x2VVOQnLfX1TIcadCG73wFIW02DeqfbQ=; b=sVdErzJujYX4k+E8kTdxNgnJMJAEPmD37xbOCPApFeIUI1BuBnBj5Xh2bwExvmR0zs kws5bxu8hQOz+g1K8YlVlnhAn0Q1OCzGcfDe1hI65b4YlMhUAUM5GaNmu/SeDr7HWVIb bKvGyoF6yzR1lXFSqoMZfBgppNy02ebLrl8JlMSl57DHraFUUeof1rXPlZcATO0oo66E W3D1Md2PRiuHUpTiyAXc/3njNWBtERifM7zEQbEmqygvELxl02jwPACvZH8yuK/3yWnl 1JIOp5rmSsbDm2arwTjS3oA4W8s3srW14eUQJeoy8i3Srnvh5lCqmWEIr/uth3DVTQos yEnQ== X-Gm-Message-State: AOJu0YzX65iQ1Nk8jrmPcWujeNyix7ic4GuFyeEX0PyHP6db6iz7P2Mu rwpczomR/whx3bsCszVShu5wWS0jyHPIFdLzoTxsSOHlyGFzIGGl+QAYpnx7WLCO X-Gm-Gg: Acq92OGZ0LHQnOZ9fotmR9ztr2MZlTwf2u5cwhOlxJ60206jmOh9LOJVabG/c0tqgmM u66O9tgzG7eN+7o6t9Zl/vovej/6wnULoN4Mj8QLLNbhUOGcRf2Tum1jnPmFDGtkA/X5XQU/jhj b+o6ORN9bu0+6lXMLnHsUn1kWZEfvSZfYNJ1OGWzfhOp5X7GibRbSMekpYOw54LZ8nKXlStar4n bTn3bxAoIIjbu5dlzrQUUECMmYSMgb88k9pYqna04vAG/Zyln2n4lVnhqEC9EyjLdK5c9g8ciJA a5FpKy2piM7ZUCLNI675r/GnCSzqQGwVxjv3uL7rpGwHMFZVYOgIR5A4z5zBp4ptf33aSdk5hUJ R/Z9Dxn0i4IpYfkyuBrovc+qrTiuE5ZNvlXiggoJ1g86aw/4CGGiPm+wF5mc4bBVCI3+tCMQaLV cw5i1WljS3IGU70QQaDB1BXv/7tpGan/vOf3SkVc5l X-Received: by 2002:a05:6a21:2d07:b0:3b3:ccd0:cf62 with SMTP id adf61e73a8af0-3b7e266e35bmr2847178637.36.1781604606556; Tue, 16 Jun 2026 03:10:06 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 78/83] hw/riscv/sifive_u.c: add cpu-map, cluster and core DTs Date: Tue, 16 Jun 2026 20:05:21 +1000 Message-ID: <20260616100527.1939565-79-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=alistair23@gmail.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781606129528158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza We want to consolidate the CPU socket FDT creation into a single helper. 'virt' and spike has the same code but sifive_u does not have cpu-map, cluster and core subnodes. These subnodes are present in other boards even in single socket configs without NUMA. This is a strong indicator that their presence doesn't hurt a NUMA-less board like sifive_u. Add these DTs to make the FDT standardization straightforward. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-9-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/sifive_u.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 9a791b36d6..a4265fed0f 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -109,6 +109,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEnt= ry *memmap, "sifive,plic-1.0.0", "riscv,plic0" }; g_autofree uint32_t *intc_phandles =3D g_new0(uint32_t, ms->smp.cpus); + g_autofree char *clust_name =3D NULL; =20 fdt =3D ms->fdt =3D create_board_device_tree("SiFive HiFive Unleashed = A00", "sifive,hifive-unleashed-a00", &s->fdt_size); @@ -143,11 +144,17 @@ static void create_fdt(SiFiveUState *s, const MemMapE= ntry *memmap, CLINT_TIMEBASE_FREQ); qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0); qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1); + qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); + + clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", 0); + qemu_fdt_add_subnode(fdt, clust_name); =20 for (cpu =3D ms->smp.cpus - 1; cpu >=3D 0; cpu--) { int cpu_phandle =3D phandle++; nodename =3D g_strdup_printf("/cpus/cpu@%d", cpu); char *intc =3D g_strdup_printf("/cpus/cpu@%d/interrupt-controller"= , cpu); + g_autofree char *core_name =3D NULL; + qemu_fdt_add_subnode(fdt, nodename); /* cpu 0 is the management hart that does not have mmu */ if (cpu !=3D 0) { @@ -173,6 +180,11 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc"); qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0); qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1); + + core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); + qemu_fdt_add_subnode(fdt, core_name); + qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); + g_free(intc); g_free(nodename); } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605367; cv=none; d=zohomail.com; s=zohoarc; b=WP9ZnnI4uM7DuA5bAXvnTd+Z7keCCh1ycNu/g5amVwoGcHy3Bg6fgEwTlS4bIE+40gDZgbAx7Xug0Ps1ekB3rueVEYnyTVW1119VjRkrP8WpRLvAq8O8YQmDJvvZ+0zPdRLku0ejjcXyFY0cUwOEL6BWo1ZpbYilkP5QuWTrsbk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605367; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pDcBqXOk+JVQEs3ga9uCnVy4SK8KaG7zGbX66L90UAg=; b=Z1KddSSnZ2dO7xdjskxG7LCNMBGil7qpQqk3xMwjx0j/RxiNUkrcVNdGD2Gd1h7k4SISHCH+QyCCWPaUKmKfNZXg61uVb6pFBhyGpTCfZ1sez5KhegpOuqGYd4pCIvvud8YYyArM9kppX15BYAgtLKOwVLPMZ7j2oXR0qWjvgbI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178160536778519.743782172016267; Tue, 16 Jun 2026 03:22:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQkJ-0002q8-9N; Tue, 16 Jun 2026 06:10:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQkH-0002cu-Jw for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:13 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQkF-0004Qf-Aw for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:13 -0400 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-c8585c51f1fso1923285a12.1 for ; Tue, 16 Jun 2026 03:10:10 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.10.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604610; x=1782209410; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pDcBqXOk+JVQEs3ga9uCnVy4SK8KaG7zGbX66L90UAg=; b=O7WRxs1USbeTXl1fm66NlsBh7LQ5j5JWSFrxLg56e9hYX49TfN9u8NrPXnxeAZeYtU 2jeNE1CWDbN7n6DMnE+PYM885DkdJM7ZhScmyR29zUPqZfYqmH7VHLwUV2gwfUkTergj 2WK0HyaWEsmW9Kzynx5R3pUZuf0XAa5KSdzNezHnL4qzw2OQHc5Mw30BeTUJdj/ShUE+ 90OXVDJzlFjjUPrdDg5ellCQjgDuhnIQfZtAikPjtF73aAndBHZVhGMH1VqRtPh5+Fl5 qrvV57/KNi7RIYctGfpOZ2rNq1G2CSxYiHhm6P5sHNW+YHxHFR2nk63j4jhF7Ui8K2rq qFlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604610; x=1782209410; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=pDcBqXOk+JVQEs3ga9uCnVy4SK8KaG7zGbX66L90UAg=; b=f/PSmbto9btF9Zkl18Or6sUJ3iKuPz+/Di//WWcS8FeJn0T0aHnIZfx3XHJJwNjlC8 4+Ua7yiQXDyIeuc2LKFFirmdGShymN9idxTDk9zBUeO0Onlu2pky2NaVgJi1+TujDYH9 WI/zlcjLBTeX4Mzif996mIU9vxKRbNKTl9sjQduFFxB6BDRtcSJxgETRDzhBezD3ydW8 OZK7jFSIJ4jAW7qRra65sM1Mx9cYckYIhImb+w0c6Q1HxirOoEbT2Y9fDIT9xnGWhCpu iZxvBMTxPuSjrxPkaprvEHz4bH+lFLjpIDmk0qgGdi1Am1+ojHM3u63uPSW5JK6wFjvp HeDQ== X-Gm-Message-State: AOJu0YyOm8rNphfT0O2Ggj0WTWYGV5jDY68Fe5PVkcNLDs5LxgXTrgtt LZL5gGvkq84ueIfGGcQvB8vhcoNHM3n8fT+s2vAtXwmYMmu1Tqeoin6OQVetgZwL X-Gm-Gg: Acq92OFJjC0GuEBwLhpSZL9XOFi3q7U3oRHHzFtKDmnGgC7UzvYbhrJC0AozHCqWRKO w3vn+w3BbT/tDZsYwJvPM1KZOs5avLCqSn8T52mJ4pkvHle0tQBDgpk9j3MSGDjV8QLTUod1iv3 OtWWMOKl+EtZXIFfBFNvASlT0JuWuWbfHshYe6M+gpi6aBlYCLDGX2r/go8u3r5H9UNwPjvOIU3 6frAvRT2GvnAFxQRGsZ9ig4Uc3BQ+RPtCgKiTDhHijj5+Ya3YR+puwA24jfacgE9fYst0u9UkU0 POiiqpgHr3LGG+wR6PoNTwRw9EDOXjS7yRMj8yQxmaqbLcyQRNWvladLjsMtXW6rNt6Pw2FtADV uwb7swTjnnVPuOLjkYSkGtq6qU5+RvMjiy5MW0mkgoyViFho2cJBfw5ECE5u00cOY5jYizagkg6 wm6dClkjrTgOngIUG9rrdCZOXtnAeegw+uEQZrzMRt X-Received: by 2002:a05:6a20:9f43:b0:3a2:ed4a:5d7e with SMTP id adf61e73a8af0-3b7e2494868mr2967541637.22.1781604609766; Tue, 16 Jun 2026 03:10:09 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 79/83] hw/riscv: add fdt_create_cpu_socket_subnode() helper Date: Tue, 16 Jun 2026 20:05:22 +1000 Message-ID: <20260616100527.1939565-80-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=alistair23@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605368596158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Consolidate the '/cpus' FDT root node creation into a single place. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-10-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- include/hw/riscv/fdt-common.h | 1 + hw/riscv/fdt-common.c | 10 ++++++++++ hw/riscv/sifive_u.c | 7 +------ hw/riscv/spike.c | 7 +------ hw/riscv/virt.c | 11 +++-------- 5 files changed, 16 insertions(+), 20 deletions(-) diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h index 6e81d6cd6c..27020e69c6 100644 --- a/include/hw/riscv/fdt-common.h +++ b/include/hw/riscv/fdt-common.h @@ -18,4 +18,5 @@ void create_fdt_clint(void *fdt, hwaddr addr, uint64_t si= ze, void create_fdt_socket_clint(void *fdt, hwaddr addr, uint64_t size, int socket_id, uint32_t *intc_phandles, int num_harts, bool numa_enabled); +void fdt_create_cpu_socket_subnode(void *fdt, uint64_t timebase_frequency); #endif diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c index d2661ec389..02ac9ddcd8 100644 --- a/hw/riscv/fdt-common.c +++ b/hw/riscv/fdt-common.c @@ -83,3 +83,13 @@ void create_fdt_socket_clint(void *fdt, hwaddr addr, uin= t64_t size, qemu_fdt_setprop_cell(fdt, clint_name, "numa-node-id", socket_id); } } + +void fdt_create_cpu_socket_subnode(void *fdt, uint64_t timebase_frequency) +{ + qemu_fdt_add_subnode(fdt, "/cpus"); + qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", + timebase_frequency); + qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0); + qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1); + qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); +} diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index a4265fed0f..27c1a74d99 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -139,12 +139,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, create_fdt_socket_memory(fdt, memmap[SIFIVE_U_DEV_DRAM].base, ms->ram_size, 0, false); =20 - qemu_fdt_add_subnode(fdt, "/cpus"); - qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", - CLINT_TIMEBASE_FREQ); - qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0); - qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1); - qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); + fdt_create_cpu_socket_subnode(fdt, CLINT_TIMEBASE_FREQ); =20 clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", 0); qemu_fdt_add_subnode(fdt, clust_name); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index b15188fb07..ee8232f734 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -73,12 +73,7 @@ static void create_fdt(SpikeState *s, const MemMapEntry = *memmap, 0x0, memmap[SPIKE_HTIF].base, 0x0, memmap[SPIKE_HTIF].size); } =20 - qemu_fdt_add_subnode(fdt, "/cpus"); - qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", - RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ); - qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0); - qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1); - qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); + fdt_create_cpu_socket_subnode(fdt, RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ); =20 for (socket =3D (riscv_socket_count(ms) - 1); socket >=3D 0; socket--)= { g_autofree uint32_t *intc_phandles =3D g_new0(uint32_t, diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index b134f11266..6641b60131 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -694,14 +694,9 @@ static void create_fdt_sockets(RISCVVirtState *s, int socket_count =3D riscv_socket_count(ms); bool numa_enabled =3D riscv_numa_enabled(ms); =20 - qemu_fdt_add_subnode(ms->fdt, "/cpus"); - qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency", - kvm_enabled() ? - kvm_riscv_get_timebase_frequency(&s->soc->harts[= 0]) : - RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ); - qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); - qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); - qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); + fdt_create_cpu_socket_subnode(ms->fdt, + kvm_enabled() ? kvm_riscv_get_timebase_frequency(&s->soc->harts[0]= ) : + RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ); =20 intc_phandles =3D g_new0(uint32_t, ms->smp.cpus); =20 --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781607121; cv=none; d=zohomail.com; s=zohoarc; b=k6OK0GL7Uw6BrMgByoIGCCJDrvgpVJV25o0CSssceqPURcsEhJQRUY0s3ry5LfzrBjrYi8weE3g8ThsbwHmWaH+bsP49D0pGlEfS8FbO0egHl2q26nS3SajIUJAYhpbV9aL3QllTLcuB5sR4dvRb7EDbXiX1IIBtXAfBWnFCIdI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781607121; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=i1xwmUA9TTjHMmivkF2u3G7PEJxmulZlpojz/NCNHBo=; b=hxYgyy5AkooK41hEis7YeoI8fHvuwyuAtK9/2t+s9Ug+tHLE7qs/2BTWWGgJWPs4auqRuSnlmk1aKIuc4kCdQxJWI2B4Hu7Fq9d3xH6H0Lz2Ixg6b7R++hrXFJMBIOiZRvGcD8KHAigeImWrA3Uh5EfSZFLgYEYIvzUrJwEc15c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781607121730862.335702012006; Tue, 16 Jun 2026 03:52:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQkO-0003UT-JF; Tue, 16 Jun 2026 06:10:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQkK-00035V-NK for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:16 -0400 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQkI-0004R8-Cs for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:16 -0400 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-c858b5de728so2760101a12.0 for ; Tue, 16 Jun 2026 03:10:13 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.10.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604613; x=1782209413; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=i1xwmUA9TTjHMmivkF2u3G7PEJxmulZlpojz/NCNHBo=; b=aXNmygzRrdEI5sIDHyT8aFWir4XwKD/3srWpY8o/tsbiRlsoUZk/LV3eFV+B/HH3vj iS+GRa2Kbv7rZcE2C1KYtBXaYoBl2hPzh3ZRYaR3j0Sc7W7pFWsbdMOJMhZfV01Fv4n6 Lvslsk5PrmucWqCsUXcOk8ueiKrd+rQOGwUz0hB/5LQc8oxK7ctPINwcDjJtmumTX546 WDM9wnOkYO+LR+RmvzB1QNjbFmtX9EbpXeJbCHIIZ4bn8RVXR3y/jKqlVkh/KFAsvkqF +5tY0JAUuqELTuM3aCgcESUMPqY5BV8Z1hoXU2IO2lNLbrV0o8GnzdlRO9ktcpGJcfC3 faVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604613; x=1782209413; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=i1xwmUA9TTjHMmivkF2u3G7PEJxmulZlpojz/NCNHBo=; b=oUqZd5Bv2rQv8RTFLOMkI6mev+r8CHPGN9vzc7eeeqL5w3U3g2cRDyGwBBYa073X/r qT2tDnAnNfUN4Gd7xmJ5ECAc1zNP/e5n1GkKJUbk8BNbdIgiz8F1CfW+MSC2RK1NQ/WF ZGxliik/BdJuPtV3roJVCy1mZR08YIK5xR12KMK/MD3IKAnd7k/LT/2dmnIVWvC5/2H9 3dos/2p6iEayNP47C+dSEG8+fGP98LPKWALp1xoZ4DgeDW0umH3QVHHYfCC0NxFmE+J9 qhOaBspAsTL0oRm/F9BDrlupReEjDbMmmGLdx6zMbi1J35a/ZhpffqxDHOkX5rejiwDB cpYQ== X-Gm-Message-State: AOJu0YwHE52yDU043tZlMNMACnfXupGe557I/pKzmLOO8+82RKPnuSsc iUYRrStCl8fvOXJFPcRv9Dzwo5mboqg8DRDx4WXsrkvqJveGaN2DlhQyDiTph88Q X-Gm-Gg: Acq92OGqxe3YUm8TO+kVS91AXIed48TL2udbQ21KJCxdxV3QCaLk+ENzGmlkwGeh8bc TgS5h9pJyqo1umyZyXuogdQvfabq0ayyzHS2fNXzYAF0+ha41a/1muno/ccUZ+btItcNYWomGmx Mpr5INzRMV7Qj7WvN7KdHwzAsR+rP4LahZGHIOnV8BTvJoyH1dCUvspdXDXoJdL1+1Gd5UdYjnR 2tpMsnIHvcNuagPPtDKwTFo/fEQO0ejgPnx8TsMiLR5UbB9wuV48AWncQUbbLejEqBinBy9vnsz IYYYqbednJgwOcjVmQbL0V/JqHJaVy+Qs/ALCU44jg+CNNuypcPN9GseiUWq45o4woSXgLrjWBr Pivof3BK8UuNyhOTO9/m/MIEfY5XBNbpUWo2Nj7JV8RbJxJeQYLqWLXis1OCujlcZlQZNfk0Uow 2pHtWmY22Tg9w4rHnuB0RFqgWv9cgajnU/tO8nfYru X-Received: by 2002:a05:6a21:4a98:b0:3a2:dabf:fef9 with SMTP id adf61e73a8af0-3b79636162cmr15790843637.27.1781604612862; Tue, 16 Jun 2026 03:10:12 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 80/83] hw/riscv: add create_fdt_socket_cpus() Date: Tue, 16 Jun 2026 20:05:23 +1000 Message-ID: <20260616100527.1939565-81-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781607122486158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Consolidate the creation of CPUs socket FDT in a helper that can be shared across all boards. The code was basically moved from the function with the same name from 'virt.c', with additional bits to create the cluster subnode beforehand. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-11-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- include/hw/riscv/fdt-common.h | 7 +++ hw/riscv/fdt-common.c | 74 +++++++++++++++++++++++++++++++ hw/riscv/virt.c | 83 +++-------------------------------- 3 files changed, 87 insertions(+), 77 deletions(-) diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h index 27020e69c6..3af9d5c3fd 100644 --- a/include/hw/riscv/fdt-common.h +++ b/include/hw/riscv/fdt-common.h @@ -9,6 +9,8 @@ #ifndef RISCV_VIRT_FDT_H #define RISCV_VIRT_FDT_H =20 +#include "target/riscv/cpu.h" + void *create_board_device_tree(const char *model, const char *compatible, int *fdt_size); void create_fdt_socket_memory(void *fdt, hwaddr addr, uint64_t size, @@ -19,4 +21,9 @@ void create_fdt_socket_clint(void *fdt, hwaddr addr, uint= 64_t size, int socket_id, uint32_t *intc_phandles, int num_harts, bool numa_enabled); void fdt_create_cpu_socket_subnode(void *fdt, uint64_t timebase_frequency); +void create_fdt_socket_cpus(void *fdt, RISCVCPU *socket_harts, + int socket_id, int num_harts_socket, + int socket_hartid_base, uint32_t *phandle, + uint32_t *intc_phandles, bool numa_enabled, + bool is_32_bit); #endif diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c index 02ac9ddcd8..6c795409a4 100644 --- a/hw/riscv/fdt-common.c +++ b/hw/riscv/fdt-common.c @@ -93,3 +93,77 @@ void fdt_create_cpu_socket_subnode(void *fdt, uint64_t t= imebase_frequency) qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1); qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); } + +void create_fdt_socket_cpus(void *fdt, RISCVCPU *socket_harts, + int socket_id, int num_harts_socket, + int socket_hartid_base, uint32_t *phandle, + uint32_t *intc_phandles, bool numa_enabled, + bool is_32_bit) +{ + g_autofree char *clust_name =3D NULL; + uint32_t cpu_phandle; + + clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket_id); + qemu_fdt_add_subnode(fdt, clust_name); + + for (int cpu =3D num_harts_socket - 1; cpu >=3D 0; cpu--) { + RISCVCPU *cpu_ptr =3D &socket_harts[cpu]; + int8_t satp_mode_max =3D cpu_ptr->cfg.max_satp_mode; + g_autofree char *cpu_name =3D NULL; + g_autofree char *core_name =3D NULL; + g_autofree char *intc_name =3D NULL; + + cpu_phandle =3D (*phandle)++; + + cpu_name =3D g_strdup_printf("/cpus/cpu@%d", socket_hartid_base + = cpu); + qemu_fdt_add_subnode(fdt, cpu_name); + + if (satp_mode_max !=3D -1) { + g_autofree char *sv_name =3D NULL; + sv_name =3D g_strdup_printf("riscv,%s", + satp_mode_str(satp_mode_max, is_32_b= it)); + qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", sv_name); + } + riscv_isa_write_fdt(cpu_ptr, fdt, cpu_name); + + if (cpu_ptr->cfg.ext_zicbom) { + qemu_fdt_setprop_cell(fdt, cpu_name, "riscv,cbom-block-size", + cpu_ptr->cfg.cbom_blocksize); + } + + if (cpu_ptr->cfg.ext_zicboz) { + qemu_fdt_setprop_cell(fdt, cpu_name, "riscv,cboz-block-size", + cpu_ptr->cfg.cboz_blocksize); + } + + if (cpu_ptr->cfg.ext_zicbop) { + qemu_fdt_setprop_cell(fdt, cpu_name, "riscv,cbop-block-size", + cpu_ptr->cfg.cbop_blocksize); + } + + qemu_fdt_setprop_string(fdt, cpu_name, "compatible", "riscv"); + qemu_fdt_setprop_string(fdt, cpu_name, "status", "okay"); + qemu_fdt_setprop_cell(fdt, cpu_name, "reg", + socket_hartid_base + cpu); + qemu_fdt_setprop_string(fdt, cpu_name, "device_type", "cpu"); + if (numa_enabled) { + qemu_fdt_setprop_cell(fdt, cpu_name, "numa-node-id", socket_id= ); + } + qemu_fdt_setprop_cell(fdt, cpu_name, "phandle", cpu_phandle); + + intc_phandles[cpu] =3D (*phandle)++; + + intc_name =3D g_strdup_printf("%s/interrupt-controller", cpu_name); + qemu_fdt_add_subnode(fdt, intc_name); + qemu_fdt_setprop_cell(fdt, intc_name, "phandle", + intc_phandles[cpu]); + qemu_fdt_setprop_string(fdt, intc_name, "compatible", + "riscv,cpu-intc"); + qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1); + + core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); + qemu_fdt_add_subnode(fdt, core_name); + qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); + } +} diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 6641b60131..33775a61fd 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -231,77 +231,6 @@ static void create_pcie_irq_map(RISCVVirtState *s, voi= d *fdt, char *nodename, 0x1800, 0, 0, 0x7); } =20 -static void create_fdt_socket_cpus(RISCVVirtState *s, int socket, - char *clust_name, uint32_t *phandle, - uint32_t *intc_phandles) -{ - int cpu; - uint32_t cpu_phandle; - MachineState *ms =3D MACHINE(s); - bool is_32_bit =3D riscv_is_32bit(&s->soc[0]); - - for (cpu =3D s->soc[socket].num_harts - 1; cpu >=3D 0; cpu--) { - RISCVCPU *cpu_ptr =3D &s->soc[socket].harts[cpu]; - int8_t satp_mode_max =3D cpu_ptr->cfg.max_satp_mode; - g_autofree char *cpu_name =3D NULL; - g_autofree char *core_name =3D NULL; - g_autofree char *intc_name =3D NULL; - g_autofree char *sv_name =3D NULL; - - cpu_phandle =3D (*phandle)++; - - cpu_name =3D g_strdup_printf("/cpus/cpu@%d", - s->soc[socket].hartid_base + cpu); - qemu_fdt_add_subnode(ms->fdt, cpu_name); - - if (satp_mode_max !=3D -1) { - sv_name =3D g_strdup_printf("riscv,%s", - satp_mode_str(satp_mode_max, is_32_b= it)); - qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", sv_name= ); - } - - riscv_isa_write_fdt(cpu_ptr, ms->fdt, cpu_name); - - if (cpu_ptr->cfg.ext_zicbom) { - qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbom-block-siz= e", - cpu_ptr->cfg.cbom_blocksize); - } - - if (cpu_ptr->cfg.ext_zicboz) { - qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cboz-block-siz= e", - cpu_ptr->cfg.cboz_blocksize); - } - - if (cpu_ptr->cfg.ext_zicbop) { - qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbop-block-siz= e", - cpu_ptr->cfg.cbop_blocksize); - } - - qemu_fdt_setprop_string(ms->fdt, cpu_name, "compatible", "riscv"); - qemu_fdt_setprop_string(ms->fdt, cpu_name, "status", "okay"); - qemu_fdt_setprop_cell(ms->fdt, cpu_name, "reg", - s->soc[socket].hartid_base + cpu); - qemu_fdt_setprop_string(ms->fdt, cpu_name, "device_type", "cpu"); - riscv_socket_fdt_write_id(ms, cpu_name, socket); - qemu_fdt_setprop_cell(ms->fdt, cpu_name, "phandle", cpu_phandle); - - intc_phandles[cpu] =3D (*phandle)++; - - intc_name =3D g_strdup_printf("%s/interrupt-controller", cpu_name); - qemu_fdt_add_subnode(ms->fdt, intc_name); - qemu_fdt_setprop_cell(ms->fdt, intc_name, "phandle", - intc_phandles[cpu]); - qemu_fdt_setprop_string(ms->fdt, intc_name, "compatible", - "riscv,cpu-intc"); - qemu_fdt_setprop(ms->fdt, intc_name, "interrupt-controller", NULL,= 0); - qemu_fdt_setprop_cell(ms->fdt, intc_name, "#interrupt-cells", 1); - - core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); - qemu_fdt_add_subnode(ms->fdt, core_name); - qemu_fdt_setprop_cell(ms->fdt, core_name, "cpu", cpu_phandle); - } -} - static void create_fdt_socket_aclint(RISCVVirtState *s, int socket, uint32_t *intc_phandles) @@ -693,6 +622,7 @@ static void create_fdt_sockets(RISCVVirtState *s, g_autofree uint32_t *intc_phandles =3D NULL; int socket_count =3D riscv_socket_count(ms); bool numa_enabled =3D riscv_numa_enabled(ms); + bool is_32_bit =3D riscv_is_32bit(&s->soc[0]); =20 fdt_create_cpu_socket_subnode(ms->fdt, kvm_enabled() ? kvm_riscv_get_timebase_frequency(&s->soc->harts[0]= ) : @@ -702,18 +632,17 @@ static void create_fdt_sockets(RISCVVirtState *s, =20 phandle_pos =3D ms->smp.cpus; for (socket =3D (socket_count - 1); socket >=3D 0; socket--) { - g_autofree char *clust_name =3D NULL; hwaddr memaddr =3D s->memmap[VIRT_DRAM].base + riscv_socket_mem_offset(ms, socket); uint64_t memsize =3D riscv_socket_mem_size(ms, socket); =20 phandle_pos -=3D s->soc[socket].num_harts; =20 - clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket); - qemu_fdt_add_subnode(ms->fdt, clust_name); - - create_fdt_socket_cpus(s, socket, clust_name, phandle, - &intc_phandles[phandle_pos]); + create_fdt_socket_cpus(ms->fdt, (&s->soc[socket])->harts, socket, + s->soc[socket].num_harts, + s->soc[socket].hartid_base, + phandle, &intc_phandles[phandle_pos], + numa_enabled, is_32_bit); =20 create_fdt_socket_memory(ms->fdt, memaddr, memsize, socket, riscv_numa_enabled(ms)); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781605981; cv=none; d=zohomail.com; s=zohoarc; b=IeViOFba+shVxBgZPwc/pV0ddDWct4Qm53N/vj8LJIqClwAlCquibmNnISgZoRsmsNG5coY3dqgxoDgFaVyDnG3QDkXzcb6R0yMcLOKtog4g4vaYgaQvvPvQUTTC55KyVfP+MkJ3o+GcpEVA/t6dmLKXFjNhPAaFvqQEwBquZV0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781605981; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ecx+vduJBeK0LpzbCfn4pNXqX2YQoNqsLsnMHFPsvdk=; b=f4RQNKNbvy8quBCLU4vsqeVEznQnlBJiKEOh9OZKTj2lWam8QwQuFDX/J2esR5791nbkywxuY96JGl51uwUBHMc+8L45hQ7dMCWS0IYTjJuTgIWcuWQzxH1ZGSctP9bIEaig/pYUdQj46L6cFFjqGErOllMtPGdA8N5/OCcgsK8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781605981598227.37324595746702; Tue, 16 Jun 2026 03:33:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQkQ-0003hA-Db; Tue, 16 Jun 2026 06:10:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQkN-0003OW-EH for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:19 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQkL-0004RQ-9g for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:19 -0400 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-36b8d414666so2696411a91.3 for ; Tue, 16 Jun 2026 03:10:16 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.10.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604616; x=1782209416; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ecx+vduJBeK0LpzbCfn4pNXqX2YQoNqsLsnMHFPsvdk=; b=HIqB272RupUquke4qvborYjEcJnnMHJ1Gw9n1Jgr5z/EtfHsYT0FkCfaPEwEqxip7J qZmyx1CqkndpWK8C0UFeInW7kZikMintd/755/7/XBtNHdjdSIWASrOeaCge1isLpP+4 ngsXNF5FeyEBIwfTWK8RDJUsvKmaMoJkffZZXvBEEgBbbR1wD0Lfb+cUpgcMVPLcYjyH Som8c8WQRzrwU1lHQ7Sri3xZsSidIi7MlsYkWU1vFxiJieV56d7GbLVy9Fu4rM349jPC +nPb9rA3hbGbG8+3vLXztiXYl1oL+71K1yE0dJfQOqCmV5FMc1bkH2Cg3TuqSzvATngF GNZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604616; x=1782209416; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ecx+vduJBeK0LpzbCfn4pNXqX2YQoNqsLsnMHFPsvdk=; b=SqCFNr06iN1aRzv64VsYGmsovo8E5J0FMOBuVCC8cFDm6U02AbtocREenxqeThcGLD wzLQy9pKZuy22PjH1/HYd/D41IpeNlWErOFGbo7sOaULwGXk4xSzsFf6FvzGek1SZO0o lGxfzUVeZP8Bgc1Npgktsateq6dvr463sGbXalSBxD/jTv0C9ygGSb6D0+UOmz/gw06U ml3YPKVqsEtGutJrnktODu+E1SNc7RBcZHfYuQuNE9r7eZDIq+LzTXnSqqy82io4Jluz HIouL/xa6N1R59P/WPwVXeZmLL/PHpF0QfjuCA/rfiNzf+USvSh36R4D88YDbm2GWmFn FL5w== X-Gm-Message-State: AOJu0YwJDYF5xkV2eR42PTpy7ypdGgV6RpFZHQzGQsb7ta+79IWRETpT RQLXSEAAsW520Sd0M77HR+acX9pp8O/iXe8JmIAUolonWRYSdBFW39uIa8a5ZeXN X-Gm-Gg: Acq92OHPPrX1UaktZlQszdGolQGzhDBqYRoeXAcbY4IJyZeFtprOYPfjAKG1IYOcyFy IQcPYW4hrYo/2uc3QlS3WEwhB3CFOCE34eyFieZNg5kP282EWlKrQvE6SVYgTAMnAi9v9A4QYsG OcLqcCYpFLwiTN50H/7Sg0nJ2zuWztadi1fkMyOjN7chk837r8zbZusau3smKkvv38rq3M7dhhA 3Lbcd1vJlOmfM+7X7X95If1viEdkZf69ewHZqKGi4Lnrim6sNSl3V1mqJxkToZtn/XKm8CEkXSP UHOjQ2DeWMu3brt70iSpTdE7ZjobMWU4jI1Py2SZ4ASE/ShQCfpjEdicKSs+jeBfe21ixqEb6hA 4jBHHYaZuLyclkMkNgJF+Sj8GEj4DAZnE2eMAypadsxFubxv7c0MuEtcCZT5P4/6+1nRU+8xlU8 8VM5zw/NZErQx1JfdotmTuQz+YfNxBNYKqCKlBXgm3 X-Received: by 2002:a17:90b:224a:b0:369:b9db:b885 with SMTP id 98e67ed59e1d1-37c523bd69cmr3344940a91.15.1781604615865; Tue, 16 Jun 2026 03:10:15 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 81/83] hw/riscv/spike.c: use create_fdt_socket_cpus() Date: Tue, 16 Jun 2026 20:05:24 +1000 Message-ID: <20260616100527.1939565-82-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781605982803158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Use the new FDT helper to create FDTs for the CPU sockets. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-12-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/spike.c | 54 +++++++----------------------------------------- 1 file changed, 7 insertions(+), 47 deletions(-) diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index ee8232f734..4e60724c14 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -56,11 +56,9 @@ static void create_fdt(SpikeState *s, const MemMapEntry = *memmap, void *fdt; int fdt_size; unsigned long clint_addr; - int cpu, socket; + int socket; MachineState *ms =3D MACHINE(s); - uint32_t cpu_phandle, phandle =3D 1; - char *clust_name; - char *core_name, *cpu_name, *intc_name; + uint32_t phandle =3D 1; bool numa_enabled =3D riscv_numa_enabled(ms); =20 fdt =3D ms->fdt =3D create_board_device_tree("ucbbar,spike-bare,qemu", @@ -82,48 +80,11 @@ static void create_fdt(SpikeState *s, const MemMapEntry= *memmap, riscv_socket_mem_offset(ms, socket); uint64_t memsize =3D riscv_socket_mem_size(ms, socket); =20 - clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket); - qemu_fdt_add_subnode(fdt, clust_name); - - for (cpu =3D s->soc[socket].num_harts - 1; cpu >=3D 0; cpu--) { - cpu_phandle =3D phandle++; - - cpu_name =3D g_strdup_printf("/cpus/cpu@%d", - s->soc[socket].hartid_base + cpu); - qemu_fdt_add_subnode(fdt, cpu_name); - if (is_32_bit) { - qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,= sv32"); - } else { - qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,= sv48"); - } - riscv_isa_write_fdt(&s->soc[socket].harts[cpu], fdt, cpu_name); - qemu_fdt_setprop_string(fdt, cpu_name, "compatible", "riscv"); - qemu_fdt_setprop_string(fdt, cpu_name, "status", "okay"); - qemu_fdt_setprop_cell(fdt, cpu_name, "reg", - s->soc[socket].hartid_base + cpu); - qemu_fdt_setprop_string(fdt, cpu_name, "device_type", "cpu"); - riscv_socket_fdt_write_id(ms, cpu_name, socket); - qemu_fdt_setprop_cell(fdt, cpu_name, "phandle", cpu_phandle); - - intc_phandles[cpu] =3D phandle++; - - intc_name =3D g_strdup_printf("%s/interrupt-controller", cpu_n= ame); - qemu_fdt_add_subnode(fdt, intc_name); - qemu_fdt_setprop_cell(fdt, intc_name, "phandle", - intc_phandles[cpu]); - qemu_fdt_setprop_string(fdt, intc_name, "compatible", - "riscv,cpu-intc"); - qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL,= 0); - qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1); - - core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); - qemu_fdt_add_subnode(fdt, core_name); - qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); - - g_free(core_name); - g_free(intc_name); - g_free(cpu_name); - } + create_fdt_socket_cpus(fdt, (&s->soc[socket])->harts, socket, + s->soc[socket].num_harts, + s->soc[socket].hartid_base, + &phandle, intc_phandles, numa_enabled, + is_32_bit); =20 create_fdt_socket_memory(fdt, memaddr, memsize, socket, riscv_numa_enabled(ms)); @@ -133,7 +94,6 @@ static void create_fdt(SpikeState *s, const MemMapEntry = *memmap, create_fdt_socket_clint(fdt, clint_addr, memmap[SPIKE_CLINT].size, socket, intc_phandles, s->soc[socket].num_harts, numa_enabled); - g_free(clust_name); } =20 riscv_socket_fdt_write_distance_matrix(ms); --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781609175; cv=none; d=zohomail.com; s=zohoarc; b=g4+Y6WZzi/kR7sc7hB/vbnNhXFcXkagtAkaqrxTCau7dyLcdTZKk8nMyEAdJwy/9hUZK7rMjJL/b4wCfmrvW/w55kMDhmbOVFzUKHG4cA1Idl7QVGW1Xom5vOHI7UdqaLJTZzye9t7M8ZvrWULJuJiod4hkR7lzcc9jBpAJqBg8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781609175; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kyd3XUQvNLMbX96LTRLPZV85FORbdH15nuG5gD0APJk=; b=heF+A61AOjDwcg4SMJwSVbDLq6TmQXyw2LshfX7OuDY5yUCRC985Ian0jGkWtEGlu075mFVc7ezepv2sHDfonri3tEvf1bqtnNlTe/5MQrpIUs99o5P8qLblVm5cqY+FHeYJBx9yAkmGR3DJmB24/dhRj0z2OcIIhuc19lwnuyU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781609175147141.5778490152619; Tue, 16 Jun 2026 04:26:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQkT-00048h-E0; Tue, 16 Jun 2026 06:10:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQkQ-0003lp-Gb for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:22 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQkO-0004Ri-7i for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:22 -0400 Received: by mail-pj1-x1034.google.com with SMTP id 98e67ed59e1d1-36d98b9aa9aso3625512a91.3 for ; Tue, 16 Jun 2026 03:10:19 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.10.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604619; x=1782209419; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kyd3XUQvNLMbX96LTRLPZV85FORbdH15nuG5gD0APJk=; b=iDPiXEzT0RIO1twb3Ow0ey4FS8SdKnb+p1N2cOnTK41JhfTtSZVc1Nf9bMQcw1DJ1Y aZl6xQtTgKoFPZKalUyYPVBbkazsGYogu9JugxTIr7joQNJkUNWLMKTY+2teoNgIFSVw OvMeozXRgwJiL5J8+3JdKUng33OLNWNXseLFhQfxub7baD0/Vac3RTllj/M/oPxZoZew sQlQmy6Ef9dP0Lhdp2KzB14H/2RLbUL6ve9ssnC+GZmA8R34FoW3y73i41iv1RpcFZvn 2F/juv4J+DgyBYeANB4FP3AXK5lVD9ErGw1QaCR0eOmnSDV3bOQv6duwU0aXo1C56ZmD 2Emw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604619; x=1782209419; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=kyd3XUQvNLMbX96LTRLPZV85FORbdH15nuG5gD0APJk=; b=oXyjvbDglx01ploPf+RvO8TaDxJa+ZBdwFB1YfFaLrU6QJa/Y6mnyTALTaBi2szEFu FKvFdqS1sI02uzoWZb/LbTL07tvBXxdnLDvJdUWuNuE3C6Zxk/Rsj0AYjqDiglbC9x/m jHREYjrlxVCNcgRx+mSF3ib6vGXXwzjJqsr5TcbZIRiZihlEKgUwTpptCRhHhmmFh7ax n3K/SsLh1E+MOPvNLbRvr7BaiA4CMZ5gMz0Zhy+Q5xkruyjpwUadtvYMiuB1+Zt/5eVZ hA+xnna3OkIU/i6/9q8jhwCydAYyscqo4pCN34doCM8CumscN4auiDHk6IHfbZbz3AVn edrA== X-Gm-Message-State: AOJu0Yz3oFZNVnBfn0jJv0BksJX9lTKikLwlTiSt9SRxa0k6L91lXNYJ 2xyhZ+Iq6xnki14Jqcx9+Y31cbJ0UDr+5trAuLYdDKba+Z8vvuqQfEt3x9wyqjOA X-Gm-Gg: Acq92OGRWgGVBnYBGXJGAkpeVy1aslivQb7FK6JcWnoU5Ei2sdtnHN8e22yEwt6vTOd /N2mWY7P/mMHlEf8dvQFKeWhKLx+Fng5UZCGrQbACVdKy1d9wwyzVNWgsOqhvGtUyRD8cxEAdpR ecSAtl+eG/D10uBdnLLH+kb8xh3Ypiy5u2HxUz9e3ouy3tTZNmCNrT6+h812WsP1Lcsb0DX/NE8 WOoobcZp6RpVHMs5faYXO3shZkPxOIh/iRnS+Pc3Qb7srJhdaFZ1/is3u4rA+5vBKaEw7Yiseqe GFxRx4QgsKfc6UAdLHzvOS5gbJjCJiV/X+x28K97OU7pfHd7yJ4xZ6LkvujTr9VOiMqggFbbtDZ bMoTbt753cT9e5zQKhaWKwydT9tsMhr4W8rprVwd3OMYhrLtVVw0Txq2tPzu16QSql/1o1wDJnL 8pEjo1h3Jez+T7aN/4mQ8spQlkbjs93Zn2kBFzi6EtZabLR3QcGBY= X-Received: by 2002:a17:90b:33ce:b0:36b:3ecd:88d2 with SMTP id 98e67ed59e1d1-37a01847928mr18136910a91.3.1781604618689; Tue, 16 Jun 2026 03:10:18 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 82/83] hw/riscv/fdt_common.c: create create_fdt_socket_cpu_internal() Date: Tue, 16 Jun 2026 20:05:25 +1000 Message-ID: <20260616100527.1939565-83-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=alistair23@gmail.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781609177371158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza The sifive_u board does not share the same CPU socket FDT bits from the other boards. In particular the riscv,isa creation is done using either CPU0 from soc.e_cpus.harts, and for all other CPUs soc.u_cups.harts is used. It would be too cumbersome to add all these details in the common code so we're going to add a special sifive_u only helper that shares the common bits with the common helper used by the other boards. create_fdt_socket_cpu_internal() contains the common bits shared between the sifive_u board and the rest. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-13-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- hw/riscv/fdt-common.c | 108 +++++++++++++++++++++++++----------------- 1 file changed, 65 insertions(+), 43 deletions(-) diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c index 6c795409a4..70168ad657 100644 --- a/hw/riscv/fdt-common.c +++ b/hw/riscv/fdt-common.c @@ -94,28 +94,29 @@ void fdt_create_cpu_socket_subnode(void *fdt, uint64_t = timebase_frequency) qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); } =20 -void create_fdt_socket_cpus(void *fdt, RISCVCPU *socket_harts, - int socket_id, int num_harts_socket, - int socket_hartid_base, uint32_t *phandle, - uint32_t *intc_phandles, bool numa_enabled, - bool is_32_bit) +static void +create_fdt_socket_cpu_internal(void *fdt, char *clust_name, RISCVCPU *cpu_= ptr, + int cpu, int socket_id, int socket_hartid_b= ase, + uint32_t *phandle, uint32_t *intc_phandles, + bool numa_enabled, bool is_32_bit) { - g_autofree char *clust_name =3D NULL; - uint32_t cpu_phandle; - - clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket_id); - qemu_fdt_add_subnode(fdt, clust_name); - - for (int cpu =3D num_harts_socket - 1; cpu >=3D 0; cpu--) { - RISCVCPU *cpu_ptr =3D &socket_harts[cpu]; + g_autofree char *cpu_name =3D NULL; + g_autofree char *core_name =3D NULL; + g_autofree char *intc_name =3D NULL; + uint32_t cpu_phandle =3D (*phandle)++; + bool is_sifive_u =3D cpu_ptr =3D=3D NULL; + + cpu_name =3D g_strdup_printf("/cpus/cpu@%d", socket_hartid_base + cpu); + + /* + * The sifive_u board has an exclusive satp and riscv,isa + * schema that can't be shared with other boards, so part + * of the CPU FDT creation (i.e. the /cpus/cpu@N subnode) + * is still being done by the board. + */ + if (!is_sifive_u) { int8_t satp_mode_max =3D cpu_ptr->cfg.max_satp_mode; - g_autofree char *cpu_name =3D NULL; - g_autofree char *core_name =3D NULL; - g_autofree char *intc_name =3D NULL; - - cpu_phandle =3D (*phandle)++; =20 - cpu_name =3D g_strdup_printf("/cpus/cpu@%d", socket_hartid_base + = cpu); qemu_fdt_add_subnode(fdt, cpu_name); =20 if (satp_mode_max !=3D -1) { @@ -140,30 +141,51 @@ void create_fdt_socket_cpus(void *fdt, RISCVCPU *sock= et_harts, qemu_fdt_setprop_cell(fdt, cpu_name, "riscv,cbop-block-size", cpu_ptr->cfg.cbop_blocksize); } + } =20 - qemu_fdt_setprop_string(fdt, cpu_name, "compatible", "riscv"); - qemu_fdt_setprop_string(fdt, cpu_name, "status", "okay"); - qemu_fdt_setprop_cell(fdt, cpu_name, "reg", - socket_hartid_base + cpu); - qemu_fdt_setprop_string(fdt, cpu_name, "device_type", "cpu"); - if (numa_enabled) { - qemu_fdt_setprop_cell(fdt, cpu_name, "numa-node-id", socket_id= ); - } - qemu_fdt_setprop_cell(fdt, cpu_name, "phandle", cpu_phandle); - - intc_phandles[cpu] =3D (*phandle)++; - - intc_name =3D g_strdup_printf("%s/interrupt-controller", cpu_name); - qemu_fdt_add_subnode(fdt, intc_name); - qemu_fdt_setprop_cell(fdt, intc_name, "phandle", - intc_phandles[cpu]); - qemu_fdt_setprop_string(fdt, intc_name, "compatible", - "riscv,cpu-intc"); - qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL, 0); - qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1); - - core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); - qemu_fdt_add_subnode(fdt, core_name); - qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); + qemu_fdt_setprop_string(fdt, cpu_name, "compatible", "riscv"); + qemu_fdt_setprop_string(fdt, cpu_name, "status", "okay"); + qemu_fdt_setprop_cell(fdt, cpu_name, "reg", + socket_hartid_base + cpu); + qemu_fdt_setprop_string(fdt, cpu_name, "device_type", "cpu"); + if (numa_enabled) { + qemu_fdt_setprop_cell(fdt, cpu_name, "numa-node-id", socket_id); + } + qemu_fdt_setprop_cell(fdt, cpu_name, "phandle", cpu_phandle); + + intc_phandles[cpu] =3D (*phandle)++; + + intc_name =3D g_strdup_printf("%s/interrupt-controller", cpu_name); + qemu_fdt_add_subnode(fdt, intc_name); + qemu_fdt_setprop_cell(fdt, intc_name, "phandle", + intc_phandles[cpu]); + qemu_fdt_setprop_string(fdt, intc_name, "compatible", + "riscv,cpu-intc"); + qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1); + + core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); + qemu_fdt_add_subnode(fdt, core_name); + qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); +} + +void create_fdt_socket_cpus(void *fdt, RISCVCPU *socket_harts, + int socket_id, int num_harts_socket, + int socket_hartid_base, uint32_t *phandle, + uint32_t *intc_phandles, bool numa_enabled, + bool is_32_bit) +{ + g_autofree char *clust_name =3D NULL; + + clust_name =3D g_strdup_printf("/cpus/cpu-map/cluster%d", socket_id); + qemu_fdt_add_subnode(fdt, clust_name); + + for (int cpu =3D num_harts_socket - 1; cpu >=3D 0; cpu--) { + RISCVCPU *cpu_ptr =3D &socket_harts[cpu]; + + create_fdt_socket_cpu_internal(fdt, clust_name, cpu_ptr, cpu, + socket_id, socket_hartid_base, + phandle, intc_phandles, numa_enable= d, + is_32_bit); } } --=20 2.54.0 From nobody Sun Jul 26 13:30:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1781608018; cv=none; d=zohomail.com; s=zohoarc; b=XTtmhLc5fMwcPOzpVB5D8TWfDQk1RgilLkbkWLh7vGrys2HJUKZCi+AE8RQaphIOrL3HBdCezNgqzDwf0LSoM8Qbg0O0jyrsg5zxiG+TrD4aW1704xJ8ZC2JTvs+NMS/TDhWo1BqmuKFToIxurJEF2dp4xWsMnCueUS4RXrguIE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781608018; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=+DOg/38V/OeL8frN48NwIaGCLBgQVXoAi5N9B10G0OM=; b=d8+rCHRtvIiMrvxtnHpzjiaM6soBK5tmEwd7Ngl2iFQ3Mv6DQRBVLSm8oThEapLcQCEDuMWzCLy7JNNuLnleOaetHC4EFZLGY36sneJofRAHLbKbSNVv69z5DVUJiWOTVJvgz7p9XyWAMgdrVzUJWCVLHdhDCbDj4tHdMBSJFp0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781608018532451.4500706900942; Tue, 16 Jun 2026 04:06:58 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZQkV-0004W1-QO; Tue, 16 Jun 2026 06:10:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZQkT-0004A0-A2 for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:25 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZQkR-0004S2-EE for qemu-devel@nongnu.org; Tue, 16 Jun 2026 06:10:25 -0400 Received: by mail-pg1-x529.google.com with SMTP id 41be03b00d2f7-c85822059d8so2746778a12.1 for ; Tue, 16 Jun 2026 03:10:22 -0700 (PDT) Received: from toolbx.alistair23.me ([2403:581e:fdf9:0:13b2:851f:d9cb:44c5]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866519f0a6sm10916735a12.22.2026.06.16.03.10.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 03:10:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781604622; x=1782209422; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+DOg/38V/OeL8frN48NwIaGCLBgQVXoAi5N9B10G0OM=; b=ENTTgdFg/HbcluNS5Ik2Tm/zj5gx7zmAhhfegn/FE/9wG2zTd1UmOX++4XByqDbXSQ pkREswga6IABZGVYTUMWOEi4yNF4PLB3ftNVXPsTKXQVbM3OwKTniMM2T4zeNc8c2ftx MzjsniKhkbmbOInDpnsiFf0L/hxEX1547eMgk/dzggn+cQXEWUqCLzlKrmpxUpwCEYhL Hbsk2eOK5r59xOaEPTfL3tCdzdb3mGR7sXqBwtN1BdZw4fujnVt/nHfRAfK3IG/pYEpj iqAFoD8uRrpsLTugpr1arUbopxuRQfdMPCgX/njXSrnf4dC+0Mjnk3eBnUFFTVQ4T5kG TwbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781604622; x=1782209422; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=+DOg/38V/OeL8frN48NwIaGCLBgQVXoAi5N9B10G0OM=; b=fmpRS10sNsHM4ETzXqVW95frX3jsLFUxa2qtAUu9Csush+b/rLFAFiIVgSPnYtGrbP RpxbXNBWPvDwxl/S8jC/lHZrSxOoMlKHexB0ofMVEG+X72RUWmm/TXN9Edwkr0wYcT/z bDTYOkVF/gCJ+0oaorRigp5hDVdUyhpMn3KJV7eEP+AK95JEOrdLaO2Fkmo0OyAXMUWT AxUIvFEhBGBiIAn4AkrWdlX++QolSjp3WVFANEBp74xQoWkcVbV5IyHiof2JX1FZaio4 MoM2ARbo1en8WYhRWJvY2i30NU+EXtxcT8T53M+oPvqXrHJaA4pOO0e2kksNkagYaYRI yO0w== X-Gm-Message-State: AOJu0YxL8h7tnCl+wmyqaUMDLH9e5/KTSli+vs+oiXmWzvGiCOHiwz5E grdLSFQ8s0+SFnI7mKxNHGFD9KIDpgNWHHc2bwwnnHwo0SS9ZUh8BBljiej0Ut/y X-Gm-Gg: Acq92OH1jkpY52KHKxbGpPiNvvxRdy36cPdSvVx9aETeYey/Qt4xWLrQS3vFlFg55Ig nomBjNK1bZOM24e9XF7M/85qbiXGRswwErpNh/7ZPSdkl/Ej7dSpCfXDpILDmcvmt4Ir6xrbyZz jc7hfh7JPZrwVZpgLEoWRtgh6VOEHDol/hXQQbprN+v9pB2yh0pq9yaXnoTH2w6PrP7kXPr6LyN s2dXEiMreer8hJKFdHxdveLMLaTEJm9DsNqV2cUkZyAjcO4Hx3D1M45gnQLX7XbGbiuWoEXJBZy iB5l9wMG3wyqSEJeCbuUK3nYLSayoyRiA+AL5rohAvS8cJNLeXWsgErCADwI6vqYBWYjCsTTA3i Nyzkdrkrd+UBTtes8Ew+/4jivQj7EMk8sTjLpryXKAETIdIbY6JhERErdRIv8moPOu/qbpLHXB3 oof9fgFUvzRgxdwWCECGv+GpS7mZ4yGFI0WCCzaaEY X-Received: by 2002:a05:6a20:94ce:b0:3a0:adc5:52c1 with SMTP id adf61e73a8af0-3b7e473ff32mr3287459637.11.1781604622063; Tue, 16 Jun 2026 03:10:22 -0700 (PDT) From: alistair23@gmail.com X-Google-Original-From: alistair.francis@wdc.com To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 83/83] hw/riscv: add create_fdt_socket_cpu_sifive() Date: Tue, 16 Jun 2026 20:05:26 +1000 Message-ID: <20260616100527.1939565-84-alistair.francis@wdc.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616100527.1939565-1-alistair.francis@wdc.com> References: <20260616100527.1939565-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=alistair23@gmail.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1781608019191158500 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza This sifive_u only helper shares DT code with other boards. The idea is to reduce code repetition while keeping sifive_u characteristics in place. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20260615203734.954428-14-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis --- include/hw/riscv/fdt-common.h | 4 ++++ hw/riscv/fdt-common.c | 11 +++++++++++ hw/riscv/sifive_u.c | 24 +++--------------------- 3 files changed, 18 insertions(+), 21 deletions(-) diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h index 3af9d5c3fd..2d6b9a5d03 100644 --- a/include/hw/riscv/fdt-common.h +++ b/include/hw/riscv/fdt-common.h @@ -26,4 +26,8 @@ void create_fdt_socket_cpus(void *fdt, RISCVCPU *socket_h= arts, int socket_hartid_base, uint32_t *phandle, uint32_t *intc_phandles, bool numa_enabled, bool is_32_bit); +void create_fdt_socket_cpu_sifive(void *fdt, char *clust_name, + int cpu_id, int socket_id, + int socket_hartid_base, uint32_t *phandl= e, + uint32_t *intc_phandles); #endif diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c index 70168ad657..b27ff13bca 100644 --- a/hw/riscv/fdt-common.c +++ b/hw/riscv/fdt-common.c @@ -189,3 +189,14 @@ void create_fdt_socket_cpus(void *fdt, RISCVCPU *socke= t_harts, is_32_bit); } } + +void +create_fdt_socket_cpu_sifive(void *fdt, char *clust_name, + int cpu_id, int socket_id, + int socket_hartid_base, uint32_t *phandle, + uint32_t *intc_phandles) +{ + create_fdt_socket_cpu_internal(fdt, clust_name, NULL, cpu_id, + socket_id, socket_hartid_base, + phandle, intc_phandles, false, false); +} diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 27c1a74d99..0c6e4204cb 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -145,12 +145,9 @@ static void create_fdt(SiFiveUState *s, const MemMapEn= try *memmap, qemu_fdt_add_subnode(fdt, clust_name); =20 for (cpu =3D ms->smp.cpus - 1; cpu >=3D 0; cpu--) { - int cpu_phandle =3D phandle++; nodename =3D g_strdup_printf("/cpus/cpu@%d", cpu); - char *intc =3D g_strdup_printf("/cpus/cpu@%d/interrupt-controller"= , cpu); - g_autofree char *core_name =3D NULL; - qemu_fdt_add_subnode(fdt, nodename); + /* cpu 0 is the management hart that does not have mmu */ if (cpu !=3D 0) { if (is_32_bit) { @@ -162,25 +159,10 @@ static void create_fdt(SiFiveUState *s, const MemMapE= ntry *memmap, } else { riscv_isa_write_fdt(&s->soc.e_cpus.harts[0], fdt, nodename); } - qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv"); - qemu_fdt_setprop_string(fdt, nodename, "status", "okay"); - qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu); - qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu"); - qemu_fdt_setprop_cell(fdt, nodename, "phandle", cpu_phandle); - - intc_phandles[cpu] =3D phandle++; - - qemu_fdt_add_subnode(fdt, intc); - qemu_fdt_setprop_cell(fdt, intc, "phandle", intc_phandles[cpu]); - qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc"); - qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0); - qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1); =20 - core_name =3D g_strdup_printf("%s/core%d", clust_name, cpu); - qemu_fdt_add_subnode(fdt, core_name); - qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); + create_fdt_socket_cpu_sifive(fdt, clust_name, cpu, 0, 0, + &phandle, intc_phandles); =20 - g_free(intc); g_free(nodename); } =20 --=20 2.54.0