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This seems like a good point to add a pointer to the spec to the main source files. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/arm_gicv5.c | 5 +++++ target/arm/tcg/gicv5-cpuif.c | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c index 6b1dd04991..0fa3d6b601 100644 --- a/hw/intc/arm_gicv5.c +++ b/hw/intc/arm_gicv5.c @@ -4,6 +4,11 @@ * Copyright (c) 2025 Linaro Limited * * SPDX-License-Identifier: GPL-2.0-or-later + * + * The IRS is defined in IHI 111701 + * (ARM Generic Interrupt Controller Architecture Specification, + * GIC architecture version 5): + * https://developer.arm.com/documentation/111701/latest */ =20 #include "qemu/osdep.h" diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index dd2f696511..891cb2d3b7 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -4,6 +4,11 @@ * Copyright (c) 2025 Linaro Limited * * SPDX-License-Identifier: GPL-2.0-or-later + * + * The cpu interface is defined in IHI 111701 + * (ARM Generic Interrupt Controller Architecture Specification, + * GIC architecture version 5): + * https://developer.arm.com/documentation/111701/latest */ =20 #include "qemu/osdep.h" --=20 2.43.0 From nobody Sun Jul 26 13:29:02 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1781520775; cv=none; d=zohomail.com; s=zohoarc; b=gIVeHOrk9FuBXVN8YfkPtaJxNQ0KVVv1tDqoRF8J9dc0o+UfE2QODPt3npXd0roRYQCOvs4K5FJkvR1h08ddOJEItd3gmguT9FkgG7FfKjlfzb2JTULumXHSHFyivLPSQVtVrVS2GeUO68pGZyJeHhVOboO2errBxeNcIi65m90= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781520775; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=2VrJ5ZgsRdlINMUw7+Y3JTp3T0wQXEu4pb+cZQs4R6k=; b=U88YJ8JBdYJVQLcmZtqxzvyuGNI1VxERXuVEqp3gPOsoqnN05oZ61ZSUG2BCkJgWl1VBn7jPQHwb3tKlt2NJ1TLqBfSAkLcDpP8onwLnok+1I5R5r9p8QVW9uc3f0FMkjlAm7+tyjMlOhzbd2VDDUj4mX0qZ51ERgW/T1JMdok4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781520775664281.06482857011224; Mon, 15 Jun 2026 03:52:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZ4un-0000Xb-3E; Mon, 15 Jun 2026 06:51:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4tv-0000R9-Jc for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:48 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZ4tn-0001SV-0S for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:36 -0400 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-45ef1629ff4so1963234f8f.0 for ; Mon, 15 Jun 2026 03:50:34 -0700 (PDT) Received: from lanath.. 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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4606f263945sm33863674f8f.8.2026.06.15.03.50.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jun 2026 03:50:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1781520633; x=1782125433; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=2VrJ5ZgsRdlINMUw7+Y3JTp3T0wQXEu4pb+cZQs4R6k=; b=CfFLU6ATwQdxFFk2Y8yD7irFfX+B7D/hZDdsVVb6Nf61vgKf+VmSgYT04/VsTS1cvM RZWRmXGFWD81wzzkFBSVlaYlQP6gADCinIo2gBRUGvO6JVmc6R+7Go9+xdEHN+MDZM+k VBz9dIKLy63SptjGYnoT79CYpdEY73lM4byajWU4jylBbwpFtpVso3Rc92C9eKlXrQGZ 82LCaZRtZxZ2FxkLPF20ZSQmOfb3nE6sU3IenEQpzl/BghXUism1Bz4rkljWv+RSEhCu bhSzRCVzAVJQhBos6YcvrWpJE7vIsKq2xacXauxm0XEZjeRyxr2VH45rWN5RCDVWjcZn yBRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781520633; x=1782125433; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=2VrJ5ZgsRdlINMUw7+Y3JTp3T0wQXEu4pb+cZQs4R6k=; b=RaaYxuDjbgrALeMbGbiHbTOclUxqIPWKIXCyOjiDFccPgPbV+A+UHJgNypb9qUcG8v +9Sc3FV66gO/cd4XsymAy4jAtsEG+nHDI8eYMeI+0gtE5NanMNXrD8p/kRYoVMhYM7oD dzVkeIn/5B8ppBih4crYRj/pcLhWjAkXM23u45G67dR0Yprl0WAp9+TvWQ3DNW2+zHk5 JsUXIRGU8QYCM9fiA5Ja7FGtAh/+VkcusFMJtYiZV8m2rJi4I/S2ZcYqpHP8fKv93DL3 dE9yRKjFnYuHglDTN947q3HBRag/k+6mEjudImkuyd0koRDIiKjD5fJdazPXLmoqkgH+ XJuw== X-Forwarded-Encrypted: i=1; AFNElJ+/9ILbA9OZ2reaWBOdKqR3jJBKMr+mbnbJ9XgEzS4NyFmyBPkOlZd9M+DjRdsyZ4Ht9abr9wuzsjvb@nongnu.org X-Gm-Message-State: AOJu0YyrIbKFN4q0DMVyPG9jZl+Dep9oVrugeYTSMYCPBTnDV9NwSPUE 6CE6YCnPwRlYY0cL2c14zc/+xHwt2kAx6rYHEllr4LtUxYYz+/uuqd7OnimetiTwwLk= X-Gm-Gg: Acq92OGUpQ3T+JlhxM0JpT75LoZKXWRx8eEQRIJgQP3kplZMchu3jUQGXPwk+/fFFkN jUMk2w1UekkT5zxd9/t6dLx6cdXQYlbqGRHJFe4raascVPH1JIwBwflFqUFquGKkCQq7UMIpSOn rEBZMmgvxAWHIpUf2AsSdGi6+2fsSQygx6CYmTXy+Qu4eoVL5uFwVi3AndEIZOyAF3RhecmGFXt wHkBZWXAVba/75BcnOY8ySRVl7Htmv5IU7m1ZIQWPHQBsd3IKUhI8YTfG2eIoQUBcmVlsKMw7sG 8WPKON9YdhT+WeMVm8NKHTTWUE9WLwWpDoUogTkdeP/ihGdkRij6tyZ6YK98RvJwQsCWe5cS2xa sXy32sIBE0ReK4OvIcRKXO2Z6aHcEvFgqHYmg5APIorui049wEtPPOWyua7P0DunA2FUWjmSo+S RGbR+b5QGxBQbHmg3fVKz42guEyP2std2f5ODb2J9fmj1NywWUJ9HHPID/s5B8hf8tumrwxei3x 7FtxTr6KcRNlVQe+LsyoiwiMyDx8HsQ X-Received: by 2002:a05:6000:2210:b0:460:efd:c682 with SMTP id ffacd0b85a97d-46074a8a01cmr14314126f8f.24.1781520632905; Mon, 15 Jun 2026 03:50:32 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/5] target/arm: GICv5 cpuif: Recalculate IRQ/FIQ on ICC_PCR_EL1 write Date: Mon, 15 Jun 2026 11:50:26 +0100 Message-ID: <20260615105029.2898872-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260615105029.2898872-1-peter.maydell@linaro.org> References: <20260615105029.2898872-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1781520776742158500 Content-Type: text/plain; charset="utf-8" When the guest writes ICC_PCR_EL1 we should recheck whether we should be signalling IRQ or FIQ, because we use this priority mask value in determining whether the highest priority interrupt should be signalled or not. Fixes: 9bd90bddb79b ("target/arm: GICv5 cpuif: Signal IRQ or FIQ") Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/tcg/gicv5-cpuif.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index 891cb2d3b7..09c3fdda61 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -565,6 +565,7 @@ static void gic_icc_pcr_el1_write(CPUARMState *env, con= st ARMCPRegInfo *ri, =20 value &=3D R_ICC_PCR_PRIORITY_MASK; env->gicv5_cpuif.icc_pcr[domain] =3D value; + gicv5_update_irq_fiq(env); } =20 static void gic_icc_pcr_el1_reset(CPUARMState *env, const ARMCPRegInfo *ri) --=20 2.43.0 From nobody Sun Jul 26 13:29:02 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1781520763; cv=none; d=zohomail.com; s=zohoarc; b=e96ZRCsjYbIRn5L/SLMcihfXAtyKDjkd9jpl1sLLRFljs0YcvSbqB5/MIxOROe0Kg4JFG3RHO9Gq9Cc3AyY5gpBybM11mrfhfY5/BQSShsDO8+QKytziyI56ZRBXJBs6OVssyIcv40/6B44noGim/G5193sLdo4adRH0wPybT0E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781520763; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=XQnKDUmeMi6ki8lCRaBDX4eBXYuzkjCC2EWJzcsXgik=; b=GSxmLe03ZA3OYN5v9D4gDr3/IOR/fATZDV5K3ACORfBZMWsty15ccDcYWKwqaPbY/Z187nDbJi+RD/YN4VgWPf9woWVckD9Q2aiH5S04y3IwozR+1uF4In/L1LJmjXFMGOq0jBqBIN93nVb5iXZV3p8CwYpb/nORRwf++tkQcA0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781520763724626.5388976315943; Mon, 15 Jun 2026 03:52:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZ4v4-0000d5-S3; Mon, 15 Jun 2026 06:51:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4tv-0000RA-Jg for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:48 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZ4to-0001Si-FA for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:37 -0400 Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-45eee266c6cso2826073f8f.1 for ; Mon, 15 Jun 2026 03:50:35 -0700 (PDT) Received: from lanath.. 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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4606f263945sm33863674f8f.8.2026.06.15.03.50.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jun 2026 03:50:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1781520634; x=1782125434; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=XQnKDUmeMi6ki8lCRaBDX4eBXYuzkjCC2EWJzcsXgik=; b=kXS/Amtp0j0TkC5KgFTeBI4Y6KvMy/Oob+oCEInAAhlST33tJkxVxqtY1tr+n8tVGJ d467BGXVe7NMafTfC4aKEP1KsjRsEApTdU3lZ2RU/VQBkwSXdmClhkK+vOpa5ixMJPLe oFLmvNEVFoyMtb7DwAmqYNJg0dWt8ooHji4th7ZIZSxYA2PzNwP2u/OMXsgHsIBLejPq 8AcXoEMHCjv7bR9Foi3CDyMIdAsn3NGDYKe6I4lC7zDQu0+Dh/m8W7PrHC6JCVOKNLGj JxQmdn9JCOZWA7bSNXVZ4gboCQ/QnxyOqkRT/DcTa093fsD7lOvxKV1m67bpOXb678rp UPQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781520634; x=1782125434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=XQnKDUmeMi6ki8lCRaBDX4eBXYuzkjCC2EWJzcsXgik=; b=BcJSyZ6zLjs8Dt/iXTMLLxc+vZzlFbQ583ks/zTQ76Pd18Th0xoiycIs65xKSniCMD ET5P6DqOvj/KBZnMkmIG3hyVE3R9VknF95uTYfdft3tzTH6SqP6uHZ9wtse/EmxBSNOl 3I4i+flfiTfJltNKLSnnsZWSdK7zc7tYUvpdhMUCYvzH1Nh7ahwkp7l6HS6HrnrQ42Ub aqxHAP0v0BGJe7EecAHleSNBlUre1wsaleUb3E48c7tMI+3k6Mat4scKe9Q6/fi13Lri A6/vVOZKiJKtigT45qnJnm0M32db3hrIy9P1MvieitbNSA0l2bJfftnd2dlWA4h3uxB5 6EPQ== X-Forwarded-Encrypted: i=1; AFNElJ8diqkZ7p/bd+9klN/p3ZF7ug0Rhqo8BEPYM3+2rct1v08UfxiVZp+sQqrseOEOnpye5oUNLA+HddhO@nongnu.org X-Gm-Message-State: AOJu0Yy8STUjD0YDegJTP7C8DiZuLZSJgm6XedrlkauYjbTK7zXxiloU Hp5zSIfVZMUTj6CQjvAQf8S7TYVl15C1Bi9qmcipAGhlCYLjPgWXd+/xepx/HAfFTo3uhVZx3X+ Ec6+H X-Gm-Gg: Acq92OGbUHkFNSBLG5+L4/xQk7HwkcFPrXFYIr/kSY75v/ZPBe2sLf5XyPJZQPX5Yda /bngRZ6+Rl03wTrgyEifN26Y4ve2nvR10bqL21nT3KoH5GRaTJ7yEnq8ZECAPQjkYvX/MwqrskY qZH14E8gTXamMEDipqsnQkzpeIep0qyGsgpD7NEjOislU/GUst9S6fL6AuUsTWuGtivzw5+gm4w 4QCtftY6k1aJwnXhsRnu+TD7fhXqqFgzawYPSibYENKVoEyZ/GYAL1GgBt48POGANdYx67P1Vcd 9rfvJyCRuFcQzRd8m3bO5DNezOms5U8Jj9e2uw4VNe07eYSfYS1r4H964HshFM9aTQ4ayATSo6+ sPT6AHaRcVFbxuyYVDqHyseku9+1ofKKeYnA5Gbc8SrGY7ILIjKMxJyTvradjGLaMGOXAmcT1pI nbF/hKrHkInUpEL6ZCYCerqI4t02O0bJYEilrho4vZzzr7oFgLPq9HSE19+nTXqSJMcRKDlZqnA yD3BtMWfU0pZ0kDhCMOg1bSQooGYL4V+KX8TToiGAM= X-Received: by 2002:a05:6000:2013:b0:45e:ea68:5237 with SMTP id ffacd0b85a97d-46074b81e48mr13869506f8f.11.1781520633814; Mon, 15 Jun 2026 03:50:33 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/5] target/arm: GICv5 cpuif: Tag ICC_PPI_PRIORITYR regs as ARM_CP_NO_RAW Date: Mon, 15 Jun 2026 11:50:27 +0100 Message-ID: <20260615105029.2898872-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260615105029.2898872-1-peter.maydell@linaro.org> References: <20260615105029.2898872-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_FILL_THIS_FORM_SHORT=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1781520764937158500 Content-Type: text/plain; charset="utf-8" The GICv5 system registers are all tagged with ARM_CP_NO_RAW, because we don't want them to use the standard mechanisms for migration or KVM state synchronization. (GICv5 handling of both migration and KVM support is a "will be implemented later" feature.) We missed this tag on the ICC_PPI_PRIORITYR_EL1 registers; add it. Fixes: ef540c1d301 ("target/arm: GICv5 cpuif: Implement PPI priority regist= ers") Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/tcg/gicv5-cpuif.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index 09c3fdda61..1aa4bde799 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -950,7 +950,7 @@ void define_gicv5_cpuif_regs(ARMCPU *cpu) .name =3D name, .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 0, .crn =3D 12, .crm =3D 14 + (i >> 3), .opc2 =3D i & 7, - .access =3D PL1_RW, .type =3D ARM_CP_IO, + .access =3D PL1_RW, .type =3D ARM_CP_IO | ARM_CP_NO_RAW, .fieldoffset =3D offsetof(CPUARMState, gicv5_cpuif.ppi_pri= ority[i]), .writefn =3D gic_ppi_priority_write, .raw_writefn =3D raw_= write, }; --=20 2.43.0 From nobody Sun Jul 26 13:29:02 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1781520729; cv=none; d=zohomail.com; s=zohoarc; b=QWq2mTdlfPsmOhW1pc84SkhHcpab5yyYEdassw6abAn6A71WRQYmTNec15IhpE8H6C70bq65vRTFFSuaRKVUO7xmO1O6So+afMfpv1bzcfQcaCo2+tZ+3kcj7En0gbPek6NKfA/AGxu/9j96/Wn8gjFyBFaTS7Lj8ZOuHeTxuLE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781520729; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=34QQgWxmqNmOcMc6dpEoeumYGJN8pWfi/blQdAPFyZI=; b=U2V6OZCGyjwtMgNenn244IuZAk0jSJQGn4PQNFpScQRXrGZj5ASGA3dpa4eYC9KzWPb2EYuJM6eVMm22wNu54/hrfo0NhLuQjMbQoHq53JR3urfZ3FzPSSqn4YyRih+YsmcYAj+Id5XIz5za/qKxyHiKafjiXt5+OPUC3cesKww= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781520729307871.9681161397882; Mon, 15 Jun 2026 03:52:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZ4uj-0000X0-0C; Mon, 15 Jun 2026 06:51:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4tv-0000Qv-Jc for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:48 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZ4to-0001Sr-Jb for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:41 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-45ef56d9b67so2694431f8f.2 for ; Mon, 15 Jun 2026 03:50:36 -0700 (PDT) Received: from lanath.. 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However this can be easily calculated by reading the APR register, so it has been removed in the newly released A.a version of the GICv5 spec (IHI 111701). Remove QEMU's implementation of this register. (This is OK for us to do without warning because our GICv5 support is listed as "experimental"; we anticipated that this kind of spec change might happen.) Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/tcg/gicv5-cpuif.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index 1aa4bde799..a868adca66 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -511,15 +511,6 @@ static void gic_icc_apr_el1_reset(CPUARMState *env, co= nst ARMCPRegInfo *ri) } } =20 -static uint64_t gic_icc_hapr_el1_read(CPUARMState *env, const ARMCPRegInfo= *ri) -{ - /* - * ICC_HAPR_EL1 reports the current running priority, which can be - * calculated from the APR register. - */ - return gic_running_prio(env, gicv5_current_phys_domain(env)); -} - /* ICC_CR0_EL1 is also banked */ static uint64_t gic_icc_cr0_el1_read(CPUARMState *env, const ARMCPRegInfo = *ri) { @@ -928,11 +919,6 @@ static const ARMCPRegInfo gicv5_cpuif_reginfo[] =3D { .writefn =3D gic_icc_pcr_el1_write, .resetfn =3D gic_icc_pcr_el1_reset, }, - { .name =3D "ICC_HAPR_EL1", .state =3D ARM_CP_STATE_AA64, - .opc0 =3D 3, .opc1 =3D 1, .crn =3D 12, .crm =3D 0, .opc2 =3D 3, - .access =3D PL1_R, .type =3D ARM_CP_IO | ARM_CP_NO_RAW, - .readfn =3D gic_icc_hapr_el1_read, .raw_writefn =3D arm_cp_write_i= gnore, - }, }; =20 void define_gicv5_cpuif_regs(ARMCPU *cpu) --=20 2.43.0 From nobody Sun Jul 26 13:29:02 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1781520786; cv=none; d=zohomail.com; s=zohoarc; b=Q1wfl1acD/BNv1TvgA5Hh4LgLzo5HSkzIHeRDwAUfUz+rdjD2uh4u7JAz4YnKmrtR44DFdJSlyFGK5isYb3boE5/6y4qT39SgR4s/9trW2Gpq8dttvPyAN3jVbfjzDvnFn54h+kUcYbNhFxi76rcEHIIykfWi76bPx0ONXP7rZQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781520786; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=VF/90mu1QzOsJ+7ZowfFihlzaRYu0ah8ryr9I5YseZI=; b=AqANjQUaa2Vy78c9z5kCnALa3lpuus+sOD0C/XVZYQAx++sJOiA1oK+JgXjZimMSQdL5ZROuoamp8lwcISk12EF5zc9WAeWWvI6kn1PCn+jR1bILU+59iDkM1DaqgOwlyHYxPluL6eU333yjCjIvcjeamCQ6CxaV7oc5SywQCm8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781520786459408.6653580545558; Mon, 15 Jun 2026 03:53:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZ4v5-0000eY-3i; Mon, 15 Jun 2026 06:51:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4u2-0000S4-At for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:57 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wZ4tv-0001T1-Bf for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:50:47 -0400 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-490be03d47bso33222615e9.0 for ; Mon, 15 Jun 2026 03:50:36 -0700 (PDT) Received: from lanath.. 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We want to return this value or initialize some variable to it in several places in the GICv5 implementation, and the support for the virtual interrupt domain introduces more. Define a convenience macro for this special-case struct value, and use it instead of opencoding either the structure initializer or explicit assignment to the two fields. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/intc/arm_gicv5.c | 6 ++---- include/hw/intc/arm_gicv5_types.h | 4 ++++ target/arm/tcg/gicv5-cpuif.c | 7 +++---- 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c index 0fa3d6b601..08878193df 100644 --- a/hw/intc/arm_gicv5.c +++ b/hw/intc/arm_gicv5.c @@ -429,8 +429,7 @@ static void irs_recalc_hppi(GICv5 *s, GICv5Domain domai= n, uint32_t iaffid) ARMCPU *cpu =3D cpuidx >=3D 0 ? cs->cpus[cpuidx] : NULL; GICv5PendingIrq best; =20 - best.intid =3D 0; - best.prio =3D PRIO_IDLE; + best =3D GICV5_PENDING_IRQ_NONE; =20 if (!cpu) { /* Nothing happens for iaffids targeting nonexistent CPUs */ @@ -526,8 +525,7 @@ static void irs_recall_hppis(GICv5 *s, GICv5Domain doma= in) GICv5Common *cs =3D ARM_GICV5_COMMON(s); =20 for (int i =3D 0; i < cs->num_cpus; i++) { - s->hppi[domain][i].intid =3D 0; - s->hppi[domain][i].prio =3D PRIO_IDLE; + s->hppi[domain][i] =3D GICV5_PENDING_IRQ_NONE; gicv5_forward_interrupt(cs->cpus[i], domain); } } diff --git a/include/hw/intc/arm_gicv5_types.h b/include/hw/intc/arm_gicv5_= types.h index de4f78a149..851286b1b5 100644 --- a/include/hw/intc/arm_gicv5_types.h +++ b/include/hw/intc/arm_gicv5_types.h @@ -105,6 +105,10 @@ typedef struct GICv5PendingIrq { uint8_t prio; } GICv5PendingIrq; =20 +/* A GICv5PendingIrq struct initializer for "no pending interrupt" */ +#define GICV5_PENDING_IRQ_NONE \ + ((GICv5PendingIrq) { .intid =3D 0, .prio =3D PRIO_IDLE }) + /* Fields in a generic 32-bit INTID, per R_TJPHS */ FIELD(INTID, ID, 0, 24) FIELD(INTID, TYPE, 29, 3) diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index a868adca66..1cdd4103d0 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -144,7 +144,7 @@ static GICv5PendingIrq gic_hppi(CPUARMState *env, GICv5= Domain domain) =20 if (!(env->gicv5_cpuif.icc_cr0[domain] & R_ICC_CR0_EN_MASK)) { /* If cpuif is disabled there is no HPPI */ - return (GICv5PendingIrq) { .intid =3D 0, .prio =3D PRIO_IDLE }; + return GICV5_PENDING_IRQ_NONE; } =20 irs_hppi =3D gicv5_get_hppi(gic, domain, env->gicv5_iaffid); @@ -168,7 +168,7 @@ static GICv5PendingIrq gic_hppi(CPUARMState *env, GICv5= Domain domain) if (best.prio =3D=3D PRIO_IDLE || best.prio > env->gicv5_cpuif.icc_pcr[domain] || best.prio >=3D gic_running_prio(env, domain)) { - return (GICv5PendingIrq) { .intid =3D 0, .prio =3D PRIO_IDLE }; + return GICV5_PENDING_IRQ_NONE; } return best; } @@ -258,8 +258,7 @@ static void gic_recalc_ppi_hppi(CPUARMState *env) * enabled, pending and not active. */ for (int i =3D 0; i < ARRAY_SIZE(env->gicv5_cpuif.ppi_hppi); i++) { - env->gicv5_cpuif.ppi_hppi[i].intid =3D 0; - env->gicv5_cpuif.ppi_hppi[i].prio =3D PRIO_IDLE; + env->gicv5_cpuif.ppi_hppi[i] =3D GICV5_PENDING_IRQ_NONE; }; =20 for (int i =3D 0; i < ARRAY_SIZE(env->gicv5_cpuif.ppi_active); i++) { --=20 2.43.0