From nobody Sun Jul 26 13:29:02 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1781517840; cv=none; d=zohomail.com; s=zohoarc; b=OTzvTaGkewdaT+YFbhLyhAK7E0bwSfMrZrn76LMZr0UiNxoOfrR6JYei6jzj0YkYc1PCY/KxDlpL7bh8yc7DwKwY0onR10tfH8oZknB0lPTwE9d0PgdsJY4p+yM2T3sQuobxwf8K+Ysz1Mn+vjoeWhLCTAOf4kuojuGKKQYy3Dg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781517840; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=OWvq31Zh1H2hKyGgJU+PYjypP4cxos7VLyfvMMTsWRU=; b=TSa2TqMenpidePNNqi3ffVegtf0ML32HYKuZ8WxZ2re62Ve8TDMoqTKVrnV2cxlKUmDJP0YufpzxqMpXngULrjLczgIIJxKsEDDU2mDLwSHBXSMU5WaCm0Zopo8dDw0VL9WRFi2F/tDgcJp9WhG8s3ZQsvlle9YKCnJ8yUbI1Lc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781517840633938.3734380474542; Mon, 15 Jun 2026 03:04:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZ4A9-0000Fw-G5; Mon, 15 Jun 2026 06:03:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4A8-0000Fa-3p for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:03:24 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4A5-00008V-U6 for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:03:23 -0400 Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-98-8MdvCU3zMRmxESAp_EahdQ-1; Mon, 15 Jun 2026 06:03:13 -0400 Received: from mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id E89A31805A06; Mon, 15 Jun 2026 10:03:10 +0000 (UTC) Received: from gshan-thinkpadx1nanogen2.rmtau.csb (unknown [10.64.136.2]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 451CD1954B00; Mon, 15 Jun 2026 10:03:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1781517797; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OWvq31Zh1H2hKyGgJU+PYjypP4cxos7VLyfvMMTsWRU=; b=aloPWkFrH2aFXHboK4MkHIosH+GQDYH6aj/d7P0FyDF/LLf+uuTi3HH1NMA41BrvU5h8CD 1OQ2PAmVHI2NOBx5pNE4PCggI/uXMl8IzbWCZmFtOyvZi3ReQlxlqGpvZNF6drSLtbLBeY kUSLGhTSoj32XVoRvzR8j6DceGe+OfI= X-MC-Unique: 8MdvCU3zMRmxESAp_EahdQ-1 X-Mimecast-MFC-AGG-ID: 8MdvCU3zMRmxESAp_EahdQ_1781517791 From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, mst@redhat.com, peterx@redhat.com, alex@shazbot.org, richard.henderson@linaro.org, peter.maydell@linaro.org, berrange@redhat.com, philmd@oss.qualcomm.com, philmd@mailo.com, david@kernel.org, clg@redhat.com, pbonzini@redhat.com, phrdina@redhat.com, jugraham@redhat.com, liugang24219@sangfor.com.cn, dinghui@sangfor.com.cn, shan.gavin@gmail.com Subject: [PATCH v2 1/2] system/memory: Use qemu_ram_{copy, move}() in ram device region accessors Date: Mon, 15 Jun 2026 20:01:58 +1000 Message-ID: <20260615100200.266968-2-gshan@redhat.com> In-Reply-To: <20260615100200.266968-1-gshan@redhat.com> References: <20260615100200.266968-1-gshan@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1781517843554158500 Content-Type: text/plain; charset="utf-8" All ram device regions were turned to be indirectly accessible by commit 4a2e242bbb ("memory: Don't use memcpy for ram_device regions"). This leads to guest hang on attempt to build 'cuda-samples' as reported by Julia. The guest is started by the following command lines, with GH100 GPU card passed from the host. host$ lspci | grep GH100 0009:01:00.0 3D controller: NVIDIA Corporation GH100 [GH200 120GB / 480G= B] (rev a1) host$ /home/sandbox/gavin/qemu.main/build/qemu-system-aarch64 = \ -machine virt,gic-version=3Dhost,ras=3Don,highmem-mmio-size=3D4T = \ -accel kvm -cpu host -smp cpus=3D48 -m size=3D8G = \ -drive file=3D/home/gavin/sandbox/images/disk.qcow2,if=3Dnone,id= =3Dd0 \ -device virtio-blk-pci,id=3Dvb0,bus=3Dpcie.0,drive=3Dd0,num-queues= =3D4 \ -device vfio-pci-nohotplug,host=3D0009:01:00.0,bus=3Dpcie.1.0 : guest$ cd cuda-samples/build guest$ make -j 20 clean guest$ make -j 20 : [ 54%] Linking CUDA executable graphMemoryNodes [ 54%] Built target graphMemoryNodes guest$ qemu-system-aarch64: virtio: bogus descriptor or out of resources [ 555.814025] virtio_blk virtio0: [vda] new size: 268435456 512-byte lo= gical blocks (137 GB/128 GiB) When the GPU's driver (NVidia open driver) is loaded on guest bootup, the memory blocks residing in the PCI BAR#4 of the GH100 GPU card can be presented to the guest through memory hot-add. The page cache can then be allocated from the hot added memory blocks when cuda-samples is being built. Afterwards, the page cache is sent to QEMU's virtio-blk device as part of the DMA request, the bounce buffer has to be used to accomodate the request as the corresponding memory region (MemoryRegion) is an indirectly accessible ram device region in qemu. However, the max bounce bufer size is only 4096 bytes by default and that is exhausted quickly, leading to a reset on the virtio-blk device and frozen guest eventually. QEMU =3D=3D=3D=3D virtio_blk_handle_output virtio_blk_handle_vq virtio_blk_get_request virtqueue_pop virtqueue_split_pop virtqueue_map_desc address_space_map memory_access_is_direct # Return false memory_region_supports_direct_access (qemu) info mtree memory-region: pci_bridge_pci 0000000000000000-ffffffffffffffff (prio 0, container): pci_bridge_pci 0000042000000000-0000043fffffffff (prio 1, i/o): 0009:01:00.0 base BA= R 4 0000042000000000-0000043fffffffff (prio 0, i/o): 0009:01:00.0 BAR 4 0000042000000000-000004379fffffff (prio 0, ramd): 0009:01:00.0 BA= R 4 mmaps[0] This adds qemu_ram_{copy, move}() and replaces {memcpy, memmove}() with them in the ram device memory region accessors, similar to what's done in commit 4a2e242bbb so that the issue (MMIO access instructions were optimized to SSE instructions) covered by that commit is fixed. This makes 'ram_device_mem_ops' redundant, paving the way to revert that commit to make ram device region directly accessible again in the next patch. Reported-by: Julia Graham Suggested-by: Michael S. Tsirkin Suggested-by: Peter Xu Suggested-by: Richard Henderson Suggested-by: Peter Maydell Signed-off-by: Gavin Shan --- v2: Rename address_space_{memcpy, memmove}() to qemu_ram_{copy, move}() and move them to physmem.c and memory.h, the unaligned access is also covered for all architectures except i386 and x86_64 as Richard suggested. --- hw/remote/vfio-user-obj.c | 4 +- include/system/memory.h | 4 +- system/physmem.c | 91 +++++++++++++++++++++++++++++++++++++-- 3 files changed, 92 insertions(+), 7 deletions(-) diff --git a/hw/remote/vfio-user-obj.c b/hw/remote/vfio-user-obj.c index 87fa7b6572..97a6c88780 100644 --- a/hw/remote/vfio-user-obj.c +++ b/hw/remote/vfio-user-obj.c @@ -375,9 +375,9 @@ static int vfu_object_mr_rw(MemoryRegion *mr, uint8_t *= buf, hwaddr offset, ram_ptr =3D memory_region_get_ram_ptr(mr); =20 if (is_write) { - memcpy((ram_ptr + offset), buf, size); + qemu_ram_copy(ram_ptr + offset, buf, size); } else { - memcpy(buf, (ram_ptr + offset), size); + qemu_ram_copy(buf, ram_ptr + offset, size); } =20 return 0; diff --git a/include/system/memory.h b/include/system/memory.h index 1417132f6d..5878727d09 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2897,6 +2897,8 @@ void address_space_register_map_client(AddressSpace *= as, QEMUBH *bh); void address_space_unregister_map_client(AddressSpace *as, QEMUBH *bh); =20 /* Internal functions, part of the implementation of address_space_read. = */ +void qemu_ram_copy(void *dest, const void *src, size_t n); +void qemu_ram_move(void *dest, const void *src, size_t n); MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr le= n); MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, @@ -2970,7 +2972,7 @@ MemTxResult address_space_read(AddressSpace *as, hwad= dr addr, mr =3D flatview_translate(fv, addr, &addr1, &l, false, attrs); if (len =3D=3D l && memory_access_is_direct(mr, false, attrs))= { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); - memcpy(buf, ptr, len); + qemu_ram_copy(buf, ptr, len); } else { result =3D flatview_read_continue(fv, addr, attrs, buf, le= n, addr1, l, mr); diff --git a/system/physmem.c b/system/physmem.c index 7bcbf87573..7f98101612 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3160,6 +3160,90 @@ void memory_region_flush_rom_device(MemoryRegion *mr= , hwaddr addr, hwaddr size) invalidate_and_set_dirty(mr, addr, size); } =20 +#if defined(__i386__) || defined(__x86_64__) +#define HOST_UNALIGNED_MMIO_OK 1 +#else +#define HOST_UNALIGNED_MMIO_OK 0 +#endif + +void qemu_ram_copy(void *dest, const void *src, size_t n) +{ + if (HOST_UNALIGNED_MMIO_OK) { + switch (n) { + case 1: + __builtin_memcpy(dest, src, 1); + break; + case 2: + __builtin_memcpy(dest, src, 2); + break; + case 4: + __builtin_memcpy(dest, src, 4); + break; + case 8: + __builtin_memcpy(dest, src, 8); + break; + default: + memcpy(dest, src, n); + } + } else { + uintptr_t test, lsb; + + do { + test =3D (uintptr_t)dest | n; + lsb =3D test & -test; + switch (lsb) { + case 1: + *(uint8_t *)dest =3D *(uint8_t *)src; + src +=3D 1; + dest +=3D 1; + n -=3D 1; + break; + case 2: + *(uint16_t *)dest =3D *(uint16_t *)src; + src +=3D 2; + dest +=3D 2; + n -=3D 2; + break; + case 4: + *(uint32_t *)dest =3D *(uint32_t *)src; + src +=3D 4; + dest +=3D 4; + n -=3D 4; + break; + default: + *(uint64_t *)dest =3D *(uint64_t *)src; + src +=3D 8; + dest +=3D 8; + n -=3D 8; + } + } while (n !=3D 0); + } +} + +void qemu_ram_move(void *dest, const void *src, size_t n) +{ + if (HOST_UNALIGNED_MMIO_OK) { + switch (n) { + case 1: + __builtin_memmove(dest, src, 1); + break; + case 2: + __builtin_memmove(dest, src, 2); + break; + case 4: + __builtin_memmove(dest, src, 4); + break; + case 8: + __builtin_memmove(dest, src, 8); + break; + default: + memmove(dest, src, n); + } + } else { + qemu_ram_copy(dest, src, n); + } +} + int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) { unsigned access_size_max =3D mr->ops->valid.max_access_size; @@ -3272,7 +3356,7 @@ static MemTxResult flatview_write_continue_step(MemTx= Attrs attrs, uint8_t *ram_ptr =3D qemu_ram_ptr_length(mr->ram_block, mr_addr, l, false, true); =20 - memmove(ram_ptr, buf, *l); + qemu_ram_move(ram_ptr, buf, *l); invalidate_and_set_dirty(mr, mr_addr, *l); =20 return MEMTX_OK; @@ -3365,7 +3449,7 @@ static MemTxResult flatview_read_continue_step(MemTxA= ttrs attrs, uint8_t *buf, uint8_t *ram_ptr =3D qemu_ram_ptr_length(mr->ram_block, mr_addr, l, false, false); =20 - memcpy(buf, ram_ptr, *l); + qemu_ram_copy(buf, ram_ptr, *l); =20 return MEMTX_OK; } @@ -3503,8 +3587,7 @@ MemTxResult address_space_write_rom(AddressSpace *as,= hwaddr addr, l =3D memory_access_size(mr, l, addr1); } else { /* ROM/RAM case */ - void *ram_ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); - memcpy(ram_ptr, buf, l); + qemu_ram_copy(qemu_map_ram_ptr(mr->ram_block, addr1), buf, l); invalidate_and_set_dirty(mr, addr1, l); } len -=3D l; --=20 2.54.0 From nobody Sun Jul 26 13:29:02 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1781517841; cv=none; d=zohomail.com; s=zohoarc; b=X8Zraa7nZkNlqWL+JQ3IXpgWrrivwX3/Jj4D0JcRU2RJfMv3gKbeB2RHrxEQayHhItP9MCy+N0KCt704QcuSG/hN/P+PJTiRiicJrjkga0RFmivnhliGRI7HP+avm2LSfC3Q7mriLuEnVfGiJCpSr1ssa/tuGpsVErWUo7QMizk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1781517841; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2NewIdIPrMLwUps+7LWKz8VBHoxGyGBFdr1NdZYqt4E=; b=ZC41hp9TKFHBc2lFNRGc167qmBLVhO7XFemIrPNu5rCUhhLrmluM1d2PRrPtxTH5allA0RyOqTgp/s7ciuYeuh3yYUBzNTuIli0IWb8sB51VKrceXwUWgG6lfnVgiSD2gFqPeORNesM/rhHjmdaiqKs7Et8K7ZtA6h2DFSC7Sd4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1781517841130743.9087416332382; Mon, 15 Jun 2026 03:04:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wZ4AD-0000Gv-79; Mon, 15 Jun 2026 06:03:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4AB-0000GX-P1 for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:03:27 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wZ4A9-0000AC-SM for qemu-devel@nongnu.org; Mon, 15 Jun 2026 06:03:27 -0400 Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-67-ShJNzY8KND68XgNvKr7zfg-1; Mon, 15 Jun 2026 06:03:21 -0400 Received: from mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 8401C1800350; Mon, 15 Jun 2026 10:03:19 +0000 (UTC) Received: from gshan-thinkpadx1nanogen2.rmtau.csb (unknown [10.64.136.2]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 905F61955BCE; Mon, 15 Jun 2026 10:03:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1781517805; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2NewIdIPrMLwUps+7LWKz8VBHoxGyGBFdr1NdZYqt4E=; b=LwwJ1LwwlJA3l7Ln724wtLCNGyl36/0Oka50sfowgR+RWpF6vT1KQnd+HITUpXOiimHUxU xEtjSGupd5syhTuimbZrdYaZaGiDwsuMVJgdT7LmvgOoYsQEU1gTzljNfJltkRIXLmOuMs ESZ4vZYxF+cDQnYHx/jJJ1xsANJKFOw= X-MC-Unique: ShJNzY8KND68XgNvKr7zfg-1 X-Mimecast-MFC-AGG-ID: ShJNzY8KND68XgNvKr7zfg_1781517800 From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, mst@redhat.com, peterx@redhat.com, alex@shazbot.org, richard.henderson@linaro.org, peter.maydell@linaro.org, berrange@redhat.com, philmd@oss.qualcomm.com, philmd@mailo.com, david@kernel.org, clg@redhat.com, pbonzini@redhat.com, phrdina@redhat.com, jugraham@redhat.com, liugang24219@sangfor.com.cn, dinghui@sangfor.com.cn, shan.gavin@gmail.com Subject: [PATCH v2 2/2] system/memory: Make ram device region directly accessible Date: Mon, 15 Jun 2026 20:01:59 +1000 Message-ID: <20260615100200.266968-3-gshan@redhat.com> In-Reply-To: <20260615100200.266968-1-gshan@redhat.com> References: <20260615100200.266968-1-gshan@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1781517843667158501 Content-Type: text/plain; charset="utf-8" This basically reverts 4a2e242bbb30 ("memory: Don't use memcpy for ram_device regions") to make ram device region directly accessible again. With this, the bounce buffer is bypassed in address_space_map() when a ram device region is involved, potentially avoid to overrun the (small) bounce buffer. Reported-by: Julia Graham Suggested-by: Michael S. Tsirkin Suggested-by: Peter Xu Suggested-by: Richard Henderson Suggested-by: Peter Maydell Signed-off-by: Gavin Shan --- include/system/memory.h | 11 ++--------- system/memory.c | 41 +---------------------------------------- system/trace-events | 2 -- 3 files changed, 3 insertions(+), 51 deletions(-) diff --git a/include/system/memory.h b/include/system/memory.h index 5878727d09..7d6ef9b32e 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2916,15 +2916,8 @@ static inline bool memory_region_supports_direct_acc= ess(const MemoryRegion *mr) if (memory_region_is_romd(mr)) { return true; } - if (!memory_region_is_ram(mr)) { - return false; - } - /* - * RAM DEVICE regions can be accessed directly using memcpy, but it mi= ght - * be MMIO and access using mempy can be wrong (e.g., using instructio= ns not - * intended for MMIO access). So we treat this as IO. - */ - return !memory_region_is_ram_device(mr); + + return memory_region_is_ram(mr); } =20 static inline bool memory_access_is_direct(const MemoryRegion *mr, diff --git a/system/memory.c b/system/memory.c index 739ba11da6..9549dd1a94 100644 --- a/system/memory.c +++ b/system/memory.c @@ -1362,43 +1362,6 @@ const MemoryRegionOps unassigned_mem_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 -static uint64_t memory_region_ram_device_read(void *opaque, - hwaddr addr, unsigned size) -{ - MemoryRegion *mr =3D opaque; - uint64_t data =3D ldn_he_p(mr->ram_block->host + addr, size); - - trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, s= ize); - - return data; -} - -static void memory_region_ram_device_write(void *opaque, hwaddr addr, - uint64_t data, unsigned size) -{ - MemoryRegion *mr =3D opaque; - - trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, = size); - - stn_he_p(mr->ram_block->host + addr, size, data); -} - -static const MemoryRegionOps ram_device_mem_ops =3D { - .read =3D memory_region_ram_device_read, - .write =3D memory_region_ram_device_write, - .endianness =3D HOST_BIG_ENDIAN ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_EN= DIAN, - .valid =3D { - .min_access_size =3D 1, - .max_access_size =3D 8, - .unaligned =3D true, - }, - .impl =3D { - .min_access_size =3D 1, - .max_access_size =3D 8, - .unaligned =3D true, - }, -}; - bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, @@ -1676,10 +1639,8 @@ void memory_region_init_ram_device_ptr(MemoryRegion = *mr, Object *owner, const char *name, uint64_t size, void *ptr) { - memory_region_init_io(mr, owner, &ram_device_mem_ops, mr, name, size); - mr->ram =3D true; + memory_region_init_ram_ptr(mr, owner, name, size, ptr); mr->ram_device =3D true; - memory_region_set_ram_ptr(mr, size, ptr); } =20 void memory_region_init_alias(MemoryRegion *mr, Object *owner, diff --git a/system/trace-events b/system/trace-events index e6e1b61279..34af0a3a1e 100644 --- a/system/trace-events +++ b/system/trace-events @@ -20,8 +20,6 @@ memory_region_ops_read(int cpu_index, void *mr, uint64_t = addr, uint64_t value, u memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t v= alue, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64" value= 0x%"PRIx64" size %u name '%s'" memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint6= 4_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64= " size %u" memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint= 64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx6= 4" size %u" -memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr, uint= 64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64"= size %u" -memory_region_ram_device_write(int cpu_index, void *mr, uint64_t addr, uin= t64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64= " size %u" memory_region_sync_dirty(const char *mr, const char *listener, int global)= "mr '%s' listener '%s' synced (global=3D%d)" flatview_new(void *view, void *root) "%p (root %p)" flatview_destroy(void *view, void *root) "%p (root %p)" --=20 2.54.0