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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1781156096057158500 From: Brian Cain Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- target/hexagon/cpu.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 09c8b182c24..54c539de2d1 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -20,6 +20,7 @@ #include "qemu/qemu-print.h" #include "cpu.h" #include "internal.h" +#include "exec/cputlb.h" #include "exec/translation-block.h" #include "qapi/error.h" #include "hw/core/qdev-properties.h" @@ -37,6 +38,7 @@ #include "accel/tcg/cpu-ldst.h" #include "qemu/main-loop.h" #include "hex_interrupts.h" +#include "hexswi.h" #include "exec/cpu-interrupt.h" #include "exec/target_page.h" #include "hw/hexagon/hexagon_globalreg.h" @@ -503,6 +505,24 @@ static void find_qemu_subpage(vaddr *addr, hwaddr *phy= s, uint64_t page_size) *phys +=3D offset; } =20 +static hwaddr hexagon_cpu_get_phys_addr_debug(CPUState *cs, vaddr addr) +{ + CPUHexagonState *env =3D cpu_env(cs); + hwaddr phys_addr; + int prot; + uint64_t page_size =3D 0; + int32_t excp =3D 0; + int mmu_idx =3D MMU_KERNEL_IDX; + + if (get_physical_address(env, &phys_addr, &prot, &page_size, &excp, + addr, 0, mmu_idx)) { + find_qemu_subpage(&addr, &phys_addr, page_size); + return phys_addr; + } + + return -1; +} + =20 #define INVALID_BADVA 0xbadabada =20 @@ -610,6 +630,13 @@ static bool hexagon_tlb_fill(CPUState *cs, vaddr addre= ss, int size, do_raise_exception(env, cs->exception_index, env->gpr[HEX_REG_PC], ret= addr); } =20 +#include "hw/core/sysemu-cpu-ops.h" + +static const struct SysemuCPUOps hexagon_sysemu_ops =3D { + .has_work =3D hexagon_cpu_has_work, + .get_phys_addr_debug =3D hexagon_cpu_get_phys_addr_debug, +}; + static bool hexagon_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { CPUHexagonState *env =3D cpu_env(cs); @@ -652,6 +679,8 @@ static const TCGCPUOps hexagon_tcg_ops =3D { .pointer_wrap =3D hexagon_pointer_wrap, .cpu_exec_reset =3D cpu_reset, .tlb_fill =3D hexagon_tlb_fill, + .cpu_exec_halt =3D hexagon_cpu_has_work, + .do_interrupt =3D hexagon_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ }; =20 @@ -679,9 +708,12 @@ static void hexagon_cpu_class_init(ObjectClass *c, con= st void *data) cc->gdb_core_xml_file =3D "hexagon-core.xml"; cc->disas_set_info =3D hexagon_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY + cc->sysemu_ops =3D &hexagon_sysemu_ops; dc->vmsd =3D &vmstate_hexagon_cpu; #endif +#ifdef CONFIG_TCG cc->tcg_ops =3D &hexagon_tcg_ops; +#endif } =20 static void hexagon_cpu_class_base_init(ObjectClass *c, const void *data) --=20 2.34.1