Hi Shameer, Peter,
On 6/9/26 1:25 PM, Shameer Kolothum wrote:
> Hi,
>
> Changes from v6:
> https://lore.kernel.org/qemu-devel/20260601114221.457995-1-skolothumtho@nvidia.com/
>
> - Addressed v6 feedback and picked up R-by/T-by tags. Thanks!
> - mmap the host VINTF Page0 at IOMMU_VIOMMU_ALLOC instead of on VINTF
> enable (patch #14)
> - Reset the per-VCMDQ Page0 cache when a queue is freed (patch #19)
> - Distributed the reset teardown into the patches that introduce each
> resource (patches #18, #21)
> - Added a VCMDQ readiness helper and renamed the Page0 backing-pointer
> helper to vintf_lvcmdq_ptr() (patches #18, #19)
> - Trace the VCMDQ Page0 backing, hw vs cache (patch #19)
> - Renamed patch #24 to reflect the changes accurately
> - Updated the design and lifecycle documentation (patch #30)
> - Based on top of Nathan's "Resolve AUTO properties" v6 series [0].
>
> Please find the complete branch here:
> https://github.com/shamiali2008/qemu-master/tree/master-vcmdq-v7-ext
>
> Sanity tested on NVIDIA Grace. Further testing in progress.
Successfully tested on Grace-Hopper. Feel free to take my T-b:
Tested-by: Eric Auger <eric.auger@redhat.com>
All patches are now reviewed. Peter, please consider pulling this if you
are satisfied with it, in addition to
[PATCH v6 0/9] hw/arm/smmuv3-accel: Resolve AUTO properties <https://lore.kernel.org/all/20c8948f-1933-4410-96fc-10a2d53cb40a@redhat.com/#r>
[PATCH v2] hw/pci/pci: Enforce pci_setup_iommu_per_bus() is called only
once per bus
( see
https://lore.kernel.org/all/20c8948f-1933-4410-96fc-10a2d53cb40a@redhat.com/)
Thanks
Eric
>
> Feedback and testing are very welcome.
>
> Thanks,
> Shameer
> [0] https://lore.kernel.org/qemu-devel/20260608174900.2227340-1-nathanc@nvidia.com/
>
> ---
> Background(from RFCv1):
> https://lore.kernel.org/qemu-devel/20251210133737.78257-1-skolothumtho@nvidia.com/
>
> Thanks to Nicolin for the initial patches and testing on which this
> is based.
>
> Tegra241 CMDQV extends SMMUv3 by allocating per-VM "virtual interfaces"
> (VINTFs), each hosting up to 128 VCMDQs.
>
> Each VINTF exposes two 64KB MMIO pages:
> - Page0 – guest owned control and status registers (directly mapped
> into the VM)
> - Page1 – queue configuration registers (trapped/emulated by QEMU)
>
> Unlike the standard SMMU CMDQ, a guest owned Tegra241 VCMDQ does not
> support the full command set. Only a subset, primarily invalidation
> related commands, is accepted by the CMDQV hardware. For this reason,
> a distinct CMDQV device must be exposed to the guest, and the guest OS
> must include a Tegra241 CMDQV aware driver to take advantage of the
> hardware acceleration.
>
> VCMDQ support is integrated via the IOMMU_HW_QUEUE_ALLOC mechanism,
> allowing QEMU to attach guest configured VCMDQ buffers to the
> underlying CMDQV hardware through IOMMUFD. The Linux kernel already
> supports the full CMDQV virtualisation model via IOMMUFD[0].
> ---
>
> Nicolin Chen (15):
> backends/iommufd: Update iommufd_backend_get_device_info
> backends/iommufd: Update iommufd_backend_alloc_viommu to allow user
> ptr
> backends/iommufd: Introduce iommufd_backend_alloc_hw_queue
> backends/iommufd: Introduce iommufd_backend_viommu_mmap
> hw/arm/tegra241-cmdqv: Implement CMDQV init
> hw/arm/tegra241-cmdqv: Implement CMDQV vIOMMU alloc/free
> hw/arm/tegra241-cmdqv: mmap host VINTF Page0 for CMDQV
> hw/arm/tegra241-cmdqv: Emulate CMDQ-V Config region
> hw/arm/tegra241-cmdqv: Emulate VCMDQ register reads
> hw/arm/tegra241-cmdqv: Emulate VCMDQ register writes
> hw/arm/tegra241-cmdqv: Allocate HW VCMDQs once configured
> hw/arm/tegra241-cmdqv: Use mmap'd host VINTF page0 for virtual VINTF
> page0
> hw/arm/tegra241-cmdqv: Initialize register state on reset
> hw/arm/tegra241-cmdqv: Limit queue size based on backend page size
> hw/arm/virt-acpi: Advertise Tegra241 CMDQV nodes in DSDT
>
> Shameer Kolothum (16):
> system/iommufd: Remove unused viommu pointer from IOMMUFDVeventq
> hw/arm/smmuv3-accel: Introduce CMDQV ops interface
> hw/arm/tegra241-cmdqv: Add Tegra241 CMDQV ops backend stub
> hw/arm/smmuv3-accel: Wire CMDQV ops into accel lifecycle
> hw/arm/virt: Use stored SMMUv3 device list for IORT build
> hw/arm/tegra241-cmdqv: Probe host Tegra241 CMDQV support
> hw/arm/virt: Link SMMUv3 CMDQV resources to platform bus
> hw/arm/tegra241-cmdqv: Route allocated VCMDQ Page0 accesses to the
> mmap'd host VINTF page0
> memory: Allow RAM device regions to skip IOMMU mapping
> hw/arm/smmuv3-accel: Introduce common helper for veventq read
> hw/arm/tegra241-cmdqv: Read and propagate Tegra241 CMDQV errors
> hw/arm/smmuv3: Add per-device identifier property
> hw/arm/smmuv3-accel: Introduce helper to query CMDQV type
> hw/arm/smmuv3-accel: Enforce viommu association when CMDQV is active
> hw/arm/tegra241-cmdqv: Document the CMDQV design and lifecycle
> hw/arm/smmuv3: Add cmdqv property for SMMUv3 device
>
> hw/arm/smmuv3-accel.h | 48 ++
> hw/arm/tegra241-cmdqv.h | 384 +++++++++++
> include/hw/arm/smmuv3.h | 3 +
> include/hw/arm/virt.h | 1 +
> include/system/iommufd.h | 17 +-
> include/system/memory.h | 21 +
> backends/iommufd.c | 64 ++
> hw/arm/smmuv3-accel-stubs.c | 12 +
> hw/arm/smmuv3-accel.c | 194 ++++--
> hw/arm/smmuv3.c | 10 +
> hw/arm/tegra241-cmdqv-stubs.c | 16 +
> hw/arm/tegra241-cmdqv.c | 1119 +++++++++++++++++++++++++++++++++
> hw/arm/virt-acpi-build.c | 127 ++--
> hw/arm/virt.c | 37 ++
> hw/vfio/iommufd.c | 4 +-
> hw/vfio/listener.c | 6 +
> system/memory.c | 10 +
> backends/trace-events | 4 +-
> hw/arm/Kconfig | 5 +
> hw/arm/meson.build | 2 +
> hw/arm/trace-events | 11 +
> hw/vfio/trace-events | 1 +
> qemu-options.hx | 8 +
> 23 files changed, 2024 insertions(+), 80 deletions(-)
> create mode 100644 hw/arm/tegra241-cmdqv.h
> create mode 100644 hw/arm/tegra241-cmdqv-stubs.c
> create mode 100644 hw/arm/tegra241-cmdqv.c
>