From nobody Tue Aug 25 22:59:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1780998982963937.2444439513937; Tue, 9 Jun 2026 02:56:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wWtB6-00071Y-F3; Tue, 09 Jun 2026 05:55:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wWtAq-0006nQ-Gt for qemu-devel@nongnu.org; Tue, 09 Jun 2026 05:55:12 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wWtAo-0004w1-De for qemu-devel@nongnu.org; Tue, 09 Jun 2026 05:55:08 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxLurt4idqiDUSAA--.48158S3; Tue, 09 Jun 2026 17:54:54 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowJDxSMHg4idqJrGgAA--.28412S12; Tue, 09 Jun 2026 17:54:53 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: Bibo Mao , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 10/14] linux-user/loongarch64: Use sys_state when accessing CSR registers Date: Tue, 9 Jun 2026 17:28:20 +0800 Message-Id: <20260609092824.227250-11-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20260609092824.227250-1-gaosong@loongson.cn> References: <20260609092824.227250-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJDxSMHg4idqJrGgAA--.28412S12 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1780998985460154100 From: Bibo Mao When accessing CSR registers in directory linux-user/loongarch64/, use sys_state rather than env. There is no function change. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Song Gao Message-ID: <20260605083844.175612-1-maobibo@loongson.cn> Signed-off-by: Song Gao --- linux-user/loongarch64/cpu_loop.c | 5 +++-- linux-user/loongarch64/elfload.c | 4 +++- linux-user/loongarch64/signal.c | 16 ++++++++++------ 3 files changed, 16 insertions(+), 9 deletions(-) diff --git a/linux-user/loongarch64/cpu_loop.c b/linux-user/loongarch64/cpu= _loop.c index 603fcc39c7..27d6eef5cb 100644 --- a/linux-user/loongarch64/cpu_loop.c +++ b/linux-user/loongarch64/cpu_loop.c @@ -19,6 +19,7 @@ enum { =20 void cpu_loop(CPULoongArchState *env) { + CPUSysState *sys =3D env_sys(env); CPUState *cs =3D env_cpu(env); int trapnr, si_code; abi_long ret; @@ -103,10 +104,10 @@ void cpu_loop(CPULoongArchState *env) * choose the layout of any signal frame. */ case EXCCODE_SXD: - env->CSR_EUEN |=3D R_CSR_EUEN_SXE_MASK; + sys->CSR_EUEN |=3D R_CSR_EUEN_SXE_MASK; break; case EXCCODE_ASXD: - env->CSR_EUEN |=3D R_CSR_EUEN_ASXE_MASK; + sys->CSR_EUEN |=3D R_CSR_EUEN_ASXE_MASK; break; =20 case EXCP_ATOMIC: diff --git a/linux-user/loongarch64/elfload.c b/linux-user/loongarch64/elfl= oad.c index ce3bd0c607..e53957e36d 100644 --- a/linux-user/loongarch64/elfload.c +++ b/linux-user/loongarch64/elfload.c @@ -67,6 +67,8 @@ const char *get_elf_platform(CPUState *cs) =20 void elf_core_copy_regs(target_elf_gregset_t *r, const CPULoongArchState *= env) { + CPUSysState *sys =3D env_sys((CPULoongArchState *)env); + r->pt.regs[0] =3D 0; =20 for (int i =3D 1; i < ARRAY_SIZE(env->gpr); i++) { @@ -74,5 +76,5 @@ void elf_core_copy_regs(target_elf_gregset_t *r, const CP= ULoongArchState *env) } =20 r->pt.csr_era =3D tswapreg(env->pc); - r->pt.csr_badv =3D tswapreg(env->CSR_BADV); + r->pt.csr_badv =3D tswapreg(sys->CSR_BADV); } diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signa= l.c index 1a322f9697..eff75bcdc8 100644 --- a/linux-user/loongarch64/signal.c +++ b/linux-user/loongarch64/signal.c @@ -126,6 +126,8 @@ static abi_ptr extframe_alloc(struct extctx_layout *ext= ctx, static abi_ptr setup_extcontext(CPULoongArchState *env, struct extctx_layout *extctx, abi_ptr sp) { + CPUSysState *sys =3D env_sys(env); + memset(extctx, 0, sizeof(struct extctx_layout)); =20 /* Grow down, alloc "end" context info first. */ @@ -134,10 +136,10 @@ static abi_ptr setup_extcontext(CPULoongArchState *en= v, /* For qemu, there is no lazy fp context switch, so fp always present.= */ extctx->flags =3D SC_USED_FP; =20 - if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) { + if (FIELD_EX64(sys->CSR_EUEN, CSR_EUEN, ASXE)) { sp =3D extframe_alloc(extctx, &extctx->lasx, sizeof(struct target_lasx_context), LASX_CTX_ALIGN= , sp); - } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) { + } else if (FIELD_EX64(sys->CSR_EUEN, CSR_EUEN, SXE)) { sp =3D extframe_alloc(extctx, &extctx->lsx, sizeof(struct target_lsx_context), LSX_CTX_ALIGN, = sp); } else { @@ -152,6 +154,7 @@ static void setup_sigframe(CPULoongArchState *env, struct target_sigcontext *sc, struct extctx_layout *extctx) { + CPUSysState *sys =3D env_sys(env); struct target_sctx_info *info; int i; =20 @@ -166,7 +169,7 @@ static void setup_sigframe(CPULoongArchState *env, * Set extension context */ =20 - if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) { + if (FIELD_EX64(sys->CSR_EUEN, CSR_EUEN, ASXE)) { struct target_lasx_context *lasx_ctx; info =3D extctx->lasx.haddr; =20 @@ -183,7 +186,7 @@ static void setup_sigframe(CPULoongArchState *env, } __put_user(read_fcc(env), &lasx_ctx->fcc); __put_user(env->fcsr0, &lasx_ctx->fcsr); - } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) { + } else if (FIELD_EX64(sys->CSR_EUEN, CSR_EUEN, SXE)) { struct target_lsx_context *lsx_ctx; info =3D extctx->lsx.haddr; =20 @@ -350,6 +353,7 @@ void setup_rt_frame(int sig, struct target_sigaction *k= a, target_siginfo_t *info, target_sigset_t *set, CPULoongArchState *env) { + CPUSysState *sys =3D env_sys(env); struct target_rt_sigframe *frame; struct extctx_layout extctx; abi_ptr frame_addr; @@ -365,10 +369,10 @@ void setup_rt_frame(int sig, struct target_sigaction = *ka, return; } =20 - if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) { + if (FIELD_EX64(sys->CSR_EUEN, CSR_EUEN, ASXE)) { extctx.lasx.haddr =3D (void *)frame + (extctx.lasx.gaddr - frame_a= ddr); extctx.end.haddr =3D (void *)frame + (extctx.end.gaddr - frame_add= r); - } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) { + } else if (FIELD_EX64(sys->CSR_EUEN, CSR_EUEN, SXE)) { extctx.lsx.haddr =3D (void *)frame + (extctx.lsx.gaddr - frame_add= r); extctx.end.haddr =3D (void *)frame + (extctx.end.gaddr - frame_add= r); } else { --=20 2.54.0