From: Bibo Mao <maobibo@loongson.cn>

Instruction rdtime is to read TSC timestamp and logic vCPU id,
it is also used by Linux user mode emulation. However function
get_csr_offset() cannot be called in user mode emulation, here
macro CSR_OFFSET and CPU_CSR_OFFSET are added. The added macro
can be called in both user emulation and system emulation.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@mailo.com>
Tested-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20260605083910.175647-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/csr.c                            | 4 ++--
 target/loongarch/csr.h                            | 3 +++
 target/loongarch/tcg/insn_trans/trans_extra.c.inc | 6 +++++-
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/target/loongarch/csr.c b/target/loongarch/csr.c
index d759be316b..309b826ca9 100644
--- a/target/loongarch/csr.c
+++ b/target/loongarch/csr.c
@@ -9,14 +9,14 @@
 #define CSR_OFF_FUNCS(NAME, FL, RD, WR)                    \
     [LOONGARCH_CSR_##NAME] = {                             \
         .name   = (stringify(NAME)),                       \
-        .offset = offsetof(CPULoongArchState, CSR_##NAME), \
+        .offset = CSR_OFFSET(CSR_##NAME),                  \
         .flags = FL, .readfn = RD, .writefn = WR           \
     }
 
 #define CSR_OFF_ARRAY(NAME, N)                                \
     [LOONGARCH_CSR_##NAME(N)] = {                             \
         .name   = (stringify(NAME##N)),                       \
-        .offset = offsetof(CPULoongArchState, CSR_##NAME[N]), \
+        .offset = CSR_OFFSET(CSR_##NAME[N]),                  \
         .flags = CSRFL_BASIC, .readfn = NULL, .writefn = NULL           \
     }
 
diff --git a/target/loongarch/csr.h b/target/loongarch/csr.h
index ca988c21db..6e17275546 100644
--- a/target/loongarch/csr.h
+++ b/target/loongarch/csr.h
@@ -8,6 +8,9 @@
 
 #include "cpu-csr.h"
 
+#define CSR_OFFSET(id)                  offsetof(CPULoongArchState, id)
+#define CPU_CSR_OFFSET(id, vm_level)    CSR_OFFSET(id)
+
 typedef void (*GenCSRFunc)(void);
 enum {
     CSRFL_READONLY = (1 << 0),
diff --git a/target/loongarch/tcg/insn_trans/trans_extra.c.inc b/target/loongarch/tcg/insn_trans/trans_extra.c.inc
index 298a80cff5..655dce329e 100644
--- a/target/loongarch/tcg/insn_trans/trans_extra.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_extra.c.inc
@@ -3,6 +3,7 @@
  * Copyright (c) 2021 Loongson Technology Corporation Limited
  */
 
+#include "csr.h"
 static bool trans_break(DisasContext *ctx, arg_break *a)
 {
     generate_exception(ctx, EXCCODE_BRK);
@@ -46,13 +47,16 @@ static bool gen_rdtime(DisasContext *ctx, arg_rr *a,
 {
     TCGv dst1 = gpr_dst(ctx, a->rd, EXT_NONE);
     TCGv dst2 = gpr_dst(ctx, a->rj, EXT_NONE);
+    tcg_target_long offset;
 
     translator_io_start(&ctx->base);
     gen_helper_rdtime_d(dst1, tcg_env);
     if (word) {
         tcg_gen_sextract_tl(dst1, dst1, high ? 32 : 0, 32);
     }
-    tcg_gen_ld_i64(dst2, tcg_env, offsetof(CPULoongArchState, CSR_TID));
+
+    offset = CPU_CSR_OFFSET(CSR_TID, 0);
+    tcg_gen_ld_i64(dst2, tcg_env, offset);
 
     return true;
 }
-- 
2.54.0