target/i386: Update cc_op for SAHF

[PATCH] target/i386: Update cc_op for SAHF

Posted by Richard Henderson 1 month, 1 week ago

Removing the call to gen_compute_eflags meant we no longer
updated cc_op after computing EFLAGS.

Cc: qemu-stable@nongnu.org
Fixes: da7649c6aeef ("target/i386/tcg: do not compute all flags for SAHF")
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3537
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/i386/tcg/emit.c.inc | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index ce636b6c56..59948fe64d 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -3768,10 +3768,13 @@ static void gen_SAHF(DisasContext *s, X86DecodedInsn *decode)
         return gen_illegal_opcode(s);
     }
     tcg_gen_shri_tl(s->T0, cpu_regs[R_EAX], 8);
-    gen_neg_setcc(s, JCC_O << 1, cpu_cc_src);
-    tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
+    gen_neg_setcc(s, JCC_O << 1, s->T1);
+    tcg_gen_andi_tl(s->T1, s->T1, CC_O);
     tcg_gen_andi_tl(s->T0, s->T0, CC_S | CC_Z | CC_A | CC_P | CC_C);
-    tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, s->T0);
+    tcg_gen_or_tl(s->T0, s->T0, s->T1);
+
+    decode->cc_src = s->T0;
+    decode->cc_op = CC_OP_EFLAGS;
 }
 
 static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)
-- 
2.43.0

Re: [PATCH] target/i386: Update cc_op for SAHF

Posted by Richard Henderson 1 week, 4 days ago

Ping 3.

On 6/8/26 17:28, Richard Henderson wrote:
> Removing the call to gen_compute_eflags meant we no longer
> updated cc_op after computing EFLAGS.
> 
> Cc: qemu-stable@nongnu.org
> Fixes: da7649c6aeef ("target/i386/tcg: do not compute all flags for SAHF")
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3537
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/i386/tcg/emit.c.inc | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
> index ce636b6c56..59948fe64d 100644
> --- a/target/i386/tcg/emit.c.inc
> +++ b/target/i386/tcg/emit.c.inc
> @@ -3768,10 +3768,13 @@ static void gen_SAHF(DisasContext *s, X86DecodedInsn *decode)
>           return gen_illegal_opcode(s);
>       }
>       tcg_gen_shri_tl(s->T0, cpu_regs[R_EAX], 8);
> -    gen_neg_setcc(s, JCC_O << 1, cpu_cc_src);
> -    tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
> +    gen_neg_setcc(s, JCC_O << 1, s->T1);
> +    tcg_gen_andi_tl(s->T1, s->T1, CC_O);
>       tcg_gen_andi_tl(s->T0, s->T0, CC_S | CC_Z | CC_A | CC_P | CC_C);
> -    tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, s->T0);
> +    tcg_gen_or_tl(s->T0, s->T0, s->T1);
> +
> +    decode->cc_src = s->T0;
> +    decode->cc_op = CC_OP_EFLAGS;
>   }
>   
>   static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)

Re: [PATCH] target/i386: Update cc_op for SAHF

Posted by Philippe Mathieu-Daudé 1 week, 3 days ago

Hi Richard,

(Maybe you didn't Cc'ed enough x86 experts?)

On 7/7/26 18:46, Richard Henderson wrote:
> Ping 3.

I don't think you are waiting a review from me, but in case it
helps to unlock you, I tried to review it but since x86 is not
my cup of tea at all I got lost with global registers use. Anyway
the overall change looks safe enough and indeed fix the issue
reported, so to the best of my x86 knowledge:

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

> 
> On 6/8/26 17:28, Richard Henderson wrote:
>> Removing the call to gen_compute_eflags meant we no longer
>> updated cc_op after computing EFLAGS.
>>
>> Cc: qemu-stable@nongnu.org
>> Fixes: da7649c6aeef ("target/i386/tcg: do not compute all flags for 
>> SAHF")
>> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3537
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   target/i386/tcg/emit.c.inc | 9 ++++++---
>>   1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
>> index ce636b6c56..59948fe64d 100644
>> --- a/target/i386/tcg/emit.c.inc
>> +++ b/target/i386/tcg/emit.c.inc
>> @@ -3768,10 +3768,13 @@ static void gen_SAHF(DisasContext *s, 
>> X86DecodedInsn *decode)
>>           return gen_illegal_opcode(s);
>>       }
>>       tcg_gen_shri_tl(s->T0, cpu_regs[R_EAX], 8);
>> -    gen_neg_setcc(s, JCC_O << 1, cpu_cc_src);
>> -    tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
>> +    gen_neg_setcc(s, JCC_O << 1, s->T1);
>> +    tcg_gen_andi_tl(s->T1, s->T1, CC_O);
>>       tcg_gen_andi_tl(s->T0, s->T0, CC_S | CC_Z | CC_A | CC_P | CC_C);
>> -    tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, s->T0);
>> +    tcg_gen_or_tl(s->T0, s->T0, s->T1);
>> +
>> +    decode->cc_src = s->T0;
>> +    decode->cc_op = CC_OP_EFLAGS;
>>   }
>>   static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)
> 
>

Re: [PATCH] target/i386: Update cc_op for SAHF

Posted by Richard Henderson 3 weeks, 1 day ago

Ping 2.

On 6/8/26 17:28, Richard Henderson wrote:
> Removing the call to gen_compute_eflags meant we no longer
> updated cc_op after computing EFLAGS.
> 
> Cc: qemu-stable@nongnu.org
> Fixes: da7649c6aeef ("target/i386/tcg: do not compute all flags for SAHF")
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3537
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/i386/tcg/emit.c.inc | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
> index ce636b6c56..59948fe64d 100644
> --- a/target/i386/tcg/emit.c.inc
> +++ b/target/i386/tcg/emit.c.inc
> @@ -3768,10 +3768,13 @@ static void gen_SAHF(DisasContext *s, X86DecodedInsn *decode)
>           return gen_illegal_opcode(s);
>       }
>       tcg_gen_shri_tl(s->T0, cpu_regs[R_EAX], 8);
> -    gen_neg_setcc(s, JCC_O << 1, cpu_cc_src);
> -    tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
> +    gen_neg_setcc(s, JCC_O << 1, s->T1);
> +    tcg_gen_andi_tl(s->T1, s->T1, CC_O);
>       tcg_gen_andi_tl(s->T0, s->T0, CC_S | CC_Z | CC_A | CC_P | CC_C);
> -    tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, s->T0);
> +    tcg_gen_or_tl(s->T0, s->T0, s->T1);
> +
> +    decode->cc_src = s->T0;
> +    decode->cc_op = CC_OP_EFLAGS;
>   }
>   
>   static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)

Re: [PATCH] target/i386: Update cc_op for SAHF

Posted by Richard Henderson 4 weeks, 1 day ago

Ping.

On 6/8/26 17:28, Richard Henderson wrote:
> Removing the call to gen_compute_eflags meant we no longer
> updated cc_op after computing EFLAGS.
> 
> Cc: qemu-stable@nongnu.org
> Fixes: da7649c6aeef ("target/i386/tcg: do not compute all flags for SAHF")
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3537
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/i386/tcg/emit.c.inc | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
> index ce636b6c56..59948fe64d 100644
> --- a/target/i386/tcg/emit.c.inc
> +++ b/target/i386/tcg/emit.c.inc
> @@ -3768,10 +3768,13 @@ static void gen_SAHF(DisasContext *s, X86DecodedInsn *decode)
>           return gen_illegal_opcode(s);
>       }
>       tcg_gen_shri_tl(s->T0, cpu_regs[R_EAX], 8);
> -    gen_neg_setcc(s, JCC_O << 1, cpu_cc_src);
> -    tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
> +    gen_neg_setcc(s, JCC_O << 1, s->T1);
> +    tcg_gen_andi_tl(s->T1, s->T1, CC_O);
>       tcg_gen_andi_tl(s->T0, s->T0, CC_S | CC_Z | CC_A | CC_P | CC_C);
> -    tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, s->T0);
> +    tcg_gen_or_tl(s->T0, s->T0, s->T1);
> +
> +    decode->cc_src = s->T0;
> +    decode->cc_op = CC_OP_EFLAGS;
>   }
>   
>   static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)