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Fri, 05 Jun 2026 04:06:39 -0700 (PDT) From: Qingwei Hu To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com, daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com, jim.shu@sifive.com, Qingwei Hu Subject: [PATCH] hw/intc: riscv_aia: Skip reset for KVM irqchip Date: Fri, 5 Jun 2026 19:06:21 +0800 Message-Id: <20260605110621.644997-1-qingwei.hu@bytedance.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=qingwei.hu@bytedance.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @bytedance.com) X-ZM-MESSAGEID: 1780657653907158500 Content-Type: text/plain; charset="utf-8" The emulated APLIC and IMSIC state arrays are only allocated when QEMU handles the interrupt controller state itself. With KVM AIA/APLIC-IMSIC, the interrupt controller state is owned by the KVM in-kernel irqchip, so these emulated state arrays are not allocated. The reset handlers added for APLIC and IMSIC still clear those arrays unconditionally. This makes qemu_system_reset(), which runs during machine creation, dereference NULL pointers with -machine virt,aia=3Daplic-imsic and KVM. Skip the emulated APLIC and IMSIC reset paths when the interrupt controller is handled by KVM. The emulated paths are unchanged for TCG and for configurations that use QEMU emulation. Fixes: 99bfcd329a ("hw/intc: riscv_aplic: Add reset API to APLIC") Fixes: 766391483b ("hw/intc: riscv_imsic: Add reset API to IMSIC") Signed-off-by: Qingwei Hu --- hw/intc/riscv_aplic.c | 4 ++++ hw/intc/riscv_imsic.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index c2c67c29e6..84606e9f3d 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw/intc/riscv_aplic.c @@ -910,6 +910,10 @@ static void riscv_aplic_reset_enter(Object *obj, Reset= Type type) RISCVAPLICState *aplic =3D RISCV_APLIC(obj); int i; =20 + if (!riscv_use_emulated_aplic(aplic->msimode)) { + return; + } + aplic->domaincfg =3D 0; memset(aplic->sourcecfg, 0, sizeof(uint32_t) * aplic->num_irqs); memset(aplic->target, 0, sizeof(uint32_t) * aplic->num_irqs); diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index ac59496c22..f1f23c3a3e 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -347,6 +347,10 @@ static void riscv_imsic_reset_enter(Object *obj, Reset= Type type) RISCVIMSICState *imsic =3D RISCV_IMSIC(obj); int i; =20 + if (kvm_irqchip_in_kernel()) { + return; + } + memset(imsic->eidelivery, 0, sizeof(uint32_t) * imsic->num_pages); memset(imsic->eithreshold, 0, sizeof(uint32_t) * imsic->num_pages); =20 --=20 2.47.3