From nobody Mon Jun 8 06:38:18 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1780451536; cv=none; d=zohomail.com; s=zohoarc; b=cTERd9QhY1rSbBXWBokN5uypUZFarDFmGSUbW+656tgMhBtLZDPJLWNlS/bjFD3Lb6wPR5EqvfWskIwZ/mSj2BVCAbpDDDkGFt5sQ0nBr20nJdqayMSpeHuEUiyLWOYy/8Lnd3Cd5a+V+79pWN18Nyt0P0rMTS+1UhWFzZZKgiE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1780451536; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=X9cdd10ulrUWVfECmDgJNnRVcOo3A3RtJlvnkV/MAYY=; b=VCHWyRO7nvTw+rlKK+Vzw7+oPAuBweC7zjF0ucEZIN+A2jzuqmsPr0z2/8+8WzBbhjnpITVpRvob7zI0iRRQsvMUo5Ue69/o7Vx4LYyZAlNK1tzsZd+Tfo5O9I/lzwYdPen7Kq71VCnwtUT/8ZQ3jkdOvRT1dueoeGEmqSbCmmY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 178045153544183.0103552400692; Tue, 2 Jun 2026 18:52:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wUalf-0006o6-KS; Tue, 02 Jun 2026 21:51:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wUalb-0006nG-KL for qemu-devel@nongnu.org; Tue, 02 Jun 2026 21:51:35 -0400 Received: from mgamail.intel.com ([198.175.65.15]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wUalZ-0003fq-EK for qemu-devel@nongnu.org; Tue, 02 Jun 2026 21:51:35 -0400 Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2026 18:51:32 -0700 Received: from junjie-desk-dev.bj.intel.com ([10.238.152.71]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2026 18:51:30 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780451494; x=1811987494; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OYWkLcP9nBYSGNEgNcwSidJzJa7+Mo1aAZ1XxU1pqHA=; b=F7qKJiwtjimErLpfRbk+s2Ez5Qq7AaAItt1op6Nt8RFw8jr6T0lDWxLz BXldaH3rkoXLZJ9iu4DiM4AgHiveyjKlgavwvIgHo2DAwxLNoucLc7oh0 9abLDu+PeoLd3Wjkr67x77t/O4zvcYBqRcPQgz3dh4TCGAo39OOdhmqiG Anpzz6Dw9oiwc86Fs9YpWv57/hr6UkWHOxITLde6zK5oPhkpBGYMrgtQU +WVRKfKrQqUsLAB/qOjbmTRUON04L3hSihj+almZADlyqcQBu/15NexH7 /PfHUznTFsViYrOiCfxw0K7xBFz59fhPSeB3Bv6ESUfEDIcEUcr/uc+Ws w==; X-CSE-ConnectionGUID: GncQWjMJRvSCgxwpvmeAug== X-CSE-MsgGUID: ILBCOQwFS4iwsJwLHHGxpw== X-IronPort-AV: E=McAfee;i="6800,10657,11805"; a="84875623" X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="84875623" X-CSE-ConnectionGUID: gYw9qi65QNO4G5d+fL+KTA== X-CSE-MsgGUID: /fEwf1m7Scipps1AEEBOVA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="248387746" From: Junjie Cao To: jonathan.cameron@huawei.com Cc: fan.ni@samsung.com, qemu-devel@nongnu.org, junjie.cao@intel.com Subject: [PATCH 1/3] hw/cxl: add trace-events for mailbox dispatch Date: Wed, 3 Jun 2026 09:34:18 +0800 Message-ID: <20260603013420.904749-2-junjie.cao@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260603013420.904749-1-junjie.cao@intel.com> References: <20260603013420.904749-1-junjie.cao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=198.175.65.15; envelope-from=junjie.cao@intel.com; helo=mgamail.intel.com X-Spam_score_int: -47 X-Spam_score: -4.8 X-Spam_bar: ---- X-Spam_report: (-4.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1780451539082158500 Content-Type: text/plain; charset="utf-8" The CXL subsystem currently has no trace coverage. Debugging mailbox command flow requires either printf or qemu_log_mask, neither of which is well suited for following the dispatch path that is exercised by every guest driver probe. Introduce a dedicated trace-events file under hw/cxl/ and wire it into the build via the trace_events_subdirs list in the top-level meson.build. Add three trace points covering command entry, payload validation, and handler completion in cxl_process_cci_message(): * cxl_mailbox_command - command entry (opcode, len_in) * cxl_mailbox_invalid_payload - payload length check rejection * cxl_mailbox_handler_return - handler completion with return code and len_out The early-exit paths for unimplemented commands, in-progress background operations, and disabled media skip handler dispatch and are therefore not paired with cxl_mailbox_handler_return; an absent return event for a given cxl_mailbox_command identifies these cases in the trace stream. Trace points use the cxl_ prefix so future patches in this subsystem share a single namespace, allowing -trace 'cxl_*' to match all of them. Signed-off-by: Junjie Cao --- hw/cxl/cxl-mailbox-utils.c | 5 +++++ hw/cxl/trace-events | 8 ++++++++ hw/cxl/trace.h | 4 ++++ meson.build | 1 + 4 files changed, 18 insertions(+) create mode 100644 hw/cxl/trace-events create mode 100644 hw/cxl/trace.h diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index d8ba7e8625..521b8c6334 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -27,6 +27,7 @@ #include "system/hostmem.h" #include "qemu/range.h" #include "qapi/qapi-types-cxl.h" +#include "trace.h" =20 #define CXL_CAPACITY_MULTIPLIER (256 * MiB) #define CXL_DC_EVENT_LOG_SIZE 8 @@ -4580,6 +4581,7 @@ int cxl_process_cci_message(CXLCCI *cci, uint8_t set,= uint8_t cmd, CXLDeviceState *cxl_dstate; =20 *len_out =3D 0; + trace_cxl_mailbox_command((set << 8) | cmd, len_in); cxl_cmd =3D &cci->cxl_cmd_set[set][cmd]; h =3D cxl_cmd->handler; if (!h) { @@ -4589,6 +4591,8 @@ int cxl_process_cci_message(CXLCCI *cci, uint8_t set,= uint8_t cmd, } =20 if (len_in !=3D cxl_cmd->in && cxl_cmd->in !=3D ~0) { + trace_cxl_mailbox_invalid_payload((set << 8) | cmd, len_in, + cxl_cmd->in); return CXL_MBOX_INVALID_PAYLOAD_LENGTH; } =20 @@ -4642,6 +4646,7 @@ int cxl_process_cci_message(CXLCCI *cci, uint8_t set,= uint8_t cmd, timer_mod(cci->bg.timer, now + CXL_MBOX_BG_UPDATE_FREQ); } =20 + trace_cxl_mailbox_handler_return((set << 8) | cmd, ret, *len_out); return ret; } =20 diff --git a/hw/cxl/trace-events b/hw/cxl/trace-events new file mode 100644 index 0000000000..abca116ed3 --- /dev/null +++ b/hw/cxl/trace-events @@ -0,0 +1,8 @@ +# See docs/devel/tracing.rst for syntax documentation. +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# cxl-mailbox-utils.c +cxl_mailbox_command(uint16_t opcode, size_t len_in) "opcode=3D0x%04x len_i= n=3D%zu" +cxl_mailbox_invalid_payload(uint16_t opcode, size_t len_in, size_t expecte= d) "opcode=3D0x%04x len_in=3D%zu expected=3D%zu" +cxl_mailbox_handler_return(uint16_t opcode, int ret, size_t len_out) "opco= de=3D0x%04x ret=3D%d len_out=3D%zu" diff --git a/hw/cxl/trace.h b/hw/cxl/trace.h new file mode 100644 index 0000000000..84e79d50c0 --- /dev/null +++ b/hw/cxl/trace.h @@ -0,0 +1,4 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "trace/trace-hw_cxl.h" diff --git a/meson.build b/meson.build index 19e123423b..c229199d5d 100644 --- a/meson.build +++ b/meson.build @@ -3596,6 +3596,7 @@ if have_system 'hw/audio', 'hw/block', 'hw/char', + 'hw/cxl', 'hw/display', 'hw/dma', 'hw/fsi', --=20 2.43.0 From nobody Mon Jun 8 06:38:18 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1780451535; cv=none; d=zohomail.com; s=zohoarc; b=KKP6NLLJKu5bjP+bVp2IK0V8ji5Y/g45im3zJmqTUt8fZ6f1jflksdtUcGCDOGD2V6sOp7KjP7jSHXY+YzGSK7yrtW600RxitO3GjCJSSom3yBa4emQZhEecZihDlTuDxG4QQOt5TSAyD/FlANy6y4fDgQDZKXhPE23R0RuNtfw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1780451535; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QGBllvO5OB8exVbtMxJbmAM61oPlBnj3WEBBVVTeYmo=; b=WX9j2iDc/wPhPKF3MruyumqAKclH2HBzSsdt3BQTnhA3x851iagcdV5oAWGHmrZfTDJmnsirz7JBqGfwRtjde6hKxCAdBr5/Sm7vaATprW5rynyEo8xKt6JXv6glco64AgFNDN3IjtROq/dYzLRXPo5iojWCwnJaPZc2eSGNEbk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1780451535344466.3885735441729; Tue, 2 Jun 2026 18:52:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wUali-0006pI-Aq; Tue, 02 Jun 2026 21:51:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wUale-0006nw-Ic for qemu-devel@nongnu.org; Tue, 02 Jun 2026 21:51:38 -0400 Received: from mgamail.intel.com ([198.175.65.15]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wUalc-0003hJ-SA for qemu-devel@nongnu.org; Tue, 02 Jun 2026 21:51:38 -0400 Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2026 18:51:36 -0700 Received: from junjie-desk-dev.bj.intel.com ([10.238.152.71]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2026 18:51:34 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780451497; x=1811987497; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K+ZENMPAAlpFnRl8nibHs82pKxliDSm2Xg1qQbBqXN8=; b=hPUQDZ+LwIhuOmJvaSHy62iHN0tCtkpw8WGQ+3DPhYFkjcmmISzCv34F xs5Kc5C3ogvf+wjpyXL4u5vLCmoNQRDzjSEmqj2RltMDb/T4BSl+z3FOh CUReRDMh95MZknJIv+fhp2E6ZY3J+PQzTZ3U1n9EvqKYN++Qdep5wrT5r fpBqn1OtdBtouDy/bpbN8XIgpfXEL2lcHauimvqddhQpeh/KSxWZKslwm 5KgHyfRhC9NbO17GDt/A6tIpEBD/iK2xJ4JHfUfD01PTps/NCKxBG3GqH I/txg6XFvUG1ZXuRnSD72XjTWIkH/zTt6x5V4Qinayw+mKgDVDQpAL+j2 A==; X-CSE-ConnectionGUID: pX/nyWHsRFmIjq0yULu8IQ== X-CSE-MsgGUID: 3KppM4JKTCq5nLt/dYOksQ== X-IronPort-AV: E=McAfee;i="6800,10657,11805"; a="84875630" X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="84875630" X-CSE-ConnectionGUID: 5STRzDt2RwOGyo1NGInZgQ== X-CSE-MsgGUID: xW+CvSI8SiCXa+dSmJIojg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="248387790" From: Junjie Cao To: jonathan.cameron@huawei.com Cc: fan.ni@samsung.com, qemu-devel@nongnu.org, junjie.cao@intel.com Subject: [PATCH 2/3] hw/cxl: trace HDM decoder commit and CDAT load Date: Wed, 3 Jun 2026 09:34:19 +0800 Message-ID: <20260603013420.904749-3-junjie.cao@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260603013420.904749-1-junjie.cao@intel.com> References: <20260603013420.904749-1-junjie.cao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=198.175.65.15; envelope-from=junjie.cao@intel.com; helo=mgamail.intel.com X-Spam_score_int: -47 X-Spam_score: -4.8 X-Spam_bar: ---- X-Spam_report: (-4.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1780451538916158500 Content-Type: text/plain; charset="utf-8" HDM decoder programming and CDAT table ingestion are two debugging-prone paths in the CXL stack: the former drives address-decoding behaviour, the latter is parsed before any guest interaction so wrong inputs surface late. Add four trace points: * cxl_hdm_decoder_write - guest write to a decoder CTRL register, capturing the raw value and whether a commit is being requested * cxl_hdm_decoder_commit - actual commit, with the resolved base, size, IW and IG fields * cxl_cdat_init - CDAT initialisation, distinguishing the file-backed vs built-in source * cxl_cdat_loaded - successful file load with size and number of entries parsed The hw/mem/cxl_type3.c trace points are declared in the existing hw/mem/trace-events. The cxl_ prefix keeps the namespace unified for filtering with -trace 'cxl_*'. Signed-off-by: Junjie Cao --- hw/cxl/cxl-cdat.c | 3 +++ hw/cxl/trace-events | 4 ++++ hw/mem/cxl_type3.c | 17 ++++++++++++++++- hw/mem/trace-events | 4 ++++ 4 files changed, 27 insertions(+), 1 deletion(-) diff --git a/hw/cxl/cxl-cdat.c b/hw/cxl/cxl-cdat.c index 959a55518e..5274ac8c12 100644 --- a/hw/cxl/cxl-cdat.c +++ b/hw/cxl/cxl-cdat.c @@ -12,6 +12,7 @@ #include "hw/cxl/cxl.h" #include "qapi/error.h" #include "qemu/error-report.h" +#include "trace.h" =20 static void cdat_len_check(CDATSubHeader *hdr, Error **errp) { @@ -186,6 +187,7 @@ static bool ct3_load_cdat(CDATObject *cdat, Error **err= p) cdat->entry_len =3D num_ent; cdat->entry =3D g_steal_pointer(&cdat_st); cdat->buf =3D g_steal_pointer(&buf); + trace_cxl_cdat_loaded(cdat->filename, file_size, num_ent); return true; } =20 @@ -193,6 +195,7 @@ bool cxl_doe_cdat_init(CXLComponentState *cxl_cstate, E= rror **errp) { CDATObject *cdat =3D &cxl_cstate->cdat; =20 + trace_cxl_cdat_init(cdat->filename ?: ""); if (cdat->filename) { return ct3_load_cdat(cdat, errp); } else { diff --git a/hw/cxl/trace-events b/hw/cxl/trace-events index abca116ed3..15977dce6e 100644 --- a/hw/cxl/trace-events +++ b/hw/cxl/trace-events @@ -6,3 +6,7 @@ cxl_mailbox_command(uint16_t opcode, size_t len_in) "opcode=3D0x%04x len_i= n=3D%zu" cxl_mailbox_invalid_payload(uint16_t opcode, size_t len_in, size_t expecte= d) "opcode=3D0x%04x len_in=3D%zu expected=3D%zu" cxl_mailbox_handler_return(uint16_t opcode, int ret, size_t len_out) "opco= de=3D0x%04x ret=3D%d len_out=3D%zu" + +# cxl-cdat.c +cxl_cdat_init(const char *source) "source=3D%s" +cxl_cdat_loaded(const char *filename, size_t length, int num_entries) "fil= ename=3D%s length=3D%zu entries=3D%d" diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 4739239da3..8130abeb37 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -30,6 +30,7 @@ #include "system/numa.h" #include "hw/cxl/cxl.h" #include "hw/pci/msix.h" +#include "trace.h" =20 /* type3 device private */ enum CXL_T3_MSIX_VECTOR { @@ -419,9 +420,20 @@ static void hdm_decoder_commit(CXLType3Dev *ct3d, int = which) int hdm_inc =3D R_CXL_HDM_DECODER1_BASE_LO - R_CXL_HDM_DECODER0_BASE_L= O; ComponentRegisters *cregs =3D &ct3d->cxl_cstate.crb; uint32_t *cache_mem =3D cregs->cache_mem_registers; - uint32_t ctrl; + uint32_t ctrl, low, high; + uint64_t base, size; =20 ctrl =3D ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_CTRL + which * hdm_in= c); + low =3D ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_BASE_LO + which * hdm_= inc); + high =3D ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_BASE_HI + which * hdm= _inc); + base =3D (low & 0xf0000000) | ((uint64_t)high << 32); + low =3D ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_SIZE_LO + which * hdm_= inc); + high =3D ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_SIZE_HI + which * hdm= _inc); + size =3D (low & 0xf0000000) | ((uint64_t)high << 32); + trace_cxl_hdm_decoder_commit(which, base, size, + FIELD_EX32(ctrl, CXL_HDM_DECODER0_CTRL, I= W), + FIELD_EX32(ctrl, CXL_HDM_DECODER0_CTRL, I= G)); + /* TODO: Sanity checks that the decoder is possible */ ctrl =3D FIELD_DP32(ctrl, CXL_HDM_DECODER0_CTRL, ERR, 0); ctrl =3D FIELD_DP32(ctrl, CXL_HDM_DECODER0_CTRL, COMMITTED, 1); @@ -623,6 +635,9 @@ static void ct3d_reg_write(void *opaque, hwaddr offset,= uint64_t value, } =20 stl_le_p((uint8_t *)cache_mem + offset, value); + if (which_hdm >=3D 0) { + trace_cxl_hdm_decoder_write(which_hdm, value, should_commit); + } if (should_commit) { hdm_decoder_commit(ct3d, which_hdm); } else if (should_uncommit) { diff --git a/hw/mem/trace-events b/hw/mem/trace-events index 8b6b02b5bf..770831f701 100644 --- a/hw/mem/trace-events +++ b/hw/mem/trace-events @@ -6,3 +6,7 @@ mhp_pc_dimm_assigned_slot(int slot) "%d" memory_device_pre_plug(const char *id, uint64_t addr) "id=3D%s addr=3D0x%"= PRIx64 memory_device_plug(const char *id, uint64_t addr) "id=3D%s addr=3D0x%"PRIx= 64 memory_device_unplug(const char *id, uint64_t addr) "id=3D%s addr=3D0x%"PR= Ix64 + +# cxl_type3.c +cxl_hdm_decoder_write(int which, uint32_t value, bool commit) "decoder=3D%= d ctrl=3D0x%08x commit=3D%d" +cxl_hdm_decoder_commit(int which, uint64_t base, uint64_t size, uint32_t i= w_enc, uint32_t ig_enc) "decoder=3D%d base=3D0x%"PRIx64" size=3D0x%"PRIx64"= iw_enc=3D0x%x ig_enc=3D0x%x" --=20 2.43.0 From nobody Mon Jun 8 06:38:18 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1780451549; cv=none; d=zohomail.com; s=zohoarc; b=BAEXX6MppEti8ecaDegfCbb/3TCCR/qGK4J3tzNsUZe+XazcE6i/MWsYrpa1+twstai9HQxY/Ne+IvOmifSsmblNrMqHu7dmWXaDO0PkH9nf1aqW4bKdkawhjvufArG0iVyHQoBDwuTSvXKpz8lJhANbXEcT0iNrMKIo2UxxKHU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1780451549; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DN9Lksfm2Iu/urjjOQ4wtYbuS80X1ESkUaFy/jRQh5s=; b=Hnnyw3WPYwH3VoDy+uVfdt3pVum5gABNHliM01RyojIrzNsM+1l5ONtyFmnhvwa/1VkPZ6HMgjCFomv6zmJmarsOp7XnSHuu4t3HHizcUxvCEVcIxE6RDG7mU+6+oVD8Dt7QL+odW7iICHTJPQckLYlaP9LjVRtcGNRg+Itxcto= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1780451549120934.8447709930945; Tue, 2 Jun 2026 18:52:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wUalm-0006qB-18; Tue, 02 Jun 2026 21:51:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wUalj-0006pl-Do for qemu-devel@nongnu.org; Tue, 02 Jun 2026 21:51:43 -0400 Received: from mgamail.intel.com ([198.175.65.15]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wUalg-0003hJ-S9 for qemu-devel@nongnu.org; Tue, 02 Jun 2026 21:51:42 -0400 Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2026 18:51:40 -0700 Received: from junjie-desk-dev.bj.intel.com ([10.238.152.71]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2026 18:51:37 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780451501; x=1811987501; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Cq7ErH4MSIS+C45bt5c1XKFHsLZIgDdp+F5QQ24AWEM=; b=fwCyQOIq3hGlB4DPSdj1oVl50LzDbwlH8SAZ5hjCRy4lH1WofkHI1PJB 5ANV9vPAN9Ydzekep7rHPH6aIUBo5+QP/8ScH+Ba0QYWPNj3fEctWCJNo 4loX0TsUGgxFfAyfUJUE83rYCaqkt1t44HbK0JzhG8oFb+oEPKAvV5aIT 17YWUtvkNYeQynqXqegvh+yWDb+R98dVPlXjlSE5d/E8zbY5TuTj/+k71 RPQXiWAay18ZoePtshO/c2zb2V9IhcpAmYaIusO2IIu4PcLB2Lq1ioHbV 7muOrciY1EtbWxGZ+KydwB7+IYEJr5uZQnxPj2ARrmm6dGIN65EAhk+Tn Q==; X-CSE-ConnectionGUID: YYMWj4ZDQMCVFWeu1lJYrg== X-CSE-MsgGUID: Ws3rGhnuTi+DhsWoXvBowQ== X-IronPort-AV: E=McAfee;i="6800,10657,11805"; a="84875650" X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="84875650" X-CSE-ConnectionGUID: C4cahR4xSkGiHZVHikZWSA== X-CSE-MsgGUID: aAhqvTc7QuiCykNgY0JLlA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,184,1774335600"; d="scan'208";a="248387835" From: Junjie Cao To: jonathan.cameron@huawei.com Cc: fan.ni@samsung.com, qemu-devel@nongnu.org, junjie.cao@intel.com Subject: [PATCH 3/3] hw/cxl: trace event log activity and CFMWS address decoding Date: Wed, 3 Jun 2026 09:34:20 +0800 Message-ID: <20260603013420.904749-4-junjie.cao@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260603013420.904749-1-junjie.cao@intel.com> References: <20260603013420.904749-1-junjie.cao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=198.175.65.15; envelope-from=junjie.cao@intel.com; helo=mgamail.intel.com X-Spam_score_int: -47 X-Spam_score: -4.8 X-Spam_bar: ---- X-Spam_report: (-4.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1780451556682154100 Content-Type: text/plain; charset="utf-8" Two more debug-prone paths benefit from trace coverage. Event log insertion and clearing are exercised on every error injection or dynamic capacity event, but their interaction with the per-log overflow counter is currently opaque. CFMWS address decoding translates a host physical address through up to two HDM decoder lookups (host bridge and optional switch USP). Add five trace points: * cxl_event_insert - successful enqueue, log type and resulting depth * cxl_event_overflow - the artificial overflow threshold was hit; an event was dropped * cxl_event_clear - bulk clear, log type and request size * cxl_cfmws_lookup - entry to address decoding, with the resolved fixed-window index * cxl_cfmws_target_resolved - HDM decoder produced a target index (fires for both the host-bridge and switch USP lookups) In non-passthrough topologies, a cxl_cfmws_lookup without a following cxl_cfmws_target_resolved indicates the host-bridge HDM decode failed. In passthrough mode the lookup resolves via pcie_find_port_first() without an HDM target step, so no target_resolved event is expected. In cxl_event_insert(), cxl_event_count() is hoisted into a local variable so its O(n) queue walk is performed once per insert rather than twice (once for the trace point, once for the existing return- value comparison). Signed-off-by: Junjie Cao --- hw/cxl/cxl-events.c | 8 +++++++- hw/cxl/cxl-host.c | 4 ++++ hw/cxl/trace-events | 9 +++++++++ 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/hw/cxl/cxl-events.c b/hw/cxl/cxl-events.c index 5356dfb5b3..f4aa419953 100644 --- a/hw/cxl/cxl-events.c +++ b/hw/cxl/cxl-events.c @@ -13,6 +13,7 @@ #include "hw/pci/msix.h" #include "hw/cxl/cxl.h" #include "hw/cxl/cxl_events.h" +#include "trace.h" =20 /* Artificial limit on the number of events a log can hold */ #define CXL_TEST_EVENT_OVERFLOW 8 @@ -98,6 +99,7 @@ bool cxl_event_insert(CXLDeviceState *cxlds, CXLEventLogT= ype log_type, uint64_t time; CXLEventLog *log; CXLEvent *entry; + int depth; =20 if (log_type >=3D CXL_EVENT_TYPE_MAX) { return false; @@ -115,6 +117,7 @@ bool cxl_event_insert(CXLDeviceState *cxlds, CXLEventLo= gType log_type, } log->overflow_err_count++; log->last_overflow_timestamp =3D time; + trace_cxl_event_overflow(log_type, log->overflow_err_count); return false; } =20 @@ -133,8 +136,10 @@ bool cxl_event_insert(CXLDeviceState *cxlds, CXLEventL= ogType log_type, QSIMPLEQ_INSERT_TAIL(&log->events, entry, node); cxl_event_set_status(cxlds, log_type, true); =20 + depth =3D cxl_event_count(log); + trace_cxl_event_insert(log_type, depth); /* Count went from 0 to 1 */ - return cxl_event_count(log) =3D=3D 1; + return depth =3D=3D 1; } =20 void cxl_discard_all_event_records(CXLDeviceState *cxlds) @@ -234,6 +239,7 @@ CXLRetCode cxl_event_clear_records(CXLDeviceState *cxld= s, entry =3D cxl_event_get_head(log); } =20 + trace_cxl_event_clear(log_type, pl->nr_recs); return CXL_MBOX_SUCCESS; } =20 diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c index a94b893e99..4157377a95 100644 --- a/hw/cxl/cxl-host.c +++ b/hw/cxl/cxl-host.c @@ -21,6 +21,7 @@ #include "hw/pci/pci_host.h" #include "hw/pci/pcie_port.h" #include "hw/pci-bridge/pci_expander_bridge.h" +#include "trace.h" =20 static void cxl_fixed_memory_window_config(CXLFixedMemoryWindowOptions *ob= ject, int index, Error **errp) @@ -168,6 +169,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow = *fw, hwaddr addr) bool target_found; PCIDevice *rp, *d; =20 + trace_cxl_cfmws_lookup(addr, fw->index); rb_index =3D (addr / cxl_decode_ig(fw->enc_int_gran)) % fw->num_target= s; hb =3D PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl_host_bridge); if (!hb || !hb->bus || !pci_bus_is_cxl(hb->bus)) { @@ -191,6 +193,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow = *fw, hwaddr addr) if (!target_found) { return NULL; } + trace_cxl_cfmws_target_resolved(addr, target); =20 rp =3D pcie_find_port_by_pn(hb->bus, target); if (!rp) { @@ -227,6 +230,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow = *fw, hwaddr addr) if (!target_found) { return NULL; } + trace_cxl_cfmws_target_resolved(addr, target); =20 d =3D pcie_find_port_by_pn(&PCI_BRIDGE(d)->sec_bus, target); if (!d) { diff --git a/hw/cxl/trace-events b/hw/cxl/trace-events index 15977dce6e..e5f196787d 100644 --- a/hw/cxl/trace-events +++ b/hw/cxl/trace-events @@ -10,3 +10,12 @@ cxl_mailbox_handler_return(uint16_t opcode, int ret, siz= e_t len_out) "opcode=3D0x% # cxl-cdat.c cxl_cdat_init(const char *source) "source=3D%s" cxl_cdat_loaded(const char *filename, size_t length, int num_entries) "fil= ename=3D%s length=3D%zu entries=3D%d" + +# cxl-events.c +cxl_event_insert(int log_type, int depth) "log_type=3D%d depth=3D%d" +cxl_event_overflow(int log_type, uint16_t overflow_err_count) "log_type=3D= %d overflow_err_count=3D%u" +cxl_event_clear(int log_type, int nr_recs) "log_type=3D%d nr_recs=3D%d" + +# cxl-host.c +cxl_cfmws_lookup(uint64_t addr, int fw_index) "addr=3D0x%"PRIx64" fw=3D%d" +cxl_cfmws_target_resolved(uint64_t addr, uint8_t target) "addr=3D0x%"PRIx6= 4" target=3D0x%02x" --=20 2.43.0