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Tue, 02 Jun 2026 07:05:00 -0700 (PDT) From: Anderson Nascimento To: qemu-devel@nongnu.org, kvm@vger.kernel.org, pbonzini@redhat.com, zhao1.liu@intel.com, mtosatti@redhat.com Cc: Anderson Nascimento Subject: [PATCH v2 1/1] target/i386: Add support for KVM APERF/MPERF passthrough Date: Tue, 2 Jun 2026 11:03:47 -0300 Message-ID: <20260602140348.774203-2-anderson@allelesecurity.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260602140348.774203-1-anderson@allelesecurity.com> References: <20260602140348.774203-1-anderson@allelesecurity.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::e31; envelope-from=anderson@allelesecurity.com; helo=mail-vs1-xe31.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @allelesecurity.com) X-ZM-MESSAGEID: 1780409138383158500 Content-Type: text/plain; charset="utf-8" Introduce support for exposing and enabling APERF/MPERF MSR passthrough for x86 QEMU guests when running under KVM. The Linux kernel supports a KVM capability allowing the hypervisor to disable read intercepts on the IA32_APERF and IA32_MPERF MSRs, enabling guests to track effective frequency directly without VM-exits. QEMU currently lacks a native way to request this capability or expose the corresponding feature bit to the guest. This patch adds the `aperfmperf` feature flag via `FEAT_6_ECX` (CPUID.06H:ECX[bit 0]). To ensure safe tracking across power states, the flag ties into QEMU's existing host power management framework. When host CPU power management is explicitly requested by the user (via `-overcommit cpu-pm=3Don`) and the `+aperfmperf` flag is provided to the CPU, QEMU will invoke the KVM ioctl to drop the APERF/MPERF MSR read intercepts. This implementation allows guest operating systems (such as FreeBSD or Linux) to dynamically calculate CPU utilization and turbo-boost metrics without incurring performance overhead from hypervisor trap-and- emulate loops. Signed-off-by: Anderson Nascimento --- Changes in v2 - Added migration flags - Link to v1: https://lore.kernel.org/all/20260602022048.752453-1-anderson@= allelesecurity.com/ target/i386/cpu.c | 18 +++++++++++++++++- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 5 ++++- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 8929a75c7c..544738d406 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1544,6 +1544,22 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D= { .cpuid =3D { .eax =3D 6, .reg =3D R_EAX, }, .tcg_features =3D TCG_6_EAX_FEATURES, }, + [FEAT_6_ECX] =3D { + .type =3D CPUID_FEATURE_WORD, + .feat_names =3D { + "aperfmperf", NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + }, + .cpuid =3D { .eax =3D 6, .reg =3D R_ECX, }, + .tcg_features =3D 0, + .unmigratable_flags =3D CPUID_6_ECX_APERFMPERF, + }, [FEAT_XSAVE_XCR0_LO] =3D { .type =3D CPUID_FEATURE_WORD, .cpuid =3D { @@ -8770,7 +8786,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, /* Thermal and Power Leaf */ *eax =3D env->features[FEAT_6_EAX]; *ebx =3D 0; - *ecx =3D 0; + *ecx =3D env->features[FEAT_6_ECX]; *edx =3D 0; break; case 7: diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 67e2ecf325..87864969c7 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -700,6 +700,7 @@ typedef enum FeatureWord { FEAT_SVM, /* CPUID[8000_000A].EDX */ FEAT_XSAVE, /* CPUID[EAX=3D0xd,ECX=3D1].EAX */ FEAT_6_EAX, /* CPUID[6].EAX */ + FEAT_6_ECX, /* CPUID[6].ECX */ FEAT_XSAVE_XCR0_LO, /* CPUID[EAX=3D0xd,ECX=3D0].EAX */ FEAT_XSAVE_XCR0_HI, /* CPUID[EAX=3D0xd,ECX=3D0].EDX */ FEAT_ARCH_CAPABILITIES, @@ -1232,6 +1233,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *c= pu, FeatureWord w); #define CPUID_XSAVE_XFD (1U << 4) =20 #define CPUID_6_EAX_ARAT (1U << 2) +#define CPUID_6_ECX_APERFMPERF (1U << 0) =20 /* CPUID[0x80000007].EDX flags: */ #define CPUID_APM_INVTSC (1U << 8) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 9e352882c8..ca722ff9e9 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -498,6 +498,8 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint= 32_t function, } } else if (function =3D=3D 6 && reg =3D=3D R_EAX) { ret |=3D CPUID_6_EAX_ARAT; /* safe to allow because of emulated AP= IC */ + } else if (function =3D=3D 6 && reg =3D=3D R_ECX) { + ret |=3D CPUID_6_ECX_APERFMPERF; } else if (function =3D=3D 7 && index =3D=3D 0 && reg =3D=3D R_EBX) { /* Not new instructions, just an optimization. */ uint32_t ebx; @@ -3291,7 +3293,8 @@ static int kvm_vm_enable_disable_exits(KVMState *s) disable_exits &=3D (KVM_X86_DISABLE_EXITS_MWAIT | KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE | - KVM_X86_DISABLE_EXITS_CSTATE); + KVM_X86_DISABLE_EXITS_CSTATE | + KVM_X86_DISABLE_EXITS_APERFMPERF); } =20 return kvm_vm_enable_cap(s, KVM_CAP_X86_DISABLE_EXITS, 0, --=20 2.54.0