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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=stefanb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350977465158500 Content-Type: text/plain; charset="utf-8" Move functions for reading from and writing to the Aspeed I2C device into a file so they can be reused by other functions. Reviewed-by: Arun Menon Link: https://lore.kernel.org/qemu-devel/20260429121743.1346635-2-stefanb@l= inux.ibm.com Signed-off-by: Stefan Berger --- tests/qtest/meson.build | 2 +- tests/qtest/tpm-tis-i2c-test.c | 50 +------------------------- tests/qtest/tpm-tis-i2c-util.c | 64 ++++++++++++++++++++++++++++++++++ tests/qtest/tpm-tis-i2c-util.h | 30 ++++++++++++++++ 4 files changed, 96 insertions(+), 50 deletions(-) create mode 100644 tests/qtest/tpm-tis-i2c-util.c create mode 100644 tests/qtest/tpm-tis-i2c-util.h diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 728dde54b3..57512c6e56 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -401,7 +401,7 @@ qtests =3D { 'tpm-crb-test': [io, tpmemu_files], 'tpm-tis-swtpm-test': [io, tpmemu_files, 'tpm-tis-util.c'], 'tpm-tis-test': [io, tpmemu_files, 'tpm-tis-util.c'], - 'tpm-tis-i2c-test': [io, tpmemu_files, 'qtest_aspeed.c'], + 'tpm-tis-i2c-test': [io, tpmemu_files, 'tpm-tis-i2c-util.c', 'qtest_aspe= ed.c'], 'tpm-tis-device-swtpm-test': [io, tpmemu_files, 'tpm-tis-util.c'], 'tpm-tis-device-test': [io, tpmemu_files, 'tpm-tis-util.c'], 'virtio-net-failover': test_migration_files, diff --git a/tests/qtest/tpm-tis-i2c-test.c b/tests/qtest/tpm-tis-i2c-test.c index 3a1af026f2..02ddf76c2c 100644 --- a/tests/qtest/tpm-tis-i2c-test.c +++ b/tests/qtest/tpm-tis-i2c-test.c @@ -20,6 +20,7 @@ #include "hw/pci/pci_ids.h" #include "qtest_aspeed.h" #include "tpm-emu.h" +#include "tpm-tis-i2c-util.h" =20 #define DEBUG_TIS_TEST 0 =20 @@ -36,58 +37,9 @@ #define DPRINTF_STS \ DPRINTF("%s: %d: sts =3D 0x%08x\n", __func__, __LINE__, sts) =20 -#define I2C_SLAVE_ADDR 0x2e -#define I2C_DEV_BUS_NUM 10 - static const uint8_t TPM_CMD[12] =3D "\x80\x01\x00\x00\x00\x0c\x00\x00\x01\x44\x00\x00"; =20 -static uint32_t aspeed_bus_addr; - -static uint8_t cur_locty =3D 0xff; - -static void tpm_tis_i2c_set_locty(uint8_t locty) -{ - if (cur_locty !=3D locty) { - cur_locty =3D locty; - aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, - TPM_I2C_REG_LOC_SEL, locty); - } -} - -static uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg) -{ - tpm_tis_i2c_set_locty(locty); - return aspeed_i2c_readb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); -} - -static uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg) -{ - tpm_tis_i2c_set_locty(locty); - return aspeed_i2c_readw(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); -} - -static uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg) -{ - tpm_tis_i2c_set_locty(locty); - return aspeed_i2c_readl(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); -} - -static void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v) -{ - if (reg !=3D TPM_I2C_REG_LOC_SEL) { - tpm_tis_i2c_set_locty(locty); - } - aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, = v); -} - -static void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v) -{ - if (reg !=3D TPM_I2C_REG_LOC_SEL) { - tpm_tis_i2c_set_locty(locty); - } - aspeed_i2c_writel(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, = v); -} =20 static void tpm_tis_i2c_test_basic(const void *data) { diff --git a/tests/qtest/tpm-tis-i2c-util.c b/tests/qtest/tpm-tis-i2c-util.c new file mode 100644 index 0000000000..07b1eeba69 --- /dev/null +++ b/tests/qtest/tpm-tis-i2c-util.c @@ -0,0 +1,64 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * + * QTest utilities for TPM TIS over I2C + * + * Copyright (c) 2018, 2026 IBM Corporation + * + * Authors: + * Stefan Berger + * + */ + +#include "qemu/osdep.h" +#include "hw/acpi/tpm.h" +#include "libqtest-single.h" +#include "qtest_aspeed.h" +#include "tpm-tis-i2c-util.h" + +uint32_t aspeed_bus_addr; + +static uint8_t cur_locty =3D 0xff; + +static void tpm_tis_i2c_set_locty(uint8_t locty) +{ + if (cur_locty !=3D locty) { + cur_locty =3D locty; + aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, + TPM_I2C_REG_LOC_SEL, locty); + } +} + +uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg) +{ + tpm_tis_i2c_set_locty(locty); + return aspeed_i2c_readb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); +} + +uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg) +{ + tpm_tis_i2c_set_locty(locty); + return aspeed_i2c_readw(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); +} + +uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg) +{ + tpm_tis_i2c_set_locty(locty); + return aspeed_i2c_readl(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); +} + +void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v) +{ + if (reg !=3D TPM_I2C_REG_LOC_SEL) { + tpm_tis_i2c_set_locty(locty); + } + aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, = v); +} + +void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v) +{ + if (reg !=3D TPM_I2C_REG_LOC_SEL) { + tpm_tis_i2c_set_locty(locty); + } + aspeed_i2c_writel(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, = v); +} diff --git a/tests/qtest/tpm-tis-i2c-util.h b/tests/qtest/tpm-tis-i2c-util.h new file mode 100644 index 0000000000..dfe626b43d --- /dev/null +++ b/tests/qtest/tpm-tis-i2c-util.h @@ -0,0 +1,30 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * + * QTest TPM TIS I2C: Common test functions used for TPM I2C on Aspeed bus + * + * Copyright (c) 2026 IBM Corporation + * + * Authors: + * Stefan Berger + * + */ + +#ifndef TESTS_TPM_TIS_I2C_UTIL_H +#define TESTS_TPM_TIS_I2C_UTIL_H + +#include "qemu/osdep.h" + +extern uint32_t aspeed_bus_addr; + +#define I2C_SLAVE_ADDR 0x2e +#define I2C_DEV_BUS_NUM 10 + +uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg); +uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg); +uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg); + +void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v); +void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v); + +#endif /* TESTS_TPM_TIS_I2C_UTIL_H */ --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350984; cv=none; d=zohomail.com; s=zohoarc; b=XHGHWHiyHhdhVl3DwxbL+FZk6Up9/ND3IurW9CNiezRX/372jCwgoZlSFMGsh/1ckkw7jjQ0FYf33CokwmlZHaMZVHI6DRO4kXKxZOPoRh+go7aIyH/ke9NkubCq2EyFKfZVHApJtxRCW5ENTV7v3E6+DwLal1Mv6JkgVreGbpA= ARC-Message-Signature: i=1; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=cxdzHqjYpDYu5L2y+ mzfO1p1yR+63k18n61lzG3V94g=; b=ZN2APSHZ/4yemHktUEysQ9zTb5VK/pC33 4sb9v7PwoiXu1pUuXLPH1TqhxnLzlQjcKiSeBm7UxVFWnC/9hbdr6YXSHTeP5TS+ 0LpREL8paLZ+LxWlCdYYS20WA32J11AaR8YJ5IVtD1QWK/z3JAAZUPANsiXI5zy+ 9DYodD8iageh1JsDE70luuq2LQOgCej+OhOt8chEr/N3TZzQEnYtrnb80Ozn8fXE Xe+pgBLtWplp2pGgj+xyodM5sWnEsDLLjhZvvTN91jB9iJZCMKfokvEdp/zdSXX2 Jzc7imkJ80exV7vzOGgsYnjxBUV1yB2CLIEclbSIvX1JUGRqyGP6g== From: Stefan Berger To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Stefan Berger , Arun Menon Subject: [PULL v1 02/16] tests: Have TPM I2C read/write functions take QTestState as first parameter Date: Mon, 1 Jun 2026 17:53:55 -0400 Message-ID: <20260601215410.517009-3-stefanb@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260601215410.517009-1-stefanb@linux.ibm.com> References: <20260601215410.517009-1-stefanb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjAxMDIxMSBTYWx0ZWRfX1jCmY77ncK6C JZyXO1ZbRONC8UOovzNVCay6ZlnMWq/els6vtEPbekSE6yPWLckQXrElIxF1W4O2lg4GVOIIv8f JJbj8nPc66P4mRDTuGUKrj4B5zMTbFjDSmifplMAc4fnb9ZTHF543NwhVpMOU6JitnW50P6aInC TRUzKEekvPyuZ75ccsPte9Rd1XNymkYt5Rybwa36vefsW1o9zJssnO+4iQNlW+pFTYTEUAfyIqi ddhnnGOi6aY8LaJM7gD1bCtrnTyJdZDrkSoo3B4rpY9Z7BZyF5gmbOORntSFfkXaZlgd0+WKEBD xpQQ1flM/QG085VhXrPV+0DHuZgOXYeyrI7NnqgWJ7WNqfJHeGjq4Drt8MSiWptYheBOCV+lp3c Ixx9N7N1weRc7LjZGk3hpwVv5PvHrPJ/gbr4K5sdyk4N/KNZ39BIsmxuJufPtu2oDvxkuEmR/Pn zdkTSXrQFtn5ar4bbXA== X-Proofpoint-ORIG-GUID: efzE2TJX8Vp8fP17bUNYbwNDrJPCtuiv X-Authority-Analysis: v=2.4 cv=cOzQdFeN c=1 sm=1 tr=0 ts=6a1dff93 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=20KFwNOVAAAA:8 a=XT7W9TR_LUuaLlhKRIUA:9 X-Proofpoint-GUID: efzE2TJX8Vp8fP17bUNYbwNDrJPCtuiv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-01_06,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 malwarescore=0 phishscore=0 suspectscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606010211 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=stefanb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350985989154100 Content-Type: text/plain; charset="utf-8" Pass the QTestState as first parameter to the TPM I2C functions. Use global_qtest in existing test cases. Reviewed-by: Arun Menon Link: https://lore.kernel.org/qemu-devel/20260429121743.1346635-3-stefanb@l= inux.ibm.com Signed-off-by: Stefan Berger --- tests/qtest/tpm-tis-i2c-test.c | 171 +++++++++++++++++---------------- tests/qtest/tpm-tis-i2c-util.c | 32 +++--- tests/qtest/tpm-tis-i2c-util.h | 10 +- 3 files changed, 110 insertions(+), 103 deletions(-) diff --git a/tests/qtest/tpm-tis-i2c-test.c b/tests/qtest/tpm-tis-i2c-test.c index 02ddf76c2c..f614f888f3 100644 --- a/tests/qtest/tpm-tis-i2c-test.c +++ b/tests/qtest/tpm-tis-i2c-test.c @@ -50,62 +50,64 @@ static void tpm_tis_i2c_test_basic(const void *data) * All register accesses below must work without locality 0 being the * active locality. Therefore, ensure access is released. */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); - access =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* read interrupt capability -- none are supported */ - v =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_CAPABILITY); + v =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_INT_CAPABILITY); g_assert_cmpint(v, =3D=3D, 0); =20 /* try to enable all interrupts */ - tpm_tis_i2c_writel(0, TPM_I2C_REG_INT_ENABLE, 0xffffffff); - v =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_ENABLE); + tpm_tis_i2c_writel(global_qtest, 0, TPM_I2C_REG_INT_ENABLE, 0xffffffff= ); + v =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_INT_ENABLE); /* none could be enabled */ g_assert_cmpint(v, =3D=3D, 0); =20 /* enable csum */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENAB= LED); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE, + TPM_DATA_CSUM_ENABLED); /* check csum enable register has bit 0 set */ - v =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE); + v =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE); g_assert_cmpint(v, =3D=3D, TPM_DATA_CSUM_ENABLED); /* reading it as 32bit register returns same result */ - v =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE); + v =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE); g_assert_cmpint(v, =3D=3D, TPM_DATA_CSUM_ENABLED); =20 /* disable csum */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0); /* check csum enable register has bit 0 clear */ - v =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE); + v =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE); g_assert_cmpint(v, =3D=3D, 0); =20 /* write to unsupported register '1' */ - tpm_tis_i2c_writel(0, 1, 0x12345678); - v =3D tpm_tis_i2c_readl(0, 1); + tpm_tis_i2c_writel(global_qtest, 0, 1, 0x12345678); + v =3D tpm_tis_i2c_readl(global_qtest, 0, 1); g_assert_cmpint(v, =3D=3D, 0xffffffff); =20 /* request use of locality */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS, + TPM_TIS_ACCESS_REQUEST_USE); =20 /* read byte from STS + 3 */ - v =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_STS + 3); + v =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_STS + 3); g_assert_cmpint(v, =3D=3D, 0); =20 /* check STS after writing to STS + 3 */ - v =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); - tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS + 3, 0xf); - v2 =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); + v =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_STS + 3, 0xf); + v2 =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); g_assert_cmpint(v, =3D=3D, v2); =20 /* release access */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); =20 /* select locality 5 -- must not be possible */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_LOC_SEL, 5); - v =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_LOC_SEL); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_LOC_SEL, 5); + v =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_LOC_SEL); g_assert_cmpint(v, =3D=3D, 0); } =20 @@ -118,11 +120,12 @@ static void tpm_tis_i2c_test_check_localities(const v= oid *data) uint32_t rid; =20 for (locty =3D 0; locty < TPM_TIS_NUM_LOCALITIES; locty++) { - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 - capability =3D tpm_tis_i2c_readl(locty, TPM_I2C_REG_INTF_CAPABILIT= Y); + capability =3D tpm_tis_i2c_readl(global_qtest, locty, + TPM_I2C_REG_INTF_CAPABILITY); i2c_cap =3D (TPM_I2C_CAP_INTERFACE_TYPE | TPM_I2C_CAP_INTERFACE_VER | TPM_I2C_CAP_TPM2_FAMILY | @@ -131,15 +134,15 @@ static void tpm_tis_i2c_test_check_localities(const v= oid *data) TPM_I2C_CAP_DEV_ADDR_CHANGE); g_assert_cmpint(capability, =3D=3D, i2c_cap); =20 - didvid =3D tpm_tis_i2c_readl(locty, TPM_I2C_REG_DID_VID); + didvid =3D tpm_tis_i2c_readl(global_qtest, locty, TPM_I2C_REG_DID_= VID); g_assert_cmpint(didvid, =3D=3D, (1 << 16) | PCI_VENDOR_ID_IBM); =20 - rid =3D tpm_tis_i2c_readl(locty, TPM_I2C_REG_RID); + rid =3D tpm_tis_i2c_readl(global_qtest, locty, TPM_I2C_REG_RID); g_assert_cmpint(rid, !=3D, 0); g_assert_cmpint(rid, !=3D, 0xffffffff); =20 /* locality selection must be at locty */ - l =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_LOC_SEL); + l =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_LOC_SEL); g_assert_cmpint(l, =3D=3D, locty); } } @@ -151,23 +154,23 @@ static void tpm_tis_i2c_test_check_access_reg(const v= oid *data) =20 /* do not test locality 4 (hw only) */ for (locty =3D 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) { - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* request use of locality */ - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); =20 - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* release access */ - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); } @@ -186,14 +189,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(c= onst void *data) for (locty =3D 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) { pending_request_flag =3D 0; =20 - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* request use of locality */ - tpm_tis_i2c_writeb(locty, + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); @@ -201,14 +204,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(c= onst void *data) /* lower localities cannot seize access */ for (l =3D 0; l < locty; l++) { /* lower locality is not active */ - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | pending_request_flag | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* try to request use from 'l' */ - tpm_tis_i2c_writeb(l, + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); =20 @@ -216,7 +219,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(con= st void *data) * requesting use from 'l' was not possible; * we must see REQUEST_USE and possibly PENDING_REQUEST */ - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_REQUEST_USE | @@ -227,17 +230,17 @@ static void tpm_tis_i2c_test_check_access_reg_seize(c= onst void *data) * locality 'locty' must be unchanged; * we must see PENDING_REQUEST */ - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_= ACCESS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | TPM_TIS_ACCESS_PENDING_REQUEST | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* try to seize from 'l' */ - tpm_tis_i2c_writeb(l, + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE); /* seize from 'l' was not possible */ - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_REQUEST_USE | @@ -245,7 +248,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(con= st void *data) TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* locality 'locty' must be unchanged */ - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_= ACCESS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | TPM_TIS_ACCESS_PENDING_REQUEST | @@ -264,14 +267,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(c= onst void *data) */ for (l =3D locty + 1; l < TPM_TIS_NUM_LOCALITIES - 1; l++) { /* try to 'request use' from 'l' */ - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); =20 /* * requesting use from 'l' was not possible; we should see * REQUEST_USE and may see PENDING_REQUEST */ - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_REQUEST_USE | @@ -282,7 +285,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(con= st void *data) * locality 'l-1' must be unchanged; we should always * see PENDING_REQUEST from 'l' requesting access */ - access =3D tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_= ACCESS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | @@ -290,10 +293,11 @@ static void tpm_tis_i2c_test_check_access_reg_seize(c= onst void *data) TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* try to seize from 'l' */ - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE= ); + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, + TPM_TIS_ACCESS_SEIZE); =20 /* seize from 'l' was possible */ - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | @@ -301,7 +305,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(con= st void *data) TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* l - 1 should show that it has BEEN_SEIZED */ - access =3D tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_= ACCESS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_BEEN_SEIZED | @@ -309,10 +313,10 @@ static void tpm_tis_i2c_test_check_access_reg_seize(c= onst void *data) TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* clear the BEEN_SEIZED flag and make sure it's gone */ - tpm_tis_i2c_writeb(l - 1, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, l - 1, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_BEEN_SEIZED); =20 - access =3D tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_= ACCESS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | pending_request_flag | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); @@ -330,22 +334,22 @@ static void tpm_tis_i2c_test_check_access_reg_seize(c= onst void *data) /* release access from l - 1; this activates locty - 1 */ l--; =20 - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS); DPRINTF_ACCESS; =20 DPRINTF("%s: %d: relinquishing control on l =3D %d\n", __func__, __LINE__, l); - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); =20 - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | pending_request_flag | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 for (l =3D locty - 1; l >=3D 0; l--) { - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | @@ -353,7 +357,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(con= st void *data) TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* release this locality */ - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); =20 if (l =3D=3D 1) { @@ -363,7 +367,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(con= st void *data) =20 /* no locality may be active now */ for (l =3D 0; l < TPM_TIS_NUM_LOCALITIES - 1; l++) { - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); @@ -384,14 +388,14 @@ static void tpm_tis_i2c_test_check_access_reg_release= (const void *data) for (locty =3D TPM_TIS_NUM_LOCALITIES - 2; locty >=3D 0; locty--) { pending_request_flag =3D 0; =20 - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 /* request use of locality */ - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); - access =3D tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCE= SS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); @@ -405,9 +409,9 @@ static void tpm_tis_i2c_test_check_access_reg_release(c= onst void *data) * request use of locality 'l' -- we MUST see REQUEST USE and * may see PENDING_REQUEST */ - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_REQUEST_USE | @@ -416,7 +420,7 @@ static void tpm_tis_i2c_test_check_access_reg_release(c= onst void *data) pending_request_flag =3D TPM_TIS_ACCESS_PENDING_REQUEST; } /* release locality 'locty' */ - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); /* * highest locality should now be active; release it and make sure= the @@ -427,16 +431,16 @@ static void tpm_tis_i2c_test_check_access_reg_release= (const void *data) continue; } /* 'l' should be active now */ - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_S= TS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | pending_request_flag | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); /* 'l' relinquishes access */ - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); - access =3D tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCE= SS); DPRINTF_ACCESS; if (l =3D=3D 1 || (locty <=3D 1 && l =3D=3D 2)) { pending_request_flag =3D 0; @@ -460,22 +464,24 @@ static void tpm_tis_i2c_test_check_transmit(const voi= d *data) size_t i; =20 /* enable csum */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENAB= LED); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE, + TPM_DATA_CSUM_ENABLED); /* check csum enable register has bit 0 set */ - v =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE); + v =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE); g_assert_cmpint(v, =3D=3D, TPM_DATA_CSUM_ENABLED); /* reading it as 32bit register returns same result */ - v =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE); + v =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE); g_assert_cmpint(v, =3D=3D, TPM_DATA_CSUM_ENABLED); =20 /* request use of locality 0 */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE); - access =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS, + TPM_TIS_ACCESS_REQUEST_USE); + access =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS); g_assert_cmpint(access, =3D=3D, TPM_TIS_ACCESS_TPM_REG_VALID_STS | TPM_TIS_ACCESS_ACTIVE_LOCALITY | TPM_TIS_ACCESS_TPM_ESTABLISHMENT); =20 - sts =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); + sts =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); DPRINTF_STS; =20 g_assert_cmpint(sts & 0xff, =3D=3D, 0); @@ -484,21 +490,22 @@ static void tpm_tis_i2c_test_check_transmit(const voi= d *data) g_assert_cmpint(bcount, >=3D, 128); =20 /* read bcount from STS + 1 must work also */ - bcount2 =3D tpm_tis_i2c_readw(0, TPM_I2C_REG_STS + 1); + bcount2 =3D tpm_tis_i2c_readw(global_qtest, 0, TPM_I2C_REG_STS + 1); g_assert_cmpint(bcount, =3D=3D, bcount2); =20 /* ic2 must have bits 26-31 zero */ g_assert_cmpint(sts & (0x1f << 26), =3D=3D, 0); =20 - tpm_tis_i2c_writel(0, TPM_I2C_REG_STS, TPM_TIS_STS_COMMAND_READY); - sts =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); + tpm_tis_i2c_writel(global_qtest, 0, TPM_I2C_REG_STS, + TPM_TIS_STS_COMMAND_READY); + sts =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); DPRINTF_STS; g_assert_cmpint(sts & 0xff, =3D=3D, TPM_TIS_STS_COMMAND_READY); =20 /* transmit command */ for (i =3D 0; i < sizeof(TPM_CMD); i++) { - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_FIFO, TPM_CMD[i]); - sts =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_FIFO, TPM_CMD= [i]); + sts =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); DPRINTF_STS; if (i < sizeof(TPM_CMD) - 1) { g_assert_cmpint(sts & 0xff, =3D=3D, @@ -509,21 +516,21 @@ static void tpm_tis_i2c_test_check_transmit(const voi= d *data) g_assert_cmpint((sts >> 8) & 0xffff, =3D=3D, --bcount); } /* read the checksum */ - csum =3D tpm_tis_i2c_readw(0, TPM_I2C_REG_DATA_CSUM_GET); + csum =3D tpm_tis_i2c_readw(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_GET); g_assert_cmpint(csum, =3D=3D, 0x6733); =20 /* start processing */ - tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO); + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_G= O); =20 uint64_t end_time =3D g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND; do { - sts =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); + sts =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); if ((sts & TPM_TIS_STS_DATA_AVAILABLE) !=3D 0) { break; } } while (g_get_monotonic_time() < end_time); =20 - sts =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); + sts =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); DPRINTF_STS; g_assert_cmpint(sts & 0xff, =3D=3D , TPM_TIS_STS_VALID | TPM_TIS_STS_DATA_AVAILABLE); @@ -534,8 +541,8 @@ static void tpm_tis_i2c_test_check_transmit(const void = *data) g_assert_cmpint(sizeof(tpm_msg), =3D=3D, bcount); =20 for (i =3D 0; i < sizeof(tpm_msg); i++) { - tpm_msg[i] =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_FIFO); - sts =3D tpm_tis_i2c_readl(0, TPM_I2C_REG_STS); + tpm_msg[i] =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA= _FIFO); + sts =3D tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS); DPRINTF_STS; if (sts & TPM_TIS_STS_DATA_AVAILABLE) { g_assert_cmpint((sts >> 8) & 0xffff, =3D=3D, --bcount); @@ -544,9 +551,9 @@ static void tpm_tis_i2c_test_check_transmit(const void = *data) g_assert_cmpmem(tpm_msg, sizeof(tpm_msg), s->tpm_msg, sizeof(*s->tpm_m= sg)); =20 /* relinquish use of locality 0 */ - tpm_tis_i2c_writeb(0, + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); - access =3D tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS); + access =3D tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS); } =20 int main(int argc, char **argv) diff --git a/tests/qtest/tpm-tis-i2c-util.c b/tests/qtest/tpm-tis-i2c-util.c index 07b1eeba69..6e724a4a47 100644 --- a/tests/qtest/tpm-tis-i2c-util.c +++ b/tests/qtest/tpm-tis-i2c-util.c @@ -20,45 +20,45 @@ uint32_t aspeed_bus_addr; =20 static uint8_t cur_locty =3D 0xff; =20 -static void tpm_tis_i2c_set_locty(uint8_t locty) +static void tpm_tis_i2c_set_locty(QTestState *s, uint8_t locty) { if (cur_locty !=3D locty) { cur_locty =3D locty; - aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, + aspeed_i2c_writeb(s, aspeed_bus_addr, I2C_SLAVE_ADDR, TPM_I2C_REG_LOC_SEL, locty); } } =20 -uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg) +uint8_t tpm_tis_i2c_readb(QTestState *s, uint8_t locty, uint8_t reg) { - tpm_tis_i2c_set_locty(locty); - return aspeed_i2c_readb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); + tpm_tis_i2c_set_locty(s, locty); + return aspeed_i2c_readb(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg); } =20 -uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg) +uint16_t tpm_tis_i2c_readw(QTestState *s, uint8_t locty, uint8_t reg) { - tpm_tis_i2c_set_locty(locty); + tpm_tis_i2c_set_locty(s, locty); return aspeed_i2c_readw(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); } =20 -uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg) +uint32_t tpm_tis_i2c_readl(QTestState *s, uint8_t locty, uint8_t reg) { - tpm_tis_i2c_set_locty(locty); - return aspeed_i2c_readl(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,= reg); + tpm_tis_i2c_set_locty(s, locty); + return aspeed_i2c_readl(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg); } =20 -void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v) +void tpm_tis_i2c_writeb(QTestState *s, uint8_t locty, uint8_t reg, uint8_t= v) { if (reg !=3D TPM_I2C_REG_LOC_SEL) { - tpm_tis_i2c_set_locty(locty); + tpm_tis_i2c_set_locty(s, locty); } - aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, = v); + aspeed_i2c_writeb(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v); } =20 -void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v) +void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, uint8_t reg, uint32_= t v) { if (reg !=3D TPM_I2C_REG_LOC_SEL) { - tpm_tis_i2c_set_locty(locty); + tpm_tis_i2c_set_locty(s, locty); } - aspeed_i2c_writel(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, = v); + aspeed_i2c_writel(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v); } diff --git a/tests/qtest/tpm-tis-i2c-util.h b/tests/qtest/tpm-tis-i2c-util.h index dfe626b43d..3289545f61 100644 --- a/tests/qtest/tpm-tis-i2c-util.h +++ b/tests/qtest/tpm-tis-i2c-util.h @@ -20,11 +20,11 @@ extern uint32_t aspeed_bus_addr; #define I2C_SLAVE_ADDR 0x2e #define I2C_DEV_BUS_NUM 10 =20 -uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg); -uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg); -uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg); +uint8_t tpm_tis_i2c_readb(QTestState *s, uint8_t locty, uint8_t reg); +uint16_t tpm_tis_i2c_readw(QTestState *s, uint8_t locty, uint8_t reg); +uint32_t tpm_tis_i2c_readl(QTestState *s, uint8_t locty, uint8_t reg); =20 -void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v); -void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v); +void tpm_tis_i2c_writeb(QTestState *s, uint8_t locty, uint8_t reg, uint8_t= v); +void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, uint8_t reg, uint32_= t v); =20 #endif /* TESTS_TPM_TIS_I2C_UTIL_H */ --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350900; cv=none; d=zohomail.com; s=zohoarc; b=i7IdPagZPrNuMNW2QQnSmnHQvYRbEeKokZ/LjTg3G7DGOXptYhS7XOHGho8QtVHjwWlf7ZZyX64FiVoKrhb9qKDq16nntA9JnADliU3VnB6+AnUBxpyP0C1Zu8h29Svi27aY0fB4iaNONQq6qFkePWhZgYIRbmW1oycg+yN4B00= ARC-Message-Signature: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350901425158500 Content-Type: text/plain; charset="utf-8" Convert the TPM command and response string arrays to byte arrays. Reviewed-by: Arun Menon Link: https://lore.kernel.org/qemu-devel/20260429121743.1346635-4-stefanb@l= inux.ibm.com Signed-off-by: Stefan Berger --- tests/qtest/tpm-tests.c | 30 ++++++++++++++++++--------- tests/qtest/tpm-util.c | 45 ++++++++++++++++++++++++++--------------- 2 files changed, 49 insertions(+), 26 deletions(-) diff --git a/tests/qtest/tpm-tests.c b/tests/qtest/tpm-tests.c index 197714f8d9..8bd3288f80 100644 --- a/tests/qtest/tpm-tests.c +++ b/tests/qtest/tpm-tests.c @@ -59,11 +59,16 @@ void tpm_test_swtpm_test(const char *src_tpm_path, tx_f= unc *tx, tpm_util_startup(s, tx); tpm_util_pcrextend(s, tx); =20 - static const unsigned char tpm_pcrread_resp[] =3D - "\x80\x01\x00\x00\x00\x3e\x00\x00\x00\x00\x00\x00\x00\x16\x00\x00" - "\x00\x01\x00\x0b\x03\x00\x04\x00\x00\x00\x00\x01\x00\x20\xf6\x85" - "\x98\xe5\x86\x8d\xe6\x8b\x97\x29\x99\x60\xf2\x71\x7d\x17\x67\x89" - "\xa4\x2f\x9a\xae\xa8\xc7\xb7\xaa\x79\xa8\x62\x56\xc1\xde"; + static const unsigned char tpm_pcrread_resp[] =3D { + 0x80, 0x01, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, + 0x00, 0x01, 0x00, 0x0b, 0x03, 0x00, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x01, 0x00, 0x20, 0xf6, 0x85, + 0x98, 0xe5, 0x86, 0x8d, 0xe6, 0x8b, 0x97, 0x29, + 0x99, 0x60, 0xf2, 0x71, 0x7d, 0x17, 0x67, 0x89, + 0xa4, 0x2f, 0x9a, 0xae, 0xa8, 0xc7, 0xb7, 0xaa, + 0x79, 0xa8, 0x62, 0x56, 0xc1, 0xde + }; tpm_util_pcrread(s, tx, tpm_pcrread_resp, sizeof(tpm_pcrread_resp)); =20 @@ -105,11 +110,16 @@ void tpm_test_swtpm_migration_test(const char *src_tp= m_path, tpm_util_startup(src_qemu, tx); tpm_util_pcrextend(src_qemu, tx); =20 - static const unsigned char tpm_pcrread_resp[] =3D - "\x80\x01\x00\x00\x00\x3e\x00\x00\x00\x00\x00\x00\x00\x16\x00\x00" - "\x00\x01\x00\x0b\x03\x00\x04\x00\x00\x00\x00\x01\x00\x20\xf6\x85" - "\x98\xe5\x86\x8d\xe6\x8b\x97\x29\x99\x60\xf2\x71\x7d\x17\x67\x89" - "\xa4\x2f\x9a\xae\xa8\xc7\xb7\xaa\x79\xa8\x62\x56\xc1\xde"; + static const unsigned char tpm_pcrread_resp[] =3D { + 0x80, 0x01, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, + 0x00, 0x01, 0x00, 0x0b, 0x03, 0x00, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x01, 0x00, 0x20, 0xf6, 0x85, + 0x98, 0xe5, 0x86, 0x8d, 0xe6, 0x8b, 0x97, 0x29, + 0x99, 0x60, 0xf2, 0x71, 0x7d, 0x17, 0x67, 0x89, + 0xa4, 0x2f, 0x9a, 0xae, 0xa8, 0xc7, 0xb7, 0xaa, + 0x79, 0xa8, 0x62, 0x56, 0xc1, 0xde, + }; tpm_util_pcrread(src_qemu, tx, tpm_pcrread_resp, sizeof(tpm_pcrread_resp)); =20 diff --git a/tests/qtest/tpm-util.c b/tests/qtest/tpm-util.c index 2cb2dd4796..63cd5b69db 100644 --- a/tests/qtest/tpm-util.c +++ b/tests/qtest/tpm-util.c @@ -54,10 +54,14 @@ void tpm_util_crb_transfer(QTestState *s, void tpm_util_startup(QTestState *s, tx_func *tx) { unsigned char buffer[1024]; - static const unsigned char tpm_startup[] =3D - "\x80\x01\x00\x00\x00\x0c\x00\x00\x01\x44\x00\x00"; - static const unsigned char tpm_startup_resp[] =3D - "\x80\x01\x00\x00\x00\x0a\x00\x00\x00\x00"; + static const unsigned char tpm_startup[] =3D { + 0x80, 0x01, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, + 0x01, 0x44, 0x00, 0x00 + }; + static const unsigned char tpm_startup_resp[] =3D { + 0x80, 0x01, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, + 0x00, 0x00 + }; =20 tx(s, tpm_startup, sizeof(tpm_startup), buffer, sizeof(buffer)); =20 @@ -68,16 +72,23 @@ void tpm_util_startup(QTestState *s, tx_func *tx) void tpm_util_pcrextend(QTestState *s, tx_func *tx) { unsigned char buffer[1024]; - static const unsigned char tpm_pcrextend[] =3D - "\x80\x02\x00\x00\x00\x41\x00\x00\x01\x82\x00\x00\x00\x0a\x00\x00" - "\x00\x09\x40\x00\x00\x09\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00" - "\x0b\x74\x65\x73\x74\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" - "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" - "\x00"; + static const unsigned char tpm_pcrextend[] =3D { + 0x80, 0x02, 0x00, 0x00, 0x00, 0x41, 0x00, 0x00, + 0x01, 0x82, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, + 0x00, 0x09, 0x40, 0x00, 0x00, 0x09, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, + 0x0b, 0x74, 0x65, 0x73, 0x74, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00 + }; =20 - static const unsigned char tpm_pcrextend_resp[] =3D - "\x80\x02\x00\x00\x00\x13\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" - "\x01\x00\x00"; + static const unsigned char tpm_pcrextend_resp[] =3D { + 0x80, 0x02, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00 + }; =20 tx(s, tpm_pcrextend, sizeof(tpm_pcrextend), buffer, sizeof(buffer)); =20 @@ -89,9 +100,11 @@ void tpm_util_pcrread(QTestState *s, tx_func *tx, const unsigned char *exp_resp, size_t exp_resp_size) { unsigned char buffer[1024]; - static const unsigned char tpm_pcrread[] =3D - "\x80\x01\x00\x00\x00\x14\x00\x00\x01\x7e\x00\x00\x00\x01\x00\x0b" - "\x03\x00\x04\x00"; + static const unsigned char tpm_pcrread[] =3D { + 0x80, 0x01, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, + 0x01, 0x7e, 0x00, 0x00, 0x00, 0x01, 0x00, 0x0b, + 0x03, 0x00, 0x04, 0x00 + }; =20 tx(s, tpm_pcrread, sizeof(tpm_pcrread), buffer, sizeof(buffer)); =20 --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350964; cv=none; d=zohomail.com; s=zohoarc; b=ifh7FXDGIFFtUYLXej0C6X1m0eIX9pignZHk3qjggeuO2V2gjrqIr6aqVzbkTZp3RE9Ywir6RoDIPtmZ9dtLFKsQESm1f3F3wI5k0OlSFOb2WLHZK5aIVBqjbKKYOLGTgLzAUC5iZtj+yQK5ML4/VjJy4BVKWGfg8UuxWTmVBxY= ARC-Message-Signature: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=stefanb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350965378158500 Content-Type: text/plain; charset="utf-8" Rename the id of the tpmdev from dev to tpm0 because this 'dev' cannot be used when the tpm-tis-i2c device is used. Reviewed-by: Arun Menon Link: https://lore.kernel.org/qemu-devel/20260429121743.1346635-5-stefanb@l= inux.ibm.com Signed-off-by: Stefan Berger --- tests/qtest/tpm-tests.c | 4 ++-- tests/qtest/tpm-util.c | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/tests/qtest/tpm-tests.c b/tests/qtest/tpm-tests.c index 8bd3288f80..1b4f932b0c 100644 --- a/tests/qtest/tpm-tests.c +++ b/tests/qtest/tpm-tests.c @@ -49,8 +49,8 @@ void tpm_test_swtpm_test(const char *src_tpm_path, tx_fun= c *tx, args =3D g_strdup_printf( "%s " "-chardev socket,id=3Dchr,path=3D%s " - "-tpmdev emulator,id=3Ddev,chardev=3Dchr " - "-device %s,tpmdev=3Ddev", + "-tpmdev emulator,id=3Dtpm0,chardev=3Dchr " + "-device %s,tpmdev=3Dtpm0", machine_options ? : "", addr->u.q_unix.path, ifmodel); =20 s =3D qtest_start(args); diff --git a/tests/qtest/tpm-util.c b/tests/qtest/tpm-util.c index 63cd5b69db..0f9bef8971 100644 --- a/tests/qtest/tpm-util.c +++ b/tests/qtest/tpm-util.c @@ -240,8 +240,8 @@ void tpm_util_migration_start_qemu(QTestState **src_qem= u, src_qemu_args =3D g_strdup_printf( "%s " "-chardev socket,id=3Dchr,path=3D%s " - "-tpmdev emulator,id=3Ddev,chardev=3Dchr " - "-device %s,tpmdev=3Ddev ", + "-tpmdev emulator,id=3Dtpm0,chardev=3Dchr " + "-device %s,tpmdev=3Dtpm0 ", machine_options ? : "", src_tpm_addr->u.q_unix.path, ifmodel); =20 *src_qemu =3D qtest_init(src_qemu_args); @@ -249,8 +249,8 @@ void tpm_util_migration_start_qemu(QTestState **src_qem= u, dst_qemu_args =3D g_strdup_printf( "%s " "-chardev socket,id=3Dchr,path=3D%s " - "-tpmdev emulator,id=3Ddev,chardev=3Dchr " - "-device %s,tpmdev=3Ddev " + "-tpmdev emulator,id=3Dtpm0,chardev=3Dchr " + "-device %s,tpmdev=3Dtpm0 " "-incoming %s", machine_options ? : "", dst_tpm_addr->u.q_unix.path, --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350963; cv=none; d=zohomail.com; s=zohoarc; b=XI9sWVvbTQzNDaLQBIwNe1jRPdnq0HqEXg51YKJZRBDx67Du+GOpHf6A42/I2vb3krsqOsr46x6/cpJMY+Ei+amRlR1UC8iNdZhLWvTSQ3lB9qRwmI9sd4+NOCeICHElCySHM6u6Vstu70OGqg+lMRUK86hTM3uunD4bNzVd2b0= ARC-Message-Signature: i=1; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=AVcIyrH3cFL80WBc2 kgpR87P3qLBk9N1sWKrDncjlbs=; b=qFHbgBxP5EQ7LjVMWZ495Wn5g8AwuROsE AruuQDsF7p1fHgyuI0Ys3HGGsP5AhwX4dAqDT15A6GJDWutjISYGSE91hLeTPwvE yfykTcxNt9yHeauVc0qEBdUE9rc5g7mKyKmZ2jrLWXb/L26kNThTAPwv/5J34ojo TqZY2o8w3eFtdJWAe77B5A3cXGZsZ1BnYd1EpdTgZrGk9NUvicB/ekt2+jqADHPa BEvaQdULsUsjL/ZVWR3u0Gll0yUGcVpIT3EjzgfnoGHfrhRocSagIAcisUTpTgvh g6hueKN5odEf2/j/16+QdBo03hdcPFQZ6n8gEr6B08FxWwbEsbarw== From: Stefan Berger To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Stefan Berger , Arun Menon Subject: [PULL v1 05/16] tests: Check whether the I2C master flag is set Date: Mon, 1 Jun 2026 17:53:58 -0400 Message-ID: <20260601215410.517009-6-stefanb@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260601215410.517009-1-stefanb@linux.ibm.com> References: <20260601215410.517009-1-stefanb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: DWgbgdj3gq5xZhXMVX7Zg_hnDwjVjX3Y X-Proofpoint-GUID: DWgbgdj3gq5xZhXMVX7Zg_hnDwjVjX3Y X-Authority-Analysis: v=2.4 cv=bcVbluPB c=1 sm=1 tr=0 ts=6a1dff95 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=20KFwNOVAAAA:8 a=hDG30pTYrb-JhymLzFwA:9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjAxMDIxMSBTYWx0ZWRfX9e7EUFWhwECG GgMUiL/1lKneu/xee8vBzdqnQS4zs9dqrpIev+JMw5J5wYBgtyO7SlhHsAK7/Gt53GKv6qkvJSA S4NaiY6zq/53XjnhnCjSJgh4n2C2D9VYg8+hnB2CwDqscDddH4jnAQndCgtKmB77AT3XA2veizn ejXw23ToUBQd/PlT/KdcUaoYUdu0bhEYf2MCGiJaWXW/9OIRIIpwjNfb3XfKBd15DCESooQs5RY wUaTpxVQrFFkkdprDIvXGoz+lAqol3mwBYyENGF3F7QSEV6d2SzVSRb3+VZF7ALo5+sXzJjxYIj 8BdkOrhMwl2YPhLlycDLvyR/t/EEuq+1xxkH6fkgp1Cf8hZjw6cNm17j+5cAi965dGL9GzLGjmH abnZTY9tt6jlF4D3pSEqOUjJ2g4H25u5FedcHW1jALlBxTpsDeVVyH/0VkxqG3dEQ2zGiDdnYPK 3xgjwDUifhKG79FUjUQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-01_06,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1015 adultscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606010211 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350965544154100 Content-Type: text/plain; charset="utf-8" Replace the 'once' variable with a check for whether the master flag is set so that the flag can be set when needed. Reviewed-by: Arun Menon Link: https://lore.kernel.org/qemu-devel/20260429121743.1346635-6-stefanb@l= inux.ibm.com Signed-off-by: Stefan Berger --- tests/qtest/qtest_aspeed.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/tests/qtest/qtest_aspeed.c b/tests/qtest/qtest_aspeed.c index f6da9adea9..7bf5abb9be 100644 --- a/tests/qtest/qtest_aspeed.c +++ b/tests/qtest/qtest_aspeed.c @@ -15,18 +15,21 @@ #include "qtest_aspeed.h" #include "hw/i2c/aspeed_i2c.h" =20 +static bool aspeed_i2c_is_master_enabled(QTestState *s, uint32_t baseaddr) +{ + return qtest_readl(s, baseaddr + A_I2CC_FUN_CTRL) & A_I2CD_MASTER_EN; +} + static void aspeed_i2c_startup(QTestState *s, uint32_t baseaddr, uint8_t slave_addr, uint8_t reg) { uint32_t v; - static int once; =20 - if (!once) { + if (!aspeed_i2c_is_master_enabled(s, baseaddr)) { /* one time: enable master */ qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, 0); v =3D qtest_readl(s, baseaddr + A_I2CC_FUN_CTRL) | A_I2CD_MASTER_EN; qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, v); 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=stefanb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350993590158500 Content-Type: text/plain; charset="utf-8" Add a test case testing the TPM TIS over I2C with swtpm. Reviewed-by: Arun Menon Link: https://lore.kernel.org/qemu-devel/20260429121743.1346635-7-stefanb@l= inux.ibm.com Signed-off-by: Stefan Berger --- tests/qtest/meson.build | 5 +- tests/qtest/tpm-tis-i2c-swtpm-test.c | 82 ++++++++++++++++++++++++++++ tests/qtest/tpm-tis-i2c-util.c | 38 +++++++++++++ tests/qtest/tpm-tis-i2c-util.h | 4 ++ 4 files changed, 127 insertions(+), 2 deletions(-) create mode 100644 tests/qtest/tpm-tis-i2c-swtpm-test.c diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 57512c6e56..45ea497fa5 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -244,7 +244,7 @@ qtests_arm =3D \ (config_all_devices.has_key('CONFIG_ASPEED_SOC') ? qtests_aspeed : []) += \ (config_all_devices.has_key('CONFIG_NPCM7XX') ? qtests_npcm7xx : []) + \ (config_all_devices.has_key('CONFIG_GENERIC_LOADER') ? ['hexloader-test'= ] : []) + \ - (config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test']= : []) + \ + (config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test',= 'tpm-tis-i2c-swtpm-test'] : []) + \ (config_all_devices.has_key('CONFIG_VEXPRESS') ? ['test-arm-mptimer'] : = []) + \ (config_all_devices.has_key('CONFIG_MICROBIT') ? ['microbit-test'] : [])= + \ (config_all_devices.has_key('CONFIG_STM32L4X5_SOC') ? qtests_stm32l4x5 := []) + \ @@ -263,7 +263,7 @@ qtests_aarch64 =3D \ (config_all_devices.has_key('CONFIG_XLNX_VERSAL') ? ['xlnx-canfd-test', = 'xlnx-versal-trng-test'] : []) + \ (config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test', 'bcm2= 835-i2c-test'] : []) + \ (config_all_accel.has_key('CONFIG_TCG') and = \ - config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test']= : []) + \ + config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test',= 'tpm-tis-i2c-swtpm-test'] : []) + \ (config_all_devices.has_key('CONFIG_ASPEED_SOC') ? qtests_aspeed64 : [])= + \ (config_all_devices.has_key('CONFIG_NPCM8XX') ? qtests_npcm8xx : []) + \ (config_all_devices.has_key('CONFIG_IOMMU_TESTDEV') and @@ -402,6 +402,7 @@ qtests =3D { 'tpm-tis-swtpm-test': [io, tpmemu_files, 'tpm-tis-util.c'], 'tpm-tis-test': [io, tpmemu_files, 'tpm-tis-util.c'], 'tpm-tis-i2c-test': [io, tpmemu_files, 'tpm-tis-i2c-util.c', 'qtest_aspe= ed.c'], + 'tpm-tis-i2c-swtpm-test': [io, tpmemu_files, 'tpm-tis-i2c-util.c', 'qtes= t_aspeed.c'], 'tpm-tis-device-swtpm-test': [io, tpmemu_files, 'tpm-tis-util.c'], 'tpm-tis-device-test': [io, tpmemu_files, 'tpm-tis-util.c'], 'virtio-net-failover': test_migration_files, diff --git a/tests/qtest/tpm-tis-i2c-swtpm-test.c b/tests/qtest/tpm-tis-i2c= -swtpm-test.c new file mode 100644 index 0000000000..50d32a960b --- /dev/null +++ b/tests/qtest/tpm-tis-i2c-swtpm-test.c @@ -0,0 +1,82 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * + * QTest testcase for TPM TIS over I2C talking to external swtpm + * + * Copyright (c) 2018, 2026 IBM Corporation + * with parts borrowed from migration-test.c that is: + * Copyright (c) 2016-2018 Red Hat, Inc. and/or its affiliates + * + * Authors: + * Stefan Berger + * + */ + +#include "qemu/osdep.h" + +#include "libqtest.h" +#include "qemu/module.h" +#include "tpm-tests.h" +#include "tpm-tis-i2c-util.h" +#include "qtest_aspeed.h" + +typedef struct TestState { + char *src_tpm_path; + char *dst_tpm_path; + char *uri; + const char *machine_options; + char *ifmodel; +} TestState; + +static void tpm_tis_i2c_swtpm_test(const void *data) +{ + const TestState *ts =3D data; + + tpm_test_swtpm_test(ts->src_tpm_path, tpm_tis_i2c_transfer, + ts->ifmodel, ts->machine_options); +} + +static void tpm_tis_swtpm_migration_test(const void *data) +{ + const TestState *ts =3D data; + + tpm_test_swtpm_migration_test(ts->src_tpm_path, ts->dst_tpm_path, + ts->uri, tpm_tis_i2c_transfer, + ts->ifmodel, ts->machine_options); +} + + +int main(int argc, char **argv) +{ + int ret; + TestState ts; + + ts.src_tpm_path =3D g_dir_make_tmp("qemu-tpm-tis-i2c-swtpm-test.XXXXXX= ", + NULL); + ts.dst_tpm_path =3D g_dir_make_tmp("qemu-tpm-tis-i2c-swtpm-test.XXXXXX= ", + NULL); + ts.uri =3D g_strdup_printf("unix:%s/migsocket", ts.src_tpm_path); + ts.machine_options =3D "-machine rainier-bmc -accel tcg"; + ts.ifmodel =3D g_strdup_printf( + "tpm-tis-i2c,bus=3Daspeed.i2c.bus.%d,address= =3D0x%x", + I2C_DEV_BUS_NUM, I2C_SLAVE_ADDR); + + module_call_init(MODULE_INIT_QOM); + g_test_init(&argc, &argv, NULL); + + aspeed_bus_addr =3D ast2600_i2c_calc_bus_addr(I2C_DEV_BUS_NUM); + + qtest_add_data_func("/tpm/tis-i2c-swtpm/test", &ts, tpm_tis_i2c_swtpm_= test); + qtest_add_data_func("/tpm/tis-i2c-swtpm-migration/test", &ts, + tpm_tis_swtpm_migration_test); + ret =3D g_test_run(); + + tpm_util_rmdir(ts.dst_tpm_path); + g_free(ts.dst_tpm_path); + tpm_util_rmdir(ts.src_tpm_path); + g_free(ts.src_tpm_path); + g_free(ts.uri); + g_free(ts.ifmodel); + + return ret; +} diff --git a/tests/qtest/tpm-tis-i2c-util.c b/tests/qtest/tpm-tis-i2c-util.c index 6e724a4a47..c73420ec5b 100644 --- a/tests/qtest/tpm-tis-i2c-util.c +++ b/tests/qtest/tpm-tis-i2c-util.c @@ -15,6 +15,7 @@ #include "libqtest-single.h" #include "qtest_aspeed.h" #include "tpm-tis-i2c-util.h" +#include "tpm-emu.h" =20 uint32_t aspeed_bus_addr; =20 @@ -62,3 +63,40 @@ void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, ui= nt8_t reg, uint32_t v) } aspeed_i2c_writel(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v); } + +void tpm_tis_i2c_transfer(QTestState *s, + const unsigned char *req, size_t req_size, + unsigned char *rsp, size_t rsp_size) +{ + uint32_t sts; + size_t i; + + /* request use of locality 0 */ + tpm_tis_i2c_writeb(s, 0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_US= E); + + tpm_tis_i2c_writel(s, 0, TPM_I2C_REG_STS, TPM_TIS_STS_COMMAND_READY); + + /* transmit command */ + for (i =3D 0; i < req_size; i++) { + tpm_tis_i2c_writeb(s, 0, TPM_I2C_REG_DATA_FIFO, req[i]); + } + + /* start processing */ + tpm_tis_i2c_writeb(s, 0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO); + + uint64_t end_time =3D g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND; + do { + sts =3D tpm_tis_i2c_readl(s, 0, TPM_I2C_REG_STS); + if ((sts & TPM_TIS_STS_DATA_AVAILABLE) !=3D 0) { + break; + } + } while (g_get_monotonic_time() < end_time); + + /* read response */ + for (i =3D 0; i < rsp_size; i++) { + rsp[i] =3D tpm_tis_i2c_readb(s, 0, TPM_I2C_REG_DATA_FIFO); + } + /* relinquish use of locality 0 */ + tpm_tis_i2c_writeb(s, 0, + TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY); +} diff --git a/tests/qtest/tpm-tis-i2c-util.h b/tests/qtest/tpm-tis-i2c-util.h index 3289545f61..499bf4964a 100644 --- a/tests/qtest/tpm-tis-i2c-util.h +++ b/tests/qtest/tpm-tis-i2c-util.h @@ -27,4 +27,8 @@ uint32_t tpm_tis_i2c_readl(QTestState *s, uint8_t locty, = uint8_t reg); void tpm_tis_i2c_writeb(QTestState *s, uint8_t locty, uint8_t reg, uint8_t= v); void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, uint8_t reg, uint32_= t v); =20 +void tpm_tis_i2c_transfer(QTestState *s, + const unsigned char *req, size_t req_size, + unsigned char *rsp, size_t rsp_size); + #endif /* TESTS_TPM_TIS_I2C_UTIL_H */ --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350991; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=stefanb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350993518158500 From: Arun Menon In GLib, GByteArray is an object managed by the library. Currently, migrating a GByteArray requires treating it as a raw C struct and using VMSTATE_VBUFFER_ALLOC_UINT32. For example, see vmstate_vdba in ui/vdagent.c QEMU cannot pretend that GByteArray is a C struct and simply use VMS_ALLOC to g_malloc() the buffer. This is because, VMS_ALLOC blindly overwrites the data pointer with a newly allocated buffer, thereby leaking the previous memory. Besides, GLib tracks the array's capacity in a hidden alloc field. Bypassing GLib APIs leave this capacity out of sync with the newly allocated buffer, potentially leading to heap buffer overflows during subsequent g_byte_array_append() calls. This commit introduces VMSTATE_GBYTEARRAY which uses specific library API calls (g_byte_array_set_size()) to safely resize and populate the buffer. Signed-off-by: Arun Menon Suggested-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Peter Xu Link: https://lore.kernel.org/qemu-devel/20260423105733.113046-2-armenon@re= dhat.com Signed-off-by: Stefan Berger --- include/migration/vmstate.h | 10 ++++++++++ migration/vmstate-types.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h index 0a8a2e85a6..1b7f295417 100644 --- a/include/migration/vmstate.h +++ b/include/migration/vmstate.h @@ -308,6 +308,7 @@ extern const VMStateInfo vmstate_info_bitmap; extern const VMStateInfo vmstate_info_qtailq; extern const VMStateInfo vmstate_info_gtree; extern const VMStateInfo vmstate_info_qlist; +extern const VMStateInfo vmstate_info_g_byte_array; =20 #define type_check_2darray(t1,t2,n,m) ((t1(*)[n][m])0 - (t2*)0) /* @@ -957,6 +958,15 @@ extern const VMStateInfo vmstate_info_qlist; .start =3D offsetof(_type, _next), = \ } =20 +#define VMSTATE_GBYTEARRAY(_field, _state, _version) { \ + .name =3D (stringify(_field)), = \ + .version_id =3D (_version), = \ + .size =3D sizeof(GByteArray), = \ + .info =3D &vmstate_info_g_byte_array, = \ + .flags =3D VMS_SINGLE, = \ + .offset =3D vmstate_offset_pointer(_state, _field, GByteArray), = \ +} + /* _f : field name _f_n : num of elements field_name _n : num of elements diff --git a/migration/vmstate-types.c b/migration/vmstate-types.c index ae465c5c2c..8c01215c25 100644 --- a/migration/vmstate-types.c +++ b/migration/vmstate-types.c @@ -924,3 +924,31 @@ const VMStateInfo vmstate_info_qlist =3D { .load =3D load_qlist, .save =3D save_qlist, }; + +static int get_g_byte_array(QEMUFile *f, void *pv, size_t size, + const VMStateField *field) +{ + GByteArray *byte_array =3D *(GByteArray **)pv; + uint32_t len =3D qemu_get_be32(f); + + g_byte_array_set_size(byte_array, len); + qemu_get_buffer(f, byte_array->data, len); + return 0; +} + +static int put_g_byte_array(QEMUFile *f, void *pv, size_t size, + const VMStateField *field, JSONWriter *vmdesc) +{ + GByteArray *byte_array =3D *(GByteArray **)pv; + + qemu_put_be32(f, byte_array->len); + qemu_put_buffer(f, byte_array->data, byte_array->len); + + return 0; +} + +const VMStateInfo vmstate_info_g_byte_array =3D { + .name =3D "GByteArray", + .get =3D get_g_byte_array, + .put =3D put_g_byte_array, +}; --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350955311158500 From: Arun Menon Migrating a GLib GByteArray is now possible directly using the newly introduced VMSTATE_GBYTEARRAY. It uses the standard GLib API calls to create the array, or resize it. This is safer than implementing a C struct and manually updating the data and len fields. This commit uses the VMSTATE_GBYTEARRAY in vdagent to store the outbuf variable. Signed-off-by: Arun Menon Suggested-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Peter Xu Link: https://lore.kernel.org/qemu-devel/20260423105733.113046-3-armenon@re= dhat.com Signed-off-by: Stefan Berger --- ui/vdagent.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/ui/vdagent.c b/ui/vdagent.c index 8fa325bffa..b9784d4d9b 100644 --- a/ui/vdagent.c +++ b/ui/vdagent.c @@ -964,17 +964,6 @@ static const VMStateDescription vmstate_chunk =3D { } }; =20 -static const VMStateDescription vmstate_vdba =3D { - .name =3D "vdagent/bytearray", - .version_id =3D 0, - .minimum_version_id =3D 0, - .fields =3D (const VMStateField[]) { - VMSTATE_UINT32(len, GByteArray), - VMSTATE_VBUFFER_ALLOC_UINT32(data, GByteArray, 0, 0, len), - VMSTATE_END_OF_LIST() - } -}; - struct CBInfoArray { uint32_t n; QemuClipboardInfo cbinfo[QEMU_CLIPBOARD_SELECTION__COUNT]; @@ -1064,7 +1053,7 @@ static const VMStateDescription vmstate_vdagent =3D { VMSTATE_UINT32(xsize, VDAgentChardev), VMSTATE_UINT32(xoff, VDAgentChardev), VMSTATE_VBUFFER_ALLOC_UINT32(xbuf, VDAgentChardev, 0, 0, xsize), - VMSTATE_STRUCT_POINTER(outbuf, VDAgentChardev, vmstate_vdba, GByte= Array), + VMSTATE_GBYTEARRAY(outbuf, VDAgentChardev, 0), VMSTATE_UINT32(mouse_x, VDAgentChardev), VMSTATE_UINT32(mouse_y, VDAgentChardev), VMSTATE_UINT32(mouse_btn, VDAgentChardev), --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350923185158500 From: Arun Menon - Add new fields to the CRB Interface Identifier and the CRB Control Start registers. - CRB_CTRL_START now has 2 new settings, that can be toggled using the nextChunk and crbRspRetry bits. - CapCRBChunk bit (10) was Reserved1 previously. The field is reused in this revision of the specification. Refer to section 6.4.2.2 of [1] - Add hw_compat global property called cap-chunk because the chunking feature is only supported for machine type 11.1 and higher. [1] https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific= -Platform-TPM-Profile-for-TPM-2p0-v1p07_Pub.pdf Signed-off-by: Arun Menon Reviewed-by: Stefan Berger Reviewed-by: Marc-Andr=C3=A9 Lureau Link: https://lore.kernel.org/qemu-devel/20260506075813.120781-2-armenon@re= dhat.com Signed-off-by: Stefan Berger --- hw/core/machine.c | 1 + hw/tpm/tpm_crb.c | 6 ++++++ include/hw/acpi/tpm.h | 5 ++++- 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 63baff859f..00eb3432a7 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -41,6 +41,7 @@ =20 GlobalProperty hw_compat_11_0[] =3D { { "chardev-vc", "encoding", "cp437" }, + { "tpm-crb", "cap-chunk", "off" }, }; const size_t hw_compat_11_0_len =3D G_N_ELEMENTS(hw_compat_11_0); =20 diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 02701ab948..bfa09c04cf 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -44,6 +44,8 @@ struct CRBState { size_t be_buffer_size; =20 TPMPPI ppi; + + bool cap_chunk; }; typedef struct CRBState CRBState; =20 @@ -58,6 +60,7 @@ DECLARE_INSTANCE_CHECKER(CRBState, CRB, #define CRB_INTF_CAP_FIFO_NOT_SUPPORTED 0b0 #define CRB_INTF_CAP_CRB_SUPPORTED 0b1 #define CRB_INTF_IF_SELECTOR_CRB 0b1 +#define CRB_INTF_CAP_CRB_CHUNK 0b1 =20 #define CRB_CTRL_CMD_SIZE (TPM_CRB_ADDR_SIZE - A_CRB_DATA_BUFFER) =20 @@ -227,6 +230,7 @@ static const VMStateDescription vmstate_tpm_crb =3D { =20 static const Property tpm_crb_properties[] =3D { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), + DEFINE_PROP_BOOL("cap-chunk", CRBState, cap_chunk, true), }; =20 static void tpm_crb_reset(void *dev) @@ -258,6 +262,8 @@ static void tpm_crb_reset(void *dev) CapCRB, CRB_INTF_CAP_CRB_SUPPORTED); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, InterfaceSelector, CRB_INTF_IF_SELECTOR_CRB); + ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, + CapCRBChunk, s->cap_chunk ? CRB_INTF_CAP_CRB_CHUNK : = 0); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, RID, 0b0000); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID2, diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index 2ab186a745..782dc8212c 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -150,7 +150,7 @@ REG32(CRB_INTF_ID, 0x30) FIELD(CRB_INTF_ID, InterfaceVersion, 4, 4) FIELD(CRB_INTF_ID, CapLocality, 8, 1) FIELD(CRB_INTF_ID, CapCRBIdleBypass, 9, 1) - FIELD(CRB_INTF_ID, Reserved1, 10, 1) + FIELD(CRB_INTF_ID, CapCRBChunk, 10, 1) FIELD(CRB_INTF_ID, CapDataXferSizeSupport, 11, 2) FIELD(CRB_INTF_ID, CapFIFO, 13, 1) FIELD(CRB_INTF_ID, CapCRB, 14, 1) @@ -169,6 +169,9 @@ REG32(CRB_CTRL_STS, 0x44) FIELD(CRB_CTRL_STS, tpmIdle, 1, 1) REG32(CRB_CTRL_CANCEL, 0x48) REG32(CRB_CTRL_START, 0x4C) + FIELD(CRB_CTRL_START, Start, 0, 1) + FIELD(CRB_CTRL_START, crbRspRetry, 1, 1) + FIELD(CRB_CTRL_START, nextChunk, 2, 1) REG32(CRB_INT_ENABLED, 0x50) REG32(CRB_INT_STS, 0x54) REG32(CRB_CTRL_CMD_SIZE, 0x58) --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350965399158500 From: Arun Menon Replace manual bitwise operations with ARRAY_FIELD_DP32 macros No functional changes. Signed-off-by: Arun Menon Reviewed-by: Stefan Berger Reviewed-by: Marc-Andr=C3=A9 Lureau Link: https://lore.kernel.org/qemu-devel/20260506075813.120781-3-armenon@re= dhat.com Signed-off-by: Stefan Berger --- hw/tpm/tpm_crb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index bfa09c04cf..a0f472652e 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -146,7 +146,7 @@ static void tpm_crb_mmio_write(void *opaque, hwaddr add= r, tpm_crb_get_active_locty(s) =3D=3D locty) { void *mem =3D memory_region_get_ram_ptr(&s->cmdmem); =20 - s->regs[R_CRB_CTRL_START] |=3D CRB_START_INVOKE; + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, Start, 1); s->cmd =3D (TPMBackendCmd) { .in =3D mem, .in_len =3D MIN(tpm_cmd_get_size(mem), s->be_buffer_size), @@ -195,7 +195,7 @@ static void tpm_crb_request_completed(TPMIf *ti, int re= t) { CRBState *s =3D CRB(ti); =20 - s->regs[R_CRB_CTRL_START] &=3D ~CRB_START_INVOKE; + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, Start, 0); if (ret !=3D 0) { ARRAY_FIELD_DP32(s->regs, CRB_CTRL_STS, tpmSts, 1); /* fatal error */ --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350965; cv=none; d=zohomail.com; s=zohoarc; b=NiyxXT2fgoZo5rhLDtHekz2lSi+QceOTEw+PDDPYF1jsf6YwmWwYsIJB/8de/l55FwhniOcJ3PSCScl+fvNvIjdkWy0+2X8cbxIcmdTF8gvnhgIenCjYGEwQ1RMUNd627ww2O8+thtXCW/y9MSL22KcCX01A3dDt8HLJYTeTM74= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1780350965; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350965439158500 From: Arun Menon - Introduce GByteArray buffers to hold the command request and response data during chunked TPM CRB transactions. - Add helper function to clean them. Signed-off-by: Arun Menon Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Stefan Berger Link: https://lore.kernel.org/qemu-devel/20260506075813.120781-4-armenon@re= dhat.com Signed-off-by: Stefan Berger --- hw/tpm/tpm_crb.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index a0f472652e..1c944d7ef2 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -38,10 +38,13 @@ struct CRBState { TPMBackend *tpmbe; TPMBackendCmd cmd; uint32_t regs[TPM_CRB_R_MAX]; + size_t be_buffer_size; MemoryRegion mmio; MemoryRegion cmdmem; =20 - size_t be_buffer_size; + GByteArray *command_buffer; + GByteArray *response_buffer; + uint32_t response_offset; =20 TPMPPI ppi; =20 @@ -86,6 +89,13 @@ enum crb_cancel { =20 #define TPM_CRB_NO_LOCALITY 0xff =20 +static void tpm_crb_clear_internal_buffers(CRBState *s) +{ + g_byte_array_set_size(s->response_buffer, 0); + g_byte_array_set_size(s->command_buffer, 0); + s->response_offset =3D 0; +} + static uint64_t tpm_crb_mmio_read(void *opaque, hwaddr addr, unsigned size) { @@ -135,9 +145,11 @@ static void tpm_crb_mmio_write(void *opaque, hwaddr ad= dr, } break; case A_CRB_CTRL_CANCEL: - if (val =3D=3D CRB_CANCEL_INVOKE && - s->regs[R_CRB_CTRL_START] & CRB_START_INVOKE) { - tpm_backend_cancel_cmd(s->tpmbe); + if (val =3D=3D CRB_CANCEL_INVOKE) { + if (s->regs[R_CRB_CTRL_START] & CRB_START_INVOKE) { + tpm_backend_cancel_cmd(s->tpmbe); + } + tpm_crb_clear_internal_buffers(s); } break; case A_CRB_CTRL_START: @@ -239,6 +251,7 @@ static void tpm_crb_reset(void *dev) =20 tpm_ppi_reset(&s->ppi); tpm_backend_reset(s->tpmbe); + tpm_crb_clear_internal_buffers(s); =20 memset(s->regs, 0, sizeof(s->regs)); =20 @@ -305,6 +318,9 @@ static void tpm_crb_realize(DeviceState *dev, Error **e= rrp) memory_region_add_subregion(get_system_memory(), TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem); =20 + s->command_buffer =3D g_byte_array_new(); + s->response_buffer =3D g_byte_array_new(); + tpm_ppi_init(&s->ppi, get_system_memory(), TPM_PPI_ADDR_BASE, OBJECT(s)); =20 @@ -315,12 +331,21 @@ static void tpm_crb_realize(DeviceState *dev, Error *= *errp) } } =20 +static void tpm_crb_unrealize(DeviceState *dev) +{ + CRBState *s =3D CRB(dev); + + g_clear_pointer(&s->command_buffer, g_byte_array_unref); + g_clear_pointer(&s->response_buffer, g_byte_array_unref); +} + static void tpm_crb_class_init(ObjectClass *klass, const void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); TPMIfClass *tc =3D TPM_IF_CLASS(klass); =20 dc->realize =3D tpm_crb_realize; + dc->unrealize =3D tpm_crb_unrealize; device_class_set_props(dc, tpm_crb_properties); dc->vmsd =3D &vmstate_tpm_crb; dc->user_creatable =3D true; --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350921178154100 From: Arun Menon - Add logic to populate internal TPM command request and response buffers and to toggle the control registers after each operation. - The chunk size is limited to CRB_CTRL_CMD_SIZE which is (TPM_CRB_ADDR_SIZE - A_CRB_DATA_BUFFER). This comes out as 3968 bytes (4096 - 128 or 0x1000 - 0x80), because 128 bytes are reserved for control and status registers. In other words, only 3968 bytes are available for the TPM data. - With this feature, guests can send commands larger than 3968 bytes. - Refer section 6.5.3.9 of [1] for implementation details. [1] https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific= -Platform-TPM-Profile-for-TPM-2p0-v1p07_Pub.pdf Signed-off-by: Arun Menon Reviewed-by: Stefan Berger Reviewed-by: Marc-Andr=C3=A9 Lureau Link: https://lore.kernel.org/qemu-devel/20260506075813.120781-5-armenon@re= dhat.com Signed-off-by: Stefan Berger --- hw/tpm/tpm_crb.c | 143 ++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 130 insertions(+), 13 deletions(-) diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 1c944d7ef2..f85df08185 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -17,6 +17,7 @@ #include "qemu/osdep.h" =20 #include "qemu/module.h" +#include "qemu/error-report.h" #include "qapi/error.h" #include "system/address-spaces.h" #include "hw/core/qdev-properties.h" @@ -66,6 +67,7 @@ DECLARE_INSTANCE_CHECKER(CRBState, CRB, #define CRB_INTF_CAP_CRB_CHUNK 0b1 =20 #define CRB_CTRL_CMD_SIZE (TPM_CRB_ADDR_SIZE - A_CRB_DATA_BUFFER) +#define TPM_HEADER_SIZE 10 =20 enum crb_loc_ctrl { CRB_LOC_CTRL_REQUEST_ACCESS =3D BIT(0), @@ -81,6 +83,8 @@ enum crb_ctrl_req { =20 enum crb_start { CRB_START_INVOKE =3D BIT(0), + CRB_START_RSP_RETRY =3D BIT(1), + CRB_START_NEXT_CHUNK =3D BIT(2), }; =20 enum crb_cancel { @@ -123,6 +127,69 @@ static uint8_t tpm_crb_get_active_locty(CRBState *s) return ARRAY_FIELD_EX32(s->regs, CRB_LOC_STATE, activeLocality); } =20 +static bool tpm_crb_append_command_request(CRBState *s) +{ + /* + * The linux guest writes the TPM command to the MMIO region in chunks. + * This function appends a chunk from the MMIO region to internal + * command_buffer. + */ + void *mem =3D memory_region_get_ram_ptr(&s->cmdmem); + uint32_t to_copy =3D 0; + uint32_t total_request_size =3D 0; + + /* + * The initial call extracts the total TPM command size + * from its header. For the subsequent calls, the data already + * appended in the command_buffer is used to calculate the total + * size, as its header stays the same. + */ + if (s->command_buffer->len =3D=3D 0) { + total_request_size =3D tpm_cmd_get_size(mem); + if (total_request_size < TPM_HEADER_SIZE) { + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_STS, tpmSts, 1); + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, Start, 0); + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, nextChunk, 0); + tpm_crb_clear_internal_buffers(s); + error_report("Command size %" PRIu32 " less than " + "TPM header size %" PRIu32, + total_request_size, (uint32_t)TPM_HEADER_SIZE); + return false; + } + } else { + total_request_size =3D tpm_cmd_get_size(s->command_buffer->data); + } + total_request_size =3D MIN(total_request_size, s->be_buffer_size); + + if (total_request_size > s->command_buffer->len) { + uint32_t remaining =3D total_request_size - s->command_buffer->len; + to_copy =3D MIN(remaining, CRB_CTRL_CMD_SIZE); + g_byte_array_append(s->command_buffer, (guint8 *)mem, to_copy); + } + return true; +} + +static void tpm_crb_fill_command_response(CRBState *s) +{ + /* + * Response from the tpm backend will be stored in the internal + * response_buffer. This function will serve that accumulated response + * to the linux guest in chunks by writing it back to MMIO region. + */ + void *mem =3D memory_region_get_ram_ptr(&s->cmdmem); + uint32_t remaining =3D s->response_buffer->len - s->response_offset; + uint32_t to_copy =3D MIN(CRB_CTRL_CMD_SIZE, remaining); + + memcpy(mem, s->response_buffer->data + s->response_offset, to_copy); + + if (to_copy < CRB_CTRL_CMD_SIZE) { + memset((guint8 *)mem + to_copy, 0, CRB_CTRL_CMD_SIZE - to_copy); + } + + s->response_offset +=3D to_copy; + memory_region_set_dirty(&s->cmdmem, 0, CRB_CTRL_CMD_SIZE); +} + static void tpm_crb_mmio_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { @@ -153,20 +220,58 @@ static void tpm_crb_mmio_write(void *opaque, hwaddr a= ddr, } break; case A_CRB_CTRL_START: - if (val =3D=3D CRB_START_INVOKE && - !(s->regs[R_CRB_CTRL_START] & CRB_START_INVOKE) && - tpm_crb_get_active_locty(s) =3D=3D locty) { - void *mem =3D memory_region_get_ram_ptr(&s->cmdmem); - + if (tpm_crb_get_active_locty(s) !=3D locty) { + break; + } + if (s->regs[R_CRB_CTRL_START] & CRB_START_INVOKE) { + /* + * Backend TPM is busy processing a request. + */ + break; + } + if (val & CRB_START_INVOKE) { + if (!tpm_crb_append_command_request(s)) { + break; + } ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, Start, 1); + g_byte_array_set_size(s->response_buffer, s->be_buffer_size); s->cmd =3D (TPMBackendCmd) { - .in =3D mem, - .in_len =3D MIN(tpm_cmd_get_size(mem), s->be_buffer_size), - .out =3D mem, - .out_len =3D s->be_buffer_size, + .in =3D s->command_buffer->data, + .in_len =3D s->command_buffer->len, + .out =3D s->response_buffer->data, + .out_len =3D s->response_buffer->len, }; - tpm_backend_deliver_request(s->tpmbe, &s->cmd); + } else if (val & CRB_START_NEXT_CHUNK) { + if (!s->cap_chunk) { + break; + } + /* + * nextChunk is used both while sending and receiving data. + * To distinguish between the two, response_buffer is checked. + * If it does not have data, then that means we have not yet + * sent the command to the tpm backend, and therefore call + * tpm_crb_append_command_request(). + */ + if (s->response_buffer->len > 0 && + s->response_offset < s->response_buffer->len) { + tpm_crb_fill_command_response(s); + } else { + if (!tpm_crb_append_command_request(s)) { + break; + } + } + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, nextChunk, 0); + } else if (val & CRB_START_RSP_RETRY) { + if (!s->cap_chunk) { + break; + } + if (s->response_buffer->len > 0) { + s->response_offset =3D 0; + tpm_crb_fill_command_response(s); + } + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, crbRspRetry, 0); + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, nextChunk, 0); } break; case A_CRB_LOC_CTRL: @@ -211,8 +316,21 @@ static void tpm_crb_request_completed(TPMIf *ti, int r= et) if (ret !=3D 0) { ARRAY_FIELD_DP32(s->regs, CRB_CTRL_STS, tpmSts, 1); /* fatal error */ + tpm_crb_clear_internal_buffers(s); + } else { + uint32_t actual_resp_size =3D tpm_cmd_get_size(s->response_buffer-= >data); + uint32_t total_resp_size =3D MIN(actual_resp_size, s->be_buffer_si= ze); + g_byte_array_set_size(s->response_buffer, total_resp_size); + s->response_offset =3D 0; } - memory_region_set_dirty(&s->cmdmem, 0, CRB_CTRL_CMD_SIZE); + /* + * Send the first chunk. Subsequent chunks will be sent + * on receiving nextChunk from the guest + */ + tpm_crb_fill_command_response(s); + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, nextChunk, 0); + ARRAY_FIELD_DP32(s->regs, CRB_CTRL_START, crbRspRetry, 0); + g_byte_array_set_size(s->command_buffer, 0); } =20 static enum TPMVersion tpm_crb_get_version(TPMIf *ti) @@ -287,8 +405,7 @@ static void tpm_crb_reset(void *dev) s->regs[R_CRB_CTRL_RSP_SIZE] =3D CRB_CTRL_CMD_SIZE; s->regs[R_CRB_CTRL_RSP_ADDR] =3D TPM_CRB_ADDR_BASE + A_CRB_DATA_BUFFER; =20 - s->be_buffer_size =3D MIN(tpm_backend_get_buffer_size(s->tpmbe), - CRB_CTRL_CMD_SIZE); + s->be_buffer_size =3D tpm_backend_get_buffer_size(s->tpmbe); =20 if (tpm_backend_startup_tpm(s->tpmbe, s->be_buffer_size) < 0) { exit(1); --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350979847154100 From: Arun Menon - New test case added to the swtpm test. Data is written and read from the buffer in chunks. - The chunk size is dynamically calculated by reading the CRB_CTRL_CMD_SIZE address. This can be changed manually to test. - Add a helper function tpm_wait_till_bit_clear() - Note that this commit does not yet exercise the chunked read/write logic, as current transfer sizes remain small. Testing for large transfers is introduced in a subsequent patch: 'tests: Use ML-DSA-87 operations to cause large TPM transfers with CRB' Signed-off-by: Arun Menon Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Stefan Berger Link: https://lore.kernel.org/qemu-devel/20260506075813.120781-6-armenon@re= dhat.com Signed-off-by: Stefan Berger --- tests/qtest/tpm-crb-swtpm-test.c | 10 +++ tests/qtest/tpm-util.c | 109 ++++++++++++++++++++++++++----- tests/qtest/tpm-util.h | 5 ++ 3 files changed, 109 insertions(+), 15 deletions(-) diff --git a/tests/qtest/tpm-crb-swtpm-test.c b/tests/qtest/tpm-crb-swtpm-t= est.c index ffeb1c396b..050c7b0c1f 100644 --- a/tests/qtest/tpm-crb-swtpm-test.c +++ b/tests/qtest/tpm-crb-swtpm-test.c @@ -33,6 +33,14 @@ static void tpm_crb_swtpm_test(const void *data) "tpm-crb", NULL); } =20 +static void tpm_crb_chunk_swtpm_test(const void *data) +{ + const TestState *ts =3D data; + + tpm_test_swtpm_test(ts->src_tpm_path, tpm_util_crb_chunk_transfer, + "tpm-crb", NULL); +} + static void tpm_crb_swtpm_migration_test(const void *data) { const TestState *ts =3D data; @@ -54,6 +62,8 @@ int main(int argc, char **argv) g_test_init(&argc, &argv, NULL); =20 qtest_add_data_func("/tpm/crb-swtpm/test", &ts, tpm_crb_swtpm_test); + qtest_add_data_func("/tpm/crb-chunk-swtpm/test", &ts, + tpm_crb_chunk_swtpm_test); qtest_add_data_func("/tpm/crb-swtpm-migration/test", &ts, tpm_crb_swtpm_migration_test); ret =3D g_test_run(); diff --git a/tests/qtest/tpm-util.c b/tests/qtest/tpm-util.c index 0f9bef8971..151002ea24 100644 --- a/tests/qtest/tpm-util.c +++ b/tests/qtest/tpm-util.c @@ -14,16 +14,44 @@ =20 #include "qemu/osdep.h" #include +#include "qemu/bswap.h" =20 #include "hw/acpi/tpm.h" #include "libqtest.h" #include "tpm-util.h" #include "qobject/qdict.h" =20 +#define CRB_ADDR_START (TPM_CRB_ADDR_BASE + A_CRB_CTRL_START) +#define CRB_ADDR_CTRL_STS (TPM_CRB_ADDR_BASE + A_CRB_CTRL_STS) +#define CRB_ADDR_CTRL_CMD_SIZE \ + (TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_SIZE) + +#define CRB_START_INVOKE (1 << 0) +#define CRB_START_RSP_RETRY (1 << 1) +#define CRB_START_NEXT_CHUNK (1 << 2) + +void tpm_wait_till_bit_clear(QTestState *s, uint64_t addr, uint32_t mask) +{ + uint32_t sts; + uint64_t end_time =3D g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND; + + while (true) { + sts =3D qtest_readl(s, addr); + if ((sts & mask) =3D=3D 0) { + break; + } + if (g_get_monotonic_time() >=3D end_time) { + g_assert_cmphex(sts & mask, =3D=3D, 0); + break; + } + } +} + void tpm_util_crb_transfer(QTestState *s, const unsigned char *req, size_t req_size, unsigned char *rsp, size_t rsp_size) { + uint32_t tpm_sts; uint64_t caddr =3D qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_L= ADDR); uint64_t raddr =3D qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_A= DDR); =20 @@ -31,24 +59,75 @@ void tpm_util_crb_transfer(QTestState *s, =20 qtest_memwrite(s, caddr, req, req_size); =20 - uint32_t sts, start =3D 1; - uint64_t end_time =3D g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND; - qtest_writel(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_START, start); - while (true) { - start =3D qtest_readl(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_START); - if ((start & 1) =3D=3D 0) { - break; + qtest_writel(s, CRB_ADDR_START, CRB_START_INVOKE); + tpm_wait_till_bit_clear(s, CRB_ADDR_START, CRB_START_INVOKE); + + tpm_sts =3D qtest_readl(s, CRB_ADDR_CTRL_STS); + g_assert_cmpint(tpm_sts & 1, =3D=3D, 0); + + qtest_memread(s, raddr, rsp, rsp_size); +} + +void tpm_util_crb_chunk_transfer(QTestState *s, + const unsigned char *req, size_t req_size, + unsigned char *rsp, size_t rsp_size) +{ + uint32_t tpm_sts; + size_t chunk_size; + unsigned char header[10]; + uint32_t actual_response_size =3D 0; + + uint64_t caddr =3D qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_L= ADDR); + uint64_t raddr =3D qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_A= DDR); + uint32_t crb_ctrl_cmd_size =3D qtest_readl(s, CRB_ADDR_CTRL_CMD_SIZE); + + chunk_size =3D crb_ctrl_cmd_size; + + qtest_writeb(s, TPM_CRB_ADDR_BASE + A_CRB_LOC_CTRL, 1); + + for (size_t i =3D 0; i < req_size; i +=3D chunk_size) { + bool last_chunk =3D false; + size_t current_chunk_size =3D chunk_size; + + if (i + chunk_size > req_size) { + last_chunk =3D true; + current_chunk_size =3D req_size - i; } - if (g_get_monotonic_time() >=3D end_time) { - break; + + qtest_memwrite(s, caddr, req + i, current_chunk_size); + + if (last_chunk) { + qtest_writel(s, CRB_ADDR_START, CRB_START_INVOKE); + tpm_wait_till_bit_clear(s, CRB_ADDR_START, CRB_START_INVOKE); + } else { + qtest_writel(s, CRB_ADDR_START, CRB_START_NEXT_CHUNK); + tpm_wait_till_bit_clear(s, CRB_ADDR_START, CRB_START_NEXT_CHUN= K); } - }; - start =3D qtest_readl(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_START); - g_assert_cmpint(start & 1, =3D=3D, 0); - sts =3D qtest_readl(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_STS); - g_assert_cmpint(sts & 1, =3D=3D, 0); + } + tpm_sts =3D qtest_readl(s, CRB_ADDR_CTRL_STS); + g_assert_cmpint(tpm_sts & 1, =3D=3D, 0); =20 - qtest_memread(s, raddr, rsp, rsp_size); + /* + * Read response in chunks + */ + + qtest_memread(s, raddr, header, sizeof(header)); + actual_response_size =3D ldl_be_p(&header[2]); + + if (actual_response_size > rsp_size) { + actual_response_size =3D rsp_size; + } + + for (size_t i =3D 0; i < actual_response_size; i +=3D chunk_size) { + size_t to_read =3D i + chunk_size > actual_response_size + ? actual_response_size - i + : chunk_size; + if (i > 0) { + qtest_writel(s, CRB_ADDR_START, CRB_START_NEXT_CHUNK); + tpm_wait_till_bit_clear(s, CRB_ADDR_START, CRB_START_NEXT_CHUN= K); + } + qtest_memread(s, raddr, rsp + i, to_read); + } } =20 void tpm_util_startup(QTestState *s, tx_func *tx) diff --git a/tests/qtest/tpm-util.h b/tests/qtest/tpm-util.h index 0cb28dd6e5..681544e7d8 100644 --- a/tests/qtest/tpm-util.h +++ b/tests/qtest/tpm-util.h @@ -24,10 +24,15 @@ typedef void (tx_func)(QTestState *s, const unsigned char *req, size_t req_size, unsigned char *rsp, size_t rsp_size); =20 +void tpm_wait_till_bit_clear(QTestState *s, uint64_t addr, uint32_t mask); void tpm_util_crb_transfer(QTestState *s, const unsigned char *req, size_t req_size, unsigned char *rsp, size_t rsp_size); =20 +void tpm_util_crb_chunk_transfer(QTestState *s, + const unsigned char *req, size_t req_size, + unsigned char *rsp, size_t rsp_size); + void tpm_util_startup(QTestState *s, tx_func *tx); void tpm_util_pcrextend(QTestState *s, tx_func *tx); void tpm_util_pcrread(QTestState *s, tx_func *tx, --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350969; cv=none; d=zohomail.com; s=zohoarc; b=QcnkjCS9heOilH9FtTbUKV0ShKlYF32JtUfDWx/l0EZCfRC0L3bgMBTMJPKPdW+GAlLPIpUPBRpUesoX9NA4JHNgofUc1nWr6+J7G+ZoSW4qK0F+xJ0NBgBQDhPpr6UmFLEMwvirKvoCisDDhtFKTf/LDiSb28IMD5/BtRuKRcs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1780350969; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=stefanb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350971419158500 Content-Type: text/plain; charset="utf-8" From: Arun Menon - Add subsection in VMState for TPM CRB with the newly introduced command and response buffer GByteArrays, along with a needed callback, so that newer QEMU only sends the buffers if it is necessary. - Implement a migration blocker to prevent migration of the VM if the user manually enables chunking capability, cap-chunk, but the machine type does not support it, using a new hw_compat property called allow_chunk_migration. - Add a post_load_errp hook so that during a migration, the buffers are validated before destination VM is started. Signed-off-by: Arun Menon Reviewed-by: Stefan Berger Link: https://lore.kernel.org/qemu-devel/20260506075813.120781-7-armenon@re= dhat.com Signed-off-by: Stefan Berger --- hw/core/machine.c | 1 + hw/tpm/tpm_crb.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index 00eb3432a7..17970b78b6 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -42,6 +42,7 @@ GlobalProperty hw_compat_11_0[] =3D { { "chardev-vc", "encoding", "cp437" }, { "tpm-crb", "cap-chunk", "off" }, + { "tpm-crb", "x-allow-chunk-migration", "off" }, }; const size_t hw_compat_11_0_len =3D G_N_ELEMENTS(hw_compat_11_0); =20 diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index f85df08185..54fa2042b5 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -24,6 +24,7 @@ #include "hw/pci/pci_ids.h" #include "hw/acpi/tpm.h" #include "migration/vmstate.h" +#include "migration/blocker.h" #include "system/tpm_backend.h" #include "system/tpm_util.h" #include "system/reset.h" @@ -50,6 +51,8 @@ struct CRBState { TPMPPI ppi; =20 bool cap_chunk; + bool allow_chunk_migration; + Error *migration_blocker; }; typedef struct CRBState CRBState; =20 @@ -349,18 +352,68 @@ static int tpm_crb_pre_save(void *opaque) return 0; } =20 +static bool tpm_crb_chunk_needed(void *opaque) +{ + CRBState *s =3D opaque; + + if (!s->allow_chunk_migration) { + return false; + } + + return ((s->command_buffer && s->command_buffer->len > 0) || + (s->response_buffer && s->response_buffer->len > 0)); +} + +static bool tpm_crb_chunk_post_load(void *opaque, int version_id, Error **= errp) +{ + CRBState *s =3D opaque; + + /* + * The external TPM emulator (example swtpm) determines the backend + * buffer capacity (s->be_buffer_size). This check ensures that if we + * migrate from a source with a PQC-enabled emulator that supports + * larger buffers to a destination with a non-PQC emulator, the + * migrated data does not exceed the destination's capacity. + */ + if (s->response_buffer->len > s->be_buffer_size || + s->command_buffer->len > s->be_buffer_size) { + error_setg(errp, "tpm-crb: Buffer sizes exceed backend capacity"); + return false; + } + return true; +} + +static const VMStateDescription vmstate_tpm_crb_chunk =3D { + .name =3D "tpm-crb/chunk", + .version_id =3D 0, + .needed =3D tpm_crb_chunk_needed, + .post_load_errp =3D tpm_crb_chunk_post_load, + .fields =3D (const VMStateField[]) { + VMSTATE_GBYTEARRAY(command_buffer, CRBState, 0), + VMSTATE_GBYTEARRAY(response_buffer, CRBState, 0), + VMSTATE_UINT32(response_offset, CRBState), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_tpm_crb =3D { .name =3D "tpm-crb", .pre_save =3D tpm_crb_pre_save, .fields =3D (const VMStateField[]) { VMSTATE_UINT32_ARRAY(regs, CRBState, TPM_CRB_R_MAX), VMSTATE_END_OF_LIST(), + }, + .subsections =3D (const VMStateDescription * const []) { + &vmstate_tpm_crb_chunk, + NULL, } }; =20 static const Property tpm_crb_properties[] =3D { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), DEFINE_PROP_BOOL("cap-chunk", CRBState, cap_chunk, true), + DEFINE_PROP_BOOL("x-allow-chunk-migration", CRBState, + allow_chunk_migration, true), }; =20 static void tpm_crb_reset(void *dev) @@ -415,6 +468,7 @@ static void tpm_crb_reset(void *dev) static void tpm_crb_realize(DeviceState *dev, Error **errp) { CRBState *s =3D CRB(dev); + int ret; =20 if (!tpm_find()) { error_setg(errp, "at most one TPM device is permitted"); @@ -424,6 +478,15 @@ static void tpm_crb_realize(DeviceState *dev, Error **= errp) error_setg(errp, "'tpmdev' property is required"); return; } + if (s->cap_chunk && !s->allow_chunk_migration) { + error_setg(&s->migration_blocker, + "The tpm-crb device does not support chunk migration wi= th " + "machine version less than 11.1"); + ret =3D migrate_add_blocker_normal(&s->migration_blocker, errp); + if (ret < 0) { + return; + } + } =20 memory_region_init_io(&s->mmio, OBJECT(s), &tpm_crb_memory_ops, s, "tpm-crb-mmio", sizeof(s->regs)); @@ -454,6 +517,10 @@ static void tpm_crb_unrealize(DeviceState *dev) =20 g_clear_pointer(&s->command_buffer, g_byte_array_unref); g_clear_pointer(&s->response_buffer, g_byte_array_unref); + + if (s->migration_blocker) { + migrate_del_blocker(&s->migration_blocker); + } } =20 static void tpm_crb_class_init(ObjectClass *klass, const void *data) --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350903; cv=none; d=zohomail.com; s=zohoarc; b=AZd+ZkGR3SRZQj9aGNuWpaV85YjFfAKTepZSA/CAPoujZpcAgVNKMFGtfNDzRdpg1cPji0QbjTjLqLr8BRfg6+OUahVp+uOxbJPT7wO/4UbDrKvcPPfwYWLDGU+94nSVwalNAPnzz0oxoDz8U2j1/UGKflJnxUkfuucuv2XPU6w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=stefanb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350905298158500 When the TIS, SPAPR, or CRB frontends negotiate a buffer size with the TPM backend, then the tpm_emulator (swtpm) could still adjust this size of the buffer to within bounds supported by swtpm+libtpms if the chosen size was outside the acceptable range. This could theoretically lead to the TPM 2 using a bigger buffer than what was requested and memory allocated for. In practice this would not happend since the requested size of 4096 bytes for TIS and SPAPR and 3968 bytes for CRB happen in the (currently) supported range of ~2.5kb to 4096 bytes. With PQC support the range will have an upper bound of 8kb and a lower bound that will support the (pre-PQC) CRB with 3968 bytes. Fixes: 9375c44fdfc0 ("tpm: tpm_emulator: get and set buffer size of device") Reviewed-by: Marc-Andr=C3=A9 Lureau Link: https://lore.kernel.org/qemu-devel/20260511142219.797048-2-stefanb@li= nux.ibm.com Signed-off-by: Stefan Berger --- backends/tpm/tpm_emulator.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/backends/tpm/tpm_emulator.c b/backends/tpm/tpm_emulator.c index 75c33d290e..ac5427b84e 100644 --- a/backends/tpm/tpm_emulator.c +++ b/backends/tpm/tpm_emulator.c @@ -364,6 +364,7 @@ static int tpm_emulator_set_buffer_size(TPMBackend *tb, { TPMEmulator *tpm_emu =3D TPM_EMULATOR(tb); ptm_setbuffersize psbs; + size_t tpm_buffersize; =20 if (tpm_emulator_stop_tpm(tb, errp) < 0) { return -1; @@ -387,8 +388,18 @@ static int tpm_emulator_set_buffer_size(TPMBackend *tb, return -1; } =20 + tpm_buffersize =3D be32_to_cpu(psbs.u.resp.buffersize); + /* Reject different buffer size used by the TPM than what was requeste= d. */ + if (wanted_size !=3D 0 && wanted_size !=3D tpm_buffersize) { + error_setg(errp, + "tpm-emulator: TPM did not accept the requested buffer = size " + "of %zu bytes but adjusted it to %zu bytes", + wanted_size, tpm_buffersize); + return -1; + } + if (actual_size) { - *actual_size =3D be32_to_cpu(psbs.u.resp.buffersize); + *actual_size =3D tpm_buffersize; } =20 trace_tpm_emulator_set_buffer_size( --=20 2.54.0 From nobody Mon Jun 8 05:26:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1780350969; cv=none; d=zohomail.com; s=zohoarc; b=PzxoHaNWv4Wml/euE7oQeRdP8/92SKY1kL1GitaCy9ofVIUvzDx+TCpCsyn7Qd9Rz9YH533bN2+9UhSG74J3VF5js6Q7gkd0theZO782V7xWyMbY7sDbMtFddUSK5dX+KMnfBZ8OJCPdXtCWzzQdC6d9mhL/jU83U2tzTevPEOA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1780350969; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=stefanb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1780350971640154100 Disconnect from the emulator if a response was to exceed the negotiated buffer size. The TPM TIS and SPAPR use 4096 bytes and the CRB 3968 bytes. There are currently no TPM 2 responses using this size of a buffer and therefore no response will be sent that is exceeding this size. Fixes: f4ede81eed29 ("tpm: Added support for TPM emulator") Reviewed-by: Marc-Andr=C3=A9 Lureau Link: https://lore.kernel.org/qemu-devel/20260511142219.797048-3-stefanb@li= nux.ibm.com Signed-off-by: Stefan Berger --- backends/tpm/tpm_emulator.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/backends/tpm/tpm_emulator.c b/backends/tpm/tpm_emulator.c index ac5427b84e..95d2de2f48 100644 --- a/backends/tpm/tpm_emulator.c +++ b/backends/tpm/tpm_emulator.c @@ -176,8 +176,10 @@ static int tpm_emulator_unix_tx_bufs(TPMEmulator *tpm_= emu, bool *selftest_done, Error **errp) { - ssize_t ret; bool is_selftest =3D false; + Error *local_err =3D NULL; + uint32_t to_read; + ssize_t ret; =20 if (selftest_done) { *selftest_done =3D false; @@ -195,9 +197,25 @@ static int tpm_emulator_unix_tx_bufs(TPMEmulator *tpm_= emu, return -1; } =20 + /* + * Size of response from emulator must be <=3D out_len (=3D negotiated= buffer + * size) + */ + to_read =3D tpm_cmd_get_size(out); + if (to_read > out_len) { + if (qio_channel_shutdown(tpm_emu->data_ioc, QIO_CHANNEL_SHUTDOWN_B= OTH, + &local_err) < 0) { + error_report_err(local_err); + } + error_setg(errp, "tpm-emulator: Disconnected after receiving " + "unacceptable large response (%u > %u)", + to_read, out_len); + return -1; + } + ret =3D qio_channel_read_all(tpm_emu->data_ioc, (char *)out + sizeof(struct tpm_resp_hdr), - tpm_cmd_get_size(out) - sizeof(struct tpm_resp_hdr), errp); + to_read - sizeof(struct tpm_resp_hdr), errp); if (ret !=3D 0) { return -1; } --=20 2.54.0