From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386821; cv=none; d=zohomail.com; s=zohoarc; b=T/XqOmxl5/e3+FUhZ8QD8E/uJ6x0krBR2d89IqqdKFz7yuDWKhCGhTAa5D0WTC+B2fOYRJONe9Fz2Rd1tqDgnDfnEXrDFjmb8FSKbz8YUgSdoPDU7xgJKqmLbhIpjDWpdgozX95w4PVqj6ATBdbnrWyGPeYIzS+xGRzVBOFRBQU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386821; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=JKF4Q/fd29mnWV/NByXIaIABCsq7UsmokkILVWMv7cY=; b=btXd2vFKNL0T+Ygc6e3Gj+p9C62cwTOv8oPfSeMJHZ5QB0jp+SJtu5EHsOL+4h2ZOhleEWJCl+cVFdKDw1bBNKsnP/Y3ebuXJB1O01dBh1+r3rTbdslj743x/j6lpj+AcBAMIZ0jdP0uOSZ+T2qGE9CSZupBusnqBO0AcNEUnsc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386821180682.2060707727788; Thu, 21 May 2026 11:07:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mq-00009k-9R; Thu, 21 May 2026 14:06:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mo-00009V-Oe for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:22 -0400 Received: from mail-ot1-x336.google.com ([2607:f8b0:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7ml-00021N-Sr for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:22 -0400 Received: by mail-ot1-x336.google.com with SMTP id 46e09a7af769-7d4c383f2fcso5599107a34.0 for ; Thu, 21 May 2026 11:06:19 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386778; x=1779991578; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JKF4Q/fd29mnWV/NByXIaIABCsq7UsmokkILVWMv7cY=; b=WSwDWG1ev37VguntIrpg4cNFNtXGKUZ7mdc/cAGJDysycIV/YNcM4JJDAPsS/p5Nlc UXvj3acvwKP/yuqfdVqqRvMwUZjT++GtCTKdpV5ucw05MWtHruO1MSUclehvoCvNh1y1 OvIDOpupSH55uhaMbxR3SGhqTdzsAdqFoTiYOBpueCfHg2NHHj6weapuq3wFS0Svtrda AQvVnm0w2g2q9/j4ixNvQSO8uDKvWhnPJ8PqTIvO6RKfvgczabYLWmXF78jksCoWuPzQ GamYR42AKPBZ7IbXAg9K6PG/cQVnPHUJmBFduGPA6o7siI+YmkHHYpXDgXZnGEx+4hNu 08uA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386778; x=1779991578; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=JKF4Q/fd29mnWV/NByXIaIABCsq7UsmokkILVWMv7cY=; b=qvtw7A2vvx05pqQlCgTv/FVUnnQ1r6bVKZIMJIlqaTDESMk5ULqXgRAR5aH3tyXIXi yPXukj1AWKU3olF2IEZf4ijBWN7+5/wtI2pVQKmJjSkz+FwNthCz/24vtNcHWmTc0g0j 6o6pyGLGtgShWeJ6KgGJluYp9m2L7vjHH6wZjz4cZKRFDXz6Hyfo5wVynThAQ3cA97iM GDKhIxnOyT1Q942nxjNVPjjcWU0XPbIcrhyCnpbvHrduKBF86bhQHTZBwmyHneU+h5pl cvK0GgJL6ikzwUdaY0Qm/cR11Y1Yiq6Idq48bt/DCEdbDFaeFndl1eIwVGn+idOeKToT d0CQ== X-Gm-Message-State: AOJu0Yx3N6bKYaRb/m8TaFvAYT/jQOQnwA0UyuLv8LTM2kiJHYeFXp+n WAY9s9LMsqEZDRpgcaSqlg2aX9zW7ibCPghG0DKC/VjLdz6Rp7wGXo4x X-Gm-Gg: Acq92OG/QHj1GBIsaLdKST+o6O2KY30Cyskp38KddT9Sf1+r8fLU8jXcCchYaWZZYgg NQlc7P8sKZe/TgPhjHKZuDI1vtEkuH9GNxVdUfgUcJ/jj4KmEbNCoSw/IF465e8KrO7g+V9haB7 Z5PiPrSTaHIV45E3BO6NSq4fAkWum17rMZVmf7vcGvlE2lm+PpxfFfPjSV0lvjYvZUEEgsEAC+K v1Wzpfqjd/5O/YvYV6mHEwEU5nVHzV//dHwsQr35YSXXUM3ScVVBHjQfGpipTgQL07QLFXgU7Sr ZCK0jZH18Qac/X/HONwvzgH4woqWJk+8jzImoJVsf0JGNUz3V4cievbhuEJoo88wl+fsxuNAc1+ qJcjWuwrlcMUZsyxW5FwgekLGubpOw6MSob4Yg75SPPyc0WagjPRzTf8mZePvFHyd0Wy1ELTp/Y /CSP4eGlVX3o2BI9zyji8MhYerFwDtOja5RtEzIrM0rQu0HNVuwf5mY/v2OCGrQhRzR8PTsnQw2 wLImyi25ZBtDHWDCSRYSI8Xg8ZOY7Jgb/Oa+R70uyEyBDzQG6ZHboUlaekocOXcFv1d6Bo0qJo4 beg= X-Received: by 2002:a05:6830:3c88:b0:7dc:d967:63de with SMTP id 46e09a7af769-7e5feded159mr171189a34.3.1779386778379; Thu, 21 May 2026 11:06:18 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:05:54 -0600 Subject: [PATCH v13 01/22] tcg: Optimize INDEX_op_mul[us]2 for 0 and 1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-1-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x336.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386825062154100 From: Richard Henderson Zero operands produce a zero high and low product. One operands produce a copy of the other operand and a zero or sign extension in the high half. Fold those cases during TCG optimization so wide-multiply idioms used by target translators can collapse before code generation. Signed-off-by: Richard Henderson --- Changes v9 -> v10: - Restore the original constant-fold output ordering. Changes v7 -> v8: - New patch from Richard Henderson's v7.5 multiplier rework. --- tcg/optimize.c | 92 ++++++++++++++++++++++++++++++++++++++----------------= ---- 1 file changed, 60 insertions(+), 32 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index b1abec69a5..fcdef25bee 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -2173,45 +2173,73 @@ static bool fold_multiply2(OptContext *ctx, TCGOp *= op) { swap_commutative(op->args[0], &op->args[2], &op->args[3]); =20 - if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) { - uint64_t a =3D arg_const_val(op->args[2]); + if (arg_is_const(op->args[3])) { uint64_t b =3D arg_const_val(op->args[3]); - uint64_t h, l; - TCGArg rl, rh; + TCGArg rl =3D op->args[0]; + TCGArg rh =3D op->args[1]; TCGOp *op2; =20 - switch (op->opc) { - case INDEX_op_mulu2: - if (ctx->type =3D=3D TCG_TYPE_I32) { - l =3D (uint64_t)(uint32_t)a * (uint32_t)b; - h =3D (int32_t)(l >> 32); - l =3D (int32_t)l; - } else { - mulu64(&l, &h, a, b); - } - break; - case INDEX_op_muls2: - if (ctx->type =3D=3D TCG_TYPE_I32) { - l =3D (int64_t)(int32_t)a * (int32_t)b; - h =3D l >> 32; - l =3D (int32_t)l; - } else { - muls64(&l, &h, a, b); + if (arg_is_const(op->args[2])) { + uint64_t a =3D arg_const_val(op->args[2]); + uint64_t h, l; + + switch (op->opc) { + case INDEX_op_mulu2: + if (ctx->type =3D=3D TCG_TYPE_I32) { + l =3D (uint64_t)(uint32_t)a * (uint32_t)b; + h =3D (int32_t)(l >> 32); + l =3D (int32_t)l; + } else { + mulu64(&l, &h, a, b); + } + break; + case INDEX_op_muls2: + if (ctx->type =3D=3D TCG_TYPE_I32) { + l =3D (int64_t)(int32_t)a * (int32_t)b; + h =3D l >> 32; + l =3D (int32_t)l; + } else { + muls64(&l, &h, a, b); + } + break; + default: + g_assert_not_reached(); } - break; - default: - g_assert_not_reached(); - } =20 - rl =3D op->args[0]; - rh =3D op->args[1]; + /* The proper opcode is supplied by tcg_opt_gen_mov. */ + op2 =3D opt_insert_before(ctx, op, 0, 2); + tcg_opt_gen_movi(ctx, op, rl, l); + tcg_opt_gen_movi(ctx, op2, rh, h); + return true; + } =20 - /* The proper opcode is supplied by tcg_opt_gen_mov. */ - op2 =3D opt_insert_before(ctx, op, 0, 2); + if (b =3D=3D 0) { + op2 =3D opt_insert_before(ctx, op, 0, 2); + tcg_opt_gen_movi(ctx, op2, rl, 0); + tcg_opt_gen_movi(ctx, op, rh, 0); + return true; + } + if (b =3D=3D 1) { + op2 =3D opt_insert_before(ctx, op, 0, 2); + tcg_opt_gen_mov(ctx, op2, rl, op->args[2]); + + switch (op->opc) { + case INDEX_op_mulu2: + tcg_opt_gen_movi(ctx, op, rh, 0); + break; + case INDEX_op_muls2: + op->opc =3D INDEX_op_sar; + op->args[0] =3D rh; + op->args[1] =3D rl; + op->args[2] =3D + arg_new_constant(ctx, tcg_type_size(ctx->type) * 8 - 1= ); + break; + default: + g_assert_not_reached(); + } =20 - tcg_opt_gen_movi(ctx, op, rl, l); - tcg_opt_gen_movi(ctx, op2, rh, h); - return true; + return true; + } } return finish_folding(ctx, op); } --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386997; cv=none; d=zohomail.com; s=zohoarc; b=mZgUAjdRAe318xQUyJyaKivggzAD4FYpAqZ4k4lxKXZUU9Sjov70wEcvfmu0OPGinkX92l7wGSLYB/Ef4PkaeFD1a3KVK+6iSbopFySL9VwMXhQBUV/G/ZhXjvTBWyJx6edlzl6rB/FHHf/UU2CZa6lYQEI/4JKvVQQDOg40u2A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386997; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=EILNJa0yUe4vu/jVP2tQvk3t8HMPaGDQ29ybHk5m3Xw=; b=Y+FfFPKzl4QisNmH2KiVskTw+rMZH5eIhKQAlqB/mADEkIprr6RLBs5RCyUdCbCU/FW0oHx2895nwMurjIRwKqGOJqx0wZR+MIhWk4tXzTXsqe/yNCBdl8Bk8uuTGfR7pEDK4XVxmq2rmZ1ROhq87PjNooKVWlmdyq8kYqKBYnI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386997054980.2755530146295; Thu, 21 May 2026 11:09:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mx-0000Cb-2M; Thu, 21 May 2026 14:06:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mq-00009t-AE for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:24 -0400 Received: from mail-oi1-x236.google.com ([2607:f8b0:4864:20::236]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mn-00021b-4d for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:23 -0400 Received: by mail-oi1-x236.google.com with SMTP id 5614622812f47-479dd56d016so5151587b6e.3 for ; Thu, 21 May 2026 11:06:20 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386779; x=1779991579; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EILNJa0yUe4vu/jVP2tQvk3t8HMPaGDQ29ybHk5m3Xw=; b=qC7b4LWSHU/quphDh+rYf1KgwtgLozwltk5nMEJSrV8BYOikyObK00lXDZIx/558sK Ei/zjXLEhZDrB/WDxjZQbpCW2c6OvKVXSfVqMVwmXhEVfTf6YMBOQ8cIaj5K0T56a1Pr 8gLh8cgBF9XVRep0QQ5osMkdRmzD6FQsPQwfliXyhzrx7ZRzGpBzj7M3BYFqY7u9arCc /KCsE144/J2i+YYAyO8FOzATWwKWbUmJnFc/BQRD24TtfJiSC8vwze5wzFDhjOT40wR3 XH7n3OR1Dkp+vbsZCB7kGSGfI4hfxe92maJoFzcFtz+lQgYlYO6t2A4nvdXTIMc5k1qf 97bA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386779; x=1779991579; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=EILNJa0yUe4vu/jVP2tQvk3t8HMPaGDQ29ybHk5m3Xw=; b=PjGt3eXzrvv2M1/VVx2raG15DoqvNORuLiLTsBrH2A0H7TMMM+Tpeh73V048Ew0TkZ 8KxpShW04HeLrc3oeKHVKIa/tL/RvxQRP7qe5twfw3QqTrBK+AxzZjaZZaK29SmPgCJq aYE9M4OzenuKe2DO4mgSQZf9WvYba5QmbpABh9dCOume0vVCr+FqF6wDQWGcMeYkTXVK Vfmn99iaMsxSS+ubk8H4bXfBHyrXoUkiyEFV3aDSEn1DHgktWsPbnTM1SnfDp/ys/9cW GunGC87ihhri3kbLBkKLsyonfoCP2Uqf005TKBG+nSSMb3BJAg2020ufa1s268hFk1WB WeoQ== X-Gm-Message-State: AOJu0YwoB0moD8zW4PsV5DF0NYLEJpjFqSC0vBnD3UM/QwTL+wWl/L2Z MXg7hYHDIBsLlnF0SQvtRJxNmAHYTa9uR65wcQImcLFdrdbV5q76vRBB X-Gm-Gg: Acq92OG8w7S1JBeyzH6zDq9Ya4TaZbl2Xa2SbUWkRYHX7VmUXUgLY/2s0Amp9qwhiPt IuFBGaP+WBGDkQgWvEHOPfsk4Wx7ayKIkYOhvBIbAMLkwfZ1XWR6jl1CbfB84PhG07sbHuRdX8g umBALpnN/OsJJbwTs4eb9/3ABzEMYyRnC0+/0PKxnDbJo6DGOQOy9gROSDVzFJRDr484StU3C4E S3PVyL2TFN5v20clQGStR95MDw6lqR6mTaxEdzk5XCKLGGBsYG+CgXh6Z9UXbnHrRNaDS5RIZYd H1zUFbP+sNIz5XxM+tLWYakaaykNxgnRsqrRWysbOSyg+LO1nFsFGG3ZhjWvVKLLu7A4O0dIe+T 1Dr88DPW/KrM+ai7XtrlnfEytqO5bX6k3P+kMY/ThNO331A1wu2T6oeHpOiB993SSk63bxE8MSF 1GR350jsWL+efAqa+nUp2mws8tGkV41PAjIAFgNCabkK6c9MA0JMt4w9Z6cjHuB8wZQd05lqsar wd9pQFWPCkUMIN/nhzjdodYObc4IMUhS7q6NFqT6tq5hIAAKmIGcUVM2FPXOh4uv/sV X-Received: by 2002:a05:6808:191d:b0:484:d5a3:996c with SMTP id 5614622812f47-4854a15d51bmr42082b6e.17.1779386779289; Thu, 21 May 2026 11:06:19 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:05:55 -0600 Subject: [PATCH v13 02/22] target/mips: add Octeon COP2 crypto state MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-2-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::236; envelope-from=james.hilliard1@gmail.com; helo=mail-oi1-x236.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386998700154101 Add the common architectural state needed by Octeon's selector-driven COP2 crypto interfaces. This includes storage for the base hash, AES, CRC, GFM, 3DES, KASUMI, and overlapping HSH/SHA512/SHA3/SNOW3G/ZUC selector windows. Keep selector values and helper-local aliasing logic out of the CPU state header so the state definition remains limited to architectural storage. Helper code uses the same register banks instead of adding non-architectural shadow state. Migrate the state in an Octeon-only subsection so non-Octeon CPU models do not grow migration data. Signed-off-by: James Hilliard Reviewed-by: Richard Henderson --- Changes v10 -> v13: - Keep reflected GFM selectors mapped onto the architectural GFM state from the start instead of adding temporary reflected shadow fields. Changes v9 -> v10: - Drop non-architectural shared-mode, AES input/result split, GFM XOR, and ZUC/SNOW3G shadow state. - Model HSH/SHA512/SHA3/SNOW3G/ZUC overlap with the architectural HSH DAT/IV register banks. - Store CRCLEN as the architectural 4-bit state. Changes v8 -> v9: - Remove the MIPSOcteonCop2Sel enum; selector values are decoded by decodetree or kept local to helper plumbing. - Leave only COP2 state and migration data in this patch. Changes v7 -> v8: - Split COP2 crypto state and migration coverage out of the combined COP2 crypto core patch. --- target/mips/cpu.h | 21 +++++++++++++++++++++ target/mips/system/machine.c | 27 +++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 346713705a..2dad7f538f 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -537,6 +537,25 @@ struct TCState { }; =20 struct MIPSITUState; +typedef struct MIPSOcteonCryptoState { + uint64_t hsh_dat[16]; + uint64_t hsh_iv[8]; + uint64_t sha3_dat24; + uint64_t des3_key[3]; + uint64_t des3_iv; + uint64_t des3_result; + uint64_t aes_resinp[2]; + uint64_t aes_iv[2]; + uint64_t aes_key[4]; + uint32_t crc_poly; + uint32_t crc_iv; + uint64_t gfm_mul[2]; + uint64_t gfm_resinp[2]; + uint16_t gfm_poly; + uint8_t aes_keylen; + uint8_t crc_len; +} MIPSOcteonCryptoState; + typedef struct CPUArchState { TCState active_tc; CPUMIPSFPUContext active_fpu; @@ -558,6 +577,8 @@ typedef struct CPUArchState { #define MSAIR_ProcID 8 #define MSAIR_Rev 0 =20 + MIPSOcteonCryptoState octeon_crypto; + /* * CP0 Register 0 */ diff --git a/target/mips/system/machine.c b/target/mips/system/machine.c index f988b3695b..77f576a25b 100644 --- a/target/mips/system/machine.c +++ b/target/mips/system/machine.c @@ -279,6 +279,32 @@ static const VMStateDescription mips_vmstate_octeon_mu= ltiplier =3D { } }; =20 +static const VMStateDescription mips_vmstate_octeon_crypto =3D { + .name =3D "cpu/octeon_crypto", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D mips_octeon_needed, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT64_ARRAY(env.octeon_crypto.hsh_dat, MIPSCPU, 16), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.hsh_iv, MIPSCPU, 8), + VMSTATE_UINT64(env.octeon_crypto.sha3_dat24, MIPSCPU), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.des3_key, MIPSCPU, 3), + VMSTATE_UINT64(env.octeon_crypto.des3_iv, MIPSCPU), + VMSTATE_UINT64(env.octeon_crypto.des3_result, MIPSCPU), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.aes_resinp, MIPSCPU, 2), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.aes_iv, MIPSCPU, 2), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.aes_key, MIPSCPU, 4), + VMSTATE_UINT32(env.octeon_crypto.crc_poly, MIPSCPU), + VMSTATE_UINT32(env.octeon_crypto.crc_iv, MIPSCPU), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.gfm_mul, MIPSCPU, 2), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.gfm_resinp, MIPSCPU, 2), + VMSTATE_UINT16(env.octeon_crypto.gfm_poly, MIPSCPU), + VMSTATE_UINT8(env.octeon_crypto.aes_keylen, MIPSCPU), + VMSTATE_UINT8(env.octeon_crypto.crc_len, MIPSCPU), + VMSTATE_END_OF_LIST() + } +}; + const VMStateDescription vmstate_mips_cpu =3D { .name =3D "cpu", .version_id =3D 21, @@ -396,6 +422,7 @@ const VMStateDescription vmstate_mips_cpu =3D { .subsections =3D (const VMStateDescription * const []) { &mips_vmstate_timer, &mips_vmstate_octeon_multiplier, + &mips_vmstate_octeon_crypto, NULL } }; --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386894; cv=none; d=zohomail.com; s=zohoarc; b=GFsW74Mv+tY6eO1ULfGXu16x1SZ1IiCMaMLgeDh+q3xen6HqxqfIhMa0+TNUwMKS19oCAjYFLdfaxTm2kHtnVglpVeRu26NJd+wcrBV9uz/AaDV7uswF1tHw++LPTb/mogbUcxsIyALsk4Zxn6GhfkK/IiCEzSSxUAO5n6OozoY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386894; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=z9OZKj50dZv5s1heY9l5Z9IxHiDUoqE1DOEEF5VctYg=; b=T48J1zDbqfCKEhSoC21u77LtR2XuEgGTeGBfySV+Kgx3gTx8PDpT1bFbxe7ycw2OYRQnFbiiunsjDgQ+MkX/iyOpsyIqEavvQZPFNvd7ibcppJXS8Bq1AVliQBzbuGzCtw6lgVAu4wzRa/J3hgapDmy598Nu1Y9FTG1CCWRNg1k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386894747794.3840312009008; Thu, 21 May 2026 11:08:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mv-0000BT-HF; Thu, 21 May 2026 14:06:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mq-00009u-9t for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:24 -0400 Received: from mail-ot1-x32a.google.com ([2607:f8b0:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mn-00021h-Fg for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:23 -0400 Received: by mail-ot1-x32a.google.com with SMTP id 46e09a7af769-7dbe07d3ec3so3350666a34.0 for ; Thu, 21 May 2026 11:06:21 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386780; x=1779991580; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=z9OZKj50dZv5s1heY9l5Z9IxHiDUoqE1DOEEF5VctYg=; b=U9yWTBg/+PljeJQQraIM9UstlhRLFC9eMGuUxy20ChXLEw8impxWPfOqtwUY48jpfy O94T3bh1+SJAv/ZhGVEMHiR4f+7k3prMl10J0UCiaP5JFnoeJQtKPI3RvApR7SWrEfSh uyhrNftEb0fT1aWts4c9A457VOIPlBEvhJfVPjvd4UYyJf2O/WRQQq8MzTfR7E/7LBbv 8+a/ulkl3uUxH2/3iWMil7W7olRQCnEdx1ghgLbRgdTPTdG/tB9FZX/GxO+JRldA7nN2 YNuLqhWPTaj4B0jfDhn0bOjZRLe7u98F1C6Shzci/lAtwdaLh+7nT0xO40FgSGS4XtT5 /itA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386780; x=1779991580; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=z9OZKj50dZv5s1heY9l5Z9IxHiDUoqE1DOEEF5VctYg=; b=l2bpWTCU+eXAqYRPY80i847ZYddJ01Xcy4AcLlKrK6Du9cN9XAopZqyA5/Utsnohr9 io/PtZNFBjkMKoqIxSv0T3nj75xPBaDmiB7ghb10Mqcun76o5M8aNZHnWnp32MZI1E1n FGQd/p86D8KohvP71iMi1jDLaxNXzbTq0Skz7hYGX7JpgPHKN23kt4789xWILBe3qX7P 3hW9IYQCss2kdgw6hLVVR8rzkZ1jlp2t4ZpnkG8u6ySbeJbf2h+HLXB6custzPrIzL8R LHlbdwc06rh8AVZ85OyLlujHUSROu1EaIevt2nnT7hQUWbEPX/4tg3b7Au9DYBFxu5B1 kgAA== X-Gm-Message-State: AOJu0YxtM3xD8KSvtltUJxqVRox4fuuWrXFzIq3X150z1g3Y88z51w1r dx0WfC9WcDtWdAKYDs5YcQ14GiLp35j30lL9+6eh74wjcnlcmrVaUKxH X-Gm-Gg: Acq92OGY5BjriO8gKAlYwFWZc9guDQN2jHZI9Zdu7PB0IHVhZjZ6/YvTtPPGXxExb1g Nt+c+2haVh3hJg3zo9OptBpgjc3M0vMF8ojC1v0dXc1J08RGfyoVQk77FXgMTQHgn72hm2Hs9rw AO5xKfRle+A4ciQLo48yUdEIHCjeNqTRKmSInQOvVtex9ymDVM+08oFQjw058pxSQvPBoRU2n2E 78s/Zx/Qne7RJtZ89WblQER/1hP9yjpyo6oQ4LptFK3CTSacAqKhx70F03DiQkawoAY8QSEe6HR mtnFYDOShwAEdpmBYFKcTxzXPNVT3l3TXIZ7ORjhF3QAEhnewNdQHbedR2V3TuroHkS0BTGSHib Mn74hDOuCiYbxnIpTOrNLnNoz8kQmWo2JrmvddEYHTU7qJ0FM7rmFw3AvrMyff2GW4Cb6+1y8Qm VolG9BELkjGZ4Jke4Kc4r9BF9xXwWZZDFPWSeQ++XGbmfz0pCV/rRYYNgM7hjt9e//r4WfT+yYY GjyJp6mNHTb0dEP0EHLxpLadK4A1QcwJ9YOzWhtfA8f3U5L1Vc4S4MYIe/GgEs+4v8Ubm81JH+U bWs= X-Received: by 2002:a05:6830:7186:b0:7d7:5113:f83a with SMTP id 46e09a7af769-7e5fef032bcmr129565a34.25.1779386780215; Thu, 21 May 2026 11:06:20 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:05:56 -0600 Subject: [PATCH v13 03/22] target/mips: add Octeon COP2 crypto helper plumbing MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-3-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32a; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386897434154100 Add the Octeon COP2 crypto helper source file and build it with the MIPS TCG target. This provides the common compilation unit for the COP2 engine helpers. The instruction dispatch itself remains fully decoded by decodetree, and operation selectors call per-operation helpers rather than a common selector-dispatch helper. Signed-off-by: James Hilliard Reviewed-by: Richard Henderson --- Changes v9 -> v10: - Remove shared-window selector constants and the shared-mode setter. Changes v8 -> v9: - Split helper plumbing out of the former monolithic COP2 helper patch. - Keep shared-window selector arithmetic local to octeon_crypto.c. --- target/mips/tcg/meson.build | 1 + target/mips/tcg/octeon_crypto.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index fff9cd6c7f..4ee359874a 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -18,6 +18,7 @@ mips_ss.add(files( 'lmmi_helper.c', 'msa_helper.c', 'msa_translate.c', + 'octeon_crypto.c', 'op_helper.c', 'rel6_translate.c', 'translate.c', diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c new file mode 100644 index 0000000000..df5b0449ae --- /dev/null +++ b/target/mips/tcg/octeon_crypto.c @@ -0,0 +1,16 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * + * MIPS Octeon crypto emulation helpers. + * + * Copyright (c) 2026 James Hilliard + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "internal.h" +#include "exec/helper-proto.h" +#include "crypto/aes.h" +#include "crypto/sm4.h" +#include "qemu/bitops.h" +#include "qemu/host-utils.h" --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386936; cv=none; d=zohomail.com; s=zohoarc; b=b8BvPJj94ZQcPwK9h8JugV/y1VW9rwhMz99A3huvqCACLkDQHmKe0jeJgiDAA6LQKvSa4GcrPrg/l5Y78NpSglkRsJyImpubCufflaEdmcDVA0SYvAeR5/HZWaxeZf/EmJPpDNfiqYxNMCBTFXxrKfAWF3dE+nXpeA+inABBMc8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386936; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=99YbXwU+QZjVpPSGzU0gdv9rBjyJynqi/nBLawDCdQk=; b=TLOraIVvPSw4cCarkAdlaPJpTGMh9+K1amtlJHyjr7+SlkZHLcljwTmU7QypmDK5KSVhrZBA8m5XoeR8dKG97brICWmHXXgywYLmyMLu6keQgdECk8GMne5dD1Ka/NDzL/swxkjMInegLejdg9WX8OBWgMUuzfHgnO+zX/qDLtw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 177938693639956.032037449702784; Thu, 21 May 2026 11:08:56 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mv-0000BQ-BM; Thu, 21 May 2026 14:06:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mq-0000AA-Dy for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:24 -0400 Received: from mail-ot1-x32b.google.com ([2607:f8b0:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mo-00021q-6Y for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:24 -0400 Received: by mail-ot1-x32b.google.com with SMTP id 46e09a7af769-7df05fc49e5so6607583a34.3 for ; Thu, 21 May 2026 11:06:21 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386781; x=1779991581; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=99YbXwU+QZjVpPSGzU0gdv9rBjyJynqi/nBLawDCdQk=; b=N0wUsg/sJeIs1D1lHvzVDLi5VNPyNqgNQvNfZ1xk8waDMl6YXi/uEvdGnH1n7YQEV6 +eT7tlnOu0w5UviEz1P9RyQS/by31wnr4edI60MY+dEZBP0EtAU+qGjZYR3HeKgeF0nZ f7uSlMdP+NFBaJsF9UkcGjWGPv5SR8ciZq7430IY8cSvmyUz7z6RCD1rxKDuIYwMXaPm f0j1jYYYZlh86e+x0IIUJdOmoQuyhMnAZBfOx2u//2rjjgJOu1Ou9CTVv2byv3Y76D62 6rL84GNUEPblGKNWAVzHSHpqv44zin8fny1JqPoeJuAgVUwpcAPziyE/0CVW9kKrNp8I 4Utg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386781; x=1779991581; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=99YbXwU+QZjVpPSGzU0gdv9rBjyJynqi/nBLawDCdQk=; b=nx9eCLERiQ5vq4i0GhBs/TC6cW/+9U/mpH3SfG7Qg9qKgJwdjoBXqVWyIdKv/K3QxU Cuatgeq82Mii0AyRMA8vR8emHorxrYNKxdM2yurxlbFoxko0FZOH6hK928HPKzy3sc4j PnVhnGrQFOCCxoq4D9BEBpcS3oe7f8BTTmKD6WHUaaCA+NrlCRt8VjQfMHkl7ZFkPte2 c1gkKCGNaH5I2lau8yDfTWNlqphRfn6y/EIdP0BcPZjWSs5sT4ptbhlqXaPGcSHCfeks iHytDmNHSijtx66IXtRtsUxbZncclg8HhoMLOPQIECXqIAFv77LFQbJitmjyjyKd60CT Iukw== X-Gm-Message-State: AOJu0YxnCKUVH4ltejecsAIBYflYwVMkffsXKpnGFry/6rZoweEEDSwa sAoImDY1t5WB5JIN3d8HSe2TpShXBdUGI4YP4yFjH2FNB4UCSsWUqNA2 X-Gm-Gg: Acq92OHHgJfWGD1CT6ZSdYxTWXmH3EuR3SpQlTC/7tRx+YP4CGIq1t1sF55v1d4MezJ +FztPCHsZIg16Ck8uKWhfVxDikqhNO8ZhqHDPuqgjEFuKOGrYoEptMnvbu475s1oi0FZawhPKAL iaPHjnO3Pka2xRN0fv+nU/i2Rs8FCK86LgCdMazJeujLT+BBtqZkjTu8OWeoKp/CXsARFyMCmPR psfUqdPksqwvz9rAn4VZGGReoWwTeXCPDCkwig3kepvixm5wxg+82V5jPFyGgXFZMuCoHTz/Wjh 2WnYMqbbQStawF2261eYAx7lHCLrsWFjhpgtHfs2Pz60WQvIA48eSxl0nbljdCJ+KY5DRYkqgq6 OBfyNdu7HYf79dHhKm/QxOKPzprioXnFK45cmTmK7WEnMLwXBT9veBGJg9ZNtHvmerZjCVUhjaO TLW3nt375A0qpaI0RiMK3WndwZB8+Fy2VJjkpELOeCLLlIXyKwptVyVclmCdY6zUJ5lSL8PQBC4 7HqioBHqnjJvAuFxCfmHASokfgYn+JhTCExk+z9EbeozlZaHEin4+T1Px/GZkzeZPso9y3AP5PK xWY= X-Received: by 2002:a05:6830:6418:b0:7e3:d3b8:d1fb with SMTP id 46e09a7af769-7e5fec81568mr174226a34.1.1779386781110; Thu, 21 May 2026 11:06:21 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:05:57 -0600 Subject: [PATCH v13 04/22] target/mips: add Octeon CRC COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-4-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386937951154100 Add helper support for the Octeon COP2 CRC register interface. This covers normal and reflected CRC state handling, byte/halfword/word/ doubleword/variable-width update selectors, and the reflected IV readback operation. Register moves that can be represented as direct TCG loads/stores do not need helpers. Add only the side-effecting CRC helper implementation here. Signed-off-by: James Hilliard Reviewed-by: Richard Henderson --- Changes v9 -> v10: - Mask variable-length CRC writes to CRCLEN<3:0>. - Add Richard's Reviewed-by tag. Changes v8 -> v9: - Split CRC selector operations into their own COP2 helper patch. - Expose per-operation helpers instead of a generic selector helper. - Add matching helper.h declarations with the helper implementation. --- target/mips/helper.h | 14 +++++ target/mips/tcg/octeon_crypto.c | 131 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 145 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index e2b83a1d19..e802f50fd6 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -25,6 +25,20 @@ DEF_HELPER_3(crc32, tl, tl, tl, i32) DEF_HELPER_3(crc32c, tl, tl, tl, i32) DEF_HELPER_FLAGS_4(rotx, TCG_CALL_NO_RWG_SE, tl, tl, i32, i32, i32) =20 +/* Octeon COP2 selector operation helpers. */ +DEF_HELPER_1(octeon_cp2_mf_crc_iv_reflect, i64, env) +DEF_HELPER_2(octeon_cp2_mt_crc_write_iv_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_byte, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_half, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_word, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_byte_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_half_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_word_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_dword, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_var, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_dword_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_var_reflect, void, env, i64) + /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) DEF_HELPER_4(swm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index df5b0449ae..811f36f46a 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -14,3 +14,134 @@ #include "crypto/sm4.h" #include "qemu/bitops.h" #include "qemu/host-utils.h" + +static inline uint32_t octeon_crc_reflect32_by_byte(uint32_t v) +{ + return bswap32(revbit32(v)); +} + +static uint32_t octeon_crc_state_reflect(const MIPSOcteonCryptoState *cryp= to) +{ + return octeon_crc_reflect32_by_byte(crypto->crc_iv); +} + +static void octeon_crc_set_state_reflect(MIPSOcteonCryptoState *crypto, + uint32_t state) +{ + crypto->crc_iv =3D octeon_crc_reflect32_by_byte(state); +} + +static void octeon_crc_update_normal(MIPSOcteonCryptoState *crypto, + uint64_t value, unsigned int bytes) +{ + uint32_t crc =3D crypto->crc_iv; + uint32_t poly =3D crypto->crc_poly; + + for (unsigned int i =3D 0; i < bytes; i++) { + uint8_t byte =3D value >> ((bytes - 1 - i) * 8); + + crc ^=3D (uint32_t)byte << 24; + for (int bit =3D 0; bit < 8; bit++) { + if (crc & 0x80000000U) { + crc =3D (crc << 1) ^ poly; + } else { + crc <<=3D 1; + } + } + } + + crypto->crc_iv =3D crc; +} + +static void octeon_crc_update_reflect(MIPSOcteonCryptoState *crypto, + uint64_t value, unsigned int bytes) +{ + uint32_t crc =3D octeon_crc_state_reflect(crypto); + uint32_t poly =3D bswap32(crypto->crc_poly); + + for (unsigned int i =3D 0; i < bytes; i++) { + uint8_t byte =3D value >> ((bytes - 1 - i) * 8); + + crc ^=3D byte; + for (int bit =3D 0; bit < 8; bit++) { + if (crc & 1U) { + crc =3D (crc >> 1) ^ poly; + } else { + crc >>=3D 1; + } + } + } + + octeon_crc_set_state_reflect(crypto, crc); +} + +uint64_t helper_octeon_cp2_mf_crc_iv_reflect(CPUMIPSState *env) +{ + return octeon_crc_reflect32_by_byte(env->octeon_crypto.crc_iv); +} + +void helper_octeon_cp2_mt_crc_write_iv_reflect(CPUMIPSState *env, + uint64_t value) +{ + env->octeon_crypto.crc_iv =3D + octeon_crc_reflect32_by_byte((uint32_t)value); +} + +void helper_octeon_cp2_mt_crc_write_byte(CPUMIPSState *env, uint64_t value) +{ + octeon_crc_update_normal(&env->octeon_crypto, value, 1); +} + +void helper_octeon_cp2_mt_crc_write_half(CPUMIPSState *env, uint64_t value) +{ + octeon_crc_update_normal(&env->octeon_crypto, value, 2); +} + +void helper_octeon_cp2_mt_crc_write_word(CPUMIPSState *env, uint64_t value) +{ + octeon_crc_update_normal(&env->octeon_crypto, value, 4); +} + +void helper_octeon_cp2_mt_crc_write_dword(CPUMIPSState *env, uint64_t valu= e) +{ + octeon_crc_update_normal(&env->octeon_crypto, value, 8); +} + +void helper_octeon_cp2_mt_crc_write_var(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + octeon_crc_update_normal(crypto, value, MIN(8U, crypto->crc_len & 0xf)= ); +} + +void helper_octeon_cp2_mt_crc_write_byte_reflect(CPUMIPSState *env, + uint64_t value) +{ + octeon_crc_update_reflect(&env->octeon_crypto, value, 1); +} + +void helper_octeon_cp2_mt_crc_write_half_reflect(CPUMIPSState *env, + uint64_t value) +{ + octeon_crc_update_reflect(&env->octeon_crypto, value, 2); +} + +void helper_octeon_cp2_mt_crc_write_word_reflect(CPUMIPSState *env, + uint64_t value) +{ + octeon_crc_update_reflect(&env->octeon_crypto, value, 4); +} + +void helper_octeon_cp2_mt_crc_write_dword_reflect(CPUMIPSState *env, + uint64_t value) +{ + octeon_crc_update_reflect(&env->octeon_crypto, value, 8); +} + +void helper_octeon_cp2_mt_crc_write_var_reflect(CPUMIPSState *env, + uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + octeon_crc_update_reflect(crypto, value, MIN(8U, crypto->crc_len & 0xf= )); +} --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386994; cv=none; d=zohomail.com; s=zohoarc; b=ZWGXBv4XkxvdhqbU/sE+Z4i51bYtQqkON1iW8opcM1yGo+eJtlnYmxK5PffoWaJiy3qY+/z+cdo7DZvxDQLt3x1KBRM5CQwoXVW872o/mKeVVl/YjhjHOq1EmiEhvP8fVNk3UoZgRCvn+elTq1zrpDpZNnNX3+Y/MIBoS0ZOR58= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386994; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hiKG7vqkKtjgPdKX+1200Dw0BsCoKa6VofI0vBywP+g=; b=eZtrTqJ11aeB1iCOKO45ky1P7MLXISuTWKKmUXPQTUNQYELhQb3g0bRJxVJavA4/SR//XHe9sqqOX7zOMqPsLsITQC7ir+TrMsquRHAYUIOa3UfAwW+Pnnv3QozS0QHCfNhHZPlq8rVFtbTl01X/da4fmFl90PyOml+DBI2ow2E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386994053687.8093344344455; Thu, 21 May 2026 11:09:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mx-0000Cm-6p; Thu, 21 May 2026 14:06:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mr-0000AW-9e for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:25 -0400 Received: from mail-ot1-x329.google.com ([2607:f8b0:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mp-000220-9B for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:24 -0400 Received: by mail-ot1-x329.google.com with SMTP id 46e09a7af769-7de7dc85b74so6257234a34.2 for ; Thu, 21 May 2026 11:06:22 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386782; x=1779991582; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hiKG7vqkKtjgPdKX+1200Dw0BsCoKa6VofI0vBywP+g=; b=M/y12oXWJl+XHaU/F+9WrQnZ6hq38pj0J8IxmFF/rwumwAtrwc6NegvP+FK2BZb3yG 7kzREwqAAsr76YKHU0RXvF3e+MO2ptc67QRXZT6dstWmi5YDkeafe2Gfp6SwK9vjtzo8 yKJQjjkf8OWBTeFprTcvTp94GOMHYwFkKdXvNB6mK+KMRDcF7/7IjA5Ay6wX6F11wXYp BDdFzYtcOnvqC/vOdAEfEUgg1nK4XC1pfV8kjoUrpKDF3EejTyZ19Cjoex6Ca5J+jhVv 1V0mg2xZ+gLlerIpfvsGAC8YGuXMVEqbWrjClQGOMJC2Oz3wcv0/tT51afgme7MRkA68 ux5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386782; x=1779991582; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=hiKG7vqkKtjgPdKX+1200Dw0BsCoKa6VofI0vBywP+g=; b=SsWcvtKPmq9Mnq9PnmcaDLSMdiPBae7Lq3AOGHwc2C2XspIuA6QFmm83lhWb2boDWl VTIj5e2Exw7vILSCI+d6i2y5RmLygj91HOqz1ZfTsmWcQiGp8fPXo/dqSCLg7EWLndTH TjP5viS13xR2eb/Ly3YGbFkVNI7VEPA5BMHOJ7R1GGIUDRtuO46eQ+q16yfPo19aSRF6 JD51u/wDG/c8J2l9HuUJ+EIbhzlSGzi8SP0fHA0gA6bKHq3K1ZhbqJWMg24J1gec3V6/ 9FLe+Q1mipqz8QqIcffsW3pcEVxaONXfkEiKKNW0zLBCZ0XHydJHMbQ2m1VDk6rH4iCr qubQ== X-Gm-Message-State: AOJu0YxiqWfcN9HoZGIlMxazsDhnK1yBN0z9oY8+Bt1cIceomYN99stL pbvxqthZARWMMgJTDTFarorFYTwqy+Qe9LICDNp/l+Lrp3xUyLojll23 X-Gm-Gg: Acq92OE5ZSNb/EH6GePOM+V9StszHqzH/IYaJpuN96+8V53DKFzv6oYyiulslw3E157 XL71sOwQL3cVqYZx9aDUjI6ZEVxWg0So9bRWnlzo6ojJQuc642wgf2ZEKyXWdBgOsNBbcXctmKv oFDzE+NxoUbpzokVXtguku6kAn79Phn8RCpw5kWXY0+jSZ4QM63x/YE9tfyGvhrf4r7OZRo4KIG W6TMXi6A9nSajOoraRb7nlWD7kxnXBIKFnyHvk3C0szS1ZmBNMKgD8z3+ioh9PuyTX1/97FwwGn FuXlGBnDgdbM2w3gYQRMv+E970SYRbeJQ/4MFwDRAzzrlNVhHmTo4iJ/casFa8Lgjn+8lAjC/I3 /TJ/FVE0kUbp4cbNRdvmyV5KhZ1Py+ufETlm1rHAGyN3bLv5Fq7zOHv885GQdK4if9WhUqkwgsY HN2/9omsagpK7SWC9Bq5HNe2MWw0mjMc53DUGVbHLz+zQ8EQGEu34MhHyagjrNXZBB62D7yz0tJ lp/UZGok4XiUqsS264jntmRsneCFzHPeB0ixWPP+RFE2+gMPILOgx8ApcTYPJiW28QG X-Received: by 2002:a05:6830:83b0:b0:7e3:fa31:1104 with SMTP id 46e09a7af769-7e5fef61165mr123396a34.22.1779386781977; Thu, 21 May 2026 11:06:21 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:05:58 -0600 Subject: [PATCH v13 05/22] target/mips: add Octeon GFM COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-5-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::329; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x329.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386996720154100 Add helper support for the Octeon GFM carryless multiply selectors. This models the normal and reflected multiplication paths, including the XOR-and-multiply forms that update the result/input state used by Octeon crypto code. Reflected selectors operate on the architectural GFM register bank using bit-reflected register transfers rather than a separate shadow state. Keep the 64-bit UIA2 reduction path used by SNOW3G F9. Signed-off-by: James Hilliard --- Changes v10 -> v13: - Map reflected GFM selectors directly onto the architectural GFM state in this patch instead of adding temporary reflected shadow state. - Preserve the 64-bit UIA2 GFM reduction path used by SNOW3G F9. Changes v8 -> v9: - Split GFM selector operations into their own COP2 helper patch. - Expose per-operation helpers instead of a generic selector helper. - Add matching helper.h declarations with the helper implementation. --- target/mips/helper.h | 10 +++ target/mips/tcg/octeon_crypto.c | 139 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 149 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index e802f50fd6..9a6702ff60 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -27,6 +27,10 @@ DEF_HELPER_FLAGS_4(rotx, TCG_CALL_NO_RWG_SE, tl, tl, i32= , i32, i32) =20 /* Octeon COP2 selector operation helpers. */ DEF_HELPER_1(octeon_cp2_mf_crc_iv_reflect, i64, env) +DEF_HELPER_1(octeon_cp2_mf_gfm_mul_reflect0, i64, env) +DEF_HELPER_1(octeon_cp2_mf_gfm_mul_reflect1, i64, env) +DEF_HELPER_1(octeon_cp2_mf_gfm_resinp_reflect0, i64, env) +DEF_HELPER_1(octeon_cp2_mf_gfm_resinp_reflect1, i64, env) DEF_HELPER_2(octeon_cp2_mt_crc_write_iv_reflect, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_crc_write_byte, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_crc_write_half, void, env, i64) @@ -38,6 +42,12 @@ DEF_HELPER_2(octeon_cp2_mt_crc_write_dword, void, env, i= 64) DEF_HELPER_2(octeon_cp2_mt_crc_write_var, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_crc_write_dword_reflect, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_crc_write_var_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_gfm_mul_reflect0, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_gfm_mul_reflect1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_gfm_xor0_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_gfm_xor0, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_gfm_xormul1_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_gfm_xormul1, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 811f36f46a..b22474574c 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -11,6 +11,7 @@ #include "internal.h" #include "exec/helper-proto.h" #include "crypto/aes.h" +#include "crypto/clmul.h" #include "crypto/sm4.h" #include "qemu/bitops.h" #include "qemu/host-utils.h" @@ -75,11 +76,149 @@ static void octeon_crc_update_reflect(MIPSOcteonCrypto= State *crypto, octeon_crc_set_state_reflect(crypto, crc); } =20 +static void octeon_gfm_mul(const uint64_t x[2], const uint64_t y[2], + uint16_t poly, uint64_t out[2]) +{ + uint64_t zh =3D 0, zl =3D 0; + uint64_t vh =3D y[0], vl =3D y[1]; + uint64_t rh =3D (uint64_t)poly << 48; + int i; + + /* + * Keep the reflected-shift formulation used by Octeon software: the + * selector polynomial is pre-positioned at the top of the high word b= efore + * each carry reduction. + */ + for (i =3D 0; i < 128; i++) { + bool bit; + bool lsb; + + if (i < 64) { + bit =3D (x[0] >> (63 - i)) & 1; + } else { + bit =3D (x[1] >> (127 - i)) & 1; + } + if (bit) { + zh ^=3D vh; + zl ^=3D vl; + } + + lsb =3D vl & 1; + vl =3D (vh << 63) | (vl >> 1); + vh >>=3D 1; + if (lsb) { + vh ^=3D rh; + } + } + + out[0] =3D zh; + out[1] =3D zl; +} + +static uint64_t octeon_gfm_reduce64(Int128 product, uint8_t poly) +{ + uint64_t lo =3D int128_getlo(product); + uint64_t hi =3D int128_gethi(product); + + while (hi) { + int bit =3D 63 - clz64(hi); + + hi ^=3D 1ULL << bit; + lo ^=3D (uint64_t)poly << bit; + if (bit > 56) { + hi ^=3D (uint64_t)poly >> (64 - bit); + } + } + + return lo; +} + +static void octeon_gfm_mul64_uia2(const uint64_t x[2], const uint64_t y[2], + uint8_t poly, uint64_t out[2]) +{ + /* + * SNOW3G UIA2 uses the GFM datapath as a reflected 64-bit multiply in + * the low half of the 128-bit register pair. + */ + uint64_t vx =3D revbit64(x[1]); + uint64_t vy =3D revbit64(y[0]); + Int128 product =3D clmul_64(vx, vy); + uint64_t res =3D octeon_gfm_reduce64(product, revbit32(poly) >> 24); + + out[0] =3D 0; + out[1] =3D revbit64(res); +} + uint64_t helper_octeon_cp2_mf_crc_iv_reflect(CPUMIPSState *env) { return octeon_crc_reflect32_by_byte(env->octeon_crypto.crc_iv); } =20 +uint64_t helper_octeon_cp2_mf_gfm_mul_reflect0(CPUMIPSState *env) +{ + return revbit64(env->octeon_crypto.gfm_mul[0]); +} + +uint64_t helper_octeon_cp2_mf_gfm_mul_reflect1(CPUMIPSState *env) +{ + return revbit64(env->octeon_crypto.gfm_mul[1]); +} + +uint64_t helper_octeon_cp2_mf_gfm_resinp_reflect0(CPUMIPSState *env) +{ + return revbit64(env->octeon_crypto.gfm_resinp[0]); +} + +uint64_t helper_octeon_cp2_mf_gfm_resinp_reflect1(CPUMIPSState *env) +{ + return revbit64(env->octeon_crypto.gfm_resinp[1]); +} + +void helper_octeon_cp2_mt_gfm_mul_reflect0(CPUMIPSState *env, uint64_t val= ue) +{ + env->octeon_crypto.gfm_mul[0] =3D revbit64(value); +} + +void helper_octeon_cp2_mt_gfm_mul_reflect1(CPUMIPSState *env, uint64_t val= ue) +{ + env->octeon_crypto.gfm_mul[1] =3D revbit64(value); +} + +void helper_octeon_cp2_mt_gfm_xor0_reflect(CPUMIPSState *env, uint64_t val= ue) +{ + env->octeon_crypto.gfm_resinp[0] ^=3D revbit64(value); +} + +void helper_octeon_cp2_mt_gfm_xor0(CPUMIPSState *env, uint64_t value) +{ + env->octeon_crypto.gfm_resinp[0] ^=3D value; +} + +void helper_octeon_cp2_mt_gfm_xormul1_reflect(CPUMIPSState *env, + uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->gfm_resinp[1] ^=3D revbit64(value); + octeon_gfm_mul(crypto->gfm_resinp, crypto->gfm_mul, crypto->gfm_poly, + crypto->gfm_resinp); +} + +void helper_octeon_cp2_mt_gfm_xormul1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->gfm_resinp[1] ^=3D value; + if (crypto->gfm_poly <=3D 0xff && crypto->gfm_mul[1] =3D=3D 0 && + crypto->gfm_resinp[0] =3D=3D 0) { + octeon_gfm_mul64_uia2(crypto->gfm_resinp, crypto->gfm_mul, + crypto->gfm_poly, crypto->gfm_resinp); + } else { + octeon_gfm_mul(crypto->gfm_resinp, crypto->gfm_mul, crypto->gfm_po= ly, + crypto->gfm_resinp); + } +} + void helper_octeon_cp2_mt_crc_write_iv_reflect(CPUMIPSState *env, uint64_t value) { --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386998; cv=none; d=zohomail.com; s=zohoarc; b=nFBkSadJ9qN+V/NTv3ENRrw0y8dyFSBW5EAkk69BJUAdvWp8oVbMCNgXsRTpJ5grAd76CQd+tshGvfxd3mrGoGcUSKUsfRRTsOZ/kgJHLkhvwZcd5XIbqdZsNpiI7s9vFe2tN5Y4YgY6v7lCi7gnydmvAYJYC7ifV+JhHv8xlTE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386998; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qd1JecVeUCnnJeorVMFX3xhJOlLs9zkGyq9ooA19Irc=; b=nzxLy8YF36S0ya1e0hLPGFUez/ZRyeCqAd8eSICNrLXJCYTqcnbZ2/CebMvDlTHRxiSXQuwe281Ffeif/5UUKGZFO7i0ZqwNybXhLYwcpb/oEylXzP9RIRWjEK3GspLxismqXiWpDoxqwoJcpzJVXSS23GcTjPSKccTRIIz9Ok8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386998805101.97679905236521; Thu, 21 May 2026 11:09:58 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mx-0000EW-UO; Thu, 21 May 2026 14:06:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7ms-0000Aa-6r for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:26 -0400 Received: from mail-ot1-x331.google.com ([2607:f8b0:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mq-00022G-4x for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:25 -0400 Received: by mail-ot1-x331.google.com with SMTP id 46e09a7af769-7dbec19732eso7320865a34.3 for ; Thu, 21 May 2026 11:06:23 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386783; x=1779991583; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qd1JecVeUCnnJeorVMFX3xhJOlLs9zkGyq9ooA19Irc=; b=cgTAa3RXQiboSbT0eWLmXPmCFYq2XEdLAYWMexzc220kMHP+IUsLsjOH+gOwUOCggS HDRBjXLIsRPQBn6P51SdafrxKHZMjtCsy7PiUU4/fetWVmTgNqgRsDb0U5T7xeTEg+fu /IiVDaWcAWxpYJ8HMOp2zRzRbwn9KxAOpYUVJ5dsQIJmnf4tmYYZDoy8cgsD8sS8Nqxc CtPf7fWslqshBPZzBJLt+M93pXJW8H/+3oYaUDGAVeszDCNyevEmjL0id6G412k8H59x FwD5tQmG7bpuMm3F7eOgE3lIJyNGHKrURy81EtvHhPfBZ8uYLhXUJZBVoyfcN6YUyKMr ZWfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386783; x=1779991583; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=qd1JecVeUCnnJeorVMFX3xhJOlLs9zkGyq9ooA19Irc=; b=jECk4EfjB7YVrwz8Vp5ECbaure8PG4vcaI1V6dZgnd7DGfIs63isgfvMitYNR5Nj44 nRD5LcU5ViKLPGEz0pkl/NZP/XDDljruoAo7nGSNK9QyjTeE4mDGydCI02+flNjqtOmI C1Dvs5MqA/iB+QCkhCT6uiScg4FeuYuhiFvR+FEec+eycvL5LKaNkXoJUaB5jYrVaK1v ihGkTNlCuh+rsSDroAG0ykSt+zlK1Hk/ih/fUwNt5N40D04CDpsgF29pND49sfPoZDI8 H+YdHffuXFeEaeub7ObAyMgCFj2PYImOT3cumBglJp76qtb87d5Y9Qyr8n14ZQexUDps 3mBg== X-Gm-Message-State: AOJu0YzECMDYsQgo2Dnu54+eRAvFKCMIQ0zdzTZyt4nn2Dioa6z1DhEZ 8MIGBj71NjaDry37ztKx/B7McEAfetCcF9gh3orKUZftoiA0Zgj/cdM4 X-Gm-Gg: Acq92OEfGYfYTR8vlnP8BcNmnyMZq5mkAzJrgcdk2QIM9mOzdEcw8EE1Pv6QWjxK2Ag 91CfGo6SQihHFMiQqlf51r5m2mpntCR0UtFFcPzyYdGyUhH31l/HCyI3OqbhB8BauDbMbKpwIXE g7fpv0yeN5IKnA23Lh+jVgw3salDx18Ycebp7TZjhLsQV9qHGgAfBFctxF1EJbO8ShfK12QbLG/ 7F3PsKKU/fLQ7vQ7vHyI0MXQbvvvGGmwEfU5fYTLw/gZ5BfKG5N6dYHF6J2U2vmwNd2nyyOEqvO ICbwf6eoeubojFtLyTvjIptiJg02VawfW8FwJgDUNTkeAP0xPjg/HmcITdXp0Wi6df0XwoBAcct PSplJVVdFO0dbfGdRrqWtiEKRaCmMtvrD6SQyYwnAXi0YtSniNsCUplBCBOgKP6QM24byWLB6lU ErU2pyFMZo/irlS3z6sQjFiBs6YV4pGCWlrtJN/RgK922pX/kzZtCL2H+D4MfIEx1JOVsVd6lk9 t79y44pYaFlgaaJbmmko5rAUrK4gCq7CEfHwIWyLLoI1ri1Zu3+sa3S44z9rtVLZpyYK1weTXYk FRg= X-Received: by 2002:a05:6830:7188:b0:7dc:e45a:adda with SMTP id 46e09a7af769-7e5fee24199mr149117a34.19.1779386782889; Thu, 21 May 2026 11:06:22 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:05:59 -0600 Subject: [PATCH v13 06/22] target/mips: add Octeon SHA3 COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-6-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::331; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x331.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779387001163158500 Add the Octeon SHA3 register-window state and helper operations. Keep the shared HSH/SHA3/SHA512 write path coherent, model the dedicated 25-lane Keccak state, and implement the Keccak-f[1600] permutation for the STARTOP selector. The shared selector window still uses explicit selector-position arithmetic internally because multiple COP2 engines alias the same numeric window. Individual DMFC2/DMTC2 instruction decode stays outside the helper implementation. Signed-off-by: James Hilliard --- Changes v8 -> v9: - Split SHA3 selector operations into their own COP2 helper patch. - Replace generic selector dispatch with per-operation SHA3 helpers. - Use helper-local selector constants for shared-window position logic. - Add matching helper.h declarations with the helper implementation. Changes v5 -> v6: - Rename SHA3 DAT15 selector aliases with MF/MT direction suffixes. Changes v1 -> v2: - Use switch ranges and g_assert_not_reached() for SHA3 selector position decoding. (suggested by Philippe Mathieu-Daud=C3=A9) - Add selector dispatch updates in octeon_translate.c after moving COP2 decode out of translate.c. (suggested by Philippe Mathieu-Daud=C3=A9) --- target/mips/helper.h | 22 +++++ target/mips/tcg/octeon_crypto.c | 172 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 194 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index 9a6702ff60..d1ec75eaff 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -27,6 +27,7 @@ DEF_HELPER_FLAGS_4(rotx, TCG_CALL_NO_RWG_SE, tl, tl, i32,= i32, i32) =20 /* Octeon COP2 selector operation helpers. */ DEF_HELPER_1(octeon_cp2_mf_crc_iv_reflect, i64, env) +DEF_HELPER_1(octeon_cp2_mf_sha3_dat24, i64, env) DEF_HELPER_1(octeon_cp2_mf_gfm_mul_reflect0, i64, env) DEF_HELPER_1(octeon_cp2_mf_gfm_mul_reflect1, i64, env) DEF_HELPER_1(octeon_cp2_mf_gfm_resinp_reflect0, i64, env) @@ -48,6 +49,27 @@ DEF_HELPER_2(octeon_cp2_mt_gfm_xor0_reflect, void, env, = i64) DEF_HELPER_2(octeon_cp2_mt_gfm_xor0, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_gfm_xormul1_reflect, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_gfm_xormul1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_dat24, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_dat15, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat0, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat2, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat3, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat4, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat5, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat6, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat7, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat8, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat9, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat10, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat11, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat12, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat13, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat14, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat15, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat16, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_xordat17, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sha3_startop, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index b22474574c..b3b88ce018 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -16,6 +16,8 @@ #include "qemu/bitops.h" #include "qemu/host-utils.h" =20 +#define OCTEON_SHA3_DAT15 15 + static inline uint32_t octeon_crc_reflect32_by_byte(uint32_t v) { return bswap32(revbit32(v)); @@ -149,11 +151,129 @@ static void octeon_gfm_mul64_uia2(const uint64_t x[2= ], const uint64_t y[2], out[1] =3D revbit64(res); } =20 +static const uint64_t octeon_sha3_round_constants[24] =3D { + 0x0000000000000001ULL, 0x0000000000008082ULL, + 0x800000000000808aULL, 0x8000000080008000ULL, + 0x000000000000808bULL, 0x0000000080000001ULL, + 0x8000000080008081ULL, 0x8000000000008009ULL, + 0x000000000000008aULL, 0x0000000000000088ULL, + 0x0000000080008009ULL, 0x000000008000000aULL, + 0x000000008000808bULL, 0x800000000000008bULL, + 0x8000000000008089ULL, 0x8000000000008003ULL, + 0x8000000000008002ULL, 0x8000000000000080ULL, + 0x000000000000800aULL, 0x800000008000000aULL, + 0x8000000080008081ULL, 0x8000000000008080ULL, + 0x0000000080000001ULL, 0x8000000080008008ULL, +}; + +static const uint8_t octeon_sha3_rotation_constants[24] =3D { + 1, 3, 6, 10, 15, 21, 28, 36, 45, 55, 2, 14, + 27, 41, 56, 8, 25, 43, 62, 18, 39, 61, 20, 44, +}; + +static const uint8_t octeon_sha3_pi_lanes[24] =3D { + 10, 7, 11, 17, 18, 3, 5, 16, 8, 21, 24, 4, + 15, 23, 19, 13, 12, 2, 20, 14, 22, 9, 6, 1, +}; + +static uint64_t octeon_sha3_reg_to_lane(uint64_t value) +{ + /* + * The COP2 register interface is consumed by big-endian MIPS code as + * 64-bit register values, while Keccak lanes are byte-little-endian. + */ + return bswap64(value); +} + +static uint64_t octeon_sha3_lane_to_reg(uint64_t value) +{ + return bswap64(value); +} + +static uint64_t octeon_sha3_get_lane(MIPSOcteonCryptoState *crypto, + unsigned int index) +{ + if (index < 16) { + return octeon_sha3_reg_to_lane(crypto->hsh_dat[index]); + } + if (index < 24) { + return octeon_sha3_reg_to_lane(crypto->hsh_iv[index - 16]); + } + return octeon_sha3_reg_to_lane(crypto->sha3_dat24); +} + +static void octeon_sha3_set_lane(MIPSOcteonCryptoState *crypto, + unsigned int index, uint64_t value) +{ + value =3D octeon_sha3_lane_to_reg(value); + if (index < 16) { + crypto->hsh_dat[index] =3D value; + } else if (index < 24) { + crypto->hsh_iv[index - 16] =3D value; + } else { + crypto->sha3_dat24 =3D value; + } +} + +static void octeon_sha3_permute(MIPSOcteonCryptoState *crypto) +{ + uint64_t state[25]; + + for (int i =3D 0; i < 25; i++) { + state[i] =3D octeon_sha3_get_lane(crypto, i); + } + + for (int round =3D 0; round < 24; round++) { + uint64_t bc[5]; + uint64_t temp; + + for (int x =3D 0; x < 5; x++) { + bc[x] =3D state[x] ^ state[5 + x] ^ state[10 + x] ^ + state[15 + x] ^ state[20 + x]; + } + for (int x =3D 0; x < 5; x++) { + temp =3D bc[(x + 4) % 5] ^ rol64(bc[(x + 1) % 5], 1); + for (int y =3D 0; y < 25; y +=3D 5) { + state[y + x] ^=3D temp; + } + } + + temp =3D state[1]; + for (int i =3D 0; i < 24; i++) { + uint64_t next =3D state[octeon_sha3_pi_lanes[i]]; + + state[octeon_sha3_pi_lanes[i]] =3D + rol64(temp, octeon_sha3_rotation_constants[i]); + temp =3D next; + } + + for (int y =3D 0; y < 25; y +=3D 5) { + for (int x =3D 0; x < 5; x++) { + bc[x] =3D state[y + x]; + } + for (int x =3D 0; x < 5; x++) { + state[y + x] =3D bc[x] ^ ((~bc[(x + 1) % 5]) & bc[(x + 2) = % 5]); + } + } + + state[0] ^=3D octeon_sha3_round_constants[round]; + } + + for (int i =3D 0; i < 25; i++) { + octeon_sha3_set_lane(crypto, i, state[i]); + } +} + uint64_t helper_octeon_cp2_mf_crc_iv_reflect(CPUMIPSState *env) { return octeon_crc_reflect32_by_byte(env->octeon_crypto.crc_iv); } =20 +uint64_t helper_octeon_cp2_mf_sha3_dat24(CPUMIPSState *env) +{ + return env->octeon_crypto.sha3_dat24; +} + uint64_t helper_octeon_cp2_mf_gfm_mul_reflect0(CPUMIPSState *env) { return revbit64(env->octeon_crypto.gfm_mul[0]); @@ -219,6 +339,58 @@ void helper_octeon_cp2_mt_gfm_xormul1(CPUMIPSState *en= v, uint64_t value) } } =20 +void helper_octeon_cp2_mt_sha3_dat24(CPUMIPSState *env, uint64_t value) +{ + env->octeon_crypto.sha3_dat24 =3D value; +} + +void helper_octeon_cp2_mt_sha3_dat15(CPUMIPSState *env, uint64_t value) +{ + env->octeon_crypto.hsh_dat[OCTEON_SHA3_DAT15] =3D value; +} + +static void octeon_sha3_xordat(MIPSOcteonCryptoState *crypto, + unsigned int index, uint64_t value) +{ + uint64_t lane =3D octeon_sha3_get_lane(crypto, index); + + octeon_sha3_set_lane(crypto, index, + lane ^ octeon_sha3_reg_to_lane(value)); +} + +#define OCTEON_SHA3_XORDAT_HELPER(N) \ +void helper_octeon_cp2_mt_sha3_xordat ## N(CPUMIPSState *env, uint64_t val= ue) \ +{ \ + octeon_sha3_xordat(&env->octeon_crypto, N, value); \ +} +OCTEON_SHA3_XORDAT_HELPER(0) +OCTEON_SHA3_XORDAT_HELPER(1) +OCTEON_SHA3_XORDAT_HELPER(2) +OCTEON_SHA3_XORDAT_HELPER(3) +OCTEON_SHA3_XORDAT_HELPER(4) +OCTEON_SHA3_XORDAT_HELPER(5) +OCTEON_SHA3_XORDAT_HELPER(6) +OCTEON_SHA3_XORDAT_HELPER(7) +OCTEON_SHA3_XORDAT_HELPER(8) +OCTEON_SHA3_XORDAT_HELPER(9) +OCTEON_SHA3_XORDAT_HELPER(10) +OCTEON_SHA3_XORDAT_HELPER(11) +OCTEON_SHA3_XORDAT_HELPER(12) +OCTEON_SHA3_XORDAT_HELPER(13) +OCTEON_SHA3_XORDAT_HELPER(14) +OCTEON_SHA3_XORDAT_HELPER(15) +OCTEON_SHA3_XORDAT_HELPER(16) +OCTEON_SHA3_XORDAT_HELPER(17) +#undef OCTEON_SHA3_XORDAT_HELPER + +void helper_octeon_cp2_mt_sha3_startop(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + (void)value; + octeon_sha3_permute(crypto); +} + void helper_octeon_cp2_mt_crc_write_iv_reflect(CPUMIPSState *env, uint64_t value) { --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386998; cv=none; d=zohomail.com; s=zohoarc; b=Ja3axCiJKF2Q4agjFk7YVhKq3d9+bX0/LpDXVMQ3fbo28u3qjYSSMhJ+xniTJRLA5wasxW/xrOJA3/77IMAk44M2zU/V+00rAymOh8Vyd+AMLbLlbS0Y+1zIdT+vhuCrt80CMIHXckH22yStsCQ856H/61zTmLVRDTlTnjPZDUQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386998; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Lb0OvF7hQ6PiNdrSYpxR44n5ZueReZ1PaD49+fWM2z8=; b=Bzf3+wCeezVWyL8/e/2SStTIlHPai4ArCs+vLd+kD1cm6DrA4gQPiit6OlO75gP+eFnx8nTOTnFtfjoFQIS/iv1rOlvdVH7sgMeDyD4dUxs+mQmzHODmk28tHZMrATjsw5ocfLKMvheKhOsHU4++z13ZjbkmFuAu0FgHKYGIuew= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17793869988100.6523810148775055; Thu, 21 May 2026 11:09:58 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mx-0000E7-Hh; Thu, 21 May 2026 14:06:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mu-0000Av-9h for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:28 -0400 Received: from mail-ot1-x32b.google.com ([2607:f8b0:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mr-00022g-9B for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:27 -0400 Received: by mail-ot1-x32b.google.com with SMTP id 46e09a7af769-7dca4debedaso6647034a34.2 for ; Thu, 21 May 2026 11:06:24 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386784; x=1779991584; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Lb0OvF7hQ6PiNdrSYpxR44n5ZueReZ1PaD49+fWM2z8=; b=PyZRAxawEq+n7Vd0+TpDcqPjLu4LIqZpM16ncWtlB7Z7dhj7sTW9/jK0Qb+duh73UV wzA0bgDg7O3I26maeo92HoVq9k8r5/gsVyJsUIc0ikWvxiXDZJqQV56mhSoe2BMZfxIy K7jjlukYYGu05ShO8YB/lr86ug86MHCaTJxUuqrpxpus4pJ3mMk7K3HFKO+drviuoDb9 JQ6PD9vzLrAqlw4U2foJg8+0xMg0hXGlXI3GrHdwhJEyvwKZ+ppKnYDprFgA4t588N8+ vj3x1dpkucWEpM7RFa3ueRGh+0wF+INUU+j2tHviFB/Qa7lL7YhOoqCpdUOeHtrE8kuB jxhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386784; x=1779991584; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Lb0OvF7hQ6PiNdrSYpxR44n5ZueReZ1PaD49+fWM2z8=; b=CcuC5MZEf18x/3SwqAYbqMWwSDJdgcdBG2/gAwshivi01bOO61hi+fAWWPG3zHCsOH efYGG7w+RYorveqwhI8/8HyPCZiw8QyEl3Xpzxt/I9EKJeVPylhQSxOvUD5Eq2ut3c3K whU+Ce/xQ+vhBxbcyZHoXK+NLmCIjbU+3VUj8/zbtbJgYakcQYhH1Ql0FOmrrdCaS9Ke 6BAPnO1mSFKVbO0yawP7yCiOXvzs8Oqf7WFN3vIzMvF417FG8JXkBiYWVoM3T1zde8Nx i8fAjsESe8WjQN/zrOkxwNm0TXZ1EAVjBa8HN6RjX38OgYaocg2i7qfM8AXbunzaU97J bdBw== X-Gm-Message-State: AOJu0YzMcKUTNFKPyk2GnUf6r5+I2u4o5V22qD6lLAMwSyoSzHW/fBgV nNLN8tMOy4W/Zl+wQxUTalrQpYZnzDvHxTA1oQEfx4N6EUTE/6VpObMW X-Gm-Gg: Acq92OHoteAAXaWThQfTcpNT3HCOZoWRd7WSjRImf10XqLKHhBydENCKgaKNGV1FY1+ FRXElIJp44flws+5r6rnCclXRr9LYMzOCyfpuqOFr4BGpw5NuQWbmERNHCYsV8OEbChrHJ/pZW8 BApnJ952wC+bt1U6AMc6OG7SgKFSb+nQmJZxCqv6NM0oe6OXYVn78V2YT2tUf22Det2eTi5Jccp 5OHf656GfLfIlwNRBS9XF1Sao4w8596vS+8IeTHiul38dWSBFOJRmYza48e7e/BZS5MdfgJote3 sUeC7BAoLvrXleWklN+q5lNDvf1ucSz3C46eLjGcvIGmrvwgFuHVzBAmS+fNEjUETljSaFbP3Dr Saz7r9ctWvhgw4gKdHksHoLOmZ6bzDW2mRic6ZSP7dPQTLcfh1SvzbMfib4beDi6wvSmNZArRih KedGp4TDRQuqDH/a6zgY8rj1o3Jl5h/S6toKL92InxdAkU3ns5TE1OwuVLgUfWq5AgHza9c+VUi QBa6NlBFqDpJYDdRi7kob8bMeNIrQsJrvVQJsGCpEob1STBfHypt18QDVMYSMSQ3m9r X-Received: by 2002:a05:6830:6d17:b0:7de:427d:34ba with SMTP id 46e09a7af769-7e5feed1e60mr148409a34.19.1779386783947; Thu, 21 May 2026 11:06:23 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:00 -0600 Subject: [PATCH v13 07/22] target/mips: add Octeon ZUC COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-7-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779387000658154100 Add the Octeon ZUC START and MORE helper operations and model the shared state window used by the hardware interface. This covers the keystream and MAC engine state, including the save-and-restore view that overlaps the HSH/SHA3 bank. Shared-window writes also update the SHA512/SHA3 backing state so guests can switch between engines without stale register contents. Signed-off-by: James Hilliard --- Changes v8 -> v9: - Split ZUC selector operations into their own COP2 helper patch. - Replace generic selector dispatch with per-operation ZUC helpers. - Use helper-local selector constants for shared-window position logic. - Add matching helper.h declarations with the helper implementation. Changes v5 -> v6: - Use the manual-aligned HSH_DATW field and shared HSH window helper names introduced by the COP2 crypto core patch. Changes v1 -> v2: - Add shared-window selector predicates and assert on unreachable ZUC selector switches. (suggested by Philippe Mathieu-Daud=C3=A9) - Preserve aliased HSH/SHA3/SHA512 backing state during ZUC shared-window writes. - Add selector dispatch updates in octeon_translate.c after moving COP2 decode out of translate.c. (suggested by Philippe Mathieu-Daud=C3=A9) --- target/mips/helper.h | 2 + target/mips/tcg/octeon_crypto.c | 369 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 371 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index d1ec75eaff..353832748c 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -70,6 +70,8 @@ DEF_HELPER_2(octeon_cp2_mt_sha3_xordat15, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_sha3_xordat16, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_sha3_xordat17, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_sha3_startop, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_zuc_start, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_zuc_more, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index b3b88ce018..28a9fca013 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -264,6 +264,375 @@ static void octeon_sha3_permute(MIPSOcteonCryptoState= *crypto) } } =20 +static inline uint32_t octeon_crypto_hi32(uint64_t value) +{ + return value >> 32; +} + +static inline uint32_t octeon_crypto_lo32(uint64_t value) +{ + return value; +} + +static inline uint64_t octeon_crypto_pack32(uint32_t hi, uint32_t lo) +{ + return ((uint64_t)hi << 32) | lo; +} + +static const uint8_t octeon_zuc_s0[256] =3D { + 0x3e, 0x72, 0x5b, 0x47, 0xca, 0xe0, 0x00, 0x33, + 0x04, 0xd1, 0x54, 0x98, 0x09, 0xb9, 0x6d, 0xcb, + 0x7b, 0x1b, 0xf9, 0x32, 0xaf, 0x9d, 0x6a, 0xa5, + 0xb8, 0x2d, 0xfc, 0x1d, 0x08, 0x53, 0x03, 0x90, + 0x4d, 0x4e, 0x84, 0x99, 0xe4, 0xce, 0xd9, 0x91, + 0xdd, 0xb6, 0x85, 0x48, 0x8b, 0x29, 0x6e, 0xac, + 0xcd, 0xc1, 0xf8, 0x1e, 0x73, 0x43, 0x69, 0xc6, + 0xb5, 0xbd, 0xfd, 0x39, 0x63, 0x20, 0xd4, 0x38, + 0x76, 0x7d, 0xb2, 0xa7, 0xcf, 0xed, 0x57, 0xc5, + 0xf3, 0x2c, 0xbb, 0x14, 0x21, 0x06, 0x55, 0x9b, + 0xe3, 0xef, 0x5e, 0x31, 0x4f, 0x7f, 0x5a, 0xa4, + 0x0d, 0x82, 0x51, 0x49, 0x5f, 0xba, 0x58, 0x1c, + 0x4a, 0x16, 0xd5, 0x17, 0xa8, 0x92, 0x24, 0x1f, + 0x8c, 0xff, 0xd8, 0xae, 0x2e, 0x01, 0xd3, 0xad, + 0x3b, 0x4b, 0xda, 0x46, 0xeb, 0xc9, 0xde, 0x9a, + 0x8f, 0x87, 0xd7, 0x3a, 0x80, 0x6f, 0x2f, 0xc8, + 0xb1, 0xb4, 0x37, 0xf7, 0x0a, 0x22, 0x13, 0x28, + 0x7c, 0xcc, 0x3c, 0x89, 0xc7, 0xc3, 0x96, 0x56, + 0x07, 0xbf, 0x7e, 0xf0, 0x0b, 0x2b, 0x97, 0x52, + 0x35, 0x41, 0x79, 0x61, 0xa6, 0x4c, 0x10, 0xfe, + 0xbc, 0x26, 0x95, 0x88, 0x8a, 0xb0, 0xa3, 0xfb, + 0xc0, 0x18, 0x94, 0xf2, 0xe1, 0xe5, 0xe9, 0x5d, + 0xd0, 0xdc, 0x11, 0x66, 0x64, 0x5c, 0xec, 0x59, + 0x42, 0x75, 0x12, 0xf5, 0x74, 0x9c, 0xaa, 0x23, + 0x0e, 0x86, 0xab, 0xbe, 0x2a, 0x02, 0xe7, 0x67, + 0xe6, 0x44, 0xa2, 0x6c, 0xc2, 0x93, 0x9f, 0xf1, + 0xf6, 0xfa, 0x36, 0xd2, 0x50, 0x68, 0x9e, 0x62, + 0x71, 0x15, 0x3d, 0xd6, 0x40, 0xc4, 0xe2, 0x0f, + 0x8e, 0x83, 0x77, 0x6b, 0x25, 0x05, 0x3f, 0x0c, + 0x30, 0xea, 0x70, 0xb7, 0xa1, 0xe8, 0xa9, 0x65, + 0x8d, 0x27, 0x1a, 0xdb, 0x81, 0xb3, 0xa0, 0xf4, + 0x45, 0x7a, 0x19, 0xdf, 0xee, 0x78, 0x34, 0x60, +}; + +static const uint8_t octeon_zuc_s1[256] =3D { + 0x55, 0xc2, 0x63, 0x71, 0x3b, 0xc8, 0x47, 0x86, + 0x9f, 0x3c, 0xda, 0x5b, 0x29, 0xaa, 0xfd, 0x77, + 0x8c, 0xc5, 0x94, 0x0c, 0xa6, 0x1a, 0x13, 0x00, + 0xe3, 0xa8, 0x16, 0x72, 0x40, 0xf9, 0xf8, 0x42, + 0x44, 0x26, 0x68, 0x96, 0x81, 0xd9, 0x45, 0x3e, + 0x10, 0x76, 0xc6, 0xa7, 0x8b, 0x39, 0x43, 0xe1, + 0x3a, 0xb5, 0x56, 0x2a, 0xc0, 0x6d, 0xb3, 0x05, + 0x22, 0x66, 0xbf, 0xdc, 0x0b, 0xfa, 0x62, 0x48, + 0xdd, 0x20, 0x11, 0x06, 0x36, 0xc9, 0xc1, 0xcf, + 0xf6, 0x27, 0x52, 0xbb, 0x69, 0xf5, 0xd4, 0x87, + 0x7f, 0x84, 0x4c, 0xd2, 0x9c, 0x57, 0xa4, 0xbc, + 0x4f, 0x9a, 0xdf, 0xfe, 0xd6, 0x8d, 0x7a, 0xeb, + 0x2b, 0x53, 0xd8, 0x5c, 0xa1, 0x14, 0x17, 0xfb, + 0x23, 0xd5, 0x7d, 0x30, 0x67, 0x73, 0x08, 0x09, + 0xee, 0xb7, 0x70, 0x3f, 0x61, 0xb2, 0x19, 0x8e, + 0x4e, 0xe5, 0x4b, 0x93, 0x8f, 0x5d, 0xdb, 0xa9, + 0xad, 0xf1, 0xae, 0x2e, 0xcb, 0x0d, 0xfc, 0xf4, + 0x2d, 0x46, 0x6e, 0x1d, 0x97, 0xe8, 0xd1, 0xe9, + 0x4d, 0x37, 0xa5, 0x75, 0x5e, 0x83, 0x9e, 0xab, + 0x82, 0x9d, 0xb9, 0x1c, 0xe0, 0xcd, 0x49, 0x89, + 0x01, 0xb6, 0xbd, 0x58, 0x24, 0xa2, 0x5f, 0x38, + 0x78, 0x99, 0x15, 0x90, 0x50, 0xb8, 0x95, 0xe4, + 0xd0, 0x91, 0xc7, 0xce, 0xed, 0x0f, 0xb4, 0x6f, + 0xa0, 0xcc, 0xf0, 0x02, 0x4a, 0x79, 0xc3, 0xde, + 0xa3, 0xef, 0xea, 0x51, 0xe6, 0x6b, 0x18, 0xec, + 0x1b, 0x2c, 0x80, 0xf7, 0x74, 0xe7, 0xff, 0x21, + 0x5a, 0x6a, 0x54, 0x1e, 0x41, 0x31, 0x92, 0x35, + 0xc4, 0x33, 0x07, 0x0a, 0xba, 0x7e, 0x0e, 0x34, + 0x88, 0xb1, 0x98, 0x7c, 0xf3, 0x3d, 0x60, 0x6c, + 0x7b, 0xca, 0xd3, 0x1f, 0x32, 0x65, 0x04, 0x28, + 0x64, 0xbe, 0x85, 0x9b, 0x2f, 0x59, 0x8a, 0xd7, + 0xb0, 0x25, 0xac, 0xaf, 0x12, 0x03, 0xe2, 0xf2, +}; + +static inline uint32_t octeon_zuc_addm(uint32_t a, uint32_t b) +{ + uint32_t c =3D a + b; + + c =3D (c & 0x7fffffffU) + (c >> 31); + return c ? c : 0x7fffffffU; +} + +static inline uint32_t octeon_zuc_mul_by_pow2(uint32_t v, unsigned int shi= ft) +{ + return ((v << shift) | (v >> (31 - shift))) & 0x7fffffffU; +} + +static inline uint32_t octeon_zuc_make_u32(uint8_t a, uint8_t b, + uint8_t c, uint8_t d) +{ + return ((uint32_t)a << 24) | ((uint32_t)b << 16) | + ((uint32_t)c << 8) | d; +} + +static inline uint64_t octeon_zuc_pack_pair(uint32_t hi, uint32_t lo) +{ + return ((uint64_t)hi << 32) | lo; +} + +static uint32_t octeon_zuc_lfsr(const MIPSOcteonCryptoState *crypto, + unsigned int index) +{ + uint64_t pair =3D crypto->hsh_dat[index / 2]; + + return index & 1 ? octeon_crypto_lo32(pair) : octeon_crypto_hi32(pair); +} + +static void octeon_zuc_set_lfsr(MIPSOcteonCryptoState *crypto, + unsigned int index, uint32_t value) +{ + uint32_t hi =3D octeon_crypto_hi32(crypto->hsh_dat[index / 2]); + uint32_t lo =3D octeon_crypto_lo32(crypto->hsh_dat[index / 2]); + + value &=3D 0x7fffffffU; + if (index & 1) { + lo =3D value; + } else { + hi =3D value; + } + crypto->hsh_dat[index / 2] =3D octeon_zuc_pack_pair(hi, lo); +} + +static uint32_t octeon_zuc_fsm(const MIPSOcteonCryptoState *crypto, + unsigned int index) +{ + uint64_t pair =3D crypto->hsh_dat[8]; + + return index ? octeon_crypto_lo32(pair) : octeon_crypto_hi32(pair); +} + +static void octeon_zuc_set_fsm(MIPSOcteonCryptoState *crypto, + unsigned int index, uint32_t value) +{ + uint32_t hi =3D octeon_crypto_hi32(crypto->hsh_dat[8]); + uint32_t lo =3D octeon_crypto_lo32(crypto->hsh_dat[8]); + + if (index) { + lo =3D value; + crypto->hsh_iv[2] =3D value; + } else { + hi =3D value; + crypto->hsh_iv[1] =3D value; + } + crypto->hsh_dat[8] =3D octeon_zuc_pack_pair(hi, lo); +} + +static uint32_t octeon_zuc_window(const MIPSOcteonCryptoState *crypto, + unsigned int index) +{ + switch (index) { + case 0: + return octeon_crypto_hi32(crypto->hsh_dat[9]); + case 1: + return octeon_crypto_lo32(crypto->hsh_dat[9]); + case 2: + return crypto->hsh_dat[10]; + default: + g_assert_not_reached(); + } +} + +static void octeon_zuc_set_window(MIPSOcteonCryptoState *crypto, + unsigned int index, uint32_t value) +{ + switch (index) { + case 0: + crypto->hsh_dat[9] =3D + octeon_zuc_pack_pair(value, octeon_crypto_lo32(crypto->hsh_dat= [9])); + crypto->hsh_iv[0] =3D crypto->hsh_dat[9]; + return; + case 1: + crypto->hsh_dat[9] =3D + octeon_zuc_pack_pair(octeon_crypto_hi32(crypto->hsh_dat[9]), v= alue); + crypto->hsh_iv[0] =3D crypto->hsh_dat[9]; + return; + case 2: + crypto->hsh_dat[10] =3D value; + return; + default: + g_assert_not_reached(); + } +} + +static uint32_t octeon_zuc_tresult(const MIPSOcteonCryptoState *crypto) +{ + return crypto->hsh_dat[11]; +} + +static void octeon_zuc_set_tresult(MIPSOcteonCryptoState *crypto, + uint32_t value) +{ + crypto->hsh_dat[11] =3D value; + crypto->hsh_iv[3] =3D value; +} + +static void octeon_zuc_bit_reorganization(const MIPSOcteonCryptoState *cry= pto, + uint32_t x[4]) +{ + x[0] =3D ((octeon_zuc_lfsr(crypto, 15) & 0x7fff8000U) << 1) | + (octeon_zuc_lfsr(crypto, 14) & 0xffffU); + x[1] =3D ((octeon_zuc_lfsr(crypto, 11) & 0xffffU) << 16) | + (octeon_zuc_lfsr(crypto, 9) >> 15); + x[2] =3D ((octeon_zuc_lfsr(crypto, 7) & 0xffffU) << 16) | + (octeon_zuc_lfsr(crypto, 5) >> 15); + x[3] =3D ((octeon_zuc_lfsr(crypto, 2) & 0xffffU) << 16) | + (octeon_zuc_lfsr(crypto, 0) >> 15); +} + +static inline uint32_t octeon_zuc_l1(uint32_t x) +{ + return x ^ rol32(x, 2) ^ rol32(x, 10) ^ + rol32(x, 18) ^ rol32(x, 24); +} + +static inline uint32_t octeon_zuc_l2(uint32_t x) +{ + return x ^ rol32(x, 8) ^ rol32(x, 14) ^ + rol32(x, 22) ^ rol32(x, 30); +} + +static uint32_t octeon_zuc_f(MIPSOcteonCryptoState *crypto, const uint32_t= x[4]) +{ + uint32_t fsm0 =3D octeon_zuc_fsm(crypto, 0); + uint32_t fsm1 =3D octeon_zuc_fsm(crypto, 1); + uint32_t w =3D (x[0] ^ fsm0) + fsm1; + uint32_t w1 =3D fsm0 + x[1]; + uint32_t w2 =3D fsm1 ^ x[2]; + uint32_t u =3D octeon_zuc_l1((w1 << 16) | (w2 >> 16)); + uint32_t v =3D octeon_zuc_l2((w2 << 16) | (w1 >> 16)); + + octeon_zuc_set_fsm(crypto, 0, + octeon_zuc_make_u32(octeon_zuc_s0[u >> 24], + octeon_zuc_s1[(uint8_t)(u >> 16= )], + octeon_zuc_s0[(uint8_t)(u >> 8)= ], + octeon_zuc_s1[(uint8_t)u])); + octeon_zuc_set_fsm(crypto, 1, + octeon_zuc_make_u32(octeon_zuc_s0[v >> 24], + octeon_zuc_s1[(uint8_t)(v >> 16= )], + octeon_zuc_s0[(uint8_t)(v >> 8)= ], + octeon_zuc_s1[(uint8_t)v])); + return w; +} + +static void octeon_zuc_lfsr_step(MIPSOcteonCryptoState *crypto, + bool init_mode, uint32_t u) +{ + uint32_t lfsr[16]; + uint32_t f; + + for (int i =3D 0; i < 16; i++) { + lfsr[i] =3D octeon_zuc_lfsr(crypto, i); + } + + f =3D lfsr[0]; + f =3D octeon_zuc_addm(f, octeon_zuc_mul_by_pow2(lfsr[0], 8)); + f =3D octeon_zuc_addm(f, octeon_zuc_mul_by_pow2(lfsr[4], 20)); + f =3D octeon_zuc_addm(f, octeon_zuc_mul_by_pow2(lfsr[10], 21)); + f =3D octeon_zuc_addm(f, octeon_zuc_mul_by_pow2(lfsr[13], 17)); + f =3D octeon_zuc_addm(f, octeon_zuc_mul_by_pow2(lfsr[15], 15)); + if (init_mode) { + f =3D octeon_zuc_addm(f, u); + } + + for (int i =3D 0; i < 15; i++) { + octeon_zuc_set_lfsr(crypto, i, lfsr[i + 1]); + } + octeon_zuc_set_lfsr(crypto, 15, f); +} + +static uint32_t octeon_zuc_generate_word(MIPSOcteonCryptoState *crypto) +{ + uint32_t x[4]; + uint32_t z; + + octeon_zuc_bit_reorganization(crypto, x); + z =3D octeon_zuc_f(crypto, x) ^ x[3]; + octeon_zuc_lfsr_step(crypto, false, 0); + return z; +} + +static void octeon_zuc_fill_window(MIPSOcteonCryptoState *crypto) +{ + octeon_zuc_set_window(crypto, 0, octeon_zuc_generate_word(crypto)); + octeon_zuc_set_window(crypto, 1, octeon_zuc_generate_word(crypto)); + octeon_zuc_set_window(crypto, 2, octeon_zuc_generate_word(crypto)); +} + +static inline uint32_t +octeon_zuc_window_word(const MIPSOcteonCryptoState *crypto, unsigned int b= it) +{ + if (bit =3D=3D 0) { + return octeon_zuc_window(crypto, 0); + } + if (bit < 32) { + return (octeon_zuc_window(crypto, 0) << bit) | + (octeon_zuc_window(crypto, 1) >> (32 - bit)); + } + if (bit =3D=3D 32) { + return octeon_zuc_window(crypto, 1); + } + return (octeon_zuc_window(crypto, 1) << (bit - 32)) | + (octeon_zuc_window(crypto, 2) >> (64 - bit)); +} + +static void octeon_zuc_advance_window(MIPSOcteonCryptoState *crypto) +{ + octeon_zuc_set_window(crypto, 0, octeon_zuc_window(crypto, 2)); + octeon_zuc_set_window(crypto, 1, octeon_zuc_generate_word(crypto)); + octeon_zuc_set_window(crypto, 2, octeon_zuc_generate_word(crypto)); +} + +static void octeon_zuc_start(MIPSOcteonCryptoState *crypto, uint64_t data) +{ + uint32_t x[4]; + + for (int i =3D 0; i < 14; i++) { + octeon_zuc_set_lfsr(crypto, i, octeon_zuc_lfsr(crypto, i)); + } + octeon_zuc_set_lfsr(crypto, 14, data >> 32); + octeon_zuc_set_lfsr(crypto, 15, data); + octeon_zuc_set_fsm(crypto, 0, 0); + octeon_zuc_set_fsm(crypto, 1, 0); + octeon_zuc_set_tresult(crypto, 0); + + for (int i =3D 0; i < 32; i++) { + octeon_zuc_bit_reorganization(crypto, x); + octeon_zuc_lfsr_step(crypto, true, octeon_zuc_f(crypto, x) >> 1); + } + + octeon_zuc_bit_reorganization(crypto, x); + (void)octeon_zuc_f(crypto, x); + octeon_zuc_lfsr_step(crypto, false, 0); + octeon_zuc_fill_window(crypto); +} + +static void octeon_zuc_more(MIPSOcteonCryptoState *crypto, uint64_t data) +{ + uint32_t t =3D octeon_zuc_tresult(crypto); + + for (unsigned int bit =3D 0; bit < 64; bit++) { + if ((data >> (63 - bit)) & 1) { + t ^=3D octeon_zuc_window_word(crypto, bit); + } + } + octeon_zuc_set_tresult(crypto, t); + octeon_zuc_advance_window(crypto); +} + +void helper_octeon_cp2_mt_zuc_start(CPUMIPSState *env, uint64_t value) +{ + octeon_zuc_start(&env->octeon_crypto, value); +} + +void helper_octeon_cp2_mt_zuc_more(CPUMIPSState *env, uint64_t value) +{ + octeon_zuc_more(&env->octeon_crypto, value); +} + uint64_t helper_octeon_cp2_mf_crc_iv_reflect(CPUMIPSState *env) { return octeon_crc_reflect32_by_byte(env->octeon_crypto.crc_iv); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386971; cv=none; d=zohomail.com; s=zohoarc; b=mypTEt9Gx2V/5VoJGUKeVecnARoLoL0ckybdlJVJHXDh6/aZV0Zb9n7A5Dye7xdC+QmJpHCf4d7QKuspsDu7lW4J30xoZUACQtm8aXNkiLITZg6lYmT35bZ3uREKH1hX9E4rUaXunVri7flpQERKrmGsEbdvwkCpeHsYh8av6IE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386971; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=aGJ+lGGsCu0d6uFtqXo0HJGtey3n+HsCJ/BUXG8uA+k=; b=ZSMh02f2xU/ymwRuOANqsddy9u7ouGLplt5F2bBGiCTzkSxNVzIjr0o+kV4mz/gYfzbNIEQhooFAnp5aS7bOAuXT1+qs07kYg9SiizvgYVo1L2I/bbTTx5HuaH7+OTSOy4Owz2eYpgYjfb5Td61MqTeOoi1GGk9J0mw6UPHpgEk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386971897171.76456282375216; Thu, 21 May 2026 11:09:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mx-0000Dg-AK; Thu, 21 May 2026 14:06:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mv-0000BA-2X for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:29 -0400 Received: from mail-ot1-x333.google.com ([2607:f8b0:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7ms-00022z-9v for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:28 -0400 Received: by mail-ot1-x333.google.com with SMTP id 46e09a7af769-7e568ab0bc5so7224402a34.0 for ; Thu, 21 May 2026 11:06:25 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386785; x=1779991585; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=aGJ+lGGsCu0d6uFtqXo0HJGtey3n+HsCJ/BUXG8uA+k=; b=nAMVVTfvJ87e5RTZ/UY9KgkI92Q4VfDHVseIQSJD3k3+qgTEO0oc+BxACa7ZvYkLA1 rsN7GqWi0YD98lw9aPECkudBaiMiJxAdQa1k1Ms+LTPiAZpWL0mCtmcv6FoXipjGD+wi U6aC3xSAk1xMj4iheN21+H6lA4XK3oOGRPZBXxXD1vYXbVUh2CBiTyUFi3aUvOZF4qh1 8P+eH+OBCjc9r0bsm4fFbTbltjJrVhZk89c4iIPqgxk1suSH4zHhT++V/jmSMynF6Dgc 18v2T58XSKzj2Hhzv2jKd64nfW8LNJ+Vdz1x+SwtxCrqjJ7HMIVHfBHxFJcgV+eDBuKn xvgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386785; x=1779991585; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=aGJ+lGGsCu0d6uFtqXo0HJGtey3n+HsCJ/BUXG8uA+k=; b=mF3+cbyIpb7w898NlUjkjbntV7yV4KmHh/DBSQ6HlKl3WpC114NFiN1buqEJAN/O2k 5t+880lOGFGMZK0/UVUv3AH1I2JdCaw6K5m3SoG4dsOFm3QIfcWPb4Udydd5iABmDFhN zK0WK7APLbfMqA8NJc0iyDjsbNUYDgzrHEGox8YO3TKDVLPcS6Uw436clcGH5x+4TVnA rn7N8vG3fJ5qPADPe7JBM8uheO+mbEaDzVeXfDzQ098FY8jKK1nHuXQZCPbMzO/cOmjO npDGUGbyfX8c+wVZt/Y4kQwFNkNpZ7FuIkL6foqI4LD54/FNnnPQamDsd6/vYBF+R7TH pHGg== X-Gm-Message-State: AOJu0Ywo6POV0a0vr+Hnp+bcbCx9wMinC9eKBsl98s0Alw/7J2H6N33c cPCkwRbkvqumsbNhi4fgg5fdy/R7Ka+TsPvdNXYtcqzqFYvZwXfZCxrD X-Gm-Gg: Acq92OFseOnd7zztx0IDOPUmntTjZIn59AtJiZefU7SCgi/cz75SWcJkKRlON7AiLFx G68YMJcHD5RbNiVZhiMB1UfOFbKpQ3VDSshQNe4Yks3PMrH9WkFWDqyDlDElnsLUB9IEn0iMTXb LpLe+qtgQ0A4uHfGrnFg5bmr3ZHfs7vYHd0B1V1LYHsGOGjphdgU/9ip2+EMB8xzAVJh49gv5lT 9k+yyyusrSmPiVb6kXG6mCQELD2vCRkHsWaqbvAx5XVLzylez89R1FCatEYoWax5CLiLF4s7cF4 aU20y2n2yvXTxjsIFZvRyVCnoxapOj5DAyt+ygCOUiG8q2v8BpMn69xuHiw5Q+vx+YZpLDAc3cg jPJ5G0Z7RTEDDakue25W15KFe35scr74J1Wh7rs9TesIoOya061OIHJacPUquTV2FuVRkgLIBJP 9jPDsZ57rRKQ1dN4ilj6p/DRIn3+2+SSGJty3fUZ8vV8L7gXgLBwvoVxR9zB8mrJAkprhexVfmw +QMZmnunf2D39b7sVrC0NpzN4OjS9pt+/vBdmwM7zuaY2HFlACV+05dWhYn4uEFXTdEinz2kfIS BKUA56my1mdGwA== X-Received: by 2002:a05:6830:2647:b0:7d7:ec47:79f6 with SMTP id 46e09a7af769-7e5eaa415b0mr2300111a34.13.1779386784874; Thu, 21 May 2026 11:06:24 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:01 -0600 Subject: [PATCH v13 08/22] target/mips: add Octeon SNOW3G COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-8-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::333; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x333.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386973125158500 Add helper support for the Octeon SNOW3G START and MORE selectors. The engine state and result are represented through the architectural HSH IV and DAT register banks that SNOW3G aliases for save and restore. Signed-off-by: James Hilliard --- Changes v9 -> v10: - Drop non-architectural SNOW3G shadow state and shared-mode tracking. - Use the architectural HSH IV/DAT register banks for aliased state. Changes v8 -> v9: - Split SNOW3G selector operations into their own COP2 helper patch. - Replace generic selector dispatch with per-operation SNOW3G helpers. - Add matching helper.h declarations with the helper implementation. --- target/mips/helper.h | 2 + target/mips/tcg/octeon_crypto.c | 275 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 277 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index 353832748c..7985083e6f 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -72,6 +72,8 @@ DEF_HELPER_2(octeon_cp2_mt_sha3_xordat17, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_sha3_startop, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_zuc_start, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_zuc_more, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_snow3g_start, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_snow3g_more, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 28a9fca013..2610f7224a 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -623,6 +623,281 @@ static void octeon_zuc_more(MIPSOcteonCryptoState *cr= ypto, uint64_t data) octeon_zuc_advance_window(crypto); } =20 +static const uint8_t octeon_snow3g_sr[256] =3D { + 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, + 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, + 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, + 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, + 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, + 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, + 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, + 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, + 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, + 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, + 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, + 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, + 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, + 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, + 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, + 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, + 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, + 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, + 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, + 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, + 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, + 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, + 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, + 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, + 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, + 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, + 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, + 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, + 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, + 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, + 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, + 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16, +}; + +static const uint8_t octeon_snow3g_sq[256] =3D { + 0x25, 0x24, 0x73, 0x67, 0xd7, 0xae, 0x5c, 0x30, + 0xa4, 0xee, 0x6e, 0xcb, 0x7d, 0xb5, 0x82, 0xdb, + 0xe4, 0x8e, 0x48, 0x49, 0x4f, 0x5d, 0x6a, 0x78, + 0x70, 0x88, 0xe8, 0x5f, 0x5e, 0x84, 0x65, 0xe2, + 0xd8, 0xe9, 0xcc, 0xed, 0x40, 0x2f, 0x11, 0x28, + 0x57, 0xd2, 0xac, 0xe3, 0x4a, 0x15, 0x1b, 0xb9, + 0xb2, 0x80, 0x85, 0xa6, 0x2e, 0x02, 0x47, 0x29, + 0x07, 0x4b, 0x0e, 0xc1, 0x51, 0xaa, 0x89, 0xd4, + 0xca, 0x01, 0x46, 0xb3, 0xef, 0xdd, 0x44, 0x7b, + 0xc2, 0x7f, 0xbe, 0xc3, 0x9f, 0x20, 0x4c, 0x64, + 0x83, 0xa2, 0x68, 0x42, 0x13, 0xb4, 0x41, 0xcd, + 0xba, 0xc6, 0xbb, 0x6d, 0x4d, 0x71, 0x21, 0xf4, + 0x8d, 0xb0, 0xe5, 0x93, 0xfe, 0x8f, 0xe6, 0xcf, + 0x43, 0x45, 0x31, 0x22, 0x37, 0x36, 0x96, 0xfa, + 0xbc, 0x0f, 0x08, 0x52, 0x1d, 0x55, 0x1a, 0xc5, + 0x4e, 0x23, 0x69, 0x7a, 0x92, 0xff, 0x5b, 0x5a, + 0xeb, 0x9a, 0x1c, 0xa9, 0xd1, 0x7e, 0x0d, 0xfc, + 0x50, 0x8a, 0xb6, 0x62, 0xf5, 0x0a, 0xf8, 0xdc, + 0x03, 0x3c, 0x0c, 0x39, 0xf1, 0xb8, 0xf3, 0x3d, + 0xf2, 0xd5, 0x97, 0x66, 0x81, 0x32, 0xa0, 0x00, + 0x06, 0xce, 0xf6, 0xea, 0xb7, 0x17, 0xf7, 0x8c, + 0x79, 0xd6, 0xa7, 0xbf, 0x8b, 0x3f, 0x1f, 0x53, + 0x63, 0x75, 0x35, 0x2c, 0x60, 0xfd, 0x27, 0xd3, + 0x94, 0xa5, 0x7c, 0xa1, 0x05, 0x58, 0x2d, 0xbd, + 0xd9, 0xc7, 0xaf, 0x6b, 0x54, 0x0b, 0xe0, 0x38, + 0x04, 0xc8, 0x9d, 0xe7, 0x14, 0xb1, 0x87, 0x9c, + 0xdf, 0x6f, 0xf9, 0xda, 0x2a, 0xc4, 0x59, 0x16, + 0x74, 0x91, 0xab, 0x26, 0x61, 0x76, 0x34, 0x2b, + 0xad, 0x99, 0xfb, 0x72, 0xec, 0x33, 0x12, 0xde, + 0x98, 0x3b, 0xc0, 0x9b, 0x3e, 0x18, 0x10, 0x3a, + 0x56, 0xe1, 0x77, 0xc9, 0x1e, 0x9e, 0x95, 0xa3, + 0x90, 0x19, 0xa8, 0x6c, 0x09, 0xd0, 0xf0, 0x86, +}; + +static inline uint8_t octeon_snow3g_mulx(uint8_t v, uint8_t c) +{ + return (v & 0x80) ? ((v << 1) ^ c) : (v << 1); +} + +static uint8_t octeon_snow3g_mulxpow(uint8_t v, unsigned int n, uint8_t c) +{ + while (n-- > 0) { + v =3D octeon_snow3g_mulx(v, c); + } + return v; +} + +static inline uint32_t octeon_snow3g_pack32(uint8_t b0, uint8_t b1, + uint8_t b2, uint8_t b3) +{ + return ((uint32_t)b0 << 24) | ((uint32_t)b1 << 16) | + ((uint32_t)b2 << 8) | b3; +} + +static uint32_t octeon_snow3g_mulalpha(uint8_t c) +{ + return octeon_snow3g_pack32(octeon_snow3g_mulxpow(c, 23, 0xa9), + octeon_snow3g_mulxpow(c, 245, 0xa9), + octeon_snow3g_mulxpow(c, 48, 0xa9), + octeon_snow3g_mulxpow(c, 239, 0xa9)); +} + +static uint32_t octeon_snow3g_divalpha(uint8_t c) +{ + return octeon_snow3g_pack32(octeon_snow3g_mulxpow(c, 16, 0xa9), + octeon_snow3g_mulxpow(c, 39, 0xa9), + octeon_snow3g_mulxpow(c, 6, 0xa9), + octeon_snow3g_mulxpow(c, 64, 0xa9)); +} + +static uint32_t octeon_snow3g_s1(uint32_t w) +{ + uint8_t x0 =3D octeon_snow3g_sr[w >> 24]; + uint8_t x1 =3D octeon_snow3g_sr[(uint8_t)(w >> 16)]; + uint8_t x2 =3D octeon_snow3g_sr[(uint8_t)(w >> 8)]; + uint8_t x3 =3D octeon_snow3g_sr[(uint8_t)w]; + uint8_t r0 =3D octeon_snow3g_mulx(x0, 0x1b) ^ x1 ^ x2 ^ + octeon_snow3g_mulx(x3, 0x1b) ^ x3; + uint8_t r1 =3D octeon_snow3g_mulx(x0, 0x1b) ^ x0 ^ + octeon_snow3g_mulx(x1, 0x1b) ^ x2 ^ x3; + uint8_t r2 =3D x0 ^ octeon_snow3g_mulx(x1, 0x1b) ^ x1 ^ + octeon_snow3g_mulx(x2, 0x1b) ^ x3; + uint8_t r3 =3D x0 ^ x1 ^ octeon_snow3g_mulx(x2, 0x1b) ^ x2 ^ + octeon_snow3g_mulx(x3, 0x1b); + + return octeon_snow3g_pack32(r0, r1, r2, r3); +} + +static uint32_t octeon_snow3g_s2(uint32_t w) +{ + uint8_t x0 =3D octeon_snow3g_sq[w >> 24]; + uint8_t x1 =3D octeon_snow3g_sq[(uint8_t)(w >> 16)]; + uint8_t x2 =3D octeon_snow3g_sq[(uint8_t)(w >> 8)]; + uint8_t x3 =3D octeon_snow3g_sq[(uint8_t)w]; + uint8_t r0 =3D octeon_snow3g_mulx(x0, 0x69) ^ x1 ^ x2 ^ + octeon_snow3g_mulx(x3, 0x69) ^ x3; + uint8_t r1 =3D octeon_snow3g_mulx(x0, 0x69) ^ x0 ^ + octeon_snow3g_mulx(x1, 0x69) ^ x2 ^ x3; + uint8_t r2 =3D x0 ^ octeon_snow3g_mulx(x1, 0x69) ^ x1 ^ + octeon_snow3g_mulx(x2, 0x69) ^ x3; + uint8_t r3 =3D x0 ^ x1 ^ octeon_snow3g_mulx(x2, 0x69) ^ x2 ^ + octeon_snow3g_mulx(x3, 0x69); + + return octeon_snow3g_pack32(r0, r1, r2, r3); +} + +static uint32_t octeon_snow3g_lfsr(const MIPSOcteonCryptoState *crypto, + unsigned int index) +{ + uint64_t pair =3D crypto->hsh_dat[index / 2]; + + return index & 1 ? octeon_crypto_lo32(pair) : octeon_crypto_hi32(pair); +} + +static void octeon_snow3g_set_lfsr(MIPSOcteonCryptoState *crypto, + unsigned int index, uint32_t value) +{ + uint32_t hi =3D octeon_crypto_hi32(crypto->hsh_dat[index / 2]); + uint32_t lo =3D octeon_crypto_lo32(crypto->hsh_dat[index / 2]); + + if (index & 1) { + lo =3D value; + } else { + hi =3D value; + } + crypto->hsh_dat[index / 2] =3D octeon_crypto_pack32(hi, lo); +} + +static uint32_t octeon_snow3g_fsm(const MIPSOcteonCryptoState *crypto, + unsigned int index) +{ + return crypto->hsh_iv[1 + index]; +} + +static void octeon_snow3g_set_fsm(MIPSOcteonCryptoState *crypto, + unsigned int index, uint32_t value) +{ + crypto->hsh_iv[1 + index] =3D value; +} + +static uint32_t octeon_snow3g_clock_fsm(MIPSOcteonCryptoState *crypto) +{ + uint32_t fsm0 =3D octeon_snow3g_fsm(crypto, 0); + uint32_t fsm1 =3D octeon_snow3g_fsm(crypto, 1); + uint32_t fsm2 =3D octeon_snow3g_fsm(crypto, 2); + uint32_t f =3D (uint32_t)(octeon_snow3g_lfsr(crypto, 15) + fsm0) ^ fsm= 1; + uint32_t r =3D (uint32_t)(fsm1 + (fsm2 ^ octeon_snow3g_lfsr(crypto, 5)= )); + + octeon_snow3g_set_fsm(crypto, 2, octeon_snow3g_s2(fsm1)); + octeon_snow3g_set_fsm(crypto, 1, octeon_snow3g_s1(fsm0)); + octeon_snow3g_set_fsm(crypto, 0, r); + return f; +} + +static void octeon_snow3g_clock_lfsr(MIPSOcteonCryptoState *crypto, + bool init_mode, uint32_t f) +{ + uint32_t lfsr[16]; + uint32_t s0; + uint32_t s11; + uint32_t v; + int i; + + for (i =3D 0; i < 16; i++) { + lfsr[i] =3D octeon_snow3g_lfsr(crypto, i); + } + + s0 =3D lfsr[0]; + s11 =3D lfsr[11]; + v =3D (s0 << 8) ^ octeon_snow3g_mulalpha(s0 >> 24) ^ + lfsr[2] ^ (s11 >> 8) ^ octeon_snow3g_divalpha((uint8_t)s11); + + if (init_mode) { + v ^=3D f; + } + + for (i =3D 0; i < 15; i++) { + octeon_snow3g_set_lfsr(crypto, i, lfsr[i + 1]); + } + octeon_snow3g_set_lfsr(crypto, 15, v); +} + +static uint32_t octeon_snow3g_generate_word(MIPSOcteonCryptoState *crypto) +{ + uint32_t f =3D octeon_snow3g_clock_fsm(crypto); + uint32_t z =3D f ^ octeon_snow3g_lfsr(crypto, 0); + + octeon_snow3g_clock_lfsr(crypto, false, 0); + return z; +} + +static void octeon_snow3g_queue_result(MIPSOcteonCryptoState *crypto) +{ + uint32_t z0 =3D octeon_snow3g_generate_word(crypto); + uint32_t z1 =3D octeon_snow3g_generate_word(crypto); + + crypto->hsh_iv[0] =3D octeon_crypto_pack32(z0, z1); +} + +static void octeon_snow3g_start(MIPSOcteonCryptoState *crypto, uint64_t da= ta) +{ + int i; + + for (i =3D 0; i < 14; i++) { + octeon_snow3g_set_lfsr(crypto, i, octeon_snow3g_lfsr(crypto, i)); + } + octeon_snow3g_set_lfsr(crypto, 14, data >> 32); + octeon_snow3g_set_lfsr(crypto, 15, data); + for (i =3D 0; i < 3; i++) { + octeon_snow3g_set_fsm(crypto, i, 0); + } + + for (i =3D 0; i < 32; i++) { + uint32_t f =3D octeon_snow3g_clock_fsm(crypto); + + octeon_snow3g_clock_lfsr(crypto, true, f); + } + + (void)octeon_snow3g_clock_fsm(crypto); + octeon_snow3g_clock_lfsr(crypto, false, 0); + octeon_snow3g_queue_result(crypto); +} + +static void octeon_snow3g_more(MIPSOcteonCryptoState *crypto) +{ + octeon_snow3g_queue_result(crypto); +} + +void helper_octeon_cp2_mt_snow3g_start(CPUMIPSState *env, uint64_t value) +{ + octeon_snow3g_start(&env->octeon_crypto, value); +} + +void helper_octeon_cp2_mt_snow3g_more(CPUMIPSState *env, uint64_t value) +{ + (void)value; + octeon_snow3g_more(&env->octeon_crypto); +} + void helper_octeon_cp2_mt_zuc_start(CPUMIPSState *env, uint64_t value) { octeon_zuc_start(&env->octeon_crypto, value); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386821; cv=none; d=zohomail.com; s=zohoarc; b=YMqRVWZwmSQyKLO4UYPYuuC2HVLnrZdwQnFlFLRDrejbACnTeSaLl4HQ5rIAZBepEDOF3MVhLvdzgP3DJmSgBZLSRmjTFsLrVpLTO3HtTUr9mGZIQ7Y2QkuT7Fu4Y+vaKi8gGSCd+6XIIEBtArArUGqZ6gLyl7tiJ71jMPsvCy8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386821; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kquL+4fEmdOa1jgdWKrGP/ZTDBa1OlSfyNf7ARwi0dk=; b=RHN6alecHrXESqELz1xZPiGQcXX7R4E5iO43PomN/DyF+kMGPYpeIHoVTcu2ukVZDceXQiR7oJoiAQgPluv0Dru4mYfeoTGRRlyvLfIPRYTC23pf8lBgD+c7FEj87AV3fxb80VzPGomelDrnjxy3LqkltWFbYsVnP2M0BODIZJw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386821178863.9092478484741; Thu, 21 May 2026 11:07:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mw-0000CK-Pl; Thu, 21 May 2026 14:06:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mv-0000BB-2I for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:29 -0400 Received: from mail-ot1-x333.google.com ([2607:f8b0:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7ms-00023B-VH for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:28 -0400 Received: by mail-ot1-x333.google.com with SMTP id 46e09a7af769-7dca4debedaso6647072a34.2 for ; Thu, 21 May 2026 11:06:26 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386786; x=1779991586; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kquL+4fEmdOa1jgdWKrGP/ZTDBa1OlSfyNf7ARwi0dk=; b=i+CNgkjedXhBISmGvV/jVrkdxxfSDFlHw5PVD/g1Vprs6afVKJhVfJSINRzG4q7KIJ 01REXtxeudbRQa3wONCl7YO84S7rxs7lTuJmceSw3fzxJ81Mc1qqXxJf04uqjSodKEWM t9tkxfolklw9Y9S2d2JV2hPY8j9vRXvWzwivsSnwennW/zynMPQPNYg20dJ9ubQLrMBT dZENywYgJ4CQZC0w8aoPTQjG53lmkCNQPYWPqiIMQh2RFjj423n1t9PCpsDfhTH37kE6 OFvOd5lJ3XN051DZ0xXSHPGrCg+XAsCjK7GCP7tBdlMCRh1taPa8v41cYB+esPttUDhe JZ1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386786; x=1779991586; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=kquL+4fEmdOa1jgdWKrGP/ZTDBa1OlSfyNf7ARwi0dk=; b=pLDPlvlbprjn2pG9KJehOOqbuHXWGX7tx/VyJT2xX1UZuV6JV0tvwh5Gazx9/SNIMO I/5GoFNnd4hXwNJqv417JQIwks9I8AEywVoYd5tVvTl+FppoM3goPCssd8I0zTNiDkhI jN+2ikX58C9xxkTlBGWs401tCq1KGEfWetnKQfeJPGgXFpJRzvYtBRfpo1tWn+EktmK9 stNEJDx4+R8/hhafRCDy4jKkiAGCh/n0j5I+1lNXe1MYMtA0MLFulAoB4vF2MooRrxmU 9T3S8GBmWz14/DnQbZPkTkvwT4b/Dry/YLIto5bPULRb5z9OUdUlTvgLJtK8DWB89yDO SkxA== X-Gm-Message-State: AOJu0Yz2bR66VD50rTsqJEJjqZ7eEuA4v9YE4g8K2qbpL5ymftRgxVFC jpA+lbroNR3MTMRxNMW707IIXVs4EciVuGyhTacCIF9n0ne16q36kZrv X-Gm-Gg: Acq92OFOOhM3Tn3kptj+as5/AT6hjyT7KBRuhsNhJ9Am1pg88fNLAH0SesTM6nJNuWQ 4VxM+u4aHobDdEF5WNaQWljL4gA6XDVHmUxYJ0k3xIaUZw4/EVLSCIE6I8aE7nq8dNZh07+DvA8 UXHvA9ndIBMgZT/tvTs6f1o6FUZitzKt/OhmJ/ywkgM7/afyb6nWphf3SikS7fTlLv51zOF4N19 XVwDiI0GqJ4LmrebKysyAtRHe6chYfYG2K944f9s0alju3Syae0YgReRxnr0qfQ4VK69ar9U7Wl rtkANFecpgL23jByKdlvLx98sUhYmEGlOHpnCZtFi/waY8gmQfhFSMxZ5n3kvwwa8mMEJLC7EBN /aiNOzLYZQr43UFlNWJRWdvmstcLzKpOiqZauJlzikBdSr7Yue3fpPwgB03R8ubTYyQ5mI0cuFg OGM4duNOX+D4zFDqnE4ctH6J/5ogi6xmpVDodvYKpaxjgEO8y1bOwaBOKDjdMP2F7RGQe8dsy+K m1VFpNvX1tk9QyR2cC0dchS7kGt5uCJU9qUyLS5ePxZgXfGC2b8vhcVYkKRf1lIMYWM X-Received: by 2002:a05:6830:2b09:b0:7d7:f5d4:ef5b with SMTP id 46e09a7af769-7e5fed0d1admr167102a34.7.1779386785799; Thu, 21 May 2026 11:06:25 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:02 -0600 Subject: [PATCH v13 09/22] target/mips: add Octeon AES COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-9-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::333; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x333.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386825116154100 Add helper support for the Octeon AES operation selectors. Direct register-transfer selectors do not need helpers; the ECB/CBC encrypt and decrypt operations consume the AES input, key, IV, and key-length state. AESRESINP is modeled as one architectural register bank; operation helpers consume the current AESRESINP block and write the result back to the same bank. Signed-off-by: James Hilliard --- Changes v9 -> v10: - Drop the non-architectural AES input/result split. - Model AESRESINP as a single architectural input/result bank. Changes v8 -> v9: - Split AES operation selectors into their own COP2 helper patch. - Replace generic selector dispatch with per-operation AES helpers. - Add matching helper.h declarations with the helper implementation. --- target/mips/helper.h | 4 ++ target/mips/tcg/octeon_crypto.c | 145 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 149 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index 7985083e6f..1ab644bab5 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -74,6 +74,10 @@ DEF_HELPER_2(octeon_cp2_mt_zuc_start, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_zuc_more, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_snow3g_start, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_snow3g_more, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_aes_enc_cbc1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_aes_enc1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_aes_dec_cbc1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_aes_dec1, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 2610f7224a..419f65bd29 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -887,6 +887,151 @@ static void octeon_snow3g_more(MIPSOcteonCryptoState = *crypto) octeon_snow3g_queue_result(crypto); } =20 +static int octeon_aes_key_bits(const MIPSOcteonCryptoState *crypto) +{ + enum { + OCTEON_AES_KEYLEN_128 =3D 1, + OCTEON_AES_KEYLEN_192 =3D 2, + OCTEON_AES_KEYLEN_256 =3D 3, + }; + + switch (crypto->aes_keylen) { + case OCTEON_AES_KEYLEN_128: + return 128; + case OCTEON_AES_KEYLEN_192: + return 192; + case OCTEON_AES_KEYLEN_256: + return 256; + default: + return 0; + } +} + +static void octeon_aes_load_key(const MIPSOcteonCryptoState *crypto, + uint8_t *key, size_t keylen) +{ + stq_be_p(key, crypto->aes_key[0]); + stq_be_p(key + 8, crypto->aes_key[1]); + if (keylen > 16) { + stq_be_p(key + 16, crypto->aes_key[2]); + } + if (keylen > 24) { + stq_be_p(key + 24, crypto->aes_key[3]); + } +} + +static void octeon_aes_load_block(const uint64_t regs[2], uint8_t *block) +{ + stq_be_p(block, regs[0]); + stq_be_p(block + 8, regs[1]); +} + +static void octeon_aes_store_block(uint64_t regs[2], const uint8_t *block) +{ + regs[0] =3D ldq_be_p(block); + regs[1] =3D ldq_be_p(block + 8); +} + +static void octeon_aes_encrypt_common(MIPSOcteonCryptoState *crypto, bool = cbc) +{ + AES_KEY key; + uint8_t in[16]; + uint8_t out[16]; + uint8_t iv[16]; + uint8_t raw_key[32] =3D {}; + int bits =3D octeon_aes_key_bits(crypto); + + if (!bits) { + return; + } + + octeon_aes_load_key(crypto, raw_key, bits / 8); + octeon_aes_load_block(crypto->aes_resinp, in); + if (cbc) { + int i; + + octeon_aes_load_block(crypto->aes_iv, iv); + for (i =3D 0; i < sizeof(in); i++) { + in[i] ^=3D iv[i]; + } + } + + AES_set_encrypt_key(raw_key, bits, &key); + AES_encrypt(in, out, &key); + octeon_aes_store_block(crypto->aes_resinp, out); + if (cbc) { + octeon_aes_store_block(crypto->aes_iv, out); + } +} + +static void octeon_aes_decrypt_common(MIPSOcteonCryptoState *crypto, bool = cbc) +{ + AES_KEY key; + uint8_t in[16]; + uint8_t out[16]; + uint8_t iv[16]; + uint8_t next_iv[16]; + uint8_t raw_key[32] =3D {}; + int bits =3D octeon_aes_key_bits(crypto); + int i; + + if (!bits) { + return; + } + + octeon_aes_load_key(crypto, raw_key, bits / 8); + octeon_aes_load_block(crypto->aes_resinp, in); + if (cbc) { + memcpy(next_iv, in, sizeof(next_iv)); + octeon_aes_load_block(crypto->aes_iv, iv); + } + + AES_set_decrypt_key(raw_key, bits, &key); + AES_decrypt(in, out, &key); + if (cbc) { + for (i =3D 0; i < sizeof(out); i++) { + out[i] ^=3D iv[i]; + } + } + + octeon_aes_store_block(crypto->aes_resinp, out); + if (cbc) { + octeon_aes_store_block(crypto->aes_iv, next_iv); + } +} + +void helper_octeon_cp2_mt_aes_enc_cbc1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_aes_encrypt_common(crypto, true); +} + +void helper_octeon_cp2_mt_aes_enc1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_aes_encrypt_common(crypto, false); +} + +void helper_octeon_cp2_mt_aes_dec_cbc1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_aes_decrypt_common(crypto, true); +} + +void helper_octeon_cp2_mt_aes_dec1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_aes_decrypt_common(crypto, false); +} + void helper_octeon_cp2_mt_snow3g_start(CPUMIPSState *env, uint64_t value) { octeon_snow3g_start(&env->octeon_crypto, value); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386942; cv=none; d=zohomail.com; s=zohoarc; b=NjpoRffOw1oGM15BarVgojwvJ3BVxRTiunDiS/SLKJxbYd9HWOR6+i20ujoY/uoDj8tOV4M6xoJe0lJQnIgVhGk5aetS1lZRh52dx/CHuRs28ue5N2ZR0+GXpKCaGnjlYPR1ul0aC7tIRWOkXlCYabjDKwzhpqxzq8NfGPnrjHY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386942; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=W92ESlapdyO9qH3x4Uam7jTzjBzkYRQhK1ViYpc9r4U=; b=bMxcmW51TxcLG9e2HmoVRQ/ODnLrM5C4KoKKjGGeo7R6vto5W0EohZiKkrzDY6HF/D5TmuLXGzXhjRFIO2xdezGO6xhZaQqeMDNIUWN2UPqX5JNoexJ58i4hQlNIzOpj9pEjXgagQgCogyS1xnYY0UZLNz2ZoF6oeWTFHWp8+GE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386942414599.2847669695145; Thu, 21 May 2026 11:09:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7my-0000Ea-5A; Thu, 21 May 2026 14:06:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mw-0000CF-JS for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:30 -0400 Received: from mail-ot1-x32f.google.com ([2607:f8b0:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mu-00023H-1r for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:30 -0400 Received: by mail-ot1-x32f.google.com with SMTP id 46e09a7af769-7dcd9061b1aso5845968a34.2 for ; Thu, 21 May 2026 11:06:27 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386787; x=1779991587; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=W92ESlapdyO9qH3x4Uam7jTzjBzkYRQhK1ViYpc9r4U=; b=Ry4FbWPn6W+Jhx75CMsTVMMvGeTrK+MyXdBSiZECWVnAv/XAhLpACj0v9dM+wZzKwc TerR1vYI7u+jUW1g05ND3FyabPfzKueXQ11lak5fhQ/Pksj611D2dC7T20xTGAa4yetK E1554c+o6POnSx3fKd/ZNJ4UX4FPM0faq8qVraI7XREHL3yIdReP7SdzBlByYUs8lUnh l+JY2DU9t0tRmLuIeHUANCmCwWv0+Ka9/L32RrOvdxPqwFhOzbPfcKpPTR2v+CnrHo4q etVU1rHj42dVuKurBjSfOj6eu8qgKwd6zW3orVngZHAZ+I9V8BJ3Q/Ihk/w04OrODH8U 373g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386787; x=1779991587; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=W92ESlapdyO9qH3x4Uam7jTzjBzkYRQhK1ViYpc9r4U=; b=HsxBHUDdL1bPH1whrE8sV5MrGRF3gXP0PtDsXhZeQIhp1H6sEZ72PPhdx+50/G6UdV o8PPX0kIacqUPyjt62MvLOXFGFE/lNK3y+3eWA0UuZJqyPSLNBBD6d3rizp/DG1sVM8M A/jJswA3aRYBOdtincVPhq4E7ZBBmJ5Vpgd6qkz2/Mt5mhtnoz9kKAsigHdT07g7Hg1G n35p56NKmoYbLbDE/jFPx5Bzg44W+grVx5JAbQYpiSasOuWIbHE1pEAZIzjVKLHs3zTv jxLLl0mQrjg4T1AnV+8EnoKrVjmRt0x55NtOFS2ukrJ4YMHVAjCR34gCUtznMbM/3Ua8 APjQ== X-Gm-Message-State: AOJu0YzxBIB1p/n9dQ3GygqsJ1wfvQiAfdpj9AzYJKWumFzQ1caoRcrV GAJBJM/bK3yCaYLhB6L19Tr/WnEGUAbcND2+YDDmUoAS50Pdvu3xDKzU X-Gm-Gg: Acq92OGXiOEgi3/xClCxUDpkikHeoUWRz1fAisvggby4fuqZXYPcfkCciVH0eY1RY+x zGiqx8qlEmUk00CgLQ9adtPHP2duV2cKiuh82mCwYISusbaaoSk6PHqfWTxmS7afLLn+9tyL1Dx 9R/QKFSAkxOxpu2HbqNl5WfobItJopBYNDMBlWprtp4nLj5zj6LSiX+ddls0xxNd2dvF6K3yL3D RCi9N2Ef4RD9jPJTDD0TJYldTrT5Bxq5yxvk4+6EFo08lpkLbla9mDPA8FOHmrGENPxJHwh/ANN 2Q8EZFoEe1Lzy+O2N+YZpA4lLc969liW3uUsns4Qzx9xkt5A9xhf9LPqEoIYq5NPnyW+ynY6UD/ WleRU+I+GliFJTT0xXfO6qmbO0bs+/VUdaOJaXiiN58fFLab26c/3Q7a3gvQGv5f4Y69U9OUd2y kZ3Md43Hb4uIjf8zXbmdevUT5y6G503NFee6fH2CqIvbQDDRmAz8b+SxvmgXcul25myRGdokeCd FUok2X9dungdPXD+mtJg2j7Z6DasGSq0cL3YSbBXcPPWuUl/Hczq4b1Qc6UuhhmSQQd X-Received: by 2002:a05:6830:438e:b0:7d7:e3b9:58d6 with SMTP id 46e09a7af769-7e5fef848fcmr117651a34.22.1779386786655; Thu, 21 May 2026 11:06:26 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:03 -0600 Subject: [PATCH v13 10/22] target/mips: add Octeon SMS4 COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-10-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32f; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386942922158500 Add helper support for the Octeon SMS4 operation selectors. SMS4 reuses the AES RESINP, IV, and key banks, so the helpers share the existing AES state while implementing the SMS4 ECB/CBC encrypt and decrypt operations. Signed-off-by: James Hilliard --- Changes v8 -> v9: - Split SMS4 operation selectors into their own COP2 helper patch. - Replace generic selector dispatch with per-operation SMS4 helpers. - Add matching helper.h declarations with the helper implementation. Changes v5 -> v6: - Use RESINP wording for the SMS4 shared selector aliases. Changes v1 -> v2: - Add selector dispatch updates in octeon_translate.c after moving COP2 decode out of translate.c. (suggested by Philippe Mathieu-Daud=C3=A9) --- target/mips/helper.h | 4 ++ target/mips/tcg/octeon_crypto.c | 124 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 128 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index 1ab644bab5..64bb3ff8a5 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -78,6 +78,10 @@ DEF_HELPER_2(octeon_cp2_mt_aes_enc_cbc1, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_aes_enc1, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_aes_dec_cbc1, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_aes_dec1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sms4_enc_cbc1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sms4_enc1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sms4_dec_cbc1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_sms4_dec1, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 419f65bd29..64b553392a 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -1032,6 +1032,130 @@ void helper_octeon_cp2_mt_aes_dec1(CPUMIPSState *en= v, uint64_t value) octeon_aes_decrypt_common(crypto, false); } =20 +static inline uint32_t octeon_sms4_t(uint32_t x) +{ + x =3D sm4_subword(x); + return x ^ rol32(x, 2) ^ rol32(x, 10) ^ + rol32(x, 18) ^ rol32(x, 24); +} + +static inline uint32_t octeon_sms4_t_key(uint32_t x) +{ + x =3D sm4_subword(x); + return x ^ rol32(x, 13) ^ rol32(x, 23); +} + +static void octeon_sms4_expand_key(const uint8_t *key, uint32_t round_keys= [32]) +{ + static const uint32_t fk[4] =3D { + 0xa3b1bac6U, 0x56aa3350U, 0x677d9197U, 0xb27022dcU, + }; + uint32_t k[36]; + + for (int i =3D 0; i < 4; i++) { + k[i] =3D ldl_be_p(key + i * 4) ^ fk[i]; + } + for (int i =3D 0; i < 32; i++) { + k[i + 4] =3D k[i] ^ octeon_sms4_t_key(k[i + 1] ^ k[i + 2] ^ + k[i + 3] ^ sm4_ck[i]); + round_keys[i] =3D k[i + 4]; + } +} + +static void octeon_sms4_crypt_block(const uint8_t *in, uint8_t *out, + const uint32_t round_keys[32], + bool encrypt) +{ + uint32_t x[36]; + + for (int i =3D 0; i < 4; i++) { + x[i] =3D ldl_be_p(in + i * 4); + } + for (int i =3D 0; i < 32; i++) { + uint32_t rk =3D round_keys[encrypt ? i : 31 - i]; + + x[i + 4] =3D x[i] ^ octeon_sms4_t(x[i + 1] ^ x[i + 2] ^ + x[i + 3] ^ rk); + } + stl_be_p(out, x[35]); + stl_be_p(out + 4, x[34]); + stl_be_p(out + 8, x[33]); + stl_be_p(out + 12, x[32]); +} + +static void octeon_sms4_crypt_common(MIPSOcteonCryptoState *crypto, + bool encrypt, bool cbc) +{ + uint8_t key[16]; + uint8_t in[16]; + uint8_t out[16]; + uint8_t iv[16]; + uint8_t next_iv[16]; + uint32_t round_keys[32]; + + /* + * SMS4 aliases the AES state onto the RESINP, IV, and KEY banks, + * with only the operation selectors remaining distinct. + */ + octeon_aes_load_key(crypto, key, sizeof(key)); + octeon_aes_load_block(crypto->aes_resinp, in); + if (cbc) { + octeon_aes_load_block(crypto->aes_iv, iv); + if (encrypt) { + for (int i =3D 0; i < sizeof(in); i++) { + in[i] ^=3D iv[i]; + } + } else { + memcpy(next_iv, in, sizeof(next_iv)); + } + } + + octeon_sms4_expand_key(key, round_keys); + octeon_sms4_crypt_block(in, out, round_keys, encrypt); + if (cbc && !encrypt) { + for (int i =3D 0; i < sizeof(out); i++) { + out[i] ^=3D iv[i]; + } + } + + octeon_aes_store_block(crypto->aes_resinp, out); + if (cbc) { + octeon_aes_store_block(crypto->aes_iv, encrypt ? out : next_iv); + } +} + +void helper_octeon_cp2_mt_sms4_enc_cbc1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_sms4_crypt_common(crypto, true, true); +} + +void helper_octeon_cp2_mt_sms4_enc1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_sms4_crypt_common(crypto, true, false); +} + +void helper_octeon_cp2_mt_sms4_dec_cbc1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_sms4_crypt_common(crypto, false, true); +} + +void helper_octeon_cp2_mt_sms4_dec1(CPUMIPSState *env, uint64_t value) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->aes_resinp[1] =3D value; + octeon_sms4_crypt_common(crypto, false, false); +} + void helper_octeon_cp2_mt_snow3g_start(CPUMIPSState *env, uint64_t value) { octeon_snow3g_start(&env->octeon_crypto, value); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386979; cv=none; d=zohomail.com; s=zohoarc; b=KJChK7vxY76v7jVGzPps8m+AkGzGzCCDNV9XUdJcljR4CrdIU5KlxUIekG89vWtvawTKUN1b1cdPLu3JvnfEWz3vmHyQtet/UdVdxv8le7jCARvZtzIAGobUux44O4FOiBe87qTEtPPZxGvpsUU+cAFore/po8bv+o7B5Xi77cQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386979; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KCMCwSrvPApDaTT/eK8226LssVWE0QxPTwRU0tAy9hs=; b=PEukJgpubMht/92/1xXTCM1/loJp14BJUNo+HCrOfurjtNV19A54pgUls5r19avmWzg4lhOnYaZZzdmDS37Oxvy/LMl4SnTzjzQYYtb/Cc/dMELtcpQT5F6AQyKbRzT+OYSbzAtMGNqlO0fxv4S86Ked7ccaX44fEb6KbSlEv0M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386979837684.8875096083812; Thu, 21 May 2026 11:09:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7my-0000Ej-Hg; Thu, 21 May 2026 14:06:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mx-0000EB-IU for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:31 -0400 Received: from mail-ot1-x32d.google.com ([2607:f8b0:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mu-00023R-Pj for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:31 -0400 Received: by mail-ot1-x32d.google.com with SMTP id 46e09a7af769-7de7c57b52cso5824299a34.3 for ; Thu, 21 May 2026 11:06:28 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386787; x=1779991587; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=KCMCwSrvPApDaTT/eK8226LssVWE0QxPTwRU0tAy9hs=; b=g3ZyIFu/5DBHUnO1+CMudfQd4rm8XAc1tGBaSTpSGqQTC1XSfqZy/tLphJvliCNWd6 aiowukCfxtzlLDGx1LppzZhRaXnMxc7I+hpXu7XFgk+13Wm0r5AssmZQSgsqqBMgbmZ5 odimnWSOGTjfxbXPnOJxC0q9RXFOU6VsczBf9DzENADMckC0hz5/PTLbbMOI8XqaRh4R mtAwLprfVEn1nJT9L0sTyX/KNyw1kZLZWqbjX9mnM2ADm4GhCwXUXe5bn+b1hAn0DH6+ Qf7R5Kwg8Mgx82BLRXJwV5xA/ATzyhkzUgijkEFCJ7FpVo/OtPr+38kjk3iSFRQp3tYo lzLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386787; x=1779991587; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=KCMCwSrvPApDaTT/eK8226LssVWE0QxPTwRU0tAy9hs=; b=O+Vko1lZs0ZQe/E44HYnODwppJ/MOgwl4Xt+Qb6Q4sPQOD6JBPofgtSXpGRPqxEu6T R4vXCCuGeAuYjuIF26RoVGaknrpGKXXZFq6diXUpvXNRJ4HL0s3naH9vt0MAbLUhN1mP Kes/A0xrdHIOQFMtqqB8aj7jrSobaRZeU39IsC3CX+YaM0M4ZH74158/N+9TT1mLBNqj 1Kj9dcq5YH5LOHjDjIPN+UpmCmqY7QlJ8wAM5B45DC5hl6Nu61kXYISpEcbLXrA/hzZt Zk1NKGujoEx+E3RqVRQjoS1WbVE6z5G81I9N7Prfm8KgZcs6pmIp1FWXjgexxXWQDkpW 5E/A== X-Gm-Message-State: AOJu0YxO51pm8nvOMDTjSzCzRm4QHZ2n4tZzUK7+23gb+umf+E5845gR ABqJSYcpFX/4ElzAfxxepXl2Heuhp3WCPazsQ12dQ6UhAjnRddPpJEU9 X-Gm-Gg: Acq92OFJU/oHL1YhDAyZJ7r455RPUe5DoywaXWYyhJ0vu/ls9+8HIeBz7SexFrykyUN j0DANtK+bi3ku497LDsaMTf1eq5C9NO2YDxkYtTKRuNcCHRtmH2NqIYe3jZVhMxVoW/cDRsSogY gCCSK+v7N8t+w8QudgA7NhRihZbSBe5uhIe9co8L8mbKfxuVqWhgYX9+TNO4DK7ZT1uZueh5BGX dHFrJrIrhYoxZrwBgOQ7qQ3kJFeH3673cjeQ8VSjPD2DWAUcYRS6C5CPaoQMbD9uhAsaCuKV6AB cY/jTSPeSD7cssCVpu9N8lkV1qiTpZtXnVCO/oX/aiwaesbYD4yWR9qnDMoe0nBN85vyfe/+Pof YKC71oxtLqoZDxgegA7QA7QblW43PRA9KOK0nJK0AXPmgzu6UpJA5ddcRtOChONeTmvnjAfqOZK A4gOXQs5dpTHJCq/fHNClwlZzBpKhk3uyc86J2O5X4PfDGc6L0z3r5p57B5PHb+P9HhliU1aDsw T71MW3ZWd//jw+NkZpGGPI3iPJLDPON0LOxwM4h1frzLnyLRndAcd/5hH0YmZVHuDL0Ztpsp70u SZJdxI5ulCF0UA== X-Received: by 2002:a05:6830:4119:b0:7d7:f031:37bf with SMTP id 46e09a7af769-7e5fef203a8mr125704a34.19.1779386787502; Thu, 21 May 2026 11:06:27 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:04 -0600 Subject: [PATCH v13 11/22] target/mips: add Octeon 3DES and KASUMI COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-11-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32d; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32d.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386981124158500 Add helper support for the Octeon 3DES and KASUMI operation selectors. The 3DES helpers implement ECB and CBC encrypt/decrypt over the shared 3DES key, IV, and result bank. KASUMI reuses the same register bank and adds its own encrypt selectors. Only the operation selectors require helper code. Simple key, IV, and result register transfers are handled by direct selector decode. Signed-off-by: James Hilliard --- Changes v8 -> v9: - Split 3DES/KASUMI operation selectors into their own COP2 helper patch. - Replace generic selector dispatch with per-operation 3DES/KASUMI helpers. - Add matching helper.h declarations with the helper implementation. --- target/mips/helper.h | 6 + target/mips/tcg/octeon_crypto.c | 458 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 464 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index 64bb3ff8a5..444eeeb3ec 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -82,6 +82,12 @@ DEF_HELPER_2(octeon_cp2_mt_sms4_enc_cbc1, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_sms4_enc1, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_sms4_dec_cbc1, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_sms4_dec1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_des3_enc_cbc, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_kas_enc_cbc, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_des3_enc, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_kas_enc, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_des3_dec_cbc, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_des3_dec, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 64b553392a..893f55d1e5 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -1156,6 +1156,464 @@ void helper_octeon_cp2_mt_sms4_dec1(CPUMIPSState *e= nv, uint64_t value) octeon_sms4_crypt_common(crypto, false, false); } =20 +static const uint8_t octeon_des_ip[64] =3D { + 58, 50, 42, 34, 26, 18, 10, 2, + 60, 52, 44, 36, 28, 20, 12, 4, + 62, 54, 46, 38, 30, 22, 14, 6, + 64, 56, 48, 40, 32, 24, 16, 8, + 57, 49, 41, 33, 25, 17, 9, 1, + 59, 51, 43, 35, 27, 19, 11, 3, + 61, 53, 45, 37, 29, 21, 13, 5, + 63, 55, 47, 39, 31, 23, 15, 7, +}; + +static const uint8_t octeon_des_fp[64] =3D { + 40, 8, 48, 16, 56, 24, 64, 32, + 39, 7, 47, 15, 55, 23, 63, 31, + 38, 6, 46, 14, 54, 22, 62, 30, + 37, 5, 45, 13, 53, 21, 61, 29, + 36, 4, 44, 12, 52, 20, 60, 28, + 35, 3, 43, 11, 51, 19, 59, 27, + 34, 2, 42, 10, 50, 18, 58, 26, + 33, 1, 41, 9, 49, 17, 57, 25, +}; + +static const uint8_t octeon_des_e[48] =3D { + 32, 1, 2, 3, 4, 5, + 4, 5, 6, 7, 8, 9, + 8, 9, 10, 11, 12, 13, + 12, 13, 14, 15, 16, 17, + 16, 17, 18, 19, 20, 21, + 20, 21, 22, 23, 24, 25, + 24, 25, 26, 27, 28, 29, + 28, 29, 30, 31, 32, 1, +}; + +static const uint8_t octeon_des_p[32] =3D { + 16, 7, 20, 21, 29, 12, 28, 17, + 1, 15, 23, 26, 5, 18, 31, 10, + 2, 8, 24, 14, 32, 27, 3, 9, + 19, 13, 30, 6, 22, 11, 4, 25, +}; + +static const uint8_t octeon_des_pc1[56] =3D { + 57, 49, 41, 33, 25, 17, 9, + 1, 58, 50, 42, 34, 26, 18, + 10, 2, 59, 51, 43, 35, 27, + 19, 11, 3, 60, 52, 44, 36, + 63, 55, 47, 39, 31, 23, 15, + 7, 62, 54, 46, 38, 30, 22, + 14, 6, 61, 53, 45, 37, 29, + 21, 13, 5, 28, 20, 12, 4, +}; + +static const uint8_t octeon_des_pc2[48] =3D { + 14, 17, 11, 24, 1, 5, + 3, 28, 15, 6, 21, 10, + 23, 19, 12, 4, 26, 8, + 16, 7, 27, 20, 13, 2, + 41, 52, 31, 37, 47, 55, + 30, 40, 51, 45, 33, 48, + 44, 49, 39, 56, 34, 53, + 46, 42, 50, 36, 29, 32, +}; + +static const uint8_t octeon_des_rotations[16] =3D { + 1, 1, 2, 2, 2, 2, 2, 2, + 1, 2, 2, 2, 2, 2, 2, 1, +}; + +static const uint8_t octeon_des_sboxes[8][64] =3D { + { + 14, 4, 13, 1, 2, 15, 11, 8, 3, 10, 6, 12, 5, 9, 0, 7, + 0, 15, 7, 4, 14, 2, 13, 1, 10, 6, 12, 11, 9, 5, 3, 8, + 4, 1, 14, 8, 13, 6, 2, 11, 15, 12, 9, 7, 3, 10, 5, 0, + 15, 12, 8, 2, 4, 9, 1, 7, 5, 11, 3, 14, 10, 0, 6, 13, + }, + { + 15, 1, 8, 14, 6, 11, 3, 4, 9, 7, 2, 13, 12, 0, 5, 10, + 3, 13, 4, 7, 15, 2, 8, 14, 12, 0, 1, 10, 6, 9, 11, 5, + 0, 14, 7, 11, 10, 4, 13, 1, 5, 8, 12, 6, 9, 3, 2, 15, + 13, 8, 10, 1, 3, 15, 4, 2, 11, 6, 7, 12, 0, 5, 14, 9, + }, + { + 10, 0, 9, 14, 6, 3, 15, 5, 1, 13, 12, 7, 11, 4, 2, 8, + 13, 7, 0, 9, 3, 4, 6, 10, 2, 8, 5, 14, 12, 11, 15, 1, + 13, 6, 4, 9, 8, 15, 3, 0, 11, 1, 2, 12, 5, 10, 14, 7, + 1, 10, 13, 0, 6, 9, 8, 7, 4, 15, 14, 3, 11, 5, 2, 12, + }, + { + 7, 13, 14, 3, 0, 6, 9, 10, 1, 2, 8, 5, 11, 12, 4, 15, + 13, 8, 11, 5, 6, 15, 0, 3, 4, 7, 2, 12, 1, 10, 14, 9, + 10, 6, 9, 0, 12, 11, 7, 13, 15, 1, 3, 14, 5, 2, 8, 4, + 3, 15, 0, 6, 10, 1, 13, 8, 9, 4, 5, 11, 12, 7, 2, 14, + }, + { + 2, 12, 4, 1, 7, 10, 11, 6, 8, 5, 3, 15, 13, 0, 14, 9, + 14, 11, 2, 12, 4, 7, 13, 1, 5, 0, 15, 10, 3, 9, 8, 6, + 4, 2, 1, 11, 10, 13, 7, 8, 15, 9, 12, 5, 6, 3, 0, 14, + 11, 8, 12, 7, 1, 14, 2, 13, 6, 15, 0, 9, 10, 4, 5, 3, + }, + { + 12, 1, 10, 15, 9, 2, 6, 8, 0, 13, 3, 4, 14, 7, 5, 11, + 10, 15, 4, 2, 7, 12, 9, 5, 6, 1, 13, 14, 0, 11, 3, 8, + 9, 14, 15, 5, 2, 8, 12, 3, 7, 0, 4, 10, 1, 13, 11, 6, + 4, 3, 2, 12, 9, 5, 15, 10, 11, 14, 1, 7, 6, 0, 8, 13, + }, + { + 4, 11, 2, 14, 15, 0, 8, 13, 3, 12, 9, 7, 5, 10, 6, 1, + 13, 0, 11, 7, 4, 9, 1, 10, 14, 3, 5, 12, 2, 15, 8, 6, + 1, 4, 11, 13, 12, 3, 7, 14, 10, 15, 6, 8, 0, 5, 9, 2, + 6, 11, 13, 8, 1, 4, 10, 7, 9, 5, 0, 15, 14, 2, 3, 12, + }, + { + 13, 2, 8, 4, 6, 15, 11, 1, 10, 9, 3, 14, 5, 0, 12, 7, + 1, 15, 13, 8, 10, 3, 7, 4, 12, 5, 6, 11, 0, 14, 9, 2, + 7, 11, 4, 1, 9, 12, 14, 2, 0, 6, 10, 13, 15, 3, 5, 8, + 2, 1, 14, 7, 4, 10, 8, 13, 15, 12, 9, 0, 3, 5, 6, 11, + }, +}; + +static const uint8_t octeon_kasumi_s7[128] =3D { + 54, 50, 62, 56, 22, 34, 94, 96, 38, 6, 63, 93, 2, 18, + 123, 33, 55, 113, 39, 114, 21, 67, 65, 12, 47, 73, 46, 27, + 25, 111, 124, 81, 53, 9, 121, 79, 52, 60, 58, 48, 101, 127, + 40, 120, 104, 70, 71, 43, 20, 122, 72, 61, 23, 109, 13, 100, + 77, 1, 16, 7, 82, 10, 105, 98, 117, 116, 76, 11, 89, 106, + 0, 125, 118, 99, 86, 69, 30, 57, 126, 87, 112, 51, 17, 5, + 95, 14, 90, 84, 91, 8, 35, 103, 32, 97, 28, 66, 102, 31, + 26, 45, 75, 4, 85, 92, 37, 74, 80, 49, 68, 29, 115, 44, + 64, 107, 108, 24, 110, 83, 36, 78, 42, 19, 15, 41, 88, 119, + 59, 3, +}; + +static const uint16_t octeon_kasumi_s9[512] =3D { + 167, 239, 161, 379, 391, 334, 9, 338, 38, 226, 48, 358, 452, 385, + 90, 397, 183, 253, 147, 331, 415, 340, 51, 362, 306, 500, 262, 82, + 216, 159, 356, 177, 175, 241, 489, 37, 206, 17, 0, 333, 44, 254, + 378, 58, 143, 220, 81, 400, 95, 3, 315, 245, 54, 235, 218, 405, + 472, 264, 172, 494, 371, 290, 399, 76, 165, 197, 395, 121, 257, 480, + 423, 212, 240, 28, 462, 176, 406, 507, 288, 223, 501, 407, 249, 265, + 89, 186, 221, 428, 164, 74, 440, 196, 458, 421, 350, 163, 232, 158, + 134, 354, 13, 250, 491, 142, 191, 69, 193, 425, 152, 227, 366, 135, + 344, 300, 276, 242, 437, 320, 113, 278, 11, 243, 87, 317, 36, 93, + 496, 27, 487, 446, 482, 41, 68, 156, 457, 131, 326, 403, 339, 20, + 39, 115, 442, 124, 475, 384, 508, 53, 112, 170, 479, 151, 126, 169, + 73, 268, 279, 321, 168, 364, 363, 292, 46, 499, 393, 327, 324, 24, + 456, 267, 157, 460, 488, 426, 309, 229, 439, 506, 208, 271, 349, 401, + 434, 236, 16, 209, 359, 52, 56, 120, 199, 277, 465, 416, 252, 287, + 246, 6, 83, 305, 420, 345, 153, 502, 65, 61, 244, 282, 173, 222, + 418, 67, 386, 368, 261, 101, 476, 291, 195, 430, 49, 79, 166, 330, + 280, 383, 373, 128, 382, 408, 155, 495, 367, 388, 274, 107, 459, 417, + 62, 454, 132, 225, 203, 316, 234, 14, 301, 91, 503, 286, 424, 211, + 347, 307, 140, 374, 35, 103, 125, 427, 19, 214, 453, 146, 498, 314, + 444, 230, 256, 329, 198, 285, 50, 116, 78, 410, 10, 205, 510, 171, + 231, 45, 139, 467, 29, 86, 505, 32, 72, 26, 342, 150, 313, 490, + 431, 238, 411, 325, 149, 473, 40, 119, 174, 355, 185, 233, 389, 71, + 448, 273, 372, 55, 110, 178, 322, 12, 469, 392, 369, 190, 1, 109, + 375, 137, 181, 88, 75, 308, 260, 484, 98, 272, 370, 275, 412, 111, + 336, 318, 4, 504, 492, 259, 304, 77, 337, 435, 21, 357, 303, 332, + 483, 18, 47, 85, 25, 497, 474, 289, 100, 269, 296, 478, 270, 106, + 31, 104, 433, 84, 414, 486, 394, 96, 99, 154, 511, 148, 413, 361, + 409, 255, 162, 215, 302, 201, 266, 351, 343, 144, 441, 365, 108, 298, + 251, 34, 182, 509, 138, 210, 335, 133, 311, 352, 328, 141, 396, 346, + 123, 319, 450, 281, 429, 228, 443, 481, 92, 404, 485, 422, 248, 297, + 23, 213, 130, 466, 22, 217, 283, 70, 294, 360, 419, 127, 312, 377, + 7, 468, 194, 2, 117, 295, 463, 258, 224, 447, 247, 187, 80, 398, + 284, 353, 105, 390, 299, 471, 470, 184, 57, 200, 348, 63, 204, 188, + 33, 451, 97, 30, 310, 219, 94, 160, 129, 493, 64, 179, 263, 102, + 189, 207, 114, 402, 438, 477, 387, 122, 192, 42, 381, 5, 145, 118, + 180, 449, 293, 323, 136, 380, 43, 66, 60, 455, 341, 445, 202, 432, + 8, 237, 15, 376, 436, 464, 59, 461, +}; + +static const uint16_t octeon_kasumi_constants[8] =3D { + 0x0123, 0x4567, 0x89ab, 0xcdef, 0xfedc, 0xba98, 0x7654, 0x3210, +}; + +typedef struct OcteonKasumiSubkeys { + uint16_t kli1[8]; + uint16_t kli2[8]; + uint16_t koi1[8]; + uint16_t koi2[8]; + uint16_t koi3[8]; + uint16_t kii1[8]; + uint16_t kii2[8]; + uint16_t kii3[8]; +} OcteonKasumiSubkeys; + +static uint64_t octeon_des_permute(uint64_t input, const uint8_t *table, + size_t output_bits, size_t input_bits) +{ + uint64_t out =3D 0; + + for (size_t i =3D 0; i < output_bits; i++) { + unsigned src =3D table[i] - 1; + + out =3D (out << 1) | ((input >> (input_bits - 1 - src)) & 1); + } + return out; +} + +static uint32_t octeon_des_rotate28(uint32_t v, unsigned shift) +{ + return ((v << shift) | (v >> (28 - shift))) & 0x0fffffffU; +} + +static void octeon_des_expand_subkeys(uint64_t key, uint64_t subkeys[16]) +{ + uint64_t permuted =3D octeon_des_permute(key, octeon_des_pc1, + ARRAY_SIZE(octeon_des_pc1), 64); + uint32_t c =3D (permuted >> 28) & 0x0fffffffU; + uint32_t d =3D permuted & 0x0fffffffU; + + for (int i =3D 0; i < 16; i++) { + c =3D octeon_des_rotate28(c, octeon_des_rotations[i]); + d =3D octeon_des_rotate28(d, octeon_des_rotations[i]); + subkeys[i] =3D octeon_des_permute(((uint64_t)c << 28) | d, + octeon_des_pc2, + ARRAY_SIZE(octeon_des_pc2), 56); + } +} + +static uint32_t octeon_des_f(uint32_t r, uint64_t subkey) +{ + uint64_t expanded =3D octeon_des_permute(r, octeon_des_e, + ARRAY_SIZE(octeon_des_e), 32); + uint32_t out =3D 0; + + expanded ^=3D subkey; + for (int i =3D 0; i < 8; i++) { + uint8_t sextet =3D (expanded >> (42 - i * 6)) & 0x3f; + uint8_t row =3D ((sextet & 0x20) >> 4) | (sextet & 0x01); + uint8_t col =3D (sextet >> 1) & 0x0f; + + out =3D (out << 4) | octeon_des_sboxes[i][row * 16 + col]; + } + + return octeon_des_permute(out, octeon_des_p, ARRAY_SIZE(octeon_des_p),= 32); +} + +static uint64_t octeon_des_block_crypt(uint64_t block, uint64_t key, + bool encrypt) +{ + uint64_t subkeys[16]; + uint64_t permuted =3D octeon_des_permute(block, octeon_des_ip, + ARRAY_SIZE(octeon_des_ip), 64); + uint32_t l =3D permuted >> 32; + uint32_t r =3D permuted; + + octeon_des_expand_subkeys(key, subkeys); + + for (int i =3D 0; i < 16; i++) { + uint32_t next =3D l ^ octeon_des_f(r, subkeys[encrypt ? i : 15 - i= ]); + + l =3D r; + r =3D next; + } + + return octeon_des_permute(((uint64_t)r << 32) | l, + octeon_des_fp, ARRAY_SIZE(octeon_des_fp), 64= ); +} + +static uint64_t octeon_3des_block_crypt(uint64_t block, const uint64_t key= s[3], + bool encrypt) +{ + if (encrypt) { + block =3D octeon_des_block_crypt(block, keys[0], true); + block =3D octeon_des_block_crypt(block, keys[1], false); + block =3D octeon_des_block_crypt(block, keys[2], true); + } else { + block =3D octeon_des_block_crypt(block, keys[2], false); + block =3D octeon_des_block_crypt(block, keys[1], true); + block =3D octeon_des_block_crypt(block, keys[0], false); + } + return block; +} + +static void octeon_3des_crypt_common(MIPSOcteonCryptoState *crypto, + uint64_t input_reg, + bool encrypt, bool cbc) +{ + const uint64_t keys[3] =3D { + crypto->des3_key[0], + crypto->des3_key[1], + crypto->des3_key[2], + }; + uint64_t block =3D input_reg; + + if (cbc) { + if (encrypt) { + block ^=3D crypto->des3_iv; + block =3D octeon_3des_block_crypt(block, keys, true); + crypto->des3_iv =3D block; + } else { + block =3D octeon_3des_block_crypt(block, keys, false); + block ^=3D crypto->des3_iv; + crypto->des3_iv =3D input_reg; + } + } else { + block =3D octeon_3des_block_crypt(block, keys, encrypt); + } + + crypto->des3_result =3D block; +} + +static inline uint16_t octeon_rol16(uint16_t value, unsigned int bits) +{ + return (value << bits) | (value >> (16 - bits)); +} + +static void octeon_kasumi_key_schedule(const uint64_t key_regs[2], + OcteonKasumiSubkeys *subkeys) +{ + uint16_t key[8]; + uint16_t key_prime[8]; + + key[0] =3D key_regs[0] >> 48; + key[1] =3D key_regs[0] >> 32; + key[2] =3D key_regs[0] >> 16; + key[3] =3D key_regs[0]; + key[4] =3D key_regs[1] >> 48; + key[5] =3D key_regs[1] >> 32; + key[6] =3D key_regs[1] >> 16; + key[7] =3D key_regs[1]; + + for (int i =3D 0; i < 8; i++) { + key_prime[i] =3D key[i] ^ octeon_kasumi_constants[i]; + } + + for (int i =3D 0; i < 8; i++) { + subkeys->kli1[i] =3D octeon_rol16(key[i], 1); + subkeys->kli2[i] =3D key_prime[(i + 2) & 7]; + subkeys->koi1[i] =3D octeon_rol16(key[(i + 1) & 7], 5); + subkeys->koi2[i] =3D octeon_rol16(key[(i + 5) & 7], 8); + subkeys->koi3[i] =3D octeon_rol16(key[(i + 6) & 7], 13); + subkeys->kii1[i] =3D key_prime[(i + 4) & 7]; + subkeys->kii2[i] =3D key_prime[(i + 3) & 7]; + subkeys->kii3[i] =3D key_prime[(i + 7) & 7]; + } +} + +static uint16_t octeon_kasumi_fi(uint16_t in, uint16_t subkey) +{ + uint16_t nine =3D in >> 7; + uint16_t seven =3D in & 0x7f; + + nine =3D octeon_kasumi_s9[nine] ^ seven; + seven =3D octeon_kasumi_s7[seven] ^ (nine & 0x7f); + seven ^=3D subkey >> 9; + nine ^=3D subkey & 0x1ff; + nine =3D octeon_kasumi_s9[nine] ^ seven; + seven =3D octeon_kasumi_s7[seven] ^ (nine & 0x7f); + return (seven << 9) | nine; +} + +static uint32_t octeon_kasumi_fo(uint32_t in, int index, + const OcteonKasumiSubkeys *subkeys) +{ + uint16_t left =3D in >> 16; + uint16_t right =3D in; + + left ^=3D subkeys->koi1[index]; + left =3D octeon_kasumi_fi(left, subkeys->kii1[index]); + left ^=3D right; + right ^=3D subkeys->koi2[index]; + right =3D octeon_kasumi_fi(right, subkeys->kii2[index]); + right ^=3D left; + left ^=3D subkeys->koi3[index]; + left =3D octeon_kasumi_fi(left, subkeys->kii3[index]); + left ^=3D right; + + return ((uint32_t)right << 16) | left; +} + +static uint32_t octeon_kasumi_fl(uint32_t in, int index, + const OcteonKasumiSubkeys *subkeys) +{ + uint16_t left =3D in >> 16; + uint16_t right =3D in; + uint16_t a =3D left & subkeys->kli1[index]; + uint16_t b; + + right ^=3D octeon_rol16(a, 1); + b =3D right | subkeys->kli2[index]; + left ^=3D octeon_rol16(b, 1); + return ((uint32_t)left << 16) | right; +} + +static uint64_t octeon_kasumi_block_encrypt(uint64_t block, + const uint64_t key_regs[2]) +{ + OcteonKasumiSubkeys subkeys; + uint32_t left =3D block >> 32; + uint32_t right =3D block; + + octeon_kasumi_key_schedule(key_regs, &subkeys); + + for (int i =3D 0; i < 8; ) { + uint32_t temp =3D octeon_kasumi_fl(left, i, &subkeys); + + temp =3D octeon_kasumi_fo(temp, i++, &subkeys); + right ^=3D temp; + temp =3D octeon_kasumi_fo(right, i, &subkeys); + temp =3D octeon_kasumi_fl(temp, i++, &subkeys); + left ^=3D temp; + } + + return ((uint64_t)left << 32) | right; +} + +static void octeon_kasumi_crypt_common(MIPSOcteonCryptoState *crypto, + uint64_t input_reg, bool cbc) +{ + const uint64_t key_regs[2] =3D { + crypto->des3_key[0], + crypto->des3_key[1], + }; + uint64_t block =3D input_reg; + + if (cbc) { + block ^=3D crypto->des3_iv; + } + + block =3D octeon_kasumi_block_encrypt(block, key_regs); + if (cbc) { + crypto->des3_iv =3D block; + } + crypto->des3_result =3D block; +} + +void helper_octeon_cp2_mt_des3_enc_cbc(CPUMIPSState *env, uint64_t value) +{ + octeon_3des_crypt_common(&env->octeon_crypto, value, true, true); +} + +void helper_octeon_cp2_mt_kas_enc_cbc(CPUMIPSState *env, uint64_t value) +{ + octeon_kasumi_crypt_common(&env->octeon_crypto, value, true); +} + +void helper_octeon_cp2_mt_des3_enc(CPUMIPSState *env, uint64_t value) +{ + octeon_3des_crypt_common(&env->octeon_crypto, value, true, false); +} + +void helper_octeon_cp2_mt_kas_enc(CPUMIPSState *env, uint64_t value) +{ + octeon_kasumi_crypt_common(&env->octeon_crypto, value, false); +} + +void helper_octeon_cp2_mt_des3_dec_cbc(CPUMIPSState *env, uint64_t value) +{ + octeon_3des_crypt_common(&env->octeon_crypto, value, false, true); +} + +void helper_octeon_cp2_mt_des3_dec(CPUMIPSState *env, uint64_t value) +{ + octeon_3des_crypt_common(&env->octeon_crypto, value, false, false); +} + void helper_octeon_cp2_mt_snow3g_start(CPUMIPSState *env, uint64_t value) { octeon_snow3g_start(&env->octeon_crypto, value); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386821; cv=none; d=zohomail.com; s=zohoarc; b=Ukc5zurN+u1p65WiLzE+30QCdnq42xjwAvKd1/tRuW4rQWP/VIczqWfI3WvJsmwcd/H3vjdOe5U1zB7DVwqySGfmXRQKkWVyZHuHDOVaOjRMO08L/tKhlIRR8ltoQwRDEZyDpPwp6zRRekx6uoey/9trtisSaB9tuPqwRHSqQ8M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386821; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=1/wDEtjpU6/JQCX42z91k/04b23uAyh66zeRkKaauFU=; b=YR4OpNYF4EvSMdkYA3X9r2323Gxn4weU4HIte71PCFIZUNBRROpWzVxRys0ielSlOtVa23PMjseWVQboQVRUH5YMKurivgSMfrDp3WCUWcJd6jOWGK8w2P5t3PrkbsTvqwAUcjqqgay+9xmc/B9PcplRfjFDiVvqBfHSPqtE3Ws= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386821242355.9508231777704; Thu, 21 May 2026 11:07:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7mz-0000Fu-W7; Thu, 21 May 2026 14:06:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7my-0000EZ-2b for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:32 -0400 Received: from mail-ot1-x329.google.com ([2607:f8b0:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mv-00023h-GF for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:31 -0400 Received: by mail-ot1-x329.google.com with SMTP id 46e09a7af769-7de46b8e432so6326762a34.1 for ; Thu, 21 May 2026 11:06:29 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386788; x=1779991588; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=1/wDEtjpU6/JQCX42z91k/04b23uAyh66zeRkKaauFU=; b=swrB0LVk8RHjnHFiTrJYEqc/jPt0lFEV3JGKabMjNIunuPn3WoYEi7kkOQnmORe5Cx AGWwHqcyaJrWAO+1OJ5c6bNI2xglUYyubpY85l+JluKAfzrTZCw5P0w8MwV954uMQWgM GT6K1923o0PakbWAIGNCfKivIY/7WR2ysheicZUm1+lv19E7CX7Weq2bM0d3benLL3pp LMg6viSfxOBs8zuQmabhKp2AuN08dF6YqmD3ovs4iy1rQ8rBJPEgUHpn1c8YkUnV97Ps RV8UVvYvTiS21qWPpBBIhtCuwvntKQGmuMZUGJFsOzx6sx0PcUYUYBV3T7u5E8KHD4aM BJzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386788; x=1779991588; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=1/wDEtjpU6/JQCX42z91k/04b23uAyh66zeRkKaauFU=; b=UuWjoRAWwlg4BALtgeGscLOgzSTq5NGNhLjYzdsii4fe+XPlajQ2jL2/+9kK0Wt8p+ UDKoNw9gKMyzILcM7UJuoKfLwW2JWDTcWAphC2/OokkktfrjdCwYiz6iJll+UYAjJ4iu +sWXrY/EBHv5iRgkpRRQ1MzLh1cvJwc4+MEpXGn82k6IYwo07FdZNb4ys38vBEVOX3sa G15gZasp7QMUS3yEujQUe3dwpXANfoHR4aGbJVn3ROF6JOMLeJsxLHlMDFKOGdZBS9Fb OvQ2yFQuy0MKOnMlZ8lc7QRYI2eb1lVPUekLuZlBf8xRTTctmTfhoKDLsEhtyR7xT4g9 fB8A== X-Gm-Message-State: AOJu0YynWIQEShvV1+WCw7KbQpMQYFvt+qOVmLAzJqkl3ncBLBkC1MdF gCDFEWmP5HsSU3NxZ9xVrqGgHEGmG5ncSrt7Gdc1u/vJ/ATFXxAhQmTi X-Gm-Gg: Acq92OH6zTbmfaed0B4/OWpQMr0VsPeZ6JuUS3q3x0dtGU5sKR5QnVfzi9gc8W6p5SJ UB/P/goS3bpuYsgz2G8DyCyNQp3dM+LqiUTUpR11lVEcbjc/3M1/nssV16sbyl4DaP6wC/Eg/W7 XRsbXcNvGoUcJ18NVCyM01JY5vFKY9XWScOzPv2VUzbKlb2x/eyRutwf/uUEch4CvPE4wwXB+DU lQqtY9ixmDyTSDCQQXwnfF8kEhzymT+HHcJfwWl0PyxJyC5tpwcfPASKWyGAYc5WHJFs0MpA3de CtUbd7X5Yi7MHoIO0uaUfG6UwG99VWnfkCn8iCHM7szC9Msvp/NDstsHy3R2JZDK0P1ReWMM0bo +nJQASU4EaTKQHYIn6L6ti+KcdRfCa7mpJjal+sWIpeLo0PJCIaN4sYu+fOtejcziON4bstKh0W VzUDPuzveMHq27u93plaGB8Pa35zQIzqd5GXSWmcaDTR6anamVNVMCiKtCFk25mg8BRKt5ZbBYy JfTgUoZFWRFUCfS0ZR8jZSaSpiJdC54ftWsZo7tKD5ytFrbbCpvsZkG1MEm9cZJ54og X-Received: by 2002:a05:6830:6285:b0:7df:5fc:3fd8 with SMTP id 46e09a7af769-7e5fed0ab9cmr157667a34.1.1779386788436; Thu, 21 May 2026 11:06:28 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:05 -0600 Subject: [PATCH v13 12/22] target/mips: add Octeon Camellia COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-12-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::329; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x329.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386825110154100 Add helper support for the Octeon Camellia ROUND, FL, and FLINV selectors. The engine reuses the AES RESINP bank, and guest-managed key schedules drive the Camellia F-function and FL layers through these COP2 operations. Implement the Camellia F-function and FL layers directly from RFC 3713. Signed-off-by: James Hilliard --- Changes v8 -> v9: - Split Camellia operation selectors into their own COP2 helper patch. - Replace generic selector dispatch with per-operation Camellia helpers. - Add matching helper.h declarations with the helper implementation. Changes v5 -> v6: - Use RESINP wording for the Camellia shared selector aliases. Changes v1 -> v2: - Drop the Octeon prefix from generic Camellia helper routines. (suggested by Philippe Mathieu-Daud=C3=A9) - Add selector dispatch updates in octeon_translate.c after moving COP2 decode out of translate.c. (suggested by Philippe Mathieu-Daud=C3=A9) --- target/mips/helper.h | 3 + target/mips/tcg/octeon_crypto.c | 126 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 129 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index 444eeeb3ec..fbf8250932 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -88,6 +88,9 @@ DEF_HELPER_2(octeon_cp2_mt_des3_enc, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_kas_enc, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_des3_dec_cbc, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_des3_dec, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_camellia_fl, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_camellia_flinv, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_camellia_round, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 893f55d1e5..5bb21098fc 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -1614,6 +1614,132 @@ void helper_octeon_cp2_mt_des3_dec(CPUMIPSState *en= v, uint64_t value) octeon_3des_crypt_common(&env->octeon_crypto, value, false, false); } =20 +static const uint8_t camellia_sbox1[256] =3D { + 112, 130, 44, 236, 179, 39, 192, 229, 228, 133, 87, 53, 234, 12, + 174, 65, 35, 239, 107, 147, 69, 25, 165, 33, 237, 14, 79, 78, + 29, 101, 146, 189, 134, 184, 175, 143, 124, 235, 31, 206, 62, 48, + 220, 95, 94, 197, 11, 26, 166, 225, 57, 202, 213, 71, 93, 61, + 217, 1, 90, 214, 81, 86, 108, 77, 139, 13, 154, 102, 251, 204, + 176, 45, 116, 18, 43, 32, 240, 177, 132, 153, 223, 76, 203, 194, + 52, 126, 118, 5, 109, 183, 169, 49, 209, 23, 4, 215, 20, 88, + 58, 97, 222, 27, 17, 28, 50, 15, 156, 22, 83, 24, 242, 34, + 254, 68, 207, 178, 195, 181, 122, 145, 36, 8, 232, 168, 96, 252, + 105, 80, 170, 208, 160, 125, 161, 137, 98, 151, 84, 91, 30, 149, + 224, 255, 100, 210, 16, 196, 0, 72, 163, 247, 117, 219, 138, 3, + 230, 218, 9, 63, 221, 148, 135, 92, 131, 2, 205, 74, 144, 51, + 115, 103, 246, 243, 157, 127, 191, 226, 82, 155, 216, 38, 200, 55, + 198, 59, 129, 150, 111, 75, 19, 190, 99, 46, 233, 121, 167, 140, + 159, 110, 188, 142, 41, 245, 249, 182, 47, 253, 180, 89, 120, 152, + 6, 106, 231, 70, 113, 186, 212, 37, 171, 66, 136, 162, 141, 250, + 114, 7, 185, 85, 248, 238, 172, 10, 54, 73, 42, 104, 60, 56, + 241, 164, 64, 40, 211, 123, 187, 201, 67, 193, 21, 227, 173, 244, + 119, 199, 128, 158, +}; + +static inline uint8_t camellia_rotl8(uint8_t v, unsigned int shift) +{ + return (v << shift) | (v >> (8 - shift)); +} + +static inline uint8_t camellia_sbox2(uint8_t x) +{ + return camellia_rotl8(camellia_sbox1[x], 1); +} + +static inline uint8_t camellia_sbox3(uint8_t x) +{ + return camellia_rotl8(camellia_sbox1[x], 7); +} + +static inline uint8_t camellia_sbox4(uint8_t x) +{ + return camellia_sbox1[camellia_rotl8(x, 1)]; +} + +static uint64_t camellia_f(uint64_t input, uint64_t key) +{ + uint64_t x =3D input ^ key; + uint8_t t1 =3D camellia_sbox1[x >> 56]; + uint8_t t2 =3D camellia_sbox2((x >> 48) & 0xff); + uint8_t t3 =3D camellia_sbox3((x >> 40) & 0xff); + uint8_t t4 =3D camellia_sbox4((x >> 32) & 0xff); + uint8_t t5 =3D camellia_sbox2((x >> 24) & 0xff); + uint8_t t6 =3D camellia_sbox3((x >> 16) & 0xff); + uint8_t t7 =3D camellia_sbox4((x >> 8) & 0xff); + uint8_t t8 =3D camellia_sbox1[x & 0xff]; + uint8_t y1 =3D t1 ^ t3 ^ t4 ^ t6 ^ t7 ^ t8; + uint8_t y2 =3D t1 ^ t2 ^ t4 ^ t5 ^ t7 ^ t8; + uint8_t y3 =3D t1 ^ t2 ^ t3 ^ t5 ^ t6 ^ t8; + uint8_t y4 =3D t2 ^ t3 ^ t4 ^ t5 ^ t6 ^ t7; + uint8_t y5 =3D t1 ^ t2 ^ t6 ^ t7 ^ t8; + uint8_t y6 =3D t2 ^ t3 ^ t5 ^ t7 ^ t8; + uint8_t y7 =3D t3 ^ t4 ^ t5 ^ t6 ^ t8; + uint8_t y8 =3D t1 ^ t4 ^ t5 ^ t6 ^ t7; + + return ((uint64_t)y1 << 56) | ((uint64_t)y2 << 48) | + ((uint64_t)y3 << 40) | ((uint64_t)y4 << 32) | + ((uint64_t)y5 << 24) | ((uint64_t)y6 << 16) | + ((uint64_t)y7 << 8) | y8; +} + +static uint64_t camellia_fl(uint64_t input, uint64_t key) +{ + uint32_t x1 =3D input >> 32; + uint32_t x2 =3D input; + uint32_t k1 =3D key >> 32; + uint32_t k2 =3D key; + + x2 ^=3D rol32(x1 & k1, 1); + x1 ^=3D x2 | k2; + return ((uint64_t)x1 << 32) | x2; +} + +static uint64_t camellia_flinv(uint64_t input, uint64_t key) +{ + uint32_t y1 =3D input >> 32; + uint32_t y2 =3D input; + uint32_t k1 =3D key >> 32; + uint32_t k2 =3D key; + + y1 ^=3D y2 | k2; + y2 ^=3D rol32(y1 & k1, 1); + return ((uint64_t)y1 << 32) | y2; +} + +static void octeon_camellia_round(MIPSOcteonCryptoState *crypto, uint64_t = key) +{ + uint64_t left =3D crypto->aes_resinp[0]; + uint64_t right =3D crypto->aes_resinp[1]; + + crypto->aes_resinp[0] =3D right ^ camellia_f(left, key); + crypto->aes_resinp[1] =3D left; +} + +static void octeon_camellia_fl_layer(MIPSOcteonCryptoState *crypto, + uint64_t key, bool inverse) +{ + uint64_t state =3D crypto->aes_resinp[inverse ? 1 : 0]; + + crypto->aes_resinp[inverse ? 1 : 0] =3D inverse ? + camellia_flinv(state, key) : + camellia_fl(state, key); +} + +void helper_octeon_cp2_mt_camellia_fl(CPUMIPSState *env, uint64_t value) +{ + octeon_camellia_fl_layer(&env->octeon_crypto, value, false); +} + +void helper_octeon_cp2_mt_camellia_flinv(CPUMIPSState *env, uint64_t value) +{ + octeon_camellia_fl_layer(&env->octeon_crypto, value, true); +} + +void helper_octeon_cp2_mt_camellia_round(CPUMIPSState *env, uint64_t value) +{ + octeon_camellia_round(&env->octeon_crypto, value); +} + void helper_octeon_cp2_mt_snow3g_start(CPUMIPSState *env, uint64_t value) { octeon_snow3g_start(&env->octeon_crypto, value); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386969; cv=none; d=zohomail.com; s=zohoarc; b=DzJmWnP5S/VC4tpfFD123yP8/c8/tY6O5eUsCsaycbvXOPneujw9AZNftIF0UrpzXR6n4FKJUUx0a9hH3pZD6Vlz3hHIBiDQ8X76wG3Jawr/DcyDGAquEeBy0ZwVQh1zdIHgQU3tC03+SRmE9mNXmdj0L6ReWxqbExGroapzKq4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386969; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2bsixWg2HlbeqeP1mJov8T7mYPwyMwOHKtDI4ZiVIsE=; b=T066gYuZ+ASklp5w7vmq/voV8fGXDpalUUiEoes8keopSxnlrJO7BizRr2kKgdF229gGwp8O3oERKFzOGyQVwtVSoM2gr7tvzHu+eVEudbCitiE4B6NQOOmCXWztuBdiQsFaZMSyrOQ4p1sNCm1G39VZG9DObHYG9zjNEeR+HTU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386969462948.7532710861532; Thu, 21 May 2026 11:09:29 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7n4-0000GJ-2F; Thu, 21 May 2026 14:06:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7mz-0000FT-6H for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:33 -0400 Received: from mail-ot1-x32b.google.com ([2607:f8b0:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mw-00023w-Ka for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:32 -0400 Received: by mail-ot1-x32b.google.com with SMTP id 46e09a7af769-7e363c6141dso5396381a34.2 for ; Thu, 21 May 2026 11:06:30 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386789; x=1779991589; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2bsixWg2HlbeqeP1mJov8T7mYPwyMwOHKtDI4ZiVIsE=; b=LQzZFJeJSnlXOSPTLzO0eFsiGseI5Kn0i44VO3GrD+JPp0XvJytkn/uI81cqEZcm/l gz0ylWjVhmeqXsng5o7eRyIyYhtHqF1YyG7zjPhfeiBQXsCV9Myv1TA2dE8CWRRtbE79 sjeMemUoPDgGCQZNfknZhFWSRgYTAsbCubQWfaFrrsYAIHMPog018g9Zvg2lCPcRAjhy aUerv9J1Wg9sE0wkFrFDCtZvqU+szvs+ZsNqfEJQ2TV23AKJYG6PtOqm8PKPBIrNBerL 4m/+5hOBH39QZkqzLZvRSdnS1k0z6O6KpyYmu2uL15Wm60tlXcvLNgNv7eM+VHHEOyGl Vr+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386789; x=1779991589; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=2bsixWg2HlbeqeP1mJov8T7mYPwyMwOHKtDI4ZiVIsE=; b=bXom/NaHt0lkda/YqRVBKenu+NnEcfcuxnIWJQpOH+IFh/YzZTswjKo6xLdHsT033R RNLWiQu3mn6ZBj16QLDPD2j0ynFoE+h/HfhkJiHOfFJ0Hbxvsz4Wxqgy9o2OwMtzpHFF j/jHb6YkiI3kTpZZjvqkr2JVknEYM+utue/arLreVB9pmmGwmUJWWnuUErgXSdL4LyVh cpLYwYQaJtnuintxPmGH7nBUjp/esl28ZrnD2HqzUaXvnqa5O3nMshYyrLag3tPngdR/ VJ+ADAyt610lx1PXbYXIjt9vZZMjUP8eEw25feKwCAzAm6RYWmrdXnN7JXhmI92CNkPk m8aw== X-Gm-Message-State: AOJu0YyADBsmTubt2t43hNRP4HKNcqTF/KczVWkma8JtFW8DoAf17IIA TklRNtZLiNlHbCaWf9r9hlVegPyBTij6mEJvKh0nJHe8qpiq6rPIy5WM X-Gm-Gg: Acq92OGtNAp8sKgE9Ol4e6KrCup44IDC2dVcTXVjmS3kYKv95eariDJmqWDlPgOYdfW 8Lt3nR6+zwwZmR0Pwi7fmwo4XNLuJko61oefKnqhwF9Z6/hs7366XM57FKSI3xArSPLK5QcZs2N f9WtHXH2WbfjRDUFHRuG7eHOiXaB8kZgMEx5JNfLmNT4PSqrffV1s3cb6RnT4cJzKkJvRB4Y3aM DsOUKe9uv38OYVbEmANNCXKosqa7AsLxcvjWAEWbUk2dJkhc84EypAUoCjEkpLFS+kqYoSHxewm GksDs8d/ZvSjFiHMzCPTYiSUnE/QxSbinHpwQy6FPx4Svf0ofTo24KZFKsGoyup2LU7WSH2lMdC u8z9JeHvtxOW36ylT4zPSr04Ff4e+pMAuVZlaT2deFGywv4SJd4Z7VkA2diMavXj8fxRNl8nlk6 QI9qnfbFSMRvyPXGdyBJAcBgH1iQl7C0KNkxwvCf5xRa4jilL/m/IPoKU3iNIvpeJt+Ie1eBMu7 b/N7g8tgjOTdL7p3OwUYxgHb+d0lTlpk0QV3uqIIG39AIevwr9pO4dOsvGDXvto2MN7 X-Received: by 2002:a05:6830:2650:b0:7e5:fb74:bb48 with SMTP id 46e09a7af769-7e5fec690b0mr168947a34.3.1779386789480; Thu, 21 May 2026 11:06:29 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:06 -0600 Subject: [PATCH v13 13/22] target/mips: add Octeon HSH COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-13-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32b.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386971013158500 Add helper support for the Octeon HSH hash selectors. This includes the base HSH data/IV windows, MD5, SHA1, SHA256, and SHA512 transform paths, and the shared HSH/SHA512 register-window readback and write operations. The SHA512 path shares the wide HSH register bank with SHA3, SNOW3G, and ZUC. Keep the aliased readback and write paths centralized so selector decode can route register accesses through these helpers when side effects are required. Signed-off-by: James Hilliard --- Changes v10 -> v13: - Keep the 0x0057 SDK compatibility path as an explicit STARTSHA1 compatibility helper instead of a generic STARTSHA name. Changes v9 -> v10: - Remove references to shared-mode tracking; aliased state is kept in the architectural HSH register banks. Changes v8 -> v9: - Split HSH/SHA helpers into their own COP2 helper patch. - Replace generic selector dispatch with per-operation HSH helpers. - Keep shared-window readback and write helpers grouped with HSH. - Add matching helper.h declarations with the helper implementation. --- target/mips/helper.h | 5 + target/mips/tcg/octeon_crypto.c | 395 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 400 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index fbf8250932..d18ade0094 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -91,6 +91,11 @@ DEF_HELPER_2(octeon_cp2_mt_des3_dec, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_camellia_fl, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_camellia_flinv, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_camellia_round, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_hsh_startsha1_compat, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_hsh_startmd5, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_hsh_startsha256, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_hsh_startsha, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_hsh_startsha512, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 5bb21098fc..92102636dd 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -151,6 +151,368 @@ static void octeon_gfm_mul64_uia2(const uint64_t x[2]= , const uint64_t y[2], out[1] =3D revbit64(res); } =20 +static inline void octeon_hsh_load_reg_words_be(uint64_t reg, + uint32_t *hi, uint32_t *l= o) +{ + uint8_t buf[8]; + + stq_be_p(buf, reg); + *hi =3D ldl_be_p(buf); + *lo =3D ldl_be_p(buf + 4); +} + +static inline void octeon_hsh_load_reg_words_le(uint64_t reg, + uint32_t *lo0, uint32_t *= lo1) +{ + uint8_t buf[8]; + + stq_be_p(buf, reg); + *lo0 =3D ldl_le_p(buf); + *lo1 =3D ldl_le_p(buf + 4); +} + +static inline uint64_t octeon_hsh_store_reg_words_be(uint32_t hi, uint32_t= lo) +{ + uint8_t buf[8]; + + stl_be_p(buf, hi); + stl_be_p(buf + 4, lo); + return ldq_be_p(buf); +} + +static inline uint64_t octeon_hsh_store_reg_words_le(uint32_t lo0, + uint32_t lo1) +{ + uint8_t buf[8]; + + stl_le_p(buf, lo0); + stl_le_p(buf + 4, lo1); + return ldq_be_p(buf); +} + +static void octeon_md5_transform(MIPSOcteonCryptoState *crypto) +{ + static const uint32_t k[64] =3D { + 0xd76aa478U, 0xe8c7b756U, 0x242070dbU, 0xc1bdceeeU, + 0xf57c0fafU, 0x4787c62aU, 0xa8304613U, 0xfd469501U, + 0x698098d8U, 0x8b44f7afU, 0xffff5bb1U, 0x895cd7beU, + 0x6b901122U, 0xfd987193U, 0xa679438eU, 0x49b40821U, + 0xf61e2562U, 0xc040b340U, 0x265e5a51U, 0xe9b6c7aaU, + 0xd62f105dU, 0x02441453U, 0xd8a1e681U, 0xe7d3fbc8U, + 0x21e1cde6U, 0xc33707d6U, 0xf4d50d87U, 0x455a14edU, + 0xa9e3e905U, 0xfcefa3f8U, 0x676f02d9U, 0x8d2a4c8aU, + 0xfffa3942U, 0x8771f681U, 0x6d9d6122U, 0xfde5380cU, + 0xa4beea44U, 0x4bdecfa9U, 0xf6bb4b60U, 0xbebfbc70U, + 0x289b7ec6U, 0xeaa127faU, 0xd4ef3085U, 0x04881d05U, + 0xd9d4d039U, 0xe6db99e5U, 0x1fa27cf8U, 0xc4ac5665U, + 0xf4292244U, 0x432aff97U, 0xab9423a7U, 0xfc93a039U, + 0x655b59c3U, 0x8f0ccc92U, 0xffeff47dU, 0x85845dd1U, + 0x6fa87e4fU, 0xfe2ce6e0U, 0xa3014314U, 0x4e0811a1U, + 0xf7537e82U, 0xbd3af235U, 0x2ad7d2bbU, 0xeb86d391U, + }; + static const uint8_t s[64] =3D { + 7, 12, 17, 22, 7, 12, 17, 22, 7, 12, 17, 22, 7, 12, 17, 22, + 5, 9, 14, 20, 5, 9, 14, 20, 5, 9, 14, 20, 5, 9, 14, 20, + 4, 11, 16, 23, 4, 11, 16, 23, 4, 11, 16, 23, 4, 11, 16, 23, + 6, 10, 15, 21, 6, 10, 15, 21, 6, 10, 15, 21, 6, 10, 15, 21, + }; + uint8_t block_bytes[64]; + uint32_t m[16]; + uint32_t a, b, c, d; + uint32_t aa, bb, cc, dd; + int i; + + for (i =3D 0; i < 8; i++) { + stq_be_p(block_bytes + (i * 8), crypto->hsh_dat[i]); + m[i * 2] =3D ldl_le_p(block_bytes + (i * 8)); + m[i * 2 + 1] =3D ldl_le_p(block_bytes + (i * 8) + 4); + } + + octeon_hsh_load_reg_words_le(crypto->hsh_iv[0], &a, &b); + octeon_hsh_load_reg_words_le(crypto->hsh_iv[1], &c, &d); + aa =3D a; + bb =3D b; + cc =3D c; + dd =3D d; + + for (i =3D 0; i < 64; i++) { + uint32_t f, g, tmp; + + if (i < 16) { + f =3D (b & c) | ((~b) & d); + g =3D i; + } else if (i < 32) { + f =3D (d & b) | ((~d) & c); + g =3D (5 * i + 1) & 0xf; + } else if (i < 48) { + f =3D b ^ c ^ d; + g =3D (3 * i + 5) & 0xf; + } else { + f =3D c ^ (b | (~d)); + g =3D (7 * i) & 0xf; + } + + tmp =3D d; + d =3D c; + c =3D b; + b =3D b + rol32(a + f + k[i] + m[g], s[i]); + a =3D tmp; + } + + a +=3D aa; + b +=3D bb; + c +=3D cc; + d +=3D dd; + crypto->hsh_iv[0] =3D octeon_hsh_store_reg_words_le(a, b); + crypto->hsh_iv[1] =3D octeon_hsh_store_reg_words_le(c, d); +} + +static void octeon_sha1_transform(MIPSOcteonCryptoState *crypto) +{ + uint32_t w[80]; + uint32_t a, b, c, d, e; + int i; + + for (i =3D 0; i < 8; i++) { + octeon_hsh_load_reg_words_be(crypto->hsh_dat[i], + &w[i * 2], &w[i * 2 + 1]); + } + for (i =3D 16; i < 80; i++) { + w[i] =3D rol32(w[i - 3] ^ w[i - 8] ^ w[i - 14] ^ w[i - 16], 1); + } + + octeon_hsh_load_reg_words_be(crypto->hsh_iv[0], &a, &b); + octeon_hsh_load_reg_words_be(crypto->hsh_iv[1], &c, &d); + e =3D crypto->hsh_iv[2] >> 32; + + for (i =3D 0; i < 80; i++) { + uint32_t f, k, temp; + + if (i < 20) { + f =3D (b & c) | ((~b) & d); + k =3D 0x5a827999; + } else if (i < 40) { + f =3D b ^ c ^ d; + k =3D 0x6ed9eba1; + } else if (i < 60) { + f =3D (b & c) | (b & d) | (c & d); + k =3D 0x8f1bbcdc; + } else { + f =3D b ^ c ^ d; + k =3D 0xca62c1d6; + } + + temp =3D rol32(a, 5) + f + e + k + w[i]; + e =3D d; + d =3D c; + c =3D rol32(b, 30); + b =3D a; + a =3D temp; + } + + octeon_hsh_load_reg_words_be(crypto->hsh_iv[0], &w[0], &w[1]); + octeon_hsh_load_reg_words_be(crypto->hsh_iv[1], &w[2], &w[3]); + w[4] =3D crypto->hsh_iv[2] >> 32; + w[0] +=3D a; + w[1] +=3D b; + w[2] +=3D c; + w[3] +=3D d; + w[4] +=3D e; + crypto->hsh_iv[0] =3D octeon_hsh_store_reg_words_be(w[0], w[1]); + crypto->hsh_iv[1] =3D octeon_hsh_store_reg_words_be(w[2], w[3]); + crypto->hsh_iv[2] =3D (uint64_t)w[4] << 32; +} + +static void octeon_sha256_transform(MIPSOcteonCryptoState *crypto) +{ + static const uint32_t k[64] =3D { + 0x428a2f98U, 0x71374491U, 0xb5c0fbcfU, 0xe9b5dba5U, + 0x3956c25bU, 0x59f111f1U, 0x923f82a4U, 0xab1c5ed5U, + 0xd807aa98U, 0x12835b01U, 0x243185beU, 0x550c7dc3U, + 0x72be5d74U, 0x80deb1feU, 0x9bdc06a7U, 0xc19bf174U, + 0xe49b69c1U, 0xefbe4786U, 0x0fc19dc6U, 0x240ca1ccU, + 0x2de92c6fU, 0x4a7484aaU, 0x5cb0a9dcU, 0x76f988daU, + 0x983e5152U, 0xa831c66dU, 0xb00327c8U, 0xbf597fc7U, + 0xc6e00bf3U, 0xd5a79147U, 0x06ca6351U, 0x14292967U, + 0x27b70a85U, 0x2e1b2138U, 0x4d2c6dfcU, 0x53380d13U, + 0x650a7354U, 0x766a0abbU, 0x81c2c92eU, 0x92722c85U, + 0xa2bfe8a1U, 0xa81a664bU, 0xc24b8b70U, 0xc76c51a3U, + 0xd192e819U, 0xd6990624U, 0xf40e3585U, 0x106aa070U, + 0x19a4c116U, 0x1e376c08U, 0x2748774cU, 0x34b0bcb5U, + 0x391c0cb3U, 0x4ed8aa4aU, 0x5b9cca4fU, 0x682e6ff3U, + 0x748f82eeU, 0x78a5636fU, 0x84c87814U, 0x8cc70208U, + 0x90befffaU, 0xa4506cebU, 0xbef9a3f7U, 0xc67178f2U, + }; + uint32_t w[64]; + uint32_t a, b, c, d, e, f, g, h; + uint32_t orig[8]; + int i; + + for (i =3D 0; i < 8; i++) { + octeon_hsh_load_reg_words_be(crypto->hsh_dat[i], + &w[i * 2], &w[i * 2 + 1]); + } + for (i =3D 16; i < 64; i++) { + uint32_t s0 =3D ror32(w[i - 15], 7) ^ + ror32(w[i - 15], 18) ^ + (w[i - 15] >> 3); + uint32_t s1 =3D ror32(w[i - 2], 17) ^ + ror32(w[i - 2], 19) ^ + (w[i - 2] >> 10); + w[i] =3D w[i - 16] + s0 + w[i - 7] + s1; + } + + for (i =3D 0; i < 4; i++) { + octeon_hsh_load_reg_words_be(crypto->hsh_iv[i], + &orig[i * 2], &orig[i * 2 + 1]); + } + a =3D orig[0]; + b =3D orig[1]; + c =3D orig[2]; + d =3D orig[3]; + e =3D orig[4]; + f =3D orig[5]; + g =3D orig[6]; + h =3D orig[7]; + + for (i =3D 0; i < 64; i++) { + uint32_t s1 =3D ror32(e, 6) ^ + ror32(e, 11) ^ + ror32(e, 25); + uint32_t ch =3D (e & f) ^ ((~e) & g); + uint32_t temp1 =3D h + s1 + ch + k[i] + w[i]; + uint32_t s0 =3D ror32(a, 2) ^ + ror32(a, 13) ^ + ror32(a, 22); + uint32_t maj =3D (a & b) ^ (a & c) ^ (b & c); + uint32_t temp2 =3D s0 + maj; + + h =3D g; + g =3D f; + f =3D e; + e =3D d + temp1; + d =3D c; + c =3D b; + b =3D a; + a =3D temp1 + temp2; + } + + orig[0] +=3D a; + orig[1] +=3D b; + orig[2] +=3D c; + orig[3] +=3D d; + orig[4] +=3D e; + orig[5] +=3D f; + orig[6] +=3D g; + orig[7] +=3D h; + for (i =3D 0; i < 4; i++) { + crypto->hsh_iv[i] =3D + octeon_hsh_store_reg_words_be(orig[i * 2], orig[i * 2 + 1]); + } +} + +static void octeon_sha512_transform(MIPSOcteonCryptoState *crypto) +{ + static const uint64_t k[80] =3D { + 0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, + 0xb5c0fbcfec4d3b2fULL, 0xe9b5dba58189dbbcULL, + 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL, + 0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, + 0xd807aa98a3030242ULL, 0x12835b0145706fbeULL, + 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL, + 0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, + 0x9bdc06a725c71235ULL, 0xc19bf174cf692694ULL, + 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL, + 0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, + 0x2de92c6f592b0275ULL, 0x4a7484aa6ea6e483ULL, + 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL, + 0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, + 0xb00327c898fb213fULL, 0xbf597fc7beef0ee4ULL, + 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL, + 0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, + 0x27b70a8546d22ffcULL, 0x2e1b21385c26c926ULL, + 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL, + 0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, + 0x81c2c92e47edaee6ULL, 0x92722c851482353bULL, + 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL, + 0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, + 0xd192e819d6ef5218ULL, 0xd69906245565a910ULL, + 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL, + 0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, + 0x2748774cdf8eeb99ULL, 0x34b0bcb5e19b48a8ULL, + 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL, + 0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, + 0x748f82ee5defb2fcULL, 0x78a5636f43172f60ULL, + 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL, + 0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, + 0xbef9a3f7b2c67915ULL, 0xc67178f2e372532bULL, + 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL, + 0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, + 0x06f067aa72176fbaULL, 0x0a637dc5a2c898a6ULL, + 0x113f9804bef90daeULL, 0x1b710b35131c471bULL, + 0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, + 0x3c9ebe0a15c9bebcULL, 0x431d67c49c100d4cULL, + 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL, + 0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL, + }; + uint64_t w[80]; + uint64_t a, b, c, d, e, f, g, h; + int i; + + for (i =3D 0; i < 16; i++) { + w[i] =3D crypto->hsh_dat[i]; + } + for (i =3D 16; i < 80; i++) { + uint64_t s0 =3D ror64(w[i - 15], 1) ^ + ror64(w[i - 15], 8) ^ + (w[i - 15] >> 7); + uint64_t s1 =3D ror64(w[i - 2], 19) ^ + ror64(w[i - 2], 61) ^ + (w[i - 2] >> 6); + w[i] =3D w[i - 16] + s0 + w[i - 7] + s1; + } + + a =3D crypto->hsh_iv[0]; + b =3D crypto->hsh_iv[1]; + c =3D crypto->hsh_iv[2]; + d =3D crypto->hsh_iv[3]; + e =3D crypto->hsh_iv[4]; + f =3D crypto->hsh_iv[5]; + g =3D crypto->hsh_iv[6]; + h =3D crypto->hsh_iv[7]; + + for (i =3D 0; i < 80; i++) { + uint64_t s0 =3D ror64(a, 28) ^ + ror64(a, 34) ^ + ror64(a, 39); + uint64_t s1 =3D ror64(e, 14) ^ + ror64(e, 18) ^ + ror64(e, 41); + uint64_t ch =3D (e & f) ^ ((~e) & g); + uint64_t maj =3D (a & b) ^ (a & c) ^ (b & c); + uint64_t temp1 =3D h + s1 + ch + k[i] + w[i]; + uint64_t temp2 =3D s0 + maj; + + h =3D g; + g =3D f; + f =3D e; + e =3D d + temp1; + d =3D c; + c =3D b; + b =3D a; + a =3D temp1 + temp2; + } + + crypto->hsh_iv[0] +=3D a; + crypto->hsh_iv[1] +=3D b; + crypto->hsh_iv[2] +=3D c; + crypto->hsh_iv[3] +=3D d; + crypto->hsh_iv[4] +=3D e; + crypto->hsh_iv[5] +=3D f; + crypto->hsh_iv[6] +=3D g; + crypto->hsh_iv[7] +=3D h; +} + static const uint64_t octeon_sha3_round_constants[24] =3D { 0x0000000000000001ULL, 0x0000000000008082ULL, 0x800000000000808aULL, 0x8000000080008000ULL, @@ -1761,6 +2123,39 @@ void helper_octeon_cp2_mt_zuc_more(CPUMIPSState *env= , uint64_t value) octeon_zuc_more(&env->octeon_crypto, value); } =20 +void helper_octeon_cp2_mt_hsh_startsha1_compat(CPUMIPSState *env, + uint64_t value) +{ + env->octeon_crypto.hsh_dat[7] =3D value; + octeon_sha1_transform(&env->octeon_crypto); +} + +void helper_octeon_cp2_mt_hsh_startmd5(CPUMIPSState *env, uint64_t value) +{ + env->octeon_crypto.hsh_dat[7] =3D value; + octeon_md5_transform(&env->octeon_crypto); +} + +void helper_octeon_cp2_mt_hsh_startsha256(CPUMIPSState *env, uint64_t valu= e) +{ + env->octeon_crypto.hsh_dat[7] =3D value; + octeon_sha256_transform(&env->octeon_crypto); +} + +void helper_octeon_cp2_mt_hsh_startsha(CPUMIPSState *env, uint64_t value) +{ + env->octeon_crypto.hsh_dat[7] =3D value; + octeon_sha1_transform(&env->octeon_crypto); +} + +void helper_octeon_cp2_mt_hsh_startsha512(CPUMIPSState *env, uint64_t valu= e) +{ + MIPSOcteonCryptoState *crypto =3D &env->octeon_crypto; + + crypto->hsh_dat[15] =3D value; + octeon_sha512_transform(crypto); +} + uint64_t helper_octeon_cp2_mf_crc_iv_reflect(CPUMIPSState *env) { return octeon_crc_reflect32_by_byte(env->octeon_crypto.crc_iv); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386873; cv=none; d=zohomail.com; s=zohoarc; b=Oc+MEqFV5Nem8wmhJ5r/qDXJy3zUmbm+G09cT8oDolCBrFaGedL9OR52NL79Ny4J0/Vu5MawCgH/tqsRY6fsWE8Uzazl4/13y6dxZJlMTt6Oytt5Z3S5PFWxGULCtD929yy9Sa7weHlbY9Z0T76sgCsnn137QzI6greXubFurDc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386873; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kmIEKhzDgkQkNcp3P+dm9kGl1W2xHcNBU4O9VF4nSws=; b=k8bqsZanUxpQirfv/lwHg0snEgSQb7wWZEa0X1nDFjn/f4DeXsaNHpPLiYuZ0mE/g4t+X4qKfT3GJ6Quwky/k1bQVHwe4DqNkN3U1Sqy2CJTZGXGWMjnoasNe5PGltjNGYSap+VXDfVMhFR18w5AfA2IiTeWX8UFANMM9RsAJ3Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386873411249.46280247041477; Thu, 21 May 2026 11:07:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7n6-0000H0-7E; Thu, 21 May 2026 14:06:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n0-0000G0-Ft for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:34 -0400 Received: from mail-ot1-x32e.google.com ([2607:f8b0:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7my-00024A-1I for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:34 -0400 Received: by mail-ot1-x32e.google.com with SMTP id 46e09a7af769-7dca00c1591so1858243a34.3 for ; Thu, 21 May 2026 11:06:31 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386791; x=1779991591; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kmIEKhzDgkQkNcp3P+dm9kGl1W2xHcNBU4O9VF4nSws=; b=oNFrb+e9XqBKIMpTZD3f6vAqxmAw5LvNclkTyVElN3GUdBNKCae82K7iSlLBbUYQg7 ku+7RTrRt89ByWid5mI1rDF9RmnNTSsU6qefI0DAVopmUfWBSnkLWwY0dswh2XJ9Pitj oq+/A0SSeCtC5JUKbt5kvhZS2rsd/a9E5ej75EDz92GrpP0eCunb9SIwRP0z00i133x5 gFweS8p8xRPHXqSVzqRlqsrrbwtnurc43h/7CbonYQAIe1fRIidYhjt70FPHeTImqrhh SQ8mXnLvQuDMvP+OryYRNrgXsPcegcFC3boIGAXnR1C32CzgSZE9tWLzBSqS7j+GxJU1 /cwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386791; x=1779991591; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=kmIEKhzDgkQkNcp3P+dm9kGl1W2xHcNBU4O9VF4nSws=; b=ZY1AB/5nP0aU3dkU5aTF28YSs1W/h9TU+ZVfHkFjO31XWczTewB/HjaGoQCw6pwtcc qnGobsp1gEom9BTPQ95qbNJsRkhZsCcHksuSGHiy1kL131+dsqRaW9sfenJKet9OdZsS QowcvcBzl2zh1LCNGXW2h/0mbXj2d7K5ww/0Ws3xBZmfQy2CIoEdBFJ9fud4RkxSHLnn 4HxzacllvBN+rpGZc5MBoWkcvifAM26c2WCopz0lfdOqALSG1jiVPNc8J+YgYTTh8nqe OtUwdtSF5x8MD2rVIxwpTJ0nhOtJWyOQG1CPf1pcxNrGjO/rAhvuTnJItgda3FAmXOkG GaXQ== X-Gm-Message-State: AOJu0Yw8OGz09Gxrn+ONJXS+AykplrEdaJj1wHlxX7V+8mCr77tDg5w9 3POPqT5TLhmBDINe7z3GQ4cc1J1IYuCvzEeOHG0H5laYJ7F/EQnB1CtK X-Gm-Gg: Acq92OGVUVJTJGaomyK+K/lhFXWfwnruxJk93KbDutBN/hlrH5gfIz+0RNQntRGrX95 RfX91MBJK+TkJ4ZSX5qUdow4AS+8u0D9bXhiY2FtIMfbnZtjldRuAwB0N7cFxv9J3OPCfViHmCe 63js92kfIEFJtbcLzey7OGxitRKKV1bjA1c8V00D0vO3uKnWrbwbVr8SpP+N/TeZhZnjMfjBJ4J JS5XixSf7+0ZUZHM6oTyXjMH7Qi9PHPFMpvK3dEqQ08zOSBZgkEiT7JfFoDd4hgvpXQdhClrTk+ vWpykZYdrY/LFm+yyoHeXu9XRbQhWVNPs5rNWQ9G+jbQBBghyvrnTy1jdGJeZrDB/KzLswZHLll cvJLZAnwDbqeoenrmHbrB1GJECgIkPwoqSmKl909APp/tBVvPjH9Z2wXh+UwCKfh1b+7FLo52lM 2zat2JP9VxW9Rklpn2DDqPZFITxRgheXS4kenJTBhkQ7fx8UmV78UcD5FeMVmVxw28eh3EiB1rq Vyj0Bxv37IO2EeX8EZvG42Fd8nmnI4NgH/TCS40G65skNdry8IZA65NRTSYGcAyr3MU X-Received: by 2002:a05:6830:828b:b0:7e3:d7d6:a4b7 with SMTP id 46e09a7af769-7e5fee66317mr132417a34.3.1779386790763; Thu, 21 May 2026 11:06:30 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:07 -0600 Subject: [PATCH v13 14/22] target/mips: add Octeon CHORD and LLM COP2 helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-14-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32e; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386876802154100 Add the Octeon CHORD hardware register access path and the LLM 36-bit and 64-bit read and write windows. Model both CHORD access forms, including the RDHWR $30 path and the legacy DMFC2 alias. Implement sparse backing storage for the two LLM sets so user-mode code can save, restore, and probe the architectural state without allocating a full hardware-sized backing array. Signed-off-by: James Hilliard --- Changes v10 -> v13: - Keep this patch limited to CHORD/LLM additions; existing crypto helpers and state fields stay in their original commit order. Changes v8 -> v9: - Split CHORD and LLM helpers into their own COP2 helper patch. - Replace generic selector dispatch with per-operation LLM helpers. - Add matching helper.h declarations with the helper implementation. Changes v5 -> v6: - Rename sparse LLM backing fields from llm_narrow/llm_wide to llm36/llm64 to match the 36-bit and 64-bit selector windows. Changes v1 -> v2: - Use neutral selector-slot wording for the LLM/CHORD alias comment. - Add selector dispatch updates in octeon_translate.c after moving COP2 decode out of translate.c. (suggested by Philippe Mathieu-Daud=C3=A9) --- target/mips/cpu.c | 67 ++++++++++++++++++++++++++++++++++++ target/mips/cpu.h | 5 +++ target/mips/helper.h | 9 +++++ target/mips/internal.h | 3 ++ target/mips/system/machine.c | 67 ++++++++++++++++++++++++++++++++++++ target/mips/tcg/octeon_crypto.c | 75 +++++++++++++++++++++++++++++++++++++= ++++ target/mips/tcg/op_helper.c | 6 ++++ target/mips/tcg/translate.c | 8 +++++ 8 files changed, 240 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index fccc7a711d..b223b767c9 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -26,6 +26,7 @@ #include "cpu.h" #include "internal.h" #include "qemu/module.h" +#include "qemu/qtree.h" #include "system/qtest.h" #include "hw/core/qdev-properties.h" #include "hw/core/qdev-clock.h" @@ -181,6 +182,57 @@ static bool mips_cpu_has_work(CPUState *cs) =20 #include "cpu-defs.c.inc" =20 +static gint mips_octeon_u64_tree_compare(gconstpointer a, gconstpointer b, + gpointer user_data) +{ + uint64_t av =3D *(const uint64_t *)a; + uint64_t bv =3D *(const uint64_t *)b; + + return (av > bv) - (av < bv); +} + +QTree *mips_octeon_llm_tree_new(void) +{ + return q_tree_new_full(mips_octeon_u64_tree_compare, + NULL, g_free, g_free); +} + +uint64_t mips_octeon_llm_load(QTree *tree, uint64_t addr) +{ + uint64_t key =3D addr; + uint64_t *value =3D tree ? q_tree_lookup(tree, &key) : NULL; + + return value ? *value : 0; +} + +void mips_octeon_llm_store(QTree **treep, uint64_t addr, uint64_t value) +{ + uint64_t *key; + uint64_t *stored; + + if (!*treep) { + *treep =3D mips_octeon_llm_tree_new(); + } + + key =3D g_new(uint64_t, 1); + stored =3D g_new(uint64_t, 1); + *key =3D addr; + *stored =3D value; + q_tree_replace(*treep, key, stored); +} + +static void mips_octeon_destroy_llm_state(MIPSOcteonCryptoState *crypto) +{ + if (crypto->llm36) { + q_tree_destroy(crypto->llm36); + crypto->llm36 =3D NULL; + } + if (crypto->llm64) { + q_tree_destroy(crypto->llm64); + crypto->llm64 =3D NULL; + } +} + static void mips_cpu_reset_hold(Object *obj, ResetType type) { CPUState *cs =3D CPU(obj); @@ -192,6 +244,7 @@ static void mips_cpu_reset_hold(Object *obj, ResetType = type) mcc->parent_phases.hold(obj, type); } =20 + mips_octeon_destroy_llm_state(&env->octeon_crypto); memset(env, 0, offsetof(CPUMIPSState, end_reset_fields)); =20 /* Reset registers to their default values */ @@ -246,6 +299,9 @@ static void mips_cpu_reset_hold(Object *obj, ResetType = type) env->active_fpu.fcr31 =3D env->cpu_model->CP1_fcr31; env->msair =3D env->cpu_model->MSAIR; env->insn_flags =3D env->cpu_model->insn_flags; + if (env->insn_flags & INSN_OCTEON) { + env->octeon_crypto.chord =3D 1; + } =20 #if defined(CONFIG_USER_ONLY) env->CP0_Status =3D (MIPS_HFLAG_UM << CP0St_KSU); @@ -262,6 +318,9 @@ static void mips_cpu_reset_hold(Object *obj, ResetType = type) * hardware registers. */ env->CP0_HWREna |=3D 0x0000000F; + if (env->insn_flags & INSN_OCTEON) { + env->CP0_HWREna |=3D 0x40000000u; + } if (env->CP0_Config1 & (1 << CP0C1_FP)) { env->CP0_Status |=3D (1 << CP0St_CU1); } @@ -417,6 +476,13 @@ static void mips_cpu_reset_hold(Object *obj, ResetType= type) #endif } =20 +static void mips_cpu_finalize(Object *obj) +{ + MIPSCPU *cpu =3D MIPS_CPU(obj); + + mips_octeon_destroy_llm_state(&cpu->env.octeon_crypto); +} + static void mips_cpu_disas_set_info(const CPUState *cs, disassemble_info *= info) { const MIPSCPU *cpu =3D MIPS_CPU(cs); @@ -645,6 +711,7 @@ static const TypeInfo mips_cpu_type_info =3D { .instance_size =3D sizeof(MIPSCPU), .instance_align =3D __alignof(MIPSCPU), .instance_init =3D mips_cpu_initfn, + .instance_finalize =3D mips_cpu_finalize, .abstract =3D true, .class_size =3D sizeof(MIPSCPUClass), .class_init =3D mips_cpu_class_init, diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 2dad7f538f..bc427adb97 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -11,6 +11,7 @@ #include "fpu/softfloat-types.h" #include "hw/core/clock.h" #include "mips-defs.h" +#include "qemu/qtree.h" =20 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; =20 @@ -554,6 +555,10 @@ typedef struct MIPSOcteonCryptoState { uint16_t gfm_poly; uint8_t aes_keylen; uint8_t crc_len; + uint64_t chord; + uint64_t llm_data[2]; + QTree *llm36; + QTree *llm64; } MIPSOcteonCryptoState; =20 typedef struct CPUArchState { diff --git a/target/mips/helper.h b/target/mips/helper.h index d18ade0094..c062863582 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -96,6 +96,14 @@ DEF_HELPER_2(octeon_cp2_mt_hsh_startmd5, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_hsh_startsha256, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_hsh_startsha, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_hsh_startsha512, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_read_addr0, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_write_addr0, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_read64_addr0, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_write64_addr0, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_read_addr1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_write_addr1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_read64_addr1, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_llm_write64_addr1, void, env, i64) =20 /* microMIPS functions */ DEF_HELPER_4(lwm, void, env, tl, tl, i32) @@ -267,6 +275,7 @@ DEF_HELPER_1(rdhwr_cc, tl, env) DEF_HELPER_1(rdhwr_ccres, tl, env) DEF_HELPER_1(rdhwr_performance, tl, env) DEF_HELPER_1(rdhwr_xnp, tl, env) +DEF_HELPER_1(rdhwr_chord, tl, env) DEF_HELPER_2(pmon, void, env, int) DEF_HELPER_1(wait, void, env) =20 diff --git a/target/mips/internal.h b/target/mips/internal.h index aab77b1b25..c5c286872e 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -93,6 +93,9 @@ extern const int mips_defs_number; =20 int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +QTree *mips_octeon_llm_tree_new(void); +uint64_t mips_octeon_llm_load(QTree *tree, uint64_t addr); +void mips_octeon_llm_store(QTree **treep, uint64_t addr, uint64_t value); =20 #define USEG_LIMIT ((target_ulong)(int32_t)0x7FFFFFFFUL) #define KSEG0_BASE ((target_ulong)(int32_t)0x80000000UL) diff --git a/target/mips/system/machine.c b/target/mips/system/machine.c index 77f576a25b..bd1e4002cf 100644 --- a/target/mips/system/machine.c +++ b/target/mips/system/machine.c @@ -131,6 +131,69 @@ static const VMStateDescription vmstate_octeon_multipl= ier_tc =3D { } }; =20 +typedef struct OcteonLLMTreePutData { + QEMUFile *f; +} OcteonLLMTreePutData; + +static gboolean put_octeon_llm_tree_entry(gpointer key, gpointer value, + gpointer user_data) +{ + OcteonLLMTreePutData *data =3D user_data; + + qemu_put_be64(data->f, *(uint64_t *)key); + qemu_put_be64(data->f, *(uint64_t *)value); + return false; +} + +static int put_octeon_llm_tree(QEMUFile *f, void *pv, size_t size, + const VMStateField *field, JSONWriter *vmde= sc) +{ + QTree *tree =3D *(QTree **)pv; + OcteonLLMTreePutData data =3D { .f =3D f }; + uint32_t nnodes =3D tree ? q_tree_nnodes(tree) : 0; + + qemu_put_be32(f, nnodes); + if (tree) { + q_tree_foreach(tree, put_octeon_llm_tree_entry, &data); + } + + return 0; +} + +static int get_octeon_llm_tree(QEMUFile *f, void *pv, size_t size, + const VMStateField *field) +{ + QTree **treep =3D pv; + uint32_t nnodes =3D qemu_get_be32(f); + + if (*treep) { + q_tree_destroy(*treep); + } + *treep =3D mips_octeon_llm_tree_new(); + + for (uint32_t i =3D 0; i < nnodes; i++) { + uint64_t addr =3D qemu_get_be64(f); + uint64_t value =3D qemu_get_be64(f); + + mips_octeon_llm_store(treep, addr, value); + } + + return 0; +} + +static const VMStateInfo vmstate_info_octeon_llm_tree =3D { + .name =3D "octeon_llm_tree", + .get =3D get_octeon_llm_tree, + .put =3D put_octeon_llm_tree, +}; + +#define VMSTATE_OCTEON_LLM_TREE(_f, _s) { \ + .name =3D stringify(_f), \ + .version_id =3D 1, \ + .info =3D &vmstate_info_octeon_llm_tree, \ + .offset =3D vmstate_offset_pointer(_s, _f, QTree), \ +} + /* MVP state */ =20 static const VMStateDescription vmstate_mvp =3D { @@ -301,6 +364,10 @@ static const VMStateDescription mips_vmstate_octeon_cr= ypto =3D { VMSTATE_UINT16(env.octeon_crypto.gfm_poly, MIPSCPU), VMSTATE_UINT8(env.octeon_crypto.aes_keylen, MIPSCPU), VMSTATE_UINT8(env.octeon_crypto.crc_len, MIPSCPU), + VMSTATE_UINT64(env.octeon_crypto.chord, MIPSCPU), + VMSTATE_UINT64_ARRAY(env.octeon_crypto.llm_data, MIPSCPU, 2), + VMSTATE_OCTEON_LLM_TREE(env.octeon_crypto.llm36, MIPSCPU), + VMSTATE_OCTEON_LLM_TREE(env.octeon_crypto.llm64, MIPSCPU), VMSTATE_END_OF_LIST() } }; diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 92102636dd..77b4782f22 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -17,6 +17,41 @@ #include "qemu/host-utils.h" =20 #define OCTEON_SHA3_DAT15 15 +#define OCTEON_LLM_NARROW_MASK ((1ULL << 36) - 1) + +static uint64_t octeon_llm_pack_narrow(uint64_t value) +{ + value &=3D OCTEON_LLM_NARROW_MASK; + return value | ((uint64_t)(ctpop64(value) & 1) << 36); +} + +static void octeon_llm_read(MIPSOcteonCryptoState *crypto, unsigned int se= t, + uint64_t addr, bool wide) +{ + uint64_t value; + + if (wide) { + value =3D mips_octeon_llm_load(crypto->llm64, addr); + } else { + value =3D octeon_llm_pack_narrow( + mips_octeon_llm_load(crypto->llm36, addr)); + } + + crypto->llm_data[set] =3D value; +} + +static void octeon_llm_write(MIPSOcteonCryptoState *crypto, unsigned int s= et, + uint64_t addr, bool wide) +{ + uint64_t value =3D crypto->llm_data[set]; + + if (wide) { + mips_octeon_llm_store(&crypto->llm64, addr, value); + } else { + mips_octeon_llm_store(&crypto->llm36, addr, + value & OCTEON_LLM_NARROW_MASK); + } +} =20 static inline uint32_t octeon_crc_reflect32_by_byte(uint32_t v) { @@ -2348,3 +2383,43 @@ void helper_octeon_cp2_mt_crc_write_var_reflect(CPUM= IPSState *env, =20 octeon_crc_update_reflect(crypto, value, MIN(8U, crypto->crc_len & 0xf= )); } + +void helper_octeon_cp2_mt_llm_read_addr0(CPUMIPSState *env, uint64_t value) +{ + octeon_llm_read(&env->octeon_crypto, 0, value, false); +} + +void helper_octeon_cp2_mt_llm_write_addr0(CPUMIPSState *env, uint64_t valu= e) +{ + octeon_llm_write(&env->octeon_crypto, 0, value, false); +} + +void helper_octeon_cp2_mt_llm_read64_addr0(CPUMIPSState *env, uint64_t val= ue) +{ + octeon_llm_read(&env->octeon_crypto, 0, value, true); +} + +void helper_octeon_cp2_mt_llm_write64_addr0(CPUMIPSState *env, uint64_t va= lue) +{ + octeon_llm_write(&env->octeon_crypto, 0, value, true); +} + +void helper_octeon_cp2_mt_llm_read_addr1(CPUMIPSState *env, uint64_t value) +{ + octeon_llm_read(&env->octeon_crypto, 1, value, false); +} + +void helper_octeon_cp2_mt_llm_write_addr1(CPUMIPSState *env, uint64_t valu= e) +{ + octeon_llm_write(&env->octeon_crypto, 1, value, false); +} + +void helper_octeon_cp2_mt_llm_read64_addr1(CPUMIPSState *env, uint64_t val= ue) +{ + octeon_llm_read(&env->octeon_crypto, 1, value, true); +} + +void helper_octeon_cp2_mt_llm_write64_addr1(CPUMIPSState *env, uint64_t va= lue) +{ + octeon_llm_write(&env->octeon_crypto, 1, value, true); +} diff --git a/target/mips/tcg/op_helper.c b/target/mips/tcg/op_helper.c index 4502ae2b5b..3e586e3049 100644 --- a/target/mips/tcg/op_helper.c +++ b/target/mips/tcg/op_helper.c @@ -255,6 +255,12 @@ target_ulong helper_rdhwr_xnp(CPUMIPSState *env) return (env->CP0_Config5 >> CP0C5_XNP) & 1; } =20 +target_ulong helper_rdhwr_chord(CPUMIPSState *env) +{ + check_hwrena(env, 30, GETPC()); + return env->octeon_crypto.chord; +} + void helper_pmon(CPUMIPSState *env, int function) { function /=3D 2; diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 123d2c89c3..1f44932882 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -10925,6 +10925,14 @@ void gen_rdhwr(DisasContext *ctx, int rt, int rd, = int sel) } break; #endif + case 30: + if (!(ctx->insn_flags & INSN_OCTEON)) { + gen_reserved_instruction(ctx); + break; + } + gen_helper_rdhwr_chord(t0, tcg_env); + gen_store_gpr(t0, rt); + break; default: /* Invalid */ MIPS_INVAL("rdhwr"); gen_reserved_instruction(ctx); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386847; cv=none; d=zohomail.com; s=zohoarc; b=X4SabP9lAQaRNDs2xrIXWcs1+DrGZpFU9Ua6dAQe9E7ntvszC/Rkvx3YvOIdnhfWMBSwj6zoJJukUI2IIzM+jEJwhGcZ29WakEIqU3DsJhjH4JIEBkfZFceGWvCAGa0t0zHSc2XZnUtI3k8e8pkdfwShbNUg9fzJdS5dJIeGaN8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386847; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qIRrTp8+jeMSXIjhMludDMd1iY7EsebKtfgmzMxolmY=; b=Gbttb3MNsDVV1cykRmTB1180BTdodHew7+gJZtYTWDR451utjWLgAts+vMQ3D0OMbd0FSI+ohMUxF9p3IEqoNbfqnemXYAKEICeLG9SBn3Efr5Tdq+wlaq+Jdr0EYKTKPGtUhVxJszuRw44XM9hOxOCnKq7273ZImoBoegKSlHE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17793868474685.286504282156216; Thu, 21 May 2026 11:07:27 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nE-0000Iz-33; Thu, 21 May 2026 14:06:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n1-0000GK-UK for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:37 -0400 Received: from mail-ot1-x332.google.com ([2607:f8b0:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7mz-00024X-CH for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:35 -0400 Received: by mail-ot1-x332.google.com with SMTP id 46e09a7af769-7dbccf6a23dso5322116a34.2 for ; Thu, 21 May 2026 11:06:33 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386792; x=1779991592; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qIRrTp8+jeMSXIjhMludDMd1iY7EsebKtfgmzMxolmY=; b=OBMnBt08VzwHIYiwRRkaUKiwgY4+QmdtX7Gw/B41pKWi0HYScFCHGUu63e+UQKdOpR uMYLSHcAlq51Dr1uoUsgNFGg7XrR7WQqXuu26EYBan3oJBAHxx+odIAz1EPlMB6HW5BT cldJCRVx3wpbZtqT36pBVFs3Wnz8FwXvmKcqi5/vfBp95k15jQorU9unNtgEhFMhfxfW h2dvjVbElxumAYS+z8/ujNEYA+XmfGEWIBFWwILDWkqX2qU+CNDPjU6vZSUhbGtlp85B qi6TR51oaj3+HGQlp5o71wfaIcVvopKNjma9Q1pOLgMjeMLRLlTje+8VEPqHaSFC7WKs nGTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386792; x=1779991592; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=qIRrTp8+jeMSXIjhMludDMd1iY7EsebKtfgmzMxolmY=; b=Kd4TdB0N/9KP9kKwJX44Q7agx4bVuIC/XgFKi9TSU4QUbKO5pG5puPajS5H1I7pzCs 9i5xG/bMu4NEO05R3qyQPs865K0oONm1un7EfyjSVV6O6P6ZY48hFcb/uRy2kFd0m9PO JnN8oeTw81riSsPDGuihwD7aDHJtKxAPhR0jGYJLSDbL5tyQ2aOKILP4B4GB2rAFNpN9 nbY6JbMizRE+RFijdAHt0VOav+YS58r0NtKGQsnkkL9THsp7gObrjHhtCYOYh41FUM2n TQbA9Pu/y/CHd+ZPZAW55VpYckp5B05cg3VDXVRmonzI018B+hxHSzyDuPslGfB+TSAu pgUA== X-Gm-Message-State: AOJu0YzXU336LRPoiGT0ieCM+lwlQfMGucUgsa0GOiwYJtAb3iDJIRQ4 t2CGddPYgKOu+NluPcBQmwO8k60OaXODQoVRHcKEfgR38xfpFLPxvGDp X-Gm-Gg: Acq92OF4v1JaBxx/WBrorWlsqZM7ewtiYsga59ztJwNghKE1TGZ9QRv4XSMltBQFJmD TxFpbQduwEoRgWb3TPaZ4vAj3vfIe03zt1Dp0k+FFGpv6P+EASFqvW4GUBFBP8YE+TVqrr2x2qO xLnVPYFhc2Gs6niX2b96mnCMfGqYqW74JgdKSc9ejnTDqfr9NHVLqtyOVimu2jwC16ie7CSsth7 23Vap2Wau5euJWtURQs8oI7k3Ca9MHgTTJCn7tmh2D5Mv8k665L6YURbeC24qK1IdP9wlR6wTMF QF7SYq5OAW3EJJekhd815T54zoIRAQxG/rFRuynTLItszv21qCDWEcEl7K1bgJkwe/cgPVYZPhs 8UqTF9iyImpoyCCzLWiFGCgz8JLWe0BjnH6yACt+XFuhHs3BmEOT0xVo2O68FglN3R4P18tusiv cWPx+++GH+HjC6PEYEHwf/Sic84WHtNG7paJEAjHwVYhfIkmLEf3ck88IDXilRKxoG5UJZ2sMPM 64zbW0hQhOe+bYvsucA1uO9VVAVdRMXXaxyz6yhbqRdCOvWw6Ax6YAhMYDv5jOuHz1M X-Received: by 2002:a05:6830:349f:b0:7e1:90a:97bd with SMTP id 46e09a7af769-7e5fefa0749mr131654a34.17.1779386791992; Thu, 21 May 2026 11:06:31 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:08 -0600 Subject: [PATCH v13 15/22] target/mips: decode Octeon COP2 register selectors MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-15-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::332; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x332.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386848481158500 Add explicit decodetree entries and translator bindings for Octeon DMFC2/DMTC2 selectors that are simple COP2 register transfers. Emit direct TCG loads and stores for register moves. Use signed 32-bit loads for 32-bit DMFC2 readback and mask narrow writable fields such as AESKEYLEN and CRCLEN on DMTC2. Keep operation selectors with side effects in later functional decode patches. Signed-off-by: James Hilliard --- Changes v10 -> v13: - Keep simple register moves in their own selector patch. - Use final KAS result naming and final CRC register selector names. - Mask AESKEYLEN and CRCLEN direct writes. --- target/mips/tcg/octeon.decode | 72 +++++++++++ target/mips/tcg/octeon_translate.c | 179 ++++++++++++++++++++++= ++++ tests/tcg/mips/user/isa/octeon/octeon-insns.c | 71 ++++++++++ 3 files changed, 322 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 1e44c588dd..b7deb99f33 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -97,3 +97,75 @@ LBUX 011111 ..... ..... ..... 00110 001010 @lx LWUX 011111 ..... ..... ..... 10000 001010 @lx LBX 011111 ..... ..... ..... 10110 001010 @lx LDX 011111 ..... ..... ..... 01000 001010 @lx + +# Selector-driven DMFC2/DMTC2 interfaces for Octeon COP2 engines. +&cp2 rt +{ + [ + CVM_MF_HSH_IV0 010010 00001 rt:5 0000 0000 0100 = 1000 &cp2 + CVM_MF_HSH_IV1 010010 00001 rt:5 0000 0000 0100 = 1001 &cp2 + CVM_MF_HSH_IV2 010010 00001 rt:5 0000 0000 0100 = 1010 &cp2 + CVM_MF_HSH_IV3 010010 00001 rt:5 0000 0000 0100 = 1011 &cp2 + CVM_MF_3DES_KEY0 010010 00001 rt:5 0000 0000 1000 = 0000 &cp2 + CVM_MF_3DES_KEY1 010010 00001 rt:5 0000 0000 1000 = 0001 &cp2 + CVM_MF_3DES_KEY2 010010 00001 rt:5 0000 0000 1000 = 0010 &cp2 + CVM_MF_3DES_IV 010010 00001 rt:5 0000 0000 1000 = 0100 &cp2 + CVM_MF_3DES_RESULT 010010 00001 rt:5 0000 0000 1000 = 1000 &cp2 + CVM_MF_KAS_RESULT 010010 00001 rt:5 0000 0000 1001 = 1000 &cp2 + CVM_MF_AES_RESINP0 010010 00001 rt:5 0000 0001 0000 = 0000 &cp2 + CVM_MF_AES_RESINP1 010010 00001 rt:5 0000 0001 0000 = 0001 &cp2 + CVM_MF_AES_IV0 010010 00001 rt:5 0000 0001 0000 = 0010 &cp2 + CVM_MF_AES_IV1 010010 00001 rt:5 0000 0001 0000 = 0011 &cp2 + CVM_MF_AES_KEY0 010010 00001 rt:5 0000 0001 0000 = 0100 &cp2 + CVM_MF_AES_KEY1 010010 00001 rt:5 0000 0001 0000 = 0101 &cp2 + CVM_MF_AES_KEY2 010010 00001 rt:5 0000 0001 0000 = 0110 &cp2 + CVM_MF_AES_KEY3 010010 00001 rt:5 0000 0001 0000 = 0111 &cp2 + CVM_MF_AES_KEYLENGTH 010010 00001 rt:5 0000 0001 0001 = 0000 &cp2 + CVM_MF_AES_INP0 010010 00001 rt:5 0000 0001 0001 = 0001 &cp2 + CVM_MF_CRC_POLYNOMIAL 010010 00001 rt:5 0000 0010 0000 = 0000 &cp2 + CVM_MF_CRC_IV 010010 00001 rt:5 0000 0010 0000 = 0001 &cp2 + CVM_MF_CRC_LEN 010010 00001 rt:5 0000 0010 0000 = 0010 &cp2 + CVM_MF_GFM_MUL0 010010 00001 rt:5 0000 0010 0101 = 1000 &cp2 + CVM_MF_GFM_MUL1 010010 00001 rt:5 0000 0010 0101 = 1001 &cp2 + CVM_MF_GFM_RESINP0 010010 00001 rt:5 0000 0010 0101 = 1010 &cp2 + CVM_MF_GFM_RESINP1 010010 00001 rt:5 0000 0010 0101 = 1011 &cp2 + CVM_MF_GFM_POLY 010010 00001 rt:5 0000 0010 0101 = 1110 &cp2 + CVM_MT_HSH_DAT0 010010 00101 rt:5 0000 0000 0100 = 0000 &cp2 + CVM_MT_HSH_DAT1 010010 00101 rt:5 0000 0000 0100 = 0001 &cp2 + CVM_MT_HSH_DAT2 010010 00101 rt:5 0000 0000 0100 = 0010 &cp2 + CVM_MT_HSH_DAT3 010010 00101 rt:5 0000 0000 0100 = 0011 &cp2 + CVM_MT_HSH_DAT4 010010 00101 rt:5 0000 0000 0100 = 0100 &cp2 + CVM_MT_HSH_DAT5 010010 00101 rt:5 0000 0000 0100 = 0101 &cp2 + CVM_MT_HSH_DAT6 010010 00101 rt:5 0000 0000 0100 = 0110 &cp2 + CVM_MT_HSH_IV0 010010 00101 rt:5 0000 0000 0100 = 1000 &cp2 + CVM_MT_HSH_IV1 010010 00101 rt:5 0000 0000 0100 = 1001 &cp2 + CVM_MT_HSH_IV2 010010 00101 rt:5 0000 0000 0100 = 1010 &cp2 + CVM_MT_HSH_IV3 010010 00101 rt:5 0000 0000 0100 = 1011 &cp2 + CVM_MT_3DES_KEY0 010010 00101 rt:5 0000 0000 1000 = 0000 &cp2 + CVM_MT_3DES_KEY1 010010 00101 rt:5 0000 0000 1000 = 0001 &cp2 + CVM_MT_3DES_KEY2 010010 00101 rt:5 0000 0000 1000 = 0010 &cp2 + CVM_MT_3DES_IV 010010 00101 rt:5 0000 0000 1000 = 0100 &cp2 + CVM_MT_3DES_RESULT 010010 00101 rt:5 0000 0000 1001 = 1000 &cp2 + CVM_MT_AES_RESINP0 010010 00101 rt:5 0000 0001 0000 = 0000 &cp2 + CVM_MT_AES_RESINP1 010010 00101 rt:5 0000 0001 0000 = 0001 &cp2 + CVM_MT_AES_IV0 010010 00101 rt:5 0000 0001 0000 = 0010 &cp2 + CVM_MT_AES_IV1 010010 00101 rt:5 0000 0001 0000 = 0011 &cp2 + CVM_MT_AES_KEY0 010010 00101 rt:5 0000 0001 0000 = 0100 &cp2 + CVM_MT_AES_KEY1 010010 00101 rt:5 0000 0001 0000 = 0101 &cp2 + CVM_MT_AES_KEY2 010010 00101 rt:5 0000 0001 0000 = 0110 &cp2 + CVM_MT_AES_KEY3 010010 00101 rt:5 0000 0001 0000 = 0111 &cp2 + CVM_MT_AES_ENC_CBC0 010010 00101 rt:5 0000 0001 0000 = 1000 &cp2 + CVM_MT_AES_ENC0 010010 00101 rt:5 0000 0001 0000 = 1010 &cp2 + CVM_MT_AES_DEC_CBC0 010010 00101 rt:5 0000 0001 0000 = 1100 &cp2 + CVM_MT_AES_DEC0 010010 00101 rt:5 0000 0001 0000 = 1110 &cp2 + CVM_MT_AES_KEYLENGTH 010010 00101 rt:5 0000 0001 0001 = 0000 &cp2 + CVM_MT_CRC_IV 010010 00101 rt:5 0000 0010 0000 = 0001 &cp2 + CVM_MT_GFM_MUL0 010010 00101 rt:5 0000 0010 0101 = 1000 &cp2 + CVM_MT_GFM_MUL1 010010 00101 rt:5 0000 0010 0101 = 1001 &cp2 + CVM_MT_GFM_RESINP0 010010 00101 rt:5 0000 0010 0101 = 1010 &cp2 + CVM_MT_GFM_RESINP1 010010 00101 rt:5 0000 0010 0101 = 1011 &cp2 + CVM_MT_GFM_POLY 010010 00101 rt:5 0000 0010 0101 = 1110 &cp2 + CVM_MT_CRC_LEN 010010 00101 rt:5 0001 0010 0000 = 0010 &cp2 + CVM_MT_CRC_POLYNOMIAL 010010 00101 rt:5 0100 0010 0000 = 0000 &cp2 + ] +} diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_tr= anslate.c index b0af2f4838..910a18d64b 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -13,6 +13,185 @@ /* Include the auto-generated decoder. */ #include "decode-octeon.c.inc" =20 +#define OCTEON_CRYPTO_OFFSET(FIELD) \ + offsetof(CPUMIPSState, octeon_crypto.FIELD) + +#define CP2_MF_I64(NAME, FIELD) \ + TRANS(NAME, trans_octeon_cp2_mf_i64, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MF_S32(NAME, FIELD) \ + TRANS(NAME, trans_octeon_cp2_mf_s32, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MF_U16(NAME, FIELD) \ + TRANS(NAME, trans_octeon_cp2_mf_u16, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MF_U8(NAME, FIELD) \ + TRANS(NAME, trans_octeon_cp2_mf_u8, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MT_I64(NAME, FIELD) \ + TRANS(NAME, trans_octeon_cp2_mt_i64, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MT_U32(NAME, FIELD) \ + TRANS(NAME, trans_octeon_cp2_mt_u32, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MT_U16(NAME, FIELD) \ + TRANS(NAME, trans_octeon_cp2_mt_u16, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MT_U8_MASKED(NAME, FIELD, MASK) \ + TRANS(NAME, trans_octeon_cp2_mt_u8_masked, \ + OCTEON_CRYPTO_OFFSET(FIELD), MASK) + +static bool trans_CP2_Undef(DisasContext *ctx, arg_CP2_Undef *a) +{ + generate_exception_err(ctx, EXCP_CpU, 2); + return true; +} + +static bool trans_octeon_cp2_mf_i64(DisasContext *ctx, arg_cp2 *a, int off= set) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + tcg_gen_ld_i64(value, tcg_env, offset); + gen_store_gpr(value, a->rt); + return true; +} + +static bool trans_octeon_cp2_mf_s32(DisasContext *ctx, arg_cp2 *a, int off= set) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + tcg_gen_ld32s_i64(value, tcg_env, offset); + gen_store_gpr(value, a->rt); + return true; +} + +static bool trans_octeon_cp2_mf_u16(DisasContext *ctx, arg_cp2 *a, int off= set) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + tcg_gen_ld16u_i64(value, tcg_env, offset); + gen_store_gpr(value, a->rt); + return true; +} + +static bool trans_octeon_cp2_mf_u8(DisasContext *ctx, arg_cp2 *a, int offs= et) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + tcg_gen_ld8u_i64(value, tcg_env, offset); + gen_store_gpr(value, a->rt); + return true; +} + +static bool trans_octeon_cp2_mt_i64(DisasContext *ctx, arg_cp2 *a, int off= set) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + gen_load_gpr(value, a->rt); + tcg_gen_st_i64(value, tcg_env, offset); + return true; +} + +static bool trans_octeon_cp2_mt_u32(DisasContext *ctx, arg_cp2 *a, int off= set) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + gen_load_gpr(value, a->rt); + tcg_gen_st32_i64(value, tcg_env, offset); + return true; +} + +static bool trans_octeon_cp2_mt_u16(DisasContext *ctx, arg_cp2 *a, int off= set) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + gen_load_gpr(value, a->rt); + tcg_gen_st16_i64(value, tcg_env, offset); + return true; +} + +static bool trans_octeon_cp2_mt_u8_masked(DisasContext *ctx, arg_cp2 *a, + int offset, uint8_t mask) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + gen_load_gpr(value, a->rt); + tcg_gen_andi_i64(value, value, mask); + tcg_gen_st8_i64(value, tcg_env, offset); + return true; +} + +static bool trans_octeon_cp2_mt_resinp(DisasContext *ctx, arg_cp2 *a, + unsigned int index) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + gen_load_gpr(value, a->rt); + tcg_gen_st_i64(value, tcg_env, + OCTEON_CRYPTO_OFFSET(aes_resinp[index])); + return true; +} + +CP2_MF_I64(CVM_MF_HSH_IV0, hsh_iv[0]); +CP2_MF_I64(CVM_MF_HSH_IV1, hsh_iv[1]); +CP2_MF_I64(CVM_MF_HSH_IV2, hsh_iv[2]); +CP2_MF_I64(CVM_MF_HSH_IV3, hsh_iv[3]); +CP2_MF_I64(CVM_MF_3DES_KEY0, des3_key[0]); +CP2_MF_I64(CVM_MF_3DES_KEY1, des3_key[1]); +CP2_MF_I64(CVM_MF_3DES_KEY2, des3_key[2]); +CP2_MF_I64(CVM_MF_3DES_IV, des3_iv); +CP2_MF_I64(CVM_MF_3DES_RESULT, des3_result); +CP2_MF_I64(CVM_MF_KAS_RESULT, des3_result); +CP2_MF_I64(CVM_MF_AES_RESINP0, aes_resinp[0]); +CP2_MF_I64(CVM_MF_AES_RESINP1, aes_resinp[1]); +CP2_MF_I64(CVM_MF_AES_IV0, aes_iv[0]); +CP2_MF_I64(CVM_MF_AES_IV1, aes_iv[1]); +CP2_MF_I64(CVM_MF_AES_KEY0, aes_key[0]); +CP2_MF_I64(CVM_MF_AES_KEY1, aes_key[1]); +CP2_MF_I64(CVM_MF_AES_KEY2, aes_key[2]); +CP2_MF_I64(CVM_MF_AES_KEY3, aes_key[3]); +CP2_MF_U8(CVM_MF_AES_KEYLENGTH, aes_keylen); +CP2_MF_I64(CVM_MF_AES_INP0, aes_resinp[0]); +CP2_MF_S32(CVM_MF_CRC_POLYNOMIAL, crc_poly); +CP2_MF_S32(CVM_MF_CRC_IV, crc_iv); +CP2_MF_U8(CVM_MF_CRC_LEN, crc_len); +CP2_MF_I64(CVM_MF_GFM_MUL0, gfm_mul[0]); +CP2_MF_I64(CVM_MF_GFM_MUL1, gfm_mul[1]); +CP2_MF_I64(CVM_MF_GFM_RESINP0, gfm_resinp[0]); +CP2_MF_I64(CVM_MF_GFM_RESINP1, gfm_resinp[1]); +CP2_MF_U16(CVM_MF_GFM_POLY, gfm_poly); + +CP2_MT_I64(CVM_MT_HSH_DAT0, hsh_dat[0]); +CP2_MT_I64(CVM_MT_HSH_DAT1, hsh_dat[1]); +CP2_MT_I64(CVM_MT_HSH_DAT2, hsh_dat[2]); +CP2_MT_I64(CVM_MT_HSH_DAT3, hsh_dat[3]); +CP2_MT_I64(CVM_MT_HSH_DAT4, hsh_dat[4]); +CP2_MT_I64(CVM_MT_HSH_DAT5, hsh_dat[5]); +CP2_MT_I64(CVM_MT_HSH_DAT6, hsh_dat[6]); +CP2_MT_I64(CVM_MT_HSH_IV0, hsh_iv[0]); +CP2_MT_I64(CVM_MT_HSH_IV1, hsh_iv[1]); +CP2_MT_I64(CVM_MT_HSH_IV2, hsh_iv[2]); +CP2_MT_I64(CVM_MT_HSH_IV3, hsh_iv[3]); +CP2_MT_I64(CVM_MT_3DES_KEY0, des3_key[0]); +CP2_MT_I64(CVM_MT_3DES_KEY1, des3_key[1]); +CP2_MT_I64(CVM_MT_3DES_KEY2, des3_key[2]); +CP2_MT_I64(CVM_MT_3DES_IV, des3_iv); +CP2_MT_I64(CVM_MT_3DES_RESULT, des3_result); +TRANS(CVM_MT_AES_RESINP0, trans_octeon_cp2_mt_resinp, 0); +TRANS(CVM_MT_AES_RESINP1, trans_octeon_cp2_mt_resinp, 1); +CP2_MT_I64(CVM_MT_AES_IV0, aes_iv[0]); +CP2_MT_I64(CVM_MT_AES_IV1, aes_iv[1]); +CP2_MT_I64(CVM_MT_AES_KEY0, aes_key[0]); +CP2_MT_I64(CVM_MT_AES_KEY1, aes_key[1]); +CP2_MT_I64(CVM_MT_AES_KEY2, aes_key[2]); +CP2_MT_I64(CVM_MT_AES_KEY3, aes_key[3]); +CP2_MT_I64(CVM_MT_AES_ENC_CBC0, aes_resinp[0]); +CP2_MT_I64(CVM_MT_AES_ENC0, aes_resinp[0]); +CP2_MT_I64(CVM_MT_AES_DEC_CBC0, aes_resinp[0]); +CP2_MT_I64(CVM_MT_AES_DEC0, aes_resinp[0]); +CP2_MT_U8_MASKED(CVM_MT_AES_KEYLENGTH, aes_keylen, 3); +CP2_MT_U32(CVM_MT_CRC_IV, crc_iv); +CP2_MT_I64(CVM_MT_GFM_MUL0, gfm_mul[0]); +CP2_MT_I64(CVM_MT_GFM_MUL1, gfm_mul[1]); +CP2_MT_I64(CVM_MT_GFM_RESINP0, gfm_resinp[0]); +CP2_MT_I64(CVM_MT_GFM_RESINP1, gfm_resinp[1]); +CP2_MT_U16(CVM_MT_GFM_POLY, gfm_poly); +CP2_MT_U8_MASKED(CVM_MT_CRC_LEN, crc_len, 0xf); +CP2_MT_U32(CVM_MT_CRC_POLYNOMIAL, crc_poly); + static bool trans_BBIT(DisasContext *ctx, arg_BBIT *a) { TCGv_i64 p; diff --git a/tests/tcg/mips/user/isa/octeon/octeon-insns.c b/tests/tcg/mips= /user/isa/octeon/octeon-insns.c index 9153e37e9e..bb24b04375 100644 --- a/tests/tcg/mips/user/isa/octeon/octeon-insns.c +++ b/tests/tcg/mips/user/isa/octeon/octeon-insns.c @@ -186,6 +186,70 @@ static uint64_t octeon_mtp0_zeroes_p1(void) return rd; } =20 +static uint64_t octeon_cop2_key0_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a80104\n\t" /* dmtc2 $8, AES_KEY0 selector */ + ".word 0x482a0104\n\t" /* dmfc2 $10, AES_KEY0 selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + +static uint64_t octeon_cop2_key2_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a80106\n\t" /* dmtc2 $8, AES_KEY2 selector */ + ".word 0x482a0106\n\t" /* dmfc2 $10, AES_KEY2 selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + +static uint64_t octeon_cop2_key3_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a80107\n\t" /* dmtc2 $8, AES_KEY3 selector */ + ".word 0x482a0107\n\t" /* dmfc2 $10, AES_KEY3 selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + +static uint64_t octeon_cop2_keylength_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a80110\n\t" /* dmtc2 $8, AES_KEYLENGTH selector */ + ".word 0x482a0110\n\t" /* dmfc2 $10, AES_KEYLENGTH selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + int main(void) { assert(octeon_baddu(0x123, 0x0f0) =3D=3D 0x13); @@ -199,6 +263,13 @@ int main(void) assert(octeon_vmm0(5, 13, 7, 11) =3D=3D 59); assert(octeon_vmm0_zeroes_mpl1() =3D=3D 0); assert(octeon_mtp0_zeroes_p1() =3D=3D 0); + assert(octeon_cop2_key0_readback(0x1122334455667788ULL) =3D=3D + 0x1122334455667788ULL); + assert(octeon_cop2_key2_readback(0x8877665544332211ULL) =3D=3D + 0x8877665544332211ULL); + assert(octeon_cop2_key3_readback(0x0102030405060708ULL) =3D=3D + 0x0102030405060708ULL); + assert(octeon_cop2_keylength_readback(0xa5) =3D=3D 1); =20 return 0; } --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386930; cv=none; d=zohomail.com; s=zohoarc; b=VZrnsL88Uf3OG3KUiXQwebdPicuRvZBehOhXNDUAyQTdz/dkvAmqPKFwNrJCU5+xOxsIM9bNJpl9D5b2KcVYaUViepLmI/iL9tu7xa/gQqcWgUX7e+drp3U45yuHEDNXaLXB9wBGO9xPs7f7QC5nSBY9tNQrMhbXmydF2tAzP5s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386930; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8di2mfMmCxg4F+vytF1gT5VoDkpOaV33oKK07krbV1M=; b=imlED1lavtIK9kcojU7XagbDyF2DoW9PsDJwUt2xxAthC9TcVt3snPe9wfVekzt30zJ16Cd+z3SYEuOmICCG2zEwmzwiNY1RNQSM3PhkTL0z5f779qECNnUYdm1o8yvmViGHNsvmhhQ+BY224//+fuSsYSll0esz5bY4A7ef5lY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386930711841.9413805976287; Thu, 21 May 2026 11:08:50 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nH-0000Jv-9p; Thu, 21 May 2026 14:06:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n3-0000GO-0F for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:37 -0400 Received: from mail-ot1-x330.google.com ([2607:f8b0:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7n0-00024j-Kb for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:36 -0400 Received: by mail-ot1-x330.google.com with SMTP id 46e09a7af769-7de46b8e432so6326809a34.1 for ; Thu, 21 May 2026 11:06:34 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386793; x=1779991593; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8di2mfMmCxg4F+vytF1gT5VoDkpOaV33oKK07krbV1M=; b=cbzSZhR8y3vYyyLh78BK304/H/GofxSTjH600CewOiYhF+CKirZAUCcWhI/sYb88bv J7g3IVvBAbgkVxKxoN6o/CrTNPKZA4BakIbcWUME37g/WiKBN+c0eg1h1QN6o+Zu4P1m oTsAiajiG2N6lqbzjUkHRJXZB/grF8rLJivo/6lwgIieG9GsFeVXNzlGn5kXfWqdIbXl +rkPz2KCceDzflxwOCJ7cTsoklWylM8GZDL7wKP4EkwhJjq9IzVCJuSw3qm/tEjschRV zXfFeyvdzaTGD1yJviDD5KzcTt8O0ZNlrbtkO+xnrPqWvGZQcSI3fZUa/9fR150QvBYm Hy6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386793; x=1779991593; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=8di2mfMmCxg4F+vytF1gT5VoDkpOaV33oKK07krbV1M=; b=To7uy/wwfgpkKlP0vg7Pc/8J8FplyVIFOCBYRKNDeJviYxsGqtH3zTMXxR3dom1Qn8 L8BwFyA92NUB9GeJrgsZ228MgRBKlizNPDWO1xoGaKhCi93tReeAW6llg0eA5mpcXrDH au6LpW2jNPQbbUpQ0Xclm5lJztZewPTMeQ9EEB1qr7LJvfeTduJh6n+/nnBMWlg4dFfk tK1LgAnJVcgvZiaGTP/w14Zi03WaLBESM022n/xZ4j9kQDiqb4mEcquSTAWAJKScXrru ux5ysTq7PN0dJf+gybvgczL2KF3Qo3QDA8ItDh4txNLZ63h/vtSlXyOHB1o66zSOI5cl wbNw== X-Gm-Message-State: AOJu0Yxb5Qds0pGkX3wedmHjyjpekkJ47lBsiJjkRmIRmuNtnPmoqmtb sNBbyZIG0WujO/vqBTqSstW6C4h3lUBB76Aez/m5vniSYduzkpJziQih X-Gm-Gg: Acq92OHOWpM8qvopQdCtxwi6zKr6fnEyFUPJDRzyF/vnR0poL54pQJ3ncc9iNmwMz5n TwmLozegbQ/vUNVFYGOcuakY+xFjkrMizmNAv1k5iOUZ8qWONFBMaamkYJOtzzqcUM1TkA2tQFe k3PH2QeL7gKQEPDaDOdH+ajl7FuGtqfABoYLDExWKKGDdm31izGokk3m5c0lgXLBl/UW9jhjQ6v cJo9QgCAp5uhSKAYGjTynKC+OcGY0BMS0nS03NXtpmfDJNPuK5D1dNkzzOACZ+4UaOC2BUrRgQq 9/yC2+7Idw31Jk6UdpDMeb/wQ3/A+FCv+fE7Ui2WZh1fhIizMyRprxyo9OFvFz7JZLJmnonhqI9 ZgCn0RQcVKUTx5+2Wt/qzp/hpsT150/rmbd0YABbJT60nuJXMrKQWl0ycOkgjXB46BCSBWg4WWg Nr8sWmQak031hRwIlq5nl6eVi5wbmvCsv9fL7lR1t5RlDAotCkyGcg2KnIY1zxNYkJUm8yqabsM BcQ6O/zxFQql++AwPN8NjE2ATWWVQoItNYpS8OJDyseyxJPERVOAQOck0O6wb55SP8Aq/c0swyG nQc= X-Received: by 2002:a05:6830:2b09:b0:7d9:b338:a695 with SMTP id 46e09a7af769-7e5fed0c97dmr153109a34.5.1779386793353; Thu, 21 May 2026 11:06:33 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:09 -0600 Subject: [PATCH v13 16/22] target/mips: decode Octeon CRC and GFM COP2 selectors MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-16-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::330; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x330.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386932935158501 Add explicit decodetree entries and translator bindings for the Octeon CRC and GFM COP2 operation selectors. Unlike simple register moves, these selectors update CRC or Galois-field state and therefore remain per-operation helper calls. Keep CRC/GFM decode next to the helpers that implement these side effects while avoiding a monolithic selector-dispatch helper. Signed-off-by: James Hilliard --- Changes v10 -> v13: - Split simple register-transfer selectors into a separate COP2 register selector patch. - Use final CRC selector names in this patch instead of renaming them later in the series. - Route reflected GFM selectors through helpers immediately so no non-architectural reflected GFM state is introduced. - Add the reflected CRC polynomial helper with the selector decode that uses it. --- target/mips/helper.h | 1 + target/mips/tcg/octeon.decode | 22 +++++++++ target/mips/tcg/octeon_crypto.c | 7 +++ target/mips/tcg/octeon_translate.c | 50 +++++++++++++++++++ tests/tcg/mips/user/isa/octeon/octeon-insns.c | 70 +++++++++++++++++++++++= ++++ 5 files changed, 150 insertions(+) diff --git a/target/mips/helper.h b/target/mips/helper.h index c062863582..2902dde889 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -33,6 +33,7 @@ DEF_HELPER_1(octeon_cp2_mf_gfm_mul_reflect1, i64, env) DEF_HELPER_1(octeon_cp2_mf_gfm_resinp_reflect0, i64, env) DEF_HELPER_1(octeon_cp2_mf_gfm_resinp_reflect1, i64, env) DEF_HELPER_2(octeon_cp2_mt_crc_write_iv_reflect, void, env, i64) +DEF_HELPER_2(octeon_cp2_mt_crc_write_polynomial_reflect, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_crc_write_byte, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_crc_write_half, void, env, i64) DEF_HELPER_2(octeon_cp2_mt_crc_write_word, void, env, i64) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index b7deb99f33..4809f74a86 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -125,6 +125,11 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MF_CRC_POLYNOMIAL 010010 00001 rt:5 0000 0010 0000 = 0000 &cp2 CVM_MF_CRC_IV 010010 00001 rt:5 0000 0010 0000 = 0001 &cp2 CVM_MF_CRC_LEN 010010 00001 rt:5 0000 0010 0000 = 0010 &cp2 + CVM_MF_CRC_IV_REFLECT 010010 00001 rt:5 0000 0010 0000 = 0011 &cp2 + CVM_MF_GFM_MUL_REFLECT0 010010 00001 rt:5 0000 0000 0101 = 1000 &cp2 + CVM_MF_GFM_MUL_REFLECT1 010010 00001 rt:5 0000 0000 0101 = 1001 &cp2 + CVM_MF_GFM_RESINP_REFLECT0 010010 00001 rt:5 0000 0000 0101 = 1010 &cp2 + CVM_MF_GFM_RESINP_REFLECT1 010010 00001 rt:5 0000 0000 0101 = 1011 &cp2 CVM_MF_GFM_MUL0 010010 00001 rt:5 0000 0010 0101 = 1000 &cp2 CVM_MF_GFM_MUL1 010010 00001 rt:5 0000 0010 0101 = 1001 &cp2 CVM_MF_GFM_RESINP0 010010 00001 rt:5 0000 0010 0101 = 1010 &cp2 @@ -141,6 +146,9 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_HSH_IV1 010010 00101 rt:5 0000 0000 0100 = 1001 &cp2 CVM_MT_HSH_IV2 010010 00101 rt:5 0000 0000 0100 = 1010 &cp2 CVM_MT_HSH_IV3 010010 00101 rt:5 0000 0000 0100 = 1011 &cp2 + CVM_MT_GFM_MUL_REFLECT0 010010 00101 rt:5 0000 0000 0101 = 1000 &cp2 + CVM_MT_GFM_MUL_REFLECT1 010010 00101 rt:5 0000 0000 0101 = 1001 &cp2 + CVM_MT_GFM_XOR0_REFLECT 010010 00101 rt:5 0000 0000 0101 = 1100 &cp2 CVM_MT_3DES_KEY0 010010 00101 rt:5 0000 0000 1000 = 0000 &cp2 CVM_MT_3DES_KEY1 010010 00101 rt:5 0000 0000 1000 = 0001 &cp2 CVM_MT_3DES_KEY2 010010 00101 rt:5 0000 0000 1000 = 0010 &cp2 @@ -160,12 +168,26 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_AES_DEC0 010010 00101 rt:5 0000 0001 0000 = 1110 &cp2 CVM_MT_AES_KEYLENGTH 010010 00101 rt:5 0000 0001 0001 = 0000 &cp2 CVM_MT_CRC_IV 010010 00101 rt:5 0000 0010 0000 = 0001 &cp2 + CVM_MT_CRC_IV_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0001 &cp2 + CVM_MT_CRC_BYTE 010010 00101 rt:5 0000 0010 0000 = 0100 &cp2 + CVM_MT_CRC_HALF 010010 00101 rt:5 0000 0010 0000 = 0101 &cp2 + CVM_MT_CRC_WORD 010010 00101 rt:5 0000 0010 0000 = 0110 &cp2 + CVM_MT_CRC_BYTE_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0100 &cp2 + CVM_MT_CRC_HALF_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0101 &cp2 + CVM_MT_CRC_WORD_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0110 &cp2 CVM_MT_GFM_MUL0 010010 00101 rt:5 0000 0010 0101 = 1000 &cp2 CVM_MT_GFM_MUL1 010010 00101 rt:5 0000 0010 0101 = 1001 &cp2 CVM_MT_GFM_RESINP0 010010 00101 rt:5 0000 0010 0101 = 1010 &cp2 CVM_MT_GFM_RESINP1 010010 00101 rt:5 0000 0010 0101 = 1011 &cp2 CVM_MT_GFM_POLY 010010 00101 rt:5 0000 0010 0101 = 1110 &cp2 CVM_MT_CRC_LEN 010010 00101 rt:5 0001 0010 0000 = 0010 &cp2 + CVM_MT_CRC_DWORD 010010 00101 rt:5 0001 0010 0000 = 0111 &cp2 + CVM_MT_CRC_VAR 010010 00101 rt:5 0001 0010 0000 = 1000 &cp2 + CVM_MT_CRC_DWORD_REFLECT 010010 00101 rt:5 0001 0010 0001 = 0111 &cp2 + CVM_MT_CRC_VAR_REFLECT 010010 00101 rt:5 0001 0010 0001 = 1000 &cp2 + CVM_MT_GFM_XORMUL1_REFLECT 010010 00101 rt:5 0100 0000 0101 = 1101 &cp2 CVM_MT_CRC_POLYNOMIAL 010010 00101 rt:5 0100 0010 0000 = 0000 &cp2 + CVM_MT_CRC_POLYNOMIAL_REFLECT 010010 00101 rt:5 0100 0010 0001 = 0000 &cp2 + CVM_MT_GFM_XORMUL1 010010 00101 rt:5 0100 0010 0101 = 1101 &cp2 ] } diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypt= o.c index 77b4782f22..e724256818 100644 --- a/target/mips/tcg/octeon_crypto.c +++ b/target/mips/tcg/octeon_crypto.c @@ -2325,6 +2325,13 @@ void helper_octeon_cp2_mt_crc_write_iv_reflect(CPUMI= PSState *env, octeon_crc_reflect32_by_byte((uint32_t)value); } =20 +void helper_octeon_cp2_mt_crc_write_polynomial_reflect(CPUMIPSState *env, + uint64_t value) +{ + env->octeon_crypto.crc_poly =3D + octeon_crc_reflect32_by_byte((uint32_t)value); +} + void helper_octeon_cp2_mt_crc_write_byte(CPUMIPSState *env, uint64_t value) { octeon_crc_update_normal(&env->octeon_crypto, value, 1); diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_tr= anslate.c index 910a18d64b..8c58bc7007 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -24,6 +24,9 @@ TRANS(NAME, trans_octeon_cp2_mf_u16, OCTEON_CRYPTO_OFFSET(FIELD)) #define CP2_MF_U8(NAME, FIELD) \ TRANS(NAME, trans_octeon_cp2_mf_u8, OCTEON_CRYPTO_OFFSET(FIELD)) +#define CP2_MF_HELPER(NAME, SUFFIX) \ + TRANS(NAME, trans_octeon_cp2_mf_helper, \ + gen_helper_octeon_cp2_mf_ ## SUFFIX) #define CP2_MT_I64(NAME, FIELD) \ TRANS(NAME, trans_octeon_cp2_mt_i64, OCTEON_CRYPTO_OFFSET(FIELD)) #define CP2_MT_U32(NAME, FIELD) \ @@ -33,6 +36,9 @@ #define CP2_MT_U8_MASKED(NAME, FIELD, MASK) \ TRANS(NAME, trans_octeon_cp2_mt_u8_masked, \ OCTEON_CRYPTO_OFFSET(FIELD), MASK) +#define CP2_MT_HELPER(NAME, SUFFIX) \ + TRANS(NAME, trans_octeon_cp2_mt_helper, \ + gen_helper_octeon_cp2_mt_ ## SUFFIX) =20 static bool trans_CP2_Undef(DisasContext *ctx, arg_CP2_Undef *a) { @@ -76,6 +82,16 @@ static bool trans_octeon_cp2_mf_u8(DisasContext *ctx, ar= g_cp2 *a, int offset) return true; } =20 +static bool trans_octeon_cp2_mf_helper(DisasContext *ctx, arg_cp2 *a, + void (*gen_helper)(TCGv_i64, TCGv_e= nv)) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + gen_helper(value, tcg_env); + gen_store_gpr(value, a->rt); + return true; +} + static bool trans_octeon_cp2_mt_i64(DisasContext *ctx, arg_cp2 *a, int off= set) { TCGv_i64 value =3D tcg_temp_new_i64(); @@ -125,6 +141,16 @@ static bool trans_octeon_cp2_mt_resinp(DisasContext *c= tx, arg_cp2 *a, return true; } =20 +static bool trans_octeon_cp2_mt_helper(DisasContext *ctx, arg_cp2 *a, + void (*gen_helper)(TCGv_env, TCGv_i= 64)) +{ + TCGv_i64 value =3D tcg_temp_new_i64(); + + gen_load_gpr(value, a->rt); + gen_helper(tcg_env, value); + return true; +} + CP2_MF_I64(CVM_MF_HSH_IV0, hsh_iv[0]); CP2_MF_I64(CVM_MF_HSH_IV1, hsh_iv[1]); CP2_MF_I64(CVM_MF_HSH_IV2, hsh_iv[2]); @@ -154,6 +180,12 @@ CP2_MF_I64(CVM_MF_GFM_RESINP0, gfm_resinp[0]); CP2_MF_I64(CVM_MF_GFM_RESINP1, gfm_resinp[1]); CP2_MF_U16(CVM_MF_GFM_POLY, gfm_poly); =20 +CP2_MF_HELPER(CVM_MF_CRC_IV_REFLECT, crc_iv_reflect); +CP2_MF_HELPER(CVM_MF_GFM_MUL_REFLECT0, gfm_mul_reflect0); +CP2_MF_HELPER(CVM_MF_GFM_MUL_REFLECT1, gfm_mul_reflect1); +CP2_MF_HELPER(CVM_MF_GFM_RESINP_REFLECT0, gfm_resinp_reflect0); +CP2_MF_HELPER(CVM_MF_GFM_RESINP_REFLECT1, gfm_resinp_reflect1); + CP2_MT_I64(CVM_MT_HSH_DAT0, hsh_dat[0]); CP2_MT_I64(CVM_MT_HSH_DAT1, hsh_dat[1]); CP2_MT_I64(CVM_MT_HSH_DAT2, hsh_dat[2]); @@ -165,6 +197,9 @@ CP2_MT_I64(CVM_MT_HSH_IV0, hsh_iv[0]); CP2_MT_I64(CVM_MT_HSH_IV1, hsh_iv[1]); CP2_MT_I64(CVM_MT_HSH_IV2, hsh_iv[2]); CP2_MT_I64(CVM_MT_HSH_IV3, hsh_iv[3]); +CP2_MT_HELPER(CVM_MT_GFM_MUL_REFLECT0, gfm_mul_reflect0); +CP2_MT_HELPER(CVM_MT_GFM_MUL_REFLECT1, gfm_mul_reflect1); +CP2_MT_HELPER(CVM_MT_GFM_XOR0_REFLECT, gfm_xor0_reflect); CP2_MT_I64(CVM_MT_3DES_KEY0, des3_key[0]); CP2_MT_I64(CVM_MT_3DES_KEY1, des3_key[1]); CP2_MT_I64(CVM_MT_3DES_KEY2, des3_key[2]); @@ -192,6 +227,21 @@ CP2_MT_U16(CVM_MT_GFM_POLY, gfm_poly); CP2_MT_U8_MASKED(CVM_MT_CRC_LEN, crc_len, 0xf); CP2_MT_U32(CVM_MT_CRC_POLYNOMIAL, crc_poly); =20 +CP2_MT_HELPER(CVM_MT_CRC_POLYNOMIAL_REFLECT, crc_write_polynomial_reflect); +CP2_MT_HELPER(CVM_MT_CRC_IV_REFLECT, crc_write_iv_reflect); +CP2_MT_HELPER(CVM_MT_CRC_BYTE, crc_write_byte); +CP2_MT_HELPER(CVM_MT_CRC_HALF, crc_write_half); +CP2_MT_HELPER(CVM_MT_CRC_WORD, crc_write_word); +CP2_MT_HELPER(CVM_MT_CRC_BYTE_REFLECT, crc_write_byte_reflect); +CP2_MT_HELPER(CVM_MT_CRC_HALF_REFLECT, crc_write_half_reflect); +CP2_MT_HELPER(CVM_MT_CRC_WORD_REFLECT, crc_write_word_reflect); +CP2_MT_HELPER(CVM_MT_CRC_DWORD, crc_write_dword); +CP2_MT_HELPER(CVM_MT_CRC_VAR, crc_write_var); +CP2_MT_HELPER(CVM_MT_CRC_DWORD_REFLECT, crc_write_dword_reflect); +CP2_MT_HELPER(CVM_MT_CRC_VAR_REFLECT, crc_write_var_reflect); +CP2_MT_HELPER(CVM_MT_GFM_XORMUL1_REFLECT, gfm_xormul1_reflect); +CP2_MT_HELPER(CVM_MT_GFM_XORMUL1, gfm_xormul1); + static bool trans_BBIT(DisasContext *ctx, arg_BBIT *a) { TCGv_i64 p; diff --git a/tests/tcg/mips/user/isa/octeon/octeon-insns.c b/tests/tcg/mips= /user/isa/octeon/octeon-insns.c index bb24b04375..9ee4b8f990 100644 --- a/tests/tcg/mips/user/isa/octeon/octeon-insns.c +++ b/tests/tcg/mips/user/isa/octeon/octeon-insns.c @@ -250,6 +250,70 @@ static uint64_t octeon_cop2_keylength_readback(uint64_= t value) return rd; } =20 +static uint64_t octeon_cop2_crc_len_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a81202\n\t" /* dmtc2 $8, CRC_LEN selector */ + ".word 0x482a0202\n\t" /* dmfc2 $10, CRC_LEN selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + +static uint64_t octeon_cop2_crc_poly_reflect_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a84210\n\t" /* dmtc2 $8, CRC_POLYNOMIAL_REFLECT selecto= r */ + ".word 0x482a0200\n\t" /* dmfc2 $10, CRC_POLYNOMIAL selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + +static uint64_t octeon_cop2_gfm_mul_reflect_write_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a80058\n\t" /* dmtc2 $8, GFM_MUL_REFLECT0 selector */ + ".word 0x482a0258\n\t" /* dmfc2 $10, GFM_MUL0 selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + +static uint64_t octeon_cop2_gfm_mul_reflect_readback(uint64_t value) +{ + uint64_t rd; + + asm volatile( + "move $8, %[value]\n\t" + ".word 0x48a80258\n\t" /* dmtc2 $8, GFM_MUL0 selector */ + ".word 0x482a0058\n\t" /* dmfc2 $10, GFM_MUL_REFLECT0 selector */ + "move %[rd], $10\n\t" + : [rd] "=3Dr" (rd) + : [value] "r" (value) + : "$8", "$10"); + + return rd; +} + int main(void) { assert(octeon_baddu(0x123, 0x0f0) =3D=3D 0x13); @@ -270,6 +334,12 @@ int main(void) assert(octeon_cop2_key3_readback(0x0102030405060708ULL) =3D=3D 0x0102030405060708ULL); assert(octeon_cop2_keylength_readback(0xa5) =3D=3D 1); + assert(octeon_cop2_crc_len_readback(0xb5) =3D=3D 5); + assert(octeon_cop2_crc_poly_reflect_readback(0x12345678) =3D=3D 0x482c= 6a1e); + assert(octeon_cop2_gfm_mul_reflect_write_readback( + 0x0123456789abcdefULL) =3D=3D 0xf7b3d591e6a2c480ULL); + assert(octeon_cop2_gfm_mul_reflect_readback( + 0xfedcba9876543210ULL) =3D=3D 0x084c2a6e195d3b7fULL); =20 return 0; } --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386886; cv=none; d=zohomail.com; s=zohoarc; b=QEmZXQA/ckqoD6IsIjPxbg9H3rftuO4qK1dWCeRRegzKqyxfcoShK+jcY9lHD0Umykt5Z3H5t29Sm+QZz41eIUnbcYKHmqWTPHipZPUiLJ9MIC76T1YR77D0KVIzXcF8yRTQzFW3rs9agI2AqKPnSVt4a/z4wi6917EWCDxhC3I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386886; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3W8L3d1jgTNrLin8Af2Qsvt1R+EvdZP5sJcQl4W1RO0=; b=YyPHY15HE0zuodTnPeG42gJy0VV3bE9AxVkel9JkWG5ZxZ+UMV/+PU9cz4TZ4eWXbHFmsnHgVx9iNLmLs+rLF+SIJTbPQ+JNMv7g5uz2kiW8jVyntVeWZh6ttpivoXyuJeWyvgb8a8XueRoXhZvpcKEbG7Zc92cxBn3XV31aSzU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386886549257.44194948375946; Thu, 21 May 2026 11:08:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nF-0000JI-4S; Thu, 21 May 2026 14:06:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n4-0000Gx-E3 for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:38 -0400 Received: from mail-ot1-x330.google.com ([2607:f8b0:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7n1-000265-NV for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:37 -0400 Received: by mail-ot1-x330.google.com with SMTP id 46e09a7af769-7dcd17e19b6so3691234a34.1 for ; Thu, 21 May 2026 11:06:35 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386795; x=1779991595; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=3W8L3d1jgTNrLin8Af2Qsvt1R+EvdZP5sJcQl4W1RO0=; b=AxMI+XYSlcHXIboJlujbnHW7p/dfScK33SCoTp+WMLzAZ6lusuFCb52hJnnW24ZoKd BfQ/eAeuwGysVOClJ0mFaWV+srZBHzDCWUKkqtwRQkhMiCHLzFNZdSESAvg0y6rMeYZv ZDM0ylJpK8mITD5V+sePba1MtFT+fCkMlyAdNwdW6yYCgYzbFTIcJgNZAQQriMoIksfg AZWvx9bc2BqIZhGuE6yLUs2zpMnHh/lfg64QoWl263C6NUeo93PhOeZ0QDLa1pMWAZKb tGRkF5+7wG48h3zp+tK4Eoy/2BOp/CNbk/hm01hWs4cBlU7x0+6fLoiy2HTnHiPOFLgv 6Rjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386795; x=1779991595; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=3W8L3d1jgTNrLin8Af2Qsvt1R+EvdZP5sJcQl4W1RO0=; b=rQTzN1aATG/XVnG9nNFll2zJojUo641nJ/bDsyCI0wnE5XejbmGt95SfnikEgPgQbS 5wUTykNWs5d84L89co4odgpVKhjhQm6rfhzOMS0Z9oiD0HOFscfMkFSKhlA/4KMBAx1C nvP2Ck0c62iKZ8oTc7msThxYpgu99fUICU5/c8dWT8Ks3TsEmt5cFS+Vv/uWe1HtC5SS crg2/dNfYJpetXj1oHdZ5JU5dbUaE/SfRVUjQHL0rds6+MF60DtAFjIzTE8Z+axQu6gQ eJbKxThjEu7A+vtXmfZ40PkQoNLPq68xqZOrKsrReu2cxydlzxoOjJB7SphkQYPZK7gr 6Weg== X-Gm-Message-State: AOJu0Ywt5Hljps4TeeJuCZA1ITf4L9S1d2iUGqxWosarE42fp4anJTOQ rT5poGEYYnnXl5YrFm/wFntiXeGHjSW2DX0plHrihNdmEj9y4pdHS1/P X-Gm-Gg: Acq92OF1QsJ7SnN/llMgFYp7v71/oVOMoar2gjzbt6Q3sVHgvy+9ijqdo82HTdHq7vI Ln3Wqjkh04LD7YYcZOkswsPBTjhrPlaYF4rtojiiUsQjdlZHqfH5iMH5VmRQOxZRzGHN/q5Vraz Z0V6+/Q9Eajv6qiseYELLJda/BetmVrgDPtn+IXoTRA1SB1Xma2s8VyWLNBOrb9aAv26JW7j9yo 2xUp80oXufaa7ntKEZfDANwI3bRE3xzz5hF7AxOxQKv+LePiyxcy6fS6+5EE8n6nOyImyQLOjSG 9P+a0qvRA0V0m1YY3AcCaO2C1YQDaRRSeJQMDIt9j1XwUqA3x6TPj6mnYPu24mEBx/iTiu56lCy GmVZ2ZYO/AOA1B9UaU3rBgfAkmtieJaCNV4xmtojKhHh1RaQZYBBh/rATamM4hDiiABPbv/0FwO jW779z/spUh1gqVzPq66C+jrdHhBTIZ8xprFzs6jNXo+R1e4fXkvw7WfT2DCcFKp6zvFBTFFmaE zgfzWkB7rLp+uZB4DhXS2y/b5kJfuwQy1NSONZ8Stym4yx6nFTixBffyL67fbQUlSSr X-Received: by 2002:a05:6830:82fc:b0:7e3:fa27:c176 with SMTP id 46e09a7af769-7e5feecbb2bmr138517a34.16.1779386794585; Thu, 21 May 2026 11:06:34 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:10 -0600 Subject: [PATCH v13 17/22] target/mips: decode Octeon HSH and SHA3 COP2 selectors MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-17-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::330; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x330.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386888580158500 Add explicit decodetree entries and translator bindings for the Octeon HSH shared-window selectors and SHA3 operation selectors. These paths need helper calls because HSH/SHA3 selectors alias the architectural hash register window and operation selectors have visible side effects. Keep HSH/SHA3 decode separate from direct register transfers because the shared hash-window aliases require helper-mediated state updates. Signed-off-by: James Hilliard --- Changes v10 -> v13: - Keep this patch limited to HSH/SHA3 selector additions; CRC/GFM selector finalization stays in the CRC/GFM selector patch. - Name the 0x0057 SDK compatibility selector as STARTSHA1_COMPAT and document why it is kept despite not appearing in the public manuals. Changes v9 -> v10: - Split HSH/SHA3 selector decode out of the monolithic Octeon COP2 selector decode patch. - Reworked the shared HSH/SHA3 register-window transfers around the architectural hash state instead of DATW/IVW shadow state. --- target/mips/tcg/octeon.decode | 77 ++++++++++++++++++++++++++++++++++= ++++ target/mips/tcg/octeon_translate.c | 77 ++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 154 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 4809f74a86..31c857fa89 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -106,6 +106,7 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MF_HSH_IV1 010010 00001 rt:5 0000 0000 0100 = 1001 &cp2 CVM_MF_HSH_IV2 010010 00001 rt:5 0000 0000 0100 = 1010 &cp2 CVM_MF_HSH_IV3 010010 00001 rt:5 0000 0000 0100 = 1011 &cp2 + CVM_MF_SHA3_DAT24 010010 00001 rt:5 0000 0000 0101 = 0000 &cp2 CVM_MF_3DES_KEY0 010010 00001 rt:5 0000 0000 1000 = 0000 &cp2 CVM_MF_3DES_KEY1 010010 00001 rt:5 0000 0000 1000 = 0001 &cp2 CVM_MF_3DES_KEY2 010010 00001 rt:5 0000 0000 1000 = 0010 &cp2 @@ -130,6 +131,30 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MF_GFM_MUL_REFLECT1 010010 00001 rt:5 0000 0000 0101 = 1001 &cp2 CVM_MF_GFM_RESINP_REFLECT0 010010 00001 rt:5 0000 0000 0101 = 1010 &cp2 CVM_MF_GFM_RESINP_REFLECT1 010010 00001 rt:5 0000 0000 0101 = 1011 &cp2 + CVM_MF_HSH_DATW0 010010 00001 rt:5 0000 0010 0100 = 0000 &cp2 + CVM_MF_HSH_DATW1 010010 00001 rt:5 0000 0010 0100 = 0001 &cp2 + CVM_MF_HSH_DATW2 010010 00001 rt:5 0000 0010 0100 = 0010 &cp2 + CVM_MF_HSH_DATW3 010010 00001 rt:5 0000 0010 0100 = 0011 &cp2 + CVM_MF_HSH_DATW4 010010 00001 rt:5 0000 0010 0100 = 0100 &cp2 + CVM_MF_HSH_DATW5 010010 00001 rt:5 0000 0010 0100 = 0101 &cp2 + CVM_MF_HSH_DATW6 010010 00001 rt:5 0000 0010 0100 = 0110 &cp2 + CVM_MF_HSH_DATW7 010010 00001 rt:5 0000 0010 0100 = 0111 &cp2 + CVM_MF_HSH_DATW8 010010 00001 rt:5 0000 0010 0100 = 1000 &cp2 + CVM_MF_HSH_DATW9 010010 00001 rt:5 0000 0010 0100 = 1001 &cp2 + CVM_MF_HSH_DATW10 010010 00001 rt:5 0000 0010 0100 = 1010 &cp2 + CVM_MF_HSH_DATW11 010010 00001 rt:5 0000 0010 0100 = 1011 &cp2 + CVM_MF_HSH_DATW12 010010 00001 rt:5 0000 0010 0100 = 1100 &cp2 + CVM_MF_HSH_DATW13 010010 00001 rt:5 0000 0010 0100 = 1101 &cp2 + CVM_MF_HSH_DATW14 010010 00001 rt:5 0000 0010 0100 = 1110 &cp2 + CVM_MF_HSH_DATW15 010010 00001 rt:5 0000 0010 0100 = 1111 &cp2 + CVM_MF_HSH_IVW0 010010 00001 rt:5 0000 0010 0101 = 0000 &cp2 + CVM_MF_HSH_IVW1 010010 00001 rt:5 0000 0010 0101 = 0001 &cp2 + CVM_MF_HSH_IVW2 010010 00001 rt:5 0000 0010 0101 = 0010 &cp2 + CVM_MF_HSH_IVW3 010010 00001 rt:5 0000 0010 0101 = 0011 &cp2 + CVM_MF_HSH_IVW4 010010 00001 rt:5 0000 0010 0101 = 0100 &cp2 + CVM_MF_HSH_IVW5 010010 00001 rt:5 0000 0010 0101 = 0101 &cp2 + CVM_MF_HSH_IVW6 010010 00001 rt:5 0000 0010 0101 = 0110 &cp2 + CVM_MF_HSH_IVW7 010010 00001 rt:5 0000 0010 0101 = 0111 &cp2 CVM_MF_GFM_MUL0 010010 00001 rt:5 0000 0010 0101 = 1000 &cp2 CVM_MF_GFM_MUL1 010010 00001 rt:5 0000 0010 0101 = 1001 &cp2 CVM_MF_GFM_RESINP0 010010 00001 rt:5 0000 0010 0101 = 1010 &cp2 @@ -146,6 +171,10 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_HSH_IV1 010010 00101 rt:5 0000 0000 0100 = 1001 &cp2 CVM_MT_HSH_IV2 010010 00101 rt:5 0000 0000 0100 = 1010 &cp2 CVM_MT_HSH_IV3 010010 00101 rt:5 0000 0000 0100 = 1011 &cp2 + CVM_MT_SHA3_DAT24 010010 00101 rt:5 0000 0000 0101 = 0000 &cp2 + CVM_MT_SHA3_DAT15 010010 00101 rt:5 0000 0000 0101 = 0001 &cp2 + # Cavium SDK code uses 0x0057 as a STARTSHA1 compatibility alias. + CVM_MT_HSH_STARTSHA1_COMPAT 010010 00101 rt:5 0000 0000 0101 = 0111 &cp2 CVM_MT_GFM_MUL_REFLECT0 010010 00101 rt:5 0000 0000 0101 = 1000 &cp2 CVM_MT_GFM_MUL_REFLECT1 010010 00101 rt:5 0000 0000 0101 = 1001 &cp2 CVM_MT_GFM_XOR0_REFLECT 010010 00101 rt:5 0000 0000 0101 = 1100 &cp2 @@ -175,19 +204,67 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_CRC_BYTE_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0100 &cp2 CVM_MT_CRC_HALF_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0101 &cp2 CVM_MT_CRC_WORD_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0110 &cp2 + CVM_MT_HSH_DATW0 010010 00101 rt:5 0000 0010 0100 = 0000 &cp2 + CVM_MT_HSH_DATW1 010010 00101 rt:5 0000 0010 0100 = 0001 &cp2 + CVM_MT_HSH_DATW2 010010 00101 rt:5 0000 0010 0100 = 0010 &cp2 + CVM_MT_HSH_DATW3 010010 00101 rt:5 0000 0010 0100 = 0011 &cp2 + CVM_MT_HSH_DATW4 010010 00101 rt:5 0000 0010 0100 = 0100 &cp2 + CVM_MT_HSH_DATW5 010010 00101 rt:5 0000 0010 0100 = 0101 &cp2 + CVM_MT_HSH_DATW6 010010 00101 rt:5 0000 0010 0100 = 0110 &cp2 + CVM_MT_HSH_DATW7 010010 00101 rt:5 0000 0010 0100 = 0111 &cp2 + CVM_MT_HSH_DATW8 010010 00101 rt:5 0000 0010 0100 = 1000 &cp2 + CVM_MT_HSH_DATW9 010010 00101 rt:5 0000 0010 0100 = 1001 &cp2 + CVM_MT_HSH_DATW10 010010 00101 rt:5 0000 0010 0100 = 1010 &cp2 + CVM_MT_HSH_DATW11 010010 00101 rt:5 0000 0010 0100 = 1011 &cp2 + CVM_MT_HSH_DATW12 010010 00101 rt:5 0000 0010 0100 = 1100 &cp2 + CVM_MT_HSH_DATW13 010010 00101 rt:5 0000 0010 0100 = 1101 &cp2 + CVM_MT_HSH_DATW14 010010 00101 rt:5 0000 0010 0100 = 1110 &cp2 + CVM_MT_HSH_DATW15 010010 00101 rt:5 0000 0010 0100 = 1111 &cp2 + CVM_MT_HSH_IVW0 010010 00101 rt:5 0000 0010 0101 = 0000 &cp2 + CVM_MT_HSH_IVW1 010010 00101 rt:5 0000 0010 0101 = 0001 &cp2 + CVM_MT_HSH_IVW2 010010 00101 rt:5 0000 0010 0101 = 0010 &cp2 + CVM_MT_HSH_IVW3 010010 00101 rt:5 0000 0010 0101 = 0011 &cp2 + CVM_MT_HSH_IVW4 010010 00101 rt:5 0000 0010 0101 = 0100 &cp2 + CVM_MT_HSH_IVW5 010010 00101 rt:5 0000 0010 0101 = 0101 &cp2 + CVM_MT_HSH_IVW6 010010 00101 rt:5 0000 0010 0101 = 0110 &cp2 + CVM_MT_HSH_IVW7 010010 00101 rt:5 0000 0010 0101 = 0111 &cp2 CVM_MT_GFM_MUL0 010010 00101 rt:5 0000 0010 0101 = 1000 &cp2 CVM_MT_GFM_MUL1 010010 00101 rt:5 0000 0010 0101 = 1001 &cp2 CVM_MT_GFM_RESINP0 010010 00101 rt:5 0000 0010 0101 = 1010 &cp2 CVM_MT_GFM_RESINP1 010010 00101 rt:5 0000 0010 0101 = 1011 &cp2 + CVM_MT_GFM_XOR0 010010 00101 rt:5 0000 0010 0101 = 1100 &cp2 CVM_MT_GFM_POLY 010010 00101 rt:5 0000 0010 0101 = 1110 &cp2 + CVM_MT_SHA3_XORDAT0 010010 00101 rt:5 0000 0010 1100 = 0000 &cp2 + CVM_MT_SHA3_XORDAT1 010010 00101 rt:5 0000 0010 1100 = 0001 &cp2 + CVM_MT_SHA3_XORDAT2 010010 00101 rt:5 0000 0010 1100 = 0010 &cp2 + CVM_MT_SHA3_XORDAT3 010010 00101 rt:5 0000 0010 1100 = 0011 &cp2 + CVM_MT_SHA3_XORDAT4 010010 00101 rt:5 0000 0010 1100 = 0100 &cp2 + CVM_MT_SHA3_XORDAT5 010010 00101 rt:5 0000 0010 1100 = 0101 &cp2 + CVM_MT_SHA3_XORDAT6 010010 00101 rt:5 0000 0010 1100 = 0110 &cp2 + CVM_MT_SHA3_XORDAT7 010010 00101 rt:5 0000 0010 1100 = 0111 &cp2 + CVM_MT_SHA3_XORDAT8 010010 00101 rt:5 0000 0010 1100 = 1000 &cp2 + CVM_MT_SHA3_XORDAT9 010010 00101 rt:5 0000 0010 1100 = 1001 &cp2 + CVM_MT_SHA3_XORDAT10 010010 00101 rt:5 0000 0010 1100 = 1010 &cp2 + CVM_MT_SHA3_XORDAT11 010010 00101 rt:5 0000 0010 1100 = 1011 &cp2 + CVM_MT_SHA3_XORDAT12 010010 00101 rt:5 0000 0010 1100 = 1100 &cp2 + CVM_MT_SHA3_XORDAT13 010010 00101 rt:5 0000 0010 1100 = 1101 &cp2 + CVM_MT_SHA3_XORDAT14 010010 00101 rt:5 0000 0010 1100 = 1110 &cp2 + CVM_MT_SHA3_XORDAT15 010010 00101 rt:5 0000 0010 1100 = 1111 &cp2 + CVM_MT_SHA3_XORDAT16 010010 00101 rt:5 0000 0010 1101 = 0000 &cp2 + CVM_MT_SHA3_XORDAT17 010010 00101 rt:5 0000 0010 1101 = 0001 &cp2 CVM_MT_CRC_LEN 010010 00101 rt:5 0001 0010 0000 = 0010 &cp2 CVM_MT_CRC_DWORD 010010 00101 rt:5 0001 0010 0000 = 0111 &cp2 CVM_MT_CRC_VAR 010010 00101 rt:5 0001 0010 0000 = 1000 &cp2 CVM_MT_CRC_DWORD_REFLECT 010010 00101 rt:5 0001 0010 0001 = 0111 &cp2 CVM_MT_CRC_VAR_REFLECT 010010 00101 rt:5 0001 0010 0001 = 1000 &cp2 + CVM_MT_HSH_STARTMD5 010010 00101 rt:5 0100 0000 0100 = 0111 &cp2 + CVM_MT_HSH_STARTSHA256 010010 00101 rt:5 0100 0000 0100 = 1111 &cp2 + CVM_MT_SHA3_STARTOP 010010 00101 rt:5 0100 0000 0101 = 0010 &cp2 + CVM_MT_HSH_STARTSHA 010010 00101 rt:5 0100 0000 0101 = 0111 &cp2 CVM_MT_GFM_XORMUL1_REFLECT 010010 00101 rt:5 0100 0000 0101 = 1101 &cp2 CVM_MT_CRC_POLYNOMIAL 010010 00101 rt:5 0100 0010 0000 = 0000 &cp2 CVM_MT_CRC_POLYNOMIAL_REFLECT 010010 00101 rt:5 0100 0010 0001 = 0000 &cp2 + CVM_MT_HSH_STARTSHA512 010010 00101 rt:5 0100 0010 0100 = 1111 &cp2 CVM_MT_GFM_XORMUL1 010010 00101 rt:5 0100 0010 0101 = 1101 &cp2 ] } diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_tr= anslate.c index 8c58bc7007..e975774332 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -181,10 +181,35 @@ CP2_MF_I64(CVM_MF_GFM_RESINP1, gfm_resinp[1]); CP2_MF_U16(CVM_MF_GFM_POLY, gfm_poly); =20 CP2_MF_HELPER(CVM_MF_CRC_IV_REFLECT, crc_iv_reflect); +CP2_MF_HELPER(CVM_MF_SHA3_DAT24, sha3_dat24); CP2_MF_HELPER(CVM_MF_GFM_MUL_REFLECT0, gfm_mul_reflect0); CP2_MF_HELPER(CVM_MF_GFM_MUL_REFLECT1, gfm_mul_reflect1); CP2_MF_HELPER(CVM_MF_GFM_RESINP_REFLECT0, gfm_resinp_reflect0); CP2_MF_HELPER(CVM_MF_GFM_RESINP_REFLECT1, gfm_resinp_reflect1); +CP2_MF_I64(CVM_MF_HSH_DATW0, hsh_dat[0]); +CP2_MF_I64(CVM_MF_HSH_DATW1, hsh_dat[1]); +CP2_MF_I64(CVM_MF_HSH_DATW2, hsh_dat[2]); +CP2_MF_I64(CVM_MF_HSH_DATW3, hsh_dat[3]); +CP2_MF_I64(CVM_MF_HSH_DATW4, hsh_dat[4]); +CP2_MF_I64(CVM_MF_HSH_DATW5, hsh_dat[5]); +CP2_MF_I64(CVM_MF_HSH_DATW6, hsh_dat[6]); +CP2_MF_I64(CVM_MF_HSH_DATW7, hsh_dat[7]); +CP2_MF_I64(CVM_MF_HSH_DATW8, hsh_dat[8]); +CP2_MF_I64(CVM_MF_HSH_DATW9, hsh_dat[9]); +CP2_MF_I64(CVM_MF_HSH_DATW10, hsh_dat[10]); +CP2_MF_I64(CVM_MF_HSH_DATW11, hsh_dat[11]); +CP2_MF_I64(CVM_MF_HSH_DATW12, hsh_dat[12]); +CP2_MF_I64(CVM_MF_HSH_DATW13, hsh_dat[13]); +CP2_MF_I64(CVM_MF_HSH_DATW14, hsh_dat[14]); +CP2_MF_I64(CVM_MF_HSH_DATW15, hsh_dat[15]); +CP2_MF_I64(CVM_MF_HSH_IVW0, hsh_iv[0]); +CP2_MF_I64(CVM_MF_HSH_IVW1, hsh_iv[1]); +CP2_MF_I64(CVM_MF_HSH_IVW2, hsh_iv[2]); +CP2_MF_I64(CVM_MF_HSH_IVW3, hsh_iv[3]); +CP2_MF_I64(CVM_MF_HSH_IVW4, hsh_iv[4]); +CP2_MF_I64(CVM_MF_HSH_IVW5, hsh_iv[5]); +CP2_MF_I64(CVM_MF_HSH_IVW6, hsh_iv[6]); +CP2_MF_I64(CVM_MF_HSH_IVW7, hsh_iv[7]); =20 CP2_MT_I64(CVM_MT_HSH_DAT0, hsh_dat[0]); CP2_MT_I64(CVM_MT_HSH_DAT1, hsh_dat[1]); @@ -223,11 +248,13 @@ CP2_MT_I64(CVM_MT_GFM_MUL0, gfm_mul[0]); CP2_MT_I64(CVM_MT_GFM_MUL1, gfm_mul[1]); CP2_MT_I64(CVM_MT_GFM_RESINP0, gfm_resinp[0]); CP2_MT_I64(CVM_MT_GFM_RESINP1, gfm_resinp[1]); +CP2_MT_HELPER(CVM_MT_GFM_XOR0, gfm_xor0); CP2_MT_U16(CVM_MT_GFM_POLY, gfm_poly); CP2_MT_U8_MASKED(CVM_MT_CRC_LEN, crc_len, 0xf); CP2_MT_U32(CVM_MT_CRC_POLYNOMIAL, crc_poly); =20 CP2_MT_HELPER(CVM_MT_CRC_POLYNOMIAL_REFLECT, crc_write_polynomial_reflect); + CP2_MT_HELPER(CVM_MT_CRC_IV_REFLECT, crc_write_iv_reflect); CP2_MT_HELPER(CVM_MT_CRC_BYTE, crc_write_byte); CP2_MT_HELPER(CVM_MT_CRC_HALF, crc_write_half); @@ -241,6 +268,56 @@ CP2_MT_HELPER(CVM_MT_CRC_DWORD_REFLECT, crc_write_dwor= d_reflect); CP2_MT_HELPER(CVM_MT_CRC_VAR_REFLECT, crc_write_var_reflect); CP2_MT_HELPER(CVM_MT_GFM_XORMUL1_REFLECT, gfm_xormul1_reflect); CP2_MT_HELPER(CVM_MT_GFM_XORMUL1, gfm_xormul1); +CP2_MT_HELPER(CVM_MT_SHA3_DAT24, sha3_dat24); +CP2_MT_HELPER(CVM_MT_SHA3_DAT15, sha3_dat15); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT0, sha3_xordat0); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT1, sha3_xordat1); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT2, sha3_xordat2); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT3, sha3_xordat3); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT4, sha3_xordat4); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT5, sha3_xordat5); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT6, sha3_xordat6); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT7, sha3_xordat7); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT8, sha3_xordat8); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT9, sha3_xordat9); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT10, sha3_xordat10); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT11, sha3_xordat11); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT12, sha3_xordat12); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT13, sha3_xordat13); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT14, sha3_xordat14); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT15, sha3_xordat15); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT16, sha3_xordat16); +CP2_MT_HELPER(CVM_MT_SHA3_XORDAT17, sha3_xordat17); +CP2_MT_HELPER(CVM_MT_SHA3_STARTOP, sha3_startop); +CP2_MT_HELPER(CVM_MT_HSH_STARTSHA1_COMPAT, hsh_startsha1_compat); +CP2_MT_I64(CVM_MT_HSH_DATW0, hsh_dat[0]); +CP2_MT_I64(CVM_MT_HSH_DATW1, hsh_dat[1]); +CP2_MT_I64(CVM_MT_HSH_DATW2, hsh_dat[2]); +CP2_MT_I64(CVM_MT_HSH_DATW3, hsh_dat[3]); +CP2_MT_I64(CVM_MT_HSH_DATW4, hsh_dat[4]); +CP2_MT_I64(CVM_MT_HSH_DATW5, hsh_dat[5]); +CP2_MT_I64(CVM_MT_HSH_DATW6, hsh_dat[6]); +CP2_MT_I64(CVM_MT_HSH_DATW7, hsh_dat[7]); +CP2_MT_I64(CVM_MT_HSH_DATW8, hsh_dat[8]); +CP2_MT_I64(CVM_MT_HSH_DATW9, hsh_dat[9]); +CP2_MT_I64(CVM_MT_HSH_DATW10, hsh_dat[10]); +CP2_MT_I64(CVM_MT_HSH_DATW11, hsh_dat[11]); +CP2_MT_I64(CVM_MT_HSH_DATW12, hsh_dat[12]); +CP2_MT_I64(CVM_MT_HSH_DATW13, hsh_dat[13]); +CP2_MT_I64(CVM_MT_HSH_DATW14, hsh_dat[14]); +CP2_MT_I64(CVM_MT_HSH_DATW15, hsh_dat[15]); +CP2_MT_I64(CVM_MT_HSH_IVW0, hsh_iv[0]); +CP2_MT_I64(CVM_MT_HSH_IVW1, hsh_iv[1]); +CP2_MT_I64(CVM_MT_HSH_IVW2, hsh_iv[2]); +CP2_MT_I64(CVM_MT_HSH_IVW3, hsh_iv[3]); +CP2_MT_I64(CVM_MT_HSH_IVW4, hsh_iv[4]); +CP2_MT_I64(CVM_MT_HSH_IVW5, hsh_iv[5]); +CP2_MT_I64(CVM_MT_HSH_IVW6, hsh_iv[6]); +CP2_MT_I64(CVM_MT_HSH_IVW7, hsh_iv[7]); +CP2_MT_HELPER(CVM_MT_HSH_STARTMD5, hsh_startmd5); +CP2_MT_HELPER(CVM_MT_HSH_STARTSHA256, hsh_startsha256); +CP2_MT_HELPER(CVM_MT_HSH_STARTSHA, hsh_startsha); +CP2_MT_HELPER(CVM_MT_HSH_STARTSHA512, hsh_startsha512); =20 static bool trans_BBIT(DisasContext *ctx, arg_BBIT *a) { --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386928; cv=none; d=zohomail.com; s=zohoarc; b=XQ4CAp60Y2Um8ObxWK+bYNZW64zcYo/QsqLOnpXVZ1ha8r1mc+Nip2hlLYdmWjKce/j9FTiwx1KTTQN6qkoWLKJLOIncLh2H69tQlF9r+wr4/vcuaNuABMgkndOFbndIpyHFxjuxzk9ZWibw1iZel7jVQdPD9HojzKlqBEk/ryA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386928; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Mce15bqHzvNgL+6+BcL1FB9WiNDPad0v55v3KAaqQ+8=; b=PQdWZZRWzaasidkHkZooSx9ZQgpjti3PJB/zWyVIMYQDg+2TTg/JmoXYDL9Sx2MH5fEmEx+2pHadEa0hwQCDbvDa17nIA9lZodGLayZXZjy73zV544Ser/zC2akpokjA4e6nsa87pLSFaV8BRR+gyAJYcPevYm1J0x8efz5FC0I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386928077950.1745208321573; Thu, 21 May 2026 11:08:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nF-0000JJ-4L; Thu, 21 May 2026 14:06:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n4-0000Gy-Ea for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:38 -0400 Received: from mail-ot1-x331.google.com ([2607:f8b0:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7n2-00026N-JW for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:37 -0400 Received: by mail-ot1-x331.google.com with SMTP id 46e09a7af769-7dcd17e19b6so3691242a34.1 for ; Thu, 21 May 2026 11:06:36 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386795; x=1779991595; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Mce15bqHzvNgL+6+BcL1FB9WiNDPad0v55v3KAaqQ+8=; b=hF76rN1K7ilUUsV/1tlnYMz8hH8rTZFYnVw0QBMOjLWEDMMVt/+Dc/yWW6E83pbGuK 2mW8+nC11i2cWUd7+Ei2M0el0o5/mjx/ViT7hMASo9zGb7ogzStgKUgxeu1xAdam0tHI WuEeB7mTF2h3xDj/h1RDONN6V+l922tCtCqB92FHIbX5PJjUzSumk+4QPfhzpk4gyWQf tsZnPMi4gKMHpywRxdYPi60R9w/lyLw9qB/QZF7uRCObEGLlTNdqB246okRIiUd2kOCI qC+cRGe+nLDJAfVGhb7gzoSZW9cXAYoddxeMnhJYL7i4yIznZlkvFWA/vIOwtkzg0NB+ Tgew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386795; x=1779991595; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Mce15bqHzvNgL+6+BcL1FB9WiNDPad0v55v3KAaqQ+8=; b=JsQrghtbJvQ2AkOUT8ZtdRax5yAKskejsQSr/6dwCNNIkWxdVHutetgsaPAMlamQv+ IckmatUmZcrpEUdJ0y73UNOjBE1Zb6+WkTfsnrPfXMzfj39TfwZ0QtjKxAseh4wpf6A4 ldyMVO8zSGrkiFE4a9JhhT3QSNWySHkZULXODgX0+yRqVq3rhon5B79nbGnCsNguS+Nv OFzV2RyBjnrSXm0+aoRdYXHdSnmyKU1LwJ9iSjYOwNfyoI0MCRHlPQIlXzwc28JJ0y1A gVmICsuTAbiCl5+rkbY58paXzjcqYfP1iC161vTIA1Xdk67AnCIKl/Z/5nK2tSNznhko uFdg== X-Gm-Message-State: AOJu0YzVBVsOrxyiLUWe+i7J7G7wBDtX/jafSbdRCQzAMpD3dSf6XQO3 PmsYp8RGLLJdmiNcMNlE2vect9JXI4dU/ivvwleTr3FBD/z7owZLEWaJ X-Gm-Gg: Acq92OFkiy11+5jAHagq2ZI2DdPzGDajLLfWJ0Dksn+My9ZHcJe8osb3dHdg/zfLC2u lF8EIbf6NOvQqAkP2o1trjNeUzILCgpzSAuVtEVcOWOXtA4NX+HczFwcPi1BA7wC0tNEaB8mAyj 767vVqHmvjeiyTPM41m56F652yWEtle0BotPdVYZWWHz8S8iz6kWYguWLIg9Yt8rq1bhSeV6s3A AakqsNtpkWhpVW+DQeIhVjaqVAOieq627/aE1getdt/q6YLPFSuL2Tyjq/WvpDD6exyW8EOH/PM edtMqo317zquOX5B1hcIuOw+vYVEIhd1GCz8QehPz6a2Vn1bm+9/XPTg8ddeUtEhw4ExfLc3bYD k8VLzuOyFGtVUUeifT5RNi5WmRVZguKF6Hh5jn0MhbXKHkRbIyANsnC+wneADv/EovL9K8+2WFy qs4CLzWd/m8MuQ3gDrZ9I7897RVRdxq5hVvQPLCxGy0DvDujTuxNJ9qcmABhex08xJps1UFv1mr l7Iz8wsTkruZL/DYnR1uYN7tOCvJ7Et3vIVx/xTC/yv+Xj1J6obRQPbehDP9pfiplhK X-Received: by 2002:a05:6830:6d4d:b0:7e1:cbe3:bb1b with SMTP id 46e09a7af769-7e5fea05c4dmr205697a34.0.1779386795456; Thu, 21 May 2026 11:06:35 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:11 -0600 Subject: [PATCH v13 18/22] target/mips: decode Octeon ZUC and SNOW3G COP2 selectors MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-18-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::331; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x331.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386928861158500 Add explicit decodetree entries and translator bindings for the Octeon ZUC and SNOW3G COP2 operation selectors. These stream-cipher selectors operate on the shared HSH register window state, so dispatch them through the per-operation helpers added with the corresponding engine support. Keep stream-cipher decode separate because these selectors share the HSH register window with unrelated engines. Signed-off-by: James Hilliard --- Changes v9 -> v10: - Split ZUC/SNOW3G selector decode out of the monolithic Octeon COP2 selector decode patch. - Kept stream-cipher operation selectors helper-backed because they operate on the shared HSH register-window state. --- target/mips/tcg/octeon.decode | 4 ++++ target/mips/tcg/octeon_translate.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 31c857fa89..87d98673ba 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -258,8 +258,12 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_CRC_DWORD_REFLECT 010010 00101 rt:5 0001 0010 0001 = 0111 &cp2 CVM_MT_CRC_VAR_REFLECT 010010 00101 rt:5 0001 0010 0001 = 1000 &cp2 CVM_MT_HSH_STARTMD5 010010 00101 rt:5 0100 0000 0100 = 0111 &cp2 + CVM_MT_SNOW3G_START 010010 00101 rt:5 0100 0000 0100 = 1101 &cp2 + CVM_MT_SNOW3G_MORE 010010 00101 rt:5 0100 0000 0100 = 1110 &cp2 CVM_MT_HSH_STARTSHA256 010010 00101 rt:5 0100 0000 0100 = 1111 &cp2 CVM_MT_SHA3_STARTOP 010010 00101 rt:5 0100 0000 0101 = 0010 &cp2 + CVM_MT_ZUC_START 010010 00101 rt:5 0100 0000 0101 = 0101 &cp2 + CVM_MT_ZUC_MORE 010010 00101 rt:5 0100 0000 0101 = 0110 &cp2 CVM_MT_HSH_STARTSHA 010010 00101 rt:5 0100 0000 0101 = 0111 &cp2 CVM_MT_GFM_XORMUL1_REFLECT 010010 00101 rt:5 0100 0000 0101 = 1101 &cp2 CVM_MT_CRC_POLYNOMIAL 010010 00101 rt:5 0100 0010 0000 = 0000 &cp2 diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_tr= anslate.c index e975774332..d1db676c17 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -289,6 +289,10 @@ CP2_MT_HELPER(CVM_MT_SHA3_XORDAT15, sha3_xordat15); CP2_MT_HELPER(CVM_MT_SHA3_XORDAT16, sha3_xordat16); CP2_MT_HELPER(CVM_MT_SHA3_XORDAT17, sha3_xordat17); CP2_MT_HELPER(CVM_MT_SHA3_STARTOP, sha3_startop); +CP2_MT_HELPER(CVM_MT_ZUC_START, zuc_start); +CP2_MT_HELPER(CVM_MT_ZUC_MORE, zuc_more); +CP2_MT_HELPER(CVM_MT_SNOW3G_START, snow3g_start); +CP2_MT_HELPER(CVM_MT_SNOW3G_MORE, snow3g_more); CP2_MT_HELPER(CVM_MT_HSH_STARTSHA1_COMPAT, hsh_startsha1_compat); CP2_MT_I64(CVM_MT_HSH_DATW0, hsh_dat[0]); CP2_MT_I64(CVM_MT_HSH_DATW1, hsh_dat[1]); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386942; cv=none; d=zohomail.com; s=zohoarc; b=YDX24Qmveaw/WSfeUzeyhA85RP6+QeZIzF/Lwct7tUWb6ry+Lof/oZtxFtJHoxJHpDr/4WleHAy7H20Tj+2nEYhfzl3UDF2fzNJyeocR1tVavc3Zrqb3g78Pjydk/o6PA1bTwouTJP5twTzEVh+OHHnmxw4F5hM9ynNOld41iQs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386942; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=YyAUIECeICv+rFq3df0wMc0ODSca22bLGZ+7lU79RDY=; b=JaHu54BkQpYVPJhdxi9H7lgRBGe2S1hCCdz95I21BPK6YjIhsa7x/Wxax9xGg29VmZf3S2+s/0NGIEJiYn5TNU8Rc3XBcJVwhGVl1SBRClRcldSLlZ9ASf6GxyIsD8td/SPLW1LS47JsATq0jduZl4uwXCQsgnmiGZ5nbC6vE5M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386942682364.9118037375574; Thu, 21 May 2026 11:09:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nF-0000Jl-IB; Thu, 21 May 2026 14:06:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n5-0000H9-Vg for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:40 -0400 Received: from mail-ot1-x329.google.com ([2607:f8b0:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7n4-00026m-6A for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:39 -0400 Received: by mail-ot1-x329.google.com with SMTP id 46e09a7af769-7d4c383f2fcso5599434a34.0 for ; Thu, 21 May 2026 11:06:37 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386796; x=1779991596; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=YyAUIECeICv+rFq3df0wMc0ODSca22bLGZ+7lU79RDY=; b=Hxjz+9+yf6J6rzRzWyWi2nzl/983h86aGB79JS6kGZJmCNQVgOnh0HTtqhgSyuIHBf /BF4riF9y4RB6KlAlXagxfPd17RPdNwpQ1HHGWmSadd4ZBZj9V4pDmCgpf8FsNnDejax ZihP9cCBmOhXs40Cd3Q7wSCTYFXVt1tUjaUGnTi66ZQCmHvwC14SEaFu8OnGKS5XSoPs 9sBd3awW1zdpxi3LY1nqO4RTqr5G5H5Ajxd3E0GsXDBhkdoN3fUCwbINe17oMeAZll33 ETs0Qqe/2iNbaC89CWqeoNshnGQUMlDCklS+Euw9ygkzJpsUhdAbhqxBtf5MtRkcgYVp wrgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386796; x=1779991596; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=YyAUIECeICv+rFq3df0wMc0ODSca22bLGZ+7lU79RDY=; b=R5dOt0TuoLdruRYMOxhEwa7vHoRdY2GBQvHREBid9+I6Zs/0BvN7zZsUKsNwRPhai2 ButwXmf5ckJ3fcIkDqw+XnNKAjOmwYR2hZA7h0Lj/rIIjT9NtS4mt37NBUzli9wMHoHL UwptqtQohiL/YdFuaKbxOge9OrbW6a3MyWhqqRXwe57mm5CXwBNPJhWnBSEM8kcqK8q0 y+sROD+qTfPbinEX6XhjsWub86WzmOfV3IIEJCm7jwdLmkTclv8Zr9OyLNDXS7EC5oVn i/vg/5xf0fUg0BZ4I9ael5kPwmpzFVWfp3ll3iQWP9HspgDKesNIdtD5mub8f02JbXxQ +R7A== X-Gm-Message-State: AOJu0Yz4aLNp095QL5RR+xGaHTCAkR2n1e92saRa4gG9/u9/u3pRo2E1 BpkeH6zgQAn7kWq6dSbuuVTHP1mzjXtBwHsiNCxsSBaBi9aL4sJ1KNfb X-Gm-Gg: Acq92OFB4jPQwWPGsGzosScG8VqzbWBGh1ai91WapN8/q8ExfNwfCe2n7S3vvCgpSgS vWIq1YlIC/ZjcHMMRpaddriBJ0eFwvV+WBpViet2tkT7J/xSZXYfsYH7h/1DVueERMn8gCKrTbj TTSbAVHC+J+nFeoLQ6qrV+gK7r2e1f4+gjCQc8ZncJNOcRkMH44OpEPuEqdYCT02O3vg0jO7yY/ TRIM4MDl6SPGCzWq1j5NkEXsXqgKXm+bBepvXnjnOsgQU4JWd6uV2oPmNdF/Oqh63Q69tZkbrb3 KJIV0jKLyBvPWw/sYkOAHljo93h+rKdjGkxjmPp1jUUh2yAJDip79Jgew53bGCsPeTF8s1+x4Qo ABhXlyaaj527rHGgXEQNhs6zfpIe6C1OtIMOekPaii0OAXmmEcBslLwKuI9MHstddrncoy3PANu hhLZrd69z6w/1l7k1ZzD6+FywM95D49Sc9M0aJURKtv6oJeprAYK9gZZZzWV/KY1BrHlf+y4l/S 71nPFS1thjyQm8GSoyY38sNMO/ENXawv70wlxq/3Ni14RAynJQTuUb+s5bN33E6gSmg X-Received: by 2002:a05:6830:6d4d:b0:7e3:ef86:19f6 with SMTP id 46e09a7af769-7e5fee50b9amr130032a34.8.1779386796296; Thu, 21 May 2026 11:06:36 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:12 -0600 Subject: [PATCH v13 19/22] target/mips: decode Octeon block-cipher COP2 selectors MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-19-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::329; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x329.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386942813158500 Add explicit decodetree entries and translator bindings for the Octeon AES, SMS4, 3DES, KASUMI, and Camellia COP2 operation selectors. These selectors consume or update engine state, so keep them as per-operation helper calls while the simple block-cipher register moves remain direct TCG loads and stores from the earlier register-selector patch. This completes the block-cipher selector coverage without reintroducing a generic runtime selector dispatch path. Signed-off-by: James Hilliard --- Changes v9 -> v10: - Split AES, SMS4, 3DES, KASUMI, and Camellia selector decode out of the monolithic Octeon COP2 selector decode patch. - Kept block-cipher operation selectors helper-backed while simple register moves remain direct TCG transfers. --- target/mips/tcg/octeon.decode | 17 +++++++++++++++++ target/mips/tcg/octeon_translate.c | 17 +++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 87d98673ba..9f2905795b 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -196,6 +196,8 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_AES_DEC_CBC0 010010 00101 rt:5 0000 0001 0000 = 1100 &cp2 CVM_MT_AES_DEC0 010010 00101 rt:5 0000 0001 0000 = 1110 &cp2 CVM_MT_AES_KEYLENGTH 010010 00101 rt:5 0000 0001 0001 = 0000 &cp2 + CVM_MT_CAMELLIA_FL 010010 00101 rt:5 0000 0001 0001 = 0101 &cp2 + CVM_MT_CAMELLIA_FLINV 010010 00101 rt:5 0000 0001 0001 = 0110 &cp2 CVM_MT_CRC_IV 010010 00101 rt:5 0000 0010 0000 = 0001 &cp2 CVM_MT_CRC_IV_REFLECT 010010 00101 rt:5 0000 0010 0001 = 0001 &cp2 CVM_MT_CRC_BYTE 010010 00101 rt:5 0000 0010 0000 = 0100 &cp2 @@ -257,6 +259,15 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_CRC_VAR 010010 00101 rt:5 0001 0010 0000 = 1000 &cp2 CVM_MT_CRC_DWORD_REFLECT 010010 00101 rt:5 0001 0010 0001 = 0111 &cp2 CVM_MT_CRC_VAR_REFLECT 010010 00101 rt:5 0001 0010 0001 = 1000 &cp2 + CVM_MT_AES_ENC_CBC1 010010 00101 rt:5 0011 0001 0000 = 1001 &cp2 + CVM_MT_AES_ENC1 010010 00101 rt:5 0011 0001 0000 = 1011 &cp2 + CVM_MT_AES_DEC_CBC1 010010 00101 rt:5 0011 0001 0000 = 1101 &cp2 + CVM_MT_AES_DEC1 010010 00101 rt:5 0011 0001 0000 = 1111 &cp2 + CVM_MT_CAMELLIA_ROUND 010010 00101 rt:5 0011 0001 0001 = 0100 &cp2 + CVM_MT_SMS4_ENC_CBC1 010010 00101 rt:5 0011 0001 0001 = 1001 &cp2 + CVM_MT_SMS4_ENC1 010010 00101 rt:5 0011 0001 0001 = 1011 &cp2 + CVM_MT_SMS4_DEC_CBC1 010010 00101 rt:5 0011 0001 0001 = 1101 &cp2 + CVM_MT_SMS4_DEC1 010010 00101 rt:5 0011 0001 0001 = 1111 &cp2 CVM_MT_HSH_STARTMD5 010010 00101 rt:5 0100 0000 0100 = 0111 &cp2 CVM_MT_SNOW3G_START 010010 00101 rt:5 0100 0000 0100 = 1101 &cp2 CVM_MT_SNOW3G_MORE 010010 00101 rt:5 0100 0000 0100 = 1110 &cp2 @@ -266,6 +277,12 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_ZUC_MORE 010010 00101 rt:5 0100 0000 0101 = 0110 &cp2 CVM_MT_HSH_STARTSHA 010010 00101 rt:5 0100 0000 0101 = 0111 &cp2 CVM_MT_GFM_XORMUL1_REFLECT 010010 00101 rt:5 0100 0000 0101 = 1101 &cp2 + CVM_MT_3DES_ENC_CBC 010010 00101 rt:5 0100 0000 1000 = 1000 &cp2 + CVM_MT_KAS_ENC_CBC 010010 00101 rt:5 0100 0000 1000 = 1001 &cp2 + CVM_MT_3DES_ENC 010010 00101 rt:5 0100 0000 1000 = 1010 &cp2 + CVM_MT_KAS_ENC 010010 00101 rt:5 0100 0000 1000 = 1011 &cp2 + CVM_MT_3DES_DEC_CBC 010010 00101 rt:5 0100 0000 1000 = 1100 &cp2 + CVM_MT_3DES_DEC 010010 00101 rt:5 0100 0000 1000 = 1110 &cp2 CVM_MT_CRC_POLYNOMIAL 010010 00101 rt:5 0100 0010 0000 = 0000 &cp2 CVM_MT_CRC_POLYNOMIAL_REFLECT 010010 00101 rt:5 0100 0010 0001 = 0000 &cp2 CVM_MT_HSH_STARTSHA512 010010 00101 rt:5 0100 0010 0100 = 1111 &cp2 diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_tr= anslate.c index d1db676c17..41bfcc47b3 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -293,6 +293,23 @@ CP2_MT_HELPER(CVM_MT_ZUC_START, zuc_start); CP2_MT_HELPER(CVM_MT_ZUC_MORE, zuc_more); CP2_MT_HELPER(CVM_MT_SNOW3G_START, snow3g_start); CP2_MT_HELPER(CVM_MT_SNOW3G_MORE, snow3g_more); +CP2_MT_HELPER(CVM_MT_AES_ENC_CBC1, aes_enc_cbc1); +CP2_MT_HELPER(CVM_MT_AES_ENC1, aes_enc1); +CP2_MT_HELPER(CVM_MT_AES_DEC_CBC1, aes_dec_cbc1); +CP2_MT_HELPER(CVM_MT_AES_DEC1, aes_dec1); +CP2_MT_HELPER(CVM_MT_SMS4_ENC_CBC1, sms4_enc_cbc1); +CP2_MT_HELPER(CVM_MT_SMS4_ENC1, sms4_enc1); +CP2_MT_HELPER(CVM_MT_SMS4_DEC_CBC1, sms4_dec_cbc1); +CP2_MT_HELPER(CVM_MT_SMS4_DEC1, sms4_dec1); +CP2_MT_HELPER(CVM_MT_3DES_ENC_CBC, des3_enc_cbc); +CP2_MT_HELPER(CVM_MT_KAS_ENC_CBC, kas_enc_cbc); +CP2_MT_HELPER(CVM_MT_3DES_ENC, des3_enc); +CP2_MT_HELPER(CVM_MT_KAS_ENC, kas_enc); +CP2_MT_HELPER(CVM_MT_3DES_DEC_CBC, des3_dec_cbc); +CP2_MT_HELPER(CVM_MT_3DES_DEC, des3_dec); +CP2_MT_HELPER(CVM_MT_CAMELLIA_FL, camellia_fl); +CP2_MT_HELPER(CVM_MT_CAMELLIA_FLINV, camellia_flinv); +CP2_MT_HELPER(CVM_MT_CAMELLIA_ROUND, camellia_round); CP2_MT_HELPER(CVM_MT_HSH_STARTSHA1_COMPAT, hsh_startsha1_compat); CP2_MT_I64(CVM_MT_HSH_DATW0, hsh_dat[0]); CP2_MT_I64(CVM_MT_HSH_DATW1, hsh_dat[1]); --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386882; cv=none; d=zohomail.com; s=zohoarc; b=UXEQMZp5tmDiP5TKnWpnaVhQ0twPXQzTpoPRZAnTA5EIis7NcsnmSW0ZzHJLrA/occMwd/FKoV8h5DTR1EPysuqB4w7wbQXR41csATnvtmQykny7Y7yDWGqh0UfA3t6LUd7ksO4Fik2+PI2e8YfDwRuHjXSYCibYnV/4o2t2clk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386882; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fpwiBtNqlipCJe2vzrwxpxXwFsEBVwwe+J4psgPGXeI=; b=lliklVtThdlF0MABYIRrZDau6QkG1VvEdVV+2D3fcot5ZC870XSBXq8r3GUrlLyWzQg5XcQBNKq659NQCp8jgGydDQXuQdO2GKAlgTUCGUaJAE78hQJoJ+9A/JY3biGusnkUwbUOLpi+HBxuSny8BYFfcq9GqhwSMg5nIgoQSB0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386882854729.7912197537925; Thu, 21 May 2026 11:08:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nH-0000Ju-9k; Thu, 21 May 2026 14:06:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n6-0000HE-9G for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:41 -0400 Received: from mail-ot1-x32e.google.com ([2607:f8b0:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7n4-000273-I9 for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:40 -0400 Received: by mail-ot1-x32e.google.com with SMTP id 46e09a7af769-7dca4debedaso6647302a34.2 for ; Thu, 21 May 2026 11:06:38 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386797; x=1779991597; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fpwiBtNqlipCJe2vzrwxpxXwFsEBVwwe+J4psgPGXeI=; b=kAS9qgM0WvqM35qTxSYmktfxRT7D8LJtRWnfIZD9hYV9uZ/u9ay/ltl8N5rYFc1LrM VO1MoQq7+4QP95BWfPP3fHZ+K65cCpMwmZdB+6hfc/Z+heVCLfEuhdTv7QK7abceC1+1 jU/O8RRBdC6cj1fpizgH2tX8cIKfH1Sgm8nF+pHpQH0k0Q8wbBU2HrA4VVyGo2KB/Jdb ATFV/6MZtBDA+dNMQ1bOfUiptjXHEm47jEvg4eIiAGr4YFp+UnghriDwscrIK9WF9Wr7 TdxW/jtEOpFbI/OlsJU7eHsQ99rI+X0KtRww/l5zGZaeyO1MTqGMjKe+1qMUv22KFJlJ VQfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386797; x=1779991597; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=fpwiBtNqlipCJe2vzrwxpxXwFsEBVwwe+J4psgPGXeI=; b=Phc6y2mftJXWI6i4+Bjclv6eRvtsnvkcEp3mZumBZbU3SQ+j6RRe6YG+NcwObkd7O0 ODK0w8pz3PXvxmdm7p8SMy4dV9nXVAYOIJaBYE6yXRs0f3mHP3ymjKcXenXhgQe/ojAT us7NJdXwaqPJXGaX0iRh6EVNjM7Mf/IfnCpZGmQ9+rKbsArOTtDbbP7U5TGNqHRId3+A c/ExHCuzN1U8+UF+GtJsUcd3KiiC0G83Egj2NDC56MViOtosVJV0ClJnFVE9j6hdEKsR xCZ19C/q/ncFN99f1qYgPE0D0p0I34ppnJIRZzpj2lg7H5kMw9MGQcvflPhr7T12GmU5 d54Q== X-Gm-Message-State: AOJu0YxrhcS12rznrFkisATFJYDUPuNbIHQZU7fh2C6pwndstEDA0mnc xbwH77X8CsQlHxqZ58GdUwDPa0lbozZY64bdHm3JzN4x/2yUGQltRzxW X-Gm-Gg: Acq92OG2tXcr1k+AL2do6vyzChGUyOFDCLmjl1LLXqfj9NW57IXGU2loEHJxRxl1KvF KIhUVAIe4puYSdBToyxeyg1sf+eM9LCwCVIToeca4PSSjyyIUDbZRBoZwP/kG2lUmG7/F1iW2Dk kCNncak6Kj1B9FJq7bz2bWnvWIPkpDnPQ9AU+MCEiqN3nb86SIBChJVvxHN3UokHWD1H7dDzYKb lk392VxG8+jpCkpUloq17UmURuKm1fDmQJoKSqHrVTEB9sflorekHDZTLL2jQVRqYz/85pZ39Ls 8b5INzM5NLVDEiAD3kcfNVLBO7553ooTBdY2+0NMNeoAfFbq1cJo9+TTYiyGHrRlucNi9k0cWIC XYKMfBZKdEK8SYzBWq5AZAKq8uBkZPAGcjtr9TsTtedkPHfCTiJmJQt3J6TsFP9p6/jS7atzZ1s FMcsXjpn2qSNEkADnXTPPFaSTsUrGosmpercyr61WP6kAm+hjBb8qpaibQJJqrvHnUwBolq5iYm 2tOrcOQ8GYMHuLMPWr0v3lOMN3XQThxnnW3+nm7hu14PTL7ml0imHfnbw4Za+a6sxJUrlniWE/W WbE= X-Received: by 2002:a05:6830:61c6:b0:7d7:f146:8738 with SMTP id 46e09a7af769-7e5fee5ec6cmr148450a34.12.1779386797317; Thu, 21 May 2026 11:06:37 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:13 -0600 Subject: [PATCH v13 20/22] target/mips: decode Octeon CHORD and LLM COP2 selectors MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-20-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32e; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386884894158500 Add explicit decodetree entries and translator bindings for the Octeon CHORD and sparse LLM COP2 selectors. CHORD and LLM use their own COP2 selector window rather than the crypto engine windows covered by the preceding decode patches. Finish the explicit COP2 selector decode by adding the CP2_Undef fallback so unknown Octeon COP2 selectors raise the expected coprocessor-unusable exception instead of silently taking a generic path. Signed-off-by: James Hilliard --- Changes v9 -> v10: - Split CHORD/LLM selector decode out of the monolithic Octeon COP2 selector decode patch. - Kept sparse LLM operations helper-backed and moved the CP2_Undef fallback into the final selector-decode patch. --- target/mips/tcg/octeon.decode | 14 ++++++++++++++ target/mips/tcg/octeon_translate.c | 13 +++++++++++++ 2 files changed, 27 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 9f2905795b..bbe51a10b4 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -160,6 +160,9 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MF_GFM_RESINP0 010010 00001 rt:5 0000 0010 0101 = 1010 &cp2 CVM_MF_GFM_RESINP1 010010 00001 rt:5 0000 0010 0101 = 1011 &cp2 CVM_MF_GFM_POLY 010010 00001 rt:5 0000 0010 0101 = 1110 &cp2 + CVM_MF_CHORD 010010 00001 rt:5 0000 0100 0000 = 0000 &cp2 + CVM_MF_LLM_DATA0 010010 00001 rt:5 0000 0100 0000 = 0010 &cp2 + CVM_MF_LLM_DATA1 010010 00001 rt:5 0000 0100 0000 = 1010 &cp2 CVM_MT_HSH_DAT0 010010 00101 rt:5 0000 0000 0100 = 0000 &cp2 CVM_MT_HSH_DAT1 010010 00101 rt:5 0000 0000 0100 = 0001 &cp2 CVM_MT_HSH_DAT2 010010 00101 rt:5 0000 0000 0100 = 0010 &cp2 @@ -254,6 +257,16 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_SHA3_XORDAT15 010010 00101 rt:5 0000 0010 1100 = 1111 &cp2 CVM_MT_SHA3_XORDAT16 010010 00101 rt:5 0000 0010 1101 = 0000 &cp2 CVM_MT_SHA3_XORDAT17 010010 00101 rt:5 0000 0010 1101 = 0001 &cp2 + CVM_MT_LLM_READ_ADDR0 010010 00101 rt:5 0000 0100 0000 = 0000 &cp2 + CVM_MT_LLM_WRITE_ADDR0 010010 00101 rt:5 0000 0100 0000 = 0001 &cp2 + CVM_MT_LLM_DATA0 010010 00101 rt:5 0000 0100 0000 = 0010 &cp2 + CVM_MT_LLM_READ64_ADDR0 010010 00101 rt:5 0000 0100 0000 = 0100 &cp2 + CVM_MT_LLM_WRITE64_ADDR0 010010 00101 rt:5 0000 0100 0000 = 0101 &cp2 + CVM_MT_LLM_READ_ADDR1 010010 00101 rt:5 0000 0100 0000 = 1000 &cp2 + CVM_MT_LLM_WRITE_ADDR1 010010 00101 rt:5 0000 0100 0000 = 1001 &cp2 + CVM_MT_LLM_DATA1 010010 00101 rt:5 0000 0100 0000 = 1010 &cp2 + CVM_MT_LLM_READ64_ADDR1 010010 00101 rt:5 0000 0100 0000 = 1100 &cp2 + CVM_MT_LLM_WRITE64_ADDR1 010010 00101 rt:5 0000 0100 0000 = 1101 &cp2 CVM_MT_CRC_LEN 010010 00101 rt:5 0001 0010 0000 = 0010 &cp2 CVM_MT_CRC_DWORD 010010 00101 rt:5 0001 0010 0000 = 0111 &cp2 CVM_MT_CRC_VAR 010010 00101 rt:5 0001 0010 0000 = 1000 &cp2 @@ -288,4 +301,5 @@ LDX 011111 ..... ..... ..... 01000 001010 @lx CVM_MT_HSH_STARTSHA512 010010 00101 rt:5 0100 0010 0100 = 1111 &cp2 CVM_MT_GFM_XORMUL1 010010 00101 rt:5 0100 0010 0101 = 1101 &cp2 ] + CP2_Undef 010010 ----- ----- ---- ---- ----= ---- } diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_tr= anslate.c index 41bfcc47b3..538c6f71bc 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -179,6 +179,9 @@ CP2_MF_I64(CVM_MF_GFM_MUL1, gfm_mul[1]); CP2_MF_I64(CVM_MF_GFM_RESINP0, gfm_resinp[0]); CP2_MF_I64(CVM_MF_GFM_RESINP1, gfm_resinp[1]); CP2_MF_U16(CVM_MF_GFM_POLY, gfm_poly); +CP2_MF_I64(CVM_MF_CHORD, chord); +CP2_MF_I64(CVM_MF_LLM_DATA0, llm_data[0]); +CP2_MF_I64(CVM_MF_LLM_DATA1, llm_data[1]); =20 CP2_MF_HELPER(CVM_MF_CRC_IV_REFLECT, crc_iv_reflect); CP2_MF_HELPER(CVM_MF_SHA3_DAT24, sha3_dat24); @@ -250,6 +253,8 @@ CP2_MT_I64(CVM_MT_GFM_RESINP0, gfm_resinp[0]); CP2_MT_I64(CVM_MT_GFM_RESINP1, gfm_resinp[1]); CP2_MT_HELPER(CVM_MT_GFM_XOR0, gfm_xor0); CP2_MT_U16(CVM_MT_GFM_POLY, gfm_poly); +CP2_MT_I64(CVM_MT_LLM_DATA0, llm_data[0]); +CP2_MT_I64(CVM_MT_LLM_DATA1, llm_data[1]); CP2_MT_U8_MASKED(CVM_MT_CRC_LEN, crc_len, 0xf); CP2_MT_U32(CVM_MT_CRC_POLYNOMIAL, crc_poly); =20 @@ -339,6 +344,14 @@ CP2_MT_HELPER(CVM_MT_HSH_STARTMD5, hsh_startmd5); CP2_MT_HELPER(CVM_MT_HSH_STARTSHA256, hsh_startsha256); CP2_MT_HELPER(CVM_MT_HSH_STARTSHA, hsh_startsha); CP2_MT_HELPER(CVM_MT_HSH_STARTSHA512, hsh_startsha512); +CP2_MT_HELPER(CVM_MT_LLM_READ_ADDR0, llm_read_addr0); +CP2_MT_HELPER(CVM_MT_LLM_WRITE_ADDR0, llm_write_addr0); +CP2_MT_HELPER(CVM_MT_LLM_READ64_ADDR0, llm_read64_addr0); +CP2_MT_HELPER(CVM_MT_LLM_WRITE64_ADDR0, llm_write64_addr0); +CP2_MT_HELPER(CVM_MT_LLM_READ_ADDR1, llm_read_addr1); +CP2_MT_HELPER(CVM_MT_LLM_WRITE_ADDR1, llm_write_addr1); +CP2_MT_HELPER(CVM_MT_LLM_READ64_ADDR1, llm_read64_addr1); +CP2_MT_HELPER(CVM_MT_LLM_WRITE64_ADDR1, llm_write64_addr1); =20 static bool trans_BBIT(DisasContext *ctx, arg_BBIT *a) { --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386906; cv=none; d=zohomail.com; s=zohoarc; b=jfHW+WMbZwaBaSTSkM0RWORPxL+CzFq2aYNrn8bbF7gN6PiNH1Nym+zPQtwP/RGraJ/M9Z8a3+vP7Ff00WXlrI9nCMQiJri80lh8I81EJRyD40OhpKyaxzx2oW/ZTqPj7kqRut343CEJ/Kje86flsTAM3Jz5tCat74E7uozTOpg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386906; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=h/YjkLPN0ai0rp7srfOk+fhrJScHHUdUfM2SVxvqpR4=; b=bQoRj1F1rvvmHCIrgmV4K6xjvPrjd9kg160Sr2e23QOTmvxCs0miMxXsVviXHiWxB/Gznj0ervBo8HyKAid2H68LbZZwcR3ywZ6xeUzfJnD/WSDQR+dl6EyPLEmN0GqauGxoxWFOYuPwub1RvUOfxW74LRB3LCBmYLCpaLM9XTM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386906271179.98490080290696; Thu, 21 May 2026 11:08:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nF-0000Jm-Kv; Thu, 21 May 2026 14:06:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n7-0000HR-Q3 for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:42 -0400 Received: from mail-ot1-x32a.google.com ([2607:f8b0:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7n5-000281-8N for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:41 -0400 Received: by mail-ot1-x32a.google.com with SMTP id 46e09a7af769-7dea1272943so3175167a34.0 for ; Thu, 21 May 2026 11:06:38 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386798; x=1779991598; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=h/YjkLPN0ai0rp7srfOk+fhrJScHHUdUfM2SVxvqpR4=; b=AjimbOAyXm1bJrZWwhNCDZyi6TBuv+Ah+7WqRvCITiAzdprNBTvmrjWHoM+2CPc8mH Y5+efjyry7Cj5O+60+cUenJ3Osq2Y6RNo8968WrTNl9RwD+Q3KdLI/vzuozlVHvITfly qKDUfZ23MgwchKuIlQiyDfxk0C5gzrvBtz4jym2zooqIxQC8NdbV66S1b2Qm7RaoQx2E f7cgjsN/VZ+otgaOUtN1Dep80Z4V652cYqqquilBUi9ESMkEErxA7ZPPNGf3z6ynW/cK QSB2uJZcH54yfMmXzT/MnC7hjCpkzI8fEcn82W6L+PedNy52dupAU/k0tyth1EUDu8tf vfWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386798; x=1779991598; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=h/YjkLPN0ai0rp7srfOk+fhrJScHHUdUfM2SVxvqpR4=; b=oiTgjGWBCKP4enZQ4tVLB3tnTaUz6f30jYWm8XT3zY+Z2loaIAcA6HWyrIPNhY2dTn ZhSXl1WcGb8O8N2l+9Rr0n/EK6VmIxd4KJJZo/iE55nWMUKMrqIkqDVLsNDWY1hOPgrJ EWw7dS/eFmDh6+qS6Fhrwra2tmumzl1DX/s76xp7asaYrA7+3ikrLs+ElgDyW9R51BXo OHDdz8XH7V53TAGJ0WeppbUVfaRU996Pi+pl52cgP/fHwu2j9FG4E8LEpIarVIMwJjny P3oHXg8gFSE4n0POAaAklgg8tn4+8Fl9d3KjqE+4z1RWSvWz6FRFp4YFcqPHz4QE8yNj f8RA== X-Gm-Message-State: AOJu0YyoHEcgp2snGFX5ps9yn32vr7eL9wHSDuk2jo6oluLr2UUEg++r OvuzOjuWdxEnGwTzL3szhL1YKFQjl6ezk4cidbPGsC6U6he/I8XhD7hB X-Gm-Gg: Acq92OHOXYIwza/9eAok8tdgMxNuc5B9dDgb5NYeKMMS6Zs05mI2S35VGoBZQGNZOzq GYLIzEkjXmNJ2ICpZWgVeoioqVHbtjkzH9OEzVmDwqeVdtdLvINzH/gQc93MwOqOPyf0lTTIpv/ EGzO1fuMSaDXUrtxcUUilDdCd2/PNzoHt7COd2BJJmgqjEWyZQWcq3KrielBsz8E84p23shoP0S znFYCRfwInjIWS3fQHgC5ZWfJiZRcj89PCnAoCtfMGbEeFMbp9KlDKVBabubKyPOLTQKH2UO+AV kxHTevIC8mJiAtUVFvYSQemFsLj4//xy0V75MPyKkTg75iSPgHgTus/v8d32rGBHLqJLdv1u4+I wJaIp8eXmd3uAf/VoECSRLnJev2zd+O7xn3/ofbB9NgxiaCKEkyG+NuNpn/aOESELLDnb46OusN YkTiA8rZiJfftjxZvyui6ebacu4xwFaJe2gxVHXrlYII+6TDrRThhopNHQO38LkPX/KUdyUbwru 5XmtHs1k+yOdqdQse6cDSNaIgrHIebbCERMXh3qBtV5fnHrmH3U0PsK4LyR1jz3WfG32vd15XAf ISo= X-Received: by 2002:a05:6830:20ca:b0:7e5:6d2e:acd9 with SMTP id 46e09a7af769-7e5fefcbc8dmr80712a34.12.1779386798119; Thu, 21 May 2026 11:06:38 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:14 -0600 Subject: [PATCH v13 21/22] target/mips: add Octeon CvmCount RDHWR support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-21-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32a; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386907504154100 Octeon exposes CvmCount through RDHWR register 31. Add the Octeon-only decode path, enable the corresponding HWREna bit for linux-user, and use an unsigned mask when checking HWREna so bit 31 is handled safely. For user-mode emulation, return host ticks as a monotonic counter source suitable for existing Octeon userspace code. In system mode, fall back to the existing CP0 Count value. Reviewed-by: Richard Henderson Signed-off-by: James Hilliard --- Changes v5 -> v6: - New patch. --- target/mips/cpu.c | 1 + target/mips/helper.h | 1 + target/mips/tcg/op_helper.c | 13 ++++++++++++- target/mips/tcg/translate.c | 11 +++++++++++ tests/tcg/mips/user/isa/octeon/octeon-insns.c | 17 +++++++++++++++++ 5 files changed, 42 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index b223b767c9..d72044aef6 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -320,6 +320,7 @@ static void mips_cpu_reset_hold(Object *obj, ResetType = type) env->CP0_HWREna |=3D 0x0000000F; if (env->insn_flags & INSN_OCTEON) { env->CP0_HWREna |=3D 0x40000000u; + env->CP0_HWREna |=3D 0x80000000u; } if (env->CP0_Config1 & (1 << CP0C1_FP)) { env->CP0_Status |=3D (1 << CP0St_CU1); diff --git a/target/mips/helper.h b/target/mips/helper.h index 2902dde889..a755cc5ad5 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -277,6 +277,7 @@ DEF_HELPER_1(rdhwr_ccres, tl, env) DEF_HELPER_1(rdhwr_performance, tl, env) DEF_HELPER_1(rdhwr_xnp, tl, env) DEF_HELPER_1(rdhwr_chord, tl, env) +DEF_HELPER_1(rdhwr_cvmcount, tl, env) DEF_HELPER_2(pmon, void, env, int) DEF_HELPER_1(wait, void, env) =20 diff --git a/target/mips/tcg/op_helper.c b/target/mips/tcg/op_helper.c index 3e586e3049..df1b5c3734 100644 --- a/target/mips/tcg/op_helper.c +++ b/target/mips/tcg/op_helper.c @@ -25,6 +25,7 @@ #include "exec/memop.h" #include "fpu_helper.h" #include "qemu/crc32c.h" +#include "qemu/timer.h" #include =20 static inline target_ulong bitswap(target_ulong v) @@ -209,7 +210,7 @@ target_ulong helper_yield(CPUMIPSState *env, target_ulo= ng arg) =20 static inline void check_hwrena(CPUMIPSState *env, int reg, uintptr_t pc) { - if ((env->hflags & MIPS_HFLAG_CP0) || (env->CP0_HWREna & (1 << reg))) { + if ((env->hflags & MIPS_HFLAG_CP0) || (env->CP0_HWREna & (1u << reg)))= { return; } do_raise_exception(env, EXCP_RI, pc); @@ -261,6 +262,16 @@ target_ulong helper_rdhwr_chord(CPUMIPSState *env) return env->octeon_crypto.chord; } =20 +target_ulong helper_rdhwr_cvmcount(CPUMIPSState *env) +{ + check_hwrena(env, 31, GETPC()); +#ifdef CONFIG_USER_ONLY + return cpu_get_host_ticks(); +#else + return (uint32_t)cpu_mips_get_count(env); +#endif +} + void helper_pmon(CPUMIPSState *env, int function) { function /=3D 2; diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 1f44932882..e3467d1525 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -10933,6 +10933,17 @@ void gen_rdhwr(DisasContext *ctx, int rt, int rd, = int sel) gen_helper_rdhwr_chord(t0, tcg_env); gen_store_gpr(t0, rt); break; + case 31: + if (!(ctx->insn_flags & INSN_OCTEON)) { + gen_reserved_instruction(ctx); + break; + } + translator_io_start(&ctx->base); + gen_helper_rdhwr_cvmcount(t0, tcg_env); + gen_store_gpr(t0, rt); + gen_save_pc(ctx->base.pc_next + 4); + ctx->base.is_jmp =3D DISAS_EXIT; + break; default: /* Invalid */ MIPS_INVAL("rdhwr"); gen_reserved_instruction(ctx); diff --git a/tests/tcg/mips/user/isa/octeon/octeon-insns.c b/tests/tcg/mips= /user/isa/octeon/octeon-insns.c index 9ee4b8f990..d41115aab6 100644 --- a/tests/tcg/mips/user/isa/octeon/octeon-insns.c +++ b/tests/tcg/mips/user/isa/octeon/octeon-insns.c @@ -314,6 +314,22 @@ static uint64_t octeon_cop2_gfm_mul_reflect_readback(u= int64_t value) return rd; } =20 +static uint64_t octeon_rdhwr31_non_decreasing(void) +{ + uint64_t first, second; + + asm volatile( + ".word 0x7c08f83b\n\t" /* rdhwr $8, $31 */ + ".word 0x7c09f83b\n\t" /* rdhwr $9, $31 */ + "move %[first], $8\n\t" + "move %[second], $9\n\t" + : [first] "=3Dr" (first), [second] "=3Dr" (second) + : + : "$8", "$9"); + + return second >=3D first; +} + int main(void) { assert(octeon_baddu(0x123, 0x0f0) =3D=3D 0x13); @@ -340,6 +356,7 @@ int main(void) 0x0123456789abcdefULL) =3D=3D 0xf7b3d591e6a2c480ULL); assert(octeon_cop2_gfm_mul_reflect_readback( 0xfedcba9876543210ULL) =3D=3D 0x084c2a6e195d3b7fULL); + assert(octeon_rdhwr31_non_decreasing()); =20 return 0; } --=20 2.54.0 From nobody Sat May 30 17:44:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779386886; cv=none; d=zohomail.com; s=zohoarc; b=YFPL0sCWwQYXQQYHxJUUDm8NXyFtofINi9dnzSE6UpwkopinxTL/pEQNLMyjynt3mMWxnggr3v895velshj0YcIJZ/YGAJBmtm1HpWshCXnklwOpMRT9inenM2kizIdh0KbLHeZX/9iCrkO8xT/Jp6XKOn6lgB5P3H/yZwp2gbQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779386886; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=38pL5UNkdtia0wsGoAP1ij7zit+GjIsJMptplUGSK8U=; b=Z1NPtII+i42ORDsT6Zr7lS/cRoTdEo6wH2yIP6jk5tMIeJV8s+Wy+jJt/1tK3hjiL5jbMx/kb4Pr83vNRZnbbnW/ULTP5qr+fzZK5AfTo6aDq2gbv3z0DveWgqtELXrcZ3lMFa3YMvY4Hct1Wx4foqCtwWC7WPHXUOqhImER42E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779386886410466.0271019112822; Thu, 21 May 2026 11:08:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wQ7nE-0000J3-MK; Thu, 21 May 2026 14:06:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wQ7n7-0000HU-Qc for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:42 -0400 Received: from mail-ot1-x32a.google.com ([2607:f8b0:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wQ7n6-00028v-0h for qemu-devel@nongnu.org; Thu, 21 May 2026 14:06:41 -0400 Received: by mail-ot1-x32a.google.com with SMTP id 46e09a7af769-7e4004a4a6fso6228908a34.1 for ; Thu, 21 May 2026 11:06:39 -0700 (PDT) Received: from mac.localdomain (184-96-131-78.hlrn.qwest.net. [184.96.131.78]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7e5f6ee286fsm903089a34.25.2026.05.21.11.06.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 11:06:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779386799; x=1779991599; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=38pL5UNkdtia0wsGoAP1ij7zit+GjIsJMptplUGSK8U=; b=NSf/c7jiIY5IlPi7enZ+oq6uDXjaOno9yJK5vsFNTtyR0Gv7pslu1KR79qwENn/BH4 X6qklP8dCi6nYaHZdUeU5kD66q072LVvAQ10iCmrJKkpEWCrt+VzsJknsTlR+XK1P/w5 6v7nULjzkqQaYJkGrrT6/We6YxZ/QFQsEpQL3lo10qZ7WNjb2GuGPSy/ZE/fzFqL6VC4 Sd+sGMqgiNrQNTl9SJ4rEI/crNbjdgSSqa4kvzE1QA9xomKfANk8YEHjRottUVi6S8/I RfGJaVAhE8GqhnFE+tH088Hb51rcdZkd0jISm7Xiu4iI2vOysvP3lznknDfqx0D8jLeW VO7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779386799; x=1779991599; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=38pL5UNkdtia0wsGoAP1ij7zit+GjIsJMptplUGSK8U=; b=OXPx05N5EAtTQ4a0F8XM+mCK0PmB90UpsSEveXieyJFs1aWGPiwrAiOqSV4v1TVvvB LVOsJ98lekE/jxSzMlA92o8s0UWq7OQPDyBoxaLBxerwYa475sP9K4tDbMsLXZvRCj42 Qs80WCejOQN25neK2ws9Ub/Hq/b99DI4B0wlWdF0S/diVjnvA06yM2ajYg15bw4o/CKM 45VLFkdJvDjj5Pgf/ukGlAJYGWkOw9fdlyHoUdqJ9+kK2AF6i8E1mLreFxWAsYgfL2bB US0xB9CNgBoFHvNG+MwaGXUkckH0rvTBJX6CokxJmmleRRmCkgFZBN186gFNZlGafDdy mXZA== X-Gm-Message-State: AOJu0YxiuoYuIp84KpPEBksZMEzarUClp2jzGbdrxO+6Ej3sVI6kHPyj 93A+a24+qxp0HlVO/eSmDaPqUlB8Iag8VUjiLiz0L1586wCubq9EcAt3 X-Gm-Gg: Acq92OE+4Jeu2CqNzrDw8IwqHtyBfu0XKJ9FOX7/zNJRWWu1KaLcz7cYlxnSsTwn+f8 hv+fSufM6OqXFEk2jKBsMjtOSqKsFSOuQmaXE0TSaMkx6i8QZHYg6IZIsA0E1lI2DfCDn/tC4il uBz96G291PjhUshJh1tRWjwA8+m/PXn6pIw+LZuxytqIge898QNmQGLRxjWwboWdfRbjAvbvImp 45493O/HRq1q1kMcEZ6jE/Ur2MkITgM8mM7KQIivZQw+MRRiABsIK/rk8TS2J39beqhVzEzqLN8 lAO9k7+b6FMPt5bxkGuLKnWqzoQgaJuvSJ46oZomhO5lOusZcoJoJhIJ5mLHjxteoydn8wDo5k2 BUCewd0uaAAbjcPnUNREC0TrvncHIEyr0VcdRe4athFZogDmXn/vrH595u2j2NKfHuVRqLivdxA krhV0Qtpwym1JhL+5j/S2YJIeARvlDrgGV1NXVhDxC+nacsvQ9Qv57kK/chQoGNVnuvE30bfDM6 nw0PlBho/oXE4NPtp1DAjaz3ifGqsX7zmStZiXEgXwjlIJqtvNSYonclsb6D+RgM5if X-Received: by 2002:a05:6830:452a:b0:7d9:7209:4378 with SMTP id 46e09a7af769-7e5fee23f0bmr171676a34.17.1779386799003; Thu, 21 May 2026 11:06:39 -0700 (PDT) From: James Hilliard Date: Thu, 21 May 2026 12:06:15 -0600 Subject: [PATCH v13 22/22] tests/tcg/mips: cover Octeon QMAC instructions MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-mips-octeon-missing-insns-v2-v13-22-5a4cb8ec9cd3@gmail.com> References: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> In-Reply-To: <20260521-mips-octeon-missing-insns-v2-v13-0-5a4cb8ec9cd3@gmail.com> To: qemu-devel@nongnu.org Cc: Laurent Vivier , Helge Deller , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen , James Hilliard , Richard Henderson , Paolo Bonzini X-Mailer: b4 0.15.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32a; envelope-from=james.hilliard1@gmail.com; helo=mail-ot1-x32a.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779386889323154100 Add smoke coverage for Octeon QMAC and QMACS fixed-point accumulator instruction paths. The coverage exercises normal accumulation, saturating accumulation, and the sticky saturation flag. Signed-off-by: James Hilliard --- Changes v12 -> v13: - Add QMAC/QMACS smoke coverage. --- tests/tcg/mips/user/isa/octeon/octeon-insns.c | 40 +++++++++++++++++++++++= ++++ 1 file changed, 40 insertions(+) diff --git a/tests/tcg/mips/user/isa/octeon/octeon-insns.c b/tests/tcg/mips= /user/isa/octeon/octeon-insns.c index d41115aab6..072e95c1c9 100644 --- a/tests/tcg/mips/user/isa/octeon/octeon-insns.c +++ b/tests/tcg/mips/user/isa/octeon/octeon-insns.c @@ -129,6 +129,43 @@ static uint64_t octeon_vmm0(uint64_t mpl0, uint64_t p0, return rd; } =20 +static uint64_t octeon_qmac_lo(uint64_t rs, uint64_t rt, uint64_t lo) +{ + uint64_t rd; + + asm volatile( + "move $8, %[rs]\n\t" + "move $9, %[rt]\n\t" + "mtlo %[lo]\n\t" + "mthi $0\n\t" + ".word 0x710904d2\n\t" /* qmac.03 $8, $9 */ + "mflo %[rd]\n\t" + : [rd] "=3Dr" (rd) + : [rs] "r" (rs), [rt] "r" (rt), [lo] "r" (lo) + : "$8", "$9"); + + return rd; +} + +static uint64_t octeon_qmacs_state(uint64_t rs, uint64_t rt, uint64_t lo) +{ + uint64_t hi, rd; + + asm volatile( + "move $8, %[rs]\n\t" + "move $9, %[rt]\n\t" + "mtlo %[lo]\n\t" + "mthi $0\n\t" + ".word 0x71090012\n\t" /* qmacs.00 $8, $9 */ + "mfhi %[hi]\n\t" + "mflo %[rd]\n\t" + : [hi] "=3Dr" (hi), [rd] "=3Dr" (rd) + : [rs] "r" (rs), [rt] "r" (rt), [lo] "r" (lo) + : "$8", "$9"); + + return ((hi & 1) << 32) | (rd & 0xffffffff); +} + static uint64_t octeon_vmm0_zeroes_mpl1(void) { uint64_t rd; @@ -339,6 +376,9 @@ int main(void) assert(octeon_seq(0xabc, 0xdef) =3D=3D 0); assert(octeon_sne(0xabc, 0xabc) =3D=3D 0); assert(octeon_sne(0xabc, 0xdef) =3D=3D 1); + assert(octeon_qmac_lo(0x0003000000000000ULL, 2, 1) =3D=3D 13); + assert(octeon_qmacs_state(1, 1, 0x7ffffffe) =3D=3D 0x17fffffffULL); + assert(octeon_qmacs_state(0x8000, 0x8000, 0) =3D=3D 0x17fffffffULL); assert(octeon_vmulu(5, 7, 11) =3D=3D 46); assert(octeon_vmm0(5, 13, 7, 11) =3D=3D 59); assert(octeon_vmm0_zeroes_mpl1() =3D=3D 0); --=20 2.54.0