From nobody Sat May 30 17:43:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779276254; cv=none; d=zohomail.com; s=zohoarc; b=aQeBdfeFbmnGWrTTY/W1+Tq1IA8QbVr8valek20aVaYlakzdzEI6L7umu6/Qb//b6+QzQKiZ8cbqJEP0b4POHppUIoZ4FDPViV43HcJ+LSnzCfmQKOVkJDiel6Rz6gsYXrpNGeMs81LcHdjpvs9CCqZaV/PgkhZQR0XphcK8gyE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779276254; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=wyMUXuVoe5YB9/GolFFQ9m0XvZYCncQp31ovl4uyYoY=; b=cZRZB/ZSnCfGLpOz25DXTaq4MVsRVQTvlRpH0JdWjopnWui/32tdhe3PCB21D4z5A9OV7i5moIeZUnIksytkl0VVHhT5DgTukIyT4qvbQyXFvz77lq1TjwMCwVHooc+nwogNvqHdnYH2bqv0ni6ECRdjg4rDwRSfHVyLGt5KQZA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779276254463499.9466077104397; Wed, 20 May 2026 04:24:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPf1x-0003e7-Ac; Wed, 20 May 2026 07:24:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPexW-00027c-Gd; Wed, 20 May 2026 07:20:18 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPexT-0001TU-8L; Wed, 20 May 2026 07:19:30 -0400 Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64K6VPDw1839474; Wed, 20 May 2026 09:55:09 GMT Received: from ppma22.wdc07v.mail.ibm.com (5c.69.3da9.ip4.static.sl-reverse.com [169.61.105.92]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h8mscr9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:09 +0000 (GMT) Received: from pps.filterd (ppma22.wdc07v.mail.ibm.com [127.0.0.1]) by ppma22.wdc07v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64K9s9rU030679; Wed, 20 May 2026 09:55:08 GMT Received: from smtprelay01.fra02v.mail.ibm.com ([9.218.2.227]) by ppma22.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4e739vxw00-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:06 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay01.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64K9t2tK61210940 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 20 May 2026 09:55:02 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 750D020040; Wed, 20 May 2026 09:55:02 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3758F2004D; Wed, 20 May 2026 09:55:00 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 20 May 2026 09:55:00 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=wyMUXuVoe5YB9/Gol FFQ9m0XvZYCncQp31ovl4uyYoY=; b=pC4LIKPZPSargkSA6wcezPMmSloxkCjXS ZRl3GLZyx479VdMXXiBPenH6jMYnYbfHs/WquSQYdcbBokpyr9D3XAiztmSK4j4f mCVYhA7fCQbIs1D16AxeW/2gfojdpqAmkxRXTKyVQnlTixs/sZLYLH3apjGJd4W9 3ZOajsAcY6dg62eIeJmeVyuib/Zt9PW6JPCEA8Z15ghvJht5RIYMYYF/FnYAP5/E AOmkFCIUZCnX3RJ7A90GMFElrmvYLKv6JSKgfqIMexV6EnuJAwKucL8Fdi6NzSSR hg84bJivoTzHWP62dEv9RcECsCOj/7pB6TqhxzYOK+31J2K5gpLGQ== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v3 1/6] ppc/spapr: Add VFIO EEH error injection backend Date: Wed, 20 May 2026 15:24:41 +0530 Message-ID: <20260520095446.64206-2-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520095446.64206-1-nnmlinux@linux.ibm.com> References: <20260520095446.64206-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: Q9GMJtjtyCo7wQyl4Dm-p1x86-_PKFuq X-Authority-Analysis: v=2.4 cv=GYMnWwXL c=1 sm=1 tr=0 ts=6a0d84fd cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=qkVa7TRde7xkgx6zoNMA:9 X-Proofpoint-ORIG-GUID: P_bVqYASFPbZw3ur18rlDugGerNZ02df X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDA5MiBTYWx0ZWRfX/fEk5fZ17EcE ZItzAD9hKu+jbxVLEEcXsN8HB8qtcOgOIk/M0CUdV92IdiHrMBATPFnoYRSthn/KhgkVrHoQOX7 LELvbbSxv1YCtagX91O/cNTK90Wnsc0/dgnHKbKJ4wOlD850da/j6OX2dbUtuGEzjELqjXnYTRW wwyfcmeauWKvibtMCHrTHmWyI9hQlu7w7hT/eQM/iCfMnR5pFP/MixmM9aCPrF4eT0ADkEcH2Ko wd23+M9mRNfTckR8lICj4dKTbT8HxXnMQYHW5Yug2SQl6Xi0jAEsWPYlPUCZGhXZHJ+c7j48V3z 4WCsQMg5WFfWLdPJi3CT0XXEWGoOkn44ae3xu4W3lsP8m3GyVkm5UD7bbbgO6qth0o2A6jyYEQS Z+QNOs8c3tLcsI7+OpywklISRFDWI/r/zCeOxiSsJCo7bPLxOpRfn4sYrY26bkIAbELTPG3bz06 kCrv+D71BslgJwmoThQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200092 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779276257314154100 Content-Type: text/plain; charset="utf-8" Introduce 'spapr_phb_vfio_errinjct()' to inject PCI PHB error events via the VFIO passthrough backend. This function translates RTAS error injection parameters into VFIO EEH injection commands suitable for hardware emulation. The patch adds: - A minimal 'enum rtas_err_type' for error types used in VFIO path - EEH function code macros ('EEH_ERR_FUNC_...') - Backend stub and integration into 'spapr_pci_vfio.c' - Necessary header declarations for interfacing This forms the foundational layer for PCI error injection testing using VFIO passthrough devices on pseries guests. Signed-off-by: Narayana Murty N --- hw/ppc/spapr_pci_vfio.c | 53 +++++++++++++++++++++++++++++++++++++ include/hw/pci-host/spapr.h | 7 +++++ include/hw/ppc/spapr.h | 44 ++++++++++++++++++++++++++++++ 3 files changed, 104 insertions(+) diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index a748a0bf4c..ed0b22a84a 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -317,6 +317,55 @@ int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) return RTAS_OUT_SUCCESS; } =20 +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, + uint32_t func, uint64_t addr, + uint64_t mask, uint32_t type) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(&sphb->iommu_= as); + struct vfio_eeh_pe_op op =3D { + .op =3D VFIO_EEH_PE_INJECT_ERR, + .argsz =3D sizeof(op), + }; + + /* Set error type, address, and mask */ + op.err.type =3D type; + op.err.addr =3D addr; + op.err.mask =3D mask; + + /* Validate and set function code */ + switch (func) { + case EEH_ERR_FUNC_LD_MEM_ADDR: + case EEH_ERR_FUNC_LD_MEM_DATA: + case EEH_ERR_FUNC_LD_IO_ADDR: + case EEH_ERR_FUNC_LD_IO_DATA: + case EEH_ERR_FUNC_LD_CFG_ADDR: + case EEH_ERR_FUNC_LD_CFG_DATA: + case EEH_ERR_FUNC_ST_MEM_ADDR: + case EEH_ERR_FUNC_ST_MEM_DATA: + case EEH_ERR_FUNC_ST_IO_ADDR: + case EEH_ERR_FUNC_ST_IO_DATA: + case EEH_ERR_FUNC_ST_CFG_ADDR: + case EEH_ERR_FUNC_ST_CFG_DATA: + case EEH_ERR_FUNC_DMA_RD_ADDR: + case EEH_ERR_FUNC_DMA_RD_DATA: + case EEH_ERR_FUNC_DMA_RD_MASTER: + case EEH_ERR_FUNC_DMA_RD_TARGET: + case EEH_ERR_FUNC_DMA_WR_ADDR: + case EEH_ERR_FUNC_DMA_WR_DATA: + case EEH_ERR_FUNC_DMA_WR_MASTER: + op.err.func =3D func; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + /* Perform the ioctl to inject the error */ + if (ioctl(container->fd, VFIO_EEH_PE_OP, &op) < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} #else =20 bool spapr_phb_eeh_available(SpaprPhbState *sphb) @@ -349,4 +398,8 @@ int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) return RTAS_OUT_NOT_SUPPORTED; } =20 +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, int option) +{ + return RTAS_OUT_NOT_SUPPORTED; +} #endif /* CONFIG_VFIO_PCI */ diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 0db87f1281..417d1f6c31 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -125,6 +125,8 @@ int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, i= nt *state); int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); void spapr_phb_vfio_reset(DeviceState *qdev); +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, + uint64_t addr, uint64_t mask, uint32_t type); #else static inline bool spapr_phb_eeh_available(SpaprPhbState *sphb) { @@ -151,6 +153,11 @@ static inline int spapr_phb_vfio_eeh_configure(SpaprPh= bState *sphb) static inline void spapr_phb_vfio_reset(DeviceState *qdev) { } +static inline int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t fu= nc, + uint64_t addr, uint64_t mask, uint32_t = type) +{ + return RTAS_OUT_HW_ERROR; +} #endif =20 void spapr_phb_dma_reset(SpaprPhbState *sphb); diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 9acda15d4f..fadb7cf7d9 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -682,6 +682,50 @@ void push_sregs_to_kvm_pr(SpaprMachineState *spapr); #define RTAS_EEH_PE_UNAVAIL_INFO 1000 #define RTAS_EEH_PE_RECOVER_INFO 0 =20 +/* EEH error types and functions */ +#define EEH_ERR_FUNC_MIN 0 +#define EEH_ERR_FUNC_LD_MEM_ADDR 0 /* Memory load */ +#define EEH_ERR_FUNC_LD_MEM_DATA 1 +#define EEH_ERR_FUNC_LD_IO_ADDR 2 /* IO load */ +#define EEH_ERR_FUNC_LD_IO_DATA 3 +#define EEH_ERR_FUNC_LD_CFG_ADDR 4 /* Config load */ +#define EEH_ERR_FUNC_LD_CFG_DATA 5 +#define EEH_ERR_FUNC_ST_MEM_ADDR 6 /* Memory store */ +#define EEH_ERR_FUNC_ST_MEM_DATA 7 +#define EEH_ERR_FUNC_ST_IO_ADDR 8 /* IO store */ +#define EEH_ERR_FUNC_ST_IO_DATA 9 +#define EEH_ERR_FUNC_ST_CFG_ADDR 10 /* Config store */ +#define EEH_ERR_FUNC_ST_CFG_DATA 11 +#define EEH_ERR_FUNC_DMA_RD_ADDR 12 /* DMA read */ +#define EEH_ERR_FUNC_DMA_RD_DATA 13 +#define EEH_ERR_FUNC_DMA_RD_MASTER 14 +#define EEH_ERR_FUNC_DMA_RD_TARGET 15 +#define EEH_ERR_FUNC_DMA_WR_ADDR 16 /* DMA write */ +#define EEH_ERR_FUNC_DMA_WR_DATA 17 +#define EEH_ERR_FUNC_DMA_WR_MASTER 18 +#define EEH_ERR_FUNC_DMA_WR_TARGET 19 +#define EEH_ERR_FUNC_MAX EEH_ERR_FUNC_DMA_WR_TARGET + +/* RTAS PCI Error Injection Token Types */ +enum rtas_err_type { + RTAS_ERR_TYPE_FATAL =3D 0x1, + RTAS_ERR_TYPE_RECOVERED_RANDOM_EVENT =3D 0x2, + RTAS_ERR_TYPE_RECOVERED_SPECIAL_EVENT =3D 0x3, + RTAS_ERR_TYPE_CORRUPTED_PAGE =3D 0x4, + RTAS_ERR_TYPE_CORRUPTED_SLB =3D 0x5, + RTAS_ERR_TYPE_TRANSLATOR_FAILURE =3D 0x6, + RTAS_ERR_TYPE_IOA_BUS_ERROR =3D 0x7, + RTAS_ERR_TYPE_PLATFORM_SPECIFIC =3D 0x8, + RTAS_ERR_TYPE_CORRUPTED_DCACHE_START =3D 0x9, + RTAS_ERR_TYPE_CORRUPTED_DCACHE_END =3D 0xA, + RTAS_ERR_TYPE_CORRUPTED_ICACHE_START =3D 0xB, + RTAS_ERR_TYPE_CORRUPTED_ICACHE_END =3D 0xC, + RTAS_ERR_TYPE_CORRUPTED_TLB_START =3D 0xD, + RTAS_ERR_TYPE_CORRUPTED_TLB_END =3D 0xE, + RTAS_ERR_TYPE_IOA_BUS_ERROR_64 =3D 0xF, + RTAS_ERR_TYPE_UPSTREAM_IO_ERROR =3D 0x10 +}; + /* ibm,set-slot-reset */ #define RTAS_SLOT_RESET_DEACTIVATE 0 #define RTAS_SLOT_RESET_HOT 1 --=20 2.54.0 From nobody Sat May 30 17:43:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779276908; cv=none; d=zohomail.com; s=zohoarc; b=UUiny8VkDrlk54rkO7R05KphGdXEVGhBE7KU7xpGELtVkgihcVeMDHB3fOCgJ1H4ppCFSv5VCjW/5FRHUHjb1H1S2hhJn+SVrJETtz07Bh99RQz0I+7A7aGCjYcMT1yiNMooV0Yq2jQqR/cT9NgYpMnbpz+UNwbFG57Q1k5liLI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779276908; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=vQxUvm/7oI2Iu6JQtKxTGHzJxTGKfUH+Z72Kd2NYtSA=; b=B4sEMh+HPPbieaV3bXTqowjQasYzNk6YtUPdmcTFO/YmAeSpTCGy22TCEV2K7pQoTFBN4fz3FdBKGiPzESwB3at1ZOyO9DRqZQIItHrx5R3XNZwNhgn+TEoxlXOPzNUoLjTBpAxpg88iYWbRgwCCZM0QUaBjjdnpz/mqfdpAZj8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779276908114370.78814892728553; Wed, 20 May 2026 04:35:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPfCU-0001qT-El; Wed, 20 May 2026 07:34:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfCJ-0001ec-P4; Wed, 20 May 2026 07:34:50 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfCH-0005l0-5i; Wed, 20 May 2026 07:34:47 -0400 Received: from pps.filterd (m0353725.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64JK6HjW685729; Wed, 20 May 2026 09:55:10 GMT Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h88gf14-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:09 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64K9s41R004410; Wed, 20 May 2026 09:55:09 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 4e754gej9g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:09 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64K9t59J30933544 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 20 May 2026 09:55:05 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0837D2004D; Wed, 20 May 2026 09:55:05 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BFA8920040; Wed, 20 May 2026 09:55:02 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 20 May 2026 09:55:02 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=vQxUvm/7oI2Iu6JQt KxTGHzJxTGKfUH+Z72Kd2NYtSA=; b=hTbSie83g2RwWTtagkFOjLKsUdV8gzxpY gzPlUQuajX2ZvC2b+2+PkC5wYAbRw9u/GipvoE2WWG6WIgeeNSM3rCkSAwFAkVI7 aOrv2wpjY4FVITY0uhVBO+u32nljGx6ipQpmccHV+eS46pjthp5kx3/7aey1zUPd /FWYpQfkkumqsjzu6+Rr+Pp8dxXVzXEdE2PS9H8OLt1glkVbr2NbEr25zjJxroaf OaTSRnHKLn4mIHJGT7JfcL2YT6eZWWeDtZYOFVoMz88wR36x4+AS3dpgWV4zS4ve zkywsVCe27zmxqGcBQJ8LxrM570jjUsq6DXATAktdNjVj0k0ZTRHA== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v3 2/6] ppc/spapr: Add ibm,errinjct RTAS call handler Date: Wed, 20 May 2026 15:24:42 +0530 Message-ID: <20260520095446.64206-3-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520095446.64206-1-nnmlinux@linux.ibm.com> References: <20260520095446.64206-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-ORIG-GUID: OrjemBRy0UFhhDDiBBMl3_yyupZz3SYE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDA5MiBTYWx0ZWRfX/roKTPc71Eq3 hJjS8HZCdT/wBmlfJG+/W/po3d74c3RPVzUM12tz9Aiiahz/yTihsD8F9px6MAO47h3GumZAYRb dv2Sjslu2c6YXxi7CJ/4HneFUQdzYdgNRdw++e97YMghaief7hox5x8aTfxLVWRYekQznBQViB/ L/SOsALNPpYWBvMI8/n6KoEG4fBgGd6/2SOa8iMfXPJgl3l51GRoueToChQLBzmk9c8VJ2yjLH5 S7t4u4b4EVFCQcnSGibnIa3s/GWV8N5Ej78DXXPgGItVPBvEySgdXEuvEw7zckP9GwwzJ8RWlrN gCx82WyfUYNB/YbIsAhmDOPbhRDgU2OtKXY5ARkUgV2/oqHBzKpv31OZcGNGc8zRFBCyfiJelTo AR1fi77wSgJBpLyY2knqWqIHmGUS7ZJpYuvUaPavmW4lKWNZRRmIMPlSnbW1XjCrFuquq3zcudm 9T3wtsmv6/BdCmP4TvQ== X-Proofpoint-GUID: SryLR8-utUZ9cKCrEtCBZpjq55kXeF29 X-Authority-Analysis: v=2.4 cv=apyCzyZV c=1 sm=1 tr=0 ts=6a0d84fe cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=V8glGbnc2Ofi9Qvn3v5h:22 a=VnNF1IyMAAAA:8 a=_MNm8bNPt0bhIkh_LCUA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 suspectscore=0 adultscore=0 spamscore=0 phishscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200092 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=nnmlinux@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779276908880158500 Content-Type: text/plain; charset="utf-8" Implements the 'ibm,errinjct' RTAS call for PHB-level PCI error injection via firmware. This handler decodes the RTAS parameter buffer, validates arguments, and delegates the injection to the backend. The patch includes: - 'rtas_ibm_errinjct()' handler implementation - Registration of 'RTAS_IBM_ERRINJCT' token - RTAS error codes for result reporting - Helper macros used exclusively in RTAS code path Enables guest-initiated error injection for improved test coverage and diagnostics in EEH emulation flows. Signed-off-by: Narayana Murty N --- hw/ppc/spapr_pci.c | 153 +++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 6 +- 2 files changed, 158 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index c1d4b7806e..74aefca827 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -704,6 +704,156 @@ param_error_exit: rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); } =20 +static int parse_and_verify_recovered_special_event(target_ulong param_buf, + uint64_t *addr) { + uint32_t mode =3D rtas_ld(param_buf, 0); + if (mode !=3D EEH_ERR_EVENT_MODE_MIN && mode !=3D EEH_ERR_EVENT_MODE_M= AX) { + return RTAS_OUT_PARAM_ERROR; + } + *addr =3D ((uint64_t)mode) << 32; + qemu_log("RTAS: recovered-special-event: mode=3D%u\n", mode); + return RTAS_OUT_SUCCESS; +} + +static int parse_and_verify_corrupted_page(target_ulong param_buf, + uint64_t *addr) { + *addr =3D ((uint64_t)rtas_ld(param_buf, 0) << 32) | rtas_ld(param_buf,= 1); + qemu_log("RTAS: corrupted-page: addr=3D%"PRIx64"\n", *addr); + return (*addr) ? RTAS_OUT_SUCCESS : RTAS_OUT_PARAM_ERROR; +} + +static int parse_and_verify_ioa_bus_error(target_ulong param_buf, + bool is_64bit, + uint64_t *addr, uint64_t *mask, + uint64_t *buid, uint32_t *func) +{ + if (is_64bit) { + *addr =3D ((uint64_t)rtas_ld(param_buf, 0) << 32) | rtas_ld(param_= buf, 1); + *mask =3D ((uint64_t)rtas_ld(param_buf, 2) << 32) | rtas_ld(param_= buf, 3); + *buid =3D ((uint64_t)rtas_ld(param_buf, 5) << 32) | rtas_ld(param_= buf, 6); + *func =3D rtas_ld(param_buf, 7); + } else { + *addr =3D rtas_ld(param_buf, 0); + *mask =3D rtas_ld(param_buf, 1); + *buid =3D ((uint64_t)rtas_ld(param_buf, 3) << 32) | rtas_ld(param_= buf, 4); + *func =3D rtas_ld(param_buf, 5); + } + + return RTAS_OUT_SUCCESS; +} + +static int parse_and_verify_corrupted_dcache(target_ulong param_buf, + uint64_t *addr) +{ + uint32_t action =3D rtas_ld(param_buf, 0); + uint32_t nature =3D rtas_ld(param_buf, 1); + *addr =3D ((uint64_t)action << 32) | nature; + + return (action <=3D 2 && nature <=3D 2) ? RTAS_OUT_SUCCESS + : RTAS_OUT_PARAM_ERROR; +} + +static int parse_and_verify_corrupted_icache(target_ulong param_buf, + uint64_t *addr) +{ + uint32_t action =3D rtas_ld(param_buf, 0); + uint32_t nature =3D rtas_ld(param_buf, 1); + *addr =3D ((uint64_t)action << 32) | nature; + + return (action <=3D 3 && nature <=3D 2) ? RTAS_OUT_SUCCESS + : RTAS_OUT_PARAM_ERROR; +} + +static int parse_and_verify_corrupted_tlb(target_ulong param_buf, + uint64_t *addr) +{ + uint32_t nature =3D rtas_ld(param_buf, 0); + *addr =3D ((uint64_t)nature << 32); + + return (nature <=3D 2) ? RTAS_OUT_SUCCESS : RTAS_OUT_PARAM_ERROR; +} + +static void rtas_ibm_errinjct(PowerPCCPU *cpu, SpaprMachineState *spapr, + uint32_t token, uint32_t nargs, + target_ulong args, uint32_t nret, + target_ulong rets) +{ + SpaprPhbState *sphb; + target_ulong param_buf; + uint64_t addr =3D 0, mask =3D 0, buid =3D 0; + uint32_t func =3D 0; + uint32_t type, o_token; + int ret =3D -1; + + if ((nargs !=3D 3) || (nret !=3D 1)) { + goto param_error_exit; + } + + type =3D rtas_ld(args, 0); + o_token =3D rtas_ld(args, 1); + param_buf =3D rtas_ld(args, 2); + + if (o_token !=3D spapr->errinjct_token) { + goto param_error_exit; + } + + sphb =3D QLIST_FIRST(&spapr->phbs); + if (!sphb) { + goto param_error_exit; + } + + switch (type) { + case RTAS_ERR_TYPE_IOA_BUS_ERROR: + ret =3D parse_and_verify_ioa_bus_error(param_buf, false, &addr, + &mask, &buid, &func); + break; + case RTAS_ERR_TYPE_IOA_BUS_ERROR_64: + ret =3D parse_and_verify_ioa_bus_error(param_buf, true, &addr, + &mask, &buid, &func); + break; + case RTAS_ERR_TYPE_CORRUPTED_PAGE: + ret =3D parse_and_verify_corrupted_page(param_buf, &addr); + break; + case RTAS_ERR_TYPE_RECOVERED_SPECIAL_EVENT: + ret =3D parse_and_verify_recovered_special_event(param_buf, &addr); + break; + case RTAS_ERR_TYPE_CORRUPTED_DCACHE_START: + case RTAS_ERR_TYPE_CORRUPTED_DCACHE_END: + ret =3D parse_and_verify_corrupted_dcache(param_buf, &addr); + mask =3D 0; + break; + case RTAS_ERR_TYPE_CORRUPTED_ICACHE_START: + case RTAS_ERR_TYPE_CORRUPTED_ICACHE_END: + ret =3D parse_and_verify_corrupted_icache(param_buf, &addr); + mask =3D 0; + break; + case RTAS_ERR_TYPE_CORRUPTED_TLB_START: + case RTAS_ERR_TYPE_CORRUPTED_TLB_END: + ret =3D parse_and_verify_corrupted_tlb(param_buf, &addr); + mask =3D 0; + break; + default: + ret =3D RTAS_OUT_PARAM_ERROR; + break; + } + + if (ret !=3D RTAS_OUT_SUCCESS) { + goto param_error_exit; + } + + ret =3D spapr_phb_vfio_errinjct(sphb, func, addr, mask, type); + if (ret < 0) { + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); + return; + } + + rtas_st(rets, 0, RTAS_OUT_SUCCESS); + return; + +param_error_exit: + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); +} + static void pci_spapr_set_irq(void *opaque, int irq_num, int level) { /* @@ -2380,6 +2530,9 @@ void spapr_pci_rtas_init(void) spapr_rtas_register(RTAS_IBM_SLOT_ERROR_DETAIL, "ibm,slot-error-detail", rtas_ibm_slot_error_detail); + spapr_rtas_register(RTAS_IBM_ERRINJCT, + "ibm,errinjct", + rtas_ibm_errinjct); } =20 static void spapr_pci_register_types(void) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index fadb7cf7d9..512dd038ec 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -706,6 +706,9 @@ void push_sregs_to_kvm_pr(SpaprMachineState *spapr); #define EEH_ERR_FUNC_DMA_WR_TARGET 19 #define EEH_ERR_FUNC_MAX EEH_ERR_FUNC_DMA_WR_TARGET =20 +#define EEH_ERR_EVENT_MODE_MIN 1 +#define EEH_ERR_EVENT_MODE_MAX 2 + /* RTAS PCI Error Injection Token Types */ enum rtas_err_type { RTAS_ERR_TYPE_FATAL =3D 0x1, @@ -808,8 +811,9 @@ enum rtas_err_type { #define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2B) #define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2C) #define RTAS_CONFIGURE_KERNEL_DUMP (RTAS_TOKEN_BASE + 0x2D) +#define RTAS_IBM_ERRINJCT (RTAS_TOKEN_BASE + 0x2E) =20 -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2E) +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2F) =20 /* RTAS ibm,get-system-parameter token values */ #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20 --=20 2.54.0 From nobody Sat May 30 17:43:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779277085; cv=none; d=zohomail.com; s=zohoarc; b=UwTMaJuhOXVEMdTDQR4QffhhHGRLduxe9aVKN8lzuBsiURVRMh+25qWSsS28gJJPtr5X18Ii5vx5OKIY5+QUrWeOsyLrymO6ytVsZ6HFqJk7hk/Ljw1miCOScXHXLy4CYb+Cqs9w0Ww0Oa/lERJFXTi2puQCqo1n/sIgfjRl8dA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779277085; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2v08B2DmlNs9ED6HtgHqUKLFvvqhvKxsPs40uxOW8tc=; b=PCa0SGMUdtvOiRhjzZ79ukYt0LpFftZ3Ro1V9afWSD15Kos99t9BObTqqsB3nkC8E0ye+Qp8k2NK8pG+OZWikZCxOhtLQBMLmS9YJkGaXPqBUTmPp0uDV044iVRHKDFGxCFbMnYqrnNgEJFtf+1LboVR6pZ5HaozGuSlapHba00= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779277085331516.494929093094; Wed, 20 May 2026 04:38:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPfF6-0004jl-CK; Wed, 20 May 2026 07:37:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfF0-0004Oz-7X; Wed, 20 May 2026 07:37:34 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfEy-0006Nn-91; Wed, 20 May 2026 07:37:33 -0400 Received: from pps.filterd (m0356517.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64K5G4Px617871; Wed, 20 May 2026 09:55:13 GMT Received: from ppma21.wdc07v.mail.ibm.com (5b.69.3da9.ip4.static.sl-reverse.com [169.61.105.91]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h751dn7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:12 +0000 (GMT) Received: from pps.filterd (ppma21.wdc07v.mail.ibm.com [127.0.0.1]) by ppma21.wdc07v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64K9s53i021588; Wed, 20 May 2026 09:55:11 GMT Received: from smtprelay06.fra02v.mail.ibm.com ([9.218.2.230]) by ppma21.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4e73wk6se3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:11 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay06.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64K9t7dV19988808 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 20 May 2026 09:55:07 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 83A0F20040; Wed, 20 May 2026 09:55:07 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 52AF120043; Wed, 20 May 2026 09:55:05 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 20 May 2026 09:55:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=2v08B2DmlNs9ED6Ht gHqUKLFvvqhvKxsPs40uxOW8tc=; b=lSXaF7PYhgksoveQvNIfsRMSTqLjmasjU Qh7Zr/n4uZ9L52zYKWy0XnLhMv8eOUsiNpWioE5yigDKc33uIOBtFQ6eXQDztNpQ 97vz5EXzqkzKs6TBdGImZRBd1AZfXiYkYve535xhR16861H5v3QdvN15gOH8maPa blvi9AdwLGywBEWs6LugvdoZQQ3RgbnHATEkCBONRZm5P3MUisH4dPNOGhm7UGgA d5OQhYhJs2kL2vleTiWQCIsd4+AHBvN9N+NXBLxuVH/YiTB4kZfy1u3a77rCuTmW IGpzxMc88EVWwyJ3AROYf/kLzVTXNX864/265rZEARVaaUBZQnUoQ== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v3 3/6] ppc/spapr: Add support for 'ibm, open-errinjct' and 'ibm, close-errinjct' Date: Wed, 20 May 2026 15:24:43 +0530 Message-ID: <20260520095446.64206-4-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520095446.64206-1-nnmlinux@linux.ibm.com> References: <20260520095446.64206-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=ffCdDUQF c=1 sm=1 tr=0 ts=6a0d8500 cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=376oZdPSatvzr_fvEE0A:9 X-Proofpoint-ORIG-GUID: dJ-jZDxVNoxLSTZ8rBQl7q716qdUSh5q X-Proofpoint-GUID: c5w0v1Run3iyFA9QIHRdFErh1dhpAHCh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDA5MiBTYWx0ZWRfX4WZlUertElEp dXPyffOh4ow9kqa+awrGOhpSCsZAEzovkWwTUZPtolQZkaTrlEyKBPw3+MvCMTQAk04jL9YIM/j Whe7yjxIjfsH3isB+qx4EGWcerOsYp22tIu3lUmqThOqgGaBCFYRMXk/E6145IeAAAaINOo1qFZ /1O7N86ndORuzrUjFisyV7hYtOnGGio7+VkxijsgBIUOJqcFOVoxjQJtMm83BHdMkhl5Ig5fhjm z87ON9Dn7T3dG+cwoyNXJ4Gei0OVzi1oXeuuCuR0+BIi1+/ZoD10ZdH7qFcNTzAC49EYPoZACO1 KZbsP2tx455KtKk3ybQYQSb4etACnSTV2AZLxv1/frz3x73zCTTevDs2wheEvKGfRkKpbItveLn UN1CGw71tIX7IcBB4vQe0cLWucE94SE9v4PsdgJEZVaNzAoChEklI12d5M9z02Z+xkAecR1xiP8 lBUC7kdB9Tznimr5Hvg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 suspectscore=0 adultscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200092 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779277087432154100 Content-Type: text/plain; charset="utf-8" Add support for the 'ibm,open-errinjct' and 'ibm,close-errinjct' RTAS calls. These handlers manage exclusive access to error injection facilities through a simple session-based mechanism. Updates include: - Implementation of rtas_ibm_open_errinjct() and rtas_ibm_close_errinjct() - Tracking field 'spapr->errinjct_token' in SpaprMachineState - New token definitions for the above RTAS calls - Return codes for already open or invalid close conditions This ensures that only one guest process can actively perform error injection at a time, improving reliability and preventing conflicts. Signed-off-by: Narayana Murty N --- hw/ppc/spapr_pci.c | 65 ++++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 9 +++++- 2 files changed, 73 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 74aefca827..f08f21f03c 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -854,6 +854,65 @@ param_error_exit: rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); } =20 +static void rtas_ibm_open_errinjct(PowerPCCPU *cpu, + SpaprMachineState *spapr, + uint32_t token, + uint32_t nargs, + target_ulong args, + uint32_t nret, + target_ulong rets) +{ + /* Validate argument count */ + if ((nargs !=3D 0) || (nret !=3D 2)) { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } + + if (spapr->errinjct_token) { + /* Already open: return token=3D0 and code=3DALREADY_OPEN */ + rtas_st(rets, 0, 0); + rtas_st(rets, 1, RTAS_OUT_ALREADY_OPEN); + return; + } + + spapr->errinjct_token =3D 1; + + /* + * Unlike most RTAS calls, ibm,open-errinjct returns + * the session token in the first output parameter + * and the status in the second. + */ + rtas_st(rets, 0, spapr->errinjct_token); + rtas_st(rets, 1, RTAS_OUT_SUCCESS); +} + +static void rtas_ibm_close_errinjct(PowerPCCPU *cpu, + SpaprMachineState *spapr, + uint32_t token, + uint32_t nargs, + target_ulong args, + uint32_t nret, + target_ulong rets) +{ + uint32_t o_token; + + if ((nargs !=3D 1) || (nret !=3D 1)) { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } + + o_token =3D rtas_ld(args, 0); + + if (o_token !=3D spapr->errinjct_token) { + rtas_st(rets, 0, RTAS_OUT_NOT_OPEN); + return; + } + + spapr->errinjct_token =3D 0; + + rtas_st(rets, 0, RTAS_OUT_SUCCESS); +} + static void pci_spapr_set_irq(void *opaque, int irq_num, int level) { /* @@ -2533,6 +2592,12 @@ void spapr_pci_rtas_init(void) spapr_rtas_register(RTAS_IBM_ERRINJCT, "ibm,errinjct", rtas_ibm_errinjct); + spapr_rtas_register(RTAS_IBM_OPEN_ERRINJCT, + "ibm,open-errinjct", + rtas_ibm_open_errinjct); + spapr_rtas_register(RTAS_IBM_CLOSE_ERRINJCT, + "ibm,close-errinjct", + rtas_ibm_close_errinjct); } =20 static void spapr_pci_register_types(void) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 512dd038ec..6c87f94e1d 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -274,6 +274,8 @@ struct SpaprMachineState { bool fadump_registered; bool fadump_dump_active; FadumpMemStruct registered_fdm; + + uint32_t errinjct_token; }; =20 #define H_SUCCESS 0 @@ -746,6 +748,9 @@ enum rtas_err_type { #define RTAS_OUT_PARAM_ERROR -3 #define RTAS_OUT_NOT_SUPPORTED -3 #define RTAS_OUT_NO_SUCH_INDICATOR -3 +#define RTAS_OUT_ALREADY_OPEN -4 +#define RTAS_OUT_NOT_OPEN -5 +#define RTAS_OUT_CLOSE_ERROR -6 #define RTAS_OUT_DUMP_ALREADY_REGISTERED -9 #define RTAS_OUT_DUMP_ACTIVE -10 #define RTAS_OUT_NOT_AUTHORIZED -9002 @@ -812,8 +817,10 @@ enum rtas_err_type { #define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2C) #define RTAS_CONFIGURE_KERNEL_DUMP (RTAS_TOKEN_BASE + 0x2D) #define RTAS_IBM_ERRINJCT (RTAS_TOKEN_BASE + 0x2E) +#define RTAS_IBM_OPEN_ERRINJCT (RTAS_TOKEN_BASE + 0x2F) +#define RTAS_IBM_CLOSE_ERRINJCT (RTAS_TOKEN_BASE + 0x30) =20 -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2F) +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x31) =20 /* RTAS ibm,get-system-parameter token values */ #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20 --=20 2.54.0 From nobody Sat May 30 17:43:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779277124; cv=none; d=zohomail.com; s=zohoarc; b=FFyt3mQFS6cwc1wXG2gs2LWkNBdqiMotkEiJXh5phwpfshqvl+bkEAjaNj3bdK4uAxCnN+t+ZT/nth1D+klnhJn44v6BYCuAjg9kY3+GxcasYvjuo56fgDoG2adywAZOOVKBNCN/S1fkxHPn2Gbs5UgPp0RscZ4rnDD7OqqC9Z8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779277124; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=g9UP1PENNK8WkZ6z2fKKEjGYRu+HrPV8OaLOaTTpWlo=; b=g1Fn2F/MA/nmg1LpaaHcu8gvfQxBAxIzOt1REYufEpTjDH1JdlUbPTI8fz2MCtnpE7UttHaxuFgSjpXU8H4FnC6U7zsiR2s2mEu2JunFhx4GW1d3J3Sccbv+zS8KknsyXwBVCp3kN121SVNcCb86pWO3aN8vbsLl8PvPw8iLffE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779277124843503.92336399883754; Wed, 20 May 2026 04:38:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPfF5-0004d0-Ax; Wed, 20 May 2026 07:37:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfEk-0004FO-5q; Wed, 20 May 2026 07:37:18 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfEh-0006Kj-Rk; Wed, 20 May 2026 07:37:17 -0400 Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64K2bEHX4103041; Wed, 20 May 2026 09:55:15 GMT Received: from ppma22.wdc07v.mail.ibm.com (5c.69.3da9.ip4.static.sl-reverse.com [169.61.105.92]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h8mscrp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:15 +0000 (GMT) Received: from pps.filterd (ppma22.wdc07v.mail.ibm.com [127.0.0.1]) by ppma22.wdc07v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64K9s6Yf030658; Wed, 20 May 2026 09:55:13 GMT Received: from smtprelay02.fra02v.mail.ibm.com ([9.218.2.226]) by ppma22.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4e739vxw0d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:13 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay02.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64K9tAYY50528704 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 20 May 2026 09:55:10 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0BCAD20040; Wed, 20 May 2026 09:55:10 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CE60620043; Wed, 20 May 2026 09:55:07 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 20 May 2026 09:55:07 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=g9UP1PENNK8WkZ6z2 fKKEjGYRu+HrPV8OaLOaTTpWlo=; b=CUwlzuRTRBkjhvidq4pNwDeCRwmM4jnOe Gu2XW6dw2GRVkW3Ob5l4vpTxnYbH46nd5nRjKGSEz32z2SLoDtF8rZM+AXlPX6HD xwGEbMF6cEW+kg/csz5vQFTbGetdEqukn21WtaswAlAaVSqhzimM0R4d33lNjOlP Nv9XNVBGh4nPg04gowkQVsk12q/JqcNsEhEIuqyM18sdRAqTGRpWaF5AgvFlWXdr xncNl5fLHtIwYDwrjNoQHWHmlwy7zLlReLuOVLwy/YVmPAT9CBnc3fQsf05jlFBy WIP5prDLhyDEebjMeIxbVXBN1Az1eRm5tHYgUZ6SVBHKYcTgb07IA== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v3 4/6] ppc/spapr: Advertise RTAS error injection call support via FDT property Date: Wed, 20 May 2026 15:24:44 +0530 Message-ID: <20260520095446.64206-5-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520095446.64206-1-nnmlinux@linux.ibm.com> References: <20260520095446.64206-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: 8Kk1W2xg0Wmo5ZzK233rZEieEKzlHhWe X-Authority-Analysis: v=2.4 cv=GYMnWwXL c=1 sm=1 tr=0 ts=6a0d8503 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=FMcFQFN-209rnwronxIA:9 X-Proofpoint-ORIG-GUID: BX6PwswK6YPD3MwcfmhuprCyM9T4BRWI X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDA5MiBTYWx0ZWRfXzId+nwFv2+3W +zcPi1GcVuFxPt5LqKR0YL5UtWfb00rvP0b/VZPAsn9Mg7AujJYCXne/zBmHD6pP7h6AC4zj70r HdRSjYhmPh9hZ62EefjBY7GkfT4AWmQLoDAL9F05DtqX4LiVTG2E8e18/yLTTyebQqm6d1Bl36q m9kx/NAARRunSBTijKMJAHTU4yipjksyX/hkgEWfV6q7+zSakCTM3oFeyx3NxqxJ0QnQJEMVU+W 5RWQ8QBisHcrjNUR207MSnQYUQwb6RNin/pFXvuuEWA1ryfTSEDhzOwb84Rf6frFCLEO7zZEvYR KHLsLhsz9pypyP2jMwQzJtWjE6PPZooxYmW/iB+O5csm85z7xcdPowI/qhyw5yEOQDnVjZRj52t WqwHYiE7VysUXL9xr+9KPdUJ0vGBOYOEyLHyg2hM/b+flN1ig7uDDcjOBUqsBpnaahK0XeKupDu vcMxocz8RFybTfQiS1Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200092 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779277126312154100 Content-Type: text/plain; charset="utf-8" Advertise RTAS error injection call support to guests through a new "ibm,errinjct-tokens" property under the RTAS node in the device tree. This patch introduces: - spapr_get_errinject_tokens(), which retrieves or constructs a blob of supported error injection tokens from the host or fallback data. - Integration of "ibm,errinjct-tokens" into the RTAS FDT node. - Addition of "ibm,open-errinjct" and "ibm,close-errinjct" properties to advertise open/close handlers for error injection sessions. The ibm,errinjct-tokens property allows guests to programmatically discover supported RTAS error injection facilities, enabling safe and dynamic usage. The helper routine allocates memory for the token blob, which the caller must free once it has been added to the FDT. If the device-tree file (/proc/device-tree/rtas/ibm,errinjct-tokens) is not available, a static fallback blob is generated internally. Signed-off-by: Narayana Murty N --- hw/ppc/spapr.c | 104 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d40af312fa..42e72ed5d3 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -115,6 +115,8 @@ =20 #define PHANDLE_INTC 0x00001111 =20 +#define ERR_BLOB_MAX 512 + /* These two functions implement the VCPU id numbering: one to compute them * all and one to identify thread 0 of a VCORE. Any change to the first one * is likely to have an impact on the second one, so let's keep them close. @@ -968,10 +970,102 @@ static void spapr_dt_rtas_fadump(SpaprMachineState *= spapr, void *fdt, int rtas) } } =20 +/* + * spapr_get_errinject_tokens: + * --------------------------- + * Retrieve or construct a binary blob representing supported RTAS error + * injection tokens. If the host device-tree path + * "/proc/device-tree/rtas/ibm,errinjct-tokens" exists, it is read directl= y. + * Otherwise, a static fallback list of tokens is generated. + * + * The caller receives a dynamically allocated buffer in @out_buf and + * its size in @out_size, both of which must be freed by the caller + * once used. + * + * Returns: + * 0 (EXIT_SUCCESS) - on success + * -ENOMEM - on failure + */ +static int spapr_get_errinject_tokens(char **out_buf, size_t *out_size) +{ + char *path =3D NULL, *buf =3D NULL; + gsize len =3D 0; + uint8_t errinjct_blob[ERR_BLOB_MAX]; + + static const struct { + const char *name; + enum rtas_err_type token; + } errinjct_tokens[] =3D { + { "recovered-special-event", RTAS_ERR_TYPE_RECOVERED_SPECIAL_EVENT= }, + { "corrupted-page", RTAS_ERR_TYPE_CORRUPTED_PAGE }, + { "ioa-bus-error", RTAS_ERR_TYPE_IOA_BUS_ERROR }, + { "corrupted-dcache-start", RTAS_ERR_TYPE_CORRUPTED_DCACHE_START = }, + { "corrupted-dcache-end", RTAS_ERR_TYPE_CORRUPTED_DCACHE_END }, + { "corrupted-icache-start", RTAS_ERR_TYPE_CORRUPTED_ICACHE_START = }, + { "corrupted-icache-end", RTAS_ERR_TYPE_CORRUPTED_ICACHE_END }, + { "corrupted-tlb-start", RTAS_ERR_TYPE_CORRUPTED_TLB_START }, + { "corrupted-tlb-end", RTAS_ERR_TYPE_CORRUPTED_TLB_END }, + { "ioa-bus-error-64", RTAS_ERR_TYPE_IOA_BUS_ERROR_64 }, + }; + + path =3D g_strdup("/proc/device-tree/rtas/ibm,errinjct-tokens"); + + if (g_file_test(path, G_FILE_TEST_EXISTS)) { + qemu_log_mask(LOG_UNIMP, "RTAS: Found %s\n", path); + + if (!g_file_get_contents(path, &buf, &len, NULL)) { + qemu_log_mask(LOG_UNIMP, "RTAS: Failed to read %s", path); + } else { + qemu_log("RTAS: Read %zu bytes from device-tree\n", len); + *out_buf =3D buf; + *out_size =3D len; + g_free(path); + return EXIT_SUCCESS; + } + } + + qemu_log_mask(LOG_UNIMP, "RTAS: %s not found, building fallback blob\n= ", path); + g_free(path); + len =3D 0; + + for (int i =3D 0; i < G_N_ELEMENTS(errinjct_tokens); i++) { + const char *name =3D errinjct_tokens[i].name; + size_t str_len =3D strlen(name) + 1; + + if (len + str_len + sizeof(uint32_t) > sizeof(errinjct_blob)) { + qemu_log_mask(LOG_UNIMP, "RTAS: Too many tokens for static buf= fer"); + return -ENOMEM; + } + + memcpy(&errinjct_blob[len], name, str_len); + len +=3D str_len; + + uint32_t be_token =3D cpu_to_be32(errinjct_tokens[i].token); + memcpy(&errinjct_blob[len], &be_token, sizeof(be_token)); + len +=3D sizeof(be_token); + } + + buf =3D g_malloc(len); + if (!buf) { + qemu_log_mask(LOG_UNIMP, "RTAS: Failed to allocate %zu bytes for b= lob", len); + return -ENOMEM; + } + + memcpy(buf, errinjct_blob, len); + *out_buf =3D buf; + *out_size =3D len; + + qemu_log_mask(LOG_UNIMP, "RTAS: Fallback blob built (%zu bytes)\n", le= n); + return EXIT_SUCCESS; +} + + static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt) { MachineState *ms =3D MACHINE(spapr); int rtas; + size_t size_tokens =3D 0; + g_autofree char *errinject_tokens; GString *hypertas =3D g_string_sized_new(256); GString *qemu_hypertas =3D g_string_sized_new(256); uint64_t max_device_addr =3D 0; @@ -1080,6 +1174,16 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, = void *fdt) */ _FDT(fdt_setprop(fdt, rtas, "ibm,extended-os-term", NULL, 0)); =20 + if (!spapr_get_errinject_tokens(&errinject_tokens, &size_tokens)) { + _FDT(fdt_setprop(fdt, rtas, "ibm,errinjct-tokens", + errinject_tokens, size_tokens)); + + _FDT(fdt_setprop_string(fdt, rtas, "ibm,open-errinjct", + "ibm,open-errinjct")); + _FDT(fdt_setprop_string(fdt, rtas, "ibm,close-errinjct", + "ibm,close-errinjct")); + } + _FDT(fdt_setprop(fdt, rtas, "ibm,lrdr-capacity", lrdr_capacity, sizeof(lrdr_capacity))); =20 --=20 2.54.0 From nobody Sat May 30 17:43:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779277020; cv=none; d=zohomail.com; s=zohoarc; b=R7ZKvJRW/2opbfZD3YtK0c/Z9bT8L+YwvHTOXfEkry25YjTv7tVbx4E3jKV/N04bVD6QE98U+J7NPpkpPl5gKcVjX53JA+mJy55cYXu5FQysPattBJmrol7g9mewZIU9bRvlORHDVgsyvOBVIG8b57QwulMh+reQHEoWNHat6C0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779277020; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=eT/unGcIa2ig/PbIH9fHqH1irBH5ZUk2wfO/1TOIM/U=; b=d6Hg9T6D3yo1dT4XEt2BIKk4ECsOPbtUuDGUB2G6qbqso7z9jXVYmC/rQxmmIPuvuVSJaHJ/kZKC9bjjckMArCEGonU165iR1O0Gev1NXDJ20nSKahQjQjvH6y14pIt9nrTarQvXY9IuVt3NY1+935Ekk1zm4F1/F8ajAfPg9L0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779277020649909.996981104365; Wed, 20 May 2026 04:37:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPfED-0003bm-5D; Wed, 20 May 2026 07:36:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfDY-0003SM-59; Wed, 20 May 2026 07:36:14 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPfDQ-00066H-OK; Wed, 20 May 2026 07:36:01 -0400 Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64JM64lw3919898; Wed, 20 May 2026 09:55:18 GMT Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h8mscrv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:17 +0000 (GMT) Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64K9s5Ql003156; Wed, 20 May 2026 09:55:16 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4e74dhpq21-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:16 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64K9tCMN14156236 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 20 May 2026 09:55:12 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8274920043; Wed, 20 May 2026 09:55:12 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5746D20040; Wed, 20 May 2026 09:55:10 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 20 May 2026 09:55:10 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=eT/unGcIa2ig/PbIH 9fHqH1irBH5ZUk2wfO/1TOIM/U=; b=Enq/pkH8wzPHr2HXPVE4GHeaZ3aFJfjhD xKD7poBQOQdDdb4rfp8PvcXErJhVaM6D3r67ngzFSLwWDR8Yf6w5SyHLeKS11o/7 QOVawUpp99RcLO+fXZ1FJ94MRhngCc0L9CbqjPjClIwOMcA7h6hnni65ibPXTL0w GrOkUHcseMTLm8/07R6ZZH397sGlj3VwhGKtlS6ExB2S1B7vMn7hSjThMjmzP/ty yaPdmeiA/Khemf0kbgvafKY+Z+pKn1LS/spIQMLykAFZzvilAkD6sbC4cDQimUsg AxNmlsdRMfSAoyI8zU4uR8q0Qnt/MST1WH2Fk9JYjv8zMnmIr+01g== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v3 5/6] ppc/spapr: Split VFIO code and refactor EEH interface Date: Wed, 20 May 2026 15:24:45 +0530 Message-ID: <20260520095446.64206-6-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520095446.64206-1-nnmlinux@linux.ibm.com> References: <20260520095446.64206-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: xmBBUHyKuweueeyC4Eqc6JvBL6o5pA9f X-Authority-Analysis: v=2.4 cv=GYMnWwXL c=1 sm=1 tr=0 ts=6a0d8506 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=iLwWiD_BOgVO3yIk_7QA:9 X-Proofpoint-ORIG-GUID: 4OMViRjFP1gcFluZrD9TRnnQgct5cfcC X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDA5MiBTYWx0ZWRfX90/7STmQfQrf anSeTAKO6OV8WocEqNTbNsZuXF8e64A3xxmbjTEiDkAv+7yZb5VeK5eQuplLK3xI2X479udnZDs ctlhUZh1ev4RQdd8rJnzZYNNFonPtDHed7xlvW4hRKN+iNYqudHtp0ZtC2PfHgYjtdRRjQ9LToD alD/1fjph2D/VcshBLPuS9uz9bhKG0RJbp8XwX08qVCE2q8tFJyg5s4577oYq0X+xhoBIyorqWJ M5UvwMvI1LjBahBfuB1++M26AdUeo5R3X9s/T1ZRipDYir0i6DDYVtO6ltU6jhBukA7JCTXLqdY rH4Tnw/iPL5eqA09R2KWirRWEbDVTfS9GzupW4qFbtXDthVi0q0zmvpJYE7dk/kgLzKpN71johR mt+gnp17QYIJ+0BHFEGgDA8IGaq84Zla1MqjrVsikpHVoLEvj5IEBLv5RLCeYLtxtMRYiyPQO3l z/tBMHycs8cACQO+brg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200092 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779277021871158500 Content-Type: text/plain; charset="utf-8" Split spapr_pci_vfio.c into two files to separate concerns: - spapr_pci_vfio.c: Contains general VFIO routines - spapr_pci_vfio_eeh.c: Contains EEH-specific routines Additionally, consolidate VFIO EEH function declarations into a new header file (spapr_vfio.h) to improve modularity and reduce header dependencies. Changes: - Split VFIO functionality: keep general VFIO routines in spapr_pci_vfio.c and move EEH routines to spapr_pci_vfio_eeh.c - Created include/hw/ppc/spapr_vfio.h with forward declarations to avoid pulling in full spapr headers and libfdt dependencies - Introduced stubs/spapr_pci_vfio-stubs.c to consolidate all VFIO, VFIO EEH stub functions in one place - Updated hw/ppc/spapr_pci.c to include new spapr_vfio.h header - Updated stubs/meson.build to reference new stub file This improves code organization by separating VFIO and EEH concerns, and enhances build system modularity by making it easier to maintain VFIO-related code separately from core sPAPR PCI code. Signed-off-by: Narayana Murty N Reviewed-by: Pierrick Bouvier --- hw/ppc/Kconfig | 2 +- hw/ppc/meson.build | 1 + hw/ppc/spapr_pci.c | 1 + hw/ppc/spapr_pci_vfio.c | 367 +---------------------------------- hw/ppc/spapr_pci_vfio_eeh.c | 346 +++++++++++++++++++++++++++++++++ include/hw/pci-host/spapr.h | 44 +---- include/hw/ppc/spapr_vfio.h | 28 +++ stubs/meson.build | 1 + stubs/spapr_phb_vfio-stubs.c | 52 +++++ 9 files changed, 432 insertions(+), 410 deletions(-) create mode 100644 hw/ppc/spapr_pci_vfio_eeh.c create mode 100644 include/hw/ppc/spapr_vfio.h create mode 100644 stubs/spapr_phb_vfio-stubs.c diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 347dcce690..1fb191fe83 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -6,7 +6,7 @@ config PSERIES imply PCI_DEVICES imply TEST_DEVICES imply VIRTIO_VGA - imply VFIO_PCI if LINUX # needed by spapr_pci_vfio.c + imply VFIO_PCI if LINUX # needed by spapr_pci_vfio.c and spapr_pci_v= fio_eeh.c select NVDIMM select DIMM select PCI diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build index 37aa535db2..97e4be0dc9 100644 --- a/hw/ppc/meson.build +++ b/hw/ppc/meson.build @@ -36,6 +36,7 @@ ppc_ss.add(when: 'CONFIG_SPAPR_RNG', if_true: files('spap= r_rng.c')) if host_os =3D=3D 'linux' ppc_ss.add(when: 'CONFIG_PSERIES', if_true: files( 'spapr_pci_vfio.c', + 'spapr_pci_vfio_eeh.c', )) endif =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index f08f21f03c..576b92229b 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -33,6 +33,7 @@ #include "hw/pci/msix.h" #include "hw/pci/pci_host.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/spapr_vfio.h" #include "hw/pci-host/spapr.h" #include #include "trace.h" diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index ed0b22a84a..2207654d83 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -22,119 +22,11 @@ #include #include "hw/ppc/spapr.h" #include "hw/pci-host/spapr.h" +#include "hw/ppc/spapr_vfio.h" #include "hw/pci/msix.h" #include "hw/pci/pci_device.h" #include "hw/vfio/vfio-container-legacy.h" #include "qemu/error-report.h" -#include CONFIG_DEVICES /* CONFIG_VFIO_PCI */ - -/* - * Interfaces for IBM EEH (Enhanced Error Handling) - */ -#ifdef CONFIG_VFIO_PCI -static bool vfio_eeh_container_ok(VFIOLegacyContainer *container) -{ - /* - * As of 2016-03-04 (linux-4.5) the host kernel EEH/VFIO - * implementation is broken if there are multiple groups in a - * container. The hardware works in units of Partitionable - * Endpoints (=3D=3D IOMMU groups) and the EEH operations naively - * iterate across all groups in the container, without any logic - * to make sure the groups have their state synchronized. For - * certain operations (ENABLE) that might be ok, until an error - * occurs, but for others (GET_STATE) it's clearly broken. - */ - - /* - * XXX Once fixed kernels exist, test for them here - */ - - if (QLIST_EMPTY(&container->group_list)) { - return false; - } - - if (QLIST_NEXT(QLIST_FIRST(&container->group_list), container_next)) { - return false; - } - - return true; -} - -static int vfio_eeh_container_op(VFIOLegacyContainer *container, uint32_t = op) -{ - struct vfio_eeh_pe_op pe_op =3D { - .argsz =3D sizeof(pe_op), - .op =3D op, - }; - int ret; - - if (!vfio_eeh_container_ok(container)) { - error_report("vfio/eeh: EEH_PE_OP 0x%x: " - "kernel requires a container with exactly one group",= op); - return -EPERM; - } - - ret =3D ioctl(container->fd, VFIO_EEH_PE_OP, &pe_op); - if (ret < 0) { - error_report("vfio/eeh: EEH_PE_OP 0x%x failed: %m", op); - return -errno; - } - - return ret; -} - -static VFIOLegacyContainer *vfio_eeh_as_container(AddressSpace *as) -{ - VFIOAddressSpace *space =3D vfio_address_space_get(as); - VFIOContainer *bcontainer =3D NULL; - - if (QLIST_EMPTY(&space->containers)) { - /* No containers to act on */ - goto out; - } - - bcontainer =3D QLIST_FIRST(&space->containers); - - if (QLIST_NEXT(bcontainer, next)) { - /* - * We don't yet have logic to synchronize EEH state across - * multiple containers - */ - bcontainer =3D NULL; - goto out; - } - -out: - vfio_address_space_put(space); - return VFIO_IOMMU_LEGACY(bcontainer); -} - -static bool vfio_eeh_as_ok(AddressSpace *as) -{ - VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); - - return (container !=3D NULL) && vfio_eeh_container_ok(container); -} - -static int vfio_eeh_as_op(AddressSpace *as, uint32_t op) -{ - VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); - - if (!container) { - return -ENODEV; - } - return vfio_eeh_container_op(container, op); -} - -bool spapr_phb_eeh_available(SpaprPhbState *sphb) -{ - return vfio_eeh_as_ok(&sphb->iommu_as); -} - -static void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb) -{ - vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE); -} =20 void spapr_phb_vfio_reset(DeviceState *qdev) { @@ -146,260 +38,3 @@ void spapr_phb_vfio_reset(DeviceState *qdev) */ spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev)); } - -static void spapr_eeh_pci_find_device(PCIBus *bus, PCIDevice *pdev, - void *opaque) -{ - bool *found =3D opaque; - - if (object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { - *found =3D true; - } -} - -int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int option) -{ - uint32_t op; - int ret; - - switch (option) { - case RTAS_EEH_DISABLE: - op =3D VFIO_EEH_PE_DISABLE; - break; - case RTAS_EEH_ENABLE: { - PCIHostState *phb; - bool found =3D false; - - /* - * The EEH functionality is enabled per sphb level instead of - * per PCI device. We have already identified this specific sphb - * based on buid passed as argument to ibm,set-eeh-option rtas - * call. Now we just need to check the validity of the PCI - * pass-through devices (vfio-pci) under this sphb bus. - * We have already validated that all the devices under this sphb - * are from same iommu group (within same PE) before coming here. - * - * Prior to linux commit 98ba956f6a389 ("powerpc/pseries/eeh: - * Rework device EEH PE determination") kernel would call - * eeh-set-option for each device in the PE using the device's - * config_address as the argument rather than the PE address. - * Hence if we check validity of supplied config_addr whether - * it matches to this PHB will cause issues with older kernel - * versions v5.9 and older. If we return an error from - * eeh-set-option when the argument isn't a valid PE address - * then older kernels (v5.9 and older) will interpret that as - * EEH not being supported. - */ - phb =3D PCI_HOST_BRIDGE(sphb); - pci_for_each_device(phb->bus, (addr >> 16) & 0xFF, - spapr_eeh_pci_find_device, &found); - - if (!found) { - return RTAS_OUT_PARAM_ERROR; - } - - op =3D VFIO_EEH_PE_ENABLE; - break; - } - case RTAS_EEH_THAW_IO: - op =3D VFIO_EEH_PE_UNFREEZE_IO; - break; - case RTAS_EEH_THAW_DMA: - op =3D VFIO_EEH_PE_UNFREEZE_DMA; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); - if (ret < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - -int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) -{ - int ret; - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_GET_STATE); - if (ret < 0) { - return RTAS_OUT_PARAM_ERROR; - } - - *state =3D ret; - return RTAS_OUT_SUCCESS; -} - -static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus, - PCIDevice *pdev, - void *opaque) -{ - /* Check if the device is VFIO PCI device */ - if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { - return; - } - - /* - * The MSIx table will be cleaned out by reset. We need - * disable it so that it can be reenabled properly. Also, - * the cached MSIx table should be cleared as it's not - * reflecting the contents in hardware. - */ - if (msix_enabled(pdev)) { - uint16_t flags; - - flags =3D pci_host_config_read_common(pdev, - pdev->msix_cap + PCI_MSIX_FLAG= S, - pci_config_size(pdev), 2); - flags &=3D ~PCI_MSIX_FLAGS_ENABLE; - pci_host_config_write_common(pdev, - pdev->msix_cap + PCI_MSIX_FLAGS, - pci_config_size(pdev), flags, 2); - } - - msix_reset(pdev); -} - -static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque) -{ - pci_for_each_device_under_bus(bus, spapr_phb_vfio_eeh_clear_dev_msi= x, - NULL); -} - -static void spapr_phb_vfio_eeh_pre_reset(SpaprPhbState *sphb) -{ - PCIHostState *phb =3D PCI_HOST_BRIDGE(sphb); - - pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL); -} - -int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) -{ - uint32_t op; - int ret; - - switch (option) { - case RTAS_SLOT_RESET_DEACTIVATE: - op =3D VFIO_EEH_PE_RESET_DEACTIVATE; - break; - case RTAS_SLOT_RESET_HOT: - spapr_phb_vfio_eeh_pre_reset(sphb); - op =3D VFIO_EEH_PE_RESET_HOT; - break; - case RTAS_SLOT_RESET_FUNDAMENTAL: - spapr_phb_vfio_eeh_pre_reset(sphb); - op =3D VFIO_EEH_PE_RESET_FUNDAMENTAL; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); - if (ret < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - -int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) -{ - int ret; - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_CONFIGURE); - if (ret < 0) { - return RTAS_OUT_PARAM_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - -int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, - uint32_t func, uint64_t addr, - uint64_t mask, uint32_t type) -{ - VFIOLegacyContainer *container =3D vfio_eeh_as_container(&sphb->iommu_= as); - struct vfio_eeh_pe_op op =3D { - .op =3D VFIO_EEH_PE_INJECT_ERR, - .argsz =3D sizeof(op), - }; - - /* Set error type, address, and mask */ - op.err.type =3D type; - op.err.addr =3D addr; - op.err.mask =3D mask; - - /* Validate and set function code */ - switch (func) { - case EEH_ERR_FUNC_LD_MEM_ADDR: - case EEH_ERR_FUNC_LD_MEM_DATA: - case EEH_ERR_FUNC_LD_IO_ADDR: - case EEH_ERR_FUNC_LD_IO_DATA: - case EEH_ERR_FUNC_LD_CFG_ADDR: - case EEH_ERR_FUNC_LD_CFG_DATA: - case EEH_ERR_FUNC_ST_MEM_ADDR: - case EEH_ERR_FUNC_ST_MEM_DATA: - case EEH_ERR_FUNC_ST_IO_ADDR: - case EEH_ERR_FUNC_ST_IO_DATA: - case EEH_ERR_FUNC_ST_CFG_ADDR: - case EEH_ERR_FUNC_ST_CFG_DATA: - case EEH_ERR_FUNC_DMA_RD_ADDR: - case EEH_ERR_FUNC_DMA_RD_DATA: - case EEH_ERR_FUNC_DMA_RD_MASTER: - case EEH_ERR_FUNC_DMA_RD_TARGET: - case EEH_ERR_FUNC_DMA_WR_ADDR: - case EEH_ERR_FUNC_DMA_WR_DATA: - case EEH_ERR_FUNC_DMA_WR_MASTER: - op.err.func =3D func; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - /* Perform the ioctl to inject the error */ - if (ioctl(container->fd, VFIO_EEH_PE_OP, &op) < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} -#else - -bool spapr_phb_eeh_available(SpaprPhbState *sphb) -{ - return false; -} - -void spapr_phb_vfio_reset(DeviceState *qdev) -{ -} - -int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int option) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, int option) -{ - return RTAS_OUT_NOT_SUPPORTED; -} -#endif /* CONFIG_VFIO_PCI */ diff --git a/hw/ppc/spapr_pci_vfio_eeh.c b/hw/ppc/spapr_pci_vfio_eeh.c new file mode 100644 index 0000000000..6d07ae50c5 --- /dev/null +++ b/hw/ppc/spapr_pci_vfio_eeh.c @@ -0,0 +1,346 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* + * QEMU sPAPR PCI VFIO EEH support + */ + +#include "qemu/osdep.h" +#include +#include +#include "hw/ppc/spapr.h" +#include "hw/pci-host/spapr.h" +#include "hw/ppc/spapr_vfio.h" +#include "hw/pci/msix.h" +#include "hw/pci/pci_device.h" +#include "hw/vfio/vfio-container-legacy.h" +#include "qemu/error-report.h" +#include CONFIG_DEVICES /* CONFIG_VFIO_PCI */ + +/* + * Interfaces for IBM EEH (Enhanced Error Handling) + */ +static bool vfio_eeh_container_ok(VFIOLegacyContainer *container) +{ + /* + * As of 2016-03-04 (linux-4.5) the host kernel EEH/VFIO + * implementation is broken if there are multiple groups in a + * container. The hardware works in units of Partitionable + * Endpoints (=3D=3D IOMMU groups) and the EEH operations naively + * iterate across all groups in the container, without any logic + * to make sure the groups have their state synchronized. For + * certain operations (ENABLE) that might be ok, until an error + * occurs, but for others (GET_STATE) it's clearly broken. + */ + + /* + * XXX Once fixed kernels exist, test for them here + */ + + if (QLIST_EMPTY(&container->group_list)) { + return false; + } + + if (QLIST_NEXT(QLIST_FIRST(&container->group_list), container_next)) { + return false; + } + + return true; +} + +static int vfio_eeh_container_op(VFIOLegacyContainer *container, uint32_t = op) +{ + struct vfio_eeh_pe_op pe_op =3D { + .argsz =3D sizeof(pe_op), + .op =3D op, + }; + int ret; + + if (!vfio_eeh_container_ok(container)) { + error_report("vfio/eeh: EEH_PE_OP 0x%x: " + "kernel requires a container with exactly one group",= op); + return -EPERM; + } + + ret =3D ioctl(container->fd, VFIO_EEH_PE_OP, &pe_op); + if (ret < 0) { + error_report("vfio/eeh: EEH_PE_OP 0x%x failed: %m", op); + return -errno; + } + + return ret; +} + +static VFIOLegacyContainer *vfio_eeh_as_container(AddressSpace *as) +{ + VFIOAddressSpace *space =3D vfio_address_space_get(as); + VFIOContainer *bcontainer =3D NULL; + + if (QLIST_EMPTY(&space->containers)) { + /* No containers to act on */ + goto out; + } + + bcontainer =3D QLIST_FIRST(&space->containers); + + if (QLIST_NEXT(bcontainer, next)) { + /* + * We don't yet have logic to synchronize EEH state across + * multiple containers + */ + bcontainer =3D NULL; + goto out; + } + +out: + vfio_address_space_put(space); + return VFIO_IOMMU_LEGACY(bcontainer); +} + +static bool vfio_eeh_as_ok(AddressSpace *as) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); + + return (container !=3D NULL) && vfio_eeh_container_ok(container); +} + +static int vfio_eeh_as_op(AddressSpace *as, uint32_t op) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); + + if (!container) { + return -ENODEV; + } + return vfio_eeh_container_op(container, op); +} + +bool spapr_phb_eeh_available(SpaprPhbState *sphb) +{ + return vfio_eeh_as_ok(&sphb->iommu_as); +} + +void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb) +{ + vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE); +} + + +static void spapr_eeh_pci_find_device(PCIBus *bus, PCIDevice *pdev, + void *opaque) +{ + bool *found =3D opaque; + + if (object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { + *found =3D true; + } +} + +int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, + unsigned int addr, int option) +{ + uint32_t op; + int ret; + + switch (option) { + case RTAS_EEH_DISABLE: + op =3D VFIO_EEH_PE_DISABLE; + break; + case RTAS_EEH_ENABLE: { + PCIHostState *phb; + bool found =3D false; + + /* + * The EEH functionality is enabled per sphb level instead of + * per PCI device. We have already identified this specific sphb + * based on buid passed as argument to ibm,set-eeh-option rtas + * call. Now we just need to check the validity of the PCI + * pass-through devices (vfio-pci) under this sphb bus. + * We have already validated that all the devices under this sphb + * are from same iommu group (within same PE) before coming here. + * + * Prior to linux commit 98ba956f6a389 ("powerpc/pseries/eeh: + * Rework device EEH PE determination") kernel would call + * eeh-set-option for each device in the PE using the device's + * config_address as the argument rather than the PE address. + * Hence if we check validity of supplied config_addr whether + * it matches to this PHB will cause issues with older kernel + * versions v5.9 and older. If we return an error from + * eeh-set-option when the argument isn't a valid PE address + * then older kernels (v5.9 and older) will interpret that as + * EEH not being supported. + */ + phb =3D PCI_HOST_BRIDGE(sphb); + pci_for_each_device(phb->bus, (addr >> 16) & 0xFF, + spapr_eeh_pci_find_device, &found); + + if (!found) { + return RTAS_OUT_PARAM_ERROR; + } + + op =3D VFIO_EEH_PE_ENABLE; + break; + } + case RTAS_EEH_THAW_IO: + op =3D VFIO_EEH_PE_UNFREEZE_IO; + break; + case RTAS_EEH_THAW_DMA: + op =3D VFIO_EEH_PE_UNFREEZE_DMA; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); + if (ret < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + +int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) +{ + int ret; + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_GET_STATE); + if (ret < 0) { + return RTAS_OUT_PARAM_ERROR; + } + + *state =3D ret; + return RTAS_OUT_SUCCESS; +} + +static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus, + PCIDevice *pdev, + void *opaque) +{ + /* Check if the device is VFIO PCI device */ + if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { + return; + } + + /* + * The MSIx table will be cleaned out by reset. We need + * disable it so that it can be reenabled properly. Also, + * the cached MSIx table should be cleared as it's not + * reflecting the contents in hardware. + */ + if (msix_enabled(pdev)) { + uint16_t flags; + + flags =3D pci_host_config_read_common(pdev, + pdev->msix_cap + PCI_MSIX_FLAG= S, + pci_config_size(pdev), 2); + flags &=3D ~PCI_MSIX_FLAGS_ENABLE; + pci_host_config_write_common(pdev, + pdev->msix_cap + PCI_MSIX_FLAGS, + pci_config_size(pdev), flags, 2); + } + + msix_reset(pdev); +} + +static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque) +{ + pci_for_each_device_under_bus(bus, spapr_phb_vfio_eeh_clear_dev_msi= x, + NULL); +} + +static void spapr_phb_vfio_eeh_pre_reset(SpaprPhbState *sphb) +{ + PCIHostState *phb =3D PCI_HOST_BRIDGE(sphb); + + pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL); +} + +int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) +{ + uint32_t op; + int ret; + + switch (option) { + case RTAS_SLOT_RESET_DEACTIVATE: + op =3D VFIO_EEH_PE_RESET_DEACTIVATE; + break; + case RTAS_SLOT_RESET_HOT: + spapr_phb_vfio_eeh_pre_reset(sphb); + op =3D VFIO_EEH_PE_RESET_HOT; + break; + case RTAS_SLOT_RESET_FUNDAMENTAL: + spapr_phb_vfio_eeh_pre_reset(sphb); + op =3D VFIO_EEH_PE_RESET_FUNDAMENTAL; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); + if (ret < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + +int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) +{ + int ret; + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_CONFIGURE); + if (ret < 0) { + return RTAS_OUT_PARAM_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, + uint32_t func, uint64_t addr, + uint64_t mask, uint32_t type) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(&sphb->iommu_= as); + struct vfio_eeh_pe_op op =3D { + .op =3D VFIO_EEH_PE_INJECT_ERR, + .argsz =3D sizeof(op), + }; + + /* Set error type, address, and mask */ + op.err.type =3D type; + op.err.addr =3D addr; + op.err.mask =3D mask; + + /* Validate and set function code */ + switch (func) { + case EEH_ERR_FUNC_LD_MEM_ADDR: + case EEH_ERR_FUNC_LD_MEM_DATA: + case EEH_ERR_FUNC_LD_IO_ADDR: + case EEH_ERR_FUNC_LD_IO_DATA: + case EEH_ERR_FUNC_LD_CFG_ADDR: + case EEH_ERR_FUNC_LD_CFG_DATA: + case EEH_ERR_FUNC_ST_MEM_ADDR: + case EEH_ERR_FUNC_ST_MEM_DATA: + case EEH_ERR_FUNC_ST_IO_ADDR: + case EEH_ERR_FUNC_ST_IO_DATA: + case EEH_ERR_FUNC_ST_CFG_ADDR: + case EEH_ERR_FUNC_ST_CFG_DATA: + case EEH_ERR_FUNC_DMA_RD_ADDR: + case EEH_ERR_FUNC_DMA_RD_DATA: + case EEH_ERR_FUNC_DMA_RD_MASTER: + case EEH_ERR_FUNC_DMA_RD_TARGET: + case EEH_ERR_FUNC_DMA_WR_ADDR: + case EEH_ERR_FUNC_DMA_WR_DATA: + case EEH_ERR_FUNC_DMA_WR_MASTER: + op.err.func =3D func; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + /* Perform the ioctl to inject the error */ + if (ioctl(container->fd, VFIO_EEH_PE_OP, &op) < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 417d1f6c31..d2bc90a3d2 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -116,49 +116,7 @@ void spapr_phb_remove_pci_device_cb(DeviceState *dev); int spapr_pci_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, void *fdt, int *fdt_start_offset, Error **errp); =20 -/* VFIO EEH hooks */ -#ifdef CONFIG_LINUX -bool spapr_phb_eeh_available(SpaprPhbState *sphb); -int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int option); -int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state); -int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); -int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); -void spapr_phb_vfio_reset(DeviceState *qdev); -int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, - uint64_t addr, uint64_t mask, uint32_t type); -#else -static inline bool spapr_phb_eeh_available(SpaprPhbState *sphb) -{ - return false; -} -static inline int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int opt= ion) -{ - return RTAS_OUT_HW_ERROR; -} -static inline int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, - int *state) -{ - return RTAS_OUT_HW_ERROR; -} -static inline int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) -{ - return RTAS_OUT_HW_ERROR; -} -static inline int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) -{ - return RTAS_OUT_HW_ERROR; -} -static inline void spapr_phb_vfio_reset(DeviceState *qdev) -{ -} -static inline int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t fu= nc, - uint64_t addr, uint64_t mask, uint32_t = type) -{ - return RTAS_OUT_HW_ERROR; -} -#endif +/* VFIO EEH hooks - see hw/ppc/spapr_vfio.h for declarations */ =20 void spapr_phb_dma_reset(SpaprPhbState *sphb); =20 diff --git a/include/hw/ppc/spapr_vfio.h b/include/hw/ppc/spapr_vfio.h new file mode 100644 index 0000000000..ab8b5f8527 --- /dev/null +++ b/include/hw/ppc/spapr_vfio.h @@ -0,0 +1,28 @@ +/* + * sPAPR VFIO EEH Header + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_PPC_SPAPR_VFIO_H +#define HW_PPC_SPAPR_VFIO_H + +/* + * Forward declarations to avoid pulling in full spapr headers + * This allows stubs and other files to compile without libfdt dependencies + */ +typedef struct SpaprPhbState SpaprPhbState; +typedef struct DeviceState DeviceState; + +/* VFIO EEH function declarations */ +bool spapr_phb_eeh_available(SpaprPhbState *sphb); +int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, + unsigned int addr, int option); +int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state); +int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); +int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); +void spapr_phb_vfio_reset(DeviceState *qdev); +void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb); +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, + uint64_t addr, uint64_t mask, uint32_t type); + +#endif /* HW_PPC_SPAPR_VFIO_H */ diff --git a/stubs/meson.build b/stubs/meson.build index 3b2f2680b1..2879d6f70e 100644 --- a/stubs/meson.build +++ b/stubs/meson.build @@ -90,6 +90,7 @@ if have_system stub_ss.add(files('hmp-cmd-info_tlb.c')) stub_ss.add(files('hmp-cmds-hw-s390x.c')) stub_ss.add(files('hmp-cmds-target-i386.c')) + stub_ss.add(files('spapr_phb_vfio-stubs.c')) endif =20 if have_system or have_user diff --git a/stubs/spapr_phb_vfio-stubs.c b/stubs/spapr_phb_vfio-stubs.c new file mode 100644 index 0000000000..ba043bcaf4 --- /dev/null +++ b/stubs/spapr_phb_vfio-stubs.c @@ -0,0 +1,52 @@ +/* + * Stubs for sPAPR PCI VFIO EEH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "hw/ppc/spapr_vfio.h" + +/* RTAS return codes */ +#define RTAS_OUT_NOT_SUPPORTED (-3) + + +bool spapr_phb_eeh_available(SpaprPhbState *sphb) +{ + return false; +} + +int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, + unsigned int addr, int option) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +void spapr_phb_vfio_reset(DeviceState *qdev) +{ +} + +void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb) +{ +} + +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, + uint64_t addr, uint64_t mask, uint32_t type) +{ + return RTAS_OUT_NOT_SUPPORTED; +} --=20 2.54.0 From nobody Sat May 30 17:43:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779276594; cv=none; d=zohomail.com; s=zohoarc; b=hacMBZiC8cKZa0NQv+QoCFNBiu0PljcAs32N3CBtj4j1SNKUHLAXu02LR9DvOlDfqadmgb3ZlP2ckzYtyEOlHvvhZzmCfISF85zTxdYw1ZBRKuoAFOuZ3KsCha3Qe2MZEPXdtQHNWb+gGT5YY2r543+tENnul9geGrOoD3eWXA4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779276594; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fLZtxzPiE//1Grmg/9b6/lfDSHW7DBwxC8JordvpkLM=; b=RqyBN4ZNSLXsEO2SVPH9Xahg46qBDRyxWBSQJgz8QZPxxpxrjfH63PhB+iK90U1+U0ESoArPLMGBcX5jopwArN6AFlk/R40mgdkPt3zliCb/dlgFv1QhW5cxdEn+9i/4X0qL7KR9BrEi4ssnMzjkULPM2mniqAjMM1SwdAESNJY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779276594590635.6916389265368; Wed, 20 May 2026 04:29:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPf7V-0005A3-Ug; Wed, 20 May 2026 07:29:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPf7Q-000516-Nb; Wed, 20 May 2026 07:29:44 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPf7O-0004fh-Sf; Wed, 20 May 2026 07:29:44 -0400 Received: from pps.filterd (m0360083.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64JLiE6S552016; Wed, 20 May 2026 09:55:19 GMT Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h9y1fpj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:19 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64K9s6gh004432; Wed, 20 May 2026 09:55:18 GMT Received: from smtprelay07.fra02v.mail.ibm.com ([9.218.2.229]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 4e754geja3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 May 2026 09:55:18 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64K9tFlE41943486 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 20 May 2026 09:55:15 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0B0A120043; Wed, 20 May 2026 09:55:15 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CC84E20040; Wed, 20 May 2026 09:55:12 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 20 May 2026 09:55:12 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=fLZtxzPiE//1Grmg/ 9b6/lfDSHW7DBwxC8JordvpkLM=; b=OmsmAHX1x4whNGXUWG5bptoffrJIRsd79 PFyjRgQJ2bhubbtyKzv7xF9laC0pyzZurCim7HS0HufA1YfqtTt1HjXVnoRdn+po pXbK0BEi7SDxEkwxe8B4bopo0/aJZ981O2XPCBfzUeWX7ots+iINOPJfylrkf44C /9zx0qqcXm28U4XWhB/9eJMaRUhogIgTLKoipOnoMpbszkL3o+z+Im2MQE6Ecmcb 7dgv/hUe1PIByroKNhSOa544mdYXY1uxtTpBxUKnZ2A0h3POo/va5rn83Ca3tFIF 3KxALiU3pCachxSXVHHcvwbBC9Qv2Gu06OHBLs7V4ocQjopTba2fQ== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v3 6/6] MAINTAINERS: Add entry for sPAPR PCI VFIO EEH support Date: Wed, 20 May 2026 15:24:46 +0530 Message-ID: <20260520095446.64206-7-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520095446.64206-1-nnmlinux@linux.ibm.com> References: <20260520095446.64206-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDA5MiBTYWx0ZWRfX57wHYTpLb0EU UGttwwp/U4SoKcLqi8sjx11cxnVW8vE5tb2rpTXdnsYXOP80OGJNG6mcDZjszUx3wTe9CMcgyph LQvPVeHadUcSrueaNm/LU8RW3Uy3hnp2xOsPNlb1pnvsvv0riMtjKjNREBsur202PIrKxhhPXdd EOAAWXNBUuuVBBVHGLtIrDO8t7NIjyoQRdPC1wQU/WEqSuG48ooR0r7fNkZ+YNUSTz8b2xq/A/x XPAunzIc//Q7nOQiOZLQhyl9pedBIdOQ+WxT3p5n5wgWk+si9zFEzHkAMD20Za9+Q6dCjYc0r/f bBEKnNZqf/tEJagM01Q61n/x8p1RAHFdyt+hsXis4CYO2n27PtZiD/qhVjXWe/e+CRVkMpfo/8x TmQpKjJy2tRhO8MBmwt/DFnwlBSAS611lL5nTptBr16FPesZ3Yqdf91eO2NOj7dEfG/5Kk+GDq6 TlQFHR28minZEZsREIw== X-Authority-Analysis: v=2.4 cv=BNuDalQG c=1 sm=1 tr=0 ts=6a0d8507 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=VnNF1IyMAAAA:8 a=69wJf7TsAAAA:8 a=pGLkceISAAAA:8 a=VcH14TYERV92i4gI124A:9 a=Fg1AiH1G6rFz08G2ETeA:22 X-Proofpoint-ORIG-GUID: vMORU3o3Yya-1QWTay3gV7ak3bFQNsFW X-Proofpoint-GUID: cJxZ9t-gQKZcPQmdpr4nUZo02Y9Mj7lY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200092 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779276595366158500 Content-Type: text/plain; charset="utf-8" Add a dedicated MAINTAINERS entry for hw/ppc/spapr_pci_vfio_eeh.c, which implements Extended Error Handling (EEH) support for VFIO-based PCI devices on PowerPC sPAPR platforms. EEH provides error detection, isolation, and recovery mechanisms for PCI devices, allowing the system to handle and recover from hardware errors without requiring a full system reboot. Signed-off-by: Narayana Murty N --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9d3d645953..03a638cab1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1656,6 +1656,12 @@ F: tests/functional/ppc64/test_pseries.py F: tests/functional/ppc64/test_hv.py F: tests/functional/ppc64/test_tuxrun.py =20 +sPAPR PCI VFIO Extended Error handling (EEH) +M: Narayana Murty +L: qemu-ppc@nongnu.org +S: Maintained +F: hw/ppc/spapr_pci_vfio_eeh.c + PowerNV (Non-Virtualized) M: Nicholas Piggin R: Aditya Gupta --=20 2.54.0