From nobody Sat May 30 18:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779186911; cv=none; d=zohomail.com; s=zohoarc; b=WyhqRru2ZoNr3Il10CaIKh0V+vpXb+1qvSlu1cvE//QAGQ7PDt8n8dLLo6gBUrTs9wXbW2FHvHcK1a/FUB43ljGPD0Um9qdfWVdB6B2Ij6T8QSC1fxF/J52o8D+mpo9nKImnRLGGtHpyv+IrDHCG6OetttV27Zga7RNoNZdSEFk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779186911; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=wyMUXuVoe5YB9/GolFFQ9m0XvZYCncQp31ovl4uyYoY=; b=aEhlCvRneJ9eXfXg6A4uZhmNxxmYUeY39J547jjL00bMInzaBaXbuyP3qaJ0rDBdIYvhnhmnGtNtVzgV66MorXa56sCfe2ogGL49H41NMW7pujSXwOYEr/8fxuo0Y3EXycWmCUpW/S/P1RtUVI1nj0rrFtvNN3R6uO6jha5RvK4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779186911638898.0511052480705; Tue, 19 May 2026 03:35:11 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPHls-0001nK-O8; Tue, 19 May 2026 06:33:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlp-0001ks-L6; Tue, 19 May 2026 06:33:54 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHln-0004xE-JK; Tue, 19 May 2026 06:33:53 -0400 Received: from pps.filterd (m0356516.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64IJP3Ep160368; Tue, 19 May 2026 10:33:50 GMT Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6hb8brcr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:49 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64JAO6Ta022428; Tue, 19 May 2026 10:33:48 GMT Received: from smtprelay06.fra02v.mail.ibm.com ([9.218.2.230]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 4e754g9w4n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:48 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay06.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64JAXjXi25821682 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 May 2026 10:33:45 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2B3CD20043; Tue, 19 May 2026 10:33:45 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C7E9B20040; Tue, 19 May 2026 10:33:42 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 19 May 2026 10:33:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=wyMUXuVoe5YB9/Gol FFQ9m0XvZYCncQp31ovl4uyYoY=; b=PwN6GLt0vm3NptC86BDNdv17I9HRGyb6u xHOulL145y1bNkqv/ookHuQ5MqUYcxssmVzdtq04Y9Q/LwgD600w9NG5vAF+YK3c Cnt0Ymm6YI+hdMKaBzCw+Bsm5cqR4v9WfNRR2+BPCUSrY7uBfM9Qt70HmN5Zg6nl sTwSQjU9aEv/TAAVfG9bIXnVYFEzXXVCRaiy233oabKv3sRLDOtpcGzX5AW6pQgh WWmAxrZ0vtqvFghfPDWffnB3JpOtHZI21cU3QrGlto7DyqGSgQQZ6uYLYkHrMC37 2VNSIbnat3fFR9+O0fmIgi1SXJOEjcMh3VzDIOybQ5OqYodJ5fABg== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v2 1/6] ppc/spapr: Add VFIO EEH error injection backend Date: Tue, 19 May 2026 16:03:19 +0530 Message-ID: <20260519103325.8056-2-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260519103325.8056-1-nnmlinux@linux.ibm.com> References: <20260519103325.8056-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDA5OSBTYWx0ZWRfX15Bw1YETmHoq S5eT6D9QZKIEvNSlrEfYp7LakfFL9efI3Owg0fibwtJzaAxohOHEGY666cesD7eJtJXsOjJOJJw rgt5nvZCyvpt/Z31iJi9eGhdFRFD9oU9nUhYMVWtcWZkwmZl94WC8Nf0tLy4vX592B8I3X8bZ0b S4uLJY4GhW5X/ffSGKADGYrGH5947A7wTEKwamAnM8bYo9IUwmBSuO1CEPnfiQhOuBGKA9lCxc4 cJdN+Ue9PuJRBx2kpEMAOKj2ssiC/rBmz2eCCtuaTQN92RW4Rr8MJU6kUvFJYqGigpmu9smG+zk xCwediRd+8yaV4oMsbECua8aceKT5tcUi0qIFeHL+uxpQkLbGkG8pj/kZeS9jL9mQ7e5qzRB1s+ N65cvCNppBp0C/1LQlxkjywE/MkH2xBeCH1HvtHMSSf7s2c4jH83idA1Qbe/fIo64ZwEpOnPWeY 8gG2niZbXEv5ZvJ4G6Q== X-Proofpoint-GUID: xZlQSnsHC3XMrPQS3G9kIyxYvOujJ7-X X-Proofpoint-ORIG-GUID: a1V6TQwWLFVreVpHIqIVvDjbrH7tm_Ik X-Authority-Analysis: v=2.4 cv=aYBRWxot c=1 sm=1 tr=0 ts=6a0c3c8d cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=VnNF1IyMAAAA:8 a=qkVa7TRde7xkgx6zoNMA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 phishscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190099 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=nnmlinux@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779186913116154100 Content-Type: text/plain; charset="utf-8" Introduce 'spapr_phb_vfio_errinjct()' to inject PCI PHB error events via the VFIO passthrough backend. This function translates RTAS error injection parameters into VFIO EEH injection commands suitable for hardware emulation. The patch adds: - A minimal 'enum rtas_err_type' for error types used in VFIO path - EEH function code macros ('EEH_ERR_FUNC_...') - Backend stub and integration into 'spapr_pci_vfio.c' - Necessary header declarations for interfacing This forms the foundational layer for PCI error injection testing using VFIO passthrough devices on pseries guests. Signed-off-by: Narayana Murty N --- hw/ppc/spapr_pci_vfio.c | 53 +++++++++++++++++++++++++++++++++++++ include/hw/pci-host/spapr.h | 7 +++++ include/hw/ppc/spapr.h | 44 ++++++++++++++++++++++++++++++ 3 files changed, 104 insertions(+) diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index a748a0bf4c..ed0b22a84a 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -317,6 +317,55 @@ int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) return RTAS_OUT_SUCCESS; } =20 +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, + uint32_t func, uint64_t addr, + uint64_t mask, uint32_t type) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(&sphb->iommu_= as); + struct vfio_eeh_pe_op op =3D { + .op =3D VFIO_EEH_PE_INJECT_ERR, + .argsz =3D sizeof(op), + }; + + /* Set error type, address, and mask */ + op.err.type =3D type; + op.err.addr =3D addr; + op.err.mask =3D mask; + + /* Validate and set function code */ + switch (func) { + case EEH_ERR_FUNC_LD_MEM_ADDR: + case EEH_ERR_FUNC_LD_MEM_DATA: + case EEH_ERR_FUNC_LD_IO_ADDR: + case EEH_ERR_FUNC_LD_IO_DATA: + case EEH_ERR_FUNC_LD_CFG_ADDR: + case EEH_ERR_FUNC_LD_CFG_DATA: + case EEH_ERR_FUNC_ST_MEM_ADDR: + case EEH_ERR_FUNC_ST_MEM_DATA: + case EEH_ERR_FUNC_ST_IO_ADDR: + case EEH_ERR_FUNC_ST_IO_DATA: + case EEH_ERR_FUNC_ST_CFG_ADDR: + case EEH_ERR_FUNC_ST_CFG_DATA: + case EEH_ERR_FUNC_DMA_RD_ADDR: + case EEH_ERR_FUNC_DMA_RD_DATA: + case EEH_ERR_FUNC_DMA_RD_MASTER: + case EEH_ERR_FUNC_DMA_RD_TARGET: + case EEH_ERR_FUNC_DMA_WR_ADDR: + case EEH_ERR_FUNC_DMA_WR_DATA: + case EEH_ERR_FUNC_DMA_WR_MASTER: + op.err.func =3D func; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + /* Perform the ioctl to inject the error */ + if (ioctl(container->fd, VFIO_EEH_PE_OP, &op) < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} #else =20 bool spapr_phb_eeh_available(SpaprPhbState *sphb) @@ -349,4 +398,8 @@ int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) return RTAS_OUT_NOT_SUPPORTED; } =20 +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, int option) +{ + return RTAS_OUT_NOT_SUPPORTED; +} #endif /* CONFIG_VFIO_PCI */ diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 0db87f1281..417d1f6c31 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -125,6 +125,8 @@ int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, i= nt *state); int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); void spapr_phb_vfio_reset(DeviceState *qdev); +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, + uint64_t addr, uint64_t mask, uint32_t type); #else static inline bool spapr_phb_eeh_available(SpaprPhbState *sphb) { @@ -151,6 +153,11 @@ static inline int spapr_phb_vfio_eeh_configure(SpaprPh= bState *sphb) static inline void spapr_phb_vfio_reset(DeviceState *qdev) { } +static inline int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t fu= nc, + uint64_t addr, uint64_t mask, uint32_t = type) +{ + return RTAS_OUT_HW_ERROR; +} #endif =20 void spapr_phb_dma_reset(SpaprPhbState *sphb); diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 9acda15d4f..fadb7cf7d9 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -682,6 +682,50 @@ void push_sregs_to_kvm_pr(SpaprMachineState *spapr); #define RTAS_EEH_PE_UNAVAIL_INFO 1000 #define RTAS_EEH_PE_RECOVER_INFO 0 =20 +/* EEH error types and functions */ +#define EEH_ERR_FUNC_MIN 0 +#define EEH_ERR_FUNC_LD_MEM_ADDR 0 /* Memory load */ +#define EEH_ERR_FUNC_LD_MEM_DATA 1 +#define EEH_ERR_FUNC_LD_IO_ADDR 2 /* IO load */ +#define EEH_ERR_FUNC_LD_IO_DATA 3 +#define EEH_ERR_FUNC_LD_CFG_ADDR 4 /* Config load */ +#define EEH_ERR_FUNC_LD_CFG_DATA 5 +#define EEH_ERR_FUNC_ST_MEM_ADDR 6 /* Memory store */ +#define EEH_ERR_FUNC_ST_MEM_DATA 7 +#define EEH_ERR_FUNC_ST_IO_ADDR 8 /* IO store */ +#define EEH_ERR_FUNC_ST_IO_DATA 9 +#define EEH_ERR_FUNC_ST_CFG_ADDR 10 /* Config store */ +#define EEH_ERR_FUNC_ST_CFG_DATA 11 +#define EEH_ERR_FUNC_DMA_RD_ADDR 12 /* DMA read */ +#define EEH_ERR_FUNC_DMA_RD_DATA 13 +#define EEH_ERR_FUNC_DMA_RD_MASTER 14 +#define EEH_ERR_FUNC_DMA_RD_TARGET 15 +#define EEH_ERR_FUNC_DMA_WR_ADDR 16 /* DMA write */ +#define EEH_ERR_FUNC_DMA_WR_DATA 17 +#define EEH_ERR_FUNC_DMA_WR_MASTER 18 +#define EEH_ERR_FUNC_DMA_WR_TARGET 19 +#define EEH_ERR_FUNC_MAX EEH_ERR_FUNC_DMA_WR_TARGET + +/* RTAS PCI Error Injection Token Types */ +enum rtas_err_type { + RTAS_ERR_TYPE_FATAL =3D 0x1, + RTAS_ERR_TYPE_RECOVERED_RANDOM_EVENT =3D 0x2, + RTAS_ERR_TYPE_RECOVERED_SPECIAL_EVENT =3D 0x3, + RTAS_ERR_TYPE_CORRUPTED_PAGE =3D 0x4, + RTAS_ERR_TYPE_CORRUPTED_SLB =3D 0x5, + RTAS_ERR_TYPE_TRANSLATOR_FAILURE =3D 0x6, + RTAS_ERR_TYPE_IOA_BUS_ERROR =3D 0x7, + RTAS_ERR_TYPE_PLATFORM_SPECIFIC =3D 0x8, + RTAS_ERR_TYPE_CORRUPTED_DCACHE_START =3D 0x9, + RTAS_ERR_TYPE_CORRUPTED_DCACHE_END =3D 0xA, + RTAS_ERR_TYPE_CORRUPTED_ICACHE_START =3D 0xB, + RTAS_ERR_TYPE_CORRUPTED_ICACHE_END =3D 0xC, + RTAS_ERR_TYPE_CORRUPTED_TLB_START =3D 0xD, + RTAS_ERR_TYPE_CORRUPTED_TLB_END =3D 0xE, + RTAS_ERR_TYPE_IOA_BUS_ERROR_64 =3D 0xF, + RTAS_ERR_TYPE_UPSTREAM_IO_ERROR =3D 0x10 +}; + /* ibm,set-slot-reset */ #define RTAS_SLOT_RESET_DEACTIVATE 0 #define RTAS_SLOT_RESET_HOT 1 --=20 2.54.0 From nobody Sat May 30 18:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779186876; cv=none; d=zohomail.com; s=zohoarc; b=V2Oveu86hP8Z5eExm4jRW8HDjcw/EA5XYxdf2sOnChDCp+EUoTW0fPLCqulEAg+fRXNhncl4keBUZQunnEYN1j68gqPmPCVVJ1h+4NTOPeqFXxyMX/Xcnv7b+XLcLpn1mXC2AyRwJNOtxf0B0k1cp9hKQmvCm18uJeVgFRdOe6w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779186876; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=wKHK1qFn7LvxLFbfm/QQMufczV2QVHsm81ygBpG9oc0=; b=k27ZK9hqIoNGRoVsPI+dJVj5I64ZmoykeRCiuFqFZNLdgnJMjos8V5q55eLdGXGerHjA0bX4AL39oimIEQwTSQQj5woEIytsrycQSjQi0bXk7U1kwQSVdGE+Y4Iq2DwFp0alAvuw522ORmsyfPaBtFQwSraVNJoqgSybcv8vG7E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779186876614753.5712583551714; Tue, 19 May 2026 03:34:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPHlw-0001np-7R; Tue, 19 May 2026 06:34:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlu-0001nS-5G; Tue, 19 May 2026 06:33:58 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlr-0004ze-V7; Tue, 19 May 2026 06:33:57 -0400 Received: from pps.filterd (m0356517.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64J5iN7x793884; Tue, 19 May 2026 10:33:53 GMT Received: from ppma11.dal12v.mail.ibm.com (db.9e.1632.ip4.static.sl-reverse.com [50.22.158.219]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h74veq0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:52 +0000 (GMT) Received: from pps.filterd (ppma11.dal12v.mail.ibm.com [127.0.0.1]) by ppma11.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64JAOB90027415; Tue, 19 May 2026 10:33:51 GMT Received: from smtprelay01.fra02v.mail.ibm.com ([9.218.2.227]) by ppma11.dal12v.mail.ibm.com (PPS) with ESMTPS id 4e75ky1tyb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:51 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay01.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64JAXlBM62062926 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 May 2026 10:33:48 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DB79820043; Tue, 19 May 2026 10:33:47 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7AD9720040; Tue, 19 May 2026 10:33:45 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 19 May 2026 10:33:45 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=wKHK1qFn7LvxLFbfm /QQMufczV2QVHsm81ygBpG9oc0=; b=fCXYoKnNWKBGXX32Pck9yNqBOcj1YgHp6 Oq/eulwxagWg2LHe7yMq5JeLNyCVyiqlfVFiEndeI2EjtWuJ04Q+7O6Yg3kISUP+ IEFZu5l4ewYcHLFWRMGVqVZ2ac3QVkUYyDp1Ffqck+DXWRsLrzLifVtQiQdyHuhz xA3atnPIWmM6UaTtyGk/UCMFKJRxNlxJsn4hXvynALVxHsWgL5GqlLIXeEt1lP0n CJWe21Twfntkh6Fw7kVPFXlveY5Mb7JROB7PnVwsDZti1Y5L2wiifDrti5AdXP23 LRP/7VPBNwhJGpqLTXRjtun3au5g8LW6QlBtIj190vMv936EQCOpg== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v2 2/6] ppc/spapr: Add ibm,errinjct RTAS call handler Date: Tue, 19 May 2026 16:03:20 +0530 Message-ID: <20260519103325.8056-3-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260519103325.8056-1-nnmlinux@linux.ibm.com> References: <20260519103325.8056-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=ffCdDUQF c=1 sm=1 tr=0 ts=6a0c3c90 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=_MNm8bNPt0bhIkh_LCUA:9 X-Proofpoint-ORIG-GUID: UAW4qbT7GrcQUvMXNT8u5yg4QZIE-oQH X-Proofpoint-GUID: 7da3HtDJBl-ye1a-2tP4tfO0V1fmT3QE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDA5OSBTYWx0ZWRfX8pc/e9OrueLH ZUhQs9Dwp6ZMxFLUfujjocGJPbCFAQWVLQ/xhwZjWseAG+hIkZBb5g5RG+D9fvOOz8LFL6tmhyi NZm2eIoVS2Rg6Kt+4dRzBu0y+Gj43ToqFUFAudwA2oyQmIqd/uSbJWrQ8/fLGJbT/IoTlyIIVjb Kk+xeG66n3H1AtgfXQ9Hseso9s1CXPQjHWevyIxzorLsU8AuZAy2ksl6y1KqasBdTEpCSpYUxMM 5MYPH9BwzTTEr2clfDq7iqDAdQL7KaoDV5rhrPL+9BSHbzOmHU6ybc3MURf4zPO+sT6XTfOlR7v Vv//pgeH1/UWrVerw/FOl0bKZOjg1PgHVTCel13gIlcDJ0D5BNcM8RatBwhey+Ws57Z9numgEwm eApaqIdLMhNAuUWVh/tuJhaLBAE4eNKgS6RygAxmq3xeiA3EcB+sDclCFGiPU7eMOTbkBHYkgTO pk833UANM6rL13OCjOg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 suspectscore=0 adultscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190099 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779186878644154100 Content-Type: text/plain; charset="utf-8" Implements the 'ibm,errinjct' RTAS call for PHB-level PCI error injection via firmware. This handler decodes the RTAS parameter buffer, validates arguments, and delegates the injection to the backend. The patch includes: - 'rtas_ibm_errinjct()' handler implementation - Registration of 'RTAS_IBM_ERRINJCT' token - RTAS error codes for result reporting - Helper macros used exclusively in RTAS code path Enables guest-initiated error injection for improved test coverage and diagnostics in EEH emulation flows. Signed-off-by: Narayana Murty N --- hw/ppc/spapr_pci.c | 153 +++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 6 +- 2 files changed, 158 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index c1d4b7806e..82de04186e 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -704,6 +704,156 @@ param_error_exit: rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); } =20 +static int parse_and_verify_recovered_special_event(target_ulong param_buf, + uint64_t *addr) { + uint32_t mode =3D rtas_ld(param_buf, 0); + if (mode !=3D EEH_ERR_EVENT_MODE_MIN && mode !=3D EEH_ERR_EVENT_MODE_M= AX) { + return RTAS_OUT_PARAM_ERROR; + } + *addr =3D ((uint64_t)mode) << 32; + qemu_log("RTAS: recovered-special-event: mode=3D%u\n", mode); + return RTAS_OUT_SUCCESS; +} + +static int parse_and_verify_corrupted_page(target_ulong param_buf, + uint64_t *addr) { + *addr =3D ((uint64_t)rtas_ld(param_buf, 0) << 32) | rtas_ld(param_buf,= 1); + qemu_log("RTAS: corrupted-page: addr=3D0x%lx\n", *addr); + return (*addr) ? RTAS_OUT_SUCCESS : RTAS_OUT_PARAM_ERROR; +} + +static int parse_and_verify_ioa_bus_error(target_ulong param_buf, + bool is_64bit, + uint64_t *addr, uint64_t *mask, + uint64_t *buid, uint32_t *func) +{ + if (is_64bit) { + *addr =3D ((uint64_t)rtas_ld(param_buf, 0) << 32) | rtas_ld(param_= buf, 1); + *mask =3D ((uint64_t)rtas_ld(param_buf, 2) << 32) | rtas_ld(param_= buf, 3); + *buid =3D ((uint64_t)rtas_ld(param_buf, 5) << 32) | rtas_ld(param_= buf, 6); + *func =3D rtas_ld(param_buf, 7); + } else { + *addr =3D rtas_ld(param_buf, 0); + *mask =3D rtas_ld(param_buf, 1); + *buid =3D ((uint64_t)rtas_ld(param_buf, 3) << 32) | rtas_ld(param_= buf, 4); + *func =3D rtas_ld(param_buf, 5); + } + + return RTAS_OUT_SUCCESS; +} + +static int parse_and_verify_corrupted_dcache(target_ulong param_buf, + uint64_t *addr) +{ + uint32_t action =3D rtas_ld(param_buf, 0); + uint32_t nature =3D rtas_ld(param_buf, 1); + *addr =3D ((uint64_t)action << 32) | nature; + + return (action <=3D 2 && nature <=3D 2) ? RTAS_OUT_SUCCESS + : RTAS_OUT_PARAM_ERROR; +} + +static int parse_and_verify_corrupted_icache(target_ulong param_buf, + uint64_t *addr) +{ + uint32_t action =3D rtas_ld(param_buf, 0); + uint32_t nature =3D rtas_ld(param_buf, 1); + *addr =3D ((uint64_t)action << 32) | nature; + + return (action <=3D 3 && nature <=3D 2) ? RTAS_OUT_SUCCESS + : RTAS_OUT_PARAM_ERROR; +} + +static int parse_and_verify_corrupted_tlb(target_ulong param_buf, + uint64_t *addr) +{ + uint32_t nature =3D rtas_ld(param_buf, 0); + *addr =3D ((uint64_t)nature << 32); + + return (nature <=3D 2) ? RTAS_OUT_SUCCESS : RTAS_OUT_PARAM_ERROR; +} + +static void rtas_ibm_errinjct(PowerPCCPU *cpu, SpaprMachineState *spapr, + uint32_t token, uint32_t nargs, + target_ulong args, uint32_t nret, + target_ulong rets) +{ + SpaprPhbState *sphb; + target_ulong param_buf; + uint64_t addr =3D 0, mask =3D 0, buid =3D 0; + uint32_t func =3D 0; + uint32_t type, o_token; + int ret =3D -1; + + if ((nargs !=3D 3) || (nret !=3D 1)) { + goto param_error_exit; + } + + type =3D rtas_ld(args, 0); + o_token =3D rtas_ld(args, 1); + param_buf =3D rtas_ld(args, 2); + + if (o_token !=3D spapr->errinjct_token) { + goto param_error_exit; + } + + sphb =3D QLIST_FIRST(&spapr->phbs); + if (!sphb) { + goto param_error_exit; + } + + switch (type) { + case RTAS_ERR_TYPE_IOA_BUS_ERROR: + ret =3D parse_and_verify_ioa_bus_error(param_buf, false, &addr, + &mask, &buid, &func); + break; + case RTAS_ERR_TYPE_IOA_BUS_ERROR_64: + ret =3D parse_and_verify_ioa_bus_error(param_buf, true, &addr, + &mask, &buid, &func); + break; + case RTAS_ERR_TYPE_CORRUPTED_PAGE: + ret =3D parse_and_verify_corrupted_page(param_buf, &addr); + break; + case RTAS_ERR_TYPE_RECOVERED_SPECIAL_EVENT: + ret =3D parse_and_verify_recovered_special_event(param_buf, &addr); + break; + case RTAS_ERR_TYPE_CORRUPTED_DCACHE_START: + case RTAS_ERR_TYPE_CORRUPTED_DCACHE_END: + ret =3D parse_and_verify_corrupted_dcache(param_buf, &addr); + mask =3D 0; + break; + case RTAS_ERR_TYPE_CORRUPTED_ICACHE_START: + case RTAS_ERR_TYPE_CORRUPTED_ICACHE_END: + ret =3D parse_and_verify_corrupted_icache(param_buf, &addr); + mask =3D 0; + break; + case RTAS_ERR_TYPE_CORRUPTED_TLB_START: + case RTAS_ERR_TYPE_CORRUPTED_TLB_END: + ret =3D parse_and_verify_corrupted_tlb(param_buf, &addr); + mask =3D 0; + break; + default: + ret =3D RTAS_OUT_PARAM_ERROR; + break; + } + + if (ret !=3D RTAS_OUT_SUCCESS) { + goto param_error_exit; + } + + ret =3D spapr_phb_vfio_errinjct(sphb, func, addr, mask, type); + if (ret < 0) { + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); + return; + } + + rtas_st(rets, 0, RTAS_OUT_SUCCESS); + return; + +param_error_exit: + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); +} + static void pci_spapr_set_irq(void *opaque, int irq_num, int level) { /* @@ -2380,6 +2530,9 @@ void spapr_pci_rtas_init(void) spapr_rtas_register(RTAS_IBM_SLOT_ERROR_DETAIL, "ibm,slot-error-detail", rtas_ibm_slot_error_detail); + spapr_rtas_register(RTAS_IBM_ERRINJCT, + "ibm,errinjct", + rtas_ibm_errinjct); } =20 static void spapr_pci_register_types(void) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index fadb7cf7d9..512dd038ec 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -706,6 +706,9 @@ void push_sregs_to_kvm_pr(SpaprMachineState *spapr); #define EEH_ERR_FUNC_DMA_WR_TARGET 19 #define EEH_ERR_FUNC_MAX EEH_ERR_FUNC_DMA_WR_TARGET =20 +#define EEH_ERR_EVENT_MODE_MIN 1 +#define EEH_ERR_EVENT_MODE_MAX 2 + /* RTAS PCI Error Injection Token Types */ enum rtas_err_type { RTAS_ERR_TYPE_FATAL =3D 0x1, @@ -808,8 +811,9 @@ enum rtas_err_type { #define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2B) #define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2C) #define RTAS_CONFIGURE_KERNEL_DUMP (RTAS_TOKEN_BASE + 0x2D) +#define RTAS_IBM_ERRINJCT (RTAS_TOKEN_BASE + 0x2E) =20 -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2E) +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2F) =20 /* RTAS ibm,get-system-parameter token values */ #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20 --=20 2.54.0 From nobody Sat May 30 18:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779186906; cv=none; d=zohomail.com; s=zohoarc; b=NxbJ2WEySIXjP1rHuFDTzth2zAjK6J0rRrZuYPnDb8OxntT5KHlPrbMygzhsHPv/NeWHhge4NKSRrlfoq1DjdAwHg9SEhWyUfhrT0xUXkYaLxSz53E3iLhcvAG6OkAECGla9V5IpaO1XkOGoXb5fdROFz4afABlIpWM3wWBwULQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779186906; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FYkrxgvs8FxfNX9idQPHewaspppgsiXg86tr9Po6a8M=; b=Ct9q6M2shWD0xrFZ4bTaStZpTy+oeQZVbhep+bQz5mQha6RbPcaTZZg57PMgYeYXdZb1bWeu9axmCV1Xxz/cjlYpuJZ9JmY6L6tDE4+a2JRCbZ+WBmPij4HR8TdkGzfoxtGVEwY3M/g9zh/hqG/Oujhshg7T/+9rn0zVSKcKxKY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779186906304150.99901010106703; Tue, 19 May 2026 03:35:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPHlz-0001ov-2V; Tue, 19 May 2026 06:34:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlv-0001nf-LW; Tue, 19 May 2026 06:33:59 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlt-00053o-1r; Tue, 19 May 2026 06:33:59 -0400 Received: from pps.filterd (m0356516.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64IMnPff2386827; Tue, 19 May 2026 10:33:55 GMT Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6hb8brda-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:54 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64JAO5Nc022419; Tue, 19 May 2026 10:33:54 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 4e754g9w59-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:53 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64JAXoL113304318 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 May 2026 10:33:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8E9B92004B; Tue, 19 May 2026 10:33:50 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 37B4220040; Tue, 19 May 2026 10:33:48 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 19 May 2026 10:33:48 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=FYkrxgvs8FxfNX9id QPHewaspppgsiXg86tr9Po6a8M=; b=dW/u1R8BvYCtEw8zavNolLAIt2osKQW/Q d4N9oD7kJDyPXxe7c0b0ZHWDjHUr7FWhiaAoQTpsrSCL8/B7RpNDMdVH8i5j6Ym/ 58jC/YoMT5YBXwYfmmwNg8MOMhyKoRbmcpL3OCKQ4R+6zEWGr+NVopHkjI2smrDT qcUZGuekw72WEihlNT0j7aaWL0aRnsw2QHQGPMmtyD9Boo+yoqTfElgYKyfliMek VaYKEkAPFSXpDxfejpP+w0DSzovh7NLCEhWz8CJ6nhtaPCEdV41mWtQ1jJEkSeNw fKh2Xjx5qQcj9qinnCRvBVOPTkh6elBxdWmpsgf50NIQ3RkqJ59hA== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v2 3/6] ppc/spapr: Add support for 'ibm, open-errinjct' and 'ibm, close-errinjct' Date: Tue, 19 May 2026 16:03:21 +0530 Message-ID: <20260519103325.8056-4-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260519103325.8056-1-nnmlinux@linux.ibm.com> References: <20260519103325.8056-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDA5OSBTYWx0ZWRfX+J1Zv6BE9S9e nq9OJX8w6l0ZsBVH2LLNnjaTMlhbB8MPOHJ7Z0op+Hswn+XnhhWG9GPyQ4U+GrEj+cwRN+1I3pg BBeDTZz74EP4+0W0MtJlrLvBXjZmjFeouiqOPApq5WJ4TO0mcN2UBK//areMGzMYBNQ19gOTXWN GaLW0Swj313EwiFTPfgQNPsPFKIAyj28d+QEdLhLnp1vJCktyRwXWjMFPsTOBqpdP5zCPQ9OJzm eJ9gRfZTMxsP7035ovaIZTEeYKtazpx5mfyijXXNTcSed/VdnboiRPDohrJntIFTVzuogMub+I/ qc0c0iQqXmG2vCR9tiS4F4MRbVGsFXcVr3jA+OLvgpgCmjMtkxK99JRSd8Aglh5sGcPLSFQYI38 v1OPgPsJ5cHkeYeaq6RRLPVs2VaPzntNxer5mEBqMZag1m3GOAuI0qcrCDnfQIXQ+WXy4ERE4aT Woew4lfFwFP6iEL16Pw== X-Proofpoint-GUID: HTHCo1cU4NFl1WI-BPBCMum3BATaavMo X-Proofpoint-ORIG-GUID: RT9JXhGXZNaKAHka2RGT7VnTtTRXQB7x X-Authority-Analysis: v=2.4 cv=aYBRWxot c=1 sm=1 tr=0 ts=6a0c3c93 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=VnNF1IyMAAAA:8 a=376oZdPSatvzr_fvEE0A:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 phishscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190099 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=nnmlinux@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779186909079154100 Content-Type: text/plain; charset="utf-8" Add support for the 'ibm,open-errinjct' and 'ibm,close-errinjct' RTAS calls. These handlers manage exclusive access to error injection facilities through a simple session-based mechanism. Updates include: - Implementation of rtas_ibm_open_errinjct() and rtas_ibm_close_errinjct() - Tracking field 'spapr->errinjct_token' in SpaprMachineState - New token definitions for the above RTAS calls - Return codes for already open or invalid close conditions This ensures that only one guest process can actively perform error injection at a time, improving reliability and preventing conflicts. Signed-off-by: Narayana Murty N --- hw/ppc/spapr_pci.c | 65 ++++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 9 +++++- 2 files changed, 73 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 82de04186e..b00f71d92a 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -854,6 +854,65 @@ param_error_exit: rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); } =20 +static void rtas_ibm_open_errinjct(PowerPCCPU *cpu, + SpaprMachineState *spapr, + uint32_t token, + uint32_t nargs, + target_ulong args, + uint32_t nret, + target_ulong rets) +{ + /* Validate argument count */ + if ((nargs !=3D 0) || (nret !=3D 2)) { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } + + if (spapr->errinjct_token) { + /* Already open: return token=3D0 and code=3DALREADY_OPEN */ + rtas_st(rets, 0, 0); + rtas_st(rets, 1, RTAS_OUT_ALREADY_OPEN); + return; + } + + spapr->errinjct_token =3D 1; + + /* + * Unlike most RTAS calls, ibm,open-errinjct returns + * the session token in the first output parameter + * and the status in the second. + */ + rtas_st(rets, 0, spapr->errinjct_token); + rtas_st(rets, 1, RTAS_OUT_SUCCESS); +} + +static void rtas_ibm_close_errinjct(PowerPCCPU *cpu, + SpaprMachineState *spapr, + uint32_t token, + uint32_t nargs, + target_ulong args, + uint32_t nret, + target_ulong rets) +{ + uint32_t o_token; + + if ((nargs !=3D 1) || (nret !=3D 1)) { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } + + o_token =3D rtas_ld(args, 0); + + if (o_token !=3D spapr->errinjct_token) { + rtas_st(rets, 0, RTAS_OUT_NOT_OPEN); + return; + } + + spapr->errinjct_token =3D 0; + + rtas_st(rets, 0, RTAS_OUT_SUCCESS); +} + static void pci_spapr_set_irq(void *opaque, int irq_num, int level) { /* @@ -2533,6 +2592,12 @@ void spapr_pci_rtas_init(void) spapr_rtas_register(RTAS_IBM_ERRINJCT, "ibm,errinjct", rtas_ibm_errinjct); + spapr_rtas_register(RTAS_IBM_OPEN_ERRINJCT, + "ibm,open-errinjct", + rtas_ibm_open_errinjct); + spapr_rtas_register(RTAS_IBM_CLOSE_ERRINJCT, + "ibm,close-errinjct", + rtas_ibm_close_errinjct); } =20 static void spapr_pci_register_types(void) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 512dd038ec..6c87f94e1d 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -274,6 +274,8 @@ struct SpaprMachineState { bool fadump_registered; bool fadump_dump_active; FadumpMemStruct registered_fdm; + + uint32_t errinjct_token; }; =20 #define H_SUCCESS 0 @@ -746,6 +748,9 @@ enum rtas_err_type { #define RTAS_OUT_PARAM_ERROR -3 #define RTAS_OUT_NOT_SUPPORTED -3 #define RTAS_OUT_NO_SUCH_INDICATOR -3 +#define RTAS_OUT_ALREADY_OPEN -4 +#define RTAS_OUT_NOT_OPEN -5 +#define RTAS_OUT_CLOSE_ERROR -6 #define RTAS_OUT_DUMP_ALREADY_REGISTERED -9 #define RTAS_OUT_DUMP_ACTIVE -10 #define RTAS_OUT_NOT_AUTHORIZED -9002 @@ -812,8 +817,10 @@ enum rtas_err_type { #define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2C) #define RTAS_CONFIGURE_KERNEL_DUMP (RTAS_TOKEN_BASE + 0x2D) #define RTAS_IBM_ERRINJCT (RTAS_TOKEN_BASE + 0x2E) +#define RTAS_IBM_OPEN_ERRINJCT (RTAS_TOKEN_BASE + 0x2F) +#define RTAS_IBM_CLOSE_ERRINJCT (RTAS_TOKEN_BASE + 0x30) =20 -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2F) +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x31) =20 /* RTAS ibm,get-system-parameter token values */ #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20 --=20 2.54.0 From nobody Sat May 30 18:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779186899; cv=none; d=zohomail.com; s=zohoarc; b=gz4Hkeo4vFIt+WlaWRCdkFfcb2nxzRV44dND9rBy5RrYRDxGb0ux5V66z+53IUttmHZHcahUnHHEzILRkjSROoHz4vIlG+l1ujda29Vav9Gnz61qz+VJGKLEBY/QdNnBwXiCR2nSGouZtQQ0/UDAM+7punjIND02cYIy1kIY1BM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779186899; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=nWGxl4Ceh9AbrghqMSsTySbVESl8QiNAXUM20ljfeCg=; b=fXxIYJfcQlmRXsodWCKvq/RTam2VOXKk5M0Nh2dZhp3Q4aZRXV+U5f+8PjeCItYfg+iGQ1kPtzClS5VNcSw19Ctv/LV1Q/6YmxOpr1KVMPh8mCFB24eKEC1c3yx2IhrlIiNifRLTKN31kKVJUYjzPn773wqwq1NJji6aZhU7SG0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779186899686205.61686586448968; Tue, 19 May 2026 03:34:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPHm3-0001qO-FP; Tue, 19 May 2026 06:34:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlz-0001pQ-KQ; Tue, 19 May 2026 06:34:03 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlx-0005Gv-J0; Tue, 19 May 2026 06:34:03 -0400 Received: from pps.filterd (m0356517.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64JAVCoH4037410; Tue, 19 May 2026 10:33:59 GMT Received: from ppma22.wdc07v.mail.ibm.com (5c.69.3da9.ip4.static.sl-reverse.com [169.61.105.92]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h74veqg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:58 +0000 (GMT) Received: from pps.filterd (ppma22.wdc07v.mail.ibm.com [127.0.0.1]) by ppma22.wdc07v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64JAO80g013256; Tue, 19 May 2026 10:33:57 GMT Received: from smtprelay07.fra02v.mail.ibm.com ([9.218.2.229]) by ppma22.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4e739vt873-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:57 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64JAXrVp32375228 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 May 2026 10:33:53 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 40EAA20043; Tue, 19 May 2026 10:33:53 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DF2EA2004B; Tue, 19 May 2026 10:33:50 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 19 May 2026 10:33:50 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=nWGxl4Ceh9AbrghqM SsTySbVESl8QiNAXUM20ljfeCg=; b=q1jY7XDYfJT8JvdkxK4AxLQBFb5TuAHr0 NuC+6hZq4FzKY5ePrTJor/nMqiHhYtm5S424ae5XL9XSnX+JEjUfakctfxuqLFNH AxuDwyMZNEoLmLOz0KHfei/MFwXRd4033WwswoXe4DGC0PPZZNAj11S4D5KkAfez gGzAt3EybiJ8MMM7q3WQ89JICNqVTnrHO1r504wEHmG3onih5Na7poZd6/qy/QDI NjlCzMwfr098gKiUu16HtnxnzPergrV1RMf10IJdBNN8nbBiKGMWr/vlP1mq0WkD YQmy1n0C3v+8bvNy1Cp3lhYiA4LDmfbTY4h7CLujL+B6I412XAyRA== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v2 4/6] ppc/spapr: Advertise RTAS error injection call support via FDT property Date: Tue, 19 May 2026 16:03:22 +0530 Message-ID: <20260519103325.8056-5-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260519103325.8056-1-nnmlinux@linux.ibm.com> References: <20260519103325.8056-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=ffCdDUQF c=1 sm=1 tr=0 ts=6a0c3c96 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=nNPvQeRNBT9IKkD_gJkA:9 X-Proofpoint-ORIG-GUID: qW1YtGR-c7nud1sl8A7Bx76OOP_3tSn1 X-Proofpoint-GUID: gVORSflNXqYTSYk4idtKNCcRBftnaOC8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDA5OSBTYWx0ZWRfX8doDIh2yZUY4 cWRvlH+dhMkIXuXzP+j9CKfn2tsYnzHJI9jlZgXp1VCkCGOr193hlDgnEp+5Hq6jS1AoYjzzceP rz6nbRZ3Lj2qgLunExGMeHxQZqeslX4jnD++o3ex2XQfUd8/ruJbdCIdt5WlMWSghSXSEfseuAQ q2kEhPla7FoPgQM2YTJ3dB+cYpANSgAI6nbYNSAt2cbMlcj0fDIQZ1/R4NDIbWvfW9m38i82tJ3 TkG2tcBx5oD2anbEqOLLrddAfoBnHOaTGnMDbu3JzMDi73K/+e7GXrLuUDUgg+CXTjm7B8xZe11 MMZDcfSV0SIziI8ttq/X4H1OZ5ugl/lhcxcC0Ws6ONQYk2Y6B57AV2mhXiPz2YTYsRt2U3KOGfm 1+yQCs5pORCG+Yetic/ZOAi8NtdLO9WrlXXmaCDNlIDBC7NQwPmK3bMn33DwN0BM0FHL7OICi+7 tdm1FiltiyWu8xZcZBg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 suspectscore=0 adultscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190099 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779186901177154100 Content-Type: text/plain; charset="utf-8" Advertise RTAS error injection call support to guests through a new "ibm,errinjct-tokens" property under the RTAS node in the device tree. This patch introduces: - spapr_get_errinject_tokens(), which retrieves or constructs a blob of supported error injection tokens from the host or fallback data. - Integration of "ibm,errinjct-tokens" into the RTAS FDT node. - Addition of "ibm,open-errinjct" and "ibm,close-errinjct" properties to advertise open/close handlers for error injection sessions. The ibm,errinjct-tokens property allows guests to programmatically discover supported RTAS error injection facilities, enabling safe and dynamic usage. The helper routine allocates memory for the token blob, which the caller must free once it has been added to the FDT. If the device-tree file (/proc/device-tree/rtas/ibm,errinjct-tokens) is not available, a static fallback blob is generated internally. Signed-off-by: Narayana Murty N --- hw/ppc/spapr.c | 106 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d40af312fa..bf6c838e0a 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -115,6 +115,8 @@ =20 #define PHANDLE_INTC 0x00001111 =20 +#define ERR_BLOB_MAX 512 + /* These two functions implement the VCPU id numbering: one to compute them * all and one to identify thread 0 of a VCORE. Any change to the first one * is likely to have an impact on the second one, so let's keep them close. @@ -968,10 +970,104 @@ static void spapr_dt_rtas_fadump(SpaprMachineState *= spapr, void *fdt, int rtas) } } =20 +/* + * spapr_get_errinject_tokens: + * --------------------------- + * Retrieve or construct a binary blob representing supported RTAS error + * injection tokens. If the host device-tree path + * "/proc/device-tree/rtas/ibm,errinjct-tokens" exists, it is read directl= y. + * Otherwise, a static fallback list of tokens is generated. + * + * The caller receives a dynamically allocated buffer in @out_buf and + * its size in @out_size, both of which must be freed by the caller + * once used. + * + * Returns: + * 0 (EXIT_SUCCESS) - on success + * -EIO, -ENOMEM - on failure + */ +static int spapr_get_errinject_tokens(char **out_buf, size_t *out_size) +{ + char *path =3D NULL, *buf =3D NULL; + gsize len =3D 0; + uint8_t errinjct_blob[ERR_BLOB_MAX]; + + static const struct { + const char *name; + enum rtas_err_type token; + } errinjct_tokens[] =3D { + { "recovered-special-event", RTAS_ERR_TYPE_RECOVERED_SPECIAL_EVENT= }, + { "corrupted-page", RTAS_ERR_TYPE_CORRUPTED_PAGE }, + { "ioa-bus-error", RTAS_ERR_TYPE_IOA_BUS_ERROR }, + { "corrupted-dcache-start", RTAS_ERR_TYPE_CORRUPTED_DCACHE_START = }, + { "corrupted-dcache-end", RTAS_ERR_TYPE_CORRUPTED_DCACHE_END }, + { "corrupted-icache-start", RTAS_ERR_TYPE_CORRUPTED_ICACHE_START = }, + { "corrupted-icache-end", RTAS_ERR_TYPE_CORRUPTED_ICACHE_END }, + { "corrupted-tlb-start", RTAS_ERR_TYPE_CORRUPTED_TLB_START }, + { "corrupted-tlb-end", RTAS_ERR_TYPE_CORRUPTED_TLB_END }, + { "ioa-bus-error-64", RTAS_ERR_TYPE_IOA_BUS_ERROR_64 }, + }; + + path =3D g_strdup("/proc/device-tree/rtas/ibm,errinjct-tokens"); + + if (g_file_test(path, G_FILE_TEST_EXISTS)) { + qemu_log("RTAS: Found %s\n", path); + + if (!g_file_get_contents(path, &buf, &len, NULL)) { + error_report("RTAS: Failed to read %s", path); + g_free(path); + return -EIO; + } + + qemu_log("RTAS: Read %zu bytes from device-tree\n", len); + *out_buf =3D buf; + *out_size =3D len; + g_free(path); + return EXIT_SUCCESS; + } + + qemu_log("RTAS: %s not found, building fallback blob\n", path); + g_free(path); + len =3D 0; + + for (int i =3D 0; i < G_N_ELEMENTS(errinjct_tokens); i++) { + const char *name =3D errinjct_tokens[i].name; + size_t str_len =3D strlen(name) + 1; + + if (len + str_len + sizeof(uint32_t) > sizeof(errinjct_blob)) { + error_report("RTAS: Too many tokens for static buffer"); + return -ENOMEM; + } + + memcpy(&errinjct_blob[len], name, str_len); + len +=3D str_len; + + uint32_t be_token =3D cpu_to_be32(errinjct_tokens[i].token); + memcpy(&errinjct_blob[len], &be_token, sizeof(be_token)); + len +=3D sizeof(be_token); + } + + buf =3D g_malloc(len); + if (!buf) { + error_report("RTAS: Failed to allocate %zu bytes for blob", len); + return -ENOMEM; + } + + memcpy(buf, errinjct_blob, len); + *out_buf =3D buf; + *out_size =3D len; + + qemu_log("RTAS: Fallback blob built (%zu bytes)\n", len); + return EXIT_SUCCESS; +} + + static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt) { MachineState *ms =3D MACHINE(spapr); int rtas; + size_t size_tokens =3D 0; + g_autofree char *errinject_tokens; GString *hypertas =3D g_string_sized_new(256); GString *qemu_hypertas =3D g_string_sized_new(256); uint64_t max_device_addr =3D 0; @@ -1080,6 +1176,16 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, = void *fdt) */ _FDT(fdt_setprop(fdt, rtas, "ibm,extended-os-term", NULL, 0)); =20 + if (!spapr_get_errinject_tokens(&errinject_tokens, &size_tokens)) { + _FDT(fdt_setprop(fdt, rtas, "ibm,errinjct-tokens", + errinject_tokens, size_tokens)); + + _FDT(fdt_setprop_string(fdt, rtas, "ibm,open-errinjct", + "ibm,open-errinjct")); + _FDT(fdt_setprop_string(fdt, rtas, "ibm,close-errinjct", + "ibm,close-errinjct")); + } + _FDT(fdt_setprop(fdt, rtas, "ibm,lrdr-capacity", lrdr_capacity, sizeof(lrdr_capacity))); =20 --=20 2.54.0 From nobody Sat May 30 18:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779186888; cv=none; d=zohomail.com; s=zohoarc; b=AIVcIa46/Ds0d8vXmYjRKQrDUpsf9FCYfO7/C1oikp7MnrYhnWLV7AoyCBX5sjgM8wRxpr3dVVKYwG4ccuNFeZBMKRFwUknkqORViBx5f9zWJhwRYIqoDmLmfzeV2Hmay2xZt5kPYrypgmmOlYDImgnxt1/2Zh/ixQWxEcj4k74= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779186888; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ShaSrZ2tx4HO9hV0r8qcofvXP1uxe1IAc4zdD4bksOc=; b=BuFHYTdgLj/l9C3xsRj98mxeulqUC9m4VW6zXsR4cMdiDHYQ1j+gRNgYIK4AmD8lNDeD+nm70ICIfjbo6aMVdXk8hXvAwgLJ07iqEL7vKkwtS2jEN49lk4LTKbOwhtLZGvriUn/qgkJngYb8lB6I9UNCdI1JksEaITGymQvJsqI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779186888227753.920722190942; Tue, 19 May 2026 03:34:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPHm4-0001r2-9R; Tue, 19 May 2026 06:34:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHm3-0001qP-Ed; Tue, 19 May 2026 06:34:07 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHlz-0005KB-V8; Tue, 19 May 2026 06:34:07 -0400 Received: from pps.filterd (m0360083.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64J9HEg63681418; Tue, 19 May 2026 10:34:01 GMT Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h9xvg3k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:34:01 +0000 (GMT) Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64JAO82q014670; Tue, 19 May 2026 10:34:00 GMT Received: from smtprelay03.fra02v.mail.ibm.com ([9.218.2.224]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4e74dhj1em-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:33:59 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay03.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64JAXuu239518718 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 May 2026 10:33:56 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E0D3820040; Tue, 19 May 2026 10:33:55 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 91CBF20043; Tue, 19 May 2026 10:33:53 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 19 May 2026 10:33:53 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=ShaSrZ2tx4HO9hV0r 8qcofvXP1uxe1IAc4zdD4bksOc=; b=D5VF9NgylPtas3rGp+WwIvdu8smgAVG1S GZnnsKdiHI0qNf9Hh5FWzPLpN8auPnYeaKGqyJ7tt0ON3bPqBl8YGNdEdmUqpaJy StBiXtkeGlUXV+Tc32wm+jOsOsJg3i3AUxvGP1ocApWm+qGUtd3QnyffPYcUXyzf 66EDtlZPYHcgdF7wFffERux8H7aPlvn/spM9O3JOY3KHnC0DyZ0qyvMrmCe6CZHt R5KGCsZUvRnHCBJZRqyPjkLk9PBzvBpA/pRnYYJ5qauy+gnewiG1tFbOJ0OhKgoC ys3teMEd9W0S52BVNzOvIy0MYI/YnQTaBZGu0g4tUdbZvRchga/QQ== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v2 5/6] ppc/spapr: Split VFIO code and refactor EEH interface Date: Tue, 19 May 2026 16:03:23 +0530 Message-ID: <20260519103325.8056-6-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260519103325.8056-1-nnmlinux@linux.ibm.com> References: <20260519103325.8056-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDA5OSBTYWx0ZWRfX1tJzecxkPCLI VWVzfGovtlhSvr9T5ab9oBqATZPRunqiPhTmTuIMyp61MIAQBxod0EHYwEEM8jfs78Q841veAB4 gctoBzxrCAe+qNHKpuefmL9rf8qEgDdEq5zagHglk9E3ynPEJz4N7th0BEI97c2GgRdV3z6mnv7 FWuTfr9opHD7fq6ht3GKcPfktl8e7pZEi4DfKPLu34BsYm7OeLEMr+IXqdZZqv4z52j5VSaXkMT BApc5jDV+pVKjv53EDsocIryruPdOliAyn8Cv2/lZWmbLyJf0RHvLVl/20qT187Yf03T3XGI8YJ TSRyWZnHy9uN+FWIAIMo1y4FOO0wnC0DA31IKcNREHQoHzMaP7nl8xks2gmtDM0vpAj5W6rEOPb 7ILfFekRRuTZN0oSbOcf3iXU2u7muk+S3gRqhtBq6caTfQrbNBc3tVLYFUnNiauDyzPYuLwy8Vc CU3J1oXLSBjqm1iRGwA== X-Authority-Analysis: v=2.4 cv=BNuDalQG c=1 sm=1 tr=0 ts=6a0c3c99 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=VnNF1IyMAAAA:8 a=_ZpARFV2VzSn2735YQIA:9 X-Proofpoint-ORIG-GUID: 50NDmkgVHO__YbjDk2fnk1H5EfOHjJ1c X-Proofpoint-GUID: Mceh-DxTXkz8dHpFf36iLyodyHc6kEhO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190099 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779186889337158500 Content-Type: text/plain; charset="utf-8" Split spapr_pci_vfio.c into two files to separate concerns: - spapr_pci_vfio.c: Contains general VFIO routines - spapr_pci_vfio_eeh.c: Contains EEH-specific routines Additionally, consolidate VFIO EEH function declarations into a new header file (spapr_vfio.h) to improve modularity and reduce header dependencies. Changes: - Split VFIO functionality: keep general VFIO routines in spapr_pci_vfio.c and move EEH routines to spapr_pci_vfio_eeh.c - Created include/hw/ppc/spapr_vfio.h with forward declarations to avoid pulling in full spapr headers and libfdt dependencies - Introduced stubs/spapr_pci_vfio-stubs.c to consolidate all VFIO, VFIO EEH stub functions in one place - Updated hw/ppc/spapr_pci.c to include new spapr_vfio.h header - Updated stubs/meson.build to reference new stub file This improves code organization by separating VFIO and EEH concerns, and enhances build system modularity by making it easier to maintain VFIO-related code separately from core sPAPR PCI code. Signed-off-by: Narayana Murty N --- hw/ppc/Kconfig | 2 +- hw/ppc/meson.build | 1 + hw/ppc/spapr_pci.c | 3 +- hw/ppc/spapr_pci_vfio.c | 367 +---------------------------------- hw/ppc/spapr_pci_vfio_eeh.c | 346 +++++++++++++++++++++++++++++++++ include/hw/pci-host/spapr.h | 44 +---- include/hw/ppc/spapr_vfio.h | 28 +++ stubs/meson.build | 1 + stubs/spapr_phb_vfio-stubs.c | 52 +++++ 9 files changed, 433 insertions(+), 411 deletions(-) create mode 100644 hw/ppc/spapr_pci_vfio_eeh.c create mode 100644 include/hw/ppc/spapr_vfio.h create mode 100644 stubs/spapr_phb_vfio-stubs.c diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 347dcce690..1fb191fe83 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -6,7 +6,7 @@ config PSERIES imply PCI_DEVICES imply TEST_DEVICES imply VIRTIO_VGA - imply VFIO_PCI if LINUX # needed by spapr_pci_vfio.c + imply VFIO_PCI if LINUX # needed by spapr_pci_vfio.c and spapr_pci_v= fio_eeh.c select NVDIMM select DIMM select PCI diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build index 37aa535db2..97e4be0dc9 100644 --- a/hw/ppc/meson.build +++ b/hw/ppc/meson.build @@ -36,6 +36,7 @@ ppc_ss.add(when: 'CONFIG_SPAPR_RNG', if_true: files('spap= r_rng.c')) if host_os =3D=3D 'linux' ppc_ss.add(when: 'CONFIG_PSERIES', if_true: files( 'spapr_pci_vfio.c', + 'spapr_pci_vfio_eeh.c', )) endif =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index b00f71d92a..221d05e5c5 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -33,6 +33,7 @@ #include "hw/pci/msix.h" #include "hw/pci/pci_host.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/spapr_vfio.h" #include "hw/pci-host/spapr.h" #include #include "trace.h" @@ -718,7 +719,7 @@ static int parse_and_verify_recovered_special_event(tar= get_ulong param_buf, static int parse_and_verify_corrupted_page(target_ulong param_buf, uint64_t *addr) { *addr =3D ((uint64_t)rtas_ld(param_buf, 0) << 32) | rtas_ld(param_buf,= 1); - qemu_log("RTAS: corrupted-page: addr=3D0x%lx\n", *addr); + qemu_log("RTAS: corrupted-page: addr=3D0x%llx\n", *addr); return (*addr) ? RTAS_OUT_SUCCESS : RTAS_OUT_PARAM_ERROR; } =20 diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index ed0b22a84a..2207654d83 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -22,119 +22,11 @@ #include #include "hw/ppc/spapr.h" #include "hw/pci-host/spapr.h" +#include "hw/ppc/spapr_vfio.h" #include "hw/pci/msix.h" #include "hw/pci/pci_device.h" #include "hw/vfio/vfio-container-legacy.h" #include "qemu/error-report.h" -#include CONFIG_DEVICES /* CONFIG_VFIO_PCI */ - -/* - * Interfaces for IBM EEH (Enhanced Error Handling) - */ -#ifdef CONFIG_VFIO_PCI -static bool vfio_eeh_container_ok(VFIOLegacyContainer *container) -{ - /* - * As of 2016-03-04 (linux-4.5) the host kernel EEH/VFIO - * implementation is broken if there are multiple groups in a - * container. The hardware works in units of Partitionable - * Endpoints (=3D=3D IOMMU groups) and the EEH operations naively - * iterate across all groups in the container, without any logic - * to make sure the groups have their state synchronized. For - * certain operations (ENABLE) that might be ok, until an error - * occurs, but for others (GET_STATE) it's clearly broken. - */ - - /* - * XXX Once fixed kernels exist, test for them here - */ - - if (QLIST_EMPTY(&container->group_list)) { - return false; - } - - if (QLIST_NEXT(QLIST_FIRST(&container->group_list), container_next)) { - return false; - } - - return true; -} - -static int vfio_eeh_container_op(VFIOLegacyContainer *container, uint32_t = op) -{ - struct vfio_eeh_pe_op pe_op =3D { - .argsz =3D sizeof(pe_op), - .op =3D op, - }; - int ret; - - if (!vfio_eeh_container_ok(container)) { - error_report("vfio/eeh: EEH_PE_OP 0x%x: " - "kernel requires a container with exactly one group",= op); - return -EPERM; - } - - ret =3D ioctl(container->fd, VFIO_EEH_PE_OP, &pe_op); - if (ret < 0) { - error_report("vfio/eeh: EEH_PE_OP 0x%x failed: %m", op); - return -errno; - } - - return ret; -} - -static VFIOLegacyContainer *vfio_eeh_as_container(AddressSpace *as) -{ - VFIOAddressSpace *space =3D vfio_address_space_get(as); - VFIOContainer *bcontainer =3D NULL; - - if (QLIST_EMPTY(&space->containers)) { - /* No containers to act on */ - goto out; - } - - bcontainer =3D QLIST_FIRST(&space->containers); - - if (QLIST_NEXT(bcontainer, next)) { - /* - * We don't yet have logic to synchronize EEH state across - * multiple containers - */ - bcontainer =3D NULL; - goto out; - } - -out: - vfio_address_space_put(space); - return VFIO_IOMMU_LEGACY(bcontainer); -} - -static bool vfio_eeh_as_ok(AddressSpace *as) -{ - VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); - - return (container !=3D NULL) && vfio_eeh_container_ok(container); -} - -static int vfio_eeh_as_op(AddressSpace *as, uint32_t op) -{ - VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); - - if (!container) { - return -ENODEV; - } - return vfio_eeh_container_op(container, op); -} - -bool spapr_phb_eeh_available(SpaprPhbState *sphb) -{ - return vfio_eeh_as_ok(&sphb->iommu_as); -} - -static void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb) -{ - vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE); -} =20 void spapr_phb_vfio_reset(DeviceState *qdev) { @@ -146,260 +38,3 @@ void spapr_phb_vfio_reset(DeviceState *qdev) */ spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev)); } - -static void spapr_eeh_pci_find_device(PCIBus *bus, PCIDevice *pdev, - void *opaque) -{ - bool *found =3D opaque; - - if (object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { - *found =3D true; - } -} - -int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int option) -{ - uint32_t op; - int ret; - - switch (option) { - case RTAS_EEH_DISABLE: - op =3D VFIO_EEH_PE_DISABLE; - break; - case RTAS_EEH_ENABLE: { - PCIHostState *phb; - bool found =3D false; - - /* - * The EEH functionality is enabled per sphb level instead of - * per PCI device. We have already identified this specific sphb - * based on buid passed as argument to ibm,set-eeh-option rtas - * call. Now we just need to check the validity of the PCI - * pass-through devices (vfio-pci) under this sphb bus. - * We have already validated that all the devices under this sphb - * are from same iommu group (within same PE) before coming here. - * - * Prior to linux commit 98ba956f6a389 ("powerpc/pseries/eeh: - * Rework device EEH PE determination") kernel would call - * eeh-set-option for each device in the PE using the device's - * config_address as the argument rather than the PE address. - * Hence if we check validity of supplied config_addr whether - * it matches to this PHB will cause issues with older kernel - * versions v5.9 and older. If we return an error from - * eeh-set-option when the argument isn't a valid PE address - * then older kernels (v5.9 and older) will interpret that as - * EEH not being supported. - */ - phb =3D PCI_HOST_BRIDGE(sphb); - pci_for_each_device(phb->bus, (addr >> 16) & 0xFF, - spapr_eeh_pci_find_device, &found); - - if (!found) { - return RTAS_OUT_PARAM_ERROR; - } - - op =3D VFIO_EEH_PE_ENABLE; - break; - } - case RTAS_EEH_THAW_IO: - op =3D VFIO_EEH_PE_UNFREEZE_IO; - break; - case RTAS_EEH_THAW_DMA: - op =3D VFIO_EEH_PE_UNFREEZE_DMA; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); - if (ret < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - -int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) -{ - int ret; - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_GET_STATE); - if (ret < 0) { - return RTAS_OUT_PARAM_ERROR; - } - - *state =3D ret; - return RTAS_OUT_SUCCESS; -} - -static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus, - PCIDevice *pdev, - void *opaque) -{ - /* Check if the device is VFIO PCI device */ - if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { - return; - } - - /* - * The MSIx table will be cleaned out by reset. We need - * disable it so that it can be reenabled properly. Also, - * the cached MSIx table should be cleared as it's not - * reflecting the contents in hardware. - */ - if (msix_enabled(pdev)) { - uint16_t flags; - - flags =3D pci_host_config_read_common(pdev, - pdev->msix_cap + PCI_MSIX_FLAG= S, - pci_config_size(pdev), 2); - flags &=3D ~PCI_MSIX_FLAGS_ENABLE; - pci_host_config_write_common(pdev, - pdev->msix_cap + PCI_MSIX_FLAGS, - pci_config_size(pdev), flags, 2); - } - - msix_reset(pdev); -} - -static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque) -{ - pci_for_each_device_under_bus(bus, spapr_phb_vfio_eeh_clear_dev_msi= x, - NULL); -} - -static void spapr_phb_vfio_eeh_pre_reset(SpaprPhbState *sphb) -{ - PCIHostState *phb =3D PCI_HOST_BRIDGE(sphb); - - pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL); -} - -int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) -{ - uint32_t op; - int ret; - - switch (option) { - case RTAS_SLOT_RESET_DEACTIVATE: - op =3D VFIO_EEH_PE_RESET_DEACTIVATE; - break; - case RTAS_SLOT_RESET_HOT: - spapr_phb_vfio_eeh_pre_reset(sphb); - op =3D VFIO_EEH_PE_RESET_HOT; - break; - case RTAS_SLOT_RESET_FUNDAMENTAL: - spapr_phb_vfio_eeh_pre_reset(sphb); - op =3D VFIO_EEH_PE_RESET_FUNDAMENTAL; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); - if (ret < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - -int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) -{ - int ret; - - ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_CONFIGURE); - if (ret < 0) { - return RTAS_OUT_PARAM_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - -int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, - uint32_t func, uint64_t addr, - uint64_t mask, uint32_t type) -{ - VFIOLegacyContainer *container =3D vfio_eeh_as_container(&sphb->iommu_= as); - struct vfio_eeh_pe_op op =3D { - .op =3D VFIO_EEH_PE_INJECT_ERR, - .argsz =3D sizeof(op), - }; - - /* Set error type, address, and mask */ - op.err.type =3D type; - op.err.addr =3D addr; - op.err.mask =3D mask; - - /* Validate and set function code */ - switch (func) { - case EEH_ERR_FUNC_LD_MEM_ADDR: - case EEH_ERR_FUNC_LD_MEM_DATA: - case EEH_ERR_FUNC_LD_IO_ADDR: - case EEH_ERR_FUNC_LD_IO_DATA: - case EEH_ERR_FUNC_LD_CFG_ADDR: - case EEH_ERR_FUNC_LD_CFG_DATA: - case EEH_ERR_FUNC_ST_MEM_ADDR: - case EEH_ERR_FUNC_ST_MEM_DATA: - case EEH_ERR_FUNC_ST_IO_ADDR: - case EEH_ERR_FUNC_ST_IO_DATA: - case EEH_ERR_FUNC_ST_CFG_ADDR: - case EEH_ERR_FUNC_ST_CFG_DATA: - case EEH_ERR_FUNC_DMA_RD_ADDR: - case EEH_ERR_FUNC_DMA_RD_DATA: - case EEH_ERR_FUNC_DMA_RD_MASTER: - case EEH_ERR_FUNC_DMA_RD_TARGET: - case EEH_ERR_FUNC_DMA_WR_ADDR: - case EEH_ERR_FUNC_DMA_WR_DATA: - case EEH_ERR_FUNC_DMA_WR_MASTER: - op.err.func =3D func; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - /* Perform the ioctl to inject the error */ - if (ioctl(container->fd, VFIO_EEH_PE_OP, &op) < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} -#else - -bool spapr_phb_eeh_available(SpaprPhbState *sphb) -{ - return false; -} - -void spapr_phb_vfio_reset(DeviceState *qdev) -{ -} - -int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int option) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) -{ - return RTAS_OUT_NOT_SUPPORTED; -} - -int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, int option) -{ - return RTAS_OUT_NOT_SUPPORTED; -} -#endif /* CONFIG_VFIO_PCI */ diff --git a/hw/ppc/spapr_pci_vfio_eeh.c b/hw/ppc/spapr_pci_vfio_eeh.c new file mode 100644 index 0000000000..6d07ae50c5 --- /dev/null +++ b/hw/ppc/spapr_pci_vfio_eeh.c @@ -0,0 +1,346 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* + * QEMU sPAPR PCI VFIO EEH support + */ + +#include "qemu/osdep.h" +#include +#include +#include "hw/ppc/spapr.h" +#include "hw/pci-host/spapr.h" +#include "hw/ppc/spapr_vfio.h" +#include "hw/pci/msix.h" +#include "hw/pci/pci_device.h" +#include "hw/vfio/vfio-container-legacy.h" +#include "qemu/error-report.h" +#include CONFIG_DEVICES /* CONFIG_VFIO_PCI */ + +/* + * Interfaces for IBM EEH (Enhanced Error Handling) + */ +static bool vfio_eeh_container_ok(VFIOLegacyContainer *container) +{ + /* + * As of 2016-03-04 (linux-4.5) the host kernel EEH/VFIO + * implementation is broken if there are multiple groups in a + * container. The hardware works in units of Partitionable + * Endpoints (=3D=3D IOMMU groups) and the EEH operations naively + * iterate across all groups in the container, without any logic + * to make sure the groups have their state synchronized. For + * certain operations (ENABLE) that might be ok, until an error + * occurs, but for others (GET_STATE) it's clearly broken. + */ + + /* + * XXX Once fixed kernels exist, test for them here + */ + + if (QLIST_EMPTY(&container->group_list)) { + return false; + } + + if (QLIST_NEXT(QLIST_FIRST(&container->group_list), container_next)) { + return false; + } + + return true; +} + +static int vfio_eeh_container_op(VFIOLegacyContainer *container, uint32_t = op) +{ + struct vfio_eeh_pe_op pe_op =3D { + .argsz =3D sizeof(pe_op), + .op =3D op, + }; + int ret; + + if (!vfio_eeh_container_ok(container)) { + error_report("vfio/eeh: EEH_PE_OP 0x%x: " + "kernel requires a container with exactly one group",= op); + return -EPERM; + } + + ret =3D ioctl(container->fd, VFIO_EEH_PE_OP, &pe_op); + if (ret < 0) { + error_report("vfio/eeh: EEH_PE_OP 0x%x failed: %m", op); + return -errno; + } + + return ret; +} + +static VFIOLegacyContainer *vfio_eeh_as_container(AddressSpace *as) +{ + VFIOAddressSpace *space =3D vfio_address_space_get(as); + VFIOContainer *bcontainer =3D NULL; + + if (QLIST_EMPTY(&space->containers)) { + /* No containers to act on */ + goto out; + } + + bcontainer =3D QLIST_FIRST(&space->containers); + + if (QLIST_NEXT(bcontainer, next)) { + /* + * We don't yet have logic to synchronize EEH state across + * multiple containers + */ + bcontainer =3D NULL; + goto out; + } + +out: + vfio_address_space_put(space); + return VFIO_IOMMU_LEGACY(bcontainer); +} + +static bool vfio_eeh_as_ok(AddressSpace *as) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); + + return (container !=3D NULL) && vfio_eeh_container_ok(container); +} + +static int vfio_eeh_as_op(AddressSpace *as, uint32_t op) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(as); + + if (!container) { + return -ENODEV; + } + return vfio_eeh_container_op(container, op); +} + +bool spapr_phb_eeh_available(SpaprPhbState *sphb) +{ + return vfio_eeh_as_ok(&sphb->iommu_as); +} + +void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb) +{ + vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE); +} + + +static void spapr_eeh_pci_find_device(PCIBus *bus, PCIDevice *pdev, + void *opaque) +{ + bool *found =3D opaque; + + if (object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { + *found =3D true; + } +} + +int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, + unsigned int addr, int option) +{ + uint32_t op; + int ret; + + switch (option) { + case RTAS_EEH_DISABLE: + op =3D VFIO_EEH_PE_DISABLE; + break; + case RTAS_EEH_ENABLE: { + PCIHostState *phb; + bool found =3D false; + + /* + * The EEH functionality is enabled per sphb level instead of + * per PCI device. We have already identified this specific sphb + * based on buid passed as argument to ibm,set-eeh-option rtas + * call. Now we just need to check the validity of the PCI + * pass-through devices (vfio-pci) under this sphb bus. + * We have already validated that all the devices under this sphb + * are from same iommu group (within same PE) before coming here. + * + * Prior to linux commit 98ba956f6a389 ("powerpc/pseries/eeh: + * Rework device EEH PE determination") kernel would call + * eeh-set-option for each device in the PE using the device's + * config_address as the argument rather than the PE address. + * Hence if we check validity of supplied config_addr whether + * it matches to this PHB will cause issues with older kernel + * versions v5.9 and older. If we return an error from + * eeh-set-option when the argument isn't a valid PE address + * then older kernels (v5.9 and older) will interpret that as + * EEH not being supported. + */ + phb =3D PCI_HOST_BRIDGE(sphb); + pci_for_each_device(phb->bus, (addr >> 16) & 0xFF, + spapr_eeh_pci_find_device, &found); + + if (!found) { + return RTAS_OUT_PARAM_ERROR; + } + + op =3D VFIO_EEH_PE_ENABLE; + break; + } + case RTAS_EEH_THAW_IO: + op =3D VFIO_EEH_PE_UNFREEZE_IO; + break; + case RTAS_EEH_THAW_DMA: + op =3D VFIO_EEH_PE_UNFREEZE_DMA; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); + if (ret < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + +int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) +{ + int ret; + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_GET_STATE); + if (ret < 0) { + return RTAS_OUT_PARAM_ERROR; + } + + *state =3D ret; + return RTAS_OUT_SUCCESS; +} + +static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus, + PCIDevice *pdev, + void *opaque) +{ + /* Check if the device is VFIO PCI device */ + if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { + return; + } + + /* + * The MSIx table will be cleaned out by reset. We need + * disable it so that it can be reenabled properly. Also, + * the cached MSIx table should be cleared as it's not + * reflecting the contents in hardware. + */ + if (msix_enabled(pdev)) { + uint16_t flags; + + flags =3D pci_host_config_read_common(pdev, + pdev->msix_cap + PCI_MSIX_FLAG= S, + pci_config_size(pdev), 2); + flags &=3D ~PCI_MSIX_FLAGS_ENABLE; + pci_host_config_write_common(pdev, + pdev->msix_cap + PCI_MSIX_FLAGS, + pci_config_size(pdev), flags, 2); + } + + msix_reset(pdev); +} + +static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque) +{ + pci_for_each_device_under_bus(bus, spapr_phb_vfio_eeh_clear_dev_msi= x, + NULL); +} + +static void spapr_phb_vfio_eeh_pre_reset(SpaprPhbState *sphb) +{ + PCIHostState *phb =3D PCI_HOST_BRIDGE(sphb); + + pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL); +} + +int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) +{ + uint32_t op; + int ret; + + switch (option) { + case RTAS_SLOT_RESET_DEACTIVATE: + op =3D VFIO_EEH_PE_RESET_DEACTIVATE; + break; + case RTAS_SLOT_RESET_HOT: + spapr_phb_vfio_eeh_pre_reset(sphb); + op =3D VFIO_EEH_PE_RESET_HOT; + break; + case RTAS_SLOT_RESET_FUNDAMENTAL: + spapr_phb_vfio_eeh_pre_reset(sphb); + op =3D VFIO_EEH_PE_RESET_FUNDAMENTAL; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, op); + if (ret < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + +int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) +{ + int ret; + + ret =3D vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_CONFIGURE); + if (ret < 0) { + return RTAS_OUT_PARAM_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, + uint32_t func, uint64_t addr, + uint64_t mask, uint32_t type) +{ + VFIOLegacyContainer *container =3D vfio_eeh_as_container(&sphb->iommu_= as); + struct vfio_eeh_pe_op op =3D { + .op =3D VFIO_EEH_PE_INJECT_ERR, + .argsz =3D sizeof(op), + }; + + /* Set error type, address, and mask */ + op.err.type =3D type; + op.err.addr =3D addr; + op.err.mask =3D mask; + + /* Validate and set function code */ + switch (func) { + case EEH_ERR_FUNC_LD_MEM_ADDR: + case EEH_ERR_FUNC_LD_MEM_DATA: + case EEH_ERR_FUNC_LD_IO_ADDR: + case EEH_ERR_FUNC_LD_IO_DATA: + case EEH_ERR_FUNC_LD_CFG_ADDR: + case EEH_ERR_FUNC_LD_CFG_DATA: + case EEH_ERR_FUNC_ST_MEM_ADDR: + case EEH_ERR_FUNC_ST_MEM_DATA: + case EEH_ERR_FUNC_ST_IO_ADDR: + case EEH_ERR_FUNC_ST_IO_DATA: + case EEH_ERR_FUNC_ST_CFG_ADDR: + case EEH_ERR_FUNC_ST_CFG_DATA: + case EEH_ERR_FUNC_DMA_RD_ADDR: + case EEH_ERR_FUNC_DMA_RD_DATA: + case EEH_ERR_FUNC_DMA_RD_MASTER: + case EEH_ERR_FUNC_DMA_RD_TARGET: + case EEH_ERR_FUNC_DMA_WR_ADDR: + case EEH_ERR_FUNC_DMA_WR_DATA: + case EEH_ERR_FUNC_DMA_WR_MASTER: + op.err.func =3D func; + break; + default: + return RTAS_OUT_PARAM_ERROR; + } + + /* Perform the ioctl to inject the error */ + if (ioctl(container->fd, VFIO_EEH_PE_OP, &op) < 0) { + return RTAS_OUT_HW_ERROR; + } + + return RTAS_OUT_SUCCESS; +} + diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 417d1f6c31..d2bc90a3d2 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -116,49 +116,7 @@ void spapr_phb_remove_pci_device_cb(DeviceState *dev); int spapr_pci_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, void *fdt, int *fdt_start_offset, Error **errp); =20 -/* VFIO EEH hooks */ -#ifdef CONFIG_LINUX -bool spapr_phb_eeh_available(SpaprPhbState *sphb); -int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int option); -int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state); -int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); -int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); -void spapr_phb_vfio_reset(DeviceState *qdev); -int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, - uint64_t addr, uint64_t mask, uint32_t type); -#else -static inline bool spapr_phb_eeh_available(SpaprPhbState *sphb) -{ - return false; -} -static inline int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, - unsigned int addr, int opt= ion) -{ - return RTAS_OUT_HW_ERROR; -} -static inline int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, - int *state) -{ - return RTAS_OUT_HW_ERROR; -} -static inline int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) -{ - return RTAS_OUT_HW_ERROR; -} -static inline int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) -{ - return RTAS_OUT_HW_ERROR; -} -static inline void spapr_phb_vfio_reset(DeviceState *qdev) -{ -} -static inline int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t fu= nc, - uint64_t addr, uint64_t mask, uint32_t = type) -{ - return RTAS_OUT_HW_ERROR; -} -#endif +/* VFIO EEH hooks - see hw/ppc/spapr_vfio.h for declarations */ =20 void spapr_phb_dma_reset(SpaprPhbState *sphb); =20 diff --git a/include/hw/ppc/spapr_vfio.h b/include/hw/ppc/spapr_vfio.h new file mode 100644 index 0000000000..ab8b5f8527 --- /dev/null +++ b/include/hw/ppc/spapr_vfio.h @@ -0,0 +1,28 @@ +/* + * sPAPR VFIO EEH Header + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_PPC_SPAPR_VFIO_H +#define HW_PPC_SPAPR_VFIO_H + +/* + * Forward declarations to avoid pulling in full spapr headers + * This allows stubs and other files to compile without libfdt dependencies + */ +typedef struct SpaprPhbState SpaprPhbState; +typedef struct DeviceState DeviceState; + +/* VFIO EEH function declarations */ +bool spapr_phb_eeh_available(SpaprPhbState *sphb); +int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, + unsigned int addr, int option); +int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state); +int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); +int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); +void spapr_phb_vfio_reset(DeviceState *qdev); +void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb); +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, + uint64_t addr, uint64_t mask, uint32_t type); + +#endif /* HW_PPC_SPAPR_VFIO_H */ diff --git a/stubs/meson.build b/stubs/meson.build index 3b2f2680b1..2879d6f70e 100644 --- a/stubs/meson.build +++ b/stubs/meson.build @@ -90,6 +90,7 @@ if have_system stub_ss.add(files('hmp-cmd-info_tlb.c')) stub_ss.add(files('hmp-cmds-hw-s390x.c')) stub_ss.add(files('hmp-cmds-target-i386.c')) + stub_ss.add(files('spapr_phb_vfio-stubs.c')) endif =20 if have_system or have_user diff --git a/stubs/spapr_phb_vfio-stubs.c b/stubs/spapr_phb_vfio-stubs.c new file mode 100644 index 0000000000..ba043bcaf4 --- /dev/null +++ b/stubs/spapr_phb_vfio-stubs.c @@ -0,0 +1,52 @@ +/* + * Stubs for sPAPR PCI VFIO EEH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "hw/ppc/spapr_vfio.h" + +/* RTAS return codes */ +#define RTAS_OUT_NOT_SUPPORTED (-3) + + +bool spapr_phb_eeh_available(SpaprPhbState *sphb) +{ + return false; +} + +int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, + unsigned int addr, int option) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + +void spapr_phb_vfio_reset(DeviceState *qdev) +{ +} + +void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb) +{ +} + +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t func, + uint64_t addr, uint64_t mask, uint32_t type) +{ + return RTAS_OUT_NOT_SUPPORTED; +} --=20 2.54.0 From nobody Sat May 30 18:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1779186910; cv=none; d=zohomail.com; s=zohoarc; b=Sgssp4e+1+Z7qVXdHCnMYuMR3KGJrvNWBe2Ov+S7neYTGCmA9av8VBdwg9lsAfd+vXI/uKgC4K02GHES0qRlfPb5MUYIpCpQUWY7ZkLLykuN3CE4IMrxVyehihVyEHcb/J58yVtgLVcDEl0jGHXtD3lYqNCHFdFOgvMt6ibQuys= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779186910; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fLZtxzPiE//1Grmg/9b6/lfDSHW7DBwxC8JordvpkLM=; b=dBlkCNTqhwTGtvXpG+IAu+qoiofPNmvUl6F8NcSU4mC0JnAYAFf2XBXg/MALxNhkQuSYagbc/nvIes4SomTouiMa59aiXqbgKJNtmOSUq4tLL4Yi/aZDtW4EoSm0UjMxGYwHldeaA8bjhY2b93Gcs2IsY4Rit8+F+YiVv8iZpzA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 177918691054644.94371600534248; Tue, 19 May 2026 03:35:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wPHm4-0001rY-Rp; Tue, 19 May 2026 06:34:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHm3-0001qR-He; Tue, 19 May 2026 06:34:07 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wPHm1-0005Mx-Sa; Tue, 19 May 2026 06:34:07 -0400 Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64J85YjB2561525; Tue, 19 May 2026 10:34:03 GMT Received: from ppma11.dal12v.mail.ibm.com (db.9e.1632.ip4.static.sl-reverse.com [50.22.158.219]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4e6h8mmdu7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:34:02 +0000 (GMT) Received: from pps.filterd (ppma11.dal12v.mail.ibm.com [127.0.0.1]) by ppma11.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 64JAOAhB027407; Tue, 19 May 2026 10:34:02 GMT Received: from smtprelay05.fra02v.mail.ibm.com ([9.218.2.225]) by ppma11.dal12v.mail.ibm.com (PPS) with ESMTPS id 4e75ky1tyv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 May 2026 10:34:01 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay05.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64JAXwKt44630452 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 May 2026 10:33:58 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 922FB20043; Tue, 19 May 2026 10:33:58 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3CDEE20040; Tue, 19 May 2026 10:33:56 +0000 (GMT) Received: from dhcp-9-123-10-31.bl1-in.ibm.com (unknown [9.123.10.31]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 19 May 2026 10:33:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=fLZtxzPiE//1Grmg/ 9b6/lfDSHW7DBwxC8JordvpkLM=; b=Us6JG5cm5Ps6qUrVFV7ZjuF1iXzPIAutY KZAwOfXckXxOpuplGAv4LIGVjojm2Tix0Exa54QH4VhGCasWs7FRXG7b2g6F05CG Xk+XJWJqUYaudN+LYN+Z/Lc5zsdG5Z2pzl8gtzJAEBvOnM7+3J+jsyP7R4ystdra GMnFy2cViAU4oGPRsSB/5SyKm+r0rKjpKq9VhFNuiVX2b2jnEr3Elktw4HoiAIVK HxDSaIBjKLSvip+uRX3G9cEjHLwZWw1T4FbM5sfnCZQ6W2wweKsnLIRq8NDwdd/F 5C3kkbaV4VRxlVWysDpJb6x49N5Mi8ZzZJgSkzBBLpIh4Xf1XUNqA== From: Narayana Murty N To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: npiggin@gmail.com, harshpb@linux.ibm.com, mahesh@linux.ibm.com, ganeshgr@linux.ibm.com, sbhat@linux.ibm.com, vaibhav@linux.ibm.com, anushree.mathur@linux.vnet.ibm.com, clg@redhat.com, pierrick.bouvier@oss.qualcomm.com, philmd@linaro.org Subject: [PATCH v2 6/6] MAINTAINERS: Add entry for sPAPR PCI VFIO EEH support Date: Tue, 19 May 2026 16:03:24 +0530 Message-ID: <20260519103325.8056-7-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260519103325.8056-1-nnmlinux@linux.ibm.com> References: <20260519103325.8056-1-nnmlinux@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: moBvh3zeXDNcHQsrB6V7jTJDHCBWDml0 X-Authority-Analysis: v=2.4 cv=GYMnWwXL c=1 sm=1 tr=0 ts=6a0c3c9b cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=69wJf7TsAAAA:8 a=pGLkceISAAAA:8 a=VcH14TYERV92i4gI124A:9 a=Fg1AiH1G6rFz08G2ETeA:22 X-Proofpoint-ORIG-GUID: cTc5-aWEzMvGJ9hV_zlODUSzIoHugTtW X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDA5OSBTYWx0ZWRfX1Mxzyaqp3FNM bFLm02EdXGg7FLhWJasjebwRuWmZTweOUw5RodoP1jl9BZf7+/050p/bzxfHe95PFULvVZ4zrxF F9OEmQpoAVzd7PHXLuGPV0p7IyH3el4VjkyADkzswVYJdwPHRpKQXN2WfiDvftt0Zol+x2Wf7LE GMSJrxzHreHH41AUqVY17lWKvdVL9oangw+aCzMB/YmkVN3Srt3aBClVPGnGTrOxjmL8Ri1W6o3 yGKSWxXLLrUJkdGoUw/pQAg8XpZ8Hh4qvcQdphxqsqUpk7qfYVt3v5nw8Hx0zwMiqTUYjuW7ZC1 5o1jnvFXgb0aTRktiL+L0m1QI2Q2r3mTUWFK0HG3gWSYHrtAVRTaEEpoBudhNCEERFmmF98UVr7 EbIuXks5ZCds0wQepptVJqcx1IOt7GroQN771NJNnDaTliK68nfpovOA7xukNNOiu2FfZCrbMN5 cOD7+f1dtV11pZBXlug== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190099 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1779186913030154100 Content-Type: text/plain; charset="utf-8" Add a dedicated MAINTAINERS entry for hw/ppc/spapr_pci_vfio_eeh.c, which implements Extended Error Handling (EEH) support for VFIO-based PCI devices on PowerPC sPAPR platforms. EEH provides error detection, isolation, and recovery mechanisms for PCI devices, allowing the system to handle and recover from hardware errors without requiring a full system reboot. Signed-off-by: Narayana Murty N --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9d3d645953..03a638cab1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1656,6 +1656,12 @@ F: tests/functional/ppc64/test_pseries.py F: tests/functional/ppc64/test_hv.py F: tests/functional/ppc64/test_tuxrun.py =20 +sPAPR PCI VFIO Extended Error handling (EEH) +M: Narayana Murty +L: qemu-ppc@nongnu.org +S: Maintained +F: hw/ppc/spapr_pci_vfio_eeh.c + PowerNV (Non-Virtualized) M: Nicholas Piggin R: Aditya Gupta --=20 2.54.0