From nobody Sat May 30 19:26:49 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1777368885; cv=none; d=zohomail.com; s=zohoarc; b=Z6fwCH8ocqcr0L3f4xjuHaGdmFVt+lAYSt7OownKYmDJKHb3VnuKG0Tum4ZlVZjiQmrFj9gujCpoPoTUuIcjLayS9ZTGXWHzYB7u7OW55s4/71ZnHyLciQXGg5hpyiTrhS573KaQyW82qkquOhz6jRd+veQRtGgoYISfwm98Wkw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1777368885; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2cvYLVcnk1qS3FA5lQP8W94koZO4vK3ygKeMeP+mRXU=; b=IDXjBQWsN0Ij3gS79Td8ZbM7WE4eBqQVR4V3r9eFU8Ht7Be/I+EzymD6WceBAPJxWD1+jCFNeindk7onhEsubc4KDZ7UYsGnPOn/mX2rYN1zVZ7F2MpDDWKvsNENM4ggBQ2VmP9Ip3xlpIqGuk75kbWR1Y2dh1nTayqaWYoT5xA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1777368885057979.0883026960815; Tue, 28 Apr 2026 02:34:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wHepA-0003OD-Jg; Tue, 28 Apr 2026 05:33:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wHep8-0003MB-NC for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:46 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wHep6-0007QK-Vb for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:46 -0400 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4896c22fcbaso83459735e9.0 for ; Tue, 28 Apr 2026 02:33:44 -0700 (PDT) Received: from lanath.. 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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a774d7a1fsm19665595e9.4.2026.04.28.02.33.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Apr 2026 02:33:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1777368823; x=1777973623; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2cvYLVcnk1qS3FA5lQP8W94koZO4vK3ygKeMeP+mRXU=; b=aeDDAU6SBs+NtD1I1J1pLZa0oKuSE4dJ/CGwLIpUWSNQhsPiGZb7l4hKGvvrCAgFr1 HFGk0elPnj0+MTJ+8VJ7sTjlyBK1XI5btiNOjPQjNS//PKAR7kB42gTKNjmtxKzvY8iK DlbTqFr04jsDO4YJW6RI9KT8QNq/QMM+OPQ5FFXSxR8lf11b7n766ltbV0UdlN2LKtwN RZJZ+Iso8BSwER/Dsn/eqeunOPgNOWcrnrxKw9tV7EkPrVJ0Lt/x9cyQ6L33c8HH/BtS sdXw7w29JaYzrBNjmHxl3l0QUabpqEr6rJhLLR3wjQnAhNg+MipCEX0omptU6kad0e73 9Omg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777368823; x=1777973623; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=2cvYLVcnk1qS3FA5lQP8W94koZO4vK3ygKeMeP+mRXU=; b=DbuNheGwvBM6QsfrRGPtwBm3lR2s//dbI35HxMC0EKkXkA6E+hQyHrZuRUu/3itm9W Pl2PhUuFgPtnPJ+CeZfSX5nHvLcnR/2UiK3TI3Vd4EzN602JsnFzvEJJ8AnEsfdiTajh UJGsOXjWO2F+OzUQAousowzL18V9wuA9Krr1jFJBnjrfU6XtskAyk2ih63NAbjDNSm2R 4RHYcBUrvaAZIJpBWJtAnX9jfwUVJs3iaWp9mTG6RBdyj9MClKfmhZfz6Xg2inFfxoA+ 15igL1q/zFihkrWxOzG6++Brcw5BsXv/MqmlqmND34u3mND3bvLI8bWQ6ePXc6DR2bNA 8hig== X-Gm-Message-State: AOJu0YztW9D5SXtSlnkGYIEF6n+bh1KM2WhJV7JwRF5Ay+dFTIMq5yU7 4RHqiOKl/iLiQqoGhTxF/n8Bikhqcl5AZBYHO+kk7Iyzp3JrzW4knWvJDNOHrrUgSlaGLWl6mHr tGuyp X-Gm-Gg: AeBDieurofJXdCllGOEOTTHLWYQI3+Fo62eEo/lRLOhwo0sgDIFjL20tvwmDSydQi8o mEJI4OL2yygzYuNI01tPX60Y4UV6YDdcqM2J6ivdt/qFmEi2AF/NmwKQILEf7Y7aplyFOZYEaMz 1BWoDJn//cDuhe+dOrj8mxC5ju/iVkrFSw30FoacStV+Mr/jMCj94035S5Vu9hnSMfB+slU7sfO QNpH31F7Fjg+5Q7zrNWUsPGorhyFyLcG5uvu8DqzYF3DwF6aajQo4Qm9lvVu+BX13bvbrEaRlHh XGura112IfHUVOVeY0R+b3MOUscIck3WD0G3ypV0LsV2B4ypxIuGbNPhc7sL45YSM2rRtKdnAfO jdWkK5Mg+FAWnA3GDMt+eDFBMLnKZi3myj/iy2AV0zG36GfmzvqPgtZW4awNPtNxnICgtFRrYlz GDf8KLriW1hoqS8Z0WS0lH55z9iQChkPjOqy8C6c14WbB8fgVKgQNg9HyggsuE/HF78vm2Xu8AB Vfsqi0MvZE/M3fyiA4euM3Ua2hgUuIkqtM8mZ968A== X-Received: by 2002:a05:600c:3386:b0:488:a977:8de with SMTP id 5b1f17b1804b1-48a77e64f29mr18307465e9.16.1777368823314; Tue, 28 Apr 2026 02:33:43 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Chao Liu , Tyrone Ting , Hao Wu , Max Filippov , Paolo Bonzini , Peter Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH 1/4] hw/riscv: iommu-trap: remove .impl.unaligned = true Date: Tue, 28 Apr 2026 10:33:36 +0100 Message-ID: <20260428093339.2087081-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260428093339.2087081-1-peter.maydell@linaro.org> References: <20260428093339.2087081-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1777368887677154100 Content-Type: text/plain; charset="utf-8" From: CJ Chen The riscv_iommu_trap_ops MemoryRegionOps specifies that unaligned accesses are not valid for this device but that it does implement them. This doesn't make much sense, and we want to add an assertion that registered MRs don't specify this invalid combination of settings. Drop .impl.unaligned =3D true, with no behaviour change. Signed-off-by: CJ Chen Acked-by: Tomoyuki Hirose Reported-by: Tomoyuki Hirose Reviewed-by: Daniel Henrique Barboza [PMM: reworded commit message] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell Reviewed-by: Alistair Francis Reviewed-by: Nutty Liu Reviewed-by: Peter Xu Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/riscv/riscv-iommu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index c3c9ed6469..f0de264a10 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -2433,7 +2433,6 @@ static const MemoryRegionOps riscv_iommu_trap_ops =3D= { .impl =3D { .min_access_size =3D 4, .max_access_size =3D 8, - .unaligned =3D true, }, .valid =3D { .min_access_size =3D 4, --=20 2.43.0 From nobody Sat May 30 19:26:49 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1777368882; cv=none; d=zohomail.com; s=zohoarc; b=eFlUr5KNjHFvxK5ZS9Uu94U343h8CyIp22DbJEIAn8w7gdSucqYhPJqpjrjIREEXKGkE/b+Ixhqki/Qff+glkzC+MhKhp25qZ+sns4JPKXI3VkZXZVtikEZMefbxX3NMh/U1T+BYIVdQ4yNvcuh8ZnarKK7WN8GQmdpXtvwCxGw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1777368882; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WVC3itSIffFeC7Z8GlSjGgA9Tg3i0GpOS5eY/5lxrn4=; b=iybuIVn1ZHEV5C+suyPYD6HzvlpDzbASz4lFqsUpgYkSwoo3CK9q/TOczG58wDGD73xCmv8ch1IcRfhOZitxTY2By5s2i2Wf+cDjjGTp1h/5uPuy2mPTuJm8XvCvTzRb8FXLInXl71LanGRg/QO0QfS2mDccA0gxkOOLodkyj1g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1777368882015748.4136052416244; Tue, 28 Apr 2026 02:34:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wHepD-0003Qr-4k; Tue, 28 Apr 2026 05:33:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wHep9-0003NR-O5 for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:47 -0400 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wHep8-0007Qo-3c for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:47 -0400 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4890098abbaso88560305e9.0 for ; Tue, 28 Apr 2026 02:33:45 -0700 (PDT) Received: from lanath.. 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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a774d7a1fsm19665595e9.4.2026.04.28.02.33.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Apr 2026 02:33:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1777368824; x=1777973624; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WVC3itSIffFeC7Z8GlSjGgA9Tg3i0GpOS5eY/5lxrn4=; b=rj7zdTA8M/AZW7o8vRqn91sKKqoXjmGfBR0Pv3NXWQh4kjT5S1hNDBT9K8yhs9Quh8 02+Xn0ZBMYwv12pcIjRVo4fN+T8fK4UisSRsBRowVX1tPMu50lzcccMQ6yE9T8UnWf6G FWNYThWxIWBW0E1FX4cPndl1eVfAnNo/TQQxqzLxcbdn6vNB4oU/CrgGwWhQOMxaJduT KwHcb604gg+ACBDtq4iAwA5BSVNKRUd86k1SngxYnXj0EIQ4Tc+2NqZj0eNPibG+Iq9O jw5uquvw+AVsZoEbOZg/By9WQRUmQE67f/krqDOC2jAIYpBFoAEAGOpJhS2HZ3PUqY9P b1ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777368824; x=1777973624; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=WVC3itSIffFeC7Z8GlSjGgA9Tg3i0GpOS5eY/5lxrn4=; b=p2zuq9PEo09PA2UyiPgqWqtVpYeQOOGLak2zZ6CLiG4IVu/6QrXqZG7XJkF14vLhIa vnEdw16A167w9Ft885e8izaKGu9wXv3SJPCMV8qeylOcXQlP4cpLiNmBGdyRHG0x0+bN dFOmIwToYim10kp1cAVlAjEcwDhDaJ4mZE8iqEgSBWoC3o7k54Pq+6Z4meLmwNcTYaSJ CFjQCfGBM2lj+0L7Q/FaJJhm12LzvtnHOYHqbN61aiBQ5uFy4nB82DBUEngNdOoN14VO l/Y3pNkECvOdnx234R9ExqU3VDl2gfeGAc21LeHx64jh1zZ0HMKnFtNQ/i6YfzmZ9nF6 p6Xg== X-Gm-Message-State: AOJu0Yz4ngLdqmO4/s3jtC8RbEaRpugsJu/eBvU40k+3UNFazJ7OiyCu b9SDVrg1kgRFOUrrp7Eji0Hon13K5ebMABx1ICmub+9dlBvGOgamXD8IbSxMB91dkQAP8Ic+Gt6 XGvj5 X-Gm-Gg: AeBDietiL9CEtn5DHEhqCnW6AP2s2RYw6GTr7tVqhHDantxe55KZbA/GJVRzycvptwN +Mb28q3Yx6ET/SKtxJokCQXAX1d6UBjvghPWSuJ4YSJZDMuxl1Kjkj8eMQMTECbKhAwm955OleB bBVh5lhtnc51X38dNtNDY27GiXjR5mvmhWSlkIxVsew0Q+c2+ILT1GPmN306uxdBWvhOt9gD4ZU pGJ/SqyfZZwEwAkQbx/TUs3MBGQ0frHHb4OljTBoSq5J95ZW6HrG0hAElrOkJuBFcZc+Br4Z3mG jC//1EPsegRAH2Vcx+7ecZPyRywwS/ZtZBLOzD/FdSjMeetCzzgZGkQLTRDzDoIjy0S6xonOnA7 ZyFxf3SvXZWnuJqtDwfkr2JN5pxQYmTITjQukjqXoJBIfnbCU6N9hF4XXNXVh2wfg89kOlHadK1 WVsn5tvPsp0HABoAhhI/Bwvq8Vnn+oMRVDbvxAAi8EzBz7Qs0KTJccLdVBkOcGIeTnpoSvATUl6 4Ivbwp3iuJG9fEUc3mGRDXU51GRxb+yDIYR9XVqnw== X-Received: by 2002:a05:600c:6995:b0:488:a2ac:a334 with SMTP id 5b1f17b1804b1-48a77aee4a3mr37301045e9.3.1777368824444; Tue, 28 Apr 2026 02:33:44 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Chao Liu , Tyrone Ting , Hao Wu , Max Filippov , Paolo Bonzini , Peter Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH 2/4] hw/npcm7xx_fiu: Specify .impl for npcm7xx_fiu_flash_ops Date: Tue, 28 Apr 2026 10:33:37 +0100 Message-ID: <20260428093339.2087081-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260428093339.2087081-1-peter.maydell@linaro.org> References: <20260428093339.2087081-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1777368884377158500 Content-Type: text/plain; charset="utf-8" Currently npcm7xx_fiu_flash_ops provides no .impl substruct; this means that it gets the default of "implements 1, 2 and 4 byte aligned accesses". This is more constrained than the device permits in its .valid substruct, and also narrower than the functions are written to handle. Add a .impl substruct matching the .valid substruct; this means that all guest accesses are handled directly by the read and write functions, and are never synthesized by the memory subsystem performing multiple accesses to the device (which would not behave correctly, as these read and write fucntions have side effects). Based-on-a-patch-by: CJ Chen Signed-off-by: Peter Maydell Reviewed-by: Peter Xu --- hw/ssi/npcm7xx_fiu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c index 02707de350..2d5bed005a 100644 --- a/hw/ssi/npcm7xx_fiu.c +++ b/hw/ssi/npcm7xx_fiu.c @@ -250,6 +250,11 @@ static const MemoryRegionOps npcm7xx_fiu_flash_ops =3D= { .read =3D npcm7xx_fiu_flash_read, .write =3D npcm7xx_fiu_flash_write, .endianness =3D DEVICE_LITTLE_ENDIAN, + .impl =3D { + .min_access_size =3D 1, + .max_access_size =3D 8, + .unaligned =3D true, + }, .valid =3D { .min_access_size =3D 1, .max_access_size =3D 8, --=20 2.43.0 From nobody Sat May 30 19:26:49 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1777368907; cv=none; d=zohomail.com; s=zohoarc; b=CaZfHMsnsUeYyOPEbG4Vuo+QawtX8S3TySmP2PPM/KPzWj+2oiUFO4RCFNkyFTNdpmKFdHy96f3Ik2HmVcpDmMJjq7WUts62PTF7nMKlfCiLIQXAB9kGszDkOzy0sjMSGtQhmalTuzrqJRzElDRW3iv0Kqd38Z4TW0T98AyAkAo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1777368907; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pXWD/d404r16/lGHqQwmu63U44AcHTbqHQeSLN0NHAI=; b=gRCWfkvjBnUiHR4DQaBcIMYk7NQJa7gZQrlPgMyc2zrJs4RbA6eMyxpyqJ5DfIIiWOec1BCCSMfGrFUvS0gw3QwfF1Y0Slfvdyg21FUPPe3nEL2L2seSaJv8IDXmjdIwMZcdbUhaG9Vp3vwa3tujBvp6gaK/oSvhPsXjwnBeZRk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1777368907888567.1233280385408; Tue, 28 Apr 2026 02:35:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wHepD-0003RL-E9; Tue, 28 Apr 2026 05:33:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wHepA-0003OF-KX for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:48 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wHep8-0007RH-UJ for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:48 -0400 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-4891cd41959so94716485e9.3 for ; Tue, 28 Apr 2026 02:33:46 -0700 (PDT) Received: from lanath.. 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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a774d7a1fsm19665595e9.4.2026.04.28.02.33.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Apr 2026 02:33:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1777368825; x=1777973625; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pXWD/d404r16/lGHqQwmu63U44AcHTbqHQeSLN0NHAI=; b=nT+It1a1NmzL5tgvnPl0Ws9vdE+3uU38SVqRmpVigU31XRS7NnI5dFI7T24F5QwSGv yZQckBjx48vYaJGGWUmRJ6l4lwf0jjit4rcvMpoMWcW2VuiebF+qZEJDSRMtrXXYJg6Z MmDthAdQ69OoQ9LL7wYkyNUlH/HVNqjoO/rKfelwSsXVhIhHNKKA5eryY3Dj0tL9C3gP TuDJ9b63/x4RTlsFXyrePFXzF/JVOI4U7YUM872mBoF5u/65yTdMkNK+DToqHpYe4oDn ywaScH1j3fxvP44GKcisinlBpERugJzSGOoPItcFldu55J69XiA7g0ASScwjfpqVxxTx tdWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777368825; x=1777973625; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=pXWD/d404r16/lGHqQwmu63U44AcHTbqHQeSLN0NHAI=; b=dawTawO7Zs8L86BGhf0lqRNgilA15rMcM6VbxZ+77Eox6AjkvUspR7OxXzOj+KBK5A DL0kYJiiexrup+Zdb3lzsRW1GEzAwzImq2WXLjhN3phSjoP8m4PYuxTWC+iQaelczyCJ n4fzx7UmNzmPzHtU30TmJvs5iP5lpN1JGgK34trPWwdDgxjpNlLFMGpb4vQoddIx0VGX e/1U0UxgFsnE6MRY39PmHd8B+p3zfzyZGcCqQK5ZgSLOLa+qgUA11jHqV3kmAUurslKd nPPiCZq3vYTPBsPHDnCvPKDgP3A2XylVjeMNcvifQrKzOHN+uoRFEUXoXDkqs8dqHlmd IBEQ== X-Gm-Message-State: AOJu0Yy41gC1f1OTyilHxrcvjP9DWYG1rbRfM3qCyqlUZ6A7+pOKB3WH quKHe5jWUctoNZRHa9WYWU/GSMA1bijXFgz2d+K1yaH5aMCRnOV+2UzidILbyKSh4nbOZKDz94C dyh+W X-Gm-Gg: AeBDieuC668GDTznX2yFOMyHrjZJtcA/x4g4Pez6A+TDxFS1WIeKl96T2mWNZHMHdUM 3vH3AP+29+FMie4YUqO8i0d5zCa2boydpBWfhx9nsjMUpxR30ywIzvYb6CzANZxTbyveyqFKrqg oG+mRbk2pYyE4NUaANIpi/qKyvk7XMsTzoqBAHEc4l8LHb41ZUeHEWCAoZQMMSdkoii0s5IjHyt vS9gRaakPm66po/e137VG6QZ2190UMpciq33216Cko2XpV5KShMxMvAzWuB7cIxud56hOEGrgBZ DSexLf5DdQ4/KaCUk4gP+Xc+wG4AMosbi59uOfLMXh10FDU2ZCOCPlvmrQR8Cv72QgSbmkXapfk aOIgaCCzehqbz8rSmQ6lzjpZNBO14DFvs3x4PZr6HN1gP14TsMGrAR9SU/5xsBttQXF5+0gNtwD B4gDbcfNIRFW2nKx5m5YKaX+Z7vgfjoxCwdbsoCfLQIpzOcrAGfgfGffWeRz3hBfrhIogukiy5j 3106o3u29aIa30E7vWdtacc3U511F7AtlU+8EFRlC4SSl2fvh9L X-Received: by 2002:a05:600c:a311:b0:488:b749:8482 with SMTP id 5b1f17b1804b1-48a77ad59e2mr29036605e9.4.1777368825499; Tue, 28 Apr 2026 02:33:45 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Chao Liu , Tyrone Ting , Hao Wu , Max Filippov , Paolo Bonzini , Peter Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH 3/4] hw/xtensa/mx_pic: Specify xtensa_mx_pic_ops .impl settings Date: Tue, 28 Apr 2026 10:33:38 +0100 Message-ID: <20260428093339.2087081-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260428093339.2087081-1-peter.maydell@linaro.org> References: <20260428093339.2087081-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1777368909482154100 Content-Type: text/plain; charset="utf-8" The xtensa mx-pic interrupt controller has a rather odd register setup, where some registers are 32 bits but are decoded at offsets only one apart from each other. The QEMU implementation handles this correctly, but it did not set .impl.unaligned =3D true. This has worked up til now because QEMU has entirely ignored .impl.unaligned, and just allowed through unaligned accesses when .valid.unaligned is set. To allow the possibility of properly implementing synthesis of unaligned accesses by the memory subsystem when they are valid but the device doesn't implement them, and for clarity of intention, state explicitly that this MR's read and write functions directly handle unaligned accesses, by setting .impl.unaligned =3D true. While we are adjusting the MemoryRegionOps, we set also the minimum and maximum allowed access sizes. Since the only way to get at this device is via the CPU's RER and WER instructions, which always operate at 32-bit sizes (see the HELPER(rer) and HELPER(wer) functions in target/xtensa/op_helper.c), we know we will always get 32-bit accesses. Specify explicitly that that is what is valid and implemented for the MR. Add a comment to clarify that the hardware behaviour here is not "true memory-mapped registers", so the odd-looking implementation is correct. Based-on-a-patch-by: CJ Chen Signed-off-by: Peter Maydell Reviewed-by: Max Filippov Reviewed-by: Peter Xu --- hw/xtensa/mx_pic.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/hw/xtensa/mx_pic.c b/hw/xtensa/mx_pic.c index 07c3731aef..098c1aaf85 100644 --- a/hw/xtensa/mx_pic.c +++ b/hw/xtensa/mx_pic.c @@ -69,6 +69,26 @@ struct XtensaMxPic { } cpu[MX_MAX_CPU]; }; =20 +/* + * Note that decode for these registers is rather strange by the usual + * MMIO standards -- the MIROUT and MIPICAUSE areas can be read and + * written at 32-bit length, returning different values for each byte + * offset, because the low bits of the address are treated as selecting + * an IRQ or a processor: + * + * 00nn 0...0p..p Interrupt Routing, route IRQ n to processo= r p + * 01pp 0...0d..d 16 bits (d) 'ored' as single IPI to proces= sor p + * + * This is because (like x86 IO port in/out accesses) the offset is + * not a memory-mapped address but is really a register number, + * accessed via the Xtensa RER/WER "external register" instructions. + * + * We set .valid and .impl to both allow unaligned =3D true to permit + * these byte-offsets. Because this device is not a true memory mapped + * device but is accessible only via the Xtensa RER/WER "external + * register" interface, all accesses are guaranteed 32 bits. + */ + static uint64_t xtensa_mx_pic_ext_reg_read(void *opaque, hwaddr offset, unsigned size) { @@ -267,7 +287,14 @@ static const MemoryRegionOps xtensa_mx_pic_ops =3D { .read =3D xtensa_mx_pic_ext_reg_read, .write =3D xtensa_mx_pic_ext_reg_write, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + .unaligned =3D true, + }, .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, .unaligned =3D true, }, }; --=20 2.43.0 From nobody Sat May 30 19:26:49 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1777368882; cv=none; d=zohomail.com; s=zohoarc; b=ZBhvXlp/rk9yr+h3xU6OGg1uYYTiKAtQAwmSLFlTQp1TxTf0W12yZ1Ihpve9Npqdwb1dL30YW5M4BbVuoNKbz/X0j5fsIdMe4IDEVp7GZjSMwMi6DfIFi+rAEM1ZRRH+i7tahwJ1/e5OIk+thqbnYQLyAr6oeApLfa+aJYK5QQ4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1777368882; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=oIPgICtUT5mEW768v6oe59XIzNRMnfU3f85R7Lwvkp8=; b=E9fOBz8gxXjLGXfL+ERSZI287Xt/VsAoBne0jhZ47VDvW5gaJWiak2mDmOrh1ACFolUn8sR8TKHWN4pWkQ6QFVetu7k+v3+dTbzv+AeQEx+Eokap+7D53hvfvaleFwWaMR8DaDAvXU/lRENXc+zBwzSuLrjx9Y59U+mciF2Hu6Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1777368882016873.2767722303536; Tue, 28 Apr 2026 02:34:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wHepF-0003Sz-AR; Tue, 28 Apr 2026 05:33:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wHepB-0003Pv-No for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:49 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wHepA-0007Rt-1i for qemu-devel@nongnu.org; Tue, 28 Apr 2026 05:33:49 -0400 Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-488e1a8ac40so137997275e9.2 for ; Tue, 28 Apr 2026 02:33:47 -0700 (PDT) Received: from lanath.. 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The .valid structure indicates that unaligned access should be rejected at the access validation phase, yet .impl suggests the underlying device implementation can handle unaligned operations. As a result, the upper-layer code will never even reach the .impl logic. Add an assertion that the MemoryRegionOps doesn't specify this invalid combination. Signed-off-by: CJ Chen Tested-by: CJ Chen Suggested-by: Peter Xu Acked-by: Tomoyuki Hirose Reviewed-by: Philippe Mathieu-Daud=C3=A9 [PMM: tweaked commit message] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell Reviewed-by: Peter Xu --- system/memory.c | 1 + 1 file changed, 1 insertion(+) diff --git a/system/memory.c b/system/memory.c index 225bbe38c3..739ba11da6 100644 --- a/system/memory.c +++ b/system/memory.c @@ -1573,6 +1573,7 @@ void memory_region_init_io(MemoryRegion *mr, Object *= owner, const MemoryRegionOps *ops, void *opaque, const char *name, uint64_t size) { + g_assert(!ops || !(ops->impl.unaligned && !ops->valid.unaligned)); memory_region_init(mr, owner, name, size); memory_region_set_ops(mr, ops, opaque); } --=20 2.43.0