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Note that we don't permit it on the qemu-aarch64 user-mode binary: this makes no sense as that executable can only handle AArch64 syscalls (and it would also assert at startup since it doesn't compile in the A32-specific GDB xml files like arm-neon.xml). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Cl=C3=A9ment Chigot Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20260416165353.589569-3-peter.maydell@linaro.org --- docs/system/arm/cpu-features.rst | 10 +++++---- target/arm/cpu-features.h | 5 +++++ target/arm/cpu.c | 36 ++++++++++++++++++++++++++++---- tests/qtest/arm-cpu-features.c | 8 ++----- 4 files changed, 45 insertions(+), 14 deletions(-) diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-feature= s.rst index ce19ae6a04..10b0eff27e 100644 --- a/docs/system/arm/cpu-features.rst +++ b/docs/system/arm/cpu-features.rst @@ -23,10 +23,12 @@ not implement ARMv8-A, will not have the ``aarch64`` CP= U property. QEMU's support may be limited for some CPU features, only partially supporting the feature or only supporting the feature under certain configurations. For example, the ``aarch64`` CPU feature, which, when -disabled, enables the optional AArch32 CPU feature, is only supported -when using the KVM accelerator and when running on a host CPU type that -supports the feature. While ``aarch64`` currently only works with KVM, -it could work with TCG. CPU features that are specific to KVM are +disabled, enables the optional AArch32 CPU feature, can only be set to +``off`` on the TCG and KVM accelerators, and it cannot be set to +``off`` under KVM unless running on a host CPU type that supports +running guests in AArch32. + +CPU features that are inherently specific to KVM are prefixed with "kvm-" and are described in "KVM VCPU Features". =20 CPU Feature Probing diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h index b683c9551a..6e5212ff6c 100644 --- a/target/arm/cpu-features.h +++ b/target/arm/cpu-features.h @@ -1071,6 +1071,11 @@ static inline bool isar_feature_aa64_aa32_el2(const = ARMISARegisters *id) return FIELD_EX64_IDREG(id, ID_AA64PFR0, EL2) >=3D 2; } =20 +static inline bool isar_feature_aa64_aa32_el3(const ARMISARegisters *id) +{ + return FIELD_EX64_IDREG(id, ID_AA64PFR0, EL3) >=3D 2; +} + static inline bool isar_feature_aa64_ras(const ARMISARegisters *id) { return FIELD_EX64_IDREG(id, ID_AA64PFR0, RAS) !=3D 0; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 6705ee9db7..9b80dda140 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1244,10 +1244,38 @@ static void aarch64_cpu_set_aarch64(Object *obj, bo= ol value, Error **errp) * uniform execution state like do_interrupt. */ if (value =3D=3D false) { - if (!kvm_enabled() || !kvm_arm_aarch32_supported()) { - error_setg(errp, "'aarch64' feature cannot be disabled " - "unless KVM is enabled and 32-bit EL1 " - "is supported"); + if (kvm_enabled()) { + if (!kvm_arm_aarch32_supported()) { + error_setg(errp, "'aarch64' feature cannot be disabled for= KVM " + "because this host does not support 32-bit EL1"= ); + return; + } + } else if (tcg_enabled()) { +#ifdef CONFIG_USER_ONLY + error_setg(errp, "'aarch64' feature cannot be disabled for " + "usermode emulator qemu-aarch64; use qemu-arm inste= ad"); + return; +#else + bool aa32_at_highest_el; + if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) { + aa32_at_highest_el =3D cpu_isar_feature(aa64_aa32_el3, cpu= ); + } else if (arm_feature(&cpu->env, ARM_FEATURE_EL2)) { + aa32_at_highest_el =3D cpu_isar_feature(aa64_aa32_el2, cpu= ); + } else { + aa32_at_highest_el =3D cpu_isar_feature(aa64_aa32_el1, cpu= ); + } + + if (!aa32_at_highest_el) { + error_setg(errp, "'aarch64' feature cannot be disabled for= " + "this TCG CPU because it does not support 32-bi= t " + "execution at its highest implemented exception= " + "level"); + return; + } +#endif + } else { + error_setg(errp, "'aarch64' feature cannot be disabled for " + "this accelerator"); return; } unset_feature(&cpu->env, ARM_FEATURE_AARCH64); diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index bbdd89a81d..cb4d01fd46 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -493,12 +493,8 @@ static void test_query_cpu_model_expansion(const void = *data) sve_tests_default(qts, "max"); pauth_tests_default(qts, "max"); =20 - /* Test that features that depend on KVM generate errors without. = */ - assert_error(qts, "max", - "'aarch64' feature cannot be disabled " - "unless KVM is enabled and 32-bit EL1 " - "is supported", - "{ 'aarch64': false }"); + /* TCG allows us to turn off AArch64 on the 'max' CPU type */ + assert_set_feature(qts, "max", "aarch64", false); } =20 qtest_quit(qts); --=20 2.43.0