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Sun, 26 Apr 2026 06:45:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org Subject: [PATCH 60/84] fpu: Return struct from parts{64,128}_default_nan Date: Sun, 26 Apr 2026 23:39:37 +1000 Message-ID: <20260426134002.865628-61-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260426134002.865628-1-richard.henderson@linaro.org> References: <20260426134002.865628-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1777211503897154100 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- fpu/softfloat.c | 29 ++++++++++++----------------- fpu/softfloat-parts.c.inc | 22 +++++++++++----------- fpu/softfloat-specialize.c.inc | 22 ++++++++++------------ 3 files changed, 33 insertions(+), 40 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index b857c13d91..fa8913a288 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -2678,7 +2678,7 @@ float32 floatx80_to_float32(floatx80 a, float_status = *s) if (floatx80_unpack_canonical(&p128, a, s)) { p64 =3D parts128_to_parts64(&p128, s); } else { - parts64_default_nan(&p64, s); + p64 =3D parts64_default_nan(s); } return float32_round_pack_canonical(&p64, s); } @@ -2691,7 +2691,7 @@ float64 floatx80_to_float64(floatx80 a, float_status = *s) if (floatx80_unpack_canonical(&p128, a, s)) { p64 =3D parts128_to_parts64(&p128, s); } else { - parts64_default_nan(&p64, s); + p64 =3D parts64_default_nan(s); } return float64_round_pack_canonical(&p64, s); } @@ -2703,7 +2703,7 @@ float128 floatx80_to_float128(floatx80 a, float_statu= s *s) if (floatx80_unpack_canonical(&p, a, s)) { parts128_float_to_float(&p, s); } else { - parts128_default_nan(&p, s); + p =3D parts128_default_nan(s); } return float128_round_pack_canonical(&p, s); } @@ -2964,7 +2964,7 @@ static int32_t floatx80_to_int32_scalbn(floatx80 a, F= loatRoundMode rmode, FloatParts128 p; =20 if (!floatx80_unpack_canonical(&p, a, s)) { - parts128_default_nan(&p, s); + p =3D parts128_default_nan(s); } return parts128_float_to_sint(&p, rmode, scale, INT32_MIN, INT32_MAX, = s); } @@ -2975,7 +2975,7 @@ static int64_t floatx80_to_int64_scalbn(floatx80 a, F= loatRoundMode rmode, FloatParts128 p; =20 if (!floatx80_unpack_canonical(&p, a, s)) { - parts128_default_nan(&p, s); + p =3D parts128_default_nan(s); } return parts128_float_to_sint(&p, rmode, scale, INT64_MIN, INT64_MAX, = s); } @@ -4562,7 +4562,7 @@ static void parts64_log2(FloatParts64 *a, float_statu= s *s, const FloatFmt *fmt) =20 d_nan: float_raise(float_flag_invalid, s); - parts64_default_nan(a, s); + *a =3D parts64_default_nan(s); } =20 float32 float32_log2(float32 a, float_status *status) @@ -4587,45 +4587,40 @@ float64 float64_log2(float64 a, float_status *statu= s) =20 float16 float16_default_nan(float_status *status) { - FloatParts64 p; + FloatParts64 p =3D parts64_default_nan(status); =20 - parts64_default_nan(&p, status); p.frac >>=3D float16_params.frac_shift; return pack_raw64(&p, &float16_params); } =20 float32 float32_default_nan(float_status *status) { - FloatParts64 p; + FloatParts64 p =3D parts64_default_nan(status); =20 - parts64_default_nan(&p, status); p.frac >>=3D float32_params.frac_shift; return pack_raw64(&p, &float32_params); } =20 float64 float64_default_nan(float_status *status) { - FloatParts64 p; + FloatParts64 p =3D parts64_default_nan(status); =20 - parts64_default_nan(&p, status); p.frac >>=3D float64_params.frac_shift; return pack_raw64(&p, &float64_params); } =20 float128 float128_default_nan(float_status *status) { - FloatParts128 p; + FloatParts128 p =3D parts128_default_nan(status); =20 - parts128_default_nan(&p, status); frac128_shr(&p, float128_params.frac_shift); return float128_pack_raw(&p); } =20 bfloat16 bfloat16_default_nan(float_status *status) { - FloatParts64 p; + FloatParts64 p =3D parts64_default_nan(status); =20 - parts64_default_nan(&p, status); p.frac >>=3D bfloat16_params.frac_shift; return pack_raw64(&p, &bfloat16_params); } @@ -5131,7 +5126,7 @@ static void parts_s390_divide_to_integer(FloatParts64= *a, FloatParts64 *b, *n =3D *r; *cc =3D 1; } else if (a->cls =3D=3D float_class_inf || b->cls =3D=3D float_class_= zero) { - parts64_default_nan(r, status); + *r =3D parts64_default_nan(status); *n =3D *r; *cc =3D 1; status->float_exception_flags |=3D float_flag_invalid; diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index 5d344f9afe..ed7080d886 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -21,14 +21,14 @@ static void partsN(return_nan)(FloatPartsN *a, float_st= atus *s) case float_class_snan: float_raise(float_flag_invalid | float_flag_invalid_snan, s); if (s->default_nan_mode) { - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); } else { partsN(silence_nan)(a, s); } break; case float_class_qnan: if (s->default_nan_mode) { - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); } break; default: @@ -49,7 +49,7 @@ static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, Floa= tPartsN *b, } =20 if (s->default_nan_mode) { - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); return a; } =20 @@ -184,7 +184,7 @@ static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN= *a, FloatPartsN *b, return ret; =20 default_nan: - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); return a; } =20 @@ -281,7 +281,7 @@ static void partsN(uncanon_e4m3_overflow)(FloatPartsN *= p, float_status *s, p->exp =3D fmt->exp_max; p->frac_hi =3D E4M3_NORMAL_FRAC_MAX; } else { - partsN(default_nan)(p, s); + *p =3D partsN(default_nan)(s); } } =20 @@ -568,7 +568,7 @@ static FloatPartsN *partsN(addsub)(FloatPartsN *a, Floa= tPartsN *b, } /* Inf - Inf */ float_raise(float_flag_invalid | float_flag_invalid_isi, s); - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); return a; } } else { @@ -641,7 +641,7 @@ static FloatPartsN *partsN(mul)(FloatPartsN *a, FloatPa= rtsN *b, /* Inf * Zero =3D=3D NaN */ if (unlikely(ab_mask =3D=3D float_cmask_infzero)) { float_raise(float_flag_invalid | float_flag_invalid_imz, s); - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); return a; } =20 @@ -796,7 +796,7 @@ static FloatPartsN *partsN(muladd_scalbn)(FloatPartsN *= a, FloatPartsN *b, goto finish_sign; =20 d_nan: - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); return a; } =20 @@ -864,7 +864,7 @@ static FloatPartsN *partsN(div)(FloatPartsN *a, FloatPa= rtsN *b, return a; =20 d_nan: - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); return a; } =20 @@ -896,7 +896,7 @@ static FloatPartsN *partsN(modrem)(FloatPartsN *a, Floa= tPartsN *b, /* Inf % N; N % 0 */ if (a->cls =3D=3D float_class_inf || b->cls =3D=3D float_class_zero) { float_raise(float_flag_invalid, s); - partsN(default_nan)(a, s); + *a =3D partsN(default_nan)(s); return a; } =20 @@ -1118,7 +1118,7 @@ static void partsN(sqrt)(FloatPartsN *a, float_status= *status, =20 d_nan: float_raise(float_flag_invalid | float_flag_invalid_sqrt, status); - partsN(default_nan)(a, status); + *a =3D partsN(default_nan)(status); } =20 /* diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 9ed968c79b..dd65432813 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -118,7 +118,7 @@ static bool parts_is_snan_frac(uint64_t frac, float_sta= tus *status) | The pattern for a default generated deconstructed floating-point NaN. *-------------------------------------------------------------------------= ---*/ =20 -static void parts64_default_nan(FloatParts64 *p, float_status *status) +static FloatParts64 parts64_default_nan(float_status *status) { bool sign =3D 0; uint64_t frac; @@ -134,7 +134,7 @@ static void parts64_default_nan(FloatParts64 *p, float_= status *status) frac =3D deposit64(0, DECOMPOSED_BINARY_POINT - 7, 7, dnan_pattern); frac =3D deposit64(frac, 0, DECOMPOSED_BINARY_POINT - 7, -(dnan_patter= n & 1)); =20 - *p =3D (FloatParts64) { + return (FloatParts64) { .cls =3D float_class_qnan, .sign =3D sign, .exp =3D INT_MAX, @@ -142,17 +142,16 @@ static void parts64_default_nan(FloatParts64 *p, floa= t_status *status) }; } =20 -static void parts128_default_nan(FloatParts128 *p, float_status *status) +static FloatParts128 parts128_default_nan(float_status *status) { /* * Extrapolate from the choices made by parts64_default_nan to fill * in the quad-floating format. If the low bit is set, assume we * want to set all non-snan bits. */ - FloatParts64 p64; - parts64_default_nan(&p64, status); + FloatParts64 p64 =3D parts64_default_nan(status); =20 - *p =3D (FloatParts128) { + return (FloatParts128) { .cls =3D float_class_qnan, .sign =3D p64.sign, .exp =3D INT_MAX, @@ -197,19 +196,18 @@ static void parts128_silence_nan(FloatParts128 *p, fl= oat_status *status) *-------------------------------------------------------------------------= ---*/ floatx80 floatx80_default_nan(float_status *status) { - floatx80 r; /* * Extrapolate from the choices made by parts64_default_nan to fill * in the floatx80 format. We assume that floatx80's explicit * integer bit is always set (this is true for i386 and m68k, * which are the only real users of this format). */ - FloatParts64 p64; - parts64_default_nan(&p64, status); + FloatParts64 p64 =3D parts64_default_nan(status); =20 - r.high =3D 0x7FFF | (p64.sign << 15); - r.low =3D (1ULL << DECOMPOSED_BINARY_POINT) | p64.frac; - return r; + return (floatx80) { + .high =3D 0x7FFF | (p64.sign << 15), + .low =3D (1ULL << DECOMPOSED_BINARY_POINT) | p64.frac, + }; } =20 /*------------------------------------------------------------------------= ---- --=20 2.43.0