From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373458; cv=none; d=zohomail.com; s=zohoarc; b=ec0RyFEAOIqWcpJ5DG3sMTZNFqWa7ukcK3S25LsbuF4qTIgrqnPDShhoYve9B3Sw/6ls2X7n3Lmw0GgLEbsFsQUeRfkluUw7p8XqoKwzSNbGwEF8RNAXyyY1es/uixbIIWfcVlgg/uGY1Uh6tKDwgw59swUMXpfteVQp+Eu/AqE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373458; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FXm2NP147CeyKIOpThO7M80tl+dObaGsiQJnYF8P9/0=; b=IJRXS/Gnbgl9utUvvds3XVsm074FxjeCg2/+oalpICa9468BlM9Fsg7rYpjhgcwVkNRoe9I0PlePKKhtocgB65qxUB5RlAcp0IZzEVHYu3j2x8KIAupq9JX0a11YyVTZlGWj9PQgil34NTt2qE1hDcqgQEvT++2KCr+lE2V1KtU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373458772492.22110317038437; Thu, 16 Apr 2026 14:04:18 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTs8-00006V-Oo; Thu, 16 Apr 2026 17:03:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTrz-0008UU-GK for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:28 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTrw-0000zH-QD for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:27 -0400 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GIRQRP1183760 for ; Thu, 16 Apr 2026 21:03:22 GMT Received: from mail-dy1-f198.google.com (mail-dy1-f198.google.com [74.125.82.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk52jgfe2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:21 +0000 (GMT) Received: by mail-dy1-f198.google.com with SMTP id 5a478bee46e88-2d3a617ad90so29782028eec.0 for ; Thu, 16 Apr 2026 14:03:21 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= FXm2NP147CeyKIOpThO7M80tl+dObaGsiQJnYF8P9/0=; b=dmibAvkgYcidrvPc nKCTzYOJtWfwTL/ISjAkQ5KFYXcB8oVEU63mxgOugfaVUXJLQjKDuawGalw49/Xt c13sKW2B4cslFGfA9He+btAALkK1KZLOcEMov/2utymtL1taIna3+/GNFk0X+2jj pCuSk3z2QRI568yT+qaGl3NbYM/akOqiYTwvwKXpVXX3kweH3DzQgRd97Mfcy0bW zP5k0NOu+JLrm17+rlWpN8PpZ/ZkBQ+/h2MrHMi39U257PM/lPAx/B55zpphp7hn noxgj956hCJogMo8Sf6XzPohKw+MSuQ1xgoYcQzF09nG/4Kz6k7TEgcs2FEPWpaL UNIqpA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373401; x=1776978201; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FXm2NP147CeyKIOpThO7M80tl+dObaGsiQJnYF8P9/0=; b=gO0c0pMknpp1Uh4376M/8kkNzppXU7avtKJaiYK8xjdA2jYmdeCGiuOJ432d5Gp0to hHU0ax7Z+tOf3LKsCiXEXb+rf9UFsj2eznYcjiy44l/W5mnU76ULB9Kmizdt3oVwNhbJ feHxSZDS4a2Z3j/n32uY/CqSAfq1mrqbeSIpUTryG3FFUHdUAGbdJJtzD62rz7Phwawx VHoeYcx4wsot0m5YPy/iLbIPFPu2skLlBXovZceg1cVX6sLWDWeVtc75t0PA+7nsIuFh o68oaim+7fbUiRC55XcjSHPIXeobzMU0i4POuVG4deqH4lo9sftHd5YSd3UgKVnakxV5 py0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373401; x=1776978201; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=FXm2NP147CeyKIOpThO7M80tl+dObaGsiQJnYF8P9/0=; b=PDXdAmJGlfO08DbsMgcNsA1qGiQiElqAdm8f3zI8/Ap0inG+zp6JQws0KBvd80meSr 18W/eq8JjD6+reCXJ0Nh0aRc/bezD9cpKzeYdsA2aWwRkjO2nw+WRzMXMiWiGLBehdxG 8Z6GhMntVlYjQZZdXgtIuDK6Gqxi1Zwd4NyX29q817wPJBeyEU1y7uu2G96v0Mscr0HV AOkSBKJcDyKrxACwXVcuDjvDks77wSpwKeWID4UNN9lFLg5jS/wIvlIczddwcev4Gfxv T6Y2rI8Ftfl1W+t3FrUcSdKVid6q5TFsyHFBfQBNZb46YZt5sBkx5QUvGWC+RaIanrPb JS5g== X-Gm-Message-State: AOJu0Ywq7EUjdW29jubO8exAexNuFYibFAtDWmVfotezt47oxnABwyqA IYvhVYfA/B9zBBZFpZNG1OXxOwN68uZ27b7n5d7k8QyAdFgyAULZxJpWwwBrQnFbksvdTx+bmNF 8ldDJTKnt65UTNmagGaTZ/ZnV6PVzNvQdQ7N7iUAhUeMdNGfgZGcrZEU9/UlO3kkVIA== X-Gm-Gg: AeBDies2uZ5rHW+4RaIRNkyHxEcW36wKfvJ0YWNJfEl5siYhit1EY9fma2BWaeiBQ0z UG2Ae0ag6cVZK4FRM1KYijwVXoPFmbP/MkUWO+GBxSAPhMS3BjukzyCB+mu6lOmUA7L6rQTgCT7 6fWNSOb0OsSjFqlJz4A0gIcs2wHR35+6XBzNqHtUo0em57FOYB5Zt2Tt3Nj3AwjqDoI8bng0GKi WmtkZx4bxw1eqBIGhR4DpaEEkNPGhgQvt52vtAzf7cGpg0hT+TScXAnajbtOnbdeiZ1FY2We36K ckODknC2cTxfwpPfZ8xMzsLWGqj1s2AkNdjO4mSgW65QETWMkDCl8ZXSz1mYR56rCG99jykdLP4 qMPZS1hD1gr8ritxmcoVShoLiRaD8mm6HRm0AvUJNP47Q6XaOj5pKFaz8XlqKL31G60NX7OFILi 1ClZrJ X-Received: by 2002:a05:7300:bc11:b0:2d9:6373:ad22 with SMTP id 5a478bee46e88-2e2e425a9bemr575368eec.12.1776373400458; Thu, 16 Apr 2026 14:03:20 -0700 (PDT) X-Received: by 2002:a05:7300:bc11:b0:2d9:6373:ad22 with SMTP id 5a478bee46e88-2e2e425a9bemr575333eec.12.1776373399762; Thu, 16 Apr 2026 14:03:19 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com Subject: [PATCH v5 1/9] hw/hexagon: Add globalreg model Date: Thu, 16 Apr 2026 14:02:57 -0700 Message-Id: <20260416210305.2255579-2-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=buR8wkai c=1 sm=1 tr=0 ts=69e14e99 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=6TRVr8HvG4iwRA_5R7QA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-GUID: GjWORE23Gu2h2O0Wwk1F5t5a5e9MSUiW X-Proofpoint-ORIG-GUID: GjWORE23Gu2h2O0Wwk1F5t5a5e9MSUiW X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfX9VYP4Dfrq9Bc E9y5GjuwEt3jK64DRkWtyZCt/ygJZUCf3qwddvKl4H8dEevVAQ1NZoqbzr6ijgPwnOMEzl1SEsO p3NWK9CcTeNzsiOBDBsJmeBtsFFIatSHzehoLis5iAGjRzI2tcsY51T7ygJoTErrpZvzH0O44dR FNvoCf6yaXJxUpBjwqanMpgZjolzD5hQlxG+EDy/mD0SgT2c0fYxf3yj6AKFFNDlywrPe3RDhDJ o7RGjxtJ/1D/5Qc++T9TvGGYHed4zZDRmbG/YI+gtr7Nxf8bJaVolPi+7TWM7Qs6EmJ8PJfHig/ 4qOj4Wg0B8JL/z6fnQeoadOzsUxNXNIcezQzIfL+Z58XDy1ScooLTao9mxwuKpP8mXjik5roUyf GyUq9zyu8BGe8ZqVyttusyZwvedDI8Xx5fB/hHeW0IPRQk9NcX4iZB9xDR15ISF2Cfs3+u+Gq4B hwuFl/rWLjr2FeKxYGA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 spamscore=0 malwarescore=0 phishscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373460848158500 Some of the system registers are shared among all threads in the core. This object contains the representation and interface to the system registers. Signed-off-by: Brian Cain Reviewed-by: Sid Manning Acked-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/hexagon/hexagon_globalreg.h | 56 ++++++ hw/hexagon/hexagon_globalreg.c | 240 +++++++++++++++++++++++++ 2 files changed, 296 insertions(+) create mode 100644 include/hw/hexagon/hexagon_globalreg.h create mode 100644 hw/hexagon/hexagon_globalreg.c diff --git a/include/hw/hexagon/hexagon_globalreg.h b/include/hw/hexagon/he= xagon_globalreg.h new file mode 100644 index 00000000000..c9e72f30b0a --- /dev/null +++ b/include/hw/hexagon/hexagon_globalreg.h @@ -0,0 +1,56 @@ +/* + * Hexagon Global Registers QOM Object + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HEXAGON_GLOBALREG_H +#define HEXAGON_GLOBALREG_H + +#include "hw/core/qdev.h" +#include "hw/core/sysbus.h" +#include "qom/object.h" +#include "target/hexagon/cpu.h" + +#define TYPE_HEXAGON_GLOBALREG "hexagon-globalreg" +OBJECT_DECLARE_SIMPLE_TYPE(HexagonGlobalRegState, HEXAGON_GLOBALREG) + +struct HexagonGlobalRegState { + SysBusDevice parent_obj; + + /* Array of system registers */ + uint32_t regs[NUM_SREGS]; + + /* Global performance cycle counter base */ + uint64_t g_pcycle_base; + + /* Properties for global register reset values */ + uint32_t boot_evb; /* Boot Exception Vector Base (HEX_SREG_E= VB) */ + uint64_t config_table_addr; /* Configuration table base */ + uint32_t dsp_rev; /* DSP revision register (HEX_SREG_REV) */ + + /* ISDB properties */ + bool isdben_etm_enable; /* ISDB ETM enable bit */ + bool isdben_dfd_enable; /* ISDB DFD enable bit */ + bool isdben_trusted; /* ISDB trusted mode bit */ + bool isdben_secure; /* ISDB secure mode bit */ +}; + +/* Public interface functions */ +uint32_t hexagon_globalreg_read(HexagonGlobalRegState *s, uint32_t reg, + uint32_t htid); +void hexagon_globalreg_write(HexagonGlobalRegState *s, uint32_t reg, + uint32_t value, uint32_t htid); +uint32_t hexagon_globalreg_masked_value(HexagonGlobalRegState *s, uint32_t= reg, + uint32_t value); +void hexagon_globalreg_write_masked(HexagonGlobalRegState *s, uint32_t reg, + uint32_t value); +void hexagon_globalreg_reset(HexagonGlobalRegState *s); + +/* Global performance cycle counter access */ +uint64_t hexagon_globalreg_get_pcycle_base(HexagonGlobalRegState *s); +void hexagon_globalreg_set_pcycle_base(HexagonGlobalRegState *s, + uint64_t value); + +#endif /* HEXAGON_GLOBALREG_H */ diff --git a/hw/hexagon/hexagon_globalreg.c b/hw/hexagon/hexagon_globalreg.c new file mode 100644 index 00000000000..97e75a2f1ea --- /dev/null +++ b/hw/hexagon/hexagon_globalreg.c @@ -0,0 +1,240 @@ +/* + * Hexagon Global Registers + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "hw/hexagon/hexagon.h" +#include "hw/hexagon/hexagon_globalreg.h" +#include "hw/core/qdev-properties.h" +#include "hw/core/sysbus.h" +#include "hw/core/resettable.h" +#include "migration/vmstate.h" +#include "qom/object.h" +#include "target/hexagon/cpu.h" +#include "target/hexagon/hex_regs.h" +#include "qemu/log.h" +#include "qapi/error.h" + +#define IMMUTABLE (~0) +#define INVALID_REG_VAL 0xdeadbeef + +/* Global system register mutability masks */ +static const uint32_t global_sreg_immut_masks[NUM_SREGS] =3D { + [HEX_SREG_EVB] =3D 0x000000ff, + [HEX_SREG_MODECTL] =3D IMMUTABLE, + [HEX_SREG_SYSCFG] =3D 0x80001c00, + [HEX_SREG_IPENDAD] =3D IMMUTABLE, + [HEX_SREG_VID] =3D 0xfc00fc00, + [HEX_SREG_VID1] =3D 0xfc00fc00, + [HEX_SREG_BESTWAIT] =3D 0xfffffe00, + [HEX_SREG_IAHL] =3D 0x00000000, + [HEX_SREG_SCHEDCFG] =3D 0xfffffee0, + [HEX_SREG_CFGBASE] =3D IMMUTABLE, + [HEX_SREG_DIAG] =3D 0x00000000, + [HEX_SREG_REV] =3D IMMUTABLE, + [HEX_SREG_ISDBST] =3D IMMUTABLE, + [HEX_SREG_ISDBCFG0] =3D 0xe0000000, + [HEX_SREG_BRKPTPC0] =3D 0x00000003, + [HEX_SREG_BRKPTCFG0] =3D 0xfc007000, + [HEX_SREG_BRKPTPC1] =3D 0x00000003, + [HEX_SREG_BRKPTCFG1] =3D 0xfc007000, + [HEX_SREG_ISDBMBXIN] =3D IMMUTABLE, + [HEX_SREG_ISDBMBXOUT] =3D 0x00000000, + [HEX_SREG_ISDBEN] =3D 0xfffffffe, + [HEX_SREG_TIMERLO] =3D IMMUTABLE, + [HEX_SREG_TIMERHI] =3D IMMUTABLE, +}; + +static void hexagon_globalreg_init(Object *obj) +{ + HexagonGlobalRegState *s =3D HEXAGON_GLOBALREG(obj); + + memset(s->regs, 0, sizeof(uint32_t) * NUM_SREGS); +} + +static inline uint32_t apply_write_mask(uint32_t new_val, uint32_t cur_val, + uint32_t reg_mask) +{ + if (reg_mask) { + return (new_val & ~reg_mask) | (cur_val & reg_mask); + } + return new_val; +} + +uint32_t hexagon_globalreg_read(HexagonGlobalRegState *s, uint32_t reg, + uint32_t htid) +{ + uint32_t value; + + g_assert(reg < NUM_SREGS); + g_assert(reg >=3D HEX_SREG_GLB_START); + g_assert(s); + + value =3D s->regs[reg]; + + return value; +} + +void hexagon_globalreg_write(HexagonGlobalRegState *s, uint32_t reg, + uint32_t value, uint32_t htid) +{ + g_assert(s); + g_assert(reg < NUM_SREGS); + g_assert(reg >=3D HEX_SREG_GLB_START); + s->regs[reg] =3D value; +} + +uint32_t hexagon_globalreg_masked_value(HexagonGlobalRegState *s, uint32_t= reg, + uint32_t value) +{ + uint32_t reg_mask; + + g_assert(s); + g_assert(reg < NUM_SREGS); + g_assert(reg >=3D HEX_SREG_GLB_START); + reg_mask =3D global_sreg_immut_masks[reg]; + return reg_mask =3D=3D IMMUTABLE ? + s->regs[reg] : + apply_write_mask(value, s->regs[reg], reg_mask); +} + +void hexagon_globalreg_write_masked(HexagonGlobalRegState *s, uint32_t reg, + uint32_t value) +{ + g_assert(s); + s->regs[reg] =3D hexagon_globalreg_masked_value(s, reg, value); +} + +uint64_t hexagon_globalreg_get_pcycle_base(HexagonGlobalRegState *s) +{ + g_assert(s); + return s->g_pcycle_base; +} + +void hexagon_globalreg_set_pcycle_base(HexagonGlobalRegState *s, + uint64_t value) +{ + g_assert(s); + s->g_pcycle_base =3D value; +} + +static void do_hexagon_globalreg_reset(HexagonGlobalRegState *s) +{ + uint32_t isdben_val =3D 0; + + g_assert(s); + memset(s->regs, 0, sizeof(uint32_t) * NUM_SREGS); + + s->g_pcycle_base =3D 0; + + s->regs[HEX_SREG_EVB] =3D s->boot_evb; + s->regs[HEX_SREG_CFGBASE] =3D HEXAGON_CFG_ADDR_BASE(s->config_table_ad= dr); + s->regs[HEX_SREG_REV] =3D s->dsp_rev; + + if (s->isdben_etm_enable) { + isdben_val |=3D (1 << 0); /* ETM enable bit */ + } + if (s->isdben_dfd_enable) { + isdben_val |=3D (1 << 1); /* DFD enable bit */ + } + if (s->isdben_trusted) { + isdben_val |=3D (1 << 2); /* Trusted bit */ + } + if (s->isdben_secure) { + isdben_val |=3D (1 << 3); /* Secure bit */ + } + s->regs[HEX_SREG_ISDBEN] =3D isdben_val; + s->regs[HEX_SREG_MODECTL] =3D 0x1; + + /* + * These register indices are placeholders in these arrays + * and their actual values are synthesized from state elsewhere. + * We can initialize these with invalid values so that if we + * mistakenly generate reads, they will look obviously wrong. + */ + s->regs[HEX_SREG_PCYCLELO] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PCYCLEHI] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_TIMERLO] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_TIMERHI] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT0] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT1] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT2] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT3] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT4] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT5] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT6] =3D INVALID_REG_VAL; + s->regs[HEX_SREG_PMUCNT7] =3D INVALID_REG_VAL; +} + +void hexagon_globalreg_reset(HexagonGlobalRegState *s) +{ + do_hexagon_globalreg_reset(s); +} + +static void hexagon_globalreg_reset_hold(Object *obj, ResetType type) +{ + HexagonGlobalRegState *s =3D HEXAGON_GLOBALREG(obj); + do_hexagon_globalreg_reset(s); +} + +static const VMStateDescription vmstate_hexagon_globalreg =3D { + .name =3D "hexagon_globalreg", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (const VMStateField[]){ + VMSTATE_UINT32_ARRAY(regs, HexagonGlobalRegState, NUM_SREGS), + VMSTATE_UINT64(g_pcycle_base, HexagonGlobalRegState), + VMSTATE_UINT32(boot_evb, HexagonGlobalRegState), + VMSTATE_UINT64(config_table_addr, HexagonGlobalRegState), + VMSTATE_UINT32(dsp_rev, HexagonGlobalRegState), + VMSTATE_BOOL(isdben_etm_enable, HexagonGlobalRegState), + VMSTATE_BOOL(isdben_dfd_enable, HexagonGlobalRegState), + VMSTATE_BOOL(isdben_trusted, HexagonGlobalRegState), + VMSTATE_BOOL(isdben_secure, HexagonGlobalRegState), + VMSTATE_END_OF_LIST() + } +}; + +static const Property hexagon_globalreg_properties[] =3D { + DEFINE_PROP_UINT32("boot-evb", HexagonGlobalRegState, boot_evb, 0x0), + DEFINE_PROP_UINT64("config-table-addr", HexagonGlobalRegState, + config_table_addr, 0xffffffffULL), + DEFINE_PROP_UINT32("dsp-rev", HexagonGlobalRegState, dsp_rev, 0), + DEFINE_PROP_BOOL("isdben-etm-enable", HexagonGlobalRegState, + isdben_etm_enable, false), + DEFINE_PROP_BOOL("isdben-dfd-enable", HexagonGlobalRegState, + isdben_dfd_enable, false), + DEFINE_PROP_BOOL("isdben-trusted", HexagonGlobalRegState, + isdben_trusted, false), + DEFINE_PROP_BOOL("isdben-secure", HexagonGlobalRegState, + isdben_secure, false), +}; + +static void hexagon_globalreg_class_init(ObjectClass *klass, const void *d= ata) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + rc->phases.hold =3D hexagon_globalreg_reset_hold; + dc->vmsd =3D &vmstate_hexagon_globalreg; + dc->user_creatable =3D false; + device_class_set_props(dc, hexagon_globalreg_properties); +} + +static const TypeInfo hexagon_globalreg_info =3D { + .name =3D TYPE_HEXAGON_GLOBALREG, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(HexagonGlobalRegState), + .instance_init =3D hexagon_globalreg_init, + .class_init =3D hexagon_globalreg_class_init, +}; + +static void hexagon_globalreg_register_types(void) +{ + type_register_static(&hexagon_globalreg_info); +} + +type_init(hexagon_globalreg_register_types) --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373516; cv=none; d=zohomail.com; s=zohoarc; b=jzUZWLcIIUtYjauhvSoG2EnqQSYeoyt2rDpuuW5YUaGG8vMSrvQ0TlzmVp8svTeuWtImq+jg4//CaSIOQSP7/nRb4wQb41nOL9kujqDQpuLnkya97C5vpmDZ/QiXIEhDqCzxHIiIhSVp4KxiH8cOT5AZi8A92ukxm44rRPXDpQA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373516; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=sytLWyaFzhOEjyBtXoq+Txu+tyoVHWOIwByajp2bTvg=; b=IzaaOASkTD6EFttdae5XsL42zZHVcSezZ6xUM2h592wIPfCfq38E/NlUuTrdcOnsEAkVEa8fg9W0+cZ4jZKyuo08yodgYYUE0U00cWBJN1zm9GiG6t9QsnZ2ODARjadjSjZMOoxb/8KNsMd5HZExd/7/edJwTXlb//NOxzXYSl0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373516448614.1333932361118; Thu, 16 Apr 2026 14:05:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTsC-00008w-Dj; Thu, 16 Apr 2026 17:03:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs1-0008UZ-3l for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:30 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTrw-0000zS-Pe for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:28 -0400 Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GGRi0V3197484 for ; Thu, 16 Apr 2026 21:03:22 GMT Received: from mail-dy1-f199.google.com (mail-dy1-f199.google.com [74.125.82.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk3af0xa5-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:22 +0000 (GMT) Received: by mail-dy1-f199.google.com with SMTP id 5a478bee46e88-2ba9a744f7dso11051217eec.0 for ; Thu, 16 Apr 2026 14:03:22 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:content-type:date:from :in-reply-to:message-id:mime-version:references:subject:to; s= qcppdkim1; bh=sytLWyaFzhOEjyBtXoq+Txu+tyoVHWOIwByajp2bTvg=; b=A8 K0OdYKO+IYk88uphDEWVFy7HnHg5iBGJhkgmVVewcklzTYZd59di4EltE6ZfG6wc 8rCs4E7KP46qeqMkZtRFz90tkeGPoax0BDQDBakuPqNppUm26F1exksDKIV2goOC MKVHFkmxaOC5YOYk8Ma4T/ccrGM2IseIiIK7a62KCAJ2YKWnk8RTqanTswewqqeU 6WFHfKRdHw4qJlPHs4hCsX8O7Yn/vl3sC2JcBLuz5sHjykcng0S4AGBTM6avQMZO 1s8Ofbse2WI3fpOOrPB/88Np4zTreswx1+cnchQoWFAbEkTGxtVYbkapiOGlez3v 3i0pkPBnyyCgNBwVQMiw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373402; x=1776978202; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sytLWyaFzhOEjyBtXoq+Txu+tyoVHWOIwByajp2bTvg=; b=KQyCCHiKoJCBur7LGPlA3tjQWTrK3v+FxRLGbKxUE+A6GrtlxjDmh5AN4F9BzgOpRD B/gier/06DJfIXDKUJ7cPFxkJJFpGFoEEmc7ODNof+e4VA0ZwFIKUoDdOZl4xEw34JHR ri9RXvVcXih7aYembijw2dkEgVWqH4zoVJ0W80A58qjTtsNk29CvITq/ju1adFv6tMLy EOp38YNHIJqBO7EKJV7j3hna2VXgFtbb1ozSb608uNbVwXhj62wApFLTQEeX1IuvYL4d GVdBp+PIPJG202Tei1kteTUm11O6q5mIblie+ecBJQDuMm3evS1SrZRMOOekVUkiGo9a /Q4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373402; x=1776978202; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sytLWyaFzhOEjyBtXoq+Txu+tyoVHWOIwByajp2bTvg=; b=AdUidnPkqmHt2SVCOReg9mJ5Uiy0wYFWn6XlZhW49yjEaJx6FwMrZ/5ITZ0qn/ZjYD wJlZoJ76Kf4haERSC/qNSOxyVIanQa+409ZHm6Hd42LwrFX+ceHagNerwaEBNHjhQvEs Yq0OXjwcfspdhCeDNXQxdKu4/fph0th29cub4SDdMOrK3vfjHO/Qo98bDUT58hS3aShz Jwc9AV3gTfgId0dXGJ5+TEDXDRre6Bl9wk8GMrxnMyGtZX4lm7CNfBIRvN47xGO8ifoK DTyX2GdH+0b6z5atrZyqTjLH/gICwRUK/TDtewihUErwqSU7rPW301sDhOeoSX1/5utg qv4A== X-Gm-Message-State: AOJu0YwfnRdpPvuEH3Dwv8iTjvpPC5/ePgDCPA/1MWT+YDHzyx3XWJec R+9KXU0TrrP3REf710pkQrqjGtCuyAQCl0P0xSwQ/fSX8IVwwTMLrmtsuZ38A2KdYz+yi4SQEIF 2C3JAXxE/BofJnNCNDis/EP4fAE3KZdswwhdCgs9nIs1bOac2lOYoZjso3VZVEHMPKQ== X-Gm-Gg: AeBDieuwly0J4BXkS9j9PsMbgkAgeMB3tR99IIyrOsJwp/zBdgpUcclTskD6XVXJ8h+ RvZRGU8O0gy62tYhxfl7hRuFbwchjJQZnk+cTSF1ySj+Foel7/IBbqfFQqkWH4HcE0z7rVeNUV/ ByUbusYJi64yAIKxWf+vNrgkrAaXIGdMyzWIoLtIodgV2+nLmtd0TYCEfBS4yMbXWOgUy3oklPQ dUpBAyzCBy4mq4VB+TnC48tlnhM/Oh3NQa+6eFUaVmrFW0uGZx41B/ISl9wCHwFGaC2nFq2vbiJ 8H/lty/dUZ//RdrKOu52jEhyfGknN18lzyeot4bFI9BHEbdf4H3yFS18Xb08MPAZzUHc6z3due1 floO+Kk2j/q3CHZxP3zEYa2x3u/h4A+2uMjTL7IjoW+c/RnM1jxclVOpVouPRhT9wY5Lg2r+VCh 01zCXM X-Received: by 2002:a05:7300:3247:b0:2ce:54af:778b with SMTP id 5a478bee46e88-2e2e560fdedmr524937eec.26.1776373401563; Thu, 16 Apr 2026 14:03:21 -0700 (PDT) X-Received: by 2002:a05:7300:3247:b0:2ce:54af:778b with SMTP id 5a478bee46e88-2e2e560fdedmr524913eec.26.1776373401004; Thu, 16 Apr 2026 14:03:21 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Subject: [PATCH v5 2/9] hw/hexagon: Add global register tracing Date: Thu, 16 Apr 2026 14:02:58 -0700 Message-Id: <20260416210305.2255579-3-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfX0IiUgqX5ERO1 q1+QIYqRiY9PInZimvE3hZH/LQEFGGgNc3ojJS0wq6Aji050yx4a7/lteCiIvnfypVIs7wsRXfF kWAtD/zquC6j5BaW21trsM2WIsfji34hlaD3jBNLZt6fUiVEd9P/fEVa9WAvNkeDO6J1jB+bJso uwZosMfp8sTMe+SSyDrMQ+VkHy5tOs1t+Y0grXIPhrA6OBRJ3p2AQ/1VnKkJgUbgMbJJQFfhHj8 OXJgRni9JjqYBQW8Z7YCFL6Uz1+h33PA3k1HeTnkfIk9iu3qLqnc8L+Fke7H9hy3VXsOm5kfyrJ dL5uj0ifWs7eGCp8khHPaRDJWGk7JYLBkjeqiqAZsFMDj0Ew4KqKu6DOaPLsrOHmAH24LMf3kIQ ThEo/pOd7rIC3Zn3dK3bz4b0c7lMMdQnCAsyL07YcjO3QAyfNyGcUv4L7mf3/aRWv0OtSuNC1SL JSzYD3qRKNk9Vnms/QA== X-Proofpoint-ORIG-GUID: t7ZFmd90lfEvpDN2nOnCIwtqeFgs6rrH X-Proofpoint-GUID: t7ZFmd90lfEvpDN2nOnCIwtqeFgs6rrH X-Authority-Analysis: v=2.4 cv=DfInbPtW c=1 sm=1 tr=0 ts=69e14e9a cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=8QmChvNvioVktlEtA_0A:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373518390158501 Content-Type: text/plain; charset="utf-8" Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Brian Cain --- meson.build | 1 + hw/hexagon/trace.h | 2 + hw/hexagon/hexagon_globalreg.c | 73 ++++++++++++++++++++++++++++++++++ hw/hexagon/trace-events | 3 ++ 4 files changed, 79 insertions(+) create mode 100644 hw/hexagon/trace.h create mode 100644 hw/hexagon/trace-events diff --git a/meson.build b/meson.build index ab3e97eb9f4..3e4b70956b8 100644 --- a/meson.build +++ b/meson.build @@ -3633,6 +3633,7 @@ if have_system 'hw/display', 'hw/dma', 'hw/fsi', + 'hw/hexagon', 'hw/hyperv', 'hw/i2c', 'hw/i3c', diff --git a/hw/hexagon/trace.h b/hw/hexagon/trace.h new file mode 100644 index 00000000000..9e0b39f3c66 --- /dev/null +++ b/hw/hexagon/trace.h @@ -0,0 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include "trace/trace-hw_hexagon.h" diff --git a/hw/hexagon/hexagon_globalreg.c b/hw/hexagon/hexagon_globalreg.c index 97e75a2f1ea..ddf7a8eb7f2 100644 --- a/hw/hexagon/hexagon_globalreg.c +++ b/hw/hexagon/hexagon_globalreg.c @@ -16,11 +16,82 @@ #include "target/hexagon/cpu.h" #include "target/hexagon/hex_regs.h" #include "qemu/log.h" +#include "trace.h" #include "qapi/error.h" =20 #define IMMUTABLE (~0) #define INVALID_REG_VAL 0xdeadbeef =20 +static const char *hex_sreg_names[] =3D { + [HEX_SREG_SGP0] =3D "sgp0", + [HEX_SREG_SGP1] =3D "sgp1", + [HEX_SREG_STID] =3D "stid", + [HEX_SREG_ELR] =3D "elr", + [HEX_SREG_BADVA0] =3D "badva0", + [HEX_SREG_BADVA1] =3D "badva1", + [HEX_SREG_SSR] =3D "ssr", + [HEX_SREG_CCR] =3D "ccr", + [HEX_SREG_HTID] =3D "htid", + [HEX_SREG_BADVA] =3D "badva", + [HEX_SREG_IMASK] =3D "imask", + [HEX_SREG_GEVB] =3D "gevb", + [HEX_SREG_EVB] =3D "evb", + [HEX_SREG_MODECTL] =3D "modectl", + [HEX_SREG_SYSCFG] =3D "syscfg", + [HEX_SREG_IPENDAD] =3D "ipendad", + [HEX_SREG_VID] =3D "vid", + [HEX_SREG_VID1] =3D "vid1", + [HEX_SREG_BESTWAIT] =3D "bestwait", + [HEX_SREG_IEL] =3D "iel", + [HEX_SREG_SCHEDCFG] =3D "schedcfg", + [HEX_SREG_IAHL] =3D "iahl", + [HEX_SREG_CFGBASE] =3D "cfgbase", + [HEX_SREG_DIAG] =3D "diag", + [HEX_SREG_REV] =3D "rev", + [HEX_SREG_PCYCLELO] =3D "pcyclelo", + [HEX_SREG_PCYCLEHI] =3D "pcyclehi", + [HEX_SREG_ISDBST] =3D "isdbst", + [HEX_SREG_ISDBCFG0] =3D "isdbcfg0", + [HEX_SREG_ISDBCFG1] =3D "isdbcfg1", + [HEX_SREG_LIVELOCK] =3D "livelock", + [HEX_SREG_BRKPTPC0] =3D "brkptpc0", + [HEX_SREG_BRKPTCFG0] =3D "brkptcfg0", + [HEX_SREG_BRKPTPC1] =3D "brkptpc1", + [HEX_SREG_BRKPTCFG1] =3D "brkptcfg1", + [HEX_SREG_ISDBMBXIN] =3D "isdbmbxin", + [HEX_SREG_ISDBMBXOUT] =3D "isdbmbxout", + [HEX_SREG_ISDBEN] =3D "isdben", + [HEX_SREG_ISDBGPR] =3D "isdbgpr", + [HEX_SREG_PMUCNT4] =3D "pmucnt4", + [HEX_SREG_PMUCNT5] =3D "pmucnt5", + [HEX_SREG_PMUCNT6] =3D "pmucnt6", + [HEX_SREG_PMUCNT7] =3D "pmucnt7", + [HEX_SREG_PMUCNT0] =3D "pmucnt0", + [HEX_SREG_PMUCNT1] =3D "pmucnt1", + [HEX_SREG_PMUCNT2] =3D "pmucnt2", + [HEX_SREG_PMUCNT3] =3D "pmucnt3", + [HEX_SREG_PMUEVTCFG] =3D "pmuevtcfg", + [HEX_SREG_PMUSTID0] =3D "pmustid0", + [HEX_SREG_PMUEVTCFG1] =3D "pmuevtcfg1", + [HEX_SREG_PMUSTID1] =3D "pmustid1", + [HEX_SREG_TIMERLO] =3D "timerlo", + [HEX_SREG_TIMERHI] =3D "timerhi", + [HEX_SREG_PMUCFG] =3D "pmucfg", + [HEX_SREG_S59] =3D "s59", + [HEX_SREG_S60] =3D "s60", + [HEX_SREG_S61] =3D "s61", + [HEX_SREG_S62] =3D "s62", + [HEX_SREG_S63] =3D "s63", +}; + +static const char *get_sreg_name(uint32_t reg) +{ + if (reg < ARRAY_SIZE(hex_sreg_names) && hex_sreg_names[reg]) { + return hex_sreg_names[reg]; + } + return "UNKNOWN"; +} + /* Global system register mutability masks */ static const uint32_t global_sreg_immut_masks[NUM_SREGS] =3D { [HEX_SREG_EVB] =3D 0x000000ff, @@ -75,6 +146,7 @@ uint32_t hexagon_globalreg_read(HexagonGlobalRegState *s= , uint32_t reg, =20 value =3D s->regs[reg]; =20 + trace_hexagon_globalreg_read(htid, get_sreg_name(reg), value); return value; } =20 @@ -85,6 +157,7 @@ void hexagon_globalreg_write(HexagonGlobalRegState *s, u= int32_t reg, g_assert(reg < NUM_SREGS); g_assert(reg >=3D HEX_SREG_GLB_START); s->regs[reg] =3D value; + trace_hexagon_globalreg_write(htid, get_sreg_name(reg), value); } =20 uint32_t hexagon_globalreg_masked_value(HexagonGlobalRegState *s, uint32_t= reg, diff --git a/hw/hexagon/trace-events b/hw/hexagon/trace-events new file mode 100644 index 00000000000..5d623ed2516 --- /dev/null +++ b/hw/hexagon/trace-events @@ -0,0 +1,3 @@ +# Hexagon global register access +hexagon_globalreg_read(uint32_t htid, const char *reg_name, uint32_t value= ) "htid=3D%u reg=3D%s value=3D0x%x" +hexagon_globalreg_write(uint32_t htid, const char *reg_name, uint32_t valu= e) "htid=3D%u reg=3D%s value=3D0x%x" --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373504; cv=none; d=zohomail.com; s=zohoarc; b=O1LMbsmedh2PHNihecLdUkf/uoczGWBjfcpKGqpiWcZLo6mJJ4IYgYw7sFy86XSKARlwmIi+xraxuMfRseWv2jGbVLj6dfqSAi/e963rFSPxDO5kK2GoOEthcGcSpQLPOSZFOG8RM461y6tEZx/UTVNa+m3BpIdFs81UqYWTHJE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373504; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2gAJHG29yXYiukx1dooApyN37WdqyzUq2yKegUdzoQ0=; b=lJ8Ve0Jer3zmtRrNNMumul7KaShp+X4ebbmB6di2shBOyWAaJ/ChLanW9+DK7lmwMqWw+GrIWE35RcNrC4UUAf1ewn5XxDHpFh8M1QYGxSj8r8LCSIh5coObaRyyt+1r8HY4+OnALdc1ojBAxJkBJ0uoC0zmJoaewD0zPgPfhD8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373504436793.6732830234033; Thu, 16 Apr 2026 14:05:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTsB-00008p-7y; Thu, 16 Apr 2026 17:03:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs2-0008Un-Jw for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:32 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTry-0000ze-8m for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:29 -0400 Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GFe2wS702620 for ; Thu, 16 Apr 2026 21:03:24 GMT Received: from mail-dy1-f200.google.com (mail-dy1-f200.google.com [74.125.82.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk2kn96mn-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:24 +0000 (GMT) Received: by mail-dy1-f200.google.com with SMTP id 5a478bee46e88-2c0ba59a830so10924565eec.0 for ; Thu, 16 Apr 2026 14:03:24 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 2gAJHG29yXYiukx1dooApyN37WdqyzUq2yKegUdzoQ0=; b=io3LwxosdB7628pQ rNNR49x3w6YiN5ZkQFAcHTqj8kBPVDFrDi0Sgkb3bTHcSOMf9YFn9gr0kjNw9zXK 74QhCPThuZOvbxgUNELZwi2+qRR6DJC/7kdQ3Cy6Kp5eyTKuMc+DS/ueWUeHYUIh An23KvmlKLjMl7aNcxDxdrfOAoQmZr47hxoqRH7zdnscrf2dYiQaxMXVJMiCdspN usx1kTXhdnILjCm4ryrEtWJbu/53mCJMni6pahXLr5CYZaXuJ4A2Acj09z/BrvBP CPNpDMHlkRHtFNb2wpZp/0wLwRT7hmrylfJ6Zwp2zW7ohigJ7KPqhcywdeSHCL1o 7dcSkQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373403; x=1776978203; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2gAJHG29yXYiukx1dooApyN37WdqyzUq2yKegUdzoQ0=; b=f3FH5P0/evWBBnGuiQIJpan3DNQ6DX5jabORZKjWBuI0fkehwlc8uiqMhH5lziedkP FZINnlqTfkEwSMsSqE4NIh/up9j1qDFmtddCWH/3h4C+2jxToYZF5XXfqCu3KvT4WY6F 6eQ6inUfb2RpHGm+mIXTFT7cJklymSFweGFCqRnaCV6ghNZ1Ld7b28Hh+sPRR2n2UT2l S3R9MYVkpb5WzKr3N58Xp8X5heuqdo7cXYD7Fwn6UGgK08bGYIXf/foj9ZZV/hzlZM0Q 7iqSyP+qOHjWZQlF4hQyWKg6S7KqHM2wnNIGSJlYLufQNrODubUWkA+TMu3GKm0vn6YG R68A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373403; x=1776978203; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=2gAJHG29yXYiukx1dooApyN37WdqyzUq2yKegUdzoQ0=; b=BgO1u2hr7qsJFAZh/WNIib6xieohieTbbZQRw2Rw/LcCd0qNlSQ4MgH9kC2fCYiXvo 2EQ7IyotrsmH0W4dtXy4yUV5Uq8tbqLVgmMyo7uZLCORyJDPtdrVVSfMvwFb5HioipLk KzlkLmvY4xZiQsEnwy/JYf2g7P+zPWbGotUz2uisaPG8AwKJiVFAG97wPhTCl55ZKQtj Rla2WJX8+wutu5xO830gKu/c30lzrt4Qbr/pRYexYc9Vg4dy2fixYUZuf47fvrB5YyQn 2XpiquMcQdPkp/QyEaMR2JKKqQRy42nnTOaJp1Rhv09qEz106qjUJzRpz00bxEQQJkWG rZTA== X-Gm-Message-State: AOJu0YwlH5pSwuoraFi6auMgtqphGPJuyB964Dl+s0GuzoTWd7cioco0 9tlIXOuIztS6wV5VW/9uvQdVF6YfasSOI2cqkAwqwyFxKH/6ps64l7tjIOy4ECj4gnPmj+WNJny eZWuiYo48qkVQZ0YP9pmH2djgPJJz1ax74jHYUC2cD9vp2cPHFN/hXZRdoMcrgpTqqg== X-Gm-Gg: AeBDiesbnZa32AcKArVR2lHwWmrKX18IcegREZ7zSs/dDk8STcMpoTdllaMZ6BmHXgW J+srhCMUVKGievt13ySmTvj3YZzwvzaFSyvbccKbMBBhxEI/jH2Q3kx+DBG0NZZWZFYaE/uXLvI TeRrlZYeFX0mlXWly09ommUJEtmTGFw0HHnoCxC90Vsq4VAfv2nbKAKc7d1vFBj1zPHxtHj3jta uUJe9E2tSYvRX0VtbT8jFrK13OwbMvtwesBqjSIxF+bjag5Ebix9MblbI2wKY4g3wLdq0RsV9Cg 30mKU27ISDqffw7UHA+PJe/wCzOv05ZyO5lnmtlUTq2MqnqYC80pvSzx4OiOi1gHxO459Zl+3x5 ldLGZuBgaJfia/csa076JXbbqMgz52HolSeUZGiHtr/9uK6B+86FQeBKQ+fx+ZbpSvsXZ/PTaZX i3fLIR X-Received: by 2002:a05:693c:2b15:b0:2be:7fc2:fc38 with SMTP id 5a478bee46e88-2e2e3976577mr537885eec.5.1776373402847; Thu, 16 Apr 2026 14:03:22 -0700 (PDT) X-Received: by 2002:a05:693c:2b15:b0:2be:7fc2:fc38 with SMTP id 5a478bee46e88-2e2e3976577mr537851eec.5.1776373402201; Thu, 16 Apr 2026 14:03:22 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Brian Cain , Markus Armbruster , Mike Lambert , Sid Manning , Paolo Bonzini , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Subject: [PATCH v5 3/9] hw/hexagon: Add machine configs for sysemu Date: Thu, 16 Apr 2026 14:02:59 -0700 Message-Id: <20260416210305.2255579-4-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: CN6rbK0tLrrKYnwiBsCgh115IUTVUVOU X-Authority-Analysis: v=2.4 cv=XNoAjwhE c=1 sm=1 tr=0 ts=69e14e9c cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=COk6AnOGAAAA:8 a=20KFwNOVAAAA:8 a=EUspDBNiAAAA:8 a=zDswL77RPfrYyX9IZBQA:9 a=hiJlUhq8NronkB9Q:21 a=QEXdDO2ut3YA:10 a=6Ab_bkdmUrQuMsNx7PHu:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: CN6rbK0tLrrKYnwiBsCgh115IUTVUVOU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfX+66uTlEOMYqd Y9rez5aYsPFNMgfM2HZHDVaEa1bQ1lJkFQ2W2B9higJQIrKPffyFHKIF+IMO7XVOq7HCxqPfakf x2xe0TXyyXEBxeu5vGhhhVs6ZVni33hFbTfxDJLAuas9cUeUokEnhhpkJDR63pkUsdHG3pjDTOx LPx2C2wjFb2RXfnRwI587wxfMcz2HNHRMFNCCt5iMQh3/PyJi5v2cMGYJgqEwyXjoNwSahPc25r JnZUWqyw3rDDMxbGikYjh8CJUY7m49cSQrt+0VKXnCAtkdBl7rup63hjvIxNWZj0xIEEJLx3HBt v+p740zMz9Y843BTDEknOb0rE9N+o6P1DJaxdZbeLWbponLVroGG7JobLlY/2Q1T2hHZuciD0II 8PMNyBylUdz4XDC5U1dWcORMPKr4w6zrztGx+ynw0lgNMbNbbzLPd9DVml+ETOHiyLxv+/VMCKo 5kRSWs2RA1kVHUBw7Ag== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 priorityscore=1501 suspectscore=0 spamscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373506576158500 From: Brian Cain Some header includes are modified here: these are uniquely required for basic system emulation functionality and had not been required for linux-us= er. Acked-by: Markus Armbruster Co-authored-by: Mike Lambert Co-authored-by: Sid Manning Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier --- MAINTAINERS | 2 + include/hw/hexagon/hexagon.h | 150 +++++++++++++++++++++++ hw/hexagon/machine_cfg_v66g_1024.h.inc | 64 ++++++++++ hw/hexagon/hexagon_dsp.c | 161 +++++++++++++++++++++++++ system/qdev-monitor.c | 2 +- target/hexagon/translate.c | 1 + hw/Kconfig | 1 + hw/hexagon/Kconfig | 4 + hw/hexagon/meson.build | 6 + hw/meson.build | 1 + 10 files changed, 391 insertions(+), 1 deletion(-) create mode 100644 include/hw/hexagon/hexagon.h create mode 100644 hw/hexagon/machine_cfg_v66g_1024.h.inc create mode 100644 hw/hexagon/hexagon_dsp.c create mode 100644 hw/hexagon/Kconfig create mode 100644 hw/hexagon/meson.build diff --git a/MAINTAINERS b/MAINTAINERS index 4055fbe3c21..b9a7c553dfa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -246,6 +246,8 @@ Hexagon TCG CPUs M: Brian Cain S: Supported F: target/hexagon/ +F: hw/hexagon/ +F: include/hw/hexagon/ X: target/hexagon/idef-parser/ X: target/hexagon/gen_idef_parser_funcs.py F: linux-user/hexagon/ diff --git a/include/hw/hexagon/hexagon.h b/include/hw/hexagon/hexagon.h new file mode 100644 index 00000000000..996f5423c39 --- /dev/null +++ b/include/hw/hexagon/hexagon.h @@ -0,0 +1,150 @@ +/* + * Hexagon Baseboard System emulation. + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + + +#ifndef HW_HEXAGON_H +#define HW_HEXAGON_H + +#include "system/memory.h" + +struct hexagon_board_boot_info { + uint64_t ram_size; + const char *kernel_filename; + uint32_t kernel_elf_flags; +}; + +typedef enum { + unknown_rev =3D 0, + v66_rev =3D 0xa666, + v67_rev =3D 0x2667, + v68_rev =3D 0x8d68, + v69_rev =3D 0x8c69, + v71_rev =3D 0x8c71, + v73_rev =3D 0x8c73, + v73m_rev =3D 0xcc73, +} Rev_t; +#define HEXAGON_LATEST_REV v73 +#define HEXAGON_LATEST_REV_UPPER V73 + +/* + * Config table address bases represent bits [35:16]. + */ +#define HEXAGON_CFG_ADDR_BASE(addr) (((addr) >> 16) & 0x0fffff) + +#define HEXAGON_CFGSPACE_ENTRIES (128) + +union hexagon_config_table { + struct { + /* Base address of L2TCM space */ + uint32_t l2tcm_base; + uint32_t reserved0; + /* Base address of subsystem space */ + uint32_t subsystem_base; + /* Base address of ETM space */ + uint32_t etm_base; + /* Base address of L2 configuration space */ + uint32_t l2cfg_base; + uint32_t reserved1; + /* Base address of L1S */ + uint32_t l1s0_base; + /* Base address of AXI2 */ + uint32_t axi2_lowaddr; + /* Base address of streamer base */ + uint32_t streamer_base; + uint32_t reserved2; + /* Base address of fast L2VIC */ + uint32_t fastl2vic_base; + /* Number of entries in JTLB */ + uint32_t jtlb_size_entries; + /* Coprocessor type */ + uint32_t coproc_present; + /* Number of extension execution contexts available */ + uint32_t ext_contexts; + /* Base address of Hexagon Vector Tightly Coupled Memory (VTCM) */ + uint32_t vtcm_base; + /* Size of VTCM (in KB) */ + uint32_t vtcm_size_kb; + /* L2 tag size */ + uint32_t l2tag_size; + /* Amount of physical L2 memory in released version */ + uint32_t l2ecomem_size; + /* Hardware threads available on the core */ + uint32_t thread_enable_mask; + /* Base address of the ECC registers */ + uint32_t eccreg_base; + /* L2 line size */ + uint32_t l2line_size; + /* Small Core processor (also implies audio extension) */ + uint32_t tiny_core; + /* Size of L2TCM */ + uint32_t l2itcm_size; + /* Base address of L2-ITCM */ + uint32_t l2itcm_base; + uint32_t reserved3; + /* DTM is present */ + uint32_t dtm_present; + /* Version of the DMA */ + uint32_t dma_version; + /* Native HVX vector length in log of bytes */ + uint32_t hvx_vec_log_length; + /* Core ID of the multi-core */ + uint32_t core_id; + /* Number of multi-core cores */ + uint32_t core_count; + uint32_t coproc2_reg0; + uint32_t coproc2_reg1; + /* Supported HVX vector length */ + uint32_t v2x_mode; + uint32_t coproc2_reg2; + uint32_t coproc2_reg3; + uint32_t coproc2_reg4; + uint32_t coproc2_reg5; + uint32_t coproc2_reg6; + uint32_t coproc2_reg7; + /* Voltage droop mitigation technique parameter */ + uint32_t acd_preset; + /* Voltage droop mitigation technique parameter */ + uint32_t mnd_preset; + /* L1 data cache size (in KB) */ + uint32_t l1d_size_kb; + /* L1 instruction cache size in (KB) */ + uint32_t l1i_size_kb; + /* L1 data cache write policy: see HexagonL1WritePolicy */ + uint32_t l1d_write_policy; + /* VTCM bank width */ + uint32_t vtcm_bank_width; + uint32_t reserved4; + uint32_t reserved5; + uint32_t reserved6; + uint32_t coproc2_cvt_mpy_size; + uint32_t consistency_domain; + uint32_t capacity_domain; + uint32_t axi3_lowaddr; + uint32_t coproc2_int8_subcolumns; + uint32_t corecfg_present; + uint32_t coproc2_fp16_acc_exp; + uint32_t AXIM2_secondary_base; + }; + uint32_t raw[HEXAGON_CFGSPACE_ENTRIES]; +}; + +struct hexagon_machine_config { + /* Base address of config table */ + uint32_t cfgbase; + /* Size of L2 TCM */ + uint32_t l2tcm_size; + /* Base address of L2VIC */ + uint32_t l2vic_base; + /* Size of L2VIC region */ + uint32_t l2vic_size; + /* QTimer csr base */ + uint32_t csr_base; + uint32_t qtmr_region; + union hexagon_config_table cfgtable; +}; + +#endif diff --git a/hw/hexagon/machine_cfg_v66g_1024.h.inc b/hw/hexagon/machine_cf= g_v66g_1024.h.inc new file mode 100644 index 00000000000..cc4d89b89c9 --- /dev/null +++ b/hw/hexagon/machine_cfg_v66g_1024.h.inc @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +static const struct hexagon_machine_config v66g_1024 =3D { + .cfgbase =3D 0xd8180000, + .l2tcm_size =3D 0x00000000, + .l2vic_base =3D 0xfc910000, + .l2vic_size =3D 0x00001000, + .csr_base =3D 0xfc900000, + .qtmr_region =3D 0xfc921000, + .cfgtable =3D { + .l2tcm_base =3D 0x0000d800, + .reserved0 =3D 0x0000d400, + .subsystem_base =3D 0x0000fc90, + .etm_base =3D 0x0000d805, + .l2cfg_base =3D 0x0000d81a, + .reserved1 =3D 0x00000000, + .l1s0_base =3D 0x0000d820, + .axi2_lowaddr =3D 0x00003000, + .streamer_base =3D 0x00000000, + .reserved2 =3D 0x0000d819, + .fastl2vic_base =3D 0x0000d81e, + .jtlb_size_entries =3D 0x00000080, + .coproc_present =3D 0x00000001, + .ext_contexts =3D 0x00000004, + .vtcm_base =3D 0x0000d820, + .vtcm_size_kb =3D 0x00000100, + .l2tag_size =3D 0x00000400, + .l2ecomem_size =3D 0x00000400, + .thread_enable_mask =3D 0x0000000f, + .eccreg_base =3D 0x0000d81f, + .l2line_size =3D 0x00000080, + .tiny_core =3D 0x00000000, + .l2itcm_size =3D 0x00000000, + .l2itcm_base =3D 0x0000d820, + .reserved3 =3D 0x00000000, + .dtm_present =3D 0x00000000, + .dma_version =3D 0x00000000, + .hvx_vec_log_length =3D 0x00000080, + .core_id =3D 0x00000000, + .core_count =3D 0x00000000, + .coproc2_reg0 =3D 0x00000000, + .coproc2_reg1 =3D 0x00000000, + .v2x_mode =3D 0x00000000, + .coproc2_reg2 =3D 0x00000000, + .coproc2_reg3 =3D 0x00000000, + .coproc2_reg4 =3D 0x00000000, + .coproc2_reg5 =3D 0x00000000, + .coproc2_reg6 =3D 0x00000000, + .coproc2_reg7 =3D 0x00000000, + .acd_preset =3D 0x00000000, + .mnd_preset =3D 0x00000000, + .l1d_size_kb =3D 0x00000000, + .l1i_size_kb =3D 0x00000000, + .l1d_write_policy =3D 0x00000000, + .vtcm_bank_width =3D 0x00000000, + .reserved4 =3D 0x00000000, + .reserved5 =3D 0x00000000, + .reserved6 =3D 0x00000000, + .coproc2_cvt_mpy_size =3D 0x00000000, + .consistency_domain =3D 0x00000000, + .capacity_domain =3D 0x00000000, + .axi3_lowaddr =3D 0x00000000, + }, +}; diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c new file mode 100644 index 00000000000..d5df87605f4 --- /dev/null +++ b/hw/hexagon/hexagon_dsp.c @@ -0,0 +1,161 @@ +/* + * Hexagon DSP Subsystem emulation. This represents a generic DSP + * subsystem with few peripherals, like the Compute DSP. + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + + +#include "qemu/osdep.h" +#include "qemu/units.h" +#include "system/address-spaces.h" +#include "hw/core/boards.h" +#include "hw/core/qdev-properties.h" +#include "hw/hexagon/hexagon.h" +#include "hw/hexagon/hexagon_globalreg.h" +#include "hw/core/loader.h" +#include "qapi/error.h" +#include "qemu/error-report.h" +#include "qemu/log.h" +#include "elf.h" +#include "cpu.h" +#include "migration/cpu.h" +#include "system/system.h" +#include "target/hexagon/internal.h" +#include "system/reset.h" + +#include "machine_cfg_v66g_1024.h.inc" + +static void hex_symbol_callback(const char *st_name, int st_info, + uint64_t st_value, uint64_t st_size) +{ +} + +/* Board init. */ +static struct hexagon_board_boot_info hexagon_binfo; + +static void hexagon_load_kernel(HexagonCPU *cpu) +{ + uint64_t pentry; + long kernel_size; + + kernel_size =3D load_elf_ram_sym(hexagon_binfo.kernel_filename, NULL, = NULL, + NULL, &pentry, NULL, NULL, + &hexagon_binfo.kernel_elf_flags, 0, EM_HEXAGON, 0, 0, + &address_space_memory, false, hex_symbol_callback); + + if (kernel_size <=3D 0) { + error_report("no kernel file '%s'", + hexagon_binfo.kernel_filename); + exit(1); + } + + qdev_prop_set_uint32(DEVICE(cpu), "exec-start-addr", pentry); +} + +static void hexagon_init_bootstrap(MachineState *machine, HexagonCPU *cpu) +{ + if (machine->kernel_filename) { + hexagon_load_kernel(cpu); + } +} + +static void do_cpu_reset(void *opaque) +{ + HexagonCPU *cpu =3D opaque; + CPUState *cs =3D CPU(cpu); + cpu_reset(cs); +} + +static void hexagon_common_init(MachineState *machine, Rev_t rev, + const struct hexagon_machine_config *m_cfg) +{ + MemoryRegion *address_space; + MemoryRegion *sram; + DeviceState *glob_regs_dev; + + memset(&hexagon_binfo, 0, sizeof(hexagon_binfo)); + if (machine->kernel_filename) { + hexagon_binfo.ram_size =3D machine->ram_size; + hexagon_binfo.kernel_filename =3D machine->kernel_filename; + } + + machine->enable_graphics =3D 0; + + address_space =3D get_system_memory(); + + sram =3D g_new(MemoryRegion, 1); + memory_region_init_ram(sram, NULL, "ddr.ram", + machine->ram_size, &error_fatal); + memory_region_add_subregion(address_space, 0x0, sram); + + glob_regs_dev =3D qdev_new(TYPE_HEXAGON_GLOBALREG); + qdev_prop_set_uint64(glob_regs_dev, "config-table-addr", m_cfg->cfgbas= e); + sysbus_realize_and_unref(SYS_BUS_DEVICE(glob_regs_dev), &error_fatal); + + for (int i =3D 0; i < machine->smp.cpus; i++) { + HexagonCPU *cpu =3D HEXAGON_CPU(object_new(machine->cpu_type)); + qemu_register_reset(do_cpu_reset, cpu); + + /* + * CPU #0 is the only CPU running at boot, others must be + * explicitly enabled via start instruction. + */ + qdev_prop_set_bit(DEVICE(cpu), "start-powered-off", (i !=3D 0)); + if (i =3D=3D 0) { + hexagon_init_bootstrap(machine, cpu); + if (!qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal)) { + return; + } + } else if (!qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal= )) { + return; + } + + } +} + +static void init_mc(MachineClass *mc) +{ + mc->block_default_type =3D IF_SD; + mc->default_ram_size =3D 4 * GiB; + mc->no_parallel =3D 1; + mc->no_floppy =3D 1; + mc->no_cdrom =3D 1; + mc->no_serial =3D 1; + mc->is_default =3D false; + mc->max_cpus =3D 8; +} + +/* ----------------------------------------------------------------- */ +/* Core-specific configuration settings are defined below this line. */ +/* Config table values defined in machine_configs.h.inc */ +/* ----------------------------------------------------------------- */ + +static void v66g_1024_config_init(MachineState *machine) +{ + hexagon_common_init(machine, v66_rev, &v66g_1024); +} + +static void v66g_1024_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + + mc->desc =3D "Hexagon V66G_1024"; + mc->init =3D v66g_1024_config_init; + init_mc(mc); + mc->is_default =3D true; + mc->default_cpu_type =3D TYPE_HEXAGON_CPU_V66; + mc->default_cpus =3D 4; +} + +static const TypeInfo hexagon_machine_types[] =3D { + { + .name =3D MACHINE_TYPE_NAME("V66G_1024"), + .parent =3D TYPE_MACHINE, + .class_init =3D v66g_1024_init, + }, +}; + +DEFINE_TYPES(hexagon_machine_types) diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c index 1ac6d9a8575..72abc9182a9 100644 --- a/system/qdev-monitor.c +++ b/system/qdev-monitor.c @@ -69,7 +69,7 @@ typedef struct QDevAlias QEMU_ARCH_SPARC | \ QEMU_ARCH_XTENSA) #define QEMU_ARCH_VIRTIO_CCW (QEMU_ARCH_S390X) -#define QEMU_ARCH_VIRTIO_MMIO (QEMU_ARCH_M68K) +#define QEMU_ARCH_VIRTIO_MMIO (QEMU_ARCH_M68K | QEMU_ARCH_HEXAGON) =20 /* Please keep this table sorted by typename. */ static const QDevAlias qdev_alias_table[] =3D { diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index ae980c087f0..15258a203b3 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -32,6 +32,7 @@ #include "translate.h" #include "genptr.h" #include "printinsn.h" +#include "exec/target_page.h" =20 #define HELPER_H "helper.h" #include "exec/helper-info.c.inc" diff --git a/hw/Kconfig b/hw/Kconfig index b3ed092f7a8..dda3139be74 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -54,6 +54,7 @@ source arm/Kconfig source cpu/Kconfig source alpha/Kconfig source avr/Kconfig +source hexagon/Kconfig source hppa/Kconfig source i386/Kconfig source loongarch/Kconfig diff --git a/hw/hexagon/Kconfig b/hw/hexagon/Kconfig new file mode 100644 index 00000000000..cdf7770a305 --- /dev/null +++ b/hw/hexagon/Kconfig @@ -0,0 +1,4 @@ +config HEX_DSP + bool + default y + depends on HEXAGON diff --git a/hw/hexagon/meson.build b/hw/hexagon/meson.build new file mode 100644 index 00000000000..f528d2bc4ab --- /dev/null +++ b/hw/hexagon/meson.build @@ -0,0 +1,6 @@ +hexagon_ss =3D ss.source_set() +hexagon_ss.add(files('hexagon_tlb.c')) +hexagon_ss.add(files('hexagon_globalreg.c')) +hexagon_ss.add(when: 'CONFIG_HEX_DSP', if_true: files('hexagon_dsp.c')) + +hw_arch +=3D {'hexagon': hexagon_ss} diff --git a/hw/meson.build b/hw/meson.build index ef65ba51950..7fa81db453e 100644 --- a/hw/meson.build +++ b/hw/meson.build @@ -3,6 +3,7 @@ subdir('alpha') subdir('arm') subdir('avr') subdir('hppa') +subdir('hexagon') subdir('xenpv') # i386 uses it subdir('i386') subdir('loongarch') --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373457; cv=none; d=zohomail.com; s=zohoarc; b=B5X58t/NYB4P9SxTm1UpUxSKFzGwLbdL2T1//ImHzCsFV87/PPTxwbp8zTk0Xw/jyXXT1E/xkI8IfCm4DaeitTV0ztNX3HzYSVt385LwISQQabWFq/zxaS0QGDZIOzt/vfC5aS47ua1RNbEHI0rPZVcB3fk/16Vs21L1GZxAAFk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373457; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=vGTOuwwdCbFJxmkP8mrt/qBNjb/dMJD/0dO3u17IN84=; b=AISl74uJoSrcD/nZJSoRBZnqbI2/WKA37y+tfm0rGuxAIk0KDAoCP6nmlHpFYsF77GmaxVVVGh8GHTDTgN0huIDUrCJR1IYjNz3bzq828vyPDudYUOMgU2O491ANcYstO0E9KhnWsu1G9IpNBiVMoOk7nqSaqzn4MxROk+iOozw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373457916654.0861912556417; Thu, 16 Apr 2026 14:04:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTsB-00008r-Ch; Thu, 16 Apr 2026 17:03:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs1-0008Ub-4G for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:30 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTry-0000zf-5f for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:28 -0400 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GIRQRR1183760 for ; Thu, 16 Apr 2026 21:03:24 GMT Received: from mail-dy1-f200.google.com (mail-dy1-f200.google.com [74.125.82.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk52jgfec-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:24 +0000 (GMT) Received: by mail-dy1-f200.google.com with SMTP id 5a478bee46e88-2da19227bc1so19585935eec.1 for ; Thu, 16 Apr 2026 14:03:24 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= vGTOuwwdCbFJxmkP8mrt/qBNjb/dMJD/0dO3u17IN84=; b=ifY3Lq8/wR71LTsb IOLAjQd7pK7RnYtqGqfwosogagEuZxZE2UrGoveIJwRreR0bioQlYjekPt+bV1oi 0f3PtkT1f9NInkm2UEm16bmWegiX31QlOJtVYX7WEN/iJV5l2xevdYyl599qdol3 QzSJTNwDFFLApYmXT6Uw79wMiV0KgIuydZzY2iNuOea8rCxoJL4nsoT62g668vlH cPlGQaL25vuY15MWBz3E2c7hEKqGcifUV54v96GmGWFVhQ9sW7WdFX4mrXSr6iWv SeRe2zPqaZ7dMyrZ1v0Hhnlzg5TKLPtWS2V6tUcURKUsmMleY3MFAM+AoAi14Yqw /O63vA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373404; x=1776978204; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vGTOuwwdCbFJxmkP8mrt/qBNjb/dMJD/0dO3u17IN84=; b=fnnklLLtczpWoet+kA2Au3AA5S3OQepQD56tlq9CZYxpg5qTgapzbvtiGDU35WFiWX muoG7Avd1l9tFHKHOCBhRAVYTr1PJnSVBEbUGg7V/4N2XTbza0R3CRtMdx6bux+HSLH9 Zee792rE5fToinUQAxdtysya3eGU7pwfpo8sDx6dfBCWwQNNaMeTlfomur5LE/YpOg3I 34qAosMZ0H26CI6kJ2wTK2n7WMM08HtcSRCw5PcZsbdpW0C2jnoIkuWinjpRZp2gbIeT HcjxQbBOos0zaA/zu6qEX6VgpIJ1LfLGuthGSpHKnJHi+/dQM0viRli8aszSpzXddjxy FjjQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373404; x=1776978204; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=vGTOuwwdCbFJxmkP8mrt/qBNjb/dMJD/0dO3u17IN84=; b=sq/CmwPPbHAg77vzCnf7Nbc0YtxL11ezJaO3L/n4HdQBngf3SvQS+E6fnwwTh7t9tp Xk9NYJcE3UJHtYsUIVMlnqqDh64a9aDN9FFob/CqiFUJDus3Flc76fIkrmOTn5ChmMfh bWJdJ7bq3eTeje6mqBq6Zd07yvuQ7wdd+FkgkbOaRaJ2mNRTuXxBqZQH0RKImNNxJCdm hbVDx/tckPs/8AXmE0I3ewerqCGBG9DFMFz3XuCHglO2N6bM9/4WrkBQ9zsziWqmFFq4 dCzKqyRv/zNaHtmy3LyH6cx42KW3oc+W5umRMJ4fWzTL1URrMKOWvIzdnYgS9cVu+R4D fBng== X-Gm-Message-State: AOJu0Yyk6lNouZcC/3nGt60lBlwdyKCnDaNM82soH9KbxoipUzHx9eY2 5svAD5AH6WvjHqzceYFri4LzJ58jTFBo5PIJn2v1kho+9s14XD6apUihVXg84G4lnilXKAMA+YX oLtMiwRkRuqwVV+E+9mjeA0lKzFHnoigNVgs2UznJsxTL7fvrUnmxFlJ/pn8ZXGNisA== X-Gm-Gg: AeBDievZDxdAulxL1JLY4SZK4wFZ4nHcYn+wxMpL7ujbpm4BHqzh/uZul8KiNUNtVZl bVVSupmUFken+71Gy/1mSGHnMRfnBCP2W8K+W6TQftFER9xnE7ynKe8sa+wI22xqQTNmDql1tQ2 5fagwy+VxKOFrsGy9WjiH5HucZzMjZP4W4bU8R6tXaT6VJ2RTwBFGZdU86CcvjINaC1FTLbGgXj EMDQe26tjbBqMFMJ7rsr8JastbTdm4s5zDcq492LrCklXpnuONHvHHeBn0vl5ah9jROb7vdTwet UFX55xjXptg2wUqwpkKhjH4SpU6fYqH4HmTrCWOL7PEuJa3eZ1elqPIK4Hyg3a/XN909SfqsV+H LHYIKF6dXwW2PF3vGIaJbJnuPzXU2uxx8ej6CvX72tROHeKeaPt+AiAbIkN7FRTjMVBB7PXFokv etQpzo X-Received: by 2002:a05:7300:ed18:b0:2da:b77a:d7a0 with SMTP id 5a478bee46e88-2e2e3e68808mr535334eec.9.1776373403702; Thu, 16 Apr 2026 14:03:23 -0700 (PDT) X-Received: by 2002:a05:7300:ed18:b0:2da:b77a:d7a0 with SMTP id 5a478bee46e88-2e2e3e68808mr535311eec.9.1776373403088; Thu, 16 Apr 2026 14:03:23 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Brian Cain Subject: [PATCH v5 4/9] hw/hexagon: Add v68, sa8775-cdsp0 defs Date: Thu, 16 Apr 2026 14:03:00 -0700 Message-Id: <20260416210305.2255579-5-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=buR8wkai c=1 sm=1 tr=0 ts=69e14e9c cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=COk6AnOGAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=Y0VZbjsYLljPqHOwCnMA:9 a=QEXdDO2ut3YA:10 a=6Ab_bkdmUrQuMsNx7PHu:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: r718YIvqiH0bDL2ddeEdg5nEErpMA9NQ X-Proofpoint-ORIG-GUID: r718YIvqiH0bDL2ddeEdg5nEErpMA9NQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfXz2eT3Eziv+ii IeagWYi4bvh0eVZqit3rBgHyzx92MdD6odHeNeBiA6GNbAqVWeimfsp2uSTNossZoaebkyTdmWf prLkHsvU17vwuJv8nayUSp3h0OSzJBuV85pxERjl+i511na41N0bxfMzSR4oyvuxwtc1RSF8gkB OheXNHU44EKQInTlskEROxIrjUaNRZ1WgxdJWHV+9tVxCiFJmi2tSVnsaTCyg7bVFo7ppFm8rvV iS/Trr8/6whyif0JenhYu8ELiAeOk+VHwVTmNhuYDqprY1gscwDYEMcJIdb4TcjM1bOfmRjZlOP d/N0vVu2LvtIBzbjQj3sOdI/DwdlHswYUduVrMHSHXEjlIn7Qv1ifHgBFRkoOuGVzYG3auJF4FZ 1IVT2n6rXEAj9Qq3eB9deSzBnt4sY380Lpcy1LE3TidMN25+eQbCEEmb6r7eaVEYt3wV2n6YCet MRVb9eh1FlfizHUURJw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 spamscore=0 malwarescore=0 phishscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373460756154100 From: Brian Cain Acked-by: Taylor Simpson Signed-off-by: Brian Cain Acked-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc | 64 ++++++++++++++++++++++ hw/hexagon/machine_cfg_v68n_1024.h.inc | 65 +++++++++++++++++++++++ 2 files changed, 129 insertions(+) create mode 100644 hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc create mode 100644 hw/hexagon/machine_cfg_v68n_1024.h.inc diff --git a/hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc b/hw/hexagon/machine= _cfg_sa8775_cdsp0.h.inc new file mode 100644 index 00000000000..442cbe3be31 --- /dev/null +++ b/hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +static const struct hexagon_machine_config SA8775P_cdsp0 =3D { + .cfgbase =3D 0x24000000 + 0x180000, + .l2tcm_size =3D 0x00000000, + .l2vic_base =3D 0x26300000 + 0x90000, + .l2vic_size =3D 0x00001000, + .csr_base =3D 0x26300000, + .qtmr_region =3D 0x26300000 + 0xA1000, + .cfgtable =3D { + .l2tcm_base =3D 0x00002400, + .reserved0 =3D 0x00000000, + .subsystem_base =3D 0x00002638, + .etm_base =3D 0x00002419, + .l2cfg_base =3D 0x0000241a, + .reserved1 =3D 0x0000241b, + .l1s0_base =3D 0x00002500, + .axi2_lowaddr =3D 0x00000000, + .streamer_base =3D 0x00000000, + .reserved2 =3D 0x00000000, + .fastl2vic_base =3D 0x0000241e, + .jtlb_size_entries =3D 0x00000080, + .coproc_present =3D 0x00000001, + .ext_contexts =3D 0x00000004, + .vtcm_base =3D 0x00002500, + .vtcm_size_kb =3D 0x00002000, + .l2tag_size =3D 0x00000400, + .l2ecomem_size =3D 0x00000000, + .thread_enable_mask =3D 0x0000003f, + .eccreg_base =3D 0x0000241f, + .l2line_size =3D 0x00000080, + .tiny_core =3D 0x00000000, + .l2itcm_size =3D 0x00000000, + .l2itcm_base =3D 0x00002400, + .reserved3 =3D 0x00000000, + .dtm_present =3D 0x00000000, + .dma_version =3D 0x00000003, + .hvx_vec_log_length =3D 0x00000007, + .core_id =3D 0x00000000, + .core_count =3D 0x00000000, + .coproc2_reg0 =3D 0x00000040, + .coproc2_reg1 =3D 0x00000020, + .v2x_mode =3D 0x00000001, + .coproc2_reg2 =3D 0x00000008, + .coproc2_reg3 =3D 0x00000020, + .coproc2_reg4 =3D 0x00000000, + .coproc2_reg5 =3D 0x00000002, + .coproc2_reg6 =3D 0x00000016, + .coproc2_reg7 =3D 0x00000006, + .acd_preset =3D 0x00000001, + .mnd_preset =3D 0x00000000, + .l1d_size_kb =3D 0x00000010, + .l1i_size_kb =3D 0x00000020, + .l1d_write_policy =3D 0x00000002, + .vtcm_bank_width =3D 0x00000080, + .reserved4 =3D 0x00000001, + .reserved5 =3D 0x00000000, + .reserved6 =3D 0x00000003, + .coproc2_cvt_mpy_size =3D 0x0000000a, + .consistency_domain =3D 0x000000e0, + .capacity_domain =3D 0x00000080, + .axi3_lowaddr =3D 0x00000000, + }, +}; diff --git a/hw/hexagon/machine_cfg_v68n_1024.h.inc b/hw/hexagon/machine_cf= g_v68n_1024.h.inc new file mode 100644 index 00000000000..82619c42ac1 --- /dev/null +++ b/hw/hexagon/machine_cfg_v68n_1024.h.inc @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +static const struct hexagon_machine_config v68n_1024 =3D { + .cfgbase =3D 0xde000000, + .l2tcm_size =3D 0x00000000, + .l2vic_base =3D 0xfc910000, + .l2vic_size =3D 0x00001000, + .csr_base =3D 0xfc900000, + .qtmr_region =3D 0xfc921000, + .cfgtable =3D { + .l2tcm_base =3D 0x0000d800, + .reserved0 =3D 0x00000000, + .subsystem_base =3D 0x0000fc90, + .etm_base =3D 0x0000d819, + .l2cfg_base =3D 0x0000d81a, + .reserved1 =3D 0x00000000, + .l1s0_base =3D 0x0000d840, + .axi2_lowaddr =3D 0x00003000, + .streamer_base =3D 0x0000d81c, + .reserved2 =3D 0x0000d81d, + .fastl2vic_base =3D 0x0000d81e, + .jtlb_size_entries =3D 0x00000080, + .coproc_present =3D 0x00000001, + .ext_contexts =3D 0x00000004, + .vtcm_base =3D 0x0000d840, + .vtcm_size_kb =3D 0x00001000, + .l2tag_size =3D 0x00000400, + .l2ecomem_size =3D 0x00000400, + .thread_enable_mask =3D 0x0000003f, + .eccreg_base =3D 0x0000d81f, + .l2line_size =3D 0x00000080, + .tiny_core =3D 0x00000000, + .l2itcm_size =3D 0x00000000, + .l2itcm_base =3D 0x0000d820, + .reserved3 =3D 0x00000000, + .dtm_present =3D 0x00000000, + .dma_version =3D 0x00000001, + .hvx_vec_log_length =3D 0x00000007, + .core_id =3D 0x00000000, + .core_count =3D 0x00000000, + .coproc2_reg0 =3D 0x00000040, + .coproc2_reg1 =3D 0x00000020, + .v2x_mode =3D 0x1f1f1f1f, + .coproc2_reg2 =3D 0x1f1f1f1f, + .coproc2_reg3 =3D 0x1f1f1f1f, + .coproc2_reg4 =3D 0x1f1f1f1f, + .coproc2_reg5 =3D 0x1f1f1f1f, + .coproc2_reg6 =3D 0x1f1f1f1f, + .coproc2_reg7 =3D 0x1f1f1f1f, + .acd_preset =3D 0x1f1f1f1f, + .mnd_preset =3D 0x1f1f1f1f, + .l1d_size_kb =3D 0x1f1f1f1f, + .l1i_size_kb =3D 0x1f1f1f1f, + .l1d_write_policy =3D 0x1f1f1f1f, + .vtcm_bank_width =3D 0x1f1f1f1f, + .reserved4 =3D 0x1f1f1f1f, + .reserved5 =3D 0x1f1f1f1f, + .reserved6 =3D 0x1f1f1f1f, + .coproc2_cvt_mpy_size =3D 0x1f1f1f1f, + .consistency_domain =3D 0x1f1f1f1f, + .capacity_domain =3D 0x1f1f1f1f, + .axi3_lowaddr =3D 0x1f1f1f1f, + }, +}; + --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373457; cv=none; d=zohomail.com; s=zohoarc; b=lekGGGr38jrtumi0z+0d/MDuTwTov/r6Grq3m2a+igxIRsU7/AQru4CX9OQ5+mC7jjXMO3LWKAvk/888g9chYEtcNrJP3Y6FuFXPqgldEEdFA2KQjU943rqUsCMRsMYmAG2gEYe81Uo4J5YKdN3JHNGpwbif3GJvliGauPdqbjA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373457; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=eS5ihb8Q3Wz0SkTdk6wjG+t9ylH9RVSPrzx1RphpHuQ=; b=GXuLWS3MLKVmFosT2BLXDxlKevKWkRtWDOrl0xHkdxX2xw1krT+2VE+uNRbTS2HEo8v6vYU5ignTTDC1SmaM2V2vbtwKNESLENhpTO7jqv/j2+UWvCzHXk/OA9V/1Qn7Fm0BffTqCUjqHkCBRhNBuPLFBTZjZ8br2222vqanySM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373457914251.53217171414337; Thu, 16 Apr 2026 14:04:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTs9-00007w-NA; Thu, 16 Apr 2026 17:03:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs1-0008Ua-3n for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:30 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTry-0000zk-RV for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:28 -0400 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GHDroD1245083 for ; Thu, 16 Apr 2026 21:03:25 GMT Received: from mail-dy1-f198.google.com (mail-dy1-f198.google.com [74.125.82.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4djx4ka7j0-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:25 +0000 (GMT) Received: by mail-dy1-f198.google.com with SMTP id 5a478bee46e88-2d889997495so21214372eec.0 for ; Thu, 16 Apr 2026 14:03:25 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= eS5ihb8Q3Wz0SkTdk6wjG+t9ylH9RVSPrzx1RphpHuQ=; b=n30FljzFniiuHZDe i7Zlsu0DoJkVVZi+3fDrWdJ6us+dgDMAllojHmGn7mKAaT0iEZf8axcbHSN0GPyD y7wYroGyswL+WkzfKseLRm7a2pt6tfN2IKdcJAR0MmytTgA6Lv6h2MpELhZn4u4L wxFXJrmF2Li6N1GwAptycH3Ea9V4dRokueJ253FmXt+McjQRJt/qOzDF2K5X881I U9W/bnvdLAOBhg4Vp9O3xaIlnkfeA0wGSUzyKebkY+ywPeYUS0ZA8FfZKLRlPBpS 2IX60e8yzoc4oL7v1OmDrpHRSmbWCX96sFXB+QRpG7cgR8qYQWK838JfzfwsIPAy VA3lUA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373405; x=1776978205; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eS5ihb8Q3Wz0SkTdk6wjG+t9ylH9RVSPrzx1RphpHuQ=; b=hKMxK1ILRf68CoK75QVv92YOZHRFgDbHFgq1qfkXX6K5pnenvRqZkPZJ1aziVKquOy Hnv/85e6YZNGzbpzyxc9fzmBwfrHpIwXZlbKkAZRhe55BQMAYAoS8ml8BlerMMZkB/OI eWEnwq21vqHGWb47KN7gTo5upiyUU9AO39j3I4zt4EtD3C65QsUaWl7A6mROEaktzApk m3NgkwG1aBnwj08aS5O52AaxeUoNPDPWdHI6vNBWuH2+j0fKJVHLwp+MUkryW3NEXxEA OykohbBDWRtpCyDClBFi//+dtPjbCZGsBP87G1yOJKWMXH1J7PMoT3SCRZqV1wDxEw9k p+Jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373405; x=1776978205; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=eS5ihb8Q3Wz0SkTdk6wjG+t9ylH9RVSPrzx1RphpHuQ=; b=avv8ST0KxIGyZD6wK4ybHNDAQPE8iPiPdeSBviHFV/qIADJOne4zeeAj/ph8QxtKJB HcBrMPxP61UgHuFQ7yKOVqsxc7ptrCYVIDEJ9FM7yg3/g/BmKNG4QxcvHRFQ6rcgulFm viRpvK33sulKjfF5Yqa+knL+sJQvdsVZ+U3ZmoKWMhhF81mJ+1zaUz+duTpF2bnlsH5i vcJGX5hYwlQdF5dTJHNghAtn7nK/LZ+EsBgCY7GwNkD55WUNpNfm4aTl5IbjidFwTWVm 1E+jR5ymSJmez/LP2ka2Z0j5VRA8MgNswu+j55Uh6gCW20wKgNZ3izUkOkJQyUEKemRe zhkg== X-Gm-Message-State: AOJu0YwpjKd7rwuUAN5ihCNLucRUKNB6xDSQXy3+gWuk/vgipeFpIPQi 2QLtFIsne+8g2ihXi1vwSldxC0EWI41PUFX70rGvKRwtawlFWHPugYzdCSntpTRIGK1Bp1BIDQV mwVOrQXHvuewIYAnfZ0E3XWePZlQp5mZh3U3BY85dN0YG7Thzy3A796ZUP3TgD5aRGw== X-Gm-Gg: AeBDieui9y4YlBskiMd3o54F3NzkClxv9lqFfuakpBbvcTXBWlwg0qPpD7TANcrBcyV peVQQ7ftZKmsyNtj3o1MfBUxf+ZGv/T+AppaLOWjTT8F09m2cEVkSnwuwOhLeynw5Ny9p9KdxJI LNabBAMZZaoJYC0ikQtcIq3KMI+3iba+BfkQHtEH8iz2YPmlCz78enoCZltgT/7AKFjbZnS6kUI D4S6TzElvXARH61Y+MJvbsHLPUHcRlYRxbQynkEEXmwF6Adrxhx/HhqiI3Ob5DgPw/HoM23sbVi VxNiQNBN1u53oxZvT4yNKaKY3upbfEqo5PpamcLOWlCjgggoywzw65MYmjA+Jso/FHC9lEyxZaa AmVf0ZHW04p/REO8Ani0Hcsh3bgrsWKSowNXXCneWuf0MFu2qNnbn0vGQAQZMsaTrrps7NA2E48 3G4Wt9 X-Received: by 2002:a05:693c:300c:b0:2c7:ea98:da0 with SMTP id 5a478bee46e88-2e2e5afae41mr559928eec.19.1776373404702; Thu, 16 Apr 2026 14:03:24 -0700 (PDT) X-Received: by 2002:a05:693c:300c:b0:2c7:ea98:da0 with SMTP id 5a478bee46e88-2e2e5afae41mr559900eec.19.1776373404111; Thu, 16 Apr 2026 14:03:24 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Sid Manning Subject: [PATCH v5 5/9] hw/hexagon: Add support for cfgbase Date: Thu, 16 Apr 2026 14:03:01 -0700 Message-Id: <20260416210305.2255579-6-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: IKJmbYYIxL5xQ7B4maiN8nmjvyus0YTv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfX99SDp9vSJJyP dw7y8o6q7PutwWT0UD9J0N78H2Y07/phPJWRGCWJ/Gq1pkVY/k3xIVIGoHBFGfU1YAvo3QwnX5o qvU19WrN5F6wvsVSC9ifDwqHzNLxF7Yxulu0Qs5ijoxqNs04Fv7cJvJ2oP9QbCRCZIotS1cZnMS b8PMpQ0qQqdJXyVBcjIuGLoB0zHPhanEDLveBrmjsVbYEHJ12NlNH05Zbk4ozFtmy1ixLXD2UOM lF0V/1AZf7fd99uVhrBreQhDsSX9z42BuhG5n9p+losCrSw3jOci6E0Sxq3NmZCt534DsXWwUdQ CscXEbMciKgODCuyU4X/U3dXxP32aCes4dvVG66POk5C1lD4Qx1nV9fyg8AkkNR/PEjRPCR/hlZ JdH6A6HsFgWtRyOPJpPcKcWtcjM0Snvppn6ya8Mg/1V+oTZydT3akfNopT4JXgm33vkSoimz0it mOAk0yJsWvn6ClDmirA== X-Authority-Analysis: v=2.4 cv=H47rBeYi c=1 sm=1 tr=0 ts=69e14e9d cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=COk6AnOGAAAA:8 a=pGLkceISAAAA:8 a=kMsUHo8U3t7WCeOG3PUA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: IKJmbYYIxL5xQ7B4maiN8nmjvyus0YTv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 phishscore=0 bulkscore=0 adultscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373460675154100 From: Sid Manning Reviewed-by: Taylor Simpson Signed-off-by: Sid Manning --- hw/hexagon/hexagon_dsp.c | 11 +++++++++++ target/hexagon/cpu.c | 1 - 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c index d5df87605f4..649cafcf8ec 100644 --- a/hw/hexagon/hexagon_dsp.c +++ b/hw/hexagon/hexagon_dsp.c @@ -73,6 +73,7 @@ static void hexagon_common_init(MachineState *machine, Re= v_t rev, const struct hexagon_machine_config *m_cfg) { MemoryRegion *address_space; + MemoryRegion *config_table_rom; MemoryRegion *sram; DeviceState *glob_regs_dev; =20 @@ -86,6 +87,12 @@ static void hexagon_common_init(MachineState *machine, R= ev_t rev, =20 address_space =3D get_system_memory(); =20 + config_table_rom =3D g_new(MemoryRegion, 1); + memory_region_init_rom(config_table_rom, NULL, "config_table.rom", + sizeof(m_cfg->cfgtable), &error_fatal); + memory_region_add_subregion(address_space, m_cfg->cfgbase, + config_table_rom); + sram =3D g_new(MemoryRegion, 1); memory_region_init_ram(sram, NULL, "ddr.ram", machine->ram_size, &error_fatal); @@ -114,6 +121,10 @@ static void hexagon_common_init(MachineState *machine,= Rev_t rev, } =20 } + + rom_add_blob_fixed_as("config_table.rom", &m_cfg->cfgtable, + sizeof(m_cfg->cfgtable), m_cfg->cfgbase, + &address_space_memory); } =20 static void init_mc(MachineClass *mc) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index bd3eec0d525..9883c4d1681 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -404,7 +404,6 @@ void hexagon_cpu_soft_reset(CPUHexagonState *env) } #endif =20 - static void hexagon_cpu_reset_hold(Object *obj, ResetType type) { CPUState *cs =3D CPU(obj); --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373509; cv=none; d=zohomail.com; s=zohoarc; b=nK0RGambwlNCrFHO8RA/YFMUgN+5vEX1gN82ZuUtBbYK/+y1qpvX0WRsDQ+v9TFwdbAyXzDVR4fGva/Kx1TivfNuBZ+7ItaPPoF/Q8Ohsz9lSVKavA2CG7mQIdOhcda3y0+EvgjuCuKJleaMbKgy2i5OKGQBBmtDOTxh0DylvQ4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373509; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=LEWN7D4QBDCm/3YwyXJ1nbi+9jJyq8HjarAU/LQbQ9I=; b=Lr6zMsJVeog1NeSPJB1ajDL/dCx+vYWmgRARxaCKxNP5R7ws57HkVkWRfH+2IRhGZUeLkEs7GaTTnZ3FwrRXiHIQGMB0xYVRQOBetqevtPO6GHd5ZWdCSStozk26F5FgFe4XXvppDFOOo9gOqyrVYBtRCTxYaOd7p3eVmx7b+8Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373509814845.4407230884318; Thu, 16 Apr 2026 14:05:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTsC-00008u-1G; Thu, 16 Apr 2026 17:03:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs2-0008Up-E6 for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:32 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs0-000106-8l for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:30 -0400 Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GGRqj13197850 for ; Thu, 16 Apr 2026 21:03:27 GMT Received: from mail-dy1-f199.google.com (mail-dy1-f199.google.com [74.125.82.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk3af0xag-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:26 +0000 (GMT) Received: by mail-dy1-f199.google.com with SMTP id 5a478bee46e88-2ba9a744f7dso11051303eec.0 for ; Thu, 16 Apr 2026 14:03:26 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= LEWN7D4QBDCm/3YwyXJ1nbi+9jJyq8HjarAU/LQbQ9I=; b=Kczv6EX8tmVdsp9O A+U6LG7DTrZNnf17F9eOHvV++t9YoeuPSC5KvSD6scD0vDFqnTNKg3f1QS9ue6ew sgR+bkyiK6GbKslg7aRC+hLozmToV43W0IPVwJ6boTDV+O8AiBdvwOrBaOwAKpu7 2AO+ANRRTwEiKcEAfeLfJfsldq0iCDfPzmeQ0s2uUaCN82pBewPedygw3Xy/QP5i OPlPyg9VqWwGy2sZkEYoi0g92H0DqdFlB2/mekPfg1zOQHRzS7dE9+gBehY+Vx2N u/Shw2pXxzyU218hT1d7j5jhK0vyyJoCMHgALgxxlXy1dx68lLprJ0XZE3bUzMga VRSMzQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373406; x=1776978206; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LEWN7D4QBDCm/3YwyXJ1nbi+9jJyq8HjarAU/LQbQ9I=; b=Hi4MdxIeVtoiK/x6GgxvAawDQN1Viw/vuQV1P9UlzTSt5eZX85FUPesOSzgJwN9xGk mCI3XdaM7NlOnDzd4y06NMgAAAZMMPkarE2+/ZlRQ/eCf3Pb9gy+k4M2MP+oiLeEFLrQ JRp4vW8wJ8uECOtkalNplJBUxKVlyMeqeBWokOisY9EcUix/ptvK2A5Ld0X7Jof32WPA mPC819pv0kR+RzN9ls6niYdL5Bw8kEud6v9rZio4/MOTvBxDlZw4plNGY+knt4WFDkiw 3qrtKMWIiyPJG8x2xp6Yauew9FmgeR5RRvcwlkgCZOsnczgExh52uNomywwDYCwjwkjU Fyjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373406; x=1776978206; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=LEWN7D4QBDCm/3YwyXJ1nbi+9jJyq8HjarAU/LQbQ9I=; b=lqkxUaS6J5G44RU3ZTUaYOufu/4p2lnrMRhm/vSOFEbNXPLCbNuySlOBgR02Xr1YFs 6OQNAljXqMWAPbdP4OwdpSz+kr7+ILLfjHHsQ+aOtSSxuBOlnnovnAJwaRU9YV3vthY1 6nWSEgdfiBTQ7DNKTgxR5lpy2UiHwpqGim101CxfY92h3PvYiGHBOuSndoLqyfp7r75G iEdHNLHWF4N3we2BeIzye26joetxc6PuePugItFW7kChQA58LiPHE2cGD7hQmQEoUip9 2EG4sFrD+8Cel6PpDV7JUL7IXw7PnMw27cGOm4JgxUVODNWHy9Nl2LX2JQnIawQCq0X4 rWAg== X-Gm-Message-State: AOJu0YyfJ5w8F3S8buaC/PBMoZrfuWUvZK0uXnM+TBUCoy1RqcqqEeTM n+Jm5iMnY1huQ6qWmT4J8GG7h+A4x4hvybYPK2RL80QBP0XXxoIw2kHvo/j/vJ8xtmPdj3/6Xoh NiKuZBPZfX2d1SoiIH31d8MvgtZqh24Io4p/GGVo6EmDHmGrpWAuzevJZSURY2GIuog== X-Gm-Gg: AeBDietUxf/PCYlRlE/ZznB8Rtv2FEzy4Kp00vIh30Q4AuZWX9cQbWMdk/E1Ch8eeg3 VvGREUb2vVvTtsA0T6o+wfh4t25o1EEWxtAIMmaMqq3DFkTkrrSJqvOAGmex4rNFnOR/x1T/Sun URriQWg1SzTiyHLzp0xya/KA6Nt8fnKmCk2G2I4XyU1BtRlJW3KOxtyTtrvbJOG5sy20zWRg82/ N2TlhkIrsTpc1cCrmse3vJ3kPhLCf2K6UhLQd5KeWBZSIeUSaWXj8LFw3HmnF5oCoQy4uIpdzHU Dc3d5G4eZ3RAR/CAFP6/vr/HN7lDS4VlH8rVAazXrwLg1x3VFmXZ7TLnC5A+KJDUX5T0P+9IrCj 45n42XzXULRcMlCP/Z6CtbraHJS0/AgpTDWigMuQd6ftB0RYGyDW13osPPB/Uov8CxZ34fM6W/L oBhz/o X-Received: by 2002:a05:7301:607:b0:2dd:649d:750c with SMTP id 5a478bee46e88-2e2e35842femr570004eec.9.1776373405773; Thu, 16 Apr 2026 14:03:25 -0700 (PDT) X-Received: by 2002:a05:7301:607:b0:2dd:649d:750c with SMTP id 5a478bee46e88-2e2e35842femr569979eec.9.1776373405117; Thu, 16 Apr 2026 14:03:25 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Brian Cain Subject: [PATCH v5 6/9] hw/hexagon: Modify "Standalone" symbols Date: Thu, 16 Apr 2026 14:03:02 -0700 Message-Id: <20260416210305.2255579-7-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfX14JnnZ00cZa7 rBV2qn4VUWTwfjENlS6UsED4ooUCRaiRoWZLdhoDIPNE3b8TzWKXiUnLnGfQoGzCvD1NCnhrEMK TGuTz70gdzCa/moAkx5lbZa3aqqaU2QzBpdRed1Wn9jwpUEkb8BZVJ1wz7YIGsePqZ7jBfl+xSn XD2pOzCpw6NaGKPLRdekj4P+meyLVoHTy3Y8Z9pr6lKANnAk4KuV2q1xtKIvTmnKv5cBCKl90Dg dBpeGvE1L/SeoCJclXyvGWRWltQ8SxN+2b9dMpj0aqZr/XiLiKneyzQd2AEyONsHAGYkVhfnF41 ptdAYB33HZFW/5roBePHG8G1OtxDvtSunQkC4i9PRJyK/pqaHdL6mcm7NrDRDASSXiPN614jRpw K2Y2Pw5uSnRahPhlVH4IDZe7ZsyqCdVrnT4Gls4f8zn/Slq8CFAKXXysKyRS010iBStIvk+t/zU u4XWpvkfVHhjP412R4A== X-Proofpoint-ORIG-GUID: DBCzoehXLhY4RmLH1IhJ_q42wLmLlyTO X-Proofpoint-GUID: DBCzoehXLhY4RmLH1IhJ_q42wLmLlyTO X-Authority-Analysis: v=2.4 cv=DfInbPtW c=1 sm=1 tr=0 ts=69e14e9e cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=COk6AnOGAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=QhYL57-57G4zB7GrFpIA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373512616154100 From: Brian Cain These symbols are used by Hexagon Standalone OS to indicate whether the program should halt and wait for interrupts at startup. For QEMU, we want these programs to just continue crt0 startup through to the user program's main(). Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- hw/hexagon/hexagon_dsp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c index 649cafcf8ec..3c269feed28 100644 --- a/hw/hexagon/hexagon_dsp.c +++ b/hw/hexagon/hexagon_dsp.c @@ -28,9 +28,17 @@ =20 #include "machine_cfg_v66g_1024.h.inc" =20 +static hwaddr isdb_secure_flag; +static hwaddr isdb_trusted_flag; static void hex_symbol_callback(const char *st_name, int st_info, uint64_t st_value, uint64_t st_size) { + if (!g_strcmp0("isdb_secure_flag", st_name)) { + isdb_secure_flag =3D st_value; + } + if (!g_strcmp0("isdb_trusted_flag", st_name)) { + isdb_trusted_flag =3D st_value; + } } =20 /* Board init. */ @@ -58,7 +66,15 @@ static void hexagon_load_kernel(HexagonCPU *cpu) static void hexagon_init_bootstrap(MachineState *machine, HexagonCPU *cpu) { if (machine->kernel_filename) { + uint32_t mem =3D 1; + hexagon_load_kernel(cpu); + if (isdb_secure_flag) { + cpu_physical_memory_write(isdb_secure_flag, &mem, sizeof(mem)); + } + if (isdb_trusted_flag) { + cpu_physical_memory_write(isdb_trusted_flag, &mem, sizeof(mem)= ); + } } } =20 --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373515; cv=none; d=zohomail.com; s=zohoarc; b=oBRFbo7pgiMbFRQBAKzcasSplvToGrGE5M7xs9z6hSGwhWvpBzlZnnUdP4wDavUJgofcI7mezgdaF5zU8LeAq7Slwfq3ZaTNb1fZXXwJDcj3iJO44pujTPxq/skcNRVJmZb8Db4OSXzQxFO+e3KGETz0WsuZTV7N/x8XN1LpVhw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373515; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=dalz+aimR/zYCYAnc4cJTc09a9iXBszukXk0/4hGSTk=; b=YnGo4GAhHGjJbb7o6fOzbz9+WM67CPml5k93JhHwMbOjZhF1pZJ7PiwbSM61VPrdP1oQMqmz8Jo3KprRJ0IxksiuH2It4IQ3dZTXpOUHtm4NzZBmPtIHeZam+YjgYRv2tTehCoMUSBEYCGvPPFISXjRz/bhUzSPmAeYR+Btlu60= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373515934509.06922555205676; Thu, 16 Apr 2026 14:05:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTsD-0000AS-5m; Thu, 16 Apr 2026 17:03:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs4-0008W9-Tx for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:34 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs2-00010U-Is for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:32 -0400 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GJj2aq2652259 for ; Thu, 16 Apr 2026 21:03:28 GMT Received: from mail-dy1-f198.google.com (mail-dy1-f198.google.com [74.125.82.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4djtfuk3a2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:28 +0000 (GMT) Received: by mail-dy1-f198.google.com with SMTP id 5a478bee46e88-2c16233ee11so12242628eec.1 for ; Thu, 16 Apr 2026 14:03:28 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= dalz+aimR/zYCYAnc4cJTc09a9iXBszukXk0/4hGSTk=; b=VhrGZwof5UixGwuY A+5dJKWFf7Fy7GjZ4D+oFssG4HkyW1/O93Dh5FlArMMsE4mC4Hs7X+6g6TrbTQFX 6oI3s6eMAUjJij6AYyuDIn8w9pPM/xECKppzPRGqkfFdTMklXTard3005INqkJ3G GO3a+ZHO+ABo1q0VX7EfnB/Rvs51nGZDJwExFaA24xrtAFF7cgzYonXw82jDRwC0 XP1z1m/LsDRSKX7ghwRynTIZbHrX9L1EkAN/lOgvIw7Mi9aYLFgmj//+7g5pwEiC mPpYNvLMT5SxKtCh8kd9YC/P72Tkr4wwSgu5eZP7V4ztaKhDVrHMG7jTNU/PAS2J qM+1Rg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373407; x=1776978207; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dalz+aimR/zYCYAnc4cJTc09a9iXBszukXk0/4hGSTk=; b=Qg52rtmGWisgO168THXh8BjRbwSqjmX7lhNBlx2690eZSmWJ++vqasoY4BAQ7roOzi IOJq56g8zDhxcBwWMW0jL3EeFjWC+kpMBd0mZrDlh636sWhddsoo5Y+K2LFlGZqQuC7P gEVXrkATw/tBKdh9K7Mm425+96Z0VxtsnTauBkcBV+M1hPwTMrMBpWg6yEU7OVaraqkK MT9mcMp75mwA614tDdVsM1WkRtq1gp5Utrypm+emLJojmuBXZxgrS02ifcHQMkrW3Za/ wclCVd5UYowhefPH1IJZZ6jNC2Q5ENL+ga9OGCvcZW+GmZz/+DElQmg2MosobTdrr31b 0Lzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373407; x=1776978207; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=dalz+aimR/zYCYAnc4cJTc09a9iXBszukXk0/4hGSTk=; b=MJ2yYlL3WoGR85fZfo07IsXkN5k2tcYke4WhDVJWwQBqxvDgibJRekQIqP+6GVpbSK qLtbMp9rcor0IIEYDdedlaWuZZm8hTrcOt3KJpDCJf1VS8YtHJ2PmVlXAj2hzRlQJuUO nlF1JVLFIoNnZuERkqAp6tU1IGEXwKqwKKigVXuVtCT9Nrgk1uHjmb6brPIdawNanQZN zxAIPIXLfI+713A3MoctknmhkTq0LE+9MHF4EarY5L3co2Abvl1sp8XFbU0Ik8L79/9S tgHOyaWQ+LnHMkaf0Cwbf+dR3OhZSB+xABdSa8NuCMppzTQtrrdy5vThjJI5miinrxit fUBA== X-Gm-Message-State: AOJu0Yw5CgIIgYirFVl4BDsWZyyURxmWH3PL+dl1DNDfaOAn9yr0lHKp 6GSp/Rj4NdgoZ3x+qvTaAEMhlVfgWdy/cMmDcc0jX/8wHPo2vsh537pmzZTWljBwdKOmp/qiA9b E/iL9z3e0N2uXbb26GD6A/7DgP01DnteDh4GLFmdgBLe8MIlSMuanZKQtW00s4j7gEw== X-Gm-Gg: AeBDievOPi5J6CjdNMi8qnkOg6LpbJvp3QwgeNgHT4hNy9Srgh9WgiRz1DMGL08ht15 Il0fXHh3nwTABponsSHyLDTqE52w8gVWaB4rOoLzmxFsM7nkp/dtpcy3B7cEeQPSSLNI+S0kq3F W1cxQNtngaJ9NQ9KC5C/ssj4AHydqOkALjQi+CkcbwV5ijgLkf+08lmIReGcDNxAN/95MyzoSJq UyEUZL3y00Gbv/gyMI4GCjGd187IuX0Ow5qt+71S3eKCLQPuQzKSIGTvErwypaSj5gOD6aheCz4 NOzzqqsCDmY/cWabFdRVhHPIeC0VG4pEtd1d1GOvEGcVrcEeFi89vrqL2wQo9CmUZxPVGcOaiva dAFVOAWQoZ25RQW5LzmSBjpVwLkgpBfBoA4hQje/yzhPFgfHFG18AmSo1FwJ1s+L0+V5HN0kvLF tUMzoq X-Received: by 2002:a05:693c:2c81:b0:2dd:8a02:e8bb with SMTP id 5a478bee46e88-2e2e5614fd7mr519958eec.27.1776373406871; Thu, 16 Apr 2026 14:03:26 -0700 (PDT) X-Received: by 2002:a05:693c:2c81:b0:2dd:8a02:e8bb with SMTP id 5a478bee46e88-2e2e5614fd7mr519934eec.27.1776373406332; Thu, 16 Apr 2026 14:03:26 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Paolo Bonzini Subject: [PATCH v5 7/9] target/hexagon: add build config for softmmu Date: Thu, 16 Apr 2026 14:03:03 -0700 Message-Id: <20260416210305.2255579-8-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: MFgjW2Du0PXtQM9-eHCQRAoBX4qaWo81 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfX6tE5YJpvc7E+ 8OZBDEHT1Qpe9goGiEd8fm6iBNkKS0lYE7kTZEcDFjt4wrRdF5kUn9BFKF1qsqqme98W4olutWZ 2D366SVDR0l//YwUrhEiQaDXWw/omN9mLRSz9XFje1N81pBTxce0eKlWdiZugsDMbhZCJs+KSAL +Fvb4FqwQOv1oPbz3qQENBtkj8eGU3epR0FS3PB99UBGCnCvCSkaE+fdfs4nk8/sBPLnQmA7KP4 P5EcVo7yt8jdDAwnHLPaa1pJ2V2G4k45SM3k6/si1hzxQ+UgDBVq6zQctQTrL+zwAIi3GM9tI2T A44p3dUOq6ltE0rsGXPSiAE24wk/P8y8Ek42FWUYT4DcyG3B0+eEfTZvC7qTt0zPCvCRd5kr2ij UkehdtcWSJDBctfYqm/QJmKrdrZH2YmiNvzbH7hTps/leU4W1aPag2Hrcjs/geppqMayiOLp6di N5njGD0VV12Px1XXBtw== X-Proofpoint-GUID: MFgjW2Du0PXtQM9-eHCQRAoBX4qaWo81 X-Authority-Analysis: v=2.4 cv=KrF9H2WN c=1 sm=1 tr=0 ts=69e14ea0 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=Jl0Sl96qzwJOXFZnYegA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 clxscore=1015 priorityscore=1501 phishscore=0 impostorscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373516514158500 Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier --- MAINTAINERS | 1 + configs/devices/hexagon-softmmu/default.mak | 7 +++++++ configs/targets/hexagon-softmmu.mak | 7 +++++++ target/hexagon/cpu.h | 7 +------ target/hexagon/cpu.c | 3 +-- target/Kconfig | 1 + target/hexagon/Kconfig | 2 ++ target/hexagon/meson.build | 13 ++++++++++++- 8 files changed, 32 insertions(+), 9 deletions(-) create mode 100644 configs/devices/hexagon-softmmu/default.mak create mode 100644 configs/targets/hexagon-softmmu.mak create mode 100644 target/hexagon/Kconfig diff --git a/MAINTAINERS b/MAINTAINERS index b9a7c553dfa..ed661c9f12e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -254,6 +254,7 @@ F: linux-user/hexagon/ F: tests/tcg/hexagon/ F: disas/hexagon.c F: configs/targets/hexagon-linux-user/default.mak +F: configs/devices/hexagon-softmmu/default.mak F: docker/dockerfiles/debian-hexagon-cross.docker F: gdbstub/gdb-xml/hexagon*.xml F: docs/system/target-hexagon.rst diff --git a/configs/devices/hexagon-softmmu/default.mak b/configs/devices/= hexagon-softmmu/default.mak new file mode 100644 index 00000000000..08e709aea72 --- /dev/null +++ b/configs/devices/hexagon-softmmu/default.mak @@ -0,0 +1,7 @@ +# Default configuration for hexagon-softmmu + +# Uncomment the following lines to disable these optional devices: + +# Boards are selected by default, uncomment to keep out of the build. +# CONFIG_HEX_DSP=3Dy +# CONFIG_L2VIC=3Dy diff --git a/configs/targets/hexagon-softmmu.mak b/configs/targets/hexagon-= softmmu.mak new file mode 100644 index 00000000000..fdfa29b4f39 --- /dev/null +++ b/configs/targets/hexagon-softmmu.mak @@ -0,0 +1,7 @@ +# Default configuration for hexagon-softmmu + +TARGET_ARCH=3Dhexagon +TARGET_XML_FILES=3Dhexagon-core.xml hexagon-hvx.xml +TARGET_LONG_BITS=3D32 +TARGET_NOT_USING_LEGACY_LDST_PHYS_API=3Dy +TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=3Dy diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 09d5cac4fe5..18dcfdb0b0a 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -37,12 +37,7 @@ typedef struct HexagonGlobalRegState HexagonGlobalRegSta= te; #include "mmvec/mmvec.h" #include "hw/core/registerfields.h" =20 -#ifndef CONFIG_USER_ONLY -#error "Hexagon does not support system emulation" -#endif - -#ifndef CONFIG_USER_ONLY -#endif +#include "reg_fields.h" =20 #define NUM_PREGS 4 #define TOTAL_PER_THREAD_REGS 64 diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 9883c4d1681..355abb4fd24 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -713,9 +713,8 @@ static vaddr hexagon_pointer_wrap(CPUState *cs, int mmu= _idx, #endif =20 static const TCGCPUOps hexagon_tcg_ops =3D { - /* MTTCG not yet supported: require strict ordering */ .guest_default_memory_order =3D TCG_MO_ALL, - .mttcg_supported =3D false, + .mttcg_supported =3D true, .initialize =3D hexagon_translate_init, .translate_code =3D hexagon_translate_code, .get_tb_cpu_state =3D hexagon_get_tb_cpu_state, diff --git a/target/Kconfig b/target/Kconfig index 3c73e3bae01..0288a3f4164 100644 --- a/target/Kconfig +++ b/target/Kconfig @@ -16,6 +16,7 @@ source sh4/Kconfig source sparc/Kconfig source tricore/Kconfig source xtensa/Kconfig +source hexagon/Kconfig =20 config TARGET_BIG_ENDIAN bool diff --git a/target/hexagon/Kconfig b/target/hexagon/Kconfig new file mode 100644 index 00000000000..7e556f35063 --- /dev/null +++ b/target/hexagon/Kconfig @@ -0,0 +1,2 @@ +config HEXAGON + bool diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build index 528beca3cd0..bc7a292e47b 100644 --- a/target/hexagon/meson.build +++ b/target/hexagon/meson.build @@ -235,6 +235,7 @@ decodetree_trans_funcs_generated =3D custom_target( command: [python, files('gen_trans_funcs.py'), semantics_generated, '@= OUTPUT@'], ) hexagon_ss.add(decodetree_trans_funcs_generated) +hexagon_softmmu_ss =3D ss.source_set() =20 hexagon_ss.add(files( 'cpu.c', @@ -253,6 +254,14 @@ hexagon_ss.add(files( 'mmvec/system_ext_mmvec.c', )) =20 +hexagon_softmmu_ss.add(files( + 'cpu_helper.c', + 'hex_mmu.c', + 'hex_interrupts.c', + 'hexswi.c', + 'machine.c', +)) + # # Step 4.5 # We use flex/bison based idef-parser to generate TCG code for a lot @@ -262,7 +271,8 @@ hexagon_ss.add(files( # idef-generated-enabled-instructions # idef_parser_enabled =3D get_option('hexagon_idef_parser') -if idef_parser_enabled and 'hexagon-linux-user' in target_dirs +if idef_parser_enabled and ('hexagon-linux-user' in target_dirs or + 'hexagon-softmmu' in target_dirs) idef_parser_input_generated =3D custom_target( 'idef_parser_input.h.inc', output: 'idef_parser_input.h.inc', @@ -390,3 +400,4 @@ analyze_funcs_generated =3D custom_target( hexagon_ss.add(analyze_funcs_generated) =20 target_arch +=3D {'hexagon': hexagon_ss} +target_system_arch +=3D {'hexagon': hexagon_softmmu_ss} --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373514; cv=none; d=zohomail.com; s=zohoarc; b=L+kOeTRdKhdTK0Y9VIkYvhL9jrxLTH4hI2MCCl5p9GMMLRiXAfGGuESy4f5AjA+8W8ZMlOHx6uuaof9gdzBQ1tbPFwv8PnJ/wY+ttDI4bqUXrzj1LIeC8QVfaj+Pakvy2zypDJpnoj80pfXpSDmxGD5nCE/tUrz6JX5aZWUmst8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373514; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=42qi84YJpavZLckukyF9EMT15WMNoFNzQckVC48SRIY=; b=YpZsHf7AViWmkj497IFNygwxgSgyE9xMS0m+/Gcw5IAEoVByYKoQ0TbrWnvKpr5VrCac3kDPflpRq7ec8L2jj6wyIHNl5jwwvCG0U5px5Lkqxicl/L22T3py3+f9qtADHKKXtQUJA3RaG5vShhI4bfKAmtSN5/kMNKjrAv0mR9Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 177637351425334.59171134754024; Thu, 16 Apr 2026 14:05:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTsD-0000AF-1F; Thu, 16 Apr 2026 17:03:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs6-00005g-Sn for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:35 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs4-00010x-2Y for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:34 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GDqrfh2596401 for ; Thu, 16 Apr 2026 21:03:29 GMT Received: from mail-dy1-f198.google.com (mail-dy1-f198.google.com [74.125.82.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk11r9jfj-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:29 +0000 (GMT) Received: by mail-dy1-f198.google.com with SMTP id 5a478bee46e88-2d889997495so21214697eec.0 for ; Thu, 16 Apr 2026 14:03:29 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 42qi84YJpavZLckukyF9EMT15WMNoFNzQckVC48SRIY=; b=diMXgfewjfXDwRkO 0Dl6Rm9bXZmGbfVggAXAtBluKQ0sBz4C3q30WTZSX0vRUbVZEw3gufkEbBJjEkAg kO4v8qpeq3BvkainBYZDcMUiHtH1XT5pFii56/DAHtrNhy5nQ9Dm+/Y6sXHj+FRb WM3VwL8vjXwe3y/R0mhVhQN62oO1J3fHDfDozsQlgW1+uyyfsn1eZiov0kzl+sfr nJVzxWqRPuOk0M7Fm82p4oh7geupKmJrGolfQYqWqMGVKJ0eyI01IZZ9S/5sQyFf ofeI2JK5sygDqz1+h9Lb9P0564ugIvyG7yDww9cYmabQV9OIIah4/+acpiH6mXNJ po5zAg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373409; x=1776978209; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=42qi84YJpavZLckukyF9EMT15WMNoFNzQckVC48SRIY=; b=jqyFBJyUKnjuXp7VXt4smUxtPL/c2OFDQ4NosPZ07xs5bPg3zczLDRxT8TOw66Sz9/ WT84QUAKJMuBFBqXCd8R9JOpBve7J6c/CdzWf2icwdl2pqSDE2gtnVaaupHWZOCKzH3Q gmeYZirnUw8vQxBzXPmlef5F4f0iQqz+5NaDUBNiZxroIfugtNeD6MWDD3QJ6+eXjyAT o5JtUwoc6XtZL0tNNhyc8+t64jVdDMIDsKsLUaX/NyYNBdYybKLgosn1H24PfWt0oJgw 2uTYbYldp0iqnvZp/ve3D7wC2f+7eDHCmKCCLfB4tMFG4ZAc6c+JM57z6wR2fSnjACi5 Dvdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373409; x=1776978209; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=42qi84YJpavZLckukyF9EMT15WMNoFNzQckVC48SRIY=; b=IqDrFnog2qlWIiJQMULw4fhkB5EBFiOdGayrJEpwTrQr6YvmNmSYQ5rh8KtRTshI3/ xyDRrdLXzZ21pl1QpmfKNa+YNKp9GbRPCp2IuR54iqImuDawxYmdk3hLdNJD9V6v32U7 xoOc1zqluCOPpIp0jilQ6aCdztEGZmXjcw2kxniuRIkn9LxlUSlKHrJowA3JC3WVdYD0 RZZQMFu1iTZqdlJc4jQhVZk+ySvKV9TRUrEy62ty36EtJ23OaHJUTS44V1ALAxeMBmAW XaKdCtkygyjkM+HmRg9BodFaUeeYb2eK5LyhEH+WJuG8m8U00ZA1QD3zM3Sby2DI9nZ/ oyeA== X-Gm-Message-State: AOJu0Yz7LNu6Gcuksw/q1XlPOQ/vk2w7kz/2IVA6vn+tLuAOM0oFAueI CwcVpQDSdZiuqgHrSX1a4VUqr5UoGwkeNzUh39l/xd3gPwP5gy1c/vKTTxOm0A7Dvk11XhuuzKb /F1fiAKXHST9gfOHfYcuetXASUFaeiKYGZq6csE26uJbKNK6/E7RaZ02Tmor6AH8cjQ== X-Gm-Gg: AeBDiesrCgel2b6rT42Pq8jXt+Zsnqtud2N1ypL2dQBuFPR00/o325EuPGMw7y02Dei IXzmwOwDjx9kE3Xcxmv8pEpEzdk3I/jVKGYoAANebS6yfBHAqAa5W4UvtfGXLHXhH4Ic54p+Eb5 YUURf0M3lzTpZXJ5TxjbfH9lyHmomKsjL79f/u8XafRAUnEOxjxYjxgVPtozZ4YD2ayn0iuuAKY bXKaszm2FUMT280wnDnm9kEv7RbpoYOrFzdG7AE9tdJhWF3upzreR2Xqq3y5izz9cUBJGGJE3/r DXqyPUGZGPABEnaKI5nes9TAs6fuVUph4c/twQhWz+UoushWifM44SUHgWbJJ/u5FlXZ6MY85P1 o+CQyixPizrU53FrYu96sA+fs7NK40Wf521fEUDQU4zYiFfQnq8ozD6N3UGdIcvQTWinVGeIyU4 B3Qv6h X-Received: by 2002:a05:7300:a887:b0:2da:39e9:20fc with SMTP id 5a478bee46e88-2e2e560c6eamr658299eec.17.1776373408379; Thu, 16 Apr 2026 14:03:28 -0700 (PDT) X-Received: by 2002:a05:7300:a887:b0:2da:39e9:20fc with SMTP id 5a478bee46e88-2e2e560c6eamr658266eec.17.1776373407741; Thu, 16 Apr 2026 14:03:27 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Brian Cain , Paolo Bonzini , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org (open list:Block layer core) Subject: [PATCH v5 8/9] hw/hexagon: Define hexagon "virt" machine Date: Thu, 16 Apr 2026 14:03:04 -0700 Message-Id: <20260416210305.2255579-9-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfXwODfnj0q4JEH 0ZIhRttqTZxQ6DZj7Ulz5Ppudn93Ew3LhR5pCcf5cTyR+yZTfb2PhRzH4+1wZHtxtlUsDqjMvyX JswhT3KVUXHGmz9U987L58Qgt6SmjREDhDrXHpas/IKz6bJEyvDCJhdkUs/xJP06r+Xj1GWcsh6 UM27lyXQKOB9qckZqOaqp0hk3yPp+jvWgmGnrNT4H7VNVsTO/dVnUtbmIyipfXMJGF7SfQYcDZM mjg+edz+nxa54kL11yrDuM8DOwsPNTJTasAh39CY04EIuOT03f9RuB748vkeV4ug+jaLE88o46o pNqEIXTS6EdcnUSZ5g2tIgwzK+XRnI34nwwXfq6ntmIbFSLmVt/rdZFCu5gBdAMrbpld2kUegZJ 1+OtIQL6VgU9daGFvNwujfqsxj2FdKIxsC1LKUE6KhmEAF1xR7VWmS8IDEuhRaiPHZdo/jqbt1B FZ1uoqu4Vy9QTSjZDFg== X-Authority-Analysis: v=2.4 cv=ZPznX37b c=1 sm=1 tr=0 ts=69e14ea1 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=NKwyhsPI2JXA-XLkMRkA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: E6KYTLjv9hhR-PVAbZL4HszuAe-M0gSt X-Proofpoint-GUID: E6KYTLjv9hhR-PVAbZL4HszuAe-M0gSt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 bulkscore=0 malwarescore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373516571154100 From: Brian Cain Signed-off-by: Brian Cain --- configs/devices/hexagon-softmmu/default.mak | 1 + configs/targets/hexagon-softmmu.mak | 1 + include/hw/hexagon/virt.h | 43 ++ hw/hexagon/virt.c | 456 ++++++++++++++++++++ target/hexagon/cpu.c | 2 + hw/hexagon/Kconfig | 10 + hw/hexagon/meson.build | 2 + tests/qemu-iotests/testenv.py | 1 + 8 files changed, 516 insertions(+) create mode 100644 include/hw/hexagon/virt.h create mode 100644 hw/hexagon/virt.c diff --git a/configs/devices/hexagon-softmmu/default.mak b/configs/devices/= hexagon-softmmu/default.mak index 08e709aea72..37b4f9f3237 100644 --- a/configs/devices/hexagon-softmmu/default.mak +++ b/configs/devices/hexagon-softmmu/default.mak @@ -3,5 +3,6 @@ # Uncomment the following lines to disable these optional devices: =20 # Boards are selected by default, uncomment to keep out of the build. +# CONFIG_HEX_VIRT=3Dy # CONFIG_HEX_DSP=3Dy # CONFIG_L2VIC=3Dy diff --git a/configs/targets/hexagon-softmmu.mak b/configs/targets/hexagon-= softmmu.mak index fdfa29b4f39..a77c100f0c5 100644 --- a/configs/targets/hexagon-softmmu.mak +++ b/configs/targets/hexagon-softmmu.mak @@ -5,3 +5,4 @@ TARGET_XML_FILES=3Dhexagon-core.xml hexagon-hvx.xml TARGET_LONG_BITS=3D32 TARGET_NOT_USING_LEGACY_LDST_PHYS_API=3Dy TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=3Dy +TARGET_NEED_FDT=3Dy diff --git a/include/hw/hexagon/virt.h b/include/hw/hexagon/virt.h new file mode 100644 index 00000000000..a54eac5cf00 --- /dev/null +++ b/include/hw/hexagon/virt.h @@ -0,0 +1,43 @@ +/* + * Definitions for hexagon virt board. + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_HEXAGONVIRT_H +#define HW_HEXAGONVIRT_H + +#include "hw/core/boards.h" +#include "target/hexagon/cpu.h" + +struct HexagonVirtMachineState { + /*< private >*/ + MachineState parent_obj; + + int fdt_size; + MemoryRegion *sys; + MemoryRegion cfgtable; + MemoryRegion ram; + MemoryRegion tcm; + MemoryRegion vtcm; + MemoryRegion bios; + DeviceState *l2vic; + Clock *apb_clk; +}; + +void hexagon_load_fdt(const struct HexagonVirtMachineState *vms); + +enum { + VIRT_UART0, + VIRT_QTMR0, + VIRT_QTMR1, + VIRT_GPT, + VIRT_MMIO, + VIRT_FDT, +}; + +#define TYPE_HEXAGON_VIRT_MACHINE MACHINE_TYPE_NAME("virt") +OBJECT_DECLARE_SIMPLE_TYPE(HexagonVirtMachineState, HEXAGON_VIRT_MACHINE) + +#endif /* HW_HEXAGONVIRT_H */ diff --git a/hw/hexagon/virt.c b/hw/hexagon/virt.c new file mode 100644 index 00000000000..ff93b5221ba --- /dev/null +++ b/hw/hexagon/virt.c @@ -0,0 +1,456 @@ +/* + * Hexagon virt emulation + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/hexagon/virt.h" +#include "elf.h" +#include "hw/char/pl011.h" +#include "hw/core/clock.h" +#include "hw/core/sysbus-fdt.h" +#include "hw/hexagon/hexagon.h" +#include "hw/hexagon/hexagon_globalreg.h" +#include "hw/hexagon/hexagon_tlb.h" +#include "hw/core/loader.h" +#include "hw/core/qdev-properties.h" +#include "hw/core/qdev-clock.h" +#include "hw/core/register.h" +#include "qemu/error-report.h" +#include "qemu/guest-random.h" +#include "qemu/units.h" +#include "elf.h" +#include "machine_cfg_v68n_1024.h.inc" +#include "system/address-spaces.h" +#include "system/device_tree.h" +#include "system/reset.h" +#include "system/system.h" +#include + +static const int VIRTIO_DEV_COUNT =3D 8; + +static const MemMapEntry base_memmap[] =3D { + [VIRT_UART0] =3D { 0x10000000, 0x00000200 }, + [VIRT_MMIO] =3D { 0x11000000, 0x1000000, }, + [VIRT_GPT] =3D { 0xab000000, 0x00001000 }, + [VIRT_FDT] =3D { 0x99800000, 0x00400000 }, +}; + +static const int irqmap[] =3D { + [VIRT_MMIO] =3D 18, /* ...to 18 + VIRTIO_DEV_COUNT - 1 */ + [VIRT_GPT] =3D 12, + [VIRT_UART0] =3D 15, + [VIRT_QTMR0] =3D 2, + [VIRT_QTMR1] =3D 4, +}; + + +static void create_fdt(HexagonVirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + void *fdt =3D create_device_tree(&vms->fdt_size); + uint8_t rng_seed[32]; + + if (!fdt) { + error_report("create_device_tree() failed"); + exit(1); + } + + ms->fdt =3D fdt; + + qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2); + qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x1); + qemu_fdt_setprop_string(fdt, "/", "model", "hexagon-virt,qemu"); + qemu_fdt_setprop_string(fdt, "/", "compatible", "qcom,sm8150"); + + qemu_fdt_add_subnode(fdt, "/soc"); + qemu_fdt_setprop_cell(fdt, "/soc", "#address-cells", 0x2); + qemu_fdt_setprop_cell(fdt, "/soc", "#size-cells", 0x1); + qemu_fdt_setprop(fdt, "/soc", "ranges", NULL, 0); + + qemu_fdt_add_subnode(fdt, "/chosen"); + qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed)); + qemu_fdt_setprop(fdt, "/chosen", "rng-seed", rng_seed, sizeof(rng_seed= )); +} + +static void fdt_add_hvx(HexagonVirtMachineState *vms, + const struct hexagon_machine_config *m_cfg, + Error **errp) +{ + const MachineState *ms =3D MACHINE(vms); + uint32_t vtcm_size_bytes =3D m_cfg->cfgtable.vtcm_size_kb * 1024; + if (vtcm_size_bytes > 0) { + memory_region_init_ram(&vms->vtcm, NULL, "vtcm.ram", vtcm_size_byt= es, + errp); + memory_region_add_subregion(vms->sys, m_cfg->cfgtable.vtcm_base <<= 16, + &vms->vtcm); + + qemu_fdt_add_subnode(ms->fdt, "/soc/vtcm"); + qemu_fdt_setprop_string(ms->fdt, "/soc/vtcm", "compatible", + "qcom,hexagon_vtcm"); + + assert(sizeof(m_cfg->cfgtable.vtcm_base) =3D=3D sizeof(uint32_t)); + qemu_fdt_setprop_cells(ms->fdt, "/soc/vtcm", "reg", 0, + m_cfg->cfgtable.vtcm_base << 16, + vtcm_size_bytes); + } + + if (m_cfg->cfgtable.ext_contexts > 0) { + qemu_fdt_add_subnode(ms->fdt, "/soc/hvx"); + qemu_fdt_setprop_string(ms->fdt, "/soc/hvx", "compatible", + "qcom,hexagon-hvx"); + qemu_fdt_setprop_cells(ms->fdt, "/soc/hvx", "qcom,hvx-max-ctxts", + m_cfg->cfgtable.ext_contexts); + qemu_fdt_setprop_cells(ms->fdt, "/soc/hvx", "qcom,hvx-vlength", + m_cfg->cfgtable.hvx_vec_log_length); + } +} + +static int32_t irq_hvm_ic_phandle =3D -1; +static void fdt_add_hvm_pic_node(HexagonVirtMachineState *vms, + const struct hexagon_machine_config *m_cf= g) +{ + MachineState *ms =3D MACHINE(vms); + irq_hvm_ic_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + + qemu_fdt_setprop_cell(ms->fdt, "/soc", "interrupt-parent", + irq_hvm_ic_phandle); + + qemu_fdt_add_subnode(ms->fdt, "/soc/interrupt-controller"); + qemu_fdt_setprop_cell(ms->fdt, "/soc/interrupt-controller", + "#address-cells", 2); + qemu_fdt_setprop_cell(ms->fdt, "/soc/interrupt-controller", + "#interrupt-cells", 2); + qemu_fdt_setprop_string(ms->fdt, "/soc/interrupt-controller", "compati= ble", + "qcom,h2-pic,hvm-pic"); + qemu_fdt_setprop(ms->fdt, "/soc/interrupt-controller", + "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, "/soc/interrupt-controller", "phandle", + irq_hvm_ic_phandle); + + sysbus_mmio_map(SYS_BUS_DEVICE(vms->l2vic), 1, + m_cfg->cfgtable.fastl2vic_base << 16); +} + + +static void fdt_add_gpt_node(HexagonVirtMachineState *vms) +{ + g_autofree char *name =3D NULL; + MachineState *ms =3D MACHINE(vms); + + name =3D g_strdup_printf("/soc/gpt@%" PRIx64, + (int64_t)base_memmap[VIRT_GPT].base); + qemu_fdt_add_subnode(ms->fdt, name); + qemu_fdt_setprop_string(ms->fdt, name, "compatible", + "qcom,h2-timer,hvm-timer"); + qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", irqmap[VIRT_GPT], = 0); + qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0x0, + base_memmap[VIRT_GPT].base, + base_memmap[VIRT_GPT].size); +} + +static int32_t clock_phandle =3D -1; +static void fdt_add_clocks(const HexagonVirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + clock_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_add_subnode(ms->fdt, "/apb-pclk"); + qemu_fdt_setprop_string(ms->fdt, "/apb-pclk", "compatible", "fixed-clo= ck"); + qemu_fdt_setprop_cell(ms->fdt, "/apb-pclk", "#clock-cells", 0x0); + qemu_fdt_setprop_cell(ms->fdt, "/apb-pclk", "clock-frequency", 2400000= 0); + qemu_fdt_setprop_string(ms->fdt, "/apb-pclk", "clock-output-names", + "clk24mhz"); + qemu_fdt_setprop_cell(ms->fdt, "/apb-pclk", "phandle", clock_phandle); +} + +static void fdt_add_uart(const HexagonVirtMachineState *vms, int uart) +{ + char *nodename; + hwaddr base =3D base_memmap[uart].base; + hwaddr size =3D base_memmap[uart].size; + assert(uart =3D=3D 0); + int irq =3D irqmap[VIRT_UART0 + uart]; + const char compat[] =3D "arm,pl011\0arm,primecell"; + const char clocknames[] =3D "uartclk\0apb_pclk"; + MachineState *ms =3D MACHINE(vms); + DeviceState *dev; + SysBusDevice *s; + + dev =3D qdev_new(TYPE_PL011); + s =3D SYS_BUS_DEVICE(dev); + qdev_prop_set_chr(dev, "chardev", serial_hd(0)); + qdev_connect_clock_in(dev, "clk", vms->apb_clk); + sysbus_realize_and_unref(s, &error_fatal); + sysbus_mmio_map(s, 0, base); + if (vms->l2vic) { + sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->l2vic, irq)); + } + + nodename =3D g_strdup_printf("/pl011@%" PRIx64, base); + qemu_fdt_add_subnode(ms->fdt, nodename); + + /* Note that we can't use setprop_string because of the embedded NUL */ + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compa= t)); + qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, base, size); + if (vms->l2vic) { + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", + 32 + irq, 0); + qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent", + irq_hvm_ic_phandle); + } + qemu_fdt_setprop_cells(ms->fdt, nodename, "clocks", clock_phandle, + clock_phandle); + qemu_fdt_setprop(ms->fdt, nodename, "clock-names", clocknames, + sizeof(clocknames)); + + qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename); + qemu_fdt_add_subnode(ms->fdt, "/aliases"); + qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", nodename); + + g_free(nodename); +} + +static void fdt_add_cpu_nodes(const HexagonVirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + qemu_fdt_add_subnode(ms->fdt, "/cpus"); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); + + /* cpu nodes */ + for (int num =3D ms->smp.cpus - 1; num >=3D 0; num--) { + char *nodename =3D g_strdup_printf("/cpus/cpu@%d", num); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", + qemu_fdt_alloc_phandle(ms->fdt)); + g_free(nodename); + } +} + + +static void fdt_add_virtio_devices(const HexagonVirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + /* VirtIO MMIO devices */ + for (int i =3D 0; i < VIRTIO_DEV_COUNT; i++) { + char *nodename; + int irq =3D irqmap[VIRT_MMIO] + i; + size_t size =3D base_memmap[VIRT_MMIO].size; + hwaddr base =3D base_memmap[VIRT_MMIO].base + i * size; + + nodename =3D g_strdup_printf("/virtio_mmio@%" PRIx64, base); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "virtio,m= mio"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 1, + size); + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", irq, 0); + qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent", + irq_hvm_ic_phandle); + + sysbus_create_simple( + "virtio-mmio", base, + qdev_get_gpio_in(vms->l2vic, irqmap[VIRT_MMIO] + i)); + + g_free(nodename); + } +} + +static void virt_instance_init(Object *obj) +{ + HexagonVirtMachineState *vms =3D HEXAGON_VIRT_MACHINE(obj); + + create_fdt(vms); +} + +void hexagon_load_fdt(const HexagonVirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + hwaddr fdt_addr =3D base_memmap[VIRT_FDT].base; + uint32_t fdtsize =3D vms->fdt_size; + + g_assert(fdtsize <=3D base_memmap[VIRT_FDT].size); + /* copy in the device tree */ + rom_add_blob_fixed_as("fdt", ms->fdt, fdtsize, fdt_addr, + &address_space_memory); + qemu_register_reset_nosnapshotload( + qemu_fdt_randomize_seeds, + rom_ptr_for_as(&address_space_memory, fdt_addr, fdtsize)); +} + +static uint64_t load_kernel(const HexagonVirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + uint64_t entry =3D 0; + if (load_elf_ram_sym(ms->kernel_filename, NULL, NULL, NULL, &entry, NU= LL, + NULL, NULL, 0, EM_HEXAGON, 0, 0, &address_space_m= emory, + false, NULL) > 0) { + return entry; + } + error_report("error loading '%s'", ms->kernel_filename); + exit(1); +} + +static uint64_t load_bios(HexagonVirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + uint64_t bios_addr =3D 0x0; /* Load BIOS at reset vector address 0x0 = */ + int bios_size; + + bios_size =3D load_image_targphys(ms->firmware ?: "", + bios_addr, 64 * 1024, NULL); + if (bios_size < 0) { + error_report("Could not load BIOS '%s'", ms->firmware ?: ""); + exit(1); + } + + return bios_addr; /* Return entry point at address 0x0 */ +} + +static void do_cpu_reset(void *opaque) +{ + HexagonCPU *cpu =3D opaque; + CPUState *cs =3D CPU(cpu); + cpu_reset(cs); +} + +static void virt_init(MachineState *ms) +{ + HexagonVirtMachineState *vms =3D HEXAGON_VIRT_MACHINE(ms); + const struct hexagon_machine_config *m_cfg =3D &v68n_1024; + const char *cpu_model; + DeviceState *gsregs_dev; + DeviceState *tlb_dev; + HexagonCPU *cpu_0; + + qemu_fdt_setprop_string(ms->fdt, "/chosen", "bootargs", ms->kernel_cmd= line); + + vms->sys =3D get_system_memory(); + + /* Create APB clock for peripherals */ + vms->apb_clk =3D clock_new(OBJECT(ms), "apb-pclk"); + clock_set_hz(vms->apb_clk, 24000000); + + memory_region_init_ram(&vms->ram, NULL, "ddr.ram", ms->ram_size, + &error_fatal); + memory_region_add_subregion(vms->sys, 0x0, &vms->ram); + + if (m_cfg->l2tcm_size) { + memory_region_init_ram(&vms->tcm, NULL, "tcm.ram", m_cfg->l2tcm_si= ze, + &error_fatal); + memory_region_add_subregion(vms->sys, m_cfg->cfgtable.l2tcm_base <= < 16, + &vms->tcm); + } + + memory_region_init_rom(&vms->cfgtable, NULL, "config_table.rom", + sizeof(m_cfg->cfgtable), &error_fatal); + memory_region_add_subregion(vms->sys, m_cfg->cfgbase, &vms->cfgtable); + fdt_add_hvx(vms, m_cfg, &error_fatal); + cpu_model =3D ms->cpu_type; + + if (!cpu_model) { + cpu_model =3D HEXAGON_CPU_TYPE_NAME("v68"); + } + + gsregs_dev =3D qdev_new(TYPE_HEXAGON_GLOBALREG); + object_property_add_child(OBJECT(ms), "global-regs", OBJECT(gsregs_dev= )); + qdev_prop_set_uint64(gsregs_dev, "config-table-addr", m_cfg->cfgbase); + qdev_prop_set_uint32(gsregs_dev, "dsp-rev", v68_rev); + sysbus_realize_and_unref(SYS_BUS_DEVICE(gsregs_dev), &error_fatal); + + tlb_dev =3D qdev_new(TYPE_HEXAGON_TLB); + object_property_add_child(OBJECT(ms), "tlb", OBJECT(tlb_dev)); + qdev_prop_set_uint32(tlb_dev, "num-entries", + m_cfg->cfgtable.jtlb_size_entries); + sysbus_realize_and_unref(SYS_BUS_DEVICE(tlb_dev), &error_fatal); + + cpu_0 =3D NULL; + for (int i =3D 0; i < ms->smp.cpus; i++) { + HexagonCPU *cpu =3D HEXAGON_CPU(object_new(ms->cpu_type)); + qemu_register_reset(do_cpu_reset, cpu); + + if (i =3D=3D 0) { + cpu_0 =3D cpu; + if (ms->kernel_filename) { + uint64_t entry =3D load_kernel(vms); + qdev_prop_set_uint32(DEVICE(cpu_0), "exec-start-addr", ent= ry); + } else if (ms->firmware) { + uint64_t entry =3D load_bios(vms); + qdev_prop_set_uint32(DEVICE(cpu_0), "exec-start-addr", ent= ry); + } + } + qdev_prop_set_uint32(DEVICE(cpu), "htid", i); + qdev_prop_set_bit(DEVICE(cpu), "start-powered-off", (i !=3D 0)); + object_property_set_link(OBJECT(cpu), "global-regs", + OBJECT(gsregs_dev), &error_fatal); + object_property_set_link(OBJECT(cpu), "tlb", + OBJECT(tlb_dev), &error_fatal); + + if (!qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal)) { + return; + } + } + /* TODO: enable l2vic when l2vic device arrives */ + if (object_class_by_name("l2vic")) { + vms->l2vic =3D sysbus_create_varargs( + "l2vic", m_cfg->l2vic_base, + qdev_get_gpio_in(DEVICE(cpu_0), 0), + qdev_get_gpio_in(DEVICE(cpu_0), 1), + qdev_get_gpio_in(DEVICE(cpu_0), 2), + qdev_get_gpio_in(DEVICE(cpu_0), 3), + qdev_get_gpio_in(DEVICE(cpu_0), 4), + qdev_get_gpio_in(DEVICE(cpu_0), 5), + qdev_get_gpio_in(DEVICE(cpu_0), 6), + qdev_get_gpio_in(DEVICE(cpu_0), 7), NULL); + + fdt_add_hvm_pic_node(vms, m_cfg); + fdt_add_virtio_devices(vms); + fdt_add_gpt_node(vms); + } + + fdt_add_cpu_nodes(vms); + fdt_add_clocks(vms); + fdt_add_uart(vms, VIRT_UART0); + + rom_add_blob_fixed_as("config_table.rom", &m_cfg->cfgtable, + sizeof(m_cfg->cfgtable), m_cfg->cfgbase, + &address_space_memory); + + + hexagon_load_fdt(vms); +} + + +static void virt_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + + mc->desc =3D "Hexagon Virtual Machine"; + mc->init =3D virt_init; + mc->default_cpu_type =3D HEXAGON_CPU_TYPE_NAME("v68"); + mc->default_ram_size =3D 4 * GiB; + mc->max_cpus =3D 8; + mc->default_cpus =3D 8; + mc->is_default =3D false; + mc->default_kernel_irqchip_split =3D false; + mc->block_default_type =3D IF_VIRTIO; + mc->default_boot_order =3D NULL; + mc->no_cdrom =3D 1; + mc->numa_mem_supported =3D false; + mc->default_nic =3D "virtio-mmio-bus"; +} + + +static const TypeInfo virt_machine_types[] =3D { { + .name =3D TYPE_HEXAGON_VIRT_MACHINE, + .parent =3D TYPE_MACHINE, + .instance_size =3D sizeof(HexagonVirtMachineState), + .class_init =3D virt_class_init, + .instance_init =3D virt_instance_init, +} }; + +DEFINE_TYPES(virt_machine_types) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 355abb4fd24..01781a76caf 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -68,6 +68,8 @@ static ObjectClass *hexagon_cpu_class_by_name(const char = *cpu_model) =20 static const Property hexagon_cpu_properties[] =3D { #if !defined(CONFIG_USER_ONLY) + DEFINE_PROP_LINK("tlb", HexagonCPU, tlb, TYPE_HEXAGON_TLB, + HexagonTLBState *), DEFINE_PROP_UINT32("exec-start-addr", HexagonCPU, boot_addr, 0xfffffff= f), DEFINE_PROP_LINK("global-regs", HexagonCPU, globalregs, TYPE_HEXAGON_GLOBALREG, HexagonGlobalRegState *), diff --git a/hw/hexagon/Kconfig b/hw/hexagon/Kconfig index cdf7770a305..52065ab3b22 100644 --- a/hw/hexagon/Kconfig +++ b/hw/hexagon/Kconfig @@ -2,3 +2,13 @@ config HEX_DSP bool default y depends on HEXAGON + +config HEX_VIRT + bool + default y + depends on HEX_DSP && FDT + select DEVICE_TREE + select VIRTIO_MMIO + select PL011 + select VIRTIO_BLK + select VIRTIO_SCSI diff --git a/hw/hexagon/meson.build b/hw/hexagon/meson.build index f528d2bc4ab..5b6a5e11a17 100644 --- a/hw/hexagon/meson.build +++ b/hw/hexagon/meson.build @@ -4,3 +4,5 @@ hexagon_ss.add(files('hexagon_globalreg.c')) hexagon_ss.add(when: 'CONFIG_HEX_DSP', if_true: files('hexagon_dsp.c')) =20 hw_arch +=3D {'hexagon': hexagon_ss} + +hexagon_ss.add(when: 'CONFIG_HEX_VIRT', if_true: files('virt.c')) diff --git a/tests/qemu-iotests/testenv.py b/tests/qemu-iotests/testenv.py index c357e6ebf50..86bcdf7cfad 100644 --- a/tests/qemu-iotests/testenv.py +++ b/tests/qemu-iotests/testenv.py @@ -259,6 +259,7 @@ def __init__(self, source_dir: str, build_dir: str, ('arm', 'virt'), ('aarch64', 'virt'), ('avr', 'mega2560'), + ('hexagon', 'virt'), ('m68k', 'virt'), ('or1k', 'virt'), ('riscv32', 'virt'), --=20 2.34.1 From nobody Sat May 30 20:11:37 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1776373507; cv=none; d=zohomail.com; s=zohoarc; b=gnmmR/ursQzlfQMKZ4Bz+cbVir5WY8OqN6sEmbR/k+eBTLOkg1d/vxSzXpEp9XE7KHDXDdfh1GeJGgF+kUoqkM0Nttbs8zjGzB8mVGMj2y4oPQqt5wlEKCoND45zKLAxodF8AuKCQyIiMbJuLAF3CclkSQRWh3osDq5tvygV4zk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1776373507; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DeH2wubJHVYpkGei61VcjbWJb/j95FBb/C0QOgjdibs=; b=LomiK9QTpw1Bsnk+yGtGnfKVEB1Hd09m7xrMOmlvGQyEfo07L+85XK/Gjw4dtZIGaHcyrI2Y1Ek8gew4t33MJYHiZVlRmsRaLN8sP/nAqE6SLnI2tDH0OptU34qiMkdDNlADT2svqsAqyA5sVL5YCK11tye5vNBYm/Mrw3Hh07c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1776373507117817.1722006285802; Thu, 16 Apr 2026 14:05:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wDTsC-00008t-0F; Thu, 16 Apr 2026 17:03:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs5-0008WB-Ly for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:34 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wDTs4-00011K-3z for qemu-devel@nongnu.org; Thu, 16 Apr 2026 17:03:33 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63GF1tb64027870 for ; Thu, 16 Apr 2026 21:03:30 GMT Received: from mail-dy1-f197.google.com (mail-dy1-f197.google.com [74.125.82.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk227sarw-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Apr 2026 21:03:30 +0000 (GMT) Received: by mail-dy1-f197.google.com with SMTP id 5a478bee46e88-2d3a617ad90so29782662eec.0 for ; Thu, 16 Apr 2026 14:03:30 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2de8c90cd7esm11176277eec.13.2026.04.16.14.03.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Apr 2026 14:03:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= DeH2wubJHVYpkGei61VcjbWJb/j95FBb/C0QOgjdibs=; b=NH4u7sumtMg33KNi KRGAddqGgRGh7AreqQ7ldOrS7ZoCbqrGTCQDy/GFI8U4ZzExvRvSOg+uoyeQGvm4 9sk1OdMmnHap4Xtjn1LF6+mCmSf66tknhqIEy887S8WkF//oftayifCdmS49OgsQ Se5cVn1gaDKyd+xoQBKKZnGmrb+2kF/eV6Be82YCvgbbS/ZB1Y9XSnftrATPu5ao szjuz0jkYt/Y9eRkSPOjN+16U/9Du9hWeSuFQo3nepOeKIMSQZi1AnvY520QguB9 T1rgNu0kkyXcP/BUhH6fD55vRcpZecSckATY7P3RfnVFYsGsyKHoATK2fhQWa34y AIcBlg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776373409; x=1776978209; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DeH2wubJHVYpkGei61VcjbWJb/j95FBb/C0QOgjdibs=; b=MhyviaxWfD7tAwvqVxOVKTK4cSwr6xBs+9JpKI6UURx4bJ5cB/AirhI6VuIs+fH4Sp 6MIZIIpyfTgq5DvDyU5NtdfeZ8LLSjEkj4mvfp0St8V7upUQaOZfNk7Ip3RxG7yKhcc4 XAJJk7nH5vN/OK3xInbFDVDtoX4A2COEhfpPRUp3sk8tPvTebyHcnCjJ0ydCsE535l/o inoo9qzaGW8p0xDuREbZdkwmShgt4JTZDlvpOpP+/e52vVCrBbbQDDpiIoXu1xF/X2BD NP0a7/tVXMk+KtXEBbSpzBudpF06upCVTfnqLz9XK3sVW1HAbPZFyOn4aot4ySNapdyM 2vQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776373409; x=1776978209; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=DeH2wubJHVYpkGei61VcjbWJb/j95FBb/C0QOgjdibs=; b=qNfkwoYoaopwXXBOabaGC6neFO0lLYouMFJXK5+O874UypuI22Hq4OEbhBFuCj4VLC FxDFzdokvWS8St/WWvnNuqNUXliZLdOV59XpZl8//R1z8KQJLDs4zHCUlM5sm2xb01iY /QW2/mAuSBVmjjo7gFBu8gYlt/5gGc2bTIhWN3IlNs0iAOCAp9UtnP/b/P8WeKYWDe3o fTrhV5usTzlspcAAs4ucTTxwuRyrS9VUPx7OwTfeXJ2ec0j3Lq+4VKOdJdFixH2Hl4H0 ZFadkIhrpPdeF3b+a1KBVqSZouMy0ykVuYCPAgl1+Cv1jnf1GnBmSNUWUL9TwPg4qTdy 0dfg== X-Gm-Message-State: AOJu0Yy7ujpu1wmm4idjeI6Wb1uK9NY+DlsdvmAe6RgJ5g0fY15yqguv D1mhLh9x5d49O1PEb43mgVxIoTMjhLGjNSHMdBGhlhnGE+C49HoAaVdW+gQbRO+0Vwa3qpr1geM 6tugBii/iqReyoU50mjqEwtyMUHBfBsuF0haUFQsxhczNZcKu6rgHFZL6CtwFW6CtFQ== X-Gm-Gg: AeBDietWgu1/n95FhWUGsWOJaITI2sUJG2xPh/B72z0MFhoPq7KCgNkm9/Z8OsMitjC 4+x1jHBQ+NSmeBXOY0KRx9JQcFEMvKDNMQPrN9wkSyjF6pE293AxaZXM3RvNZjzlLHfDO28moFj 8v2vhCzGDqIaxDCnC1lDUvff4lanpDAh9pW97P/xKWbQDfmxMBLnPw+shc6zm/fxjIBZlfqwfXO danyP8/BOuATqDgUtdc8NvoDYm283CIOzYc63r+b+LAkMyspnx0xAK/19K/mhESP7uk+6r98+3o 6qRDnAEPfdf22NT70b0SE13Ms1tAa2TsJvGMTHdt3XNyGVZ7zCzZ1zWOaTbPzcMOOLAyWg1Cdye yxrLqnUkvKkJyiADlYNz8Y3UMWzxFzfMDKK10nopboAxanEnqGg95zSy5C4pz37bOcjCQQwleZG 6AQ4k7 X-Received: by 2002:a05:7300:6426:b0:2c0:c5e4:605f with SMTP id 5a478bee46e88-2e2e5bf4b4cmr607692eec.24.1776373409251; Thu, 16 Apr 2026 14:03:29 -0700 (PDT) X-Received: by 2002:a05:7300:6426:b0:2c0:c5e4:605f with SMTP id 5a478bee46e88-2e2e5bf4b4cmr607666eec.24.1776373408748; Thu, 16 Apr 2026 14:03:28 -0700 (PDT) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, philmd@linaro.org, ltaylorsimpson@gmail.com, matheus.bernardino@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, pierrick.bouvier@oss.qualcomm.com, Fabiano Rosas , Laurent Vivier , Paolo Bonzini Subject: [PATCH v5 9/9] tests/qtest: Add hexagon boot-serial-test Date: Thu, 16 Apr 2026 14:03:05 -0700 Message-Id: <20260416210305.2255579-10-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> References: <20260416210305.2255579-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDE5OSBTYWx0ZWRfX/Xm2nn1NEGe3 7ePDD6jHARg9etNDktKXEBw3BeNgj2XASvIjKuCK57eerOpnV8M32VRrKyJxO9sYWSdfWqbt/Gx /V2yhzgLxim91EWIAcPXONHtrYkSdz93euU0W/9WWmcFOb5tqPXL4KTDfo3U/+V9wE5wuYKweaY FjVUt2prrV8XIiDtLWCv68McwsjSUdo4L7MeeRi+Ne2UcGN1oRIaPvrvgxmySzmONtiR5Swsh87 lRF3t1EFHCGeN1T2qZVzUd/mtPPjVzLvrAgT7upzAW4bN9tWdMg1FDl+K0t+22Ds4xQwO3nnpe0 jXF7PK9ouxmvX6QTH2dDOCO0L0y5AYfKSW8a1kSxvSqGdjMyV6fouRjn9d0r5biwjrLLkkAX/if A/4y322rEaCDfPoE1p7+qervFbP/uGV05gbWiGn6dZvUdT8bOSyVTiPjvlZr4t4W21D4+YoSxMB 00LKQSTWGIV0xbwEWWA== X-Proofpoint-ORIG-GUID: 4MPVNaY0Fr6JPQRtbEUHDYSPWiqFRizu X-Proofpoint-GUID: 4MPVNaY0Fr6JPQRtbEUHDYSPWiqFRizu X-Authority-Analysis: v=2.4 cv=Iuoutr/g c=1 sm=1 tr=0 ts=69e14ea2 cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=mx_w8yxdHMTqIFmIFlQA:9 a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 suspectscore=0 clxscore=1015 impostorscore=0 malwarescore=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160199 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1776373508452158500 Add boot-serial-test support for Hexagon architecture using the virt machine. Reviewed-by: Fabiano Rosas Signed-off-by: Brian Cain Acked-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- tests/qtest/boot-serial-test.c | 8 ++++++++ tests/qtest/meson.build | 2 ++ 2 files changed, 10 insertions(+) diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c index bcd0a9c50e7..37fee7a91c4 100644 --- a/tests/qtest/boot-serial-test.c +++ b/tests/qtest/boot-serial-test.c @@ -142,6 +142,13 @@ static const uint8_t kernel_stm32vldiscovery[] =3D { 0x04, 0x38, 0x01, 0x40 /* 0x40013804 =3D USART1 TXD */ }; =20 +static const uint8_t bios_hexagon[] =3D { + 0x00, 0x40, 0x00, 0x01, /* immext(#0x10000000) */ + 0x00, 0xc0, 0x00, 0x78, /* r0 =3D ##0x10000000 */ + 0x54, 0xc0, 0x00, 0x3c, /* memb(r0+#0) =3D #0x54 Write= 'T' */ + 0xf8, 0xff, 0xff, 0x59 /* jump 0x0 ; Loop back to sta= rt */ +}; + typedef struct testdef { const char *arch; /* Target architecture */ const char *machine; /* Name of the machine */ @@ -194,6 +201,7 @@ static const testdef_t tests[] =3D { { "arm", "microbit", "", "T", sizeof(kernel_nrf51), kernel_nrf51 }, { "arm", "stm32vldiscovery", "", "T", sizeof(kernel_stm32vldiscovery), kernel_stm32vldiscovery }, + { "hexagon", "virt", "", "TT", sizeof(bios_hexagon), NULL, bios_hexago= n }, =20 { NULL } }; diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index be4fa627b5f..baa1195371b 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -290,6 +290,8 @@ qtests_riscv64 =3D ['riscv-csr-test'] + \ config_all_devices.has_key('CONFIG_RISCV_IOMMU') ? ['iommu-riscv-test'] : []) =20 +qtests_hexagon =3D ['boot-serial-test'] + qos_test_ss =3D ss.source_set() qos_test_ss.add( 'ac97-test.c', --=20 2.34.1