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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1775678210133158500 Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- MAINTAINERS | 1 + configs/devices/hexagon-softmmu/default.mak | 7 +++++++ configs/targets/hexagon-softmmu.mak | 7 +++++++ target/hexagon/cpu.h | 7 +------ target/hexagon/cpu.c | 3 +-- target/Kconfig | 1 + target/hexagon/Kconfig | 2 ++ target/hexagon/meson.build | 13 ++++++++++++- 8 files changed, 32 insertions(+), 9 deletions(-) create mode 100644 configs/devices/hexagon-softmmu/default.mak create mode 100644 configs/targets/hexagon-softmmu.mak create mode 100644 target/hexagon/Kconfig diff --git a/MAINTAINERS b/MAINTAINERS index b9a7c553dfa..ed661c9f12e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -254,6 +254,7 @@ F: linux-user/hexagon/ F: tests/tcg/hexagon/ F: disas/hexagon.c F: configs/targets/hexagon-linux-user/default.mak +F: configs/devices/hexagon-softmmu/default.mak F: docker/dockerfiles/debian-hexagon-cross.docker F: gdbstub/gdb-xml/hexagon*.xml F: docs/system/target-hexagon.rst diff --git a/configs/devices/hexagon-softmmu/default.mak b/configs/devices/= hexagon-softmmu/default.mak new file mode 100644 index 00000000000..08e709aea72 --- /dev/null +++ b/configs/devices/hexagon-softmmu/default.mak @@ -0,0 +1,7 @@ +# Default configuration for hexagon-softmmu + +# Uncomment the following lines to disable these optional devices: + +# Boards are selected by default, uncomment to keep out of the build. +# CONFIG_HEX_DSP=3Dy +# CONFIG_L2VIC=3Dy diff --git a/configs/targets/hexagon-softmmu.mak b/configs/targets/hexagon-= softmmu.mak new file mode 100644 index 00000000000..fdfa29b4f39 --- /dev/null +++ b/configs/targets/hexagon-softmmu.mak @@ -0,0 +1,7 @@ +# Default configuration for hexagon-softmmu + +TARGET_ARCH=3Dhexagon +TARGET_XML_FILES=3Dhexagon-core.xml hexagon-hvx.xml +TARGET_LONG_BITS=3D32 +TARGET_NOT_USING_LEGACY_LDST_PHYS_API=3Dy +TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=3Dy diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 09d5cac4fe5..18dcfdb0b0a 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -37,12 +37,7 @@ typedef struct HexagonGlobalRegState HexagonGlobalRegSta= te; #include "mmvec/mmvec.h" #include "hw/core/registerfields.h" =20 -#ifndef CONFIG_USER_ONLY -#error "Hexagon does not support system emulation" -#endif - -#ifndef CONFIG_USER_ONLY -#endif +#include "reg_fields.h" =20 #define NUM_PREGS 4 #define TOTAL_PER_THREAD_REGS 64 diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 9883c4d1681..355abb4fd24 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -713,9 +713,8 @@ static vaddr hexagon_pointer_wrap(CPUState *cs, int mmu= _idx, #endif =20 static const TCGCPUOps hexagon_tcg_ops =3D { - /* MTTCG not yet supported: require strict ordering */ .guest_default_memory_order =3D TCG_MO_ALL, - .mttcg_supported =3D false, + .mttcg_supported =3D true, .initialize =3D hexagon_translate_init, .translate_code =3D hexagon_translate_code, .get_tb_cpu_state =3D hexagon_get_tb_cpu_state, diff --git a/target/Kconfig b/target/Kconfig index 3c73e3bae01..0288a3f4164 100644 --- a/target/Kconfig +++ b/target/Kconfig @@ -16,6 +16,7 @@ source sh4/Kconfig source sparc/Kconfig source tricore/Kconfig source xtensa/Kconfig +source hexagon/Kconfig =20 config TARGET_BIG_ENDIAN bool diff --git a/target/hexagon/Kconfig b/target/hexagon/Kconfig new file mode 100644 index 00000000000..7e556f35063 --- /dev/null +++ b/target/hexagon/Kconfig @@ -0,0 +1,2 @@ +config HEXAGON + bool diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build index 528beca3cd0..bc7a292e47b 100644 --- a/target/hexagon/meson.build +++ b/target/hexagon/meson.build @@ -235,6 +235,7 @@ decodetree_trans_funcs_generated =3D custom_target( command: [python, files('gen_trans_funcs.py'), semantics_generated, '@= OUTPUT@'], ) hexagon_ss.add(decodetree_trans_funcs_generated) +hexagon_softmmu_ss =3D ss.source_set() =20 hexagon_ss.add(files( 'cpu.c', @@ -253,6 +254,14 @@ hexagon_ss.add(files( 'mmvec/system_ext_mmvec.c', )) =20 +hexagon_softmmu_ss.add(files( + 'cpu_helper.c', + 'hex_mmu.c', + 'hex_interrupts.c', + 'hexswi.c', + 'machine.c', +)) + # # Step 4.5 # We use flex/bison based idef-parser to generate TCG code for a lot @@ -262,7 +271,8 @@ hexagon_ss.add(files( # idef-generated-enabled-instructions # idef_parser_enabled =3D get_option('hexagon_idef_parser') -if idef_parser_enabled and 'hexagon-linux-user' in target_dirs +if idef_parser_enabled and ('hexagon-linux-user' in target_dirs or + 'hexagon-softmmu' in target_dirs) idef_parser_input_generated =3D custom_target( 'idef_parser_input.h.inc', output: 'idef_parser_input.h.inc', @@ -390,3 +400,4 @@ analyze_funcs_generated =3D custom_target( hexagon_ss.add(analyze_funcs_generated) =20 target_arch +=3D {'hexagon': hexagon_ss} +target_system_arch +=3D {'hexagon': hexagon_softmmu_ss} --=20 2.34.1