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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1775675985884158500 From: Matheus Tavares Bernardino Signed-off-by: Matheus Tavares Bernardino Reviewed-by: Taylor Simpson --- target/hexagon/cpu.h | 1 + target/hexagon/cpu.c | 19 +++++++++++++++++++ target/hexagon/op_helper.c | 16 ++++++++++++++-- 3 files changed, 34 insertions(+), 2 deletions(-) diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 1048e767e6d..09d5cac4fe5 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -219,6 +219,7 @@ G_NORETURN void hexagon_raise_exception_err(CPUHexagonS= tate *env, * not stopped. */ bool hexagon_thread_is_enabled(CPUHexagonState *thread_env); +uint32_t hexagon_greg_read(CPUHexagonState *env, uint32_t reg); void hexagon_cpu_soft_reset(CPUHexagonState *env); #endif =20 diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index a48d6178e06..bd3eec0d525 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -765,6 +765,25 @@ static void hexagon_cpu_class_init(ObjectClass *c, con= st void *data) #endif } =20 +#ifndef CONFIG_USER_ONLY +uint32_t hexagon_greg_read(CPUHexagonState *env, uint32_t reg) +{ + if (reg <=3D HEX_GREG_G3) { + return env->greg[reg]; + } + switch (reg) { + case HEX_GREG_GPCYCLELO: + return hexagon_get_sys_pcycle_count_low(env); + case HEX_GREG_GPCYCLEHI: + return hexagon_get_sys_pcycle_count_high(env); + default: + qemu_log_mask(LOG_UNIMP, "reading greg %" PRId32 + " not yet supported.\n", reg); + return 0; + } +} +#endif + #define DEFINE_CPU(type_name, initfn) \ { \ .name =3D type_name, \ diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index c4ad6015689..a1c0c9910f2 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -1877,13 +1877,25 @@ uint64_t HELPER(sreg_read_pair)(CPUHexagonState *en= v, uint32_t reg) } =20 uint32_t HELPER(greg_read)(CPUHexagonState *env, uint32_t reg) + { - g_assert_not_reached(); + return hexagon_greg_read(env, reg); } =20 uint64_t HELPER(greg_read_pair)(CPUHexagonState *env, uint32_t reg) + { - g_assert_not_reached(); + if (reg =3D=3D HEX_GREG_G0 || reg =3D=3D HEX_GREG_G2) { + return (uint64_t)(env->greg[reg]) | + (((uint64_t)(env->greg[reg + 1])) << 32); + } + switch (reg) { + case HEX_GREG_GPCYCLELO: + return hexagon_get_sys_pcycle_count(env); + default: + return (uint64_t)hexagon_greg_read(env, reg) | + ((uint64_t)(hexagon_greg_read(env, reg + 1)) << 32); + } } =20 /* --=20 2.34.1