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Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- target/arm/tcg/arm_ldst.h | 47 -------------------------------------- target/arm/tcg/translate.c | 24 ++++++++++++++++++- 2 files changed, 23 insertions(+), 48 deletions(-) diff --git a/target/arm/tcg/arm_ldst.h b/target/arm/tcg/arm_ldst.h index cee0548a1c7..e69de29bb2d 100644 --- a/target/arm/tcg/arm_ldst.h +++ b/target/arm/tcg/arm_ldst.h @@ -1,47 +0,0 @@ -/* - * ARM load/store instructions for code (armeb-user support) - * - * Copyright (c) 2012 CodeSourcery, LLC - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#ifndef ARM_LDST_H -#define ARM_LDST_H - -#include "exec/translator.h" -#include "qemu/bswap.h" - -/* Load an instruction and return it in the standard little-endian order */ -static inline uint32_t arm_ldl_code(CPUARMState *env, DisasContextBase *s, - target_ulong addr, bool sctlr_b) -{ - return translator_ldl_swap(env, s, addr, bswap_code(sctlr_b)); -} - -/* Ditto, for a halfword (Thumb) instruction */ -static inline uint16_t arm_lduw_code(CPUARMState *env, DisasContextBase* s, - target_ulong addr, bool sctlr_b) -{ -#ifndef CONFIG_USER_ONLY - /* In big-endian (BE32) mode, adjacent Thumb instructions have been sw= apped - within each word. Undo that now. */ - if (sctlr_b) { - addr ^=3D 2; - } -#endif - return translator_lduw_swap(env, s, addr, bswap_code(sctlr_b)); -} - -#endif diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 0b3b4ab86be..b6abaff4903 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -25,7 +25,6 @@ #define TCG_ADDRESS_BITS 32 #include "tcg/tcg-op-mem.h" #include "qemu/log.h" -#include "arm_ldst.h" #include "semihosting/semihost.h" #include "cpregs.h" #include "exec/target_page.h" @@ -6281,6 +6280,22 @@ static void disas_thumb_insn(DisasContext *s, uint32= _t insn) } } =20 +/* Ditto, for a halfword (Thumb) instruction */ +static uint16_t arm_lduw_code(CPUARMState *env, DisasContextBase* s, + target_ulong addr, bool sctlr_b) +{ +#ifndef CONFIG_USER_ONLY + /* + * In big-endian (BE32) mode, adjacent Thumb instructions have been sw= apped + * within each word. Undo that now. + */ + if (sctlr_b) { + addr ^=3D 2; + } +#endif + return translator_lduw_swap(env, s, addr, bswap_code(sctlr_b)); +} + static bool insn_crosses_page(CPUARMState *env, DisasContext *s) { /* Return true if the insn at dc->base.pc_next might cross a page boun= dary. @@ -6515,6 +6530,13 @@ static void arm_post_translate_insn(DisasContext *dc) } } =20 +/* Load an instruction and return it in the standard little-endian order */ +static uint32_t arm_ldl_code(CPUARMState *env, DisasContextBase *s, + target_ulong addr, bool sctlr_b) +{ + return translator_ldl_swap(env, s, addr, bswap_code(sctlr_b)); +} + static void arm_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); --=20 2.47.3