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Tsirkin" , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Zhao Liu , Thomas Huth Subject: [PATCH 08/10] hw/i386/isapc: Adjust the check for valid CPUs in the isapc machine Date: Thu, 2 Apr 2026 11:51:30 +0200 Message-ID: <20260402095132.29245-9-thuth@redhat.com> In-Reply-To: <20260402095132.29245-1-thuth@redhat.com> References: <20260402095132.29245-1-thuth@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: 27 X-Spam_score: 2.7 X-Spam_bar: ++ X-Spam_report: (2.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.01, RCVD_IN_SBL_CSS=3.335, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1, RCVD_IN_VALIDITY_RPBL_BLOCKED=1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1775123568936158500 Content-Type: text/plain; charset="utf-8" From: Thomas Huth Now that we can run in both, x86_64 and i386 mode with one binary, we must not hard-code the suffix of the CPU names here anymore. Signed-off-by: Thomas Huth --- target/i386/cpu.h | 1 + hw/i386/isapc.c | 18 ++++++++++-------- target/i386/cpu.c | 2 +- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 38309773ea8..78f2dadc2e3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2722,6 +2722,7 @@ void mark_unavailable_features(X86CPU *cpu, FeatureWo= rd w, uint64_t mask, const char *verbose_prefix); void mark_forced_on_features(X86CPU *cpu, FeatureWord w, uint64_t mask, const char *verbose_prefix); +char *x86_cpu_type_name(const char *model_name); =20 static inline bool x86_has_cpuid_0x1f(X86CPU *cpu) { diff --git a/hw/i386/isapc.c b/hw/i386/isapc.c index 1ba9ae22cc3..c772b7f533a 100644 --- a/hw/i386/isapc.c +++ b/hw/i386/isapc.c @@ -43,13 +43,13 @@ static void pc_init_isa(MachineState *machine) =20 bool valid_cpu_type =3D false; static const char * const valid_cpu_types[] =3D { - X86_CPU_TYPE_NAME("486"), - X86_CPU_TYPE_NAME("athlon"), - X86_CPU_TYPE_NAME("kvm32"), - X86_CPU_TYPE_NAME("pentium"), - X86_CPU_TYPE_NAME("pentium2"), - X86_CPU_TYPE_NAME("pentium3"), - X86_CPU_TYPE_NAME("qemu32"), + "486", + "athlon", + "kvm32", + "pentium", + "pentium2", + "pentium3", + "qemu32", }; =20 /* @@ -59,8 +59,10 @@ static void pc_init_isa(MachineState *machine) * a warning if anyone tries to use a deprecated CPU. */ for (i =3D 0; i < ARRAY_SIZE(valid_cpu_types); i++) { - if (!strcmp(machine->cpu_type, valid_cpu_types[i])) { + g_autofree char *valid_cpu =3D x86_cpu_type_name(valid_cpu_types[i= ]); + if (!strcmp(machine->cpu_type, valid_cpu)) { valid_cpu_type =3D true; + break; } } =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 98e03cb9a88..a8ff1b29f33 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2274,7 +2274,7 @@ void host_cpuid(uint32_t function, uint32_t count, /* Return type name for a given CPU model name * Caller is responsible for freeing the returned string. */ -static char *x86_cpu_type_name(const char *model_name) +char *x86_cpu_type_name(const char *model_name) { if (target_i386()) { return g_strdup_printf("%s" I386_CPU_TYPE_SUFFIX, model_name); --=20 2.53.0