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Tsirkin" , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Zhao Liu , Thomas Huth Subject: [PATCH 01/10] target/i386/tcg/sysemu: Move target specific SMM code to separate functions Date: Thu, 2 Apr 2026 11:51:23 +0200 Message-ID: <20260402095132.29245-2-thuth@redhat.com> In-Reply-To: <20260402095132.29245-1-thuth@redhat.com> References: <20260402095132.29245-1-thuth@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1, RCVD_IN_VALIDITY_RPBL_BLOCKED=1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1775123608960158500 Content-Type: text/plain; charset="utf-8" From: Thomas Huth This code movement will make the next patch easier to read. Signed-off-by: Thomas Huth --- target/i386/tcg/system/smm_helper.c | 47 ++++++++++++++++++----------- 1 file changed, 30 insertions(+), 17 deletions(-) diff --git a/target/i386/tcg/system/smm_helper.c b/target/i386/tcg/system/s= mm_helper.c index fb028a8272f..3be78cd53d3 100644 --- a/target/i386/tcg/system/smm_helper.c +++ b/target/i386/tcg/system/smm_helper.c @@ -32,26 +32,13 @@ #define SMM_REVISION_ID 0x00020000 #endif =20 -void do_smm_enter(X86CPU *cpu) +static void sm_state_init(X86CPU *cpu) { CPUX86State *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); - target_ulong sm_state; SegmentCache *dt; int i, offset; - - qemu_log_mask(CPU_LOG_INT, "SMM: enter\n"); - log_cpu_state_mask(CPU_LOG_INT, CPU(cpu), CPU_DUMP_CCOP); - - env->msr_smi_count++; - env->hflags |=3D HF_SMM_MASK; - if (env->hflags2 & HF2_NMI_MASK) { - env->hflags2 |=3D HF2_SMM_INSIDE_NMI_MASK; - } else { - env->hflags2 |=3D HF2_NMI_MASK; - } - - sm_state =3D env->smbase + 0x8000; + target_ulong sm_state =3D env->smbase + 0x8000; =20 #ifdef TARGET_X86_64 for (i =3D 0; i < 6; i++) { @@ -156,6 +143,25 @@ void do_smm_enter(X86CPU *cpu) x86_stl_phys(cs, sm_state + 0x7efc, SMM_REVISION_ID); x86_stl_phys(cs, sm_state + 0x7ef8, env->smbase); #endif +} + +void do_smm_enter(X86CPU *cpu) +{ + CPUX86State *env =3D &cpu->env; + + qemu_log_mask(CPU_LOG_INT, "SMM: enter\n"); + log_cpu_state_mask(CPU_LOG_INT, CPU(cpu), CPU_DUMP_CCOP); + + env->msr_smi_count++; + env->hflags |=3D HF_SMM_MASK; + if (env->hflags2 & HF2_NMI_MASK) { + env->hflags2 |=3D HF2_SMM_INSIDE_NMI_MASK; + } else { + env->hflags2 |=3D HF2_NMI_MASK; + } + + sm_state_init(cpu); + /* init SMM cpu state */ =20 #ifdef TARGET_X86_64 @@ -191,9 +197,8 @@ void do_smm_enter(X86CPU *cpu) DESC_G_MASK | DESC_A_MASK); } =20 -void helper_rsm(CPUX86State *env) +static void rsm_load_regs(CPUX86State *env) { - X86CPU *cpu =3D env_archcpu(env); CPUState *cs =3D env_cpu(env); target_ulong sm_state; int i, offset; @@ -308,6 +313,14 @@ void helper_rsm(CPUX86State *env) env->smbase =3D x86_ldl_phys(cs, sm_state + 0x7ef8); } #endif +} + +void helper_rsm(CPUX86State *env) +{ + X86CPU *cpu =3D env_archcpu(env); + + rsm_load_regs(env); + if ((env->hflags2 & HF2_SMM_INSIDE_NMI_MASK) =3D=3D 0) { env->hflags2 &=3D ~HF2_NMI_MASK; } --=20 2.53.0