From nobody Thu Apr 2 01:08:59 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1774983243; cv=none; d=zohomail.com; s=zohoarc; b=KZ4NK8LNxu4A+Z2WNXcXXx/r14Kp8jwAlklXxFDLyWcqhzALJhMb+rmgnubpr4TYtQdi6M6PGHtCJ2Z358zmD6colBCWoF6AKKYzOL7Hu1gifmGsJGP5ZYoJ6dtqbJSIVcX7r6OFQCKVdWO/DVvgjv9rlxw8mK6dYV5VM0ugWTc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774983243; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=7ZwbgZJJncPiUu3tqQ+e7JcfpA5bP/Vf39KYsTR+hpk=; b=IaMJrkBJ/yyl0OLRNeXr4Ks4vGQniCn/dmtH5zJYesmZE9COC5IB1/8XfxsS6neIvxaoTh+9Aw6f/FcESNkBktX0XAyNoLGlBIAxiat1OD1fmwy0NosMTdOm7z26q9OiBLFaP8oQFCtUv3JiwF8snNlskVf0M910Wpm3rcZM+vg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774983243534977.54394363275; Tue, 31 Mar 2026 11:54:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w7eCV-0000C7-5q; Tue, 31 Mar 2026 14:52:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w7eCT-0000Ba-JN for qemu-devel@nongnu.org; Tue, 31 Mar 2026 14:52:29 -0400 Received: from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w7eCR-0001XB-Ul for qemu-devel@nongnu.org; Tue, 31 Mar 2026 14:52:29 -0400 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id D5FEA441E1; Tue, 31 Mar 2026 18:52:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D01F0C2BCB2; Tue, 31 Mar 2026 18:52:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774983146; bh=j6YiKCcMaXbFyNLBwqSZZWBBp25B8LnAt2uk9epec7U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fFO72NZ2LJ3zML+GpJhXIpHvcR9249S/Ll0qeX4e78JlmOuIB+uRWnSV0LXvdJ3WD ndSdxhElf7q0uLyVZQ0udu+WaJx9f//MWUoB1PRlsbHxrrp8PSrFHr5UPVuqHYhedw C0V9/xmv+FDWmkIcOsM6seYp8bO3WR4J4Nr3F3ConH8LsWsWC7vqgeqTthWTib1H9L /fYnCNxrZJygiH5xU5AYBSVzlEMtlHmLKuzEPzS+1t9kPmlh5D4KOo84kbHWC2fAu4 ghJRtX75TyRgP7qIIIO7OXRMJWkBXMSlhju8kmBbjIFQP+1khspj+XjdFPFjDZSxIH TKa/lZztTjtaw== From: Helge Deller To: qemu-devel@nongnu.org Cc: Helge Deller , Richard Henderson Subject: [PULL 3/8] hw/pci-host/astro: Implement LMMIO registers Date: Tue, 31 Mar 2026 20:52:14 +0200 Message-ID: <20260331185219.12187-4-deller@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260331185219.12187-1-deller@kernel.org> References: <20260331185219.12187-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2600:3c0a:e001:78e:0:1991:8:25; envelope-from=deller@kernel.org; helo=sea.source.kernel.org X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1774983245385154101 Content-Type: text/plain; charset="utf-8" From: Helge Deller Add code to adjust the memory mapping windows according to the LMMIO regist= ers in Astro. This allows SeaBIOS-hppa to configure Astro depending on existing PCI cards, and especially makes it possible to enable a VGA PCI card. Signed-off-by: Helge Deller --- hw/pci-host/astro.c | 84 +++++++++++++++++++++++++++++++++---- include/hw/pci-host/astro.h | 8 +++- 2 files changed, 81 insertions(+), 11 deletions(-) diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index b3eec4a291..a0afa09198 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -530,6 +530,78 @@ static ElroyState *elroy_init(int num) * Astro Runway chip. */ =20 +static void adjust_LMMIO_mapping(AstroState *s) +{ + MemoryRegion *lmmio; + uint64_t map_addr, map_size, align_mask; + uint32_t map_route, map_enabled, i; + + lmmio =3D &s->lmmio; + + /* read LMMIO distributed route and calculate size */ + map_route =3D s->ioc_ranges[(0x370 - 0x300) / 8] >> 58; + map_route =3D MIN(MAX(map_route, 20), 23); + + /* calculate size of each mapping, sum of all is 8-64 MB */ + map_size =3D 1ULL << map_route; + align_mask =3D ~(map_size - 1); + + /* read LMMIO_DIST_BASE for mapping address */ + map_addr =3D s->ioc_ranges[(0x360 - 0x300) / 8]; + map_enabled =3D map_addr & 1; + map_addr &=3D MAKE_64BIT_MASK(24, 5); + map_addr |=3D MAKE_64BIT_MASK(29, 36); + map_addr &=3D align_mask; + s->ioc_ranges[(0x360 - 0x300) / 8] =3D map_addr | map_enabled; + + /* make sure the lmmio region is initially turned off */ + if (lmmio->enabled) { + memory_region_set_enabled(lmmio, false); + } + + /* exit if range is not enabled */ + if (!map_enabled) { + return; + } + + if (!lmmio->name) { + memory_region_init_io(lmmio, OBJECT(s), &unassigned_io_ops, s, + "LMMIO", ROPES_PER_IOC * map_size); + memory_region_add_subregion_overlap(get_system_memory(), + map_addr, lmmio, 1); + } + + memory_region_set_address(lmmio, map_addr); + memory_region_set_size(lmmio, ROPES_PER_IOC * map_size); + memory_region_set_enabled(lmmio, true); + + for (i =3D 0; i < ELROY_NUM; i++) { + MemoryRegion *alias; + ElroyState *elroy; + int rope; + + elroy =3D s->elroy[i]; + alias =3D &elroy->lmmio_alias; + rope =3D elroy_rope_nr[i]; + if (alias->enabled) { + memory_region_set_enabled(alias, false); + } + + if (!alias->name) { + memory_region_init_alias(alias, OBJECT(elroy), + "lmmio-alias", &elroy->pci_mmio, 0, map_size); + memory_region_add_subregion_overlap(lmmio, rope * map_size, + alias, 2); + } + + memory_region_set_address(alias, rope * map_size); + memory_region_set_alias_offset(alias, + (uint32_t) (map_addr + rope * map_size)); + memory_region_set_size(alias, map_size); + memory_region_set_enabled(alias, true); + } +} + static void adjust_LMMIO_DIRECT_mapping(AstroState *s, unsigned int reg_in= dex) { MemoryRegion *lmmio_alias; @@ -689,6 +761,9 @@ static MemTxResult astro_chip_write_with_attrs(void *op= aque, hwaddr addr, if (index < LMMIO_DIRECT_RANGES * 3) { adjust_LMMIO_DIRECT_mapping(s, index); } + if (addr >=3D 0x360 && addr <=3D 0x370 + 7) { + adjust_LMMIO_mapping(s); + } break; case 0x10200: case 0x10220: @@ -892,15 +967,6 @@ static void astro_realize(DeviceState *obj, Error **er= rp) elroy->mmio_base[(0x0240 - 0x200) / 8] =3D rope * map_size | 0x01; elroy->mmio_base[(0x0248 - 0x200) / 8] =3D 0x0000e000; =20 - /* map elroys mmio */ - map_size =3D LMMIO_DIST_BASE_SIZE / ROPES_PER_IOC; - map_addr =3D F_EXTEND(LMMIO_DIST_BASE_ADDR + rope * map_size); - memory_region_init_alias(&elroy->pci_mmio_alias, OBJECT(elroy), - "pci-mmio-alias", - &elroy->pci_mmio, (uint32_t) map_addr, ma= p_size); - memory_region_add_subregion(get_system_memory(), map_addr, - &elroy->pci_mmio_alias); - /* map elroys io */ map_size =3D IOS_DIST_BASE_SIZE / ROPES_PER_IOC; map_addr =3D F_EXTEND(IOS_DIST_BASE_ADDR + rope * map_size); diff --git a/include/hw/pci-host/astro.h b/include/hw/pci-host/astro.h index 5eb1fa57c1..0cd384bceb 100644 --- a/include/hw/pci-host/astro.h +++ b/include/hw/pci-host/astro.h @@ -61,9 +61,10 @@ struct ElroyState { MemoryRegion this_mem; =20 MemoryRegion pci_mmio; - MemoryRegion pci_mmio_alias; - MemoryRegion pci_hole; MemoryRegion pci_io; + + MemoryRegion gmmio_alias; + MemoryRegion lmmio_alias; }; =20 struct AstroState { @@ -89,6 +90,9 @@ struct AstroState { MemoryRegion this_mem; MemoryRegion lmmio_direct[LMMIO_DIRECT_RANGES]; =20 + MemoryRegion lmmio; + MemoryRegion gmmio; + IOMMUMemoryRegion iommu; AddressSpace iommu_as; }; --=20 2.53.0