From nobody Thu Apr 2 01:10:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 177490324084112.27671671374776; Mon, 30 Mar 2026 13:40:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w7JPN-0002Ji-3s; Mon, 30 Mar 2026 16:40:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w7JPJ-0002JE-DU for qemu-devel@nongnu.org; Mon, 30 Mar 2026 16:40:22 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w7JPH-0005bE-KJ for qemu-devel@nongnu.org; Mon, 30 Mar 2026 16:40:21 -0400 Received: from localhost (localhost [127.0.0.1]) by zero.eik.bme.hu (Postfix) with ESMTP id A3E685969F9; Mon, 30 Mar 2026 22:40:17 +0200 (CEST) Received: from zero.eik.bme.hu ([127.0.0.1]) by localhost (zero.eik.bme.hu [127.0.0.1]) (amavis, port 10028) with ESMTP id H5jHS2q5AjBL; Mon, 30 Mar 2026 22:40:15 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 963A85969EC; Mon, 30 Mar 2026 22:40:15 +0200 (CEST) X-Virus-Scanned: amavis at eik.bme.hu From: BALATON Zoltan Subject: [PATCH v2] cirrus-vga: Make frame buffer endianness little endian by default MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , marcandre.lureau@redhat.com, Thomas Huth , Peter Xu , Fabiano Rosas , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Message-Id: <20260330204015.963A85969EC@zero.eik.bme.hu> Date: Mon, 30 Mar 2026 22:40:15 +0200 (CEST) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: 1 X-Spam_score: 0.1 X-Spam_bar: / X-Spam_report: (0.1 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1, RCVD_IN_VALIDITY_RPBL_BLOCKED=1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1774903245052158500 Content-Type: text/plain; charset="utf-8" VGA is usually little endian but in QEMU frame buffer defaults to target endianness. Add a property to allow users to override the default in case this change breaks something and make cirrus-vga little endian by default to match the real chip. This should be safe as cirrus-vga is not used by default on any machines. Signed-off-by: BALATON Zoltan --- hw/core/machine.c | 2 ++ hw/display/cirrus_vga.c | 6 ++++++ hw/display/cirrus_vga_internal.h | 2 ++ hw/display/cirrus_vga_isa.c | 2 ++ 4 files changed, 12 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index 0aa77a57e9..76d3f78a51 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -41,6 +41,8 @@ GlobalProperty hw_compat_10_2[] =3D { { "scsi-block", "migrate-pr", "off" }, { "isa-cirrus-vga", "global-vmstate", "true" }, + { "isa-cirrus-vga", "x-big-endian-fb", "auto" }, + { "cirrus-vga", "x-big-endian-fb", "auto" }, }; const size_t hw_compat_10_2_len =3D G_N_ELEMENTS(hw_compat_10_2); =20 diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 629b34fc68..d56ca01e6d 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -2930,6 +2930,10 @@ void cirrus_init_common(CirrusVGAState *s, Object *o= wner, s->vga.cursor_invalidate =3D cirrus_cursor_invalidate; s->vga.cursor_draw_line =3D cirrus_cursor_draw_line; =20 + if (s->big_endian_fb !=3D ON_OFF_AUTO_AUTO) { + s->vga.big_endian_fb =3D (s->big_endian_fb =3D=3D ON_OFF_AUTO_ON); + } + qemu_register_reset(cirrus_reset, s); } =20 @@ -2987,6 +2991,8 @@ static const Property pci_vga_cirrus_properties[] =3D= { cirrus_vga.vga.vram_size_mb, 4), DEFINE_PROP_BOOL("blitter", struct PCICirrusVGAState, cirrus_vga.enable_blitter, true), + DEFINE_PROP_ON_OFF_AUTO("x-big-endian-fb", struct PCICirrusVGAState, + cirrus_vga.big_endian_fb, ON_OFF_AUTO_OFF), }; =20 static void cirrus_vga_class_init(ObjectClass *klass, const void *data) diff --git a/hw/display/cirrus_vga_internal.h b/hw/display/cirrus_vga_inter= nal.h index a78ebbd920..4813c40de3 100644 --- a/hw/display/cirrus_vga_internal.h +++ b/hw/display/cirrus_vga_internal.h @@ -26,6 +26,7 @@ #ifndef CIRRUS_VGA_INTERNAL_H #define CIRRUS_VGA_INTERNAL_H =20 +#include "qapi/qapi-types-common.h" #include "vga_int.h" =20 /* IDs */ @@ -94,6 +95,7 @@ typedef struct CirrusVGAState { int real_vram_size; /* XXX: suppress that */ int device_id; int bustype; + OnOffAuto big_endian_fb; } CirrusVGAState; =20 void cirrus_init_common(CirrusVGAState *s, Object *owner, diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 76034a8860..01144bb9e9 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -75,6 +75,8 @@ static const Property isa_cirrus_vga_properties[] =3D { cirrus_vga.enable_blitter, true), DEFINE_PROP_BOOL("global-vmstate", struct ISACirrusVGAState, cirrus_vga.vga.global_vmstate, false), + DEFINE_PROP_ON_OFF_AUTO("x-big-endian-fb", struct ISACirrusVGAState, + cirrus_vga.big_endian_fb, ON_OFF_AUTO_OFF), }; =20 static void isa_cirrus_vga_class_init(ObjectClass *klass, const void *data) --=20 2.41.3