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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48711709e95sm159875045e9.8.2026.03.25.14.18.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 25 Mar 2026 14:18:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1774473487; x=1775078287; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pYU4i5VAwkEHAw1VrKk7PiVi7f6gEyJjDsvkpa8kUyc=; b=HXoqK/fxUR3IONC/u5TWuAwb+5EqkXZmJKDUu+QP3K/g2Lu9xyZK966qok1aChPo4P mYQS/XvCmUvnbZHW4y+QlS+6GPfMQXk3mvcug56rLr2eqADhpdjKBgZHpfO7+yHRQTVo 2WL3lHUwTpDomk/Ev0zg24ho+XBA3iuxZi5W3bm258DsspMOkapbLqLB5zv6Yeu7aG26 Tw9l9ZlQj5zeWVDokfZ4gL5eb4a18ZRLupLB0ZrT01qILSZmtAY/32Qkwb5I0Haz7D1O LTYZXGQ02IXrLOW57pAd7CiplGPi3bJAudOVKzIkBeh1rDkyFNsFlAhO7YKpC8b2dXYB jlMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774473487; x=1775078287; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=pYU4i5VAwkEHAw1VrKk7PiVi7f6gEyJjDsvkpa8kUyc=; b=OofzY4asfJMm9SuyV2JkpOmNwuZ9dR+41aWfoj46aaDAUW9FHGA78B6WQeFJi/3xJb VQey6yxj2bP71nbDiu9C5xJmJCfna4jzrGV51ZnPLSK/ISNTiRB3Xb1xTAk/RQeHLv2p InM09OuNL/jiY81wId2bndoIh7QQ7G025AvKnosZBpdyQUgaecrNqlUh3yXPJra0pHwk dEjZsjUAipMG4P71kP5U5Ks7PzI6U+Z6Gm1lsYpxNWyTU1KlilEgEjwjR6UC/WddPaSU aMUgK3ubmqlzAIlLScbrSosy2ixY6aeO69yVwILLNVUMMuE8IiXTxphrPExulKM9etjD /x2w== X-Gm-Message-State: AOJu0YxfWgB3wKmBueWJM1q6S1GMAj0FhXzDPmi4Dv24RCMgkmt6ZcFr C5bMFYwYVu6HbJTvPNh2pTcGVLPlIwn24MBsk592b/SmRKVpRzO9QWA5PIf+BVk52JGwzslkpJL kmAkk1vo= X-Gm-Gg: ATEYQzzaHJD+ivSBtstbZLNqL4jvXEeVEoW65+CzdC0mHzlyXT+Le+YNv6iEDWMNp/7 D3xG15IUormeJQxe6Wh4vAh4yOJy9gXKy3/2WMYBiY2sKplATZoQwFenqt8FsIm2zh5JxiK8xoX vrIVh5FvNRh/cySnlHPjod5SCVeJZO3E/TPzWUBiNGkNm3q0BzF3uj0Zs1uGgzZ66VAMfdGC80a iN2fiokZ14E+3BI6f7inphVNrr3hO5fQHYJFQ3ziOWMe1hWCA6wMLF6iZo9rosY4CxGZJ7nudY4 SMItCg7o+udHacLmNbAbSFbeM1FPFhM3sKsdGs+xIaRd7SwUZ29S4CXxvnjgwr2ti6WeoRC9tNH bcSf5Z5IKYzd9Bl8p6PQAKb3V3YMXT8EQYb3eoxKRNUJwCtEVP/Y8DvbjynFMMZzF46qtitW9Nc 5/EtrYzGn3wGZ6tF8BeOFEMfI4ugNBrCr5aAyRqFGk6OQebfc94R9BYxv4C7wZ4OxRYR1o9nWzZ 5f7EXahHgo= X-Received: by 2002:a05:600c:5296:b0:486:ffa3:593 with SMTP id 5b1f17b1804b1-4871606730amr71524315e9.28.1774473486772; Wed, 25 Mar 2026 14:18:06 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Glenn Miles , Mark Cave-Ayland , Nicholas Piggin , qemu-ppc@nongnu.org, Daniel Henrique Barboza , Fabiano Rosas , Alistair Francis , Pierrick Bouvier , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-riscv@nongnu.org, Paolo Bonzini , Artyom Tarasenko , Anton Johansson , Peter Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH-for-11.1 05/10] target/sparc: Inline qemu_get/put_betl() Date: Wed, 25 Mar 2026 22:17:23 +0100 Message-ID: <20260325211728.89204-6-philmd@linaro.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260325211728.89204-1-philmd@linaro.org> References: <20260325211728.89204-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1774473593674154100 Use TargetInfo target_long_bits() helper at runtime to migrate the FSR register as 32 or 64-bits. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- include/migration/cpu.h | 4 ---- target/sparc/machine.c | 17 +++++++++++++---- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/include/migration/cpu.h b/include/migration/cpu.h index bb8ecfbeea5..87ca977a3fd 100644 --- a/include/migration/cpu.h +++ b/include/migration/cpu.h @@ -8,8 +8,6 @@ #include "migration/vmstate.h" =20 #if TARGET_LONG_BITS =3D=3D 64 -#define qemu_put_betl qemu_put_be64 -#define qemu_get_betl qemu_get_be64 #define qemu_put_betls qemu_put_be64s #define qemu_get_betls qemu_get_be64s =20 @@ -21,8 +19,6 @@ VMSTATE_UINT64_SUB_ARRAY(_f, _s, _start, _num) #define vmstate_info_uinttl vmstate_info_uint64 #else -#define qemu_put_betl qemu_put_be32 -#define qemu_get_betl qemu_get_be32 #define qemu_put_betls qemu_put_be32s #define qemu_get_betls qemu_get_be32s =20 diff --git a/target/sparc/machine.c b/target/sparc/machine.c index 4dd75aff74a..0a449f2f8c6 100644 --- a/target/sparc/machine.c +++ b/target/sparc/machine.c @@ -1,8 +1,10 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "qemu/target-info.h" #include "qemu/timer.h" =20 #include "migration/cpu.h" +#include "migration/qemu-file-types.h" =20 #ifdef TARGET_SPARC64 static const VMStateDescription vmstate_cpu_timer =3D { @@ -86,9 +88,13 @@ static int get_fsr(QEMUFile *f, void *opaque, size_t siz= e, const VMStateField *field) { SPARCCPU *cpu =3D opaque; - target_ulong val =3D qemu_get_betl(f); =20 - cpu_put_fsr(&cpu->env, val); + if (target_long_bits() =3D=3D 64) { + cpu_put_fsr(&cpu->env, qemu_get_be64(f)); + } else { + cpu_put_fsr(&cpu->env, qemu_get_be32(f)); + } + return 0; } =20 @@ -96,9 +102,12 @@ static int put_fsr(QEMUFile *f, void *opaque, size_t si= ze, const VMStateField *field, JSONWriter *vmdesc) { SPARCCPU *cpu =3D opaque; - target_ulong val =3D cpu_get_fsr(&cpu->env); =20 - qemu_put_betl(f, val); + if (target_long_bits() =3D=3D 64) { + qemu_put_be64(f, cpu_get_fsr(&cpu->env)); + } else { + qemu_put_be32(f, cpu_get_fsr(&cpu->env)); + } return 0; } =20 --=20 2.53.0