From nobody Fri Apr 3 10:19:48 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1774356119; cv=none; d=zohomail.com; s=zohoarc; b=ADwrf4u4nN2mdL6W8CTYmvm2jXQhuJ5dcoyCDhGWjPGVUeChkLLo0pknbeIRH8MV7HwGfPm8b9pF6wzIiE5rspx+P1IjFv/Y27VvqAUylAdzMc5fnptMg+geqdoU2An0485loSCu8HkaBwXMngMo4LLuUdQQtuhE30qKUSwnHeU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774356119; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Cecl9XI/y7lX1FiyMQR0Bz9vVcLYG01E0igKXYF2NNI=; b=I234km6uoaO9s1Mc1SM0EON0I9PYzHdKHmqHmLhQBb/B4jxhmihHqinaBzBSN+1d9O3rKSaqjt3a/utpVnOydzNIR7PlqqjXR5leEkR8AuYvegWX5a+KtkzYveJZ+BHvITJkgyiN6k2U4+1odfLamtn80aj3EH9jN+mFNsFMSAE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774356119596389.5689312148322; Tue, 24 Mar 2026 05:41:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w514w-0007kx-VA; Tue, 24 Mar 2026 08:41:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w514v-0007kc-Gc for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:41:49 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w514t-0001RJ-AX for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:41:49 -0400 Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-622-arrkIVO1OkunRKQqzc5N2w-1; Tue, 24 Mar 2026 08:41:44 -0400 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 1791D18005B0; Tue, 24 Mar 2026 12:41:43 +0000 (UTC) Received: from corto.redhat.com (unknown [10.45.224.24]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 9B1471954102; Tue, 24 Mar 2026 12:41:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774356106; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Cecl9XI/y7lX1FiyMQR0Bz9vVcLYG01E0igKXYF2NNI=; b=PRTmLzuPetAel8UPwAyb8zHKnUAp2vHB97bH7HMJqRuV4RpPETvy6ILBZMTG835bG3vZtw UL+urnnjN2l75iOBSWP6XTlMvt97GDJ2z5TFsyVAK8HJg8W/hBl33bDbMWyxHJ85NsjsDA o+yVRppc5qmcwIdvscfA9jqOuGxEcS0= X-MC-Unique: arrkIVO1OkunRKQqzc5N2w-1 X-Mimecast-MFC-AGG-ID: arrkIVO1OkunRKQqzc5N2w_1774356103 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jithu Joseph , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 1/5] hw/i2c/aspeed: fix lost interrupts on back-to-back commands Date: Tue, 24 Mar 2026 13:41:27 +0100 Message-ID: <20260324124131.1053711-2-clg@redhat.com> In-Reply-To: <20260324124131.1053711-1-clg@redhat.com> References: <20260324124131.1053711-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774356122457154100 From: Jithu Joseph QEMU executes I2C commands synchronously inside the CMD register write handler. On real hardware each command takes time on the bus, so the ISR can clear the previous interrupt status before the next completion arrives. In QEMU, when the guest ISR handles a TX_ACK and immediately issues the next command by writing to CMD, that command completes instantly =E2=80=94 before the ISR returns to W1C-clear the first TX_ACK. Since the bit is already set, setting it again is a no-op. The ISR then clears it, wiping both completions at once. No interrupt fires for the second command and the driver stalls. This affects any multi-step I2C transaction: register reads, SMBus word reads, and PMBus device probes all fail ("Error: Read failed" from i2cget, -ETIMEDOUT from kernel drivers). The issue is exposed when the guest kernel includes commit "i2c: aspeed: Acknowledge Tx done with and without ACK irq late" [1] which defers W1C acknowledgment of TX_ACK until after the ISR has issued the next command. This means the old TX_ACK is still set when the next command completes synchronously, and the subsequent W1C wipes both completions at once. The trace below shows `i2cget -y 15 0x50 0x00` (read EEPROM register 0x00) failing without the fix. The first START+TX sets TX_ACK. The ISR handles it and issues a second TX to send the register address. That TX completes synchronously while TX_ACK is still set: aspeed_i2c_bus_cmd cmd=3D0x3 start|tx| intr=3D0x0 # START+TX, clean aspeed_i2c_bus_raise_interrupt intr=3D0x1 ack| # TX_ACK set aspeed_i2c_bus_read 0x10: 0x1 # ISR reads TX_ACK aspeed_i2c_bus_write 0x14: 0x2 # ISR issues TX cmd aspeed_i2c_bus_cmd cmd=3D0x400002 tx| intr=3D0x1 # TX runs, TX_ACK a= lready set! aspeed_i2c_bus_raise_interrupt intr=3D0x1 ack| # re-set is no-op aspeed_i2c_bus_write 0x10: 0x1 # ISR W1C clears TX_ACK aspeed_i2c_bus_read 0x10: 0x0 # LOST =E2=80=94 both A= CKs wiped The driver sees INTR_STS=3D0 and never proceeds to the read phase. Fix this by tracking interrupt bits that collide with already-pending bits. Before calling aspeed_i2c_bus_handle_cmd(), save and clear INTR_STS so that only freshly set bits are visible after the call. Any overlap between the old and new bits is saved in pending_intr_sts. When the ISR later W1C-clears the old bits, re-apply the saved pending bits so the ISR sees them on its next loop iteration. With the fix, the same operation completes successfully: aspeed_i2c_bus_cmd cmd=3D0x3 start|tx| intr=3D0x0 # START+TX, clean aspeed_i2c_bus_raise_interrupt intr=3D0x1 ack| # TX_ACK set aspeed_i2c_bus_read 0x10: 0x1 # ISR reads TX_ACK aspeed_i2c_bus_write 0x14: 0x2 # ISR issues TX cmd aspeed_i2c_bus_cmd cmd=3D0x400002 tx| intr=3D0x0 # INTR_STS cleared = first aspeed_i2c_bus_raise_interrupt intr=3D0x1 ack| # TX_ACK freshly set aspeed_i2c_bus_write 0x10: 0x1 # ISR W1C clears TX_ACK aspeed_i2c_bus_read 0x10: 0x1 # RE-DELIVERED from pen= ding aspeed_i2c_bus_write 0x14: 0x1b # ISR proceeds: START+RX aspeed_i2c_bus_cmd cmd=3D0x40001b start|tx|rx|last| # read phase completes i2c_recv recv(addr:0x50) data:0x00 # data received [1] https://lore.kernel.org/all/20231211102217.2436294-3-quan@os.amperecomp= uting.com/ Signed-off-by: Jithu Joseph Fixes: 1602001195dc ("i2c: add aspeed i2c controller") Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/qemu-devel/20260311023712.2730185-1-jithu.jos= eph@oss.qualcomm.com Signed-off-by: C=C3=A9dric Le Goater --- include/hw/i2c/aspeed_i2c.h | 1 + hw/i2c/aspeed_i2c.c | 46 +++++++++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h index 53a9dba71b07..d42cb4865aa5 100644 --- a/include/hw/i2c/aspeed_i2c.h +++ b/include/hw/i2c/aspeed_i2c.h @@ -256,6 +256,7 @@ struct AspeedI2CBus { qemu_irq irq; =20 uint32_t regs[ASPEED_I2C_NEW_NUM_REG]; + uint32_t pending_intr_sts; uint8_t pool[ASPEED_I2C_BUS_POOL_SIZE]; uint64_t dma_dram_offset; }; diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index 8022938f3478..ad6342bec0d4 100644 --- a/hw/i2c/aspeed_i2c.c +++ b/hw/i2c/aspeed_i2c.c @@ -628,6 +628,8 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus,= hwaddr offset, AspeedI2CClass *aic =3D ASPEED_I2C_GET_CLASS(bus->controller); bool handle_rx; bool w1t; + uint32_t old_intr; + uint32_t cmd_intr; =20 trace_aspeed_i2c_bus_write(bus->id, offset, size, value); =20 @@ -665,6 +667,17 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus= , hwaddr offset, break; } bus->regs[R_I2CM_INTR_STS] &=3D ~(value & 0xf007f07f); + /* + * Re-apply interrupts lost due to synchronous command completion. + * When a command completes instantly during an MMIO write, the new + * interrupt status bits collide with already-pending bits. After + * the ISR clears them, re-apply the saved bits so the ISR can + * process the new completion. + */ + if (bus->pending_intr_sts) { + bus->regs[R_I2CM_INTR_STS] |=3D bus->pending_intr_sts; + bus->pending_intr_sts =3D 0; + } if (!bus->regs[R_I2CM_INTR_STS]) { bus->controller->intr_status &=3D ~(1 << bus->id); qemu_irq_lower(aic->bus_get_irq(bus)); @@ -708,7 +721,17 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus= , hwaddr offset, bus->regs[R_I2CM_CMD] =3D value; } =20 + old_intr =3D bus->regs[R_I2CM_INTR_STS]; + bus->regs[R_I2CM_INTR_STS] =3D 0; aspeed_i2c_bus_handle_cmd(bus, value); + /* + * cmd_intr has only the bits handle_cmd freshly set. + * Overlap with old_intr means the same bit was re-fired + * and would be lost when the ISR W1C-clears the old one. + */ + cmd_intr =3D bus->regs[R_I2CM_INTR_STS]; + bus->regs[R_I2CM_INTR_STS] =3D cmd_intr | old_intr; + bus->pending_intr_sts |=3D old_intr & cmd_intr; aspeed_i2c_bus_raise_interrupt(bus); break; case A_I2CM_DMA_TX_ADDR: @@ -845,6 +868,8 @@ static void aspeed_i2c_bus_old_write(AspeedI2CBus *bus,= hwaddr offset, { AspeedI2CClass *aic =3D ASPEED_I2C_GET_CLASS(bus->controller); bool handle_rx; + uint32_t old_intr; + uint32_t cmd_intr; =20 trace_aspeed_i2c_bus_write(bus->id, offset, size, value); =20 @@ -868,6 +893,17 @@ static void aspeed_i2c_bus_old_write(AspeedI2CBus *bus= , hwaddr offset, handle_rx =3D SHARED_ARRAY_FIELD_EX32(bus->regs, R_I2CD_INTR_STS, = RX_DONE) && SHARED_FIELD_EX32(value, RX_DONE); bus->regs[R_I2CD_INTR_STS] &=3D ~(value & 0x7FFF); + /* + * Re-apply interrupts lost due to synchronous command completion. + * When a command completes instantly during an MMIO write, the new + * interrupt status bits collide with already-pending bits. After + * the ISR clears them, re-apply the saved bits so the ISR can + * process the new completion. + */ + if (bus->pending_intr_sts) { + bus->regs[R_I2CD_INTR_STS] |=3D bus->pending_intr_sts; + bus->pending_intr_sts =3D 0; + } if (!bus->regs[R_I2CD_INTR_STS]) { bus->controller->intr_status &=3D ~(1 << bus->id); qemu_irq_lower(aic->bus_get_irq(bus)); @@ -915,7 +951,17 @@ static void aspeed_i2c_bus_old_write(AspeedI2CBus *bus= , hwaddr offset, bus->regs[R_I2CD_CMD] &=3D ~0xFFFF; bus->regs[R_I2CD_CMD] |=3D value & 0xFFFF; =20 + old_intr =3D bus->regs[R_I2CD_INTR_STS]; + bus->regs[R_I2CD_INTR_STS] =3D 0; aspeed_i2c_bus_handle_cmd(bus, value); + /* + * cmd_intr has only the bits handle_cmd freshly set. + * Overlap with old_intr means the same bit was re-fired + * and would be lost when the ISR W1C-clears the old one. + */ + cmd_intr =3D bus->regs[R_I2CD_INTR_STS]; + bus->regs[R_I2CD_INTR_STS] =3D cmd_intr | old_intr; + bus->pending_intr_sts |=3D old_intr & cmd_intr; aspeed_i2c_bus_raise_interrupt(bus); break; case A_I2CD_DMA_ADDR: --=20 2.53.0 From nobody Fri Apr 3 10:19:48 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1774356193; cv=none; d=zohomail.com; s=zohoarc; b=mThahOjf9eeUjpAKxdwfBjEvytnr/MbRhsLiHZyemjFQuZJ/VN9ivVKTs3MAV2MuD+sMqWwLynatSKNuFKPqOxKHq5Dqb9viBgc7ZyrW7ZRNc2E5C/h5E6HH5ZnXUM1S/veqhdPQL9srSCsSVfj5G1vyAtV+PbIHF22NoqjpIuU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774356193; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DOGm1oK7RGhwt7Q9AwyA6eiwKp5NUdAmXzIIoAdg60E=; b=dsRr4DEReB3NlrGK5FaR9hGbosChWhyHcIYf0UnjyIYBDr5Xd5nu8Zaono5PkEwMKJgkpvMc785uhQyV5tCXWFIj12otKaweLztlQ7APD8Vk56+Ht53fB/XwEEb5iCF+xlAPgvQWFrnNY7Gje2Q29lSQlihdMWsnuo8aaJOedPo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774356193970354.7260939675589; Tue, 24 Mar 2026 05:43:13 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w514y-0007le-N4; Tue, 24 Mar 2026 08:41:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w514w-0007ko-1S for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:41:50 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w514u-0001Rb-I3 for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:41:49 -0400 Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-688-aCU4mNbUPJqDDLW190DhvQ-1; Tue, 24 Mar 2026 08:41:46 -0400 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4611E19560AA; Tue, 24 Mar 2026 12:41:45 +0000 (UTC) Received: from corto.redhat.com (unknown [10.45.224.24]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 863121955D71; Tue, 24 Mar 2026 12:41:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774356108; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DOGm1oK7RGhwt7Q9AwyA6eiwKp5NUdAmXzIIoAdg60E=; b=fKRmKX8gt27mhvHKO+iK8/r+AJnj7Ts1G5H8baLJxp7uH2k831pbzJ3PeFpKkpdhlpyyVz a6/6J9pumGe6c+s+gV4+cEo3oA9nYEMvsPI6Tdv5AxMJn4ajoXOawY16llL+WJB4gqY0LS NbllmjbvevYgSu3PzUfuCCSbugyY8jw= X-MC-Unique: aCU4mNbUPJqDDLW190DhvQ-1 X-Mimecast-MFC-AGG-ID: aCU4mNbUPJqDDLW190DhvQ_1774356105 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , Kane Chen , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 2/5] MAINTAINERS: Add Kane Chen as reviewer for Aspeed machines Date: Tue, 24 Mar 2026 13:41:28 +0100 Message-ID: <20260324124131.1053711-3-clg@redhat.com> In-Reply-To: <20260324124131.1053711-1-clg@redhat.com> References: <20260324124131.1053711-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774356195226154100 From: Jamin Lin Signed-off-by: Kane Chen Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/qemu-devel/20260316070347.3079299-1-jamin_lin= @aspeedtech.com Signed-off-by: C=C3=A9dric Le Goater --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 25fb621c30a4..8d837677353a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1247,6 +1247,7 @@ M: Peter Maydell R: Steven Lee R: Troy Lee R: Jamin Lin +R: Kane Chen R: Andrew Jeffery R: Joel Stanley L: qemu-arm@nongnu.org --=20 2.53.0 From nobody Fri Apr 3 10:19:48 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1774356194; cv=none; d=zohomail.com; s=zohoarc; b=Q9ivdOssi0r3/clirmi6u7wJK3iIfQvPLC5jnSnVm3U+71dvMhBCNhjpjOCUe1Ab8I2Z3hJlQ7s7CYL5il3gcDKHcrSS6yGobnMzfILDmneQi+p9AUjbK3Holaibc9yieyfHeCPLmfMyU5BpY77+DME94JaALK/fck5FaavDFpY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774356194; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xF4Unaogif06++3MuPaBPCsMUumLCQSbewHrI7H2EY8=; b=aWoYu5mJ5wrC6X+ncKnvyyy1facqYZvw3xDW6XuxZBj9m+uWEpDFPqarTPWI63DsVceGfdyp8TDbXvo3dfx1CM0xf+msBlDm++3Ocu6UrLnfX1EEFJ905GsyhEPZAxAT+rXz11bdZ6P4HrexKC1ecP8mrg/X33If1K8TdkSwGPM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774356194397841.3502136953571; Tue, 24 Mar 2026 05:43:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w515P-0007zq-BT; Tue, 24 Mar 2026 08:42:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w515D-0007wA-8T for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:42:08 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w5157-0001SD-Km for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:42:05 -0400 Received: from mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-586-lRJ0XEtyOxKzbp7M3jEU4w-1; Tue, 24 Mar 2026 08:41:48 -0400 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 5F6D5195608B; Tue, 24 Mar 2026 12:41:47 +0000 (UTC) Received: from corto.redhat.com (unknown [10.45.224.24]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id B39371955D71; Tue, 24 Mar 2026 12:41:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774356112; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xF4Unaogif06++3MuPaBPCsMUumLCQSbewHrI7H2EY8=; b=NlQhSDaiw0nJFL7VhLhZr0nin8E3Jb9R9rmD3uIGcQ5IS1ZhBkWqGEa+JvmWpCLGWMHQLr MFXHqCoviSHIRIjOIYC5wK6izh2mNlT3+mhbvZZ4blV+mD2TpXv+xu1Gsinho8V81d2t1I lPnL0f8v8ZV9R7iArR5i5YxdRhfWafQ= X-MC-Unique: lRJ0XEtyOxKzbp7M3jEU4w-1 X-Mimecast-MFC-AGG-ID: lRJ0XEtyOxKzbp7M3jEU4w_1774356107 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 3/5] tests/functional/aarch64/test_aspeed: Disable kernel crypto self-tests in AST2700 boot tests Date: Tue, 24 Mar 2026 13:41:29 +0100 Message-ID: <20260324124131.1053711-4-clg@redhat.com> In-Reply-To: <20260324124131.1053711-1-clg@redhat.com> References: <20260324124131.1053711-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774356196364158500 From: Jamin Lin Disable the kernel crypto self-tests in the AST2700 functional tests by appending "cryptomgr.notests=3D1" to the U-Boot bootargs before booting the kernel. The ASPEED SDK enables crypto self-tests during kernel startup to validate the hardware crypto engine. However, the current QEMU implementation of the AST2700 HACE/crypto engine is still incomplete. As a result, the kernel crypto self-tests trigger multiple warnings during boot when running under QEMU. Typical examples observed in the kernel log include failures for several cipher modes such as DES/TDES/AES in ECB/CBC/CTR modes: alg: self-tests for ctr(des) using aspeed-ctr-des failed (rc=3D-22) alg: self-tests for ecb(des3_ede) using aspeed-ecb-tdes failed (rc=3D-22) alg: self-tests for cbc(aes) using aspeed-cbc-aes failed (rc=3D-22) ... To reduce noise in the functional test logs, the tests now append the following parameter to the kernel bootargs: cryptomgr.notests=3D1 This disables the kernel crypto self-tests when running the functional tests under QEMU. For validating the HACE implementation, we should instead rely on the dedicated QEMU unit tests located in: tests/qtest/ast2700-hace-test.c Once the QEMU implementation of the ASPEED HACE/crypto model has progressed further and supports the missing crypto modes, we can reassess whether enabling the kernel crypto self-tests again in the functional tests is appropriate. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/qemu-devel/20260316081549.1279841-1-jamin_lin= @aspeedtech.com Signed-off-by: C=C3=A9dric Le Goater --- tests/functional/aarch64/test_aspeed_ast2700a1.py | 11 +++++++++-- tests/functional/aarch64/test_aspeed_ast2700a2.py | 11 +++++++++-- tests/functional/aarch64/test_aspeed_ast2700fc.py | 9 +++++++-- 3 files changed, 25 insertions(+), 6 deletions(-) diff --git a/tests/functional/aarch64/test_aspeed_ast2700a1.py b/tests/func= tional/aarch64/test_aspeed_ast2700a1.py index 5c0c4b0ed50f..b0c08854daa9 100755 --- a/tests/functional/aarch64/test_aspeed_ast2700a1.py +++ b/tests/functional/aarch64/test_aspeed_ast2700a1.py @@ -51,9 +51,11 @@ def verify_vbootrom_firmware_flow(self): wait_for_console_pattern(self, 'pass') wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-= A)') =20 + def disable_kernel_crypto_selftest(self): + exec_command_and_wait_for_pattern(self, + 'setenv bootargs "${bootargs} cryptomgr.notests=3D1"', '=3D>') + def enable_ast2700_pcie2(self): - wait_for_console_pattern(self, 'Hit any key to stop autoboot') - exec_command_and_wait_for_pattern(self, '\012', '=3D>') exec_command_and_wait_for_pattern(self, 'cp 100420000 403000000 900000', '=3D>') exec_command_and_wait_for_pattern(self, @@ -67,8 +69,13 @@ def enable_ast2700_pcie2(self): =20 def verify_openbmc_boot_start(self, enable_pcie=3DTrue): wait_for_console_pattern(self, 'U-Boot 2023.10') + wait_for_console_pattern(self, 'Hit any key to stop autoboot') + exec_command_and_wait_for_pattern(self, '\012', '=3D>') + self.disable_kernel_crypto_selftest() if enable_pcie: self.enable_ast2700_pcie2() + else: + exec_command(self, 'boot') wait_for_console_pattern(self, 'Linux version ') =20 def verify_openbmc_boot_and_login(self, name, enable_pcie=3DTrue): diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py b/tests/func= tional/aarch64/test_aspeed_ast2700a2.py index cc62a915b538..ed414999f4fa 100755 --- a/tests/functional/aarch64/test_aspeed_ast2700a2.py +++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py @@ -51,9 +51,11 @@ def verify_vbootrom_firmware_flow(self): wait_for_console_pattern(self, 'pass') wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-= A)') =20 + def disable_kernel_crypto_selftest(self): + exec_command_and_wait_for_pattern(self, + 'setenv bootargs "${bootargs} cryptomgr.notests=3D1"', '=3D>') + def enable_ast2700_pcie2(self): - wait_for_console_pattern(self, 'Hit any key to stop autoboot') - exec_command_and_wait_for_pattern(self, '\012', '=3D>') exec_command_and_wait_for_pattern(self, 'cp 100420000 403000000 900000', '=3D>') exec_command_and_wait_for_pattern(self, @@ -67,8 +69,13 @@ def enable_ast2700_pcie2(self): =20 def verify_openbmc_boot_start(self, enable_pcie=3DTrue): wait_for_console_pattern(self, 'U-Boot 2023.10') + wait_for_console_pattern(self, 'Hit any key to stop autoboot') + exec_command_and_wait_for_pattern(self, '\012', '=3D>') + self.disable_kernel_crypto_selftest() if enable_pcie: self.enable_ast2700_pcie2() + else: + exec_command(self, 'boot') wait_for_console_pattern(self, 'Linux version ') =20 def verify_openbmc_boot_and_login(self, name, enable_pcie=3DTrue): diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py b/tests/func= tional/aarch64/test_aspeed_ast2700fc.py index f68f40a1bfaf..df889134edaa 100755 --- a/tests/functional/aarch64/test_aspeed_ast2700fc.py +++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py @@ -27,9 +27,11 @@ def do_test_aarch64_aspeed_sdk_start(self, image): =20 self.vm.launch() =20 + def disable_kernel_crypto_selftest(self): + exec_command_and_wait_for_pattern(self, + 'setenv bootargs "${bootargs} cryptomgr.notests=3D1"', '=3D>') + def enable_ast2700_pcie2(self): - wait_for_console_pattern(self, 'Hit any key to stop autoboot') - exec_command_and_wait_for_pattern(self, '\012', '=3D>') exec_command_and_wait_for_pattern(self, 'cp 100420000 403000000 900000', '=3D>') exec_command_and_wait_for_pattern(self, @@ -43,6 +45,9 @@ def enable_ast2700_pcie2(self): =20 def verify_openbmc_boot_and_login(self, name): wait_for_console_pattern(self, 'U-Boot 2023.10') + wait_for_console_pattern(self, 'Hit any key to stop autoboot') + exec_command_and_wait_for_pattern(self, '\012', '=3D>') + self.disable_kernel_crypto_selftest() self.enable_ast2700_pcie2() wait_for_console_pattern(self, 'Starting kernel ...') =20 --=20 2.53.0 From nobody Fri Apr 3 10:19:48 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1774356195; cv=none; d=zohomail.com; s=zohoarc; b=b6fPGvvh34LNgFodKSIZLBt6Y8h2e8Zxnle0xlfwLz4t+GnmbdgluGiLrOZZvkMTxJY5siq5TrUS0Z0WDM9VQfGZJigl71sXQpB1Hxxil2fW2pzEZ6pk7d7qygWtqT8eSGd5AEiTuVl/o1j1n0v0c9Z5VBk+aQQd2d5I7LrlhKo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774356195; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=6gBa5K3V+qtZR6QTegkT3r6LkmYR3YJXebqVw6dgpDc=; b=HsdeHLQS7Hk5Z8K278Q/MfXDzQwXLr6cPLt302i9brrBBZHeNzKELmQdKWDrv4YqF6bDU4XJK+CO/6SWO6auKVXISqXppEDWbufA4gnfdzD8V0ASxSmok5AYMvPZ80mVHyuGZrZlHuG3VhSvpx0/WzFMfAfnkt4ZXKoeeh5z+CU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774356195126216.15178844648528; Tue, 24 Mar 2026 05:43:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w515R-00081L-Op; Tue, 24 Mar 2026 08:42:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w515E-0007y7-Qp for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:42:09 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w5159-0001SK-8B for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:42:08 -0400 Received: from mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-190-27Rh2pjsMPaNbQ11HZxkQA-1; Tue, 24 Mar 2026 08:41:50 -0400 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4580F1955E80; Tue, 24 Mar 2026 12:41:49 +0000 (UTC) Received: from corto.redhat.com (unknown [10.45.224.24]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id CE4351955D71; Tue, 24 Mar 2026 12:41:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774356113; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6gBa5K3V+qtZR6QTegkT3r6LkmYR3YJXebqVw6dgpDc=; b=Vz8HGyZ1oq4WR9IWRnNkqpFmTTQeYMtae9ZFxjZVdnm3PoQ2VnhhuFudWnch6iFWk50OG5 2bZ8WvQL452itLqhQMiiwsXde8xdQvgn9qjY3lddbcS0hwUU3lMwCG3BJMMDDzY8EV0PX+ knwR0ZlYzR9u9f25xvSew+Ma76/NVHU= X-MC-Unique: 27Rh2pjsMPaNbQ11HZxkQA-1 X-Mimecast-MFC-AGG-ID: 27Rh2pjsMPaNbQ11HZxkQA_1774356109 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Jamin Lin Subject: [PULL 4/5] hw/ssi/aspeed_smc: Convert mem ops to read/write_with_attrs for error handling Date: Tue, 24 Mar 2026 13:41:30 +0100 Message-ID: <20260324124131.1053711-5-clg@redhat.com> In-Reply-To: <20260324124131.1053711-1-clg@redhat.com> References: <20260324124131.1053711-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774356196365158500 Error conditions (invalid flash mode, unwritable flash) now return MEMTX_ERROR instead of silently succeeding or returning undefined values. This allows the memory subsystem to properly propagate transaction errors to the guest, improving QEMU reliability. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3335 Reviewed-by: Jamin Lin Link: https://lore.kernel.org/qemu-devel/20260323125545.577653-2-clg@redhat= .com Signed-off-by: C=C3=A9dric Le Goater --- hw/ssi/aspeed_smc.c | 49 ++++++++++++++++++++++++++------------------- 1 file changed, 28 insertions(+), 21 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index b9d5ecba2929..f0deeea996c3 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -493,17 +493,18 @@ static void aspeed_smc_flash_setup(AspeedSMCFlash *fl= , uint32_t addr) } } =20 -static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr addr, unsigned = size) +static MemTxResult aspeed_smc_flash_read(void *opaque, hwaddr addr, + uint64_t *data, unsigned size, MemTxAttrs= attrs) { AspeedSMCFlash *fl =3D opaque; AspeedSMCState *s =3D fl->controller; - uint64_t ret =3D 0; int i; =20 + *data =3D 0; switch (aspeed_smc_flash_mode(fl)) { case CTRL_USERMODE: for (i =3D 0; i < size; i++) { - ret |=3D (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); + *data |=3D (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); } break; case CTRL_READMODE: @@ -512,18 +513,19 @@ static uint64_t aspeed_smc_flash_read(void *opaque, h= waddr addr, unsigned size) aspeed_smc_flash_setup(fl, addr); =20 for (i =3D 0; i < size; i++) { - ret |=3D (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); + *data |=3D (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); } =20 aspeed_smc_flash_unselect(fl); break; default: aspeed_smc_error("invalid flash mode %d", aspeed_smc_flash_mode(fl= )); + return MEMTX_ERROR; } =20 - trace_aspeed_smc_flash_read(fl->cs, addr, size, ret, + trace_aspeed_smc_flash_read(fl->cs, addr, size, *data, aspeed_smc_flash_mode(fl)); - return ret; + return MEMTX_OK; } =20 /* @@ -624,8 +626,8 @@ static bool aspeed_smc_do_snoop(AspeedSMCFlash *fl, ui= nt64_t data, return false; } =20 -static void aspeed_smc_flash_write(void *opaque, hwaddr addr, uint64_t dat= a, - unsigned size) +static MemTxResult aspeed_smc_flash_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size, MemTxAttr= s attrs) { AspeedSMCFlash *fl =3D opaque; AspeedSMCState *s =3D fl->controller; @@ -636,7 +638,7 @@ static void aspeed_smc_flash_write(void *opaque, hwaddr= addr, uint64_t data, =20 if (!aspeed_smc_is_writable(fl)) { aspeed_smc_error("flash is not writable at 0x%" HWADDR_PRIx, addr); - return; + return MEMTX_ERROR; } =20 switch (aspeed_smc_flash_mode(fl)) { @@ -661,12 +663,15 @@ static void aspeed_smc_flash_write(void *opaque, hwad= dr addr, uint64_t data, break; default: aspeed_smc_error("invalid flash mode %d", aspeed_smc_flash_mode(fl= )); + return MEMTX_ERROR; } + + return MEMTX_OK; } =20 static const MemoryRegionOps aspeed_smc_flash_ops =3D { - .read =3D aspeed_smc_flash_read, - .write =3D aspeed_smc_flash_write, + .read_with_attrs =3D aspeed_smc_flash_read, + .write_with_attrs =3D aspeed_smc_flash_write, .endianness =3D DEVICE_LITTLE_ENDIAN, .valid =3D { .min_access_size =3D 1, @@ -754,7 +759,8 @@ static void aspeed_smc_reset(DeviceState *d) s->snoop_dummies =3D 0; } =20 -static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int si= ze) +static MemTxResult aspeed_smc_read(void *opaque, hwaddr addr, uint64_t *da= ta, + unsigned int size, MemTxAttrs attrs) { AspeedSMCState *s =3D ASPEED_SMC(opaque); AspeedSMCClass *asc =3D ASPEED_SMC_GET_CLASS(opaque); @@ -782,12 +788,13 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr = addr, unsigned int size) =20 trace_aspeed_smc_read(addr << 2, size, s->regs[addr]); =20 - return s->regs[addr]; + *data =3D s->regs[addr]; } else { qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\= n", __func__, addr); - return -1; + *data =3D -1; } + return MEMTX_OK; } =20 static uint8_t aspeed_smc_hclk_divisor(uint8_t hclk_mask) @@ -1108,8 +1115,8 @@ static void aspeed_2600_smc_dma_ctrl(AspeedSMCState *= s, uint32_t dma_ctrl) s->regs[R_DMA_CTRL] &=3D ~(DMA_CTRL_REQUEST | DMA_CTRL_GRANT); } =20 -static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data, - unsigned int size) +static MemTxResult aspeed_smc_write(void *opaque, hwaddr addr, uint64_t da= ta, + unsigned int size, MemTxAttrs attrs) { AspeedSMCState *s =3D ASPEED_SMC(opaque); AspeedSMCClass *asc =3D ASPEED_SMC_GET_CLASS(s); @@ -1159,13 +1166,13 @@ static void aspeed_smc_write(void *opaque, hwaddr a= ddr, uint64_t data, } else { qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\= n", __func__, addr); - return; } + return MEMTX_OK; } =20 static const MemoryRegionOps aspeed_smc_ops =3D { - .read =3D aspeed_smc_read, - .write =3D aspeed_smc_write, + .read_with_attrs =3D aspeed_smc_read, + .write_with_attrs =3D aspeed_smc_write, .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 @@ -2007,8 +2014,8 @@ static const uint32_t aspeed_2700_fmc_resets[ASPEED_S= MC_R_MAX] =3D { }; =20 static const MemoryRegionOps aspeed_2700_smc_flash_ops =3D { - .read =3D aspeed_smc_flash_read, - .write =3D aspeed_smc_flash_write, + .read_with_attrs =3D aspeed_smc_flash_read, + .write_with_attrs =3D aspeed_smc_flash_write, .endianness =3D DEVICE_LITTLE_ENDIAN, .valid =3D { .min_access_size =3D 1, --=20 2.53.0 From nobody Fri Apr 3 10:19:48 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1774356194; cv=none; d=zohomail.com; s=zohoarc; b=kI4CbJeNtCeVYSUJ69Uv3UOszI4cmP5rbbde+PAiTh1Rt/WAih2eFX/EIV2FJPiylsxugLzBFoznm1nEgoEsmDwXJkmw+HM+rbKk+Ek6rOdS5IYkndZnG5Ymf0GNjKEx6Qz1opsSzrhGThN0DbSEGlT/T6H2+qpdV/xVHx0Ln24= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774356194; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=v9A5fNyiv6TZ4cvjVNXiQmQCUaFdXzzcLB+89+/mZ9Y=; b=mGugmfXy+cXpRJn6wfb/f1wVarWCSjsUT/Dk5fZxvQBBVISo6tddg66wDhuQkkEqz3GmY7F8rY2EoPdxfX82a75GGq+9pRO2z/AzDFUppTAZI1uR19Y3IiOXlqD3aYa7lQzHREF97KJ8fEt7AQAiX/Y8I43E5Ij+V9jZPJ9Q1+k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774356194540380.66279444917916; Tue, 24 Mar 2026 05:43:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w515R-00081E-Hz; Tue, 24 Mar 2026 08:42:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w515E-0007xr-Fx for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:42:08 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w5159-0001SY-8t for qemu-devel@nongnu.org; Tue, 24 Mar 2026 08:42:08 -0400 Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-647-9wN3C78OPXO4VmUWd94BmQ-1; Tue, 24 Mar 2026 08:41:52 -0400 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 2EEC81800561; Tue, 24 Mar 2026 12:41:51 +0000 (UTC) Received: from corto.redhat.com (unknown [10.45.224.24]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id B56201955D71; Tue, 24 Mar 2026 12:41:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774356115; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=v9A5fNyiv6TZ4cvjVNXiQmQCUaFdXzzcLB+89+/mZ9Y=; b=iZeAXkUAmcpvbCBgqgQESaVDpu7hz3uc2GbYxAtZQAVciQmgnc4p49SCj2E1VV4foyOvYc Qh1Jj8YvdU4YwA54/+Pj4rNieUCLtEKR7iC/Zz/3fAih5gJez4fm8pbx0gXXwYmeByM+4W d/meMn1a774K6Ox6gQWG/IkHEJEK7WM= X-MC-Unique: 9wN3C78OPXO4VmUWd94BmQ-1 X-Mimecast-MFC-AGG-ID: 9wN3C78OPXO4VmUWd94BmQ_1774356111 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Jamin Lin Subject: [PULL 5/5] hw/i2c/aspeed_i2c: Remove assert Date: Tue, 24 Mar 2026 13:41:31 +0100 Message-ID: <20260324124131.1053711-6-clg@redhat.com> In-Reply-To: <20260324124131.1053711-1-clg@redhat.com> References: <20260324124131.1053711-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774356197029154100 According to the Aspeed datasheet, the RX_BUF_LEN_W1T and TX_BUF_LEN_W1T bits of the A_I2CS_DMA_LEN (0x2c) register allow firmware to program the TX and RX DMA length (TX_BUF_LEN and RX_BUF_LEN fields of the same register) separately without the need to read/modify/write the value. If RX_BUF_LEN_W1T and TX_BUF_LEN_W1T bits are 0, then both TX and RX DMA length will be written. When setting the RX_BUF_LEN field, the TX_BUF_LEN field being set is not an invalid condition. Remove the assert. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3315 Reviewed-by: Jamin Lin Link: https://lore.kernel.org/qemu-devel/20260323125545.577653-4-clg@redhat= .com Signed-off-by: C=C3=A9dric Le Goater --- hw/i2c/aspeed_i2c.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index ad6342bec0d4..5d18f8d49ea4 100644 --- a/hw/i2c/aspeed_i2c.c +++ b/hw/i2c/aspeed_i2c.c @@ -780,7 +780,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus,= hwaddr offset, bus->regs[R_I2CS_DMA_RX_ADDR] =3D value; break; case A_I2CS_DMA_LEN: - assert(FIELD_EX32(value, I2CS_DMA_LEN, TX_BUF_LEN) =3D=3D 0); if (FIELD_EX32(value, I2CS_DMA_LEN, RX_BUF_LEN_W1T)) { ARRAY_FIELD_DP32(bus->regs, I2CS_DMA_LEN, RX_BUF_LEN, FIELD_EX32(value, I2CS_DMA_LEN, RX_BUF_LEN)); --=20 2.53.0