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Tsirkin" , Igor Mammedov , Ani Sinha , Shannon Zhao , Pierrick Bouvier , Mohammadfaiz Bawa Subject: [PATCH 2/3] hw/acpi/tpm: parameterize PPI base address in tpm_build_ppi_acpi Date: Tue, 24 Mar 2026 12:40:02 +0530 Message-ID: <20260324-tpm-tis-sysbus-ppi-v1-2-e59175210954@redhat.com> In-Reply-To: <20260324-tpm-tis-sysbus-ppi-v1-0-e59175210954@redhat.com> References: <20260324-tpm-tis-sysbus-ppi-v1-0-e59175210954@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=mbawa@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774336330113154100 Add a ppi_base parameter to tpm_build_ppi_acpi() instead of hardcoding TPM_PPI_ADDR_BASE. This prepares for ARM64 support where PPI memory is dynamically allocated by the platform bus and the address is not known at compile time. Update the x86 ISA TIS caller to pass TPM_PPI_ADDR_BASE explicitly. No behavioral change. Signed-off-by: Mohammadfaiz Bawa Reviewed-by: Stefan Berger --- hw/acpi/tpm.c | 8 ++++---- hw/tpm/tpm_tis_isa.c | 2 +- include/hw/acpi/tpm.h | 3 ++- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c index cdc022753659af102e56ea4148423b94de1531f6..c4ff2f8cb836c16b00f70865bf5= 5781d5c402aa2 100644 --- a/hw/acpi/tpm.c +++ b/hw/acpi/tpm.c @@ -20,7 +20,7 @@ #include "qapi/error.h" #include "hw/acpi/tpm.h" =20 -void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) +void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base) { Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask, *not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one; @@ -40,7 +40,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) */ aml_append(dev, aml_operation_region("TPP2", AML_SYSTEM_MEMORY, - aml_int(TPM_PPI_ADDR_BASE + 0x100), + aml_int(ppi_base + 0x100), 0x5A)); field =3D aml_field("TPP2", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE); aml_append(field, aml_named_field("PPIN", 8)); @@ -56,7 +56,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) aml_append(dev, aml_operation_region( "TPP3", AML_SYSTEM_MEMORY, - aml_int(TPM_PPI_ADDR_BASE + + aml_int(ppi_base + 0x15a /* movv, docs/specs/tpm.rst */), 0x1)); field =3D aml_field("TPP3", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); @@ -78,7 +78,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) =20 aml_append(method, aml_operation_region("TPP1", AML_SYSTEM_MEMORY, - aml_add(aml_int(TPM_PPI_ADDR_BASE), op, NULL), 0x1)); + aml_add(aml_int(ppi_base), op, NULL), 0x1)); field =3D aml_field("TPP1", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE= ); aml_append(field, aml_named_field("TPPF", 8)); aml_append(method, field); diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 61e95434f5b824fa99f0a2aff7f151e87ea631ed..e30bef49558673f4c857c02dae0= 59ce3361a1bc7 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -162,7 +162,7 @@ static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, A= ml *scope) */ /* aml_append(crs, aml_irq_no_flags(isadev->state.irq_num)); */ aml_append(dev, aml_name_decl("_CRS", crs)); - tpm_build_ppi_acpi(ti, dev); + tpm_build_ppi_acpi(ti, dev, TPM_PPI_ADDR_BASE); aml_append(scope, dev); } =20 diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index d2bf6637c5424b92ad99f5baa938fd6cea3520bf..2ab186a7455593df205a7ffecbe= a2abdfdbd11d5 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -20,6 +20,7 @@ #include "hw/core/registerfields.h" #include "hw/acpi/aml-build.h" #include "system/tpm.h" +#include "exec/hwaddr.h" =20 #ifdef CONFIG_TPM =20 @@ -250,7 +251,7 @@ REG32(CRB_DATA_BUFFER, 0x80) */ #define TPM_I2C_INT_ENABLE_MASK 0x0 =20 -void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev); +void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base); =20 #endif /* CONFIG_TPM */ =20 --=20 2.53.0