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Tsirkin" , Igor Mammedov , Ani Sinha , Shannon Zhao , Pierrick Bouvier , Mohammadfaiz Bawa Subject: [PATCH 1/3] docs/specs/tpm: document PPI support on ARM64 virt Date: Tue, 24 Mar 2026 12:40:01 +0530 Message-ID: <20260324-tpm-tis-sysbus-ppi-v1-1-e59175210954@redhat.com> In-Reply-To: <20260324-tpm-tis-sysbus-ppi-v1-0-e59175210954@redhat.com> References: <20260324-tpm-tis-sysbus-ppi-v1-0-e59175210954@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mbawa@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774336329548158500 Document that tpm-tis-device on the ARM virt machine supports PPI with dynamically allocated MMIO via the platform bus, unlike x86 where PPI is at the fixed address 0xFED45000. Also add hw/arm/virt-acpi-build.c and hw/acpi/tpm.c to the list of files related to TPM ACPI tables. Signed-off-by: Mohammadfaiz Bawa Reviewed-by: Stefan Berger --- docs/specs/tpm.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/docs/specs/tpm.rst b/docs/specs/tpm.rst index b630a351b4f77a8d2512f22446d00a4d674c7777..63cc0b68cd79d64138d4dd05ae1= 58430c6a74643 100644 --- a/docs/specs/tpm.rst +++ b/docs/specs/tpm.rst @@ -187,8 +187,30 @@ The location of the table is given by the fw_cfg ``tpm= ppi_address`` field. The PPI memory region size is 0x400 (``TPM_PPI_ADDR_SIZE``) to leave enough room for future updates. =20 +PPI on ARM64 virt +----------------- + +The ARM virt machine supports PPI for ``tpm-tis-device`` as defined +in the `PPI specification`_. + +Unlike the x86 TIS device where the PPI memory region is mapped at +the fixed address ``0xFED45000`` (within the TIS MMIO range), the +ARM64 sysbus device registers PPI memory as a second MMIO region +on the platform bus. The platform bus assigns the guest physical +address dynamically at device plug time. The ACPI ``_DSM`` method +and PPI operation regions reference this dynamically resolved +address. + +PPI is enabled by default and can be controlled with the ``ppi`` +property (e.g. ``-device tpm-tis-device,tpmdev=3Dtpm0,ppi=3Don``). +Without PPI support, guest operating systems such as Windows 11 +ARM64 will log errors when attempting to query TPM Physical +Presence capabilities via the ACPI ``_DSM`` method. + QEMU files related to TPM ACPI tables: - ``hw/i386/acpi-build.c`` + - ``hw/arm/virt-acpi-build.c`` + - ``hw/acpi/tpm.c`` - ``include/hw/acpi/tpm.h`` =20 TPM backend devices --=20 2.53.0