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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.246; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1774305401084154100 Content-Type: text/plain; charset="utf-8" Make accesses to segments all go through read_segment_descriptor to be able to fetch segment state on-demand. Switch away from SegmentCache to the x86_segment_descriptor that is already used by read_segment_descriptor. Signed-off-by: Mohamed Mediouni --- target/i386/emulate/x86_helpers.c | 50 ++++++++++++------------------- 1 file changed, 19 insertions(+), 31 deletions(-) diff --git a/target/i386/emulate/x86_helpers.c b/target/i386/emulate/x86_he= lpers.c index c817015ef9..63bae3582f 100644 --- a/target/i386/emulate/x86_helpers.c +++ b/target/i386/emulate/x86_helpers.c @@ -43,49 +43,37 @@ static CpuMode cpu_mode(CPUState *cpu) return m; } =20 -static bool segment_type_ro(const SegmentCache *seg) +static bool segment_type_ro(const x86_segment_descriptor desc) { - uint32_t type_ =3D (seg->flags >> DESC_TYPE_SHIFT) & 15; + uint32_t type_ =3D desc.type; return (type_ & (~RWRX_SEGMENT_TYPE)) =3D=3D 0; } =20 -static bool segment_type_code(const SegmentCache *seg) +static bool segment_type_code(const x86_segment_descriptor desc) { - uint32_t type_ =3D (seg->flags >> DESC_TYPE_SHIFT) & 15; + uint32_t type_ =3D desc.type; return (type_ & CODE_SEGMENT_TYPE) !=3D 0; } =20 -static bool segment_expands_down(const SegmentCache *seg) +static bool segment_expands_down(const x86_segment_descriptor desc) { - uint32_t type_ =3D (seg->flags >> DESC_TYPE_SHIFT) & 15; + uint32_t type_ =3D desc.type; =20 - if (segment_type_code(seg)) { + if (segment_type_code(desc)) { return false; } =20 return (type_ & EXPAND_DOWN_SEGMENT_TYPE) !=3D 0; } =20 -static uint32_t segment_limit(const SegmentCache *seg) +static uint8_t segment_db(const x86_segment_descriptor desc) { - uint32_t limit =3D seg->limit; - uint32_t granularity =3D (seg->flags & DESC_G_MASK) !=3D 0; - - if (granularity !=3D 0) { - limit =3D (limit << 12) | 0xFFF; - } - - return limit; + return desc.db; } =20 -static uint8_t segment_db(const SegmentCache *seg) +static uint32_t segment_max_limit(const x86_segment_descriptor desc) { - return (seg->flags >> DESC_B_SHIFT) & 1; -} - -static uint32_t segment_max_limit(const SegmentCache *seg) -{ - if (segment_db(seg) !=3D 0) { + if (segment_db(desc) !=3D 0) { return 0xFFFFFFFF; } return 0xFFFF; @@ -96,15 +84,15 @@ static int linearize(CPUState *cpu, X86Seg seg_idx) { enum CpuMode mode; - X86CPU *x86_cpu =3D X86_CPU(cpu); - CPUX86State *env =3D &x86_cpu->env; - SegmentCache *seg =3D &env->segs[seg_idx]; - target_ulong base =3D seg->base; + struct x86_segment_descriptor desc; + target_ulong base; target_ulong logical_addr_32b; uint32_t limit; /* TODO: the emulator will not pass us "write" indicator yet */ bool write =3D false; =20 + emul_ops->read_segment_descriptor(cpu, &desc, seg_idx); + base =3D x86_segment_base(&desc); mode =3D cpu_mode(cpu); =20 switch (mode) { @@ -116,21 +104,21 @@ static int linearize(CPUState *cpu, break; case PROTECTED_MODE: case REAL_MODE: - if (segment_type_ro(seg) && write) { + if (segment_type_ro(desc) && write) { error_report("Cannot write to read-only segment"); return -1; } =20 logical_addr_32b =3D logical_addr & 0xFFFFFFFF; - limit =3D segment_limit(seg); + limit =3D x86_segment_limit(&desc); =20 - if (segment_expands_down(seg)) { + if (segment_expands_down(desc)) { if (logical_addr_32b >=3D limit) { error_report("Address exceeds limit (expands down)"); return -1; } =20 - limit =3D segment_max_limit(seg); + limit =3D segment_max_limit(desc); } =20 if (logical_addr_32b > limit) { --=20 2.50.1 (Apple Git-155)