From nobody Fri Apr 3 22:35:02 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1774274365; cv=none; d=zohomail.com; s=zohoarc; b=AJSN3pCoY5KekTLIC+Z3fsXh62Qhy6xuCpZGztIPLXf40bRZRn1jNpwcQseLgwiUGfLARdeoCEgUl4v+qbf/lrz0RAcK9ChTE5RqkIIipr/3HHMb50a8uFZGROivxr/iQNdorLk8I+lio9h0emRXx/UF+BlkWKCESrX5mMo25Jw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774274365; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=VSt5BsFgnJsvC8WsZFKT0zrQ9CBJAd3GXCR4xVichT0=; b=ZAwjzsPL1nuooh5fyi1gzUuXJMarqZzhB2cRNvd+YMQB3eHFJ1cn1KZyUutG9EjiBs5S/wUKtbs4fKks5ntLxr7ntec/sQfciT77TjPqIAn5++0VWvvh2Re2kTK6ZWo0KzGc6bitd3Qh0h5bEWYyWtAgTLDT1UREe1Y674tVn90= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774274365313488.4484054401288; Mon, 23 Mar 2026 06:59:25 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w4fo9-0008GZ-2N; Mon, 23 Mar 2026 09:59:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w4fnv-0008DR-RB for qemu-devel@nongnu.org; Mon, 23 Mar 2026 09:58:52 -0400 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w4fnu-0006nz-0E for qemu-devel@nongnu.org; Mon, 23 Mar 2026 09:58:51 -0400 Received: from DESKTOP-TUU1E5L.localdomain (unknown [167.220.208.76]) by linux.microsoft.com (Postfix) with ESMTPSA id 940BF20B713B; Mon, 23 Mar 2026 06:58:45 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 940BF20B713B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1774274328; bh=VSt5BsFgnJsvC8WsZFKT0zrQ9CBJAd3GXCR4xVichT0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oz74KWORamCB4RpfWr9zrTaZQAfh1RNHwhhpmrbmrDW+LGCg+Z6OJPn5VB0HGCLSO r1ad5GomT/DuWmXPrvXhrDUwWhKS0NcrUcWpKuIhm6e6Y7wj4oWenmGk5KlMXG1PEA tIcKikz8XuPXkjI8cQBcud1kj+lqrNxmdc2vr8do= From: Magnus Kulke To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Wei Liu , Richard Henderson , Marcelo Tosatti , Marcel Apfelbaum , Wei Liu , Alex Williamson , Paolo Bonzini , Zhao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Magnus Kulke , Magnus Kulke , "Michael S. Tsirkin" Subject: [RFC 08/32] accel/mshv: update s->irq_routes in add_msi_route Date: Mon, 23 Mar 2026 14:57:48 +0100 Message-Id: <20260323135812.383509-9-magnuskulke@linux.microsoft.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260323135812.383509-1-magnuskulke@linux.microsoft.com> References: <20260323135812.383509-1-magnuskulke@linux.microsoft.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=13.77.154.182; envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.microsoft.com) X-ZM-MESSAGEID: 1774274365988158500 Content-Type: text/plain; charset="utf-8" The irq_routes field of the state is populated with native mshv irq route entries. The allocation logic is modelled after the KVM implementation: we will always allocate a minumum of 64 entries and use a bitmask to find/set/clear GSIs. The old implementation of add_msi_routes will be removed in a subsequent commit. Signed-off-by: Magnus Kulke --- accel/accel-irq.c | 2 +- accel/mshv/irq.c | 87 +++++++++++++++++++++++++++++++++++++---- accel/stubs/mshv-stub.c | 2 +- include/system/mshv.h | 3 +- 4 files changed, 84 insertions(+), 10 deletions(-) diff --git a/accel/accel-irq.c b/accel/accel-irq.c index 7e71b52555..5a97a345b2 100644 --- a/accel/accel-irq.c +++ b/accel/accel-irq.c @@ -21,7 +21,7 @@ int accel_irqchip_add_msi_route(AccelRouteChange *c, int = vector, PCIDevice *dev) { #ifdef CONFIG_MSHV_IS_POSSIBLE if (mshv_msi_via_irqfd_enabled()) { - return mshv_irqchip_add_msi_route(vector, dev); + return mshv_irqchip_add_msi_route(c, vector, dev); } #endif if (kvm_enabled()) { diff --git a/accel/mshv/irq.c b/accel/mshv/irq.c index 82f2022c7c..9d6bdde27a 100644 --- a/accel/mshv/irq.c +++ b/accel/mshv/irq.c @@ -278,18 +278,91 @@ static int irqchip_update_irqfd_notifier_gsi(const Ev= entNotifier *event, return register_irqfd(vm_fd, fd, virq); } =20 +static int irqchip_allocate_gsi(MshvState *s, int *gsi) +{ + int next_gsi; + + /* Return the lowest unused GSI in the bitmap */ + next_gsi =3D find_first_zero_bit(s->used_gsi_bitmap, s->gsi_count); + if (next_gsi >=3D s->gsi_count) { + return -ENOSPC; + } + + *gsi =3D next_gsi; + + return 0; +} + +static void irqchip_release_gsi(MshvState *s, int gsi) +{ + clear_bit(gsi, s->used_gsi_bitmap); +} + +static void add_routing_entry(MshvState *s, struct mshv_user_irq_entry *en= try) +{ + struct mshv_user_irq_entry *new; + int n, size; + + if (s->irq_routes->nr =3D=3D s->nr_allocated_irq_routes) { + n =3D s->nr_allocated_irq_routes * 2; + if (n < MSHV_MIN_ALLOCATED_MSI_ROUTES) { + n =3D MSHV_MIN_ALLOCATED_MSI_ROUTES; + } + size =3D sizeof(struct mshv_user_irq_table); + size +=3D n * sizeof(*new); + s->irq_routes =3D g_realloc(s->irq_routes, size); + s->nr_allocated_irq_routes =3D n; + } + + n =3D s->irq_routes->nr; + s->irq_routes->nr++; + new =3D &s->irq_routes->entries[n]; + + *new =3D *entry; + + set_bit(entry->gsi, s->used_gsi_bitmap); =20 -int mshv_irqchip_add_msi_route(int vector, PCIDevice *dev) + trace_mshv_add_msi_routing(entry->address_lo | entry->address_hi, + entry->data); +} + +int mshv_irqchip_add_msi_route(AccelRouteChange *c, int vector, PCIDevice = *dev) { - MSIMessage msg =3D { 0, 0 }; - int virq =3D 0; + struct mshv_user_irq_entry entry =3D { 0 }; + MSIMessage msg =3D { 0 }; + uint32_t data, high_addr, low_addr; + int gsi, ret; + MshvState *s =3D MSHV_STATE(c->accel); + + if (!pci_available || !dev) { + return 0; + } =20 - if (pci_available && dev) { - msg =3D pci_get_msi_message(dev, vector); - virq =3D add_msi_routing(msg.address, le32_to_cpu(msg.data)); + msg =3D pci_get_msi_message(dev, vector); + + ret =3D irqchip_allocate_gsi(mshv_state, &gsi); + if (ret < 0) { + error_report("Could not allocate GSI for MSI route"); + return -1; + } + high_addr =3D msg.address >> 32; + low_addr =3D msg.address & 0xFFFFFFFF; + data =3D le32_to_cpu(msg.data); + + entry.gsi =3D gsi; + entry.address_hi =3D high_addr; + entry.address_lo =3D low_addr; + entry.data =3D data; + + if (s->irq_routes->nr < s->gsi_count) { + add_routing_entry(s, &entry); + c->changes++; + } else { + irqchip_release_gsi(s, gsi); + return -ENOSPC; } =20 - return virq; + return gsi; } =20 void mshv_irqchip_release_virq(int virq) diff --git a/accel/stubs/mshv-stub.c b/accel/stubs/mshv-stub.c index e499b199d9..998c9e2fc6 100644 --- a/accel/stubs/mshv-stub.c +++ b/accel/stubs/mshv-stub.c @@ -14,7 +14,7 @@ =20 bool mshv_allowed; =20 -int mshv_irqchip_add_msi_route(int vector, PCIDevice *dev) +int mshv_irqchip_add_msi_route(AccelRouteChange *c, int vector, PCIDevice = *dev) { return -ENOSYS; } diff --git a/include/system/mshv.h b/include/system/mshv.h index 0d1745315b..7f60aba308 100644 --- a/include/system/mshv.h +++ b/include/system/mshv.h @@ -33,6 +33,7 @@ #endif =20 #define MSHV_MAX_MSI_ROUTES 4096 +#define MSHV_MIN_ALLOCATED_MSI_ROUTES 64 =20 #define MSHV_PAGE_SHIFT 12 =20 @@ -59,7 +60,7 @@ int mshv_request_interrupt(MshvState *mshv_state, uint32_= t interrupt_type, uint3 uint32_t vp_index, bool logical_destination_mod= e, bool level_triggered); =20 -int mshv_irqchip_add_msi_route(int vector, PCIDevice *dev); +int mshv_irqchip_add_msi_route(AccelRouteChange *c, int vector, PCIDevice = *dev); int mshv_irqchip_update_msi_route(int virq, MSIMessage msg, PCIDevice *dev= ); void mshv_irqchip_commit_routes(void); void mshv_irqchip_release_virq(int virq); --=20 2.34.1