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Tsirkin" Subject: [RFC 21/32] target/i386/mshv: migrate Synic SINT MSRs Date: Mon, 23 Mar 2026 14:58:01 +0100 Message-Id: <20260323135812.383509-22-magnuskulke@linux.microsoft.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260323135812.383509-1-magnuskulke@linux.microsoft.com> References: <20260323135812.383509-1-magnuskulke@linux.microsoft.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=13.77.154.182; envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.microsoft.com) X-ZM-MESSAGEID: 1774274479134154100 Content-Type: text/plain; charset="utf-8" Migrate HyperV SynIC SINT MSRs. We can only read/write those if SCONTROL is enabled in the guest, hence we have to split the SINT MSR out and make reading/writing them dependent on that MSR. Signed-off-by: Magnus Kulke --- target/i386/mshv/msr.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/target/i386/mshv/msr.c b/target/i386/mshv/msr.c index 240ee84447..d19b79d729 100644 --- a/target/i386/mshv/msr.c +++ b/target/i386/mshv/msr.c @@ -298,6 +298,8 @@ int mshv_get_msrs(CPUState *cpu) struct hv_register_assoc assocs[MSHV_MSR_TOTAL_COUNT]; size_t i, j; uint32_t name; + X86CPU *x86cpu =3D X86_CPU(cpu); + bool synic_enabled; =20 set_hv_name_in_assocs(assocs, n_assocs); =20 @@ -324,6 +326,27 @@ int mshv_get_msrs(CPUState *cpu) =20 store_in_env(cpu, assocs, n_assocs); =20 + /* Read SINT MSRs only if SynIC is enabled */ + synic_enabled =3D x86cpu->env.msr_hv_synic_control & 1; + if (synic_enabled) { + QEMU_BUILD_BUG_ON(MSHV_MSR_TOTAL_COUNT < HV_SINT_COUNT); + + for (i =3D 0; i < HV_SINT_COUNT; i++) { + assocs[i].name =3D HV_REGISTER_SINT0 + i; + } + + ret =3D mshv_get_generic_regs(cpu, assocs, HV_SINT_COUNT); + if (ret < 0) { + error_report("Failed to get SynIC SINT MSRs"); + return -errno; + } + + for (i =3D 0; i < HV_SINT_COUNT; i++) { + uint64_t hv_sint_value =3D assocs[i].value.reg64; + x86cpu->env.msr_hv_synic_sint[i] =3D hv_sint_value; + } + } + return 0; } =20 @@ -358,6 +381,8 @@ int mshv_set_msrs(const CPUState *cpu) struct hv_register_assoc assocs[MSHV_MSR_TOTAL_COUNT]; int ret; size_t i, j; + X86CPU *x86cpu =3D X86_CPU(cpu); + bool synic_enabled =3D x86cpu->env.msr_hv_synic_control & 1; =20 load_from_env(cpu, assocs, n_assocs); =20 @@ -390,5 +415,21 @@ int mshv_set_msrs(const CPUState *cpu) return -errno; } =20 + /* SINT MSRs can only be written if SCONTROL has been set, so we split= */ + if (synic_enabled) { + QEMU_BUILD_BUG_ON(MSHV_MSR_TOTAL_COUNT < HV_SINT_COUNT); + + for (i =3D 0; i < HV_SINT_COUNT; i++) { + assocs[i].name =3D HV_REGISTER_SINT0 + i; + assocs[i].value.reg64 =3D x86cpu->env.msr_hv_synic_sint[i]; + } + + ret =3D mshv_set_generic_regs(cpu, assocs, HV_SINT_COUNT); + if (ret < 0) { + error_report("Failed to set SynIC SINT MSRs"); + return -errno; + } + } + return 0; } --=20 2.34.1