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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774270562; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zulI+hRCZwLd9hKIUXsHFy0DOV2UeF6F+JTY28uBAHY=; b=QW28RB9ibNZgFg0C5YlBgtA1KPtTPAohMq3qmpGnwq9w7fjs7j+88mKjyjrViV9+2jr2ot /fyYl65A9mgPXm5n9mnZIJa/aAhKiVaRUBmbcdH1/WVfu1fSBX6ePDbxEjEwgHQ+pH6q1r 64XJrp82xT9ac/AvWEvR5SblJss8oaE= X-MC-Unique: zCrxi5S2NQ2XCV2ATF92Tg-1 X-Mimecast-MFC-AGG-ID: zCrxi5S2NQ2XCV2ATF92Tg_1774270556 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , Jamin Lin , Kane Chen , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 2/3] ftgmac100: Improve DMA error handling Date: Mon, 23 Mar 2026 13:55:44 +0100 Message-ID: <20260323125545.577653-3-clg@redhat.com> In-Reply-To: <20260323125545.577653-1-clg@redhat.com> References: <20260323125545.577653-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1774270623822154100 Currently, DMA memory operation errors in the ftgmac100 model are not all tested and this can lead to a guest-triggerable denial of service as described in https://gitlab.com/qemu-project/qemu/-/work_items/3335. To fix this, check the return value of ftgmac100_write_bd() in the TX path and exit the TX loop on error to prevent further processing. In the event of a DMA error, also set FTGMAC100_INT_AHB_ERR interrupt flag as appropriate. The FTGMAC100_INT_AHB_ERR interrupt status bit only applies to the AST2400 SoC; on newer Aspeed SoCs, it is a reserved bit. Nevertheless, since it is supported by the Linux driver and it should be safe to use in the QEMU implementation across all SoCs. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3335 Reviewed-by: Jamin Lin Link: https://lore.kernel.org/qemu-devel/20260322215732.387383-3-clg@redhat= .com Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: C=C3=A9dric Le Goater --- hw/net/ftgmac100.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c index d29f7dcd171b..2f05bba11d01 100644 --- a/hw/net/ftgmac100.c +++ b/hw/net/ftgmac100.c @@ -624,7 +624,10 @@ static void ftgmac100_do_tx(FTGMAC100State *s, uint64_= t tx_ring, bd.des0 &=3D ~FTGMAC100_TXDES0_TXDMA_OWN; =20 /* Write back the modified descriptor. */ - ftgmac100_write_bd(&bd, addr); + if (ftgmac100_write_bd(&bd, addr)) { + s->isr |=3D FTGMAC100_INT_AHB_ERR; + break; + } /* Advance to the next descriptor. */ if (bd.des0 & s->txdes0_edotr) { addr =3D tx_ring; @@ -1134,7 +1137,10 @@ static ssize_t ftgmac100_receive(NetClientState *nc,= const uint8_t *buf, bd.des0 |=3D flags | FTGMAC100_RXDES0_LRS; s->isr |=3D FTGMAC100_INT_RPKT_BUF; } - ftgmac100_write_bd(&bd, addr); + if (ftgmac100_write_bd(&bd, addr)) { + s->isr |=3D FTGMAC100_INT_AHB_ERR; + break; + } if (bd.des0 & s->rxdes0_edorr) { addr =3D s->rx_ring; } else { --=20 2.53.0