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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1774018289672158500 J2_jumptnew and J2_jumptnewpt passed the raw predicate value to gen_cond_jump(), checking if the full 8-bit value was non-zero. Refer to PRM Section 6.1.2 "predicate-consuming instructions examine only the least-significant bit". This inconsistency caused if (p0.new) jumps and if (p0.new) loads within the same packet to disagree when the predicate had values other than the ones generated by predicate-generating instructions (e.g. 0x80 or 0xAA where bit 0 is clear but the value is non-zero): the jump would be taken while the loads were skipped. Fix by routing both macros through fGEN_TCG_cond_jumpt(fLSBNEW(PuN)), matching the pattern used by every other predicated jump. Discovered-by: Alexey Karyakin Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- target/hexagon/gen_tcg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index 7b96dab9185..45ccd518883 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -951,9 +951,9 @@ #define fGEN_TCG_J2_jumpfpt(SHORTCODE) \ fGEN_TCG_cond_jumpf(fLSBOLD(PuV)) #define fGEN_TCG_J2_jumptnew(SHORTCODE) \ - gen_cond_jump(ctx, TCG_COND_EQ, PuN, riV) + fGEN_TCG_cond_jumpt(fLSBNEW(PuN)) #define fGEN_TCG_J2_jumptnewpt(SHORTCODE) \ - gen_cond_jump(ctx, TCG_COND_EQ, PuN, riV) + fGEN_TCG_cond_jumpt(fLSBNEW(PuN)) #define fGEN_TCG_J2_jumpfnewpt(SHORTCODE) \ fGEN_TCG_cond_jumpf(fLSBNEW(PuN)) #define fGEN_TCG_J2_jumpfnew(SHORTCODE) \ --=20 2.34.1 From nobody Sun Mar 22 14:11:53 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1774018307; cv=none; d=zohomail.com; s=zohoarc; b=dxOsaC8KLJ0ylo7jaRc4T/jFEpmOqhLbfM2Bhwlakv+yvq0eD4Hj3gSU9Y3uq0RLX8R6RGOJp6rqtliJbj9AW1fDtmWBRQHslG3Yj6QngRrygKoICcDVHqkJtl+msHAeZv374YYO2GcuDHDLjiOApXw3/scGrU+KAyYqGqSNrKE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1774018307; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=XyZLk11vPlN5n1JcVQOim0LAUFqmjg+6RUDj+Icm3JQ=; b=GQH2R8d5tRNUOlYcTVVearAuOdnOiXum4oSGJNaWeZDYIbpMne3u0KKpVNx+lWqlEUE49F06EtKln/fPhbIwu90wJCftqZ1H6w4tCIEmyLzoNyxW63tTkC0anQTV5AzidDjYO4rl63xUD94LuECWBfJObXuxlCM1tCiLWI6ggFo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1774018307470479.6578453094115; Fri, 20 Mar 2026 07:51:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w3bBu-0006Gj-Mj; Fri, 20 Mar 2026 10:51:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w3bBq-0006G3-Bo for qemu-devel@nongnu.org; Fri, 20 Mar 2026 10:51:07 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w3bBl-0007Kk-7N for qemu-devel@nongnu.org; Fri, 20 Mar 2026 10:51:04 -0400 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62KBsOma3875956 for ; Fri, 20 Mar 2026 14:50:58 GMT Received: from mail-dl1-f72.google.com (mail-dl1-f72.google.com [74.125.82.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d15s08e9d-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 20 Mar 2026 14:50:58 +0000 (GMT) Received: by mail-dl1-f72.google.com with SMTP id a92af1059eb24-1275c6fc58aso437616c88.0 for ; Fri, 20 Mar 2026 07:50:58 -0700 (PDT) Received: from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1774018309269154100 Replace TCG_COND_EQ/NE comparisons against 0 with TCG_COND_TSTEQ/TSTNE comparisons against 1 for all predicate-conditional branches. This tests bit 0 of the predicate register directly, eliminating redundant andi operations that previously extracted the LSB before the comparison. For predicate-conditional jumps (jumpt, jumpf, jumptnew, etc.) and jump-register variants (jumprt, jumprf, etc.), pass the raw predicate value directly instead of going through fLSBOLD/fLSBNEW extraction. For callers that produce a 0/1 result via setcond (compare-and-jump, jumprz, etc.), the TSTEQ/TSTNE test on bit 0 is equivalent to the previous EQ/NE test against 0. Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- target/hexagon/gen_tcg.h | 94 +++++++++++++++----------------------- target/hexagon/genptr.c | 32 +++++-------- target/hexagon/translate.c | 2 +- 3 files changed, 50 insertions(+), 78 deletions(-) diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index 45ccd518883..1e0cc3b29a8 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -696,13 +696,13 @@ gen_callr(ctx, RsV) =20 #define fGEN_TCG_J2_callt(SHORTCODE) \ - gen_cond_call(ctx, PuV, TCG_COND_EQ, riV) + gen_cond_call(ctx, PuV, TCG_COND_TSTEQ, riV) #define fGEN_TCG_J2_callf(SHORTCODE) \ - gen_cond_call(ctx, PuV, TCG_COND_NE, riV) + gen_cond_call(ctx, PuV, TCG_COND_TSTNE, riV) #define fGEN_TCG_J2_callrt(SHORTCODE) \ - gen_cond_callr(ctx, TCG_COND_EQ, PuV, RsV) + gen_cond_callr(ctx, TCG_COND_TSTEQ, PuV, RsV) #define fGEN_TCG_J2_callrf(SHORTCODE) \ - gen_cond_callr(ctx, TCG_COND_NE, PuV, RsV) + gen_cond_callr(ctx, TCG_COND_TSTNE, PuV, RsV) =20 #define fGEN_TCG_J2_loop0r(SHORTCODE) \ gen_loop0r(ctx, RsV, riV) @@ -893,21 +893,21 @@ gen_cmpnd_cmp_n1_jmp_f(ctx, 1, TCG_COND_GT, RsV, riV) =20 #define fGEN_TCG_J4_tstbit0_tp0_jump_nt(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_EQ, riV) + gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_TSTEQ, riV) #define fGEN_TCG_J4_tstbit0_tp0_jump_t(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_EQ, riV) + gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_TSTEQ, riV) #define fGEN_TCG_J4_tstbit0_fp0_jump_nt(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_NE, riV) + gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_TSTNE, riV) #define fGEN_TCG_J4_tstbit0_fp0_jump_t(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_NE, riV) + gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_TSTNE, riV) #define fGEN_TCG_J4_tstbit0_tp1_jump_nt(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_EQ, riV) + gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_TSTEQ, riV) #define fGEN_TCG_J4_tstbit0_tp1_jump_t(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_EQ, riV) + gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_TSTEQ, riV) #define fGEN_TCG_J4_tstbit0_fp1_jump_nt(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_NE, riV) + gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_TSTNE, riV) #define fGEN_TCG_J4_tstbit0_fp1_jump_t(SHORTCODE) \ - gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_NE, riV) + gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_TSTNE, riV) =20 /* p0 =3D cmp.eq(r0, #7) */ #define fGEN_TCG_SA1_cmpeqi(SHORTCODE) \ @@ -933,31 +933,24 @@ do { \ TCGv LSB =3D tcg_temp_new(); \ COND; \ - gen_cond_jump(ctx, TCG_COND_EQ, LSB, riV); \ + gen_cond_jump(ctx, TCG_COND_TSTEQ, LSB, riV); \ } while (0) -#define fGEN_TCG_cond_jumpf(COND) \ - do { \ - TCGv LSB =3D tcg_temp_new(); \ - COND; \ - gen_cond_jump(ctx, TCG_COND_NE, LSB, riV); \ - } while (0) - #define fGEN_TCG_J2_jumpt(SHORTCODE) \ - fGEN_TCG_cond_jumpt(fLSBOLD(PuV)) + gen_cond_jump(ctx, TCG_COND_TSTEQ, PuV, riV) #define fGEN_TCG_J2_jumptpt(SHORTCODE) \ - fGEN_TCG_cond_jumpt(fLSBOLD(PuV)) + gen_cond_jump(ctx, TCG_COND_TSTEQ, PuV, riV) #define fGEN_TCG_J2_jumpf(SHORTCODE) \ - fGEN_TCG_cond_jumpf(fLSBOLD(PuV)) + gen_cond_jump(ctx, TCG_COND_TSTNE, PuV, riV) #define fGEN_TCG_J2_jumpfpt(SHORTCODE) \ - fGEN_TCG_cond_jumpf(fLSBOLD(PuV)) + gen_cond_jump(ctx, TCG_COND_TSTNE, PuV, riV) #define fGEN_TCG_J2_jumptnew(SHORTCODE) \ - fGEN_TCG_cond_jumpt(fLSBNEW(PuN)) + gen_cond_jump(ctx, TCG_COND_TSTEQ, PuN, riV) #define fGEN_TCG_J2_jumptnewpt(SHORTCODE) \ - fGEN_TCG_cond_jumpt(fLSBNEW(PuN)) + gen_cond_jump(ctx, TCG_COND_TSTEQ, PuN, riV) #define fGEN_TCG_J2_jumpfnewpt(SHORTCODE) \ - fGEN_TCG_cond_jumpf(fLSBNEW(PuN)) + gen_cond_jump(ctx, TCG_COND_TSTNE, PuN, riV) #define fGEN_TCG_J2_jumpfnew(SHORTCODE) \ - fGEN_TCG_cond_jumpf(fLSBNEW(PuN)) + gen_cond_jump(ctx, TCG_COND_TSTNE, PuN, riV) #define fGEN_TCG_J2_jumprz(SHORTCODE) \ fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_NE, LSB, RsV, 0)) #define fGEN_TCG_J2_jumprzpt(SHORTCODE) \ @@ -975,35 +968,22 @@ #define fGEN_TCG_J2_jumprltezpt(SHORTCODE) \ fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_LE, LSB, RsV, 0)) =20 -#define fGEN_TCG_cond_jumprt(COND) \ - do { \ - TCGv LSB =3D tcg_temp_new(); \ - COND; \ - gen_cond_jumpr(ctx, RsV, TCG_COND_EQ, LSB); \ - } while (0) -#define fGEN_TCG_cond_jumprf(COND) \ - do { \ - TCGv LSB =3D tcg_temp_new(); \ - COND; \ - gen_cond_jumpr(ctx, RsV, TCG_COND_NE, LSB); \ - } while (0) - #define fGEN_TCG_J2_jumprt(SHORTCODE) \ - fGEN_TCG_cond_jumprt(fLSBOLD(PuV)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTEQ, PuV) #define fGEN_TCG_J2_jumprtpt(SHORTCODE) \ - fGEN_TCG_cond_jumprt(fLSBOLD(PuV)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTEQ, PuV) #define fGEN_TCG_J2_jumprf(SHORTCODE) \ - fGEN_TCG_cond_jumprf(fLSBOLD(PuV)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTNE, PuV) #define fGEN_TCG_J2_jumprfpt(SHORTCODE) \ - fGEN_TCG_cond_jumprf(fLSBOLD(PuV)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTNE, PuV) #define fGEN_TCG_J2_jumprtnew(SHORTCODE) \ - fGEN_TCG_cond_jumprt(fLSBNEW(PuN)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTEQ, PuN) #define fGEN_TCG_J2_jumprtnewpt(SHORTCODE) \ - fGEN_TCG_cond_jumprt(fLSBNEW(PuN)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTEQ, PuN) #define fGEN_TCG_J2_jumprfnew(SHORTCODE) \ - fGEN_TCG_cond_jumprf(fLSBNEW(PuN)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTNE, PuN) #define fGEN_TCG_J2_jumprfnewpt(SHORTCODE) \ - fGEN_TCG_cond_jumprf(fLSBNEW(PuN)) + gen_cond_jumpr(ctx, RsV, TCG_COND_TSTNE, PuN) =20 /* * New value compare & jump instructions @@ -1101,13 +1081,13 @@ gen_cmpi_jumpnv(ctx, TCG_COND_LE, NsN, -1, riV) =20 #define fGEN_TCG_J4_tstbit0_t_jumpnv_t(SHORTCODE) \ - gen_testbit0_jumpnv(ctx, NsN, TCG_COND_EQ, riV) + gen_testbit0_jumpnv(ctx, NsN, TCG_COND_TSTEQ, riV) #define fGEN_TCG_J4_tstbit0_t_jumpnv_nt(SHORTCODE) \ - gen_testbit0_jumpnv(ctx, NsN, TCG_COND_EQ, riV) + gen_testbit0_jumpnv(ctx, NsN, TCG_COND_TSTEQ, riV) #define fGEN_TCG_J4_tstbit0_f_jumpnv_t(SHORTCODE) \ - gen_testbit0_jumpnv(ctx, NsN, TCG_COND_NE, riV) + gen_testbit0_jumpnv(ctx, NsN, TCG_COND_TSTNE, riV) #define fGEN_TCG_J4_tstbit0_f_jumpnv_nt(SHORTCODE) \ - gen_testbit0_jumpnv(ctx, NsN, TCG_COND_NE, riV) + gen_testbit0_jumpnv(ctx, NsN, TCG_COND_TSTNE, riV) =20 /* r0 =3D r1 ; jump address */ #define fGEN_TCG_J4_jumpsetr(SHORTCODE) \ @@ -1150,14 +1130,14 @@ gen_jumpr(ctx, hex_gpr[HEX_REG_LR]) =20 #define fGEN_TCG_SL2_jumpr31_t(SHORTCODE) \ - gen_cond_jumpr31(ctx, TCG_COND_EQ, hex_pred[0]) + gen_cond_jumpr31(ctx, TCG_COND_TSTEQ, hex_pred[0]) #define fGEN_TCG_SL2_jumpr31_f(SHORTCODE) \ - gen_cond_jumpr31(ctx, TCG_COND_NE, hex_pred[0]) + gen_cond_jumpr31(ctx, TCG_COND_TSTNE, hex_pred[0]) =20 #define fGEN_TCG_SL2_jumpr31_tnew(SHORTCODE) \ - gen_cond_jumpr31(ctx, TCG_COND_EQ, ctx->new_pred_value[0]) + gen_cond_jumpr31(ctx, TCG_COND_TSTEQ, ctx->new_pred_value[0]) #define fGEN_TCG_SL2_jumpr31_fnew(SHORTCODE) \ - gen_cond_jumpr31(ctx, TCG_COND_NE, ctx->new_pred_value[0]) + gen_cond_jumpr31(ctx, TCG_COND_TSTNE, ctx->new_pred_value[0]) =20 /* Count trailing zeros/ones */ #define fGEN_TCG_S2_ct0(SHORTCODE) \ diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 9eb21da6f3e..c7b9436c8d4 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -455,7 +455,7 @@ static void gen_write_new_pc_addr(DisasContext *ctx, TC= Gv addr, TCGLabel *pred_false =3D NULL; if (cond !=3D TCG_COND_ALWAYS) { pred_false =3D gen_new_label(); - tcg_gen_brcondi_tl(cond, pred, 0, pred_false); + tcg_gen_brcondi_tl(cond, pred, 1, pred_false); } =20 if (ctx->pkt->pkt_has_multi_cof) { @@ -579,9 +579,7 @@ static void gen_cond_jumpr(DisasContext *ctx, TCGv dst_= pc, =20 static void gen_cond_jumpr31(DisasContext *ctx, TCGCond cond, TCGv pred) { - TCGv LSB =3D tcg_temp_new(); - tcg_gen_andi_tl(LSB, pred, 1); - gen_cond_jumpr(ctx, hex_gpr[HEX_REG_LR], cond, LSB); + gen_cond_jumpr(ctx, hex_gpr[HEX_REG_LR], cond, pred); } =20 static void gen_cond_jump(DisasContext *ctx, TCGCond cond, TCGv pred, @@ -609,14 +607,14 @@ static void gen_cmpnd_cmp_jmp_t(DisasContext *ctx, int pnum, TCGCond cond, TCGv arg1, TCGv ar= g2, int pc_off) { - gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, arg2, TCG_COND_EQ, pc_off); + gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, arg2, TCG_COND_TSTEQ, pc_off); } =20 static void gen_cmpnd_cmp_jmp_f(DisasContext *ctx, int pnum, TCGCond cond, TCGv arg1, TCGv ar= g2, int pc_off) { - gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, arg2, TCG_COND_NE, pc_off); + gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, arg2, TCG_COND_TSTNE, pc_off); } =20 static void gen_cmpnd_cmpi_jmp_t(DisasContext *ctx, @@ -624,7 +622,7 @@ static void gen_cmpnd_cmpi_jmp_t(DisasContext *ctx, int pc_off) { TCGv tmp =3D tcg_constant_tl(arg2); - gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, tmp, TCG_COND_EQ, pc_off); + gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, tmp, TCG_COND_TSTEQ, pc_off); } =20 static void gen_cmpnd_cmpi_jmp_f(DisasContext *ctx, @@ -632,7 +630,7 @@ static void gen_cmpnd_cmpi_jmp_f(DisasContext *ctx, int pc_off) { TCGv tmp =3D tcg_constant_tl(arg2); - gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, tmp, TCG_COND_NE, pc_off); + gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, tmp, TCG_COND_TSTNE, pc_off); } =20 static void gen_cmpnd_cmp_n1_jmp_t(DisasContext *ctx, int pnum, TCGCond co= nd, @@ -665,9 +663,7 @@ static void gen_cmpnd_tstbit0_jmp(DisasContext *ctx, static void gen_testbit0_jumpnv(DisasContext *ctx, TCGv arg, TCGCond cond, int pc_off) { - TCGv pred =3D tcg_temp_new(); - tcg_gen_andi_tl(pred, arg, 1); - gen_cond_jump(ctx, cond, pred, pc_off); + gen_cond_jump(ctx, cond, arg, pc_off); } =20 static void gen_jump(DisasContext *ctx, int pc_off) @@ -698,11 +694,9 @@ static void gen_cond_call(DisasContext *ctx, TCGv pred, TCGCond cond, int pc_off) { TCGv lr =3D get_result_gpr(ctx, HEX_REG_LR); - TCGv lsb =3D tcg_temp_new(); TCGLabel *skip =3D gen_new_label(); - tcg_gen_andi_tl(lsb, pred, 1); - gen_write_new_pc_pcrel(ctx, pc_off, cond, lsb); - tcg_gen_brcondi_tl(cond, lsb, 0, skip); + gen_write_new_pc_pcrel(ctx, pc_off, cond, pred); + tcg_gen_brcondi_tl(cond, pred, 1, skip); tcg_gen_movi_tl(lr, ctx->next_PC); gen_set_label(skip); } @@ -710,10 +704,8 @@ static void gen_cond_call(DisasContext *ctx, TCGv pred, static void gen_cond_callr(DisasContext *ctx, TCGCond cond, TCGv pred, TCGv new_pc) { - TCGv lsb =3D tcg_temp_new(); TCGLabel *skip =3D gen_new_label(); - tcg_gen_andi_tl(lsb, pred, 1); - tcg_gen_brcondi_tl(cond, lsb, 0, skip); + tcg_gen_brcondi_tl(cond, pred, 1, skip); gen_callr(ctx, new_pc); gen_set_label(skip); } @@ -955,7 +947,7 @@ static void gen_cmp_jumpnv(DisasContext *ctx, { TCGv pred =3D tcg_temp_new(); tcg_gen_setcond_tl(cond, pred, val, src); - gen_cond_jump(ctx, TCG_COND_EQ, pred, pc_off); + gen_cond_jump(ctx, TCG_COND_TSTEQ, pred, pc_off); } =20 static void gen_cmpi_jumpnv(DisasContext *ctx, @@ -963,7 +955,7 @@ static void gen_cmpi_jumpnv(DisasContext *ctx, { TCGv pred =3D tcg_temp_new(); tcg_gen_setcondi_tl(cond, pred, val, src); - gen_cond_jump(ctx, TCG_COND_EQ, pred, pc_off); + gen_cond_jump(ctx, TCG_COND_TSTEQ, pred, pc_off); } =20 /* Shift left with saturation */ diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 8a223f6e13e..633401451d8 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -163,7 +163,7 @@ static void gen_end_tb(DisasContext *ctx) if (ctx->branch_cond !=3D TCG_COND_NEVER) { if (ctx->branch_cond !=3D TCG_COND_ALWAYS) { TCGLabel *skip =3D gen_new_label(); - tcg_gen_brcondi_tl(ctx->branch_cond, ctx->branch_taken, 0, ski= p); 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1774018287777158500 Test for predicated .new branches with non-standard predicate values (non-all-0, non-all-1). Hexagon predicates are 8 bits wide but conditional branches evaluate only the LSB. Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- tests/tcg/hexagon/test_pnew_jump_loads.c | 341 +++++++++++++++++++++++ tests/tcg/hexagon/Makefile.target | 3 + 2 files changed, 344 insertions(+) create mode 100644 tests/tcg/hexagon/test_pnew_jump_loads.c diff --git a/tests/tcg/hexagon/test_pnew_jump_loads.c b/tests/tcg/hexagon/t= est_pnew_jump_loads.c new file mode 100644 index 00000000000..06178bdac11 --- /dev/null +++ b/tests/tcg/hexagon/test_pnew_jump_loads.c @@ -0,0 +1,341 @@ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Exhaustive test for predicated .new branches with non-standard predicate + * values (non-all-0, non-all-1). + * + * Hexagon predicates are 8 bits wide but conditional branches evaluate on= ly + * bit 0 (the LSB). A predicate value like 0xFE is non-zero yet has bit 0 + * clear, so it must evaluate as "false". + * + * This test covers the distinct TCG code paths for predicated .new ops: + * + * 1. gen_cond_jump - J2_jumptnewpt / J2_jumpfnewpt (p0..p3) + * 2. gen_cond_jumpr - J2_jumprtnewpt / J2_jumprfnewpt + * 3. gen_cond_jumpr31 - SL2_jumpr31_tnew / SL2_jumpr31_fnew (duplex) + * 4. gen_testbit0_jumpnv - J4_tstbit0_t/f_jumpnv_t + * 5. Conditional .new loads and stores + */ + +#include +#include + +int err; + +#include "hex_test.h" + +/* + * Non-standard predicate: non-zero (0xFE) but bit 0 clear =3D> false. + * This distinguishes correct LSB evaluation from incorrect non-zero check= s. + */ +#define PRED_VAL 0xFEu +#define SENTINEL 0xDEADBEEFu +#define LOAD_VAL 0xAAAABBBBu + +/* gen_cond_jump (J2_jumptnewpt) */ + +/* + * Macro to test jumptnew across predicate registers p0..p3. + * { Pn =3D and(Pn, Pn); if (Pn.new) jump:t TARGET } + * + * Pn.new =3D PRED_VAL & PRED_VAL =3D 0xFE =3D> bit0=3D0 =3D> not taken. + * Different predicate registers produce different instruction encodings. + */ +#define TEST_JUMPTNEW(PREG) \ +static void test_jumptnew_##PREG(void) \ +{ \ + uint32_t jumped; \ + asm( \ + #PREG " =3D %[pred]\n" \ + "{ " #PREG " =3D and(" #PREG ", " #PREG ")\n" \ + " if (" #PREG ".new) jump:t 1f }\n" \ + "%[jumped] =3D #0\n" \ + "jump 2f\n" \ + "1:\n" \ + "%[jumped] =3D #1\n" \ + "2:\n" \ + : [jumped] "=3Dr"(jumped) \ + : [pred] "r"(PRED_VAL) \ + : #PREG \ + ); \ + check32(jumped, 0); \ +} + +TEST_JUMPTNEW(p0) +TEST_JUMPTNEW(p1) +TEST_JUMPTNEW(p2) +TEST_JUMPTNEW(p3) + +/* jumpfnew: bit0=3D0 =3D> condition "false" =3D> negated =3D> jump IS tak= en */ +static void test_jumpfnew_p0(void) +{ + uint32_t jumped; + + asm( + "p0 =3D %[pred]\n" + "{ p0 =3D and(p0, p0)\n" + " if (!p0.new) jump:t 1f }\n" + "%[jumped] =3D #0\n" + "jump 2f\n" + "1:\n" + "%[jumped] =3D #1\n" + "2:\n" + : [jumped] "=3Dr"(jumped) + : [pred] "r"(PRED_VAL) + : "p0" + ); + check32(jumped, 1); +} + +/* gen_cond_jumpr (J2_jumprtnewpt) */ + +static void test_jumprtnew_p0(void) +{ + uint32_t jumped; + + asm( + "p0 =3D %[pred]\n" + "r0 =3D ##1f\n" + "{ p0 =3D and(p0, p0)\n" + " if (p0.new) jumpr:t r0 }\n" + "%[jumped] =3D #0\n" + "jump 2f\n" + "1:\n" + "%[jumped] =3D #1\n" + "2:\n" + : [jumped] "=3Dr"(jumped) + : [pred] "r"(PRED_VAL) + : "p0", "r0" + ); + check32(jumped, 0); +} + +static void test_jumprfnew_p0(void) +{ + uint32_t jumped; + + asm( + "p0 =3D %[pred]\n" + "r0 =3D ##1f\n" + "{ p0 =3D and(p0, p0)\n" + " if (!p0.new) jumpr:t r0 }\n" + "%[jumped] =3D #0\n" + "jump 2f\n" + "1:\n" + "%[jumped] =3D #1\n" + "2:\n" + : [jumped] "=3Dr"(jumped) + : [pred] "r"(PRED_VAL) + : "p0", "r0" + ); + check32(jumped, 1); +} + +/* gen_cond_jumpr31 (SL2_jumpr31_tnew) */ + +/* + * Duplex sub-instructions: only SA1_cmpeqi and similar can produce .new + * predicates in a duplex packet, and those only yield 0x00/0xFF. + * We test with standard values to exercise the duplex decode path. + * + * { p0 =3D cmp.eq(r0, #0); if (p0.new) jumpr:nt r31 } + * With r0=3D0: p0.new =3D 0xFF =3D> bit0=3D1 =3D> taken. + */ +static void test_jumpr31_tnew(void) +{ + uint32_t jumped; + + asm( + "r0 =3D #0\n" + "r31 =3D ##1f\n" + "{ p0 =3D cmp.eq(r0, #0)\n" + " if (p0.new) jumpr:nt r31 }\n" + "%[jumped] =3D #0\n" + "jump 2f\n" + "1:\n" + "%[jumped] =3D #1\n" + "2:\n" + : [jumped] "=3Dr"(jumped) + : + : "r0", "r31", "p0" + ); + check32(jumped, 1); +} + +/* p0.new =3D 0xFF =3D> bit0=3D1 =3D> !true =3D> not taken */ +static void test_jumpr31_fnew(void) +{ + uint32_t jumped; + + asm( + "r0 =3D #0\n" + "r31 =3D ##1f\n" + "{ p0 =3D cmp.eq(r0, #0)\n" + " if (!p0.new) jumpr:nt r31 }\n" + "%[jumped] =3D #0\n" + "jump 2f\n" + "1:\n" + "%[jumped] =3D #1\n" + "2:\n" + : [jumped] "=3Dr"(jumped) + : + : "r0", "r31", "p0" + ); + check32(jumped, 0); +} + +/* gen_testbit0_jumpnv (J4_tstbit0) */ + +/* + * { r0 =3D #0xFE; if (tstbit(r0.new, #0)) jump:t TARGET } + * r0.new =3D 0xFE =3D> bit0=3D0 =3D> tstbit false =3D> not taken. + */ +static void test_tstbit0_t_jumpnv(void) +{ + uint32_t jumped; + + asm( + "{ r0 =3D #0xFE\n" + " if (tstbit(r0.new, #0)) jump:t 1f }\n" + "%[jumped] =3D #0\n" + "jump 2f\n" + "1:\n" + "%[jumped] =3D #1\n" + "2:\n" + : [jumped] "=3Dr"(jumped) + : + : "r0" + ); + check32(jumped, 0); +} + +/* bit0=3D0 =3D> tstbit false =3D> negated =3D> taken */ +static void test_tstbit0_f_jumpnv(void) +{ + uint32_t jumped; + + asm( + "{ r0 =3D #0xFE\n" + " if (!tstbit(r0.new, #0)) jump:t 1f }\n" + "%[jumped] =3D #0\n" + "jump 2f\n" + "1:\n" + "%[jumped] =3D #1\n" + "2:\n" + : [jumped] "=3Dr"(jumped) + : + : "r0" + ); + check32(jumped, 1); +} + +/* conditional .new loads and stores */ + +static uint32_t load_val; +static uint32_t store_dst; + +/* bit0=3D0 =3D> condition false =3D> load skipped =3D> sentinel remains */ +static void test_cond_load_tnew(void) +{ + uint32_t result; + + load_val =3D LOAD_VAL; + asm( + "p0 =3D %[pred]\n" + "%[res] =3D %[sentinel]\n" + "{ p0 =3D and(p0, p0)\n" + " if (p0.new) %[res] =3D memw(%[addr]+#0) }\n" + : [res] "=3D&r"(result) + : [pred] "r"(PRED_VAL), + [addr] "r"(&load_val), + [sentinel] "r"(SENTINEL) + : "p0", "memory" + ); + check32(result, SENTINEL); +} + +/* bit0=3D0 =3D> condition false =3D> negated =3D> load executed */ +static void test_cond_load_fnew(void) +{ + uint32_t result; + + load_val =3D LOAD_VAL; + asm( + "p0 =3D %[pred]\n" + "%[res] =3D %[sentinel]\n" + "{ p0 =3D and(p0, p0)\n" + " if (!p0.new) %[res] =3D memw(%[addr]+#0) }\n" + : [res] "=3D&r"(result) + : [pred] "r"(PRED_VAL), + [addr] "r"(&load_val), + [sentinel] "r"(SENTINEL) + : "p0", "memory" + ); + check32(result, LOAD_VAL); +} + +/* bit0=3D0 =3D> condition false =3D> store skipped =3D> sentinel remains = */ +static void test_cond_store_tnew(void) +{ + store_dst =3D SENTINEL; + asm( + "p0 =3D %[pred]\n" + "{ p0 =3D and(p0, p0)\n" + " if (p0.new) memw(%[addr]+#0) =3D %[val] }\n" + : + : [pred] "r"(PRED_VAL), + [addr] "r"(&store_dst), + [val] "r"(LOAD_VAL) + : "p0", "memory" + ); + check32(store_dst, SENTINEL); +} + +/* bit0=3D0 =3D> condition false =3D> negated =3D> store executed */ +static void test_cond_store_fnew(void) +{ + store_dst =3D SENTINEL; + asm( + "p0 =3D %[pred]\n" + "{ p0 =3D and(p0, p0)\n" + " if (!p0.new) memw(%[addr]+#0) =3D %[val] }\n" + : + : [pred] "r"(PRED_VAL), + [addr] "r"(&store_dst), + [val] "r"(LOAD_VAL) + : "p0", "memory" + ); + check32(store_dst, LOAD_VAL); +} + +int main(void) +{ + /* gen_cond_jump with all predicate registers */ + test_jumptnew_p0(); + test_jumptnew_p1(); + test_jumptnew_p2(); + test_jumptnew_p3(); + test_jumpfnew_p0(); + + /* gen_cond_jumpr */ + test_jumprtnew_p0(); + test_jumprfnew_p0(); + + /* gen_cond_jumpr31 (duplex, standard values) */ + test_jumpr31_tnew(); + test_jumpr31_fnew(); + + /* gen_testbit0_jumpnv */ + test_tstbit0_t_jumpnv(); + test_tstbit0_f_jumpnv(); + + /* conditional .new loads and stores */ + test_cond_load_tnew(); + test_cond_load_fnew(); + test_cond_store_tnew(); + test_cond_store_fnew(); + + puts(err ? "FAIL" : "PASS"); + return err ? 1 : 0; +} diff --git a/tests/tcg/hexagon/Makefile.target b/tests/tcg/hexagon/Makefile= .target index a70ef2f6607..549c95082f6 100644 --- a/tests/tcg/hexagon/Makefile.target +++ b/tests/tcg/hexagon/Makefile.target @@ -81,6 +81,8 @@ HEX_TESTS +=3D test_vminh HEX_TESTS +=3D test_vpmpyh HEX_TESTS +=3D test_vspliceb =20 +HEX_TESTS +=3D test_pnew_jump_loads + HEX_TESTS +=3D v68_scalar HEX_TESTS +=3D v68_hvx HEX_TESTS +=3D v69_hvx @@ -104,6 +106,7 @@ overflow: overflow.c hex_test.h preg_alias: preg_alias.c hex_test.h read_write_overlap: read_write_overlap.c hex_test.h reg_mut: reg_mut.c hex_test.h +test_pnew_jump_loads: test_pnew_jump_loads.c hex_test.h unaligned_pc: unaligned_pc.c =20 # This test has to be compiled for the -mv67t target --=20 2.34.1