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Fri, 20 Mar 2026 06:06:14 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Alexander Graf , Peter Maydell , qemu-arm@nongnu.org, Pedro Barbuda , Mohamed Mediouni , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [RFC PATCH 09/35] target/arm: migrate Granule Protection traps to registerfields Date: Fri, 20 Mar 2026 13:05:40 +0000 Message-ID: <20260320130607.2071996-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260320130607.2071996-1-alex.bennee@linaro.org> References: <20260320130607.2071996-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52b; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1774012214535158500 Signed-off-by: Alex Benn=C3=A9e --- target/arm/syndrome.h | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h index fb86e7bf6a8..3fd82f5b565 100644 --- a/target/arm/syndrome.h +++ b/target/arm/syndrome.h @@ -462,12 +462,36 @@ static inline uint32_t syn_bxjtrap(int cv, int cond, = int rm) return res; } =20 +/* + * ISS encoding for a Granule Protection Check exception + * + * These are only reported to EL3 + */ +FIELD(GPC_ISS, xFSC, 0, 6) +FIELD(GPC_ISS, WnR, 6, 1) /* Write not Read */ +FIELD(GPC_ISS, S1PTW, 7, 1) +FIELD(GPC_ISS, CM, 8, 1) +FIELD(GPC_ISS, VNCR, 13, 1) +FIELD(GPC_ISS, GPCSC, 14, 6) +FIELD(GPC_ISS, InD, 20, 1) /* Instruction not Data access */ +FIELD(GPC_ISS, S2PTW, 21, 1) + static inline uint32_t syn_gpc(int s2ptw, int ind, int gpcsc, int vncr, int cm, int s1ptw, int wnr, int fsc) { - return (EC_GPC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (s2ptw << 21) - | (ind << 20) | (gpcsc << 14) | (vncr << 13) | (cm << 8) - | (s1ptw << 7) | (wnr << 6) | fsc; + uint32_t res =3D syn_set_ec(0, EC_GPC); + res =3D FIELD_DP32(res, SYNDROME, IL, 1); + + res =3D FIELD_DP32(res, GPC_ISS, S2PTW, s2ptw); + res =3D FIELD_DP32(res, GPC_ISS, InD, ind); + res =3D FIELD_DP32(res, GPC_ISS, GPCSC, gpcsc); + res =3D FIELD_DP32(res, GPC_ISS, VNCR, vncr); + res =3D FIELD_DP32(res, GPC_ISS, CM, cm); + res =3D FIELD_DP32(res, GPC_ISS, S1PTW, s1ptw); + res =3D FIELD_DP32(res, GPC_ISS, WnR, wnr); + res =3D FIELD_DP32(res, GPC_ISS, xFSC, fsc); + + return res; } =20 static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int = fsc) --=20 2.47.3