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Fri, 20 Mar 2026 00:46:08 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Pierrick Bouvier , Richard Henderson , Anton Johansson , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [PATCH 1/2] target/mips: Inline cpu_ld{uw, l}_code() calls in set_badinstr_registers Date: Fri, 20 Mar 2026 08:45:54 +0100 Message-ID: <20260320074555.33974-2-philmd@linaro.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260320074555.33974-1-philmd@linaro.org> References: <20260320074555.33974-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1773992800978154100 In preparation of removing the cpu_lduw_code() and cpu_ldl_code() wrappers, inline them. Directly replace MO_TE by mo_endian_env(env). Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/tcg/system/tlb_helper.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/t= lb_helper.c index 566924b079e..b989c7e5bd5 100644 --- a/target/mips/tcg/system/tlb_helper.c +++ b/target/mips/tcg/system/tlb_helper.c @@ -999,16 +999,22 @@ static void set_hflags_for_handler(CPUMIPSState *env) =20 static inline void set_badinstr_registers(CPUMIPSState *env) { + CPUState *cs =3D env_cpu(env); + MemOpIdx oi; + if (env->insn_flags & ISA_NANOMIPS32) { if (env->CP0_Config3 & (1 << CP0C3_BI)) { - uint32_t instr =3D (cpu_lduw_code(env, env->active_tc.PC)) << = 16; + uint32_t instr; + + oi =3D make_memop_idx(mo_endian_env(env) | MO_UW, cpu_mmu_inde= x(cs, true)); + instr =3D cpu_ldw_code_mmu(env, env->active_tc.PC, oi, 0) << = 16; if ((instr & 0x10000000) =3D=3D 0) { - instr |=3D cpu_lduw_code(env, env->active_tc.PC + 2); + instr |=3D cpu_ldw_code_mmu(env, env->active_tc.PC + 2, oi= , 0); } env->CP0_BadInstr =3D instr; =20 if ((instr & 0xFC000000) =3D=3D 0x60000000) { - instr =3D cpu_lduw_code(env, env->active_tc.PC + 4) << 16; + instr =3D cpu_ldw_code_mmu(env, env->active_tc.PC + 4, oi= , 0) << 16; env->CP0_BadInstrX =3D instr; } } @@ -1019,12 +1025,14 @@ static inline void set_badinstr_registers(CPUMIPSSt= ate *env) /* TODO: add BadInstr support for microMIPS */ return; } + + oi =3D make_memop_idx(mo_endian_env(env) | MO_UL, cpu_mmu_index(cs, tr= ue)); if (env->CP0_Config3 & (1 << CP0C3_BI)) { - env->CP0_BadInstr =3D cpu_ldl_code(env, env->active_tc.PC); + env->CP0_BadInstr =3D cpu_ldl_code_mmu(env, env->active_tc.PC, oi,= 0); } if ((env->CP0_Config3 & (1 << CP0C3_BP)) && (env->hflags & MIPS_HFLAG_BMASK)) { - env->CP0_BadInstrP =3D cpu_ldl_code(env, env->active_tc.PC - 4); + env->CP0_BadInstrP =3D cpu_ldl_code_mmu(env, env->active_tc.PC - 4= , oi, 0); } } =20 --=20 2.53.0 From nobody Sun Mar 22 14:11:54 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1773992806; cv=none; d=zohomail.com; s=zohoarc; b=X1CUKwNughCsEFP6XdMkFIXjCmstqHjG4MvF9dnYe9h1zUHvnhgH2kXGaUnA1xS6Uwo9nUI1mMmd+IbvE9cwppIlrcZgqN+qNohqwX850eu6h6vyvth/zi/uQMkA34FG80ds+8c/hp/cXo8/DGS2cfKyhXHAqEj8EQ4O5L0i4R4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1773992806; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=RIn7Jp1y3jvxH/+6QsHu7bop64Gst3prUJHkIzzryuo=; b=RRPVRqT2+XqKvuoczpJ8ZUziybk23qd2DxpqONx0XHiaBkvYKlx+aqv/F4nxT5nfvTwUxKHHDACTj7d4Hv3PUcM/T4MnomxF6ushJZ3vm6IFzK+H4iC6zT5sSrgcbRbPSqas5gUCYZgL+ULT+9VoczQOvFlnguS47KCQ5t1Xp1w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1773992806770356.92190217539644; Fri, 20 Mar 2026 00:46:46 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w3UYu-0003QK-Gk; Fri, 20 Mar 2026 03:46:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w3UYl-0003Hq-Vs for qemu-devel@nongnu.org; Fri, 20 Mar 2026 03:46:20 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1w3UYj-0003Lw-SK for qemu-devel@nongnu.org; Fri, 20 Mar 2026 03:46:19 -0400 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-48628ce9ab5so3635095e9.2 for ; Fri, 20 Mar 2026 00:46:16 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Update the documentation. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- docs/devel/loads-stores.rst | 21 +++++++++------------ include/accel/tcg/cpu-ldst.h | 33 ++------------------------------- 2 files changed, 11 insertions(+), 43 deletions(-) diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index 57892e814cd..c719241a7f5 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -235,16 +235,13 @@ Regexes for git grep: - ``\`` - ``\`` =20 -``cpu_ld*_code`` -~~~~~~~~~~~~~~~~ +``cpu_ld*_code_mmu`` +~~~~~~~~~~~~~~~~~~~~ =20 -These functions perform a read for instruction execution. The ``mmuidx`` -parameter is taken from the current mode of the guest CPU, as determined -by ``cpu_mmu_index(env, true)``. The ``retaddr`` parameter is 0, and -thus does not unwind guest CPU state, because CPU state is always -synchronized while translating instructions. Any guest CPU exception -that is raised will indicate an instruction execution fault rather than -a data read fault. +These functions work like the ``cpu_{ld,st}*_mmu`` functions +except that they perform a read for instruction execution. +Any guest CPU exception that is raised will indicate an instruction +execution fault rather than a data read fault. =20 In general these functions should not be used directly during translation. There are wrapper functions that are to be used which also take care of @@ -252,7 +249,7 @@ plugins for tracing. =20 Function names follow the pattern: =20 -load: ``cpu_ld{sign}{size}_code(env, ptr)`` +load: ``cpu_ld{sign}{size}_code_mmu(env, addr, oi, retaddr)`` =20 ``sign`` - (empty) : for 32 or 64 bit sizes @@ -266,12 +263,12 @@ load: ``cpu_ld{sign}{size}_code(env, ptr)`` - ``q`` : 64 bits =20 Regexes for git grep: - - ``\`` + - ``\`` =20 ``translator_ld*`` ~~~~~~~~~~~~~~~~~~ =20 -These functions are a wrapper for ``cpu_ld*_code`` which also perform +These functions are a wrapper for ``cpu_ld*_code_mmu`` which also perform any actions required by any tracing plugins. They are only to be called during the translator callback ``translate_insn``. =20 diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h index a5711bc15a6..084d906a56b 100644 --- a/include/accel/tcg/cpu-ldst.h +++ b/include/accel/tcg/cpu-ldst.h @@ -51,10 +51,9 @@ * _be: for forced big endian * _le: for forced little endian * - * mmusuffix is one of the generic suffixes "data" or "code", or "mmuidx". + * mmusuffix is one of the generic suffixes "data" or "mmuidx". * The "mmuidx" suffix carries an extra mmu_idx argument that specifies - * the index to use; the "data" and "code" suffixes take the index from - * cpu_mmu_index(). + * the index to use; the "data" suffix take the index from cpu_mmu_index(). * * The "mmu" suffix carries the full MemOpIdx, with both mmu_idx and the * MemOp including alignment requirements. The alignment will be enforced. @@ -474,34 +473,6 @@ cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint6= 4_t val) # define cpu_stl_mmuidx_ra cpu_stl_le_mmuidx_ra # define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra #endif - -static inline uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_UB, cpu_mmu_index(cs, true)); - return cpu_ldb_code_mmu(env, addr, oi, 0); -} - -static inline uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true)); - return cpu_ldw_code_mmu(env, addr, oi, 0); -} - -static inline uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true)); - return cpu_ldl_code_mmu(env, addr, oi, 0); -} - -static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true)); - return cpu_ldq_code_mmu(env, addr, oi, 0); -} #endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */ =20 #endif /* ACCEL_TCG_CPU_LDST_H */ --=20 2.53.0