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Tsirkin" , Ani Sinha , Igor Mammedov , Richard Henderson , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 3/5] hw/tpm: Remove CRBState::ppi_enabled field Date: Tue, 17 Mar 2026 13:02:39 +0100 Message-ID: <20260317120241.16320-4-philmd@linaro.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260317120241.16320-1-philmd@linaro.org> References: <20260317120241.16320-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1773749092225154100 The CRBState::ppi_enabled boolean was only set in the hw_compat_3_1[] array, via the 'ppi=3Dfalse' property. We removed all machines using that array, and the array itself in commit a861ffef237 ("hw/core/machine: Remove the hw_compat_3_1[] array"). We can safely remove the now unused property. Since CRB devices always use PPI, simplify removing the CRBState::ppi_enabled field. Set the generic TPMIfClass::ppi_enabled so ACPI subsystem can keep checking its availability. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Stefan Berger --- hw/tpm/tpm_crb.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 8723536f931..02701ab9480 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -43,7 +43,6 @@ struct CRBState { =20 size_t be_buffer_size; =20 - bool ppi_enabled; TPMPPI ppi; }; typedef struct CRBState CRBState; @@ -228,16 +227,13 @@ static const VMStateDescription vmstate_tpm_crb =3D { =20 static const Property tpm_crb_properties[] =3D { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), - DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true), }; =20 static void tpm_crb_reset(void *dev) { CRBState *s =3D CRB(dev); =20 - if (s->ppi_enabled) { - tpm_ppi_reset(&s->ppi); - } + tpm_ppi_reset(&s->ppi); tpm_backend_reset(s->tpmbe); =20 memset(s->regs, 0, sizeof(s->regs)); @@ -303,10 +299,8 @@ static void tpm_crb_realize(DeviceState *dev, Error **= errp) memory_region_add_subregion(get_system_memory(), TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem); =20 - if (s->ppi_enabled) { - tpm_ppi_init(&s->ppi, get_system_memory(), - TPM_PPI_ADDR_BASE, OBJECT(s)); - } + tpm_ppi_init(&s->ppi, get_system_memory(), + TPM_PPI_ADDR_BASE, OBJECT(s)); =20 if (xen_enabled()) { tpm_crb_reset(dev); @@ -325,6 +319,7 @@ static void tpm_crb_class_init(ObjectClass *klass, cons= t void *data) dc->vmsd =3D &vmstate_tpm_crb; dc->user_creatable =3D true; tc->model =3D TPM_MODEL_TPM_CRB; + tc->ppi_enabled =3D true; tc->get_version =3D tpm_crb_get_version; tc->request_completed =3D tpm_crb_request_completed; =20 --=20 2.53.0