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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.66.161; envelope-from=mohamed@unpredictable.fr; helo=outbound.pv.icloud.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1773666723202158500 Content-Type: text/plain; charset="utf-8" Save states are incompatible between kernel-irqchip=3Don and off on HVF due= to opaque vGIC state. Signed-off-by: Mohamed Mediouni --- accel/hvf/hvf-all.c | 11 +++++++++++ hw/arm/virt.c | 22 +++++++++++++++++++++- include/hw/arm/virt.h | 2 ++ include/hw/core/boards.h | 1 + include/system/hvf_int.h | 1 + 5 files changed, 36 insertions(+), 1 deletion(-) diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c index 48c653630f..4e5a8c58a8 100644 --- a/accel/hvf/hvf-all.c +++ b/accel/hvf/hvf-all.c @@ -25,6 +25,7 @@ bool hvf_allowed; bool hvf_kernel_irqchip; bool hvf_nested_virt; +bool hvf_kernel_irqchip_override; =20 void hvf_nested_virt_enable(bool nested_virt) { hvf_nested_virt =3D nested_virt; @@ -203,6 +204,13 @@ static int hvf_accel_init(AccelState *as, MachineState= *ms) } } =20 + if (mc->get_kernel_irqchip_default) { + bool kernel_irqchip_default =3D mc->get_kernel_irqchip_default(ms); + if (!hvf_kernel_irqchip_override) { + hvf_kernel_irqchip =3D kernel_irqchip_default; + } + } + ret =3D hvf_arch_vm_create(ms, (uint32_t)pa_range); if (ret =3D=3D HV_DENIED) { error_report("Could not access HVF. Is the executable signed" @@ -229,6 +237,8 @@ static void hvf_set_kernel_irqchip(Object *obj, Visitor= *v, Error **errp) { OnOffSplit mode; + + hvf_kernel_irqchip_override =3D true; if (!visit_type_OnOffSplit(v, name, &mode, errp)) { return; } @@ -268,6 +278,7 @@ static void hvf_accel_class_init(ObjectClass *oc, const= void *data) ac->init_machine =3D hvf_accel_init; ac->allowed =3D &hvf_allowed; ac->gdbstub_supported_sstep_flags =3D hvf_gdbstub_sstep_flags; + hvf_kernel_irqchip_override =3D false; hvf_kernel_irqchip =3D false; object_class_property_add(oc, "kernel-irqchip", "on|off|split", NULL, hvf_set_kernel_irqchip, diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 391ec722c0..ad82a7356e 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3443,6 +3443,16 @@ static int virt_get_physical_address_range(MachineSt= ate *ms, return requested_ipa_size; } =20 +static bool get_kernel_irqchip_default(const MachineState *ms) { + VirtMachineState *vms =3D VIRT_MACHINE(ms); + VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); + if (hvf_allowed) { + return !vmc->hvf_no_kernel_irqchip_default; + } else { + return true; + } +} + static const char *virt_get_default_cpu_type(const MachineState *ms) { return tcg_enabled() ? ARM_CPU_TYPE_NAME("cortex-a15") @@ -3509,6 +3519,7 @@ static void virt_machine_class_init(ObjectClass *oc, = const void *data) mc->get_default_cpu_node_id =3D virt_get_default_cpu_node_id; mc->kvm_type =3D virt_kvm_type; mc->get_physical_address_range =3D virt_get_physical_address_range; + mc->get_kernel_irqchip_default =3D get_kernel_irqchip_default; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler =3D virt_machine_get_hotplug_handler; hc->pre_plug =3D virt_machine_device_pre_plug_cb; @@ -3740,10 +3751,19 @@ static void machvirt_machine_init(void) } type_init(machvirt_machine_init); =20 +static void virt_machine_11_1_options(MachineClass *mc) +{ +} +DEFINE_VIRT_MACHINE_AS_LATEST(11, 1) + static void virt_machine_11_0_options(MachineClass *mc) { + VirtMachineClass *vmc =3D VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_11_1_options(mc); + + vmc->hvf_no_kernel_irqchip_default =3D true; } -DEFINE_VIRT_MACHINE_AS_LATEST(11, 0) +DEFINE_VIRT_MACHINE(11, 0) =20 static void virt_machine_10_2_options(MachineClass *mc) { diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index dba8ac7f2f..d2575e14a0 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -135,6 +135,8 @@ struct VirtMachineClass { bool no_tcg_lpa2; bool no_ns_el2_virt_timer_irq; bool no_nested_smmu; + /* HVF specific: support for kernel-irqchip=3Don introduced in QEMU 11= .1 */ + bool hvf_no_kernel_irqchip_default; }; =20 struct VirtMachineState { diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h index f85f31bd90..ad896ed0b7 100644 --- a/include/hw/core/boards.h +++ b/include/hw/core/boards.h @@ -279,6 +279,7 @@ struct MachineClass { int (*kvm_type)(MachineState *machine, const char *arg); int (*get_physical_address_range)(MachineState *machine, int default_ipa_size, int max_ipa_size); + bool (*get_kernel_irqchip_default) (const MachineState *machine); =20 BlockInterfaceType block_default_type; int units_per_default_bus; diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index 2621164cb2..ad7d375109 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -112,4 +112,5 @@ bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp); uint32_t hvf_arch_get_default_ipa_bit_size(void); uint32_t hvf_arch_get_max_ipa_bit_size(void); =20 +extern bool hvf_kernel_irqchip_override; #endif --=20 2.50.1 (Apple Git-155)