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bh=uXVriGQlrCjHX2dqzuaTRY7bL/1pesiQkAJDd6l5txc=; b=LMcB1rDbZMB/HneEJxT6wannhOYFtzaxRUM997J01Gx/ZlN3tdv+DdxpCKGty8JzVt+ENR6hhlcMCyPUCGo9B1cXerwVH2FaVL4NOTjW2oCpz8zaL+w9h8pCP63kt0qAoh9KAK4J6QTWgj5lV9E5oFYXWcPAlfKPNagdKuMdxVNpEbnzL3tX27LRPuEeYr8v8r0onfkMPOny8ZR8hxEt96YNkfHMjlyJSPBcmxVkPA+PCeGz24/a4Q91y+umb2kSUeXe0A8jQ31IGo+XVVOX8Cz4DxqJrFmwh9LDnjBWGgXEUAB3AT34w95duen32BgOznlOShbg2/SYkvKzi0QyNg== From: Jamin Lin To: =?iso-8859-1?Q?C=E9dric_Le_Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , Joel Stanley , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: Jamin Lin , Troy Lee , Kane Chen , "flwu@google.com" , "nabihestefan@google.com" Subject: [PATCH v1 03/13] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit Thread-Topic: [PATCH v1 03/13] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit Thread-Index: AQHcsShaZnUucCOzr0mk+y9iYEFGBQ== Date: Wed, 11 Mar 2026 07:26:19 +0000 Message-ID: <20260311072614.1095587-4-jamin_lin@aspeedtech.com> References: <20260311072614.1095587-1-jamin_lin@aspeedtech.com> In-Reply-To: <20260311072614.1095587-1-jamin_lin@aspeedtech.com> Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=aspeedtech.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a01:111:f403:c405::7; envelope-from=jamin_lin@aspeedtech.com; helo=TYDPR03CU002.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @aspeedtech.com) X-ZM-MESSAGEID: 1773214078837158500 Content-Type: text/plain; charset="utf-8" Change internal EHCI descriptor addresses from uint32_t to uint64_t. The following fields are updated: - EHCIPacket::qtdaddr - EHCIQueue::{qhaddr, qtdaddr} - EHCIState::{a_fetch_addr, p_fetch_addr} Update get_dwords() and put_dwords() to take 64-bit addresses and propagate the type change through the descriptor traversal paths. Adjust NLPTR_GET() to operate on 64-bit values: #define NLPTR_GET(x) ((x) & ~(uint64_t)0x1f) so that link pointer masking works correctly when descriptor addresses exceed 32-bit space. The previous mask (0xffffffe0) implicitly truncated addresses to 32 bits. This patch does not change the on-wire descriptor layout yet. It only removes the internal 32-bit address limit and prepares for later patches that will add full 64-bit QH/qTD/iTD/siTD support. Since the type of fetch_addr changes from 32-bit to 64-bit, bump the VMState version. No functional change. Signed-off-by: Jamin Lin --- hw/usb/hcd-ehci.h | 10 +++---- hw/usb/hcd-ehci.c | 67 +++++++++++++++++++++++++---------------------- 2 files changed, 41 insertions(+), 36 deletions(-) diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index ed44935302..df87f8145f 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -226,7 +226,7 @@ struct EHCIPacket { QTAILQ_ENTRY(EHCIPacket) next; =20 EHCIqtd qtd; /* copy of current QTD (being worked on) */ - uint32_t qtdaddr; /* address QTD read from */ + uint64_t qtdaddr; /* address QTD read from */ =20 USBPacket packet; QEMUSGList sgl; @@ -247,8 +247,8 @@ struct EHCIQueue { * when guest removes an entry (doorbell, handshake sequence) */ EHCIqh qh; /* copy of current QH (being worked on) */ - uint32_t qhaddr; /* address QH read from */ - uint32_t qtdaddr; /* address QTD read from */ + uint64_t qhaddr; /* address QH read from */ + uint64_t qtdaddr; /* address QTD read from */ int last_pid; /* pid of last packet executed */ USBDevice *dev; QTAILQ_HEAD(, EHCIPacket) packets; @@ -312,8 +312,8 @@ struct EHCIState { EHCIQueueHead pqueues; =20 /* which address to look at next */ - uint32_t a_fetch_addr; - uint32_t p_fetch_addr; + uint64_t a_fetch_addr; + uint64_t p_fetch_addr; =20 USBPacket ipacket; QEMUSGList isgl; diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index e2ff0f5874..87c3991313 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -71,7 +71,7 @@ typedef enum { } EHCI_STATES; =20 /* macros for accessing fields within next link pointer entry */ -#define NLPTR_GET(x) ((x) & 0xffffffe0) +#define NLPTR_GET(x) ((x) & ~(uint64_t)0x1f) #define NLPTR_TYPE_GET(x) (((x) >> 1) & 3) #define NLPTR_TBIT(x) ((x) & 1) /* 1=3Dinvalid, 0=3Dvalid */ =20 @@ -286,7 +286,7 @@ static int ehci_get_state(EHCIState *s, int async) return async ? s->astate : s->pstate; } =20 -static void ehci_set_fetch_addr(EHCIState *s, int async, uint32_t addr) +static void ehci_set_fetch_addr(EHCIState *s, int async, uint64_t addr) { if (async) { s->a_fetch_addr =3D addr; @@ -295,7 +295,7 @@ static void ehci_set_fetch_addr(EHCIState *s, int async= , uint32_t addr) } } =20 -static int ehci_get_fetch_addr(EHCIState *s, int async) +static uint64_t ehci_get_fetch_addr(EHCIState *s, int async) { return async ? s->a_fetch_addr : s->p_fetch_addr; } @@ -372,7 +372,7 @@ static inline bool ehci_periodic_enabled(EHCIState *s) } =20 /* Get an array of dwords from main memory */ -static inline int get_dwords(EHCIState *ehci, uint32_t addr, +static inline int get_dwords(EHCIState *ehci, uint64_t addr, uint32_t *buf, int num) { int i; @@ -394,7 +394,7 @@ static inline int get_dwords(EHCIState *ehci, uint32_t = addr, } =20 /* Put an array of dwords in to main memory */ -static inline int put_dwords(EHCIState *ehci, uint32_t addr, +static inline int put_dwords(EHCIState *ehci, uint64_t addr, uint32_t *buf, int num) { int i; @@ -548,7 +548,7 @@ static void ehci_free_packet(EHCIPacket *p) =20 /* queue management */ =20 -static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, uint32_t addr, int asy= nc) +static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, uint64_t addr, int asy= nc) { EHCIQueueHead *head =3D async ? &ehci->aqueues : &ehci->pqueues; EHCIQueue *q; @@ -621,7 +621,7 @@ static void ehci_free_queue(EHCIQueue *q, const char *w= arn) g_free(q); } =20 -static EHCIQueue *ehci_find_queue_by_qh(EHCIState *ehci, uint32_t addr, +static EHCIQueue *ehci_find_queue_by_qh(EHCIState *ehci, uint64_t addr, int async) { EHCIQueueHead *head =3D async ? &ehci->aqueues : &ehci->pqueues; @@ -1133,7 +1133,7 @@ static void ehci_flush_qh(EHCIQueue *q) { uint32_t *qh =3D (uint32_t *) &q->qh; uint32_t dwords =3D sizeof(EHCIqh) >> 2; - uint32_t addr =3D NLPTR_GET(q->qhaddr); + uint64_t addr =3D NLPTR_GET(q->qhaddr); =20 put_dwords(q->ehci, addr + 3 * sizeof(uint32_t), qh + 3, dwords - 3); } @@ -1279,8 +1279,8 @@ static void ehci_execute_complete(EHCIQueue *q) assert(p->async =3D=3D EHCI_ASYNC_INITIALIZED || p->async =3D=3D EHCI_ASYNC_FINISHED); =20 - DPRINTF("execute_complete: qhaddr 0x%x, next 0x%x, qtdaddr 0x%x, " - "status %d, actual_length %d\n", + DPRINTF("execute_complete: qhaddr 0x%" PRIx64 ", next 0x%x, " + "qtdaddr 0x%" PRIx64 ", status %d, actual_length %d\n", q->qhaddr, q->qh.next, q->qtdaddr, p->packet.status, p->packet.actual_length); =20 @@ -1389,9 +1389,10 @@ static int ehci_execute(EHCIPacket *p, const char *a= ction) =20 trace_usb_ehci_packet_action(p->queue, p, action); usb_handle_packet(p->queue->dev, &p->packet); - DPRINTF("submit: qh 0x%x next 0x%x qtd 0x%x pid 0x%x len %zd endp 0x%x= " - "status %d actual_length %d\n", p->queue->qhaddr, p->qtd.next, - p->qtdaddr, p->pid, p->packet.iov.size, endp, p->packet.status, + DPRINTF("submit: qh 0x%" PRIx64 " next 0x%x qtd 0x%" PRIx64 + " pid 0x%x len %zd endp 0x%x status %d actual_length %d\n", + p->queue->qhaddr, p->qtd.next, p->qtdaddr, p->pid, + p->packet.iov.size, endp, p->packet.status, p->packet.actual_length); =20 if (p->packet.actual_length > BUFF_SIZE) { @@ -1405,12 +1406,13 @@ static int ehci_execute(EHCIPacket *p, const char *= action) /* 4.7.2 */ static int ehci_process_itd(EHCIState *ehci, EHCIitd *itd, - uint32_t addr) + uint64_t addr) { USBDevice *dev; USBEndpoint *ep; uint32_t i, len, pid, dir, devaddr, endp; - uint32_t pg, off, ptr1, ptr2, max, mult; + uint32_t pg, off, max, mult; + uint64_t ptr1, ptr2; =20 ehci->periodic_sched_active =3D PERIODIC_ACTIVE; =20 @@ -1525,7 +1527,7 @@ static int ehci_state_waitlisthead(EHCIState *ehci, = int async) EHCIqh qh; int i =3D 0; int again =3D 0; - uint32_t entry =3D ehci->asynclistaddr; + uint64_t entry =3D ehci->asynclistaddr; =20 /* set reclamation flag at start event (4.8.6) */ if (async) { @@ -1575,7 +1577,7 @@ out: static int ehci_state_fetchentry(EHCIState *ehci, int async) { int again =3D 0; - uint32_t entry =3D ehci_get_fetch_addr(ehci, async); + uint64_t entry =3D ehci_get_fetch_addr(ehci, async); =20 if (NLPTR_TBIT(entry)) { ehci_set_state(ehci, async, EST_ACTIVE); @@ -1606,7 +1608,7 @@ static int ehci_state_fetchentry(EHCIState *ehci, int= async) =20 default: /* TODO: handle FSTN type */ - fprintf(stderr, "FETCHENTRY: entry at %X is of type %u " + fprintf(stderr, "FETCHENTRY: entry at %" PRIx64 "is of type %" PRI= u64 "which is not supported yet\n", entry, NLPTR_TYPE_GET(entr= y)); return -1; } @@ -1617,7 +1619,7 @@ out: =20 static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci, int async) { - uint32_t entry; + uint64_t entry; EHCIQueue *q; EHCIqh qh; =20 @@ -1669,8 +1671,9 @@ static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci,= int async) if (ehci->usbsts & USBSTS_REC) { ehci_clear_usbsts(ehci, USBSTS_REC); } else { - DPRINTF("FETCHQH: QH 0x%08x. H-bit set, reclamation status re= set" - " - done processing\n", q->qhaddr); + DPRINTF("FETCHQH: QH 0x%" PRIx64 + ". H-bit set, reclamation status reset - " + "done processing\n", q->qhaddr); ehci_set_state(ehci, async, EST_ACTIVE); q =3D NULL; goto out; @@ -1679,7 +1682,8 @@ static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci,= int async) =20 #if EHCI_DEBUG if (q->qhaddr !=3D q->qh.next) { - DPRINTF("FETCHQH: QH 0x%08x (h %x halt %x active %x) next 0x%08x\= n", + DPRINTF("FETCHQH: QH 0x%" PRIx64 + " (h %x halt %x active %x) next 0x%08x\n", q->qhaddr, q->qh.epchar & QH_EPCHAR_H, q->qh.token & QTD_TOKEN_HALT, @@ -1708,7 +1712,7 @@ out: =20 static int ehci_state_fetchitd(EHCIState *ehci, int async) { - uint32_t entry; + uint64_t entry; EHCIitd itd; =20 assert(!async); @@ -1734,7 +1738,7 @@ static int ehci_state_fetchitd(EHCIState *ehci, int a= sync) =20 static int ehci_state_fetchsitd(EHCIState *ehci, int async) { - uint32_t entry; + uint64_t entry; EHCIsitd sitd; =20 assert(!async); @@ -1804,7 +1808,7 @@ static int ehci_state_fetchqtd(EHCIQueue *q) EHCIqtd qtd; EHCIPacket *p; int again =3D 1; - uint32_t addr; + uint64_t addr; =20 addr =3D NLPTR_GET(q->qtdaddr); if (get_dwords(q->ehci, addr + 8, &qtd.token, 1) < 0) { @@ -1887,7 +1891,7 @@ static int ehci_fill_queue(EHCIPacket *p) USBEndpoint *ep =3D p->packet.ep; EHCIQueue *q =3D p->queue; EHCIqtd qtd =3D p->qtd; - uint32_t qtdaddr; + uint64_t qtdaddr; =20 for (;;) { if (NLPTR_TBIT(qtd.next) !=3D 0) { @@ -2010,7 +2014,8 @@ static int ehci_state_executing(EHCIQueue *q) static int ehci_state_writeback(EHCIQueue *q) { EHCIPacket *p =3D QTAILQ_FIRST(&q->packets); - uint32_t *qtd, addr; + uint32_t *qtd; + uint64_t addr; int again =3D 0; =20 /* Write back the QTD from the QH area */ @@ -2484,8 +2489,8 @@ static void usb_ehci_vm_state_change(void *opaque, bo= ol running, RunState state) =20 const VMStateDescription vmstate_ehci =3D { .name =3D "ehci-core", - .version_id =3D 2, - .minimum_version_id =3D 1, + .version_id =3D 3, + .minimum_version_id =3D 2, .pre_save =3D usb_ehci_pre_save, .post_load =3D usb_ehci_post_load, .fields =3D (const VMStateField[]) { @@ -2513,8 +2518,8 @@ const VMStateDescription vmstate_ehci =3D { /* schedule state */ VMSTATE_UINT32(astate, EHCIState), VMSTATE_UINT32(pstate, EHCIState), - VMSTATE_UINT32(a_fetch_addr, EHCIState), - VMSTATE_UINT32(p_fetch_addr, EHCIState), + VMSTATE_UINT64(a_fetch_addr, EHCIState), + VMSTATE_UINT64(p_fetch_addr, EHCIState), VMSTATE_END_OF_LIST() } }; --=20 2.43.0