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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=136.143.188.54; envelope-from=anirudh@anirudhrb.com; helo=sender4-of-o54.zoho.com X-Spam_score_int: -3 X-Spam_score: -0.4 X-Spam_bar: / X-Spam_report: (-0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity anirudh@anirudhrb.com) X-ZM-MESSAGEID: 1773242959382154101 Add the arm64 specific fields to the hv_interrupt_control struct and adjust the existing usage accordingly. mshv_request_interrupt is only needed only for x86 so compile it out entirely for arm64. Signed-off-by: Anirudh Rayabharam (Microsoft) --- accel/mshv/irq.c | 2 ++ include/hw/hyperv/hvgdk_mini.h | 25 +++++++++++++++++++++++++ include/system/mshv.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/accel/mshv/irq.c b/accel/mshv/irq.c index 3c238c33c3..a391d7db86 100644 --- a/accel/mshv/irq.c +++ b/accel/mshv/irq.c @@ -310,6 +310,7 @@ int mshv_irqchip_update_msi_route(int virq, MSIMessage = msg, PCIDevice *dev) return 0; } =20 +#if defined(__x86_64__) int mshv_request_interrupt(MshvState *mshv_state, uint32_t interrupt_type,= uint32_t vector, uint32_t vp_index, bool logical_dest_mode, bool level_triggered) @@ -346,6 +347,7 @@ int mshv_request_interrupt(MshvState *mshv_state, uint3= 2_t interrupt_type, uint3 } return 0; } +#endif =20 void mshv_irqchip_commit_routes(void) { diff --git a/include/hw/hyperv/hvgdk_mini.h b/include/hw/hyperv/hvgdk_mini.h index 84b3c6af5f..eb766734d6 100644 --- a/include/hw/hyperv/hvgdk_mini.h +++ b/include/hw/hyperv/hvgdk_mini.h @@ -506,13 +506,38 @@ typedef struct hv_input_set_vp_registers { struct hv_register_assoc elements[]; } hv_input_set_vp_registers; =20 +enum hv_interrupt_type { +#if defined(__x86_64__) + HV_X64_INTERRUPT_TYPE_FIXED =3D 0x0000, + HV_X64_INTERRUPT_TYPE_LOWESTPRIORITY =3D 0x0001, + HV_X64_INTERRUPT_TYPE_SMI =3D 0x0002, + HV_X64_INTERRUPT_TYPE_REMOTEREAD =3D 0x0003, + HV_X64_INTERRUPT_TYPE_NMI =3D 0x0004, + HV_X64_INTERRUPT_TYPE_INIT =3D 0x0005, + HV_X64_INTERRUPT_TYPE_SIPI =3D 0x0006, + HV_X64_INTERRUPT_TYPE_EXTINT =3D 0x0007, + HV_X64_INTERRUPT_TYPE_LOCALINT0 =3D 0x0008, + HV_X64_INTERRUPT_TYPE_LOCALINT1 =3D 0x0009, + HV_X64_INTERRUPT_TYPE_MAXIMUM =3D 0x000A, +#elif defined(__aarch64__) + HV_ARM64_INTERRUPT_TYPE_FIXED =3D 0x0000, + HV_ARM64_INTERRUPT_TYPE_MAXIMUM =3D 0x0008, +#endif +}; + union hv_interrupt_control { uint64_t as_uint64; struct { uint32_t interrupt_type; /* enum hv_interrupt type */ +#if defined(__x86_64__) uint32_t level_triggered:1; uint32_t logical_dest_mode:1; uint32_t rsvd:30; +#elif defined(__aarch64__) + uint32_t rsvd1:2; + uint32_t asserted:1; + uint32_t rsvd2:29; +#endif }; }; =20 diff --git a/include/system/mshv.h b/include/system/mshv.h index 75286baf16..0db18fcee9 100644 --- a/include/system/mshv.h +++ b/include/system/mshv.h @@ -47,10 +47,12 @@ extern bool mshv_allowed; typedef struct MshvState MshvState; extern MshvState *mshv_state; =20 +#if defined(__x86_64__) /* interrupt */ int mshv_request_interrupt(MshvState *mshv_state, uint32_t interrupt_type,= uint32_t vector, uint32_t vp_index, bool logical_destination_mod= e, bool level_triggered); +#endif =20 int mshv_irqchip_add_msi_route(int vector, PCIDevice *dev); int mshv_irqchip_update_msi_route(int virq, MSIMessage msg, PCIDevice *dev= ); --=20 2.43.0