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a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1773122201; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8Yktb1u31mYLs3o8YNegAd+y8GFLdK0i/ysiRwsBnDw=; b=I5L5b5WTPRuQ4pr9yNRjH/AHYKj7FM1uujC1kXohqcoWQ5gf4zU1+BQf7oIOy+N8UWwtt+ doOAgIAxS8e2L62YJ8QFL1NGgu6A2Hzv2fKaot0KDha9ymW8hw4ptD10B1YDxK7B7hv3BA v1rqb/AFoO6Lv6vB5Hu67SHOoJi3Ngk= X-MC-Unique: GoBdcmQ-MGilJYPueumVYA-1 X-Mimecast-MFC-AGG-ID: GoBdcmQ-MGilJYPueumVYA_1773122198 From: Thomas Huth To: Peter Maydell Cc: qemu-devel@nongnu.org, Eric Farman , Jared Rossi , Matthew Rosato , Farhan Ali Subject: [PULL 16/25] pc-bios/s390-ccw: Introduce CLP Architecture Date: Tue, 10 Mar 2026 06:55:21 +0100 Message-ID: <20260310055530.8893-17-thuth@redhat.com> In-Reply-To: <20260310055530.8893-1-thuth@redhat.com> References: <20260310055530.8893-1-thuth@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" From: Jared Rossi Call Logical Processor (CLP) Architecture is used for managing PCI function= s on s390x. Define and include the structures and routines needed to interact wi= th PCI devices during IPL. Reviewed-by: Eric Farman Signed-off-by: Jared Rossi Reviewed-by: Matthew Rosato Reviewed-by: Farhan Ali Message-ID: <20260309003601.242634-9-jrossi@linux.ibm.com> [thuth: fix a typo in one of the comments] Signed-off-by: Thomas Huth --- pc-bios/s390-ccw/clp.h | 24 ++++++++++ pc-bios/s390-ccw/clp.c | 99 +++++++++++++++++++++++++++++++++++++++ pc-bios/s390-ccw/Makefile | 2 +- 3 files changed, 124 insertions(+), 1 deletion(-) create mode 100644 pc-bios/s390-ccw/clp.h create mode 100644 pc-bios/s390-ccw/clp.c diff --git a/pc-bios/s390-ccw/clp.h b/pc-bios/s390-ccw/clp.h new file mode 100644 index 00000000000..1ac2f8c177f --- /dev/null +++ b/pc-bios/s390-ccw/clp.h @@ -0,0 +1,24 @@ +/* + * Call Logical Processor (CLP) architecture definitions + * + * Copyright 2025 IBM Corp. + * Author(s): Jared Rossi + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef CLP_H +#define CLP_H + +#ifndef QEMU_PACKED +#define QEMU_PACKED __attribute__((packed)) +#endif + +#include +#include + +int clp_pci(void *data); +int find_pci_function(uint32_t fid, ClpFhListEntry *entry); +int enable_pci_function(uint32_t *fhandle); + +#endif diff --git a/pc-bios/s390-ccw/clp.c b/pc-bios/s390-ccw/clp.c new file mode 100644 index 00000000000..ca9565d8ded --- /dev/null +++ b/pc-bios/s390-ccw/clp.c @@ -0,0 +1,99 @@ +/* + * Call Logical Processor (CLP) architecture + * + * Copyright 2025 IBM Corp. + * Author(s): Jared Rossi + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "clp.h" +#include +#include + +int clp_pci(void *data) +{ + struct { uint8_t _[CLP_BLK_SIZE]; } *req =3D data; + int cc =3D 3; + + asm volatile ( + " .insn rrf,0xb9a00000,0,%[req],0,2\n" + " ipm %[cc]\n" + " srl %[cc],28\n" + : [cc] "+d" (cc), "+m" (*req) + : [req] "a" (req) + : "cc"); + if (cc) { + printf("CLP returned with non-zero condition code %d\n", cc); + } + return cc; +} + +/* + * Get the PCI function entry for a given function ID + * Return 0 on success, 1 if the FID is not found, or a negative RC on err= or + */ +int find_pci_function(uint32_t fid, ClpFhListEntry *entry) +{ + int count =3D 0; + int limit =3D PCI_MAX_FUNCTIONS; + ClpReqRspListPci rrb; + + rrb.request.hdr.len =3D sizeof(ClpReqListPci); + rrb.request.hdr.cmd =3D 0x02; + rrb.request.resume_token =3D 0; + rrb.response.hdr.len =3D sizeof(ClpRspListPci); + + do { + if (clp_pci(&rrb) || rrb.response.hdr.rsp !=3D 0x0010) { + puts("Failed to list PCI functions"); + return -1; + } + + /* Resume token set when max entries are returned */ + if (rrb.response.resume_token) { + count =3D CLP_FH_LIST_NR_ENTRIES; + rrb.request.resume_token =3D rrb.response.resume_token; + } else { + count =3D (rrb.response.hdr.len - 32) / sizeof(ClpFhListEntry); + } + + limit -=3D count; + + for (int i =3D 0; i < count; i++) { + if (rrb.response.fh_list[i].fid =3D=3D fid) { + memcpy(entry, &rrb.response.fh_list[i], sizeof(ClpFhListEn= try)); + return 0; + } + } + + } while (rrb.request.resume_token && limit > 0); + + puts("No function entry found for FID!"); + + return 1; +} + +/* + * Enable the PCI function associated with a given handle + * Return 0 on success or a negative RC on error + */ +int enable_pci_function(uint32_t *fhandle) +{ + ClpReqRspSetPci rrb; + + rrb.request.hdr.len =3D sizeof(ClpReqSetPci); + rrb.request.hdr.cmd =3D 0x05; + rrb.request.fh =3D *fhandle; + rrb.request.oc =3D 0; + rrb.request.ndas =3D 1; + rrb.response.hdr.len =3D sizeof(ClpRspSetPci); + + if (clp_pci(&rrb) || rrb.response.hdr.rsp !=3D 0x0010) { + puts("Failed to enable PCI function"); + return -1; + } + + *fhandle =3D rrb.response.fh; + return 0; +} diff --git a/pc-bios/s390-ccw/Makefile b/pc-bios/s390-ccw/Makefile index 259cff09db6..9c29548f849 100644 --- a/pc-bios/s390-ccw/Makefile +++ b/pc-bios/s390-ccw/Makefile @@ -35,7 +35,7 @@ QEMU_DGFLAGS =3D -MMD -MP -MT $@ -MF $(@D)/$(*F).d =20 OBJECTS =3D start.o main.o bootmap.o jump2ipl.o sclp.o menu.o netmain.o \ virtio.o virtio-net.o virtio-scsi.o virtio-blkdev.o cio.o dasd-ipl.o \ - virtio-ccw.o + virtio-ccw.o clp.o =20 SLOF_DIR :=3D $(SRC_PATH)/../../roms/SLOF =20 --=20 2.53.0