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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-1-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=7914; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=KWafmBoA76UrvsYyUnBmR+n2TgtLcqfuwMs5FcJxfIE=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP6YvZ3RLOWRScAnXYmyc0YLY3KOX7k496Byk3Jm+ 949L6Z2dZSyMIhxMciKKbJcPitx1iF3d1fayh/3YeawMoEMYeDiFICJvFrOyDBdSXXWo7+SFZcT +8tqrua3rJaLCzne+DTOnT09+Zb6zSkM//SuKKSqnHT7l74mTu9rvaPyBpcWd1t1nsNzA343zHW MYQAA X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182007416154100 Eliminate trailing whitespaces. Use leading "/*", internal "*", and trailing "*/" for block comments. Signed-off-by: Yodel Eldar Reviewed-by: Richard Henderson --- hw/alpha/typhoon.c | 84 +++++++++++++++++++++++++++++++++-----------------= ---- 1 file changed, 52 insertions(+), 32 deletions(-) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 7722d4fd00..f392772500 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -34,7 +34,7 @@ typedef struct TyphoonWindow { uint64_t wsm; uint64_t tba; } TyphoonWindow; -=20 + typedef struct TyphoonPchip { MemoryRegion region; MemoryRegion reg_iack; @@ -84,8 +84,10 @@ static MemTxResult cchip_read(void *opaque, hwaddr addr, switch (addr) { case 0x0000: /* CSC: Cchip System Configuration Register. */ - /* All sorts of data here; probably the only thing relevant is - PIP<14> Pchip 1 Present =3D 0. */ + /* + * All sorts of data here; probably the only thing relevant is + * PIP<14> Pchip 1 Present =3D 0. + */ break; =20 case 0x0040: @@ -188,7 +190,7 @@ static MemTxResult cchip_read(void *opaque, hwaddr addr, case 0x0780: /* PWR: Power Management Control. */ break; - =20 + case 0x0c00: /* CMONCTLA */ case 0x0c40: /* CMONCTLB */ case 0x0c80: /* CMONCNT01 */ @@ -440,7 +442,7 @@ static MemTxResult cchip_write(void *opaque, hwaddr add= r, case 0x0780: /* PWR: Power Management Control. */ break; - =20 + case 0x0c00: /* CMONCTLA */ case 0x0c40: /* CMONCTLB */ case 0x0c80: /* CMONCNT01 */ @@ -605,8 +607,10 @@ static const MemoryRegionOps pchip_ops =3D { }, }; =20 -/* A subroutine of typhoon_translate_iommu that builds an IOMMUTLBEntry - using the given translated address and mask. */ +/* + * A subroutine of typhoon_translate_iommu that builds an IOMMUTLBEntry + * using the given translated address and mask. + */ static bool make_iommu_tlbe(hwaddr taddr, hwaddr mask, IOMMUTLBEntry *ret) { *ret =3D (IOMMUTLBEntry) { @@ -618,8 +622,10 @@ static bool make_iommu_tlbe(hwaddr taddr, hwaddr mask,= IOMMUTLBEntry *ret) return true; } =20 -/* A subroutine of typhoon_translate_iommu that handles scatter-gather - translation, given the address of the PTE. */ +/* + * A subroutine of typhoon_translate_iommu that handles scatter-gather + * translation, given the address of the PTE. + */ static bool pte_translate(hwaddr pte_addr, IOMMUTLBEntry *ret) { uint64_t pte =3D address_space_ldq_le(&address_space_memory, pte_addr, @@ -633,8 +639,10 @@ static bool pte_translate(hwaddr pte_addr, IOMMUTLBEnt= ry *ret) return make_iommu_tlbe((pte & 0x3ffffe) << 12, 0x1fff, ret); } =20 -/* A subroutine of typhoon_translate_iommu that handles one of the - four single-address-cycle translation windows. */ +/* + * A subroutine of typhoon_translate_iommu that handles one of the + * four single-address-cycle translation windows. + */ static bool window_translate(TyphoonWindow *win, hwaddr addr, IOMMUTLBEntry *ret) { @@ -668,8 +676,10 @@ static bool window_translate(TyphoonWindow *win, hwadd= r addr, } =20 /* Handle PCI-to-system address translation. */ -/* TODO: A translation failure here ought to set PCI error codes on the - Pchip and generate a machine check interrupt. */ +/* + * TODO: A translation failure here ought to set PCI error codes on the + * Pchip and generate a machine check interrupt. + */ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, IOMMUAccessFlags flag, @@ -773,10 +783,12 @@ static void typhoon_set_timer_irq(void *opaque, int i= rq, int level) TyphoonState *s =3D opaque; int i; =20 - /* Thankfully, the mc146818rtc code doesn't track the IRQ state, - and so we don't have to worry about missing interrupts just - because we never actually ACK the interrupt. Just ignore any - case of the interrupt level going low. */ + /* + * Thankfully, the mc146818rtc code doesn't track the IRQ state, + * and so we don't have to worry about missing interrupts just + * because we never actually ACK the interrupt. Just ignore any + * case of the interrupt level going low. + */ if (level =3D=3D 0) { return; } @@ -787,14 +799,16 @@ static void typhoon_set_timer_irq(void *opaque, int i= rq, int level) if (cpu !=3D NULL) { uint32_t iic =3D s->cchip.iic[i]; =20 - /* ??? The verbage in Section 10.2.2.10 isn't 100% clear. - Bit 24 is the OverFlow bit, RO, and set when the count - decrements past 0. When is OF cleared? My guess is that - OF is actually cleared when the IIC is written, and that - the ICNT field always decrements. At least, that's an - interpretation that makes sense, and "allows the CPU to - determine exactly how mant interval timer ticks were - skipped". At least within the next 4M ticks... */ + /* + * ??? The verbage in Section 10.2.2.10 isn't 100% clear. + * Bit 24 is the OverFlow bit, RO, and set when the count + * decrements past 0. When is OF cleared? My guess is that + * OF is actually cleared when the IIC is written, and that + * the ICNT field always decrements. At least, that's an + * interpretation that makes sense, and "allows the CPU to + * determine exactly how mant interval timer ticks were + * skipped". At least within the next 4M ticks... + */ =20 iic =3D ((iic - 1) & 0x1ffffff) | (iic & 0x1000000); s->cchip.iic[i] =3D iic; @@ -852,13 +866,17 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_i= sa_irq, *p_isa_irq =3D qemu_allocate_irq(typhoon_set_isa_irq, s, 0); *p_rtc_irq =3D qemu_allocate_irq(typhoon_set_timer_irq, s, 0); =20 - /* Main memory region, 0x00.0000.0000. Real hardware supports 32GB, - but the address space hole reserved at this point is 8TB. */ + /* + * Main memory region, 0x00.0000.0000. Real hardware supports 32GB, + * but the address space hole reserved at this point is 8TB. + */ memory_region_add_subregion(addr_space, 0, ram); =20 /* TIGbus, 0x801.0000.0000, 1GB. */ - /* ??? The TIGbus is used for delivering interrupts, and access to - the flash ROM. I'm not sure that we need to implement it at all. = */ + /* + * ??? The TIGbus is used for delivering interrupts, and access to + * the flash ROM. I'm not sure that we need to implement it at all. + */ =20 /* Pchip0 CSRs, 0x801.8000.0000, 256MB. */ memory_region_init_io(&s->pchip.region, OBJECT(s), &pchip_ops, s, "pch= ip0", @@ -916,9 +934,11 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_is= a_irq, memory_region_add_subregion(addr_space, 0x801fe000000ULL, &s->pchip.reg_conf); =20 - /* For the record, these are the mappings for the second PCI bus. - We can get away with not implementing them because we indicate - via the Cchip.CSC bit that Pchip1 is not present. */ + /* + * For the record, these are the mappings for the second PCI bus. + * We can get away with not implementing them because we indicate + * via the Cchip.CSC bit that Pchip1 is not present. + */ /* Pchip1 PCI memory, 0x802.0000.0000, 4GB. */ /* Pchip1 CSRs, 0x802.8000.0000, 256MB. */ /* Pchip1 PCI special/interrupt acknowledge, 0x802.F800.0000, 64MB. */ --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Signed-off-by: Yodel Eldar Reviewed-by: Richard Henderson --- hw/alpha/dp264.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 98219f0456..27fbcee637 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -26,12 +26,14 @@ static uint64_t cpu_alpha_superpage_to_phys(void *opaqu= e, uint64_t addr) return addr; } =20 -/* Note that there are at least 3 viewpoints of IRQ numbers on Alpha syste= ms. - (0) The dev_irq_n lines into the cpu, which we totally ignore, - (1) The DRIR lines in the typhoon chipset, - (2) The "vector" aka mangled interrupt number reported by SRM PALcode, - (3) The interrupt number assigned by the kernel. - The following function is concerned with (1) only. */ +/* + * Note that there are at least 3 viewpoints of IRQ numbers on Alpha syste= ms. + * (0) The dev_irq_n lines into the cpu, which we totally ignore, + * (1) The DRIR lines in the typhoon chipset, + * (2) The "vector" aka mangled interrupt number reported by SRM PALcode, + * (3) The interrupt number assigned by the kernel. + * The following function is concerned with (1) only. + */ =20 static int clipper_pci_map_irq(PCIDevice *d, int irq_num) { @@ -132,9 +134,11 @@ static void clipper_init(MachineState *machine) pci_dev =3D pci_create_simple(pci_bus, -1, "cmd646-ide"); pci_ide_create_devs(pci_dev); =20 - /* Load PALcode. Given that this is not "real" cpu palcode, - but one explicitly written for the emulation, we might as - well load it directly from and ELF image. */ + /* + * Load PALcode. Given that this is not "real" cpu palcode, + * but one explicitly written for the emulation, we might as + * well load it directly from and ELF image. + */ palcode_filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware ?: "palcode-clippe= r"); if (palcode_filename =3D=3D NULL) { --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=yodel.dev ARC-Seal: i=1; a=rsa-sha256; t=1773182047; cv=none; d=zohomail.com; s=zohoarc; b=bYWavTVqcXcCL9QjZwMBuY38UXWd3A9d35dqACOVRfIWHNEXPOVCGBX22oW+tdeKY9RfwxyJPEaF+qQjuzMlzLMEvItC4bHMlbObYW/YKVbyF03+6OcVj1/fsSAT9lRHdXdNKuAdSq6iTHAPwfUB2YxyRFmyAWwbJOCJ+biLVkE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1773182047; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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b=j+2zEc0M3k2AwKP5ZU4GYyH/Evfym+xcW9pTiQPpkXW2ULpiKZQCN7CIdyZrL0KBA OpbkhKb/wuPezSXD41p/0HiVdyKZjy1S6bkpklX7C8JnU+hRawxme0AjmHYleHD+Wn 1UAAIuVSVQ5TUJBi3XN5YRVL8ECSd7zr0m2eS9kMMVATIMQGZCg4i+chB/mBg7j6vj mTepwhXWuKnwGnqRXA94XGG0jsLXkQ/qrGytYQ5aDwcCKuReyn/XnUFmzhuaFmuCiL Axk4fHy1l93SURd2ei9jR55XapohXL7WRsG4TQw6z64l0WVGUnI7yz+49XZLEIBMTx mubinykJEtgLQ== X-Mailgun-Dkim: no X-Mailgun-Dkim: no From: Yodel Eldar Date: Tue, 10 Mar 2026 17:31:43 -0500 Subject: [PATCH 03/15] hw/alpha/dp264: Validate kernel and initrd sizes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-3-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=2274; i=yodel.eldar@yodel.dev; h=from:subject:message-id; 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Warn the user if initrd overlaps with kernel. Signed-off-by: Yodel Eldar --- hw/alpha/dp264.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 27fbcee637..87af919895 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -61,7 +61,7 @@ static void clipper_init(MachineState *machine) long size, i; char *palcode_filename; uint64_t palcode_entry; - uint64_t kernel_entry, kernel_low; + uint64_t kernel_entry, kernel_low, kernel_high; unsigned int smp_cpus =3D machine->smp.cpus; =20 /* Create up to 4 cpus. */ @@ -165,7 +165,7 @@ static void clipper_init(MachineState *machine) uint64_t param_offset; =20 size =3D load_elf(kernel_filename, NULL, cpu_alpha_superpage_to_ph= ys, - NULL, &kernel_entry, &kernel_low, NULL, NULL, + NULL, &kernel_entry, &kernel_low, &kernel_high, NU= LL, ELFDATA2LSB, EM_ALPHA, 0, 0); if (size < 0) { error_report("could not load kernel '%s'", kernel_filename); @@ -181,7 +181,7 @@ static void clipper_init(MachineState *machine) } =20 if (initrd_filename) { - long initrd_base; + hwaddr initrd_base; int64_t initrd_size; =20 initrd_size =3D get_image_size(initrd_filename, NULL); @@ -192,7 +192,15 @@ static void clipper_init(MachineState *machine) } =20 /* Put the initrd image as high in memory as possible. */ - initrd_base =3D (ram_size - initrd_size) & TARGET_PAGE_MASK; + if (usub64_overflow(ram_size, initrd_size, &initrd_base)) { + error_report("initial ram disk exceeds allotted ram size"); + exit(1); + } + initrd_base &=3D TARGET_PAGE_MASK; + if (initrd_base <=3D kernel_high) { + warn_report("initial ram disk overlaps with kernel"); + } + load_image_targphys(initrd_filename, initrd_base, ram_size - initrd_base, NULL); =20 --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=yodel.dev ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-4-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=1686; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=n8jVLGmiaqb05aHZhkRRE5WV8rbQyrZXfrD5hWT7dy4=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP747QnfgmQD/xXpofwhuvPuxZmuYdqmseD4quktN zO55vJe6ChlYRDjYpAVU2S5fFbirEPu7q60lT/uw8xhZQIZwsDFKQATUa1i+J9TU/7ZRHySZ9TR hWvkfDTiOIvZ+60OONqe+l2yecG6HhNGhtYH294an4m8eFjxfYeRpzXzwzTDS77ayjc0dfabz5w 3hRsA X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182049106158500 Replace address_space_stq_le() invocations with rom_add_blob_fixed(). This will prove helpful when the Clipper becomes resettable, because the params will be reloaded without the initrd file. Signed-off-by: Yodel Eldar --- hw/alpha/dp264.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 87af919895..f036d72268 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -183,6 +183,7 @@ static void clipper_init(MachineState *machine) if (initrd_filename) { hwaddr initrd_base; int64_t initrd_size; + uint64_t initrd_info[2]; =20 initrd_size =3D get_image_size(initrd_filename, NULL); if (initrd_size < 0) { @@ -204,11 +205,11 @@ static void clipper_init(MachineState *machine) load_image_targphys(initrd_filename, initrd_base, ram_size - initrd_base, NULL); =20 - address_space_stq_le(&address_space_memory, param_offset + 0x1= 00, - initrd_base + 0xfffffc0000000000ULL, - MEMTXATTRS_UNSPECIFIED, NULL); - address_space_stq_le(&address_space_memory, param_offset + 0x1= 08, - initrd_size, MEMTXATTRS_UNSPECIFIED, NULL= ); + stq_le_p(&initrd_info[0], initrd_base + 0xfffffc0000000000ULL); + stq_le_p(&initrd_info[1], initrd_size); + + rom_add_blob_fixed("initrd_info", initrd_info, sizeof(initrd_i= nfo), + param_offset + 0x100); } } } --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=yodel.dev ARC-Seal: i=1; a=rsa-sha256; t=1773181999; cv=none; d=zohomail.com; s=zohoarc; b=N4uRw8juZl7/e8Iogb3H90IVNaCglyg67Eh3fRPCBEwmEWCw77F1GbABVnyq+Zzv18h/xE3r04bO9WzcgAwhA0rYpxXoXU25VZ5tTreGK9iSdq4U4rgnZ50iOI12ZUZbUATUXgkm+VzqBg3aT9OW6+pptAYkJBPcNg7BGUNjyQ0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1773181999; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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b=Mv1DURfIFlTwuI+MjCNnj3lQyyLJvasMGQ5t9NgrWzmBIbzS7EwRDavsLv91C2Pck S0C9X05l72zTmZgi2/hnks5hwB+LnlyUp5GW8d491WbeIFf26XyRgWsoSCV65EpCld 1nIeYwoqucRO6A2Nsqv9WwqLtUee//Pffnfs88CGVLY+LbKUipDjEjG+HjWwTDZuDV ZedrFO8T0VEYUIb1qtSvOwDjuXliwXxPLCU0SUR/sqiPJrBfKoUeGqckjV1WLBJLox CGDLtIX9mzHrQCcW4gPCL8lEWYGAtPd8faXuBwjV5fxPuJLzwhRi46tKDd1O8OPBUe cpCba2BfJyeQg== X-Mailgun-Dkim: no X-Mailgun-Dkim: no From: Yodel Eldar Date: Tue, 10 Mar 2026 17:31:45 -0500 Subject: [PATCH 05/15] hw/alpha/typhoon: Create instance_init and class_init MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-5-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=1970; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=Z7htNhCxf6/XeOs5Vmu49NibrQGy2pwcp0UfC62NjQ0=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP7oY7IrZZbfTMOfVQ8XcDDMWXtfy4hTeHP6PemjV n0ZrWwmHaUsDGJcDLJiiiyXz0qcdcjd3ZW28sd9mDmsTCBDGLg4BWAiT24wMhyzy2KrO3jLReEa 08wcLQax2pthdXa2X5vOlYUFVryY5cbIsMtsUuO1Q1KLEl/JX/Q/LMSyUKmO20tgy5SdUs0/J6x dyAAA X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182001248158500 Define the Typhoon class and instance initializers. Add "cpu[*]" link properties in the instance_init of Typhoon. Setting these cpu link properties will occur in a later commit. Note: This is one step towards splitting typhoon_init() into the instance_init and realize hooks. typhoon_init() currently takes a fixed cpus array as a parameter; that array will be removed soon. Signed-off-by: Yodel Eldar --- hw/alpha/typhoon.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index f392772500..5789829818 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -15,6 +15,7 @@ #include "cpu.h" #include "hw/core/irq.h" #include "alpha_sys.h" +#include "hw/core/qdev-properties.h" =20 =20 #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" @@ -948,10 +949,32 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_i= sa_irq, return b; } =20 +static void typhoon_pcihost_init(Object *obj) +{ + TyphoonState *s =3D TYPHOON_PCI_HOST_BRIDGE(obj); + + int i; + for (i =3D 0; i < 4; ++i) { + g_autofree char *name =3D g_strdup_printf("cpu[%d]", i); + object_property_add_link(obj, name, TYPE_ALPHA_CPU, + (Object **)&s->cchip.cpu[i], + qdev_prop_allow_set_link_before_realize, = 0); + } +} + +static void typhoon_pcihost_class_init(ObjectClass *klass, const void *dat= a) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->user_creatable =3D false; +} + static const TypeInfo typhoon_pcihost_info =3D { .name =3D TYPE_TYPHOON_PCI_HOST_BRIDGE, .parent =3D TYPE_PCI_HOST_BRIDGE, .instance_size =3D sizeof(TyphoonState), + .instance_init =3D typhoon_pcihost_init, + .class_init =3D typhoon_pcihost_class_init, }; =20 static void typhoon_iommu_memory_region_class_init(ObjectClass *klass, --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=yodel.dev ARC-Seal: i=1; a=rsa-sha256; t=1773182036; cv=none; d=zohomail.com; s=zohoarc; b=BguQevggSXC8jvxwICFzRGn9cS4i0WZfvZFIQfjBhir4Bc28FzdZ2P81Z6RAG3fmTlP2eUmKdLBJoOAaagV7hyrguMVmKvx17fkadakVZ15ZjYhjdhTaiPfBMGNN/n6l2lg3ggLeKbtsg3GIEQymkIm0a/RTJ9woSm+SQ+duTgs= ARC-Message-Signature: i=1; a=rsa-sha256; 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Tue, 10 Mar 2026 18:32:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w05ct-0001FM-FA for qemu-devel@nongnu.org; Tue, 10 Mar 2026 18:32:31 -0400 Received: from v512.v5f06b487.use4.send.mailgun.net ([143.55.232.12]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1w05cr-00073S-0D for qemu-devel@nongnu.org; Tue, 10 Mar 2026 18:32:31 -0400 Received: from mail.yodel.dev (mail.yodel.dev [35.209.39.246]) by 57917ef65112c470180084f856c5f7712aac849ef81fb92c87640db6965eaa77 with SMTP id 69b09bf53b0c4bd463bb5ccf; Tue, 10 Mar 2026 22:32:21 GMT X-Mailgun-Sid: WyI4ZDFlNiIsInFlbXUtZGV2ZWxAbm9uZ251Lm9yZyIsIjk3NjA3ZSJd X-Mailgun-Sending-Ip: 143.55.232.12 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yodel.dev; s=rsa2048; t=1773181940; bh=rXfpG4nL42XYnvWsqn0QK5bvRHgOmZdHIV+J4k3iOnE=; h=X-Mailgun-Dkim:From:Date:Subject:MIME-Version:Content-Type: Content-Transfer-Encoding:Message-Id:References:In-Reply-To:To:Cc: X-Developer-Signature:X-Developer-Key:From:Reply-to:Subject:Date: Message-id:To:Cc:Mime-version:Content-type: Content-transfer-encoding:In-reply-to:References; b=VyGgyZ57rkW3AYu9dqODR4zh+fijSXHVwXrREo0OM8X5dyVOcKcmR2HakzPNN6Fp9 s8HZoG1mtimXM3EXowyIsiesG8d/d6VNDQUtZTYgKhKozza2f59Au5VRVRzwQnDeE6 n3s4Uybbwt4MTqDGdiUGyHyMKfhz2atCll1GKbob5Y9c6aafjfR6PcU2ZK7dJvjWAH byt5GN3tsHhMxvx5MB5HOR62Jrat8OqN2h0iPar+Z/BlqzS4zUDtN1Ucu+k4hKf1By ZzSXhkH/+5swXiEmGexH8Z6UvQzalSyf1qv6eXgtd9EQLEIdMvouFuPlOD0lG2ZG3h 1/8dfbDeye5Xg== X-Mailgun-Dkim: no X-Mailgun-Dkim: no From: Yodel Eldar Date: Tue, 10 Mar 2026 17:31:46 -0500 Subject: [PATCH 06/15] hw/alpha/dp264: Add CPUs as children of the machine MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-6-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=968; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=dhBnD80mxjeUB0KSrkt/Yjdy/BPFojJeZrKWCGqe2Ho=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP64JiDXulfTwO6mn/LtitibPzJ339fcoHvdrPfo+ xyDFfscO0pZGMS4GGTFFFkun5U465C7uytt5Y/7MHNYmUCGMHBxCsBE/FYx/M/O6jm66ar3zCdq f56+0K+QcLhmoLqhJ9dZY7bwwq7/OyQY/kf1JvRaPP/OmnFJ3fxhq97GR1xix8O29m0wtOmfunP xEl4A X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182037179158500 Replace cpu_create() calls with object_new(). Then, add the CPUs as children of the Clipper. Finally, realize and unref them. Signed-off-by: Yodel Eldar --- hw/alpha/dp264.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index f036d72268..b2ef423f93 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -67,7 +67,11 @@ static void clipper_init(MachineState *machine) /* Create up to 4 cpus. */ memset(cpus, 0, sizeof(cpus)); for (i =3D 0; i < smp_cpus; ++i) { - cpus[i] =3D ALPHA_CPU(cpu_create(machine->cpu_type)); + g_autofree char *name =3D g_strdup_printf("cpu[%ld]", i); + Object *cpu =3D object_new(machine->cpu_type); + object_property_add_child(OBJECT(machine), name, cpu); + qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal); + cpus[i] =3D ALPHA_CPU(cpu); } =20 /* --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-7-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=5491; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=t9rEAymgy1ah9FBlM7UtLVNH7ETZR6oaCjVJ6+nJg6U=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP5oXHqhdY+n89cLC8TfV9/gY0xYNPfedPe3c9ZpH zT918O7raOUhUGMi0FWTJHl8lmJsw65u7vSVv64DzOHlQlkCAMXpwBMxOonI8P86e6f97yvOqHj Vmr69VWs17/uoEaZ7MWPbhVf9Zm/56gLI8PVVY5fLrH1RpUfETv86dsEtRNrp5u8e7+24IwfT37 a//9cAA== X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182033848154100 Export the QOM declaration of TyphoonState by moving it out of hw/alpha/typhoon.c into hw/alpha/alpha_sys.h. Keep its definition encapsulated. Define ClipperMachineState with a TyphoonState member. Move the instantiation of Typhoon out of typhoon_init() into the Clipper machine and add it as a QOM child object of Clipper. For now, add TyphoonState pointer as a parameter of typhoon_init(). Note: Eventually, typhoon_init() will be split into Typhoon's instance_init and realize hooks; this is an intermediate commit to that end. Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 4 +++- hw/alpha/dp264.c | 31 ++++++++++++++++++++++++++++--- hw/alpha/typhoon.c | 12 +++--------- 3 files changed, 34 insertions(+), 13 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 6e6691d116..247a52b776 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -8,9 +8,11 @@ #include "hw/core/boards.h" #include "hw/intc/i8259.h" =20 +#define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" +OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE) =20 PCIBus *typhoon_init(MemoryRegion *, qemu_irq *, qemu_irq *, AlphaCPU *[4], - pci_map_irq_fn, uint8_t devfn_min); + pci_map_irq_fn, uint8_t devfn_min, TyphoonState *); =20 /* alpha_pci.c. */ extern const MemoryRegionOps alpha_pci_ignore_ops; diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index b2ef423f93..c9d639eb7b 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -18,6 +18,15 @@ #include "hw/isa/superio.h" #include "qemu/datadir.h" =20 +#define TYPE_CLIPPER_MACHINE MACHINE_TYPE_NAME("clipper") +OBJECT_DECLARE_SIMPLE_TYPE(ClipperMachineState, CLIPPER_MACHINE) + +struct ClipperMachineState { + MachineState parent_obj; + + TyphoonState *typhoon; +}; + static uint64_t cpu_alpha_superpage_to_phys(void *opaque, uint64_t addr) { if (((addr >> 41) & 3) =3D=3D 2) { @@ -46,6 +55,7 @@ static int clipper_pci_map_irq(PCIDevice *d, int irq_num) =20 static void clipper_init(MachineState *machine) { + ClipperMachineState *cms =3D CLIPPER_MACHINE(machine); ram_addr_t ram_size =3D machine->ram_size; const char *kernel_filename =3D machine->kernel_filename; const char *kernel_cmdline =3D machine->kernel_cmdline; @@ -64,6 +74,11 @@ static void clipper_init(MachineState *machine) uint64_t kernel_entry, kernel_low, kernel_high; unsigned int smp_cpus =3D machine->smp.cpus; =20 + Object * const typhoon_obj =3D object_new(TYPE_TYPHOON_PCI_HOST_BRIDGE= ); + TyphoonState * const typhoon =3D TYPHOON_PCI_HOST_BRIDGE(typhoon_obj); + cms->typhoon =3D typhoon; + object_property_add_child(OBJECT(machine), "typhoon", typhoon_obj); + /* Create up to 4 cpus. */ memset(cpus, 0, sizeof(cpus)); for (i =3D 0; i < smp_cpus; ++i) { @@ -93,7 +108,7 @@ static void clipper_init(MachineState *machine) * the minimum PCI device IdSel is 1. */ pci_bus =3D typhoon_init(machine->ram, &isa_irq, &rtc_irq, cpus, - clipper_pci_map_irq, PCI_DEVFN(1, 0)); + clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon); =20 /* * Init the PCI -> ISA bridge. @@ -218,8 +233,9 @@ static void clipper_init(MachineState *machine) } } =20 -static void clipper_machine_init(MachineClass *mc) +static void clipper_machine_init(ObjectClass *oc, const void *data) { + MachineClass *mc =3D MACHINE_CLASS(oc); mc->desc =3D "Alpha DP264/CLIPPER"; mc->init =3D clipper_init; mc->block_default_type =3D IF_IDE; @@ -230,4 +246,13 @@ static void clipper_machine_init(MachineClass *mc) mc->default_nic =3D "e1000"; } =20 -DEFINE_MACHINE("clipper", clipper_machine_init) +static const TypeInfo clipper_types[] =3D { + { + .name =3D TYPE_CLIPPER_MACHINE, + .parent =3D TYPE_MACHINE, + .instance_size =3D sizeof(ClipperMachineState), + .class_init =3D clipper_machine_init, + }, +}; + +DEFINE_TYPES(clipper_types); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 5789829818..b0eb4e415c 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -18,7 +18,6 @@ #include "hw/core/qdev-properties.h" =20 =20 -#define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" #define TYPE_TYPHOON_IOMMU_MEMORY_REGION "typhoon-iommu-memory-region" =20 typedef struct TyphoonCchip { @@ -50,8 +49,6 @@ typedef struct TyphoonPchip { TyphoonWindow win[4]; } TyphoonPchip; =20 -OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE) - struct TyphoonState { PCIHostState parent_obj; =20 @@ -836,18 +833,15 @@ static void typhoon_alarm_timer(void *opaque) =20 PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq, qemu_irq *p_rtc_irq, AlphaCPU *cpus[4], - pci_map_irq_fn sys_map_irq, uint8_t devfn_min) + pci_map_irq_fn sys_map_irq, uint8_t devfn_min, + TyphoonState *s) { MemoryRegion *addr_space =3D get_system_memory(); - DeviceState *dev; - TyphoonState *s; + DeviceState *dev =3D DEVICE(s); PCIHostState *phb; PCIBus *b; int i; =20 - dev =3D qdev_new(TYPE_TYPHOON_PCI_HOST_BRIDGE); - - s =3D TYPHOON_PCI_HOST_BRIDGE(dev); phb =3D PCI_HOST_BRIDGE(dev); =20 s->cchip.misc =3D 0x800000000ull; /* Revision: Typhoon. */ --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-8-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=2994; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=4+yl9aBE7yIAIoXFLFvfcGF9rFQ6EgOSgSsswW68crI=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP4olcWgvPru2kMlRR6ZE6cscrNWCc6502v13+vH6 0PR99bmdZSyMIhxMciKKbJcPitx1iF3d1fayh/3YeawMoEMYeDiFICJ2Akz/I+aXD2N4Z7gv2wX oS6dmmzHO5fivDet84t1XCjOGtVxaD4jw9bY6Mqbq84d0FwmJZ21m29O4JrHGrsU/70QtuDu3q5 +kgcA X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182051136158500 Set the "cpu[*]" links upon instantiation. Eliminate the cpus array parameter of typhoon_init(), as it is no longer needed. Note: This commit helps with the eventual splitting of typhoon_init() into instance_init and realize hooks, by eliminating one of its parameters. Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 2 +- hw/alpha/dp264.c | 3 ++- hw/alpha/typhoon.c | 5 ++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 247a52b776..f6779520d9 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -11,7 +11,7 @@ #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE) =20 -PCIBus *typhoon_init(MemoryRegion *, qemu_irq *, qemu_irq *, AlphaCPU *[4], +PCIBus *typhoon_init(MemoryRegion *, qemu_irq *, qemu_irq *, pci_map_irq_fn, uint8_t devfn_min, TyphoonState *); =20 /* alpha_pci.c. */ diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index c9d639eb7b..c0996efffe 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -85,6 +85,7 @@ static void clipper_init(MachineState *machine) g_autofree char *name =3D g_strdup_printf("cpu[%ld]", i); Object *cpu =3D object_new(machine->cpu_type); object_property_add_child(OBJECT(machine), name, cpu); + object_property_set_link(typhoon_obj, name, cpu, &error_fatal); qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal); cpus[i] =3D ALPHA_CPU(cpu); } @@ -107,7 +108,7 @@ static void clipper_init(MachineState *machine) * Init the chipset. Because we're using CLIPPER IRQ mappings, * the minimum PCI device IdSel is 1. */ - pci_bus =3D typhoon_init(machine->ram, &isa_irq, &rtc_irq, cpus, + pci_bus =3D typhoon_init(machine->ram, &isa_irq, &rtc_irq, clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon); =20 /* diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index b0eb4e415c..5fac5eba1c 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -832,7 +832,7 @@ static void typhoon_alarm_timer(void *opaque) } =20 PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq, - qemu_irq *p_rtc_irq, AlphaCPU *cpus[4], + qemu_irq *p_rtc_irq, pci_map_irq_fn sys_map_irq, uint8_t devfn_min, TyphoonState *s) { @@ -849,8 +849,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa= _irq, =20 /* Remember the CPUs so that we can deliver interrupts to them. */ for (i =3D 0; i < 4; i++) { - AlphaCPU *cpu =3D cpus[i]; - s->cchip.cpu[i] =3D cpu; + AlphaCPU *cpu =3D s->cchip.cpu[i]; if (cpu !=3D NULL) { cpu->alarm_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, typhoon_alarm_timer, --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-9-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=4510; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=rXxKkCgg9TKmZFppB9FKN9HnN6ES1MNT9sY4hCQAZcY=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP7E2vhn+V61dVdcDv5x5O+K1SrIu//TOrFFJGzKz g2zYlmEOkpZGMS4GGTFFFkun5U465C7uytt5Y/7MHNYmUCGMHBxCsBE5k5gZNg2q+B40Jf6C0/i o9dnZ7aH255y2Tx/btVTZuGFUwwv7Mph+J/97tc+uc8b1uwrXXFrd2XHipRVwcIXTKR0l1ZLbPN a8ZoVAA== X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182015471154100 Eliminate the qemu_irq parameters of typhoon_init() by using qdev_init_gpio_in_named() for the IRQ lines. Replace the qemu_irq variables in clipper_init() by calling qdev_get_gpio_in_named() in their place. Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 5 ++++- hw/alpha/dp264.c | 12 +++++++----- hw/alpha/typhoon.c | 11 ++++++----- 3 files changed, 17 insertions(+), 11 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index f6779520d9..39a96760d7 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -11,9 +11,12 @@ #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE) =20 -PCIBus *typhoon_init(MemoryRegion *, qemu_irq *, qemu_irq *, +PCIBus *typhoon_init(MemoryRegion *, pci_map_irq_fn, uint8_t devfn_min, TyphoonState *); =20 +#define TYPHOON_GPIO_ISA_IRQ "isa-irq" +#define TYPHOON_GPIO_RTC_IRQ "rtc-irq" + /* alpha_pci.c. */ extern const MemoryRegionOps alpha_pci_ignore_ops; extern const MemoryRegionOps alpha_pci_conf1_ops; diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index c0996efffe..61eeaef6db 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -66,8 +66,6 @@ static void clipper_init(MachineState *machine) PCIDevice *pci_dev; DeviceState *i82378_dev; ISABus *isa_bus; - qemu_irq rtc_irq; - qemu_irq isa_irq; long size, i; char *palcode_filename; uint64_t palcode_entry; @@ -108,7 +106,7 @@ static void clipper_init(MachineState *machine) * Init the chipset. Because we're using CLIPPER IRQ mappings, * the minimum PCI device IdSel is 1. */ - pci_bus =3D typhoon_init(machine->ram, &isa_irq, &rtc_irq, + pci_bus =3D typhoon_init(machine->ram, clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon); =20 /* @@ -136,10 +134,14 @@ static void clipper_init(MachineState *machine) isa_bus =3D ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0")); =20 /* Connect the ISA PIC to the Typhoon IRQ used for ISA interrupts. */ - qdev_connect_gpio_out(i82378_dev, 0, isa_irq); + qdev_connect_gpio_out(i82378_dev, 0, + qdev_get_gpio_in_named(DEVICE(typhoon), + TYPHOON_GPIO_ISA_IRQ, 0)); =20 /* Since we have an SRM-compatible PALcode, use the SRM epoch. */ - mc146818_rtc_init(isa_bus, 1900, rtc_irq); + mc146818_rtc_init(isa_bus, 1900, + qdev_get_gpio_in_named(DEVICE(typhoon), + TYPHOON_GPIO_RTC_IRQ, 0)); =20 /* VGA setup. Don't bother loading the bios. */ pci_vga_init(pci_bus); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 5fac5eba1c..03bb4c8055 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -831,8 +831,7 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } =20 -PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq, - qemu_irq *p_rtc_irq, +PCIBus *typhoon_init(MemoryRegion *ram, pci_map_irq_fn sys_map_irq, uint8_t devfn_min, TyphoonState *s) { @@ -857,9 +856,6 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa= _irq, } } =20 - *p_isa_irq =3D qemu_allocate_irq(typhoon_set_isa_irq, s, 0); - *p_rtc_irq =3D qemu_allocate_irq(typhoon_set_timer_irq, s, 0); - /* * Main memory region, 0x00.0000.0000. Real hardware supports 32GB, * but the address space hole reserved at this point is 8TB. @@ -945,6 +941,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa= _irq, static void typhoon_pcihost_init(Object *obj) { TyphoonState *s =3D TYPHOON_PCI_HOST_BRIDGE(obj); + DeviceState *dev =3D DEVICE(obj); =20 int i; for (i =3D 0; i < 4; ++i) { @@ -953,6 +950,10 @@ static void typhoon_pcihost_init(Object *obj) (Object **)&s->cchip.cpu[i], qdev_prop_allow_set_link_before_realize, = 0); } + + qdev_init_gpio_in_named(dev, typhoon_set_isa_irq, TYPHOON_GPIO_ISA_IRQ= , 1); + qdev_init_gpio_in_named(dev, typhoon_set_timer_irq, TYPHOON_GPIO_RTC_I= RQ, + 1); } =20 static void typhoon_pcihost_class_init(ObjectClass *klass, const void *dat= a) --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tue, 10 Mar 2026 22:32:22 GMT X-Mailgun-Sid: WyI4ZDFlNiIsInFlbXUtZGV2ZWxAbm9uZ251Lm9yZyIsIjk3NjA3ZSJd X-Mailgun-Sending-Ip: 143.55.232.12 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yodel.dev; s=rsa2048; t=1773181942; bh=ZnxAJzgYH9ZG2omqVFaAj6k38B27lb9zSPEJjo/0sxc=; h=X-Mailgun-Dkim:From:Date:Subject:MIME-Version:Content-Type: Content-Transfer-Encoding:Message-Id:References:In-Reply-To:To:Cc: X-Developer-Signature:X-Developer-Key:From:Reply-to:Subject:Date: Message-id:To:Cc:Mime-version:Content-type: Content-transfer-encoding:In-reply-to:References; b=Eyn1Il2yBkk2zYhkj4SOoya+HnSxIDZhJxh5D8RIAYPoeEUPN6VhiVMfE0dox0QfV lpmiuGs34/bSEWuitKl7OKOGWSgnJf44kBZC+Qla9YOrVDfRh180VBLSPZe1oKJ7hE zKA6CNzi6w50sHBeUMLXV8YLjLcIPe5v0lzWVZFRkYiuX82zHaaBiZz3CGgZBoXiN4 PiG5YhqKIj+kYb2Xzw/PRa8cZ170PSi0wiqWBY4lAW2gMqGlocwinqvqEbN60blgBP u/HqUV3vIzk0JCKuc2j3HYwVpdUf+YdgKNX8qQrQQPfvxtC9pMLEA785n+XMYs4HRH b1ue0VgIW5hGw== X-Mailgun-Dkim: no X-Mailgun-Dkim: no From: Yodel Eldar Date: Tue, 10 Mar 2026 17:31:50 -0500 Subject: [PATCH 10/15] hw/alpha: Expose RAM to typhoon via QOM property link MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-10-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=4218; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=XI6uGBEJ2/O7iYlIzV2EFhEmPsdhy30vn8asQ0sinDg=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP708dc5BmemwJqnnz7kcyjzcvJqb9Xx4OupVtjXG x3QLa/eUcrCIMbFICumyHL5rMRZh9zdXWkrf9yHmcPKBDKEgYtTACYinMjI0DBhZYRTeZmkrw9D cNBbE++JfqdnaKbcnGdxUld9UUxXFyPDFWP3vst+T7PSnNwNpverT/u/uPt76+3i9tz7ykaW1W0 8AA== X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182003279154100 Currently, the board (Clipper/DP264) passes machine->ram to the chipset (Typhoon) as an arg to typhoon_init(), where it is added as a subregion of system memory. This commit, instead adds a ram pointer in TyphoonState, defines it as a Property, and sets a link to it from the machine, thus removing the ram parameter. Note: Moving the ram subregion mapping into machine code was considered but decided against so as to preserve the Typhoon's historical role in mapping the address space. Signed-off-by: Yodel Eldar Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/alpha/alpha_sys.h | 5 +++-- hw/alpha/dp264.c | 8 +++++--- hw/alpha/typhoon.c | 14 +++++++++++--- 3 files changed, 19 insertions(+), 8 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 39a96760d7..8611881b55 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -11,8 +11,9 @@ #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE) =20 -PCIBus *typhoon_init(MemoryRegion *, - pci_map_irq_fn, uint8_t devfn_min, TyphoonState *); +PCIBus *typhoon_init(pci_map_irq_fn, uint8_t devfn_min, TyphoonState *); + +#define TYPHOON_PROP_RAM "ram" =20 #define TYPHOON_GPIO_ISA_IRQ "isa-irq" #define TYPHOON_GPIO_RTC_IRQ "rtc-irq" diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 61eeaef6db..a7fc137e70 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -102,12 +102,14 @@ static void clipper_init(MachineState *machine) cpus[0]->env.trap_arg1 =3D 0; cpus[0]->env.trap_arg2 =3D smp_cpus | (!machine->enable_graphics << 6); =20 + object_property_set_link(typhoon_obj, TYPHOON_PROP_RAM, + OBJECT(machine->ram), &error_fatal); + /* * Init the chipset. Because we're using CLIPPER IRQ mappings, * the minimum PCI device IdSel is 1. */ - pci_bus =3D typhoon_init(machine->ram, - clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon); + pci_bus =3D typhoon_init(clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon= ); =20 /* * Init the PCI -> ISA bridge. @@ -245,7 +247,7 @@ static void clipper_machine_init(ObjectClass *oc, const= void *data) mc->max_cpus =3D 4; mc->is_default =3D true; mc->default_cpu_type =3D ALPHA_CPU_TYPE_NAME("ev67"); - mc->default_ram_id =3D "ram"; + mc->default_ram_id =3D TYPHOON_PROP_RAM; mc->default_nic =3D "e1000"; } =20 diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 03bb4c8055..792ace5ce7 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -55,6 +55,8 @@ struct TyphoonState { TyphoonCchip cchip; TyphoonPchip pchip; MemoryRegion dchip_region; + + MemoryRegion *ram; }; =20 /* Called when one of DRIR or DIM changes. */ @@ -831,8 +833,7 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } =20 -PCIBus *typhoon_init(MemoryRegion *ram, - pci_map_irq_fn sys_map_irq, uint8_t devfn_min, +PCIBus *typhoon_init(pci_map_irq_fn sys_map_irq, uint8_t devfn_min, TyphoonState *s) { MemoryRegion *addr_space =3D get_system_memory(); @@ -860,7 +861,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, * Main memory region, 0x00.0000.0000. Real hardware supports 32GB, * but the address space hole reserved at this point is 8TB. */ - memory_region_add_subregion(addr_space, 0, ram); + memory_region_add_subregion(addr_space, 0, s->ram); =20 /* TIGbus, 0x801.0000.0000, 1GB. */ /* @@ -956,11 +957,18 @@ static void typhoon_pcihost_init(Object *obj) 1); } =20 +static const Property typhoon_properties[] =3D { + DEFINE_PROP_LINK(TYPHOON_PROP_RAM, TyphoonState, ram, + TYPE_MEMORY_REGION, MemoryRegion *), +}; + static void typhoon_pcihost_class_init(ObjectClass *klass, const void *dat= a) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->user_creatable =3D false; + + device_class_set_props(dc, typhoon_properties); } =20 static const TypeInfo typhoon_pcihost_info =3D { --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-11-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=1790; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=tloD9q2Ixvhe/Je+2/nijrGzuxhxU/t2z7pz6TfC2+s=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP6k+8xj87YPYpMPRLju3Oq6/mm4nMF+s7/73N/w9 R/7u2WBc0cpC4MYF4OsmCLL5bMSZx1yd3elrfxxH2YOKxPIEAYuTgGYCG8WI8Pe7Blyzmu33XLk +76Hky0o/92/ZYVtC9lWV/L1C0uqNgYy/C/+FR/sXhR39PI/mU9el/bKrrWJPmzSvss8bcH+f8c VfnMCAA== X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182079203158500 Currently, the Typhoon has no additional class fields besides its inheritance (PCIHostBridgeClass), so an explicit definition of its class struct was unnecessary, and we simply used OBJECT_DECLARE_SIMPLE_TYPE to declare its instance and class; however, forthcoming changes will require additional Typhoon-specific class fields. This commit creates the Typhoon class definition, although it remains a shell of its parent class for now. Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 8 +++++++- hw/alpha/typhoon.c | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 8611881b55..794a47127d 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -5,11 +5,17 @@ =20 #include "target/alpha/cpu-qom.h" #include "hw/pci/pci.h" +#include "hw/pci/pci_host.h" #include "hw/core/boards.h" #include "hw/intc/i8259.h" =20 #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" -OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE) + +typedef struct TyphoonClass { + PCIHostBridgeClass parent_class; +} TyphoonClass; + +OBJECT_DECLARE_TYPE(TyphoonState, TyphoonClass, TYPHOON_PCI_HOST_BRIDGE) =20 PCIBus *typhoon_init(pci_map_irq_fn, uint8_t devfn_min, TyphoonState *); =20 diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 792ace5ce7..8745025319 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -976,6 +976,7 @@ static const TypeInfo typhoon_pcihost_info =3D { .parent =3D TYPE_PCI_HOST_BRIDGE, .instance_size =3D sizeof(TyphoonState), .instance_init =3D typhoon_pcihost_init, + .class_size =3D sizeof(TyphoonClass), .class_init =3D typhoon_pcihost_class_init, }; =20 --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=yodel.dev ARC-Seal: i=1; a=rsa-sha256; t=1773182064; cv=none; d=zohomail.com; s=zohoarc; b=C5I1o0hjMcLCMDOK2ue5hNUxyRxvzUrz0BdQkCzMuUGcp4vqB7UJe0mPxf5tj7RuXPBrScAED4aF62KGcXuksW+erIMWmupSdMjcQKRcGuqe4Grm2HES0+nufju8AYmtoGH0jkdR3fpO+9DJM8/jyOpFAn1tekgoi2/sq92q5EI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1773182064; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hQaP5s3ISCv4eAllTXeIOtMsXtpjISci5pifsWQo1QE=; b=JnZUmgrzOFOGgxsWNPSqxDS1zFLNMXMQ9KU+TO43qf8dPuYG/+Oo2Z5dCqyylUsqUjMFbuWZnajhGOC26NCwSOUirTt5X8uKHDJ+wP0GthbSQ1SvTvPK4ZexVGTvTWmaPiOIEt1e5lDewVTX22TJmWmt8omNlGS55twOTAGA4Mw= ARC-Authentication-Results: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-12-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=4969; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=vDZXyJH4edZYehJqPMXlDN152GUNXimB25E96Z1r70Q=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP4kwlxe3jt15bwwm7N1iW/lpwnn/G2dkyhvxzTlY Pm3sNlKHaUsDGJcDLJiiiyXz0qcdcjd3ZW28sd9mDmsTCBDGLg4BWAiLqqMDNf/O6bcuOM2mcfK VZRlJod0e1pK0quHe7nYFxl5eV9ZvZGRYcNxgcDuJybnGrN+fqj627PQ5/aG8NDdoUaiL8Rzjyn o8AEA X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182067214158500 Introduce a Clipper-specific subclass of TyphoonClass, and set the pci_map_irq_fn class member in the subclass init. Since the board must provide the PCI IRQ mapping to the Typhoon, mark the base Typhoon type as abstract. Eliminate the pci_map_irq_fn parameter of typhoon_init(). Note: This commit brings us closer to the splitting of typhoon_init() into instance_init and realize hooks. Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 4 +++- hw/alpha/dp264.c | 19 +++++++++++++++++-- hw/alpha/typhoon.c | 9 ++++++--- 3 files changed, 26 insertions(+), 6 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 794a47127d..fdfe96dcb4 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -13,11 +13,13 @@ =20 typedef struct TyphoonClass { PCIHostBridgeClass parent_class; + + pci_map_irq_fn sys_map_irq; } TyphoonClass; =20 OBJECT_DECLARE_TYPE(TyphoonState, TyphoonClass, TYPHOON_PCI_HOST_BRIDGE) =20 -PCIBus *typhoon_init(pci_map_irq_fn, uint8_t devfn_min, TyphoonState *); +PCIBus *typhoon_init(uint8_t devfn_min, TyphoonState *); =20 #define TYPHOON_PROP_RAM "ram" =20 diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index a7fc137e70..8c3c8fec67 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -21,6 +21,8 @@ #define TYPE_CLIPPER_MACHINE MACHINE_TYPE_NAME("clipper") OBJECT_DECLARE_SIMPLE_TYPE(ClipperMachineState, CLIPPER_MACHINE) =20 +#define TYPE_TYPHOON_PCIHOST_CLIPPER "typhoon-pcihost-clipper" + struct ClipperMachineState { MachineState parent_obj; =20 @@ -72,7 +74,7 @@ static void clipper_init(MachineState *machine) uint64_t kernel_entry, kernel_low, kernel_high; unsigned int smp_cpus =3D machine->smp.cpus; =20 - Object * const typhoon_obj =3D object_new(TYPE_TYPHOON_PCI_HOST_BRIDGE= ); + Object * const typhoon_obj =3D object_new(TYPE_TYPHOON_PCIHOST_CLIPPER= ); TyphoonState * const typhoon =3D TYPHOON_PCI_HOST_BRIDGE(typhoon_obj); cms->typhoon =3D typhoon; object_property_add_child(OBJECT(machine), "typhoon", typhoon_obj); @@ -109,7 +111,7 @@ static void clipper_init(MachineState *machine) * Init the chipset. Because we're using CLIPPER IRQ mappings, * the minimum PCI device IdSel is 1. */ - pci_bus =3D typhoon_init(clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon= ); + pci_bus =3D typhoon_init(PCI_DEVFN(1, 0), typhoon); =20 /* * Init the PCI -> ISA bridge. @@ -251,6 +253,14 @@ static void clipper_machine_init(ObjectClass *oc, cons= t void *data) mc->default_nic =3D "e1000"; } =20 +static void typhoon_pcihost_clipper_class_init(ObjectClass *oc, + const void *data) +{ + TyphoonClass *tc =3D TYPHOON_PCI_HOST_BRIDGE_CLASS(oc); + + tc->sys_map_irq =3D clipper_pci_map_irq; +} + static const TypeInfo clipper_types[] =3D { { .name =3D TYPE_CLIPPER_MACHINE, @@ -258,6 +268,11 @@ static const TypeInfo clipper_types[] =3D { .instance_size =3D sizeof(ClipperMachineState), .class_init =3D clipper_machine_init, }, + { + .name =3D TYPE_TYPHOON_PCIHOST_CLIPPER, + .parent =3D TYPE_TYPHOON_PCI_HOST_BRIDGE, + .class_init =3D typhoon_pcihost_clipper_class_init, + }, }; =20 DEFINE_TYPES(clipper_types); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 8745025319..b261dd7bc5 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -833,15 +833,17 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } =20 -PCIBus *typhoon_init(pci_map_irq_fn sys_map_irq, uint8_t devfn_min, - TyphoonState *s) +PCIBus *typhoon_init(uint8_t devfn_min, TyphoonState *s) { + TyphoonClass *tc =3D TYPHOON_PCI_HOST_BRIDGE_GET_CLASS(s); MemoryRegion *addr_space =3D get_system_memory(); DeviceState *dev =3D DEVICE(s); PCIHostState *phb; PCIBus *b; int i; =20 + assert(tc->sys_map_irq !=3D NULL); + phb =3D PCI_HOST_BRIDGE(dev); =20 s->cchip.misc =3D 0x800000000ull; /* Revision: Typhoon. */ @@ -899,7 +901,7 @@ PCIBus *typhoon_init(pci_map_irq_fn sys_map_irq, uint8_= t devfn_min, &s->pchip.reg_io); =20 b =3D pci_register_root_bus(dev, "pci", - typhoon_set_irq, sys_map_irq, s, + typhoon_set_irq, tc->sys_map_irq, s, &s->pchip.reg_mem, &s->pchip.reg_io, devfn_min, 64, TYPE_PCI_BUS); phb->bus =3D b; @@ -978,6 +980,7 @@ static const TypeInfo typhoon_pcihost_info =3D { .instance_init =3D typhoon_pcihost_init, .class_size =3D sizeof(TyphoonClass), .class_init =3D typhoon_pcihost_class_init, + .abstract =3D true, }; =20 static void typhoon_iommu_memory_region_class_init(ObjectClass *klass, --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182064269154100 Move devfn_min to a member of TyphoonClass and set the Clipper-specific value, PCI_DEVFN(1, 0), in its subclass init. Eliminate devfn_min as a parameter of typhoon_init() to enable its forthcoming split into instance_init and realize hooks. Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 3 ++- hw/alpha/dp264.c | 3 ++- hw/alpha/typhoon.c | 4 ++-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index fdfe96dcb4..cf16e235fb 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -15,11 +15,12 @@ typedef struct TyphoonClass { PCIHostBridgeClass parent_class; =20 pci_map_irq_fn sys_map_irq; + uint8_t devfn_min; } TyphoonClass; =20 OBJECT_DECLARE_TYPE(TyphoonState, TyphoonClass, TYPHOON_PCI_HOST_BRIDGE) =20 -PCIBus *typhoon_init(uint8_t devfn_min, TyphoonState *); +PCIBus *typhoon_init(TyphoonState *); =20 #define TYPHOON_PROP_RAM "ram" =20 diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 8c3c8fec67..de5829a004 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -111,7 +111,7 @@ static void clipper_init(MachineState *machine) * Init the chipset. Because we're using CLIPPER IRQ mappings, * the minimum PCI device IdSel is 1. */ - pci_bus =3D typhoon_init(PCI_DEVFN(1, 0), typhoon); + pci_bus =3D typhoon_init(typhoon); =20 /* * Init the PCI -> ISA bridge. @@ -259,6 +259,7 @@ static void typhoon_pcihost_clipper_class_init(ObjectCl= ass *oc, TyphoonClass *tc =3D TYPHOON_PCI_HOST_BRIDGE_CLASS(oc); =20 tc->sys_map_irq =3D clipper_pci_map_irq; + tc->devfn_min =3D PCI_DEVFN(1, 0); } =20 static const TypeInfo clipper_types[] =3D { diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index b261dd7bc5..ad5010bea8 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -833,7 +833,7 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } =20 -PCIBus *typhoon_init(uint8_t devfn_min, TyphoonState *s) +PCIBus *typhoon_init(TyphoonState *s) { TyphoonClass *tc =3D TYPHOON_PCI_HOST_BRIDGE_GET_CLASS(s); MemoryRegion *addr_space =3D get_system_memory(); @@ -903,7 +903,7 @@ PCIBus *typhoon_init(uint8_t devfn_min, TyphoonState *s) b =3D pci_register_root_bus(dev, "pci", typhoon_set_irq, tc->sys_map_irq, s, &s->pchip.reg_mem, &s->pchip.reg_io, - devfn_min, 64, TYPE_PCI_BUS); + tc->devfn_min, 64, TYPE_PCI_BUS); phb->bus =3D b; sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=yodel.dev ARC-Seal: i=1; a=rsa-sha256; t=1773181998; cv=none; d=zohomail.com; s=zohoarc; b=UzSyLyMXfodm5yM5vNVkdx0lbqICMYJwG54LC+sBpMXyM7duzcwDDyQThu4I52iTcm5MqGGyByJ/yYbrSi6z6dIVWYOPqnjtzK/mrY1UKdGNyJDDQA42YnFCHY/ij7Xf+KiP+3MPRZisUfxZFbGM/XyYMj2/jaIWsGeklp8SKGE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1773181998; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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b=kyxd4EEZm1gTJDsqusPedUc7ruxUc10knBqzbCEE6gMDWAvQXZzkr6SUd0117256v xkTciexiys67jwKPUpmPnpSdR74IIGcqEDa0IMtLTsvNnUtL6xCILS2FzC5n5TLhH+ bYQAhD8uz16F8zYkmUtY41BKWNlTszXt4V4tIO9NNqI2FRfQ32mENjHoklAwVewdRX 8Ke5ozPr71QKh4aSrFy6dqnsxnReZNCQQAdyoKZgohrWAv66+Dw3BUrqCBMIetiLTU rtiu82WIgrc9f6SKSbwQv9Qs1TvSDK6NHf6is2WcSxsTZnIHMRjDCcpHMPsrEmq3VF pix5zU9Gl2sdw== X-Mailgun-Dkim: no X-Mailgun-Dkim: no From: Yodel Eldar Date: Tue, 10 Mar 2026 17:31:54 -0500 Subject: [PATCH 14/15] hw/alpha: Use QOM path resolution to get Typhoon PCI bus MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-14-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=2932; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=hrcnc7S03eaLSYz9ETaJoDrd1Sz9oSiV/EYFgG89M78=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP7ksvCt9RZr9ZxNRsZbvVjsTO8nPlMS+jlxZs/+r 0H7Di0I7ihlYRDjYpAVU2S5fFbirEPu7q60lT/uw8xhZQIZwsDFKQATseNj+Cui/azUYYEOL5vp fO1lnjJOsW/C/0uLq54PSAoIihJKXsLIcHvxFdbguZnbWzVl13RvTY+9rnb5t7LNyztqqw1Y8xm DeQE= X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182001414154100 Use object_resolve_path_component() in clipper_init() to retrieve the PCI bus after it is realized in typhoon_init(). Modify typhoon_init() such that it returns nothing instead of the PCI bus. After this commit, we could cleanly split typhoon_init() into the typhoon's instance_init and realize hooks. Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 3 ++- hw/alpha/dp264.c | 4 +++- hw/alpha/typhoon.c | 6 ++---- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index cf16e235fb..27c3a72b13 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -20,9 +20,10 @@ typedef struct TyphoonClass { =20 OBJECT_DECLARE_TYPE(TyphoonState, TyphoonClass, TYPHOON_PCI_HOST_BRIDGE) =20 -PCIBus *typhoon_init(TyphoonState *); +void typhoon_init(TyphoonState *); =20 #define TYPHOON_PROP_RAM "ram" +#define TYPHOON_PCI_BUS_NAME "pci" =20 #define TYPHOON_GPIO_ISA_IRQ "isa-irq" #define TYPHOON_GPIO_RTC_IRQ "rtc-irq" diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index de5829a004..92a15b0239 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -111,7 +111,9 @@ static void clipper_init(MachineState *machine) * Init the chipset. Because we're using CLIPPER IRQ mappings, * the minimum PCI device IdSel is 1. */ - pci_bus =3D typhoon_init(typhoon); + typhoon_init(typhoon); + pci_bus =3D PCI_BUS(object_resolve_path_component(typhoon_obj, + TYPHOON_PCI_BUS_NAME)); =20 /* * Init the PCI -> ISA bridge. diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index ad5010bea8..55f3aae584 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -833,7 +833,7 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } =20 -PCIBus *typhoon_init(TyphoonState *s) +void typhoon_init(TyphoonState *s) { TyphoonClass *tc =3D TYPHOON_PCI_HOST_BRIDGE_GET_CLASS(s); MemoryRegion *addr_space =3D get_system_memory(); @@ -900,7 +900,7 @@ PCIBus *typhoon_init(TyphoonState *s) memory_region_add_subregion(addr_space, 0x801fc000000ULL, &s->pchip.reg_io); =20 - b =3D pci_register_root_bus(dev, "pci", + b =3D pci_register_root_bus(dev, TYPHOON_PCI_BUS_NAME, typhoon_set_irq, tc->sys_map_irq, s, &s->pchip.reg_mem, &s->pchip.reg_io, tc->devfn_min, 64, TYPE_PCI_BUS); @@ -937,8 +937,6 @@ PCIBus *typhoon_init(TyphoonState *s) /* Pchip1 PCI special/interrupt acknowledge, 0x802.F800.0000, 64MB. */ /* Pchip1 PCI I/O, 0x802.FC00.0000, 32MB. */ /* Pchip1 PCI configuration, 0x802.FE00.0000, 16MB. */ - - return b; } =20 static void typhoon_pcihost_init(Object *obj) --=20 2.53.0 From nobody Wed Apr 8 03:07:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=yodel.dev ARC-Seal: i=1; a=rsa-sha256; t=1773182046; cv=none; d=zohomail.com; s=zohoarc; b=DASwMFyxOA481dc0B7q9f2cZO/MztgNOlJtmscQPC9HGPQmowGChfGpyuAbBYalgnA/ne/OhczFB20b+20x8aIaJHqGDzeP+kBiCpByhZJA2OeH1OpDI7wl9dEzKwoFKjpnu6QeFEF6c03Rde/qmAlIEIXEgFpz1x+T9WOc5UP8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1773182046; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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b=FJxZTvAW/C3+Csz6mEZYaRTHpP42+M6Rel3BQ1w0reQkUrLtcdRNx+ulnau4+ppf1 mzDCt0AQ/Yc9p95M75IUJ2WloiFIyhPCBWEUR4Pa8a9W/UIuc8JGCrbxDhg+W3Cnk1 JG7nyGWJRRBefI3YPAqcGPx++02Hqty85NY21s3eTFiY+8lA985X57zwfaHY7FvNC5 r1ECuzncM71w/jv/trEf1KnXRht0pcA7eYK/As187pntZn2SLmRrLmOV2RBcmxAROY xf3TFul3KqsJO0tJd29s5hlCzE7OCNfOIVsiwJ8/khdlLc5zJVrZXlMpl1PMVIIopD qDycQXtLp45VQ== X-Mailgun-Dkim: no X-Mailgun-Dkim: no From: Yodel Eldar Date: Tue, 10 Mar 2026 17:31:55 -0500 Subject: [PATCH 15/15] hw/alpha: Split typhoon_init() into instance_init and realize MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MS-Reactions: disallow Message-Id: <20260310-qomify-alpha-v1-15-4375b00a85ff@yodel.dev> References: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> In-Reply-To: <20260310-qomify-alpha-v1-0-4375b00a85ff@yodel.dev> To: qemu-devel@nongnu.org Cc: Richard Henderson , Yodel Eldar X-Developer-Signature: v=1; a=openpgp-sha256; l=11873; i=yodel.eldar@yodel.dev; h=from:subject:message-id; bh=91hfeNLjqZM4ynIx2IcMnyPuufJ0oupi4ZMCknnkWuI=; b=owGbwMvMwCU29Z3/drNU3zWMp9WSGDI3zP5077HUs/MJdfGVf3/N1uRb+mHRJHHvM1F8aZEHP SqdH90701HKwiDGxSArpshy+azEWYfc3V1pK3/ch5nDygQyhIGLUwAmom3A8Jtdp+BW0dV7l81u 3bm8Uf2MfqWVsO6FFZXrSxmvz9vz7vp/Robl4k9eHHw7q3F1YVbSM5FIFotvT94oahn7f1/9mPH /k4e8AA== X-Developer-Key: i=yodel.eldar@yodel.dev; a=openpgp; fpr=D3CD18CD406DBB8A66A9F8DF95EE4FB736654DAC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=143.55.232.12; envelope-from=bounce+0e9322.97607e-qemu-devel=nongnu.org@yodel.dev; helo=v512.v5f06b487.use4.send.mailgun.net X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HELO_STATIC_HOST=-0.001, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.819, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.903, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @yodel.dev) X-ZM-MESSAGEID: 1773182048099154100 Now that all of typhoon_init() inputs are either QOM link properties or subclass members, split it between Typhoon's instance_init and realize hooks. Replace its invocation in clipper_init() with sysbus_realize_and_unref(). Signed-off-by: Yodel Eldar --- hw/alpha/alpha_sys.h | 2 - hw/alpha/dp264.c | 2 +- hw/alpha/typhoon.c | 219 ++++++++++++++++++++++++++---------------------= ---- 3 files changed, 114 insertions(+), 109 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 27c3a72b13..fcc3abe95c 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -20,8 +20,6 @@ typedef struct TyphoonClass { =20 OBJECT_DECLARE_TYPE(TyphoonState, TyphoonClass, TYPHOON_PCI_HOST_BRIDGE) =20 -void typhoon_init(TyphoonState *); - #define TYPHOON_PROP_RAM "ram" #define TYPHOON_PCI_BUS_NAME "pci" =20 diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 92a15b0239..c59528174f 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -111,7 +111,7 @@ static void clipper_init(MachineState *machine) * Init the chipset. Because we're using CLIPPER IRQ mappings, * the minimum PCI device IdSel is 1. */ - typhoon_init(typhoon); + sysbus_realize_and_unref(SYS_BUS_DEVICE(typhoon), &error_fatal); pci_bus =3D PCI_BUS(object_resolve_path_component(typhoon_obj, TYPHOON_PCI_BUS_NAME)); =20 diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 55f3aae584..e7a0bbfc1c 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -833,112 +833,6 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } =20 -void typhoon_init(TyphoonState *s) -{ - TyphoonClass *tc =3D TYPHOON_PCI_HOST_BRIDGE_GET_CLASS(s); - MemoryRegion *addr_space =3D get_system_memory(); - DeviceState *dev =3D DEVICE(s); - PCIHostState *phb; - PCIBus *b; - int i; - - assert(tc->sys_map_irq !=3D NULL); - - phb =3D PCI_HOST_BRIDGE(dev); - - s->cchip.misc =3D 0x800000000ull; /* Revision: Typhoon. */ - s->pchip.win[3].wba =3D 2; /* Window 3 SG always enabled. */ - - /* Remember the CPUs so that we can deliver interrupts to them. */ - for (i =3D 0; i < 4; i++) { - AlphaCPU *cpu =3D s->cchip.cpu[i]; - if (cpu !=3D NULL) { - cpu->alarm_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, - typhoon_alarm_timer, - (void *)((uintptr_t)s + i= )); - } - } - - /* - * Main memory region, 0x00.0000.0000. Real hardware supports 32GB, - * but the address space hole reserved at this point is 8TB. - */ - memory_region_add_subregion(addr_space, 0, s->ram); - - /* TIGbus, 0x801.0000.0000, 1GB. */ - /* - * ??? The TIGbus is used for delivering interrupts, and access to - * the flash ROM. I'm not sure that we need to implement it at all. - */ - - /* Pchip0 CSRs, 0x801.8000.0000, 256MB. */ - memory_region_init_io(&s->pchip.region, OBJECT(s), &pchip_ops, s, "pch= ip0", - 256 * MiB); - memory_region_add_subregion(addr_space, 0x80180000000ULL, - &s->pchip.region); - - /* Cchip CSRs, 0x801.A000.0000, 256MB. */ - memory_region_init_io(&s->cchip.region, OBJECT(s), &cchip_ops, s, "cch= ip0", - 256 * MiB); - memory_region_add_subregion(addr_space, 0x801a0000000ULL, - &s->cchip.region); - - /* Dchip CSRs, 0x801.B000.0000, 256MB. */ - memory_region_init_io(&s->dchip_region, OBJECT(s), &dchip_ops, s, "dch= ip0", - 256 * MiB); - memory_region_add_subregion(addr_space, 0x801b0000000ULL, - &s->dchip_region); - - /* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */ - memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4 * GiB); - memory_region_add_subregion(addr_space, 0x80000000000ULL, - &s->pchip.reg_mem); - - /* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */ - memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_ignore_o= ps, - NULL, "pci0-io", 32 * MiB); - memory_region_add_subregion(addr_space, 0x801fc000000ULL, - &s->pchip.reg_io); - - b =3D pci_register_root_bus(dev, TYPHOON_PCI_BUS_NAME, - typhoon_set_irq, tc->sys_map_irq, s, - &s->pchip.reg_mem, &s->pchip.reg_io, - tc->devfn_min, 64, TYPE_PCI_BUS); - phb->bus =3D b; - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - - /* Host memory as seen from the PCI side, via the IOMMU. */ - memory_region_init_iommu(&s->pchip.iommu, sizeof(s->pchip.iommu), - TYPE_TYPHOON_IOMMU_MEMORY_REGION, OBJECT(s), - "iommu-typhoon", UINT64_MAX); - address_space_init(&s->pchip.iommu_as, MEMORY_REGION(&s->pchip.iommu), - "pchip0-pci"); - pci_setup_iommu(b, &typhoon_iommu_ops, s); - - /* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */ - memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_o= ps, - b, "pci0-iack", 64 * MiB); - memory_region_add_subregion(addr_space, 0x801f8000000ULL, - &s->pchip.reg_iack); - - /* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */ - memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_= ops, - b, "pci0-conf", 16 * MiB); - memory_region_add_subregion(addr_space, 0x801fe000000ULL, - &s->pchip.reg_conf); - - /* - * For the record, these are the mappings for the second PCI bus. - * We can get away with not implementing them because we indicate - * via the Cchip.CSC bit that Pchip1 is not present. - */ - /* Pchip1 PCI memory, 0x802.0000.0000, 4GB. */ - /* Pchip1 CSRs, 0x802.8000.0000, 256MB. */ - /* Pchip1 PCI special/interrupt acknowledge, 0x802.F800.0000, 64MB. */ - /* Pchip1 PCI I/O, 0x802.FC00.0000, 32MB. */ - /* Pchip1 PCI configuration, 0x802.FE00.0000, 16MB. */ -} - static void typhoon_pcihost_init(Object *obj) { TyphoonState *s =3D TYPHOON_PCI_HOST_BRIDGE(obj); @@ -955,6 +849,118 @@ static void typhoon_pcihost_init(Object *obj) qdev_init_gpio_in_named(dev, typhoon_set_isa_irq, TYPHOON_GPIO_ISA_IRQ= , 1); qdev_init_gpio_in_named(dev, typhoon_set_timer_irq, TYPHOON_GPIO_RTC_I= RQ, 1); + + s->cchip.misc =3D 0x800000000ull; /* Revision: Typhoon. */ + s->pchip.win[3].wba =3D 2; /* Window 3 SG always enabled. */ + + /* TIGbus, 0x801.0000.0000, 1GB. */ + /* + * ??? The TIGbus is used for delivering interrupts, and access to + * the flash ROM. I'm not sure that we need to implement it at all. + */ + + /* Pchip0 CSRs, 0x801.8000.0000, 256MB. */ + memory_region_init_io(&s->pchip.region, OBJECT(s), &pchip_ops, s, "pch= ip0", + 256 * MiB); + + /* Cchip CSRs, 0x801.A000.0000, 256MB. */ + memory_region_init_io(&s->cchip.region, OBJECT(s), &cchip_ops, s, "cch= ip0", + 256 * MiB); + + /* Dchip CSRs, 0x801.B000.0000, 256MB. */ + memory_region_init_io(&s->dchip_region, OBJECT(s), &dchip_ops, s, "dch= ip0", + 256 * MiB); + + /* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */ + memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4 * GiB); + + /* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */ + memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_ignore_o= ps, + NULL, "pci0-io", 32 * MiB); + + /* Host memory as seen from the PCI side, via the IOMMU. */ + memory_region_init_iommu(&s->pchip.iommu, sizeof(s->pchip.iommu), + TYPE_TYPHOON_IOMMU_MEMORY_REGION, OBJECT(s), + "iommu-typhoon", UINT64_MAX); + address_space_init(&s->pchip.iommu_as, MEMORY_REGION(&s->pchip.iommu), + "pchip0-pci"); +} + +static void typhoon_pcihost_realize(DeviceState *dev, Error **errp) +{ + TyphoonClass *tc =3D TYPHOON_PCI_HOST_BRIDGE_GET_CLASS(dev); + TyphoonState *s =3D TYPHOON_PCI_HOST_BRIDGE(dev); + MemoryRegion *addr_space =3D get_system_memory(); + PCIHostState *phb =3D PCI_HOST_BRIDGE(dev); + PCIBus *b; + int i; + const char *typename =3D object_get_typename(OBJECT(s)); + + if (s->cchip.cpu[0] =3D=3D NULL) { + error_setg(errp, "%s: \"cchip.cpu[0]\" link is not set", typename); + return; + } + + if (s->ram =3D=3D NULL) { + error_setg(errp, "%s: \"ram\" link is not set.", typename); + return; + } + + if (tc->sys_map_irq =3D=3D NULL) { + error_setg(errp, "%s: \"sys_map_irq\" setter has not been called.", + typename); + return; + } + + b =3D pci_register_root_bus(dev, TYPHOON_PCI_BUS_NAME, + typhoon_set_irq, tc->sys_map_irq, s, + &s->pchip.reg_mem, &s->pchip.reg_io, + tc->devfn_min, 64, TYPE_PCI_BUS); + phb->bus =3D b; + + /* Remember the CPUs so that we can deliver interrupts to them. */ + for (i =3D 0; i < 4; i++) { + AlphaCPU *cpu =3D s->cchip.cpu[i]; + if (cpu !=3D NULL) { + cpu->alarm_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, + typhoon_alarm_timer, + (void *)((uintptr_t)s + i)); + } + } + /* + * Main memory region, 0x00.0000.0000. Real hardware supports 32GB, + * but the address space hole reserved at this point is 8TB. + */ + memory_region_add_subregion(addr_space, 0, s->ram); + + memory_region_add_subregion(addr_space, 0x80180000000ULL, + &s->pchip.region); + + memory_region_add_subregion(addr_space, 0x801a0000000ULL, + &s->cchip.region); + + memory_region_add_subregion(addr_space, 0x801b0000000ULL, + &s->dchip_region); + + memory_region_add_subregion(addr_space, 0x80000000000ULL, + &s->pchip.reg_mem); + + memory_region_add_subregion(addr_space, 0x801fc000000ULL, + &s->pchip.reg_io); + + pci_setup_iommu(b, &typhoon_iommu_ops, s); + + /* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */ + memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_o= ps, + b, "pci0-iack", 64 * MiB); + memory_region_add_subregion(addr_space, 0x801f8000000ULL, + &s->pchip.reg_iack); + + /* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */ + memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_= ops, + b, "pci0-conf", 16 * MiB); + memory_region_add_subregion(addr_space, 0x801fe000000ULL, + &s->pchip.reg_conf); } =20 static const Property typhoon_properties[] =3D { @@ -967,6 +973,7 @@ static void typhoon_pcihost_class_init(ObjectClass *kla= ss, const void *data) DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->user_creatable =3D false; + dc->realize =3D typhoon_pcihost_realize; =20 device_class_set_props(dc, typhoon_properties); } --=20 2.53.0