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This will be useful in a future patch when HOST_DATA needs to make small modifications to the ctx. Signed-off-by: Chad Jablonski Reviewed-by: BALATON Zoltan [balaton: Fix build without pixman] Signed-off-by: BALATON Zoltan Message-ID: <6e2dccba65d9b369e0db633c0149a77351827222.1773020351.git.balato= n@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/display/ati_2d.c | 75 +++++++++++++++++++++++---------------------- 1 file changed, 39 insertions(+), 36 deletions(-) diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index 1ae2fbc5f89..ef4d2e21b5e 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -25,7 +25,7 @@ * possible. */ =20 -static int ati_bpp_from_datatype(ATIVGAState *s) +static int ati_bpp_from_datatype(const ATIVGAState *s) { switch (s->regs.dp_datatype & 0xf) { case 2: @@ -80,73 +80,76 @@ static void ati_set_dirty(VGACommonState *vga, const AT= I2DCtx *ctx) } } =20 -void ati_2d_blt(ATIVGAState *s) +static void setup_2d_blt_ctx(const ATIVGAState *s, ATI2DCtx *ctx) { - /* FIXME it is probably more complex than this and may need to be */ - /* rewritten but for now as a start just to get some output: */ - ATI2DCtx ctx_; - ATI2DCtx *ctx =3D &ctx_; + ctx->bpp =3D ati_bpp_from_datatype(s); ctx->rop3 =3D s->regs.dp_mix & GMC_ROP3_MASK; ctx->left_to_right =3D s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT; ctx->top_to_bottom =3D s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM; ctx->frgd_clr =3D s->regs.dp_brush_frgd_clr; ctx->palette =3D s->vga.palette; ctx->dst_offset =3D s->regs.dst_offset; + ctx->vram_end =3D s->vga.vram_ptr + s->vga.vram_size; + ctx->dst.width =3D s->regs.dst_width; ctx->dst.height =3D s->regs.dst_height; ctx->dst.x =3D (ctx->left_to_right ? s->regs.dst_x : s->regs.dst_x + 1 - ctx->dst.width); ctx->dst.y =3D (ctx->top_to_bottom ? s->regs.dst_y : s->regs.dst_y + 1 - ctx->dst.height); - ctx->bpp =3D ati_bpp_from_datatype(s); - if (!ctx->bpp) { - qemu_log_mask(LOG_GUEST_ERROR, "Invalid bpp\n"); - return; - } ctx->dst_stride =3D s->regs.dst_pitch; - if (!ctx->dst_stride) { - qemu_log_mask(LOG_GUEST_ERROR, "Zero dest pitch\n"); - return; - } - ctx->dst_bits =3D s->vga.vram_ptr + ctx->dst_offset; - + ctx->dst_bits =3D s->vga.vram_ptr + s->regs.dst_offset; if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { ctx->dst_bits +=3D s->regs.crtc_offset & 0x07ffffff; ctx->dst_stride *=3D ctx->bpp; } - ctx->vram_end =3D s->vga.vram_ptr + s->vga.vram_size; + + ctx->src.x =3D (ctx->left_to_right ? + s->regs.src_x : s->regs.src_x + 1 - ctx->dst.width); + ctx->src.y =3D (ctx->top_to_bottom ? + s->regs.src_y : s->regs.src_y + 1 - ctx->dst.height); + ctx->src_stride =3D s->regs.src_pitch; + ctx->src_bits =3D s->vga.vram_ptr + s->regs.src_offset; + if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { + ctx->src_bits +=3D s->regs.crtc_offset & 0x07ffffff; + ctx->src_stride *=3D ctx->bpp; + } + DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d %c %c\n", + s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset, + ctx->src_stride, ctx->dst_stride, s->regs.default_pitch, + ctx->src.x, ctx->src.y, ctx->dst.x, ctx->dst.y, + ctx->dst.width, ctx->dst.height, + (ctx->left_to_right ? '>' : '<'), + (ctx->top_to_bottom ? 'v' : '^')); +} + +void ati_2d_blt(ATIVGAState *s) +{ + ATI2DCtx ctx_; + ATI2DCtx *ctx =3D &ctx_; + setup_2d_blt_ctx(s, ctx); + if (!ctx->bpp) { + qemu_log_mask(LOG_GUEST_ERROR, "Invalid bpp\n"); + return; + } + if (!ctx->dst_stride) { + qemu_log_mask(LOG_GUEST_ERROR, "Zero dest pitch\n"); + return; + } if (ctx->dst.x > 0x3fff || ctx->dst.y > 0x3fff || ctx->dst_bits >=3D ctx->vram_end || ctx->dst_bits + ctx->dst.x + (ctx->dst.y + ctx->dst.height) * ctx->dst_stride >=3D ctx->vram_en= d) { qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); return; } - DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d %c %c\n", - s->regs.src_offset, ctx->dst_offset, s->regs.default_offset, - ctx->src_stride, ctx->dst_stride, s->regs.default_pitch, - ctx->src.x, ctx->src.y, ctx->dst.x, ctx->dst.y, - ctx->dst.width, ctx->dst.height, - (ctx->left_to_right ? '>' : '<'), - (ctx->top_to_bottom ? 'v' : '^')); switch (ctx->rop3) { case ROP3_SRCCOPY: { bool fallback =3D false; - ctx->src.x =3D (ctx->left_to_right ? - s->regs.src_x : s->regs.src_x + 1 - ctx->dst.width); - ctx->src.y =3D (ctx->top_to_bottom ? - s->regs.src_y : s->regs.src_y + 1 - ctx->dst.height); - ctx->src_stride =3D s->regs.src_pitch; if (!ctx->src_stride) { qemu_log_mask(LOG_GUEST_ERROR, "Zero source pitch\n"); return; } - ctx->src_bits =3D s->vga.vram_ptr + s->regs.src_offset; - - if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { - ctx->src_bits +=3D s->regs.crtc_offset & 0x07ffffff; - ctx->src_stride *=3D ctx->bpp; - } if (ctx->src.x > 0x3fff || ctx->src.y > 0x3fff || ctx->src_bits >=3D ctx->vram_end || ctx->src_bits + ctx->src.x + (ctx->src.y + ctx->dst.height) * --=20 2.53.0